+Tue Apr 21 12:05:32 1998 Jeffrey A Law (law@cygnus.com)
+
+ * mips.c (block_move_loop): Test Pmode == DImode instead of
+ TARGET_MIPS64.
+ (expand_block_move, save_restore_insns): Likewise.
+ (function_prologue, mips_expand_prologue): Likewise.
+ (mips_expand_epilogue): Likewise.
+ * mips.h (POINTER_SIZE): Allow specific targets to override.
+ (Pmode): Allow specific targets to override.
+ (FUNCTION_PROFILER): Test Pmode == DImode instead of TARGET_MIPS64
+ (POINTER_BOUNDARY, FUNCTION_MODE): Likewise.
+ (TRAMPOLINE_TEMPLATE, TRAMPOLINE_SIZE): Likewise.
+ (TRAMPOLINE_ALIGNMENT, INITIALIZE_TRAMPOLINE): Likewise.
+ (CASE_VECTOR_MODE, ASM_OUTPUT_ADDR_VEC_ELT): Likewise.
+ (ASM_OUTPUT_ADDR_DIFF_ELT, SIZE_TYPE, PTRDIFF_TYPE): Likewise.
+ * mips.md (indirect, tablejump & casesi support): Test for
+ Pmode == DImode instead of TARGET_MIPS64.
+ (call patterns): Likewise.
+
Tue Apr 21 09:43:55 1998 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* objc/sendmsg.c: Define gen_rtx_MEM() to 1, as is already done
if (bytes > 0x7fff)
{
- if (TARGET_LONG64)
+ if (Pmode == DImode)
{
emit_insn (gen_movdi (final_src, bytes_rtx));
emit_insn (gen_adddi3 (final_src, final_src, src_reg));
}
else
{
- if (TARGET_LONG64)
+ if (Pmode == DImode)
emit_insn (gen_adddi3 (final_src, src_reg, bytes_rtx));
else
emit_insn (gen_addsi3 (final_src, src_reg, bytes_rtx));
bytes_rtx = GEN_INT (MAX_MOVE_BYTES);
emit_insn (gen_movstrsi_internal (dest_mem, src_mem, bytes_rtx, align_rtx));
- if (TARGET_LONG64)
+ if (Pmode == DImode)
{
emit_insn (gen_adddi3 (src_reg, src_reg, bytes_rtx));
emit_insn (gen_adddi3 (dest_reg, dest_reg, bytes_rtx));
bytes -= leftover;
- if (TARGET_LONG64)
+ if (Pmode == DImode)
{
emit_insn (gen_iordi3 (temp, src_reg, dest_reg));
emit_insn (gen_anddi3 (temp, temp, GEN_INT (UNITS_PER_WORD-1)));
base_offset = large_offset;
if (file == (FILE *)0)
{
- if (TARGET_LONG64)
+ if (Pmode == DImode)
insn = emit_insn (gen_adddi3 (base_reg_rtx, large_reg, stack_pointer_rtx));
else
insn = emit_insn (gen_addsi3 (base_reg_rtx, large_reg, stack_pointer_rtx));
}
else
fprintf (file, "\t%s\t%s,%s,%s\n",
- TARGET_LONG64 ? "daddu" : "addu",
+ Pmode == DImode ? "daddu" : "addu",
reg_names[MIPS_TEMP2_REGNUM],
reg_names[REGNO (large_reg)],
reg_names[STACK_POINTER_REGNUM]);
RTX_FRAME_RELATED_P (insn) = 1;
}
- if (TARGET_LONG64)
+ if (Pmode == DImode)
insn = emit_insn (gen_adddi3 (base_reg_rtx, base_reg_rtx, stack_pointer_rtx));
else
insn = emit_insn (gen_addsi3 (base_reg_rtx, base_reg_rtx, stack_pointer_rtx));
reg_names[MIPS_TEMP2_REGNUM],
(long)base_offset,
(long)base_offset,
- TARGET_LONG64 ? "daddu" : "addu",
+ Pmode == DImode ? "daddu" : "addu",
reg_names[MIPS_TEMP2_REGNUM],
reg_names[MIPS_TEMP2_REGNUM],
reg_names[STACK_POINTER_REGNUM]);
base_offset = large_offset;
if (file == (FILE *)0)
{
- if (TARGET_LONG64)
+ if (Pmode == DImode)
insn = emit_insn (gen_adddi3 (base_reg_rtx, large_reg, stack_pointer_rtx));
else
insn = emit_insn (gen_addsi3 (base_reg_rtx, large_reg, stack_pointer_rtx));
}
else
fprintf (file, "\t%s\t%s,%s,%s\n",
- TARGET_LONG64 ? "daddu" : "addu",
+ Pmode == DImode ? "daddu" : "addu",
reg_names[MIPS_TEMP2_REGNUM],
reg_names[REGNO (large_reg)],
reg_names[STACK_POINTER_REGNUM]);
if (store_p)
RTX_FRAME_RELATED_P (insn) = 1;
- if (TARGET_LONG64)
+ if (Pmode == DImode)
insn = emit_insn (gen_adddi3 (base_reg_rtx, base_reg_rtx, stack_pointer_rtx));
else
insn = emit_insn (gen_addsi3 (base_reg_rtx, base_reg_rtx, stack_pointer_rtx));
reg_names[MIPS_TEMP2_REGNUM],
(long)base_offset,
(long)base_offset,
- TARGET_LONG64 ? "daddu" : "addu",
+ Pmode == DImode ? "daddu" : "addu",
reg_names[MIPS_TEMP2_REGNUM],
reg_names[MIPS_TEMP2_REGNUM],
reg_names[STACK_POINTER_REGNUM]);
if (tsize > 0)
{
fprintf (file, "\t%s\t%s,%s,%ld\n",
- (TARGET_LONG64 ? "dsubu" : "subu"),
+ (Pmode == DImode ? "dsubu" : "subu"),
sp_str, sp_str, tsize);
fprintf (file, "\t.cprestore %ld\n", current_frame_info.args_size);
}
if (TARGET_MIPS16 && current_function_outgoing_args_size != 0)
{
rtx incr = GEN_INT (current_function_outgoing_args_size);
- if (TARGET_LONG64)
+ if (Pmode == DImode)
insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx,
stack_pointer_rtx,
incr));
stack_pointer_rtx,
incr));
}
- else if (TARGET_LONG64)
+ else if (Pmode == DImode)
insn = emit_insn (gen_movdi (hard_frame_pointer_rtx, stack_pointer_rtx));
else
insn = emit_insn (gen_movsi (hard_frame_pointer_rtx, stack_pointer_rtx));
tsize_rtx = tmp_rtx;
}
- if (TARGET_LONG64)
+ if (Pmode == DImode)
insn = emit_insn (gen_subdi3 (stack_pointer_rtx, stack_pointer_rtx,
tsize_rtx));
else
reg_rtx = gen_rtx (REG, Pmode, 3);
emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
emit_move_insn (reg_rtx, tsize_rtx);
- if (TARGET_LONG64)
+ if (Pmode == DImode)
emit_insn (gen_subdi3 (hard_frame_pointer_rtx,
hard_frame_pointer_rtx,
reg_rtx));
if (current_function_outgoing_args_size != 0)
{
rtx incr = GEN_INT (current_function_outgoing_args_size);
- if (TARGET_LONG64)
+ if (Pmode == DImode)
insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx,
hard_frame_pointer_rtx,
incr));
else if (TARGET_MIPS16 && current_function_outgoing_args_size != 0)
{
rtx incr = GEN_INT (current_function_outgoing_args_size);
- if (TARGET_LONG64)
+ if (Pmode == DImode)
insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx,
stack_pointer_rtx,
incr));
stack_pointer_rtx,
incr));
}
- else if (TARGET_LONG64)
+ else if (Pmode == DImode)
insn = emit_insn (gen_movdi (hard_frame_pointer_rtx, stack_pointer_rtx));
else
insn = emit_insn (gen_movsi (hard_frame_pointer_rtx, stack_pointer_rtx));
rtx g6_rtx = gen_rtx (REG, Pmode, GP_REG_FIRST + 6);
emit_move_insn (g6_rtx, GEN_INT (tsize));
- if (TARGET_LONG64)
+ if (Pmode == DImode)
emit_insn (gen_adddi3 (hard_frame_pointer_rtx,
hard_frame_pointer_rtx,
g6_rtx));
tsize_rtx = GEN_INT (tsize);
}
- if (TARGET_LONG64)
+ if (Pmode == DImode)
emit_insn (gen_movdi (stack_pointer_rtx, hard_frame_pointer_rtx));
else
emit_insn (gen_movsi (stack_pointer_rtx, hard_frame_pointer_rtx));
abort ();
emit_insn (gen_blockage ());
- if (TARGET_LONG64 && tsize != 0)
+ if (Pmode == DImode && tsize != 0)
emit_insn (gen_adddi3 (stack_pointer_rtx, stack_pointer_rtx,
tsize_rtx));
else if (tsize != 0)
/* Width in bits of a pointer.
See also the macro `Pmode' defined below. */
+#ifndef POINTER_SIZE
#define POINTER_SIZE (TARGET_LONG64 ? 64 : 32)
+#endif
/* Allocation boundary (in *bits*) for storing pointers in memory. */
-#define POINTER_BOUNDARY (TARGET_LONG64 ? 64 : 32)
+#define POINTER_BOUNDARY (Pmode == DImode ? 64 : 32)
/* Allocation boundary (in *bits*) for storing arguments in argument list. */
#define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
TARGET_64BIT ? "dsubu" : "subu", \
reg_names[STACK_POINTER_REGNUM], \
reg_names[STACK_POINTER_REGNUM], \
- TARGET_LONG64 ? 16 : 8); \
+ Pmode == DImode ? 16 : 8); \
fprintf (FILE, "\t.set\treorder\n"); \
fprintf (FILE, "\t.set\tat\n"); \
}
fprintf (STREAM, "\t.word\t0x03e00821\t\t# move $1,$31\n"); \
fprintf (STREAM, "\t.word\t0x04110001\t\t# bgezal $0,.+8\n"); \
fprintf (STREAM, "\t.word\t0x00000000\t\t# nop\n"); \
- if (TARGET_LONG64) \
+ if (Pmode == DImode) \
{ \
fprintf (STREAM, "\t.word\t0xdfe30014\t\t# ld $3,20($31)\n"); \
fprintf (STREAM, "\t.word\t0xdfe2001c\t\t# ld $2,28($31)\n"); \
fprintf (STREAM, "\t.word\t0x0060c821\t\t# move $25,$3 (abicalls)\n"); \
fprintf (STREAM, "\t.word\t0x00600008\t\t# jr $3\n"); \
fprintf (STREAM, "\t.word\t0x0020f821\t\t# move $31,$1\n"); \
- if (TARGET_LONG64) \
+ if (Pmode == DImode) \
{ \
fprintf (STREAM, "\t.dword\t0x00000000\t\t# <function address>\n"); \
fprintf (STREAM, "\t.dword\t0x00000000\t\t# <static chain value>\n"); \
/* A C expression for the size in bytes of the trampoline, as an
integer. */
-#define TRAMPOLINE_SIZE (32 + (TARGET_LONG64 ? 16 : 8))
+#define TRAMPOLINE_SIZE (32 + (Pmode == DImode ? 16 : 8))
/* Alignment required for trampolines, in bits. */
-#define TRAMPOLINE_ALIGNMENT (TARGET_LONG64 ? 64 : 32)
+#define TRAMPOLINE_ALIGNMENT (Pmode == DImode ? 64 : 32)
/* INITIALIZE_TRAMPOLINE calls this library function to flush
program and data caches. */
#define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN) \
{ \
rtx addr = ADDR; \
- if (TARGET_LONG64) \
+ if (Pmode == DImode) \
{ \
emit_move_insn (gen_rtx (MEM, DImode, plus_constant (addr, 32)), FUNC); \
emit_move_insn (gen_rtx (MEM, DImode, plus_constant (addr, 40)), CHAIN);\
overflow is no more likely than the overflow in a branch
instruction. Large functions can currently break in both ways. */
#define CASE_VECTOR_MODE \
- (TARGET_MIPS16 ? HImode : TARGET_LONG64 ? DImode : SImode)
+ (TARGET_MIPS16 ? HImode : Pmode == DImode ? DImode : SImode)
/* Define as C expression which evaluates to nonzero if the tablejump
instruction expects the table to contain offsets from the address of the
After generation of rtl, the compiler makes no further distinction
between pointers and any other objects of this machine mode. */
+#ifndef Pmode
#define Pmode (TARGET_LONG64 ? DImode : SImode)
+#endif
/* A function address in a call instruction
is a word address (for indexing purposes)
so give the MEM rtx a words's mode. */
-#define FUNCTION_MODE (TARGET_LONG64 ? DImode : SImode)
+#define FUNCTION_MODE (Pmode == DImode ? DImode : SImode)
/* Define TARGET_MEM_FUNCTIONS if we want to use calls to memcpy and
memset, instead of the BSD functions bcopy and bzero. */
#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
fprintf (STREAM, "\t%s\t%sL%d\n", \
- TARGET_LONG64 ? ".dword" : ".word", \
+ Pmode == DImode ? ".dword" : ".word", \
LOCAL_LABEL_PREFIX, \
VALUE)
LOCAL_LABEL_PREFIX, VALUE, LOCAL_LABEL_PREFIX, REL); \
else if (TARGET_EMBEDDED_PIC) \
fprintf (STREAM, "\t%s\t%sL%d-%sLS%d\n", \
- TARGET_LONG64 ? ".dword" : ".word", \
+ Pmode == DImode ? ".dword" : ".word", \
LOCAL_LABEL_PREFIX, VALUE, LOCAL_LABEL_PREFIX, REL); \
else if (mips_abi == ABI_32) \
fprintf (STREAM, "\t%s\t%sL%d\n", \
- TARGET_LONG64 ? ".gpdword" : ".gpword", \
+ Pmode == DImode ? ".gpdword" : ".gpword", \
LOCAL_LABEL_PREFIX, VALUE); \
else \
fprintf (STREAM, "\t%s\t%sL%d\n", \
- TARGET_LONG64 ? ".dword" : ".word", \
+ Pmode == DImode ? ".dword" : ".word", \
LOCAL_LABEL_PREFIX, VALUE); \
} while (0)
#ifndef SIZE_TYPE
#define NO_BUILTIN_SIZE_TYPE
-#define SIZE_TYPE (TARGET_LONG64 ? "long unsigned int" : "unsigned int")
+#define SIZE_TYPE (Pmode == DImode ? "long unsigned int" : "unsigned int")
#endif
#ifndef PTRDIFF_TYPE
#define NO_BUILTIN_PTRDIFF_TYPE
-#define PTRDIFF_TYPE (TARGET_LONG64 ? "long int" : "int")
+#define PTRDIFF_TYPE (Pmode == DImode ? "long int" : "int")
#endif
/* See mips_expand_prologue's use of loadgp for when this should be
if (GET_CODE (dest) != REG || GET_MODE (dest) != Pmode)
operands[0] = copy_to_mode_reg (Pmode, dest);
- if (!TARGET_LONG64)
+ if (!(Pmode == DImode))
emit_jump_insn (gen_indirect_jump_internal1 (operands[0]));
else
emit_jump_insn (gen_indirect_jump_internal2 (operands[0]));
(define_insn "indirect_jump_internal1"
[(set (pc) (match_operand:SI 0 "register_operand" "d"))]
- "!TARGET_LONG64"
+ "!(Pmode == DImode)"
"%*j\\t%0"
[(set_attr "type" "jump")
(set_attr "mode" "none")
(define_insn "indirect_jump_internal2"
[(set (pc) (match_operand:DI 0 "se_register_operand" "d"))]
- "TARGET_LONG64"
+ "Pmode == DImode"
"%*j\\t%0"
[(set_attr "type" "jump")
(set_attr "mode" "none")
{
if (GET_MODE (operands[0]) != HImode)
abort ();
- if (!TARGET_LONG64)
+ if (!(Pmode == DImode))
emit_jump_insn (gen_tablejump_mips161 (operands[0], operands[1]));
else
emit_jump_insn (gen_tablejump_mips162 (operands[0], operands[1]));
if (! flag_pic)
{
- if (!TARGET_LONG64)
+ if (!(Pmode == DImode))
emit_jump_insn (gen_tablejump_internal1 (operands[0], operands[1]));
else
emit_jump_insn (gen_tablejump_internal2 (operands[0], operands[1]));
}
else
{
- if (!TARGET_LONG64)
+ if (!(Pmode == DImode))
emit_jump_insn (gen_tablejump_internal3 (operands[0], operands[1]));
else
emit_jump_insn (gen_tablejump_internal4 (operands[0], operands[1]));
[(set (pc)
(match_operand:SI 0 "register_operand" "d"))
(use (label_ref (match_operand 1 "" "")))]
- "!TARGET_LONG64"
+ "!(Pmode == DImode)"
"%*j\\t%0"
[(set_attr "type" "jump")
(set_attr "mode" "none")
[(set (pc)
(match_operand:DI 0 "se_register_operand" "d"))
(use (label_ref (match_operand 1 "" "")))]
- "TARGET_LONG64"
+ "Pmode == DImode"
"%*j\\t%0"
[(set_attr "type" "jump")
(set_attr "mode" "none")
[(set (pc) (plus:SI (sign_extend:SI
(match_operand:HI 0 "register_operand" "d"))
(label_ref:SI (match_operand:SI 1 "" ""))))]
- "TARGET_MIPS16 && !TARGET_LONG64"
+ "TARGET_MIPS16 && !(Pmode == DImode)"
"
{
if (operands[0]) /* eliminate unused code warnings. */
[(set (pc) (plus:DI (sign_extend:DI
(match_operand:HI 0 "register_operand" "d"))
(label_ref:DI (match_operand:SI 1 "" ""))))]
- "TARGET_MIPS16 && TARGET_LONG64"
+ "TARGET_MIPS16 && Pmode == DImode"
"
{
if (operands[0]) /* eliminate unused code warnings. */
[(set (pc)
(plus:SI (match_operand:SI 0 "register_operand" "d")
(label_ref:SI (match_operand:SI 1 "" ""))))]
- "!TARGET_LONG64 && next_active_insn (insn) != 0
+ "!(Pmode == DImode) && next_active_insn (insn) != 0
&& GET_CODE (PATTERN (next_active_insn (insn))) == ADDR_DIFF_VEC
&& PREV_INSN (next_active_insn (insn)) == operands[1]"
"*
[(set (pc)
(plus:DI (match_operand:DI 0 "se_register_operand" "d")
(label_ref:DI (match_operand:SI 1 "" ""))))]
- "TARGET_LONG64 && next_active_insn (insn) != 0
+ "Pmode == DImode && next_active_insn (insn) != 0
&& GET_CODE (PATTERN (next_active_insn (insn))) == ADDR_DIFF_VEC
&& PREV_INSN (next_active_insn (insn)) == operands[1]"
"%*j\\t%0"
"
{
/* We need slightly different code for eight byte table entries. */
- if (TARGET_LONG64)
+ if (Pmode == DImode)
abort ();
if (operands[0])
"TARGET_ABICALLS"
"
{
- if (TARGET_LONG64)
+ if (Pmode == DImode)
emit_insn (gen_builtin_setjmp_setup_64 (operands[0]));
else
emit_insn (gen_builtin_setjmp_setup_32 (operands[0]));
[(set (mem:SI (plus:SI (match_operand:SI 0 "register_operand" "r")
(const_int 12)))
(reg:SI 28))]
- "TARGET_ABICALLS && ! TARGET_LONG64"
+ "TARGET_ABICALLS && ! (Pmode == DImode)"
"")
(define_expand "builtin_setjmp_setup_64"
[(set (mem:DI (plus:DI (match_operand:DI 0 "register_operand" "r")
(const_int 24)))
(reg:DI 28))]
- "TARGET_ABICALLS && TARGET_LONG64"
+ "TARGET_ABICALLS && Pmode == DImode"
"")
;; For o32/n32/n64, we need to arrange for longjmp to put the
"
{
/* The elements of the buffer are, in order: */
- int W = (TARGET_LONG64 ? 8 : 4);
+ int W = (Pmode == DImode ? 8 : 4);
rtx fp = gen_rtx_MEM (Pmode, operands[0]);
rtx lab = gen_rtx_MEM (Pmode, plus_constant (operands[0], 1*W));
rtx stack = gen_rtx_MEM (Pmode, plus_constant (operands[0], 2*W));
[(call (mem:SI (match_operand:SI 0 "register_operand" "r"))
(match_operand 1 "" "i"))
(clobber (match_operand:SI 2 "register_operand" "=d"))]
- "!TARGET_LONG64 && !TARGET_ABICALLS && TARGET_LONG_CALLS"
+ "!(Pmode == DImode) && !TARGET_ABICALLS && TARGET_LONG_CALLS"
"%*jal\\t%2,%0"
[(set_attr "type" "call")
(set_attr "mode" "none")
[(call (mem:DI (match_operand:DI 0 "se_register_operand" "r"))
(match_operand 1 "" "i"))
(clobber (match_operand:SI 2 "register_operand" "=d"))]
- "TARGET_LONG64 && !TARGET_ABICALLS && TARGET_LONG_CALLS"
+ "Pmode == DImode && !TARGET_ABICALLS && TARGET_LONG_CALLS"
"%*jal\\t%2,%0"
[(set_attr "type" "call")
(set_attr "mode" "none")
[(call (mem:SI (match_operand:SI 0 "register_operand" "r"))
(match_operand 1 "" "i"))
(clobber (match_operand:SI 2 "register_operand" "=d"))]
- "!TARGET_LONG64 && TARGET_ABICALLS && TARGET_LONG_CALLS"
+ "!(Pmode == DImode) && TARGET_ABICALLS && TARGET_LONG_CALLS"
"*
{
if (REGNO (operands[0]) != PIC_FUNCTION_ADDR_REGNUM)
[(call (mem:DI (match_operand:DI 0 "se_register_operand" "r"))
(match_operand 1 "" "i"))
(clobber (match_operand:SI 2 "register_operand" "=d"))]
- "TARGET_LONG64 && TARGET_ABICALLS && TARGET_LONG_CALLS"
+ "Pmode == DImode && TARGET_ABICALLS && TARGET_LONG_CALLS"
"*
{
if (REGNO (operands[0]) != PIC_FUNCTION_ADDR_REGNUM)
(call (mem:SI (match_operand:SI 1 "register_operand" "r"))
(match_operand 2 "" "i")))
(clobber (match_operand:SI 3 "register_operand" "=d"))]
- "!TARGET_LONG64 && !TARGET_ABICALLS && TARGET_LONG_CALLS"
+ "!(Pmode == DImode) && !TARGET_ABICALLS && TARGET_LONG_CALLS"
"%*jal\\t%3,%1"
[(set_attr "type" "call")
(set_attr "mode" "none")
(call (mem:DI (match_operand:DI 1 "se_register_operand" "r"))
(match_operand 2 "" "i")))
(clobber (match_operand:SI 3 "register_operand" "=d"))]
- "TARGET_LONG64 && !TARGET_ABICALLS && TARGET_LONG_CALLS"
+ "Pmode == DImode && !TARGET_ABICALLS && TARGET_LONG_CALLS"
"%*jal\\t%3,%1"
[(set_attr "type" "call")
(set_attr "mode" "none")
(call (mem:SI (match_operand:SI 1 "register_operand" "r"))
(match_operand 2 "" "i")))
(clobber (match_operand:SI 3 "register_operand" "=d"))]
- "!TARGET_LONG64 && TARGET_ABICALLS && TARGET_LONG_CALLS"
+ "!(Pmode == DImode) && TARGET_ABICALLS && TARGET_LONG_CALLS"
"*
{
if (REGNO (operands[1]) != PIC_FUNCTION_ADDR_REGNUM)
(call (mem:DI (match_operand:DI 1 "se_register_operand" "r"))
(match_operand 2 "" "i")))
(clobber (match_operand:SI 3 "register_operand" "=d"))]
- "TARGET_LONG64 && TARGET_ABICALLS && TARGET_LONG_CALLS"
+ "Pmode == DImode && TARGET_ABICALLS && TARGET_LONG_CALLS"
"*
{
if (REGNO (operands[1]) != PIC_FUNCTION_ADDR_REGNUM)
OSDN Git Service
