+2005-08-01 James E Wilson <wilson@specifix.com>
+
+ * config/mips/mips.c (mips_encode_section_info, mips_attribute_table,
+ TARGET_ENCODE_SECTION_INFO, TARGET_ATTRIBUTE_TABLE): New.
+ * config/mips/mips.h (SYMBOL_FLAG_LONG_CALL, SYMBOL_REF_LONG_CALL_P):
+ New.
+ * config/mips/predicates.md (const_call_insn_operand): Add check for
+ SYMBOL_REF_LONG_CALL_P.
+ * doc/extend.texi (long_call): Document the new attribute.
+
2005-08-01 Ian Lance Taylor <ian@airs.com>
Richard Henderson <rth@redhat.com>
enum insn_code, enum mips_fp_condition,
rtx, tree);
static rtx mips_expand_builtin_bposge (enum mips_builtin_type, rtx);
+static void mips_encode_section_info (tree, rtx, int);
/* Structure to be filled in by compute_frame_size with register
save masks, and offsets for the current function. */
/* Map register constraint character to register class. */
enum reg_class mips_char_to_class[256];
+
+/* Table of machine dependent attributes. */
+const struct attribute_spec mips_attribute_table[] =
+{
+ { "long_call", 0, 0, false, true, true, NULL },
+ { NULL, 0, 0, false, false, false, NULL }
+};
\f
/* A table describing all the processors gcc knows about. Names are
matched in the order listed. The first mention of an ISA level is
#undef TARGET_CANNOT_FORCE_CONST_MEM
#define TARGET_CANNOT_FORCE_CONST_MEM mips_cannot_force_const_mem
+#undef TARGET_ENCODE_SECTION_INFO
+#define TARGET_ENCODE_SECTION_INFO mips_encode_section_info
+
+#undef TARGET_ATTRIBUTE_TABLE
+#define TARGET_ATTRIBUTE_TABLE mips_attribute_table
+
struct gcc_target targetm = TARGET_INITIALIZER;
\f
/* Classify symbol X, which must be a SYMBOL_REF or a LABEL_REF. */
return target;
}
\f
+/* Set SYMBOL_REF_FLAGS for the SYMBOL_REF inside RTL, which belongs to DECL.
+ FIRST is true if this is the first time handling this decl. */
+
+static void
+mips_encode_section_info (tree decl, rtx rtl, int first)
+{
+ default_encode_section_info (decl, rtl, first);
+
+ if (TREE_CODE (decl) == FUNCTION_DECL
+ && lookup_attribute ("long_call", TYPE_ATTRIBUTES (TREE_TYPE (decl))))
+ {
+ rtx symbol = XEXP (rtl, 0);
+ SYMBOL_REF_FLAGS (symbol) |= SYMBOL_FLAG_LONG_CALL;
+ }
+}
+\f
#include "gt-mips.h"
else \
asm_fprintf ((FILE), "%U%s", (NAME))
\f
+/* Flag to mark a function decl symbol that requires a long call. */
+#define SYMBOL_FLAG_LONG_CALL (SYMBOL_FLAG_MACH_DEP << 0)
+#define SYMBOL_REF_LONG_CALL_P(X) \
+ ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_LONG_CALL) != 0)
+
/* Specify the machine mode that this machine uses
for the index in the tablejump instruction.
??? Using HImode in mips16 mode can cause overflow. */
switch (symbol_type)
{
case SYMBOL_GENERAL:
- /* If -mlong-calls, force all calls to use register addressing. */
- return !TARGET_LONG_CALLS;
+ /* If -mlong-calls, force all calls to use register addressing. Also,
+ if this function has the long_call attribute, we must use register
+ addressing. */
+ return !TARGET_LONG_CALLS && !SYMBOL_REF_LONG_CALL_P (op);
case SYMBOL_GOT_GLOBAL:
/* Without explicit relocs, there is no special syntax for
@xref{RS/6000 and PowerPC Options}, for more information on whether long
calls are necessary.
+@item long_call
+@cindex indirect calls on MIPS
+This attribute specifies how a particular function is called on MIPS@.
+The attribute overrides the @option{-mlong-calls} (@pxref{MIPS Options})
+command line switch. This attribute causes the compiler to always call
+the function by first loading its address into a register, and then using
+the contents of that register.
+
@item malloc
@cindex @code{malloc} attribute
The @code{malloc} attribute is used to tell the compiler that a function