1 /* Subroutines for insn-output.c for Matsushita MN10300 series
2 Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
3 Contributed by Jeff Law (law@cygnus.com).
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
42 /* The size of the callee register save area. Right now we save everything
43 on entry since it costs us nothing in code size. It does cost us from a
44 speed standpoint, so we want to optimize this sooner or later. */
45 #define REG_SAVE_BYTES (4 * regs_ever_live[2] \
46 + 4 * regs_ever_live[3] \
47 + 4 * regs_ever_live[6] \
48 + 4 * regs_ever_live[7] \
49 + 16 * (regs_ever_live[14] || regs_ever_live[15] \
50 || regs_ever_live[16] || regs_ever_live[17]))
56 fprintf (file, "#\tGCC For the Matsushita MN10300\n");
58 fprintf (file, "# -O%d\n", optimize);
60 fprintf (file, "\n\n");
63 fprintf (file, "\t.am33\n");
64 output_file_directive (file, main_input_filename);
68 /* Print operand X using operand code CODE to assembly language output file
72 print_operand (file, x, code)
81 /* These are normal and reversed branches. */
82 switch (code == 'b' ? GET_CODE (x) : reverse_condition (GET_CODE (x)))
100 fprintf (file, "lt");
103 fprintf (file, "cc");
106 fprintf (file, "hi");
109 fprintf (file, "ls");
112 fprintf (file, "cs");
119 /* This is used for the operand to a call instruction;
120 if it's a REG, enclose it in parens, else output
121 the operand normally. */
122 if (GET_CODE (x) == REG)
125 print_operand (file, x, 0);
129 print_operand (file, x, 0);
132 /* These are the least significant word in a 64bit value. */
134 switch (GET_CODE (x))
138 output_address (XEXP (x, 0));
143 fprintf (file, "%s", reg_names[REGNO (x)]);
148 reg_names[REGNO (SUBREG_REG (x)) + SUBREG_WORD (x)]);
156 switch (GET_MODE (x))
159 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
160 REAL_VALUE_TO_TARGET_DOUBLE (rv, val);
161 print_operand_address (file, GEN_INT (val[0]));
164 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
165 REAL_VALUE_TO_TARGET_SINGLE (rv, val[0]);
166 print_operand_address (file, GEN_INT (val[0]));
170 print_operand_address (file,
171 GEN_INT (CONST_DOUBLE_LOW (x)));
180 print_operand_address (file, x);
188 /* Similarly, but for the most significant word. */
190 switch (GET_CODE (x))
194 x = adj_offsettable_operand (x, 4);
195 output_address (XEXP (x, 0));
200 fprintf (file, "%s", reg_names[REGNO (x) + 1]);
205 reg_names[REGNO (SUBREG_REG (x)) + SUBREG_WORD (x)] + 1);
213 switch (GET_MODE (x))
216 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
217 REAL_VALUE_TO_TARGET_DOUBLE (rv, val);
218 print_operand_address (file, GEN_INT (val[1]));
224 print_operand_address (file,
225 GEN_INT (CONST_DOUBLE_HIGH (x)));
235 print_operand_address (file, GEN_INT (-1));
237 print_operand_address (file, GEN_INT (0));
246 if (GET_CODE (XEXP (x, 0)) == REG)
247 output_address (gen_rtx_PLUS (SImode, XEXP (x, 0), GEN_INT (0)));
249 output_address (XEXP (x, 0));
254 output_address (GEN_INT ((~INTVAL (x)) & 0xff));
257 /* For shift counts. The hardware ignores the upper bits of
258 any immediate, but the assembler will flag an out of range
259 shift count as an error. So we mask off the high bits
260 of the immediate here. */
262 if (GET_CODE (x) == CONST_INT)
264 fprintf (file, "%d", INTVAL (x) & 0x1f);
270 switch (GET_CODE (x))
274 output_address (XEXP (x, 0));
283 fprintf (file, "%s", reg_names[REGNO (x)]);
288 reg_names[REGNO (SUBREG_REG (x)) + SUBREG_WORD (x)]);
291 /* This will only be single precision.... */
297 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
298 REAL_VALUE_TO_TARGET_SINGLE (rv, val);
299 print_operand_address (file, GEN_INT (val));
308 print_operand_address (file, x);
317 /* Output assembly language output for the address ADDR to FILE. */
320 print_operand_address (file, addr)
324 switch (GET_CODE (addr))
327 print_operand_address (file, XEXP (addr, 0));
331 if (addr == stack_pointer_rtx)
332 print_operand_address (file, gen_rtx_PLUS (SImode,
336 print_operand (file, addr, 0);
341 if (REG_P (XEXP (addr, 0))
342 && REG_OK_FOR_BASE_P (XEXP (addr, 0)))
343 base = XEXP (addr, 0), index = XEXP (addr, 1);
344 else if (REG_P (XEXP (addr, 1))
345 && REG_OK_FOR_BASE_P (XEXP (addr, 1)))
346 base = XEXP (addr, 1), index = XEXP (addr, 0);
349 print_operand (file, index, 0);
351 print_operand (file, base, 0);;
355 output_addr_const (file, addr);
358 output_addr_const (file, addr);
364 can_use_return_insn ()
366 /* size includes the fixed stack space needed for function calls. */
367 int size = get_frame_size () + current_function_outgoing_args_size;
369 /* And space for the return pointer. */
370 size += current_function_outgoing_args_size ? 4 : 0;
372 return (reload_completed
374 && !regs_ever_live[2]
375 && !regs_ever_live[3]
376 && !regs_ever_live[6]
377 && !regs_ever_live[7]
378 && !regs_ever_live[14]
379 && !regs_ever_live[15]
380 && !regs_ever_live[16]
381 && !regs_ever_live[17]
382 && !frame_pointer_needed);
390 /* SIZE includes the fixed stack space needed for function calls. */
391 size = get_frame_size () + current_function_outgoing_args_size;
392 size += (current_function_outgoing_args_size ? 4 : 0);
394 /* If this is an old-style varargs function, then its arguments
395 need to be flushed back to the stack. */
396 if (current_function_varargs)
398 emit_move_insn (gen_rtx_MEM (SImode,
399 plus_constant (stack_pointer_rtx, 4)),
400 gen_rtx_REG (SImode, 0));
401 emit_move_insn (gen_rtx_MEM (SImode,
402 plus_constant (stack_pointer_rtx, 8)),
403 gen_rtx_REG (SImode, 1));
406 /* And now store all the registers onto the stack with a
407 single two byte instruction. */
408 if (regs_ever_live[2] || regs_ever_live[3]
409 || regs_ever_live[6] || regs_ever_live[7]
410 || regs_ever_live[14] || regs_ever_live[15]
411 || regs_ever_live[16] || regs_ever_live[17]
412 || frame_pointer_needed)
413 emit_insn (gen_store_movm ());
415 /* Now put the frame pointer into the frame pointer register. */
416 if (frame_pointer_needed)
417 emit_move_insn (frame_pointer_rtx, stack_pointer_rtx);
419 /* Allocate stack for this frame. */
421 emit_insn (gen_addsi3 (stack_pointer_rtx,
431 /* SIZE includes the fixed stack space needed for function calls. */
432 size = get_frame_size () + current_function_outgoing_args_size;
433 size += (current_function_outgoing_args_size ? 4 : 0);
435 /* Maybe cut back the stack, except for the register save area.
437 If the frame pointer exists, then use the frame pointer to
440 If the stack size + register save area is more than 255 bytes,
441 then the stack must be cut back here since the size + register
442 save size is too big for a ret/retf instruction.
444 Else leave it alone, it will be cut back as part of the
445 ret/retf instruction, or there wasn't any stack to begin with.
447 Under no circumstanes should the register save area be
448 deallocated here, that would leave a window where an interrupt
449 could occur and trash the register save area. */
450 if (frame_pointer_needed)
452 emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
455 else if ((regs_ever_live[2] || regs_ever_live[3]
456 || regs_ever_live[14] || regs_ever_live[15]
457 || regs_ever_live[16] || regs_ever_live[17]
458 || regs_ever_live[6] || regs_ever_live[7])
459 && size + REG_SAVE_BYTES > 255)
461 emit_insn (gen_addsi3 (stack_pointer_rtx,
467 /* For simplicity, we just movm all the callee saved registers to
468 the stack with one instruction.
470 ?!? Only save registers which are actually used. Reduces
471 stack requirements and is faster. */
472 if (regs_ever_live[2] || regs_ever_live[3]
473 || regs_ever_live[6] || regs_ever_live[7]
474 || regs_ever_live[14] || regs_ever_live[15]
475 || regs_ever_live[16] || regs_ever_live[17]
476 || frame_pointer_needed)
477 emit_jump_insn (gen_return_internal_regs (GEN_INT (size + REG_SAVE_BYTES)));
482 emit_insn (gen_addsi3 (stack_pointer_rtx,
485 emit_jump_insn (gen_return_internal ());
489 emit_jump_insn (gen_return ());
494 /* Update the condition code from the insn. */
497 notice_update_cc (body, insn)
501 switch (get_attr_cc (insn))
504 /* Insn does not affect CC at all. */
508 /* Insn does not change CC, but the 0'th operand has been changed. */
509 if (cc_status.value1 != 0
510 && reg_overlap_mentioned_p (recog_data.operand[0], cc_status.value1))
511 cc_status.value1 = 0;
515 /* Insn sets the Z,N flags of CC to recog_data.operand[0].
518 cc_status.flags |= CC_NO_CARRY | CC_OVERFLOW_UNUSABLE;
519 cc_status.value1 = recog_data.operand[0];
523 /* Insn sets the Z,N,V flags of CC to recog_data.operand[0].
526 cc_status.flags |= CC_NO_CARRY;
527 cc_status.value1 = recog_data.operand[0];
531 /* The insn is a compare instruction. */
533 cc_status.value1 = SET_SRC (body);
537 /* The insn is a compare instruction. */
539 cc_status.value1 = SET_SRC (body);
540 cc_status.flags |= CC_INVERTED;
544 /* Insn doesn't leave CC in a usable state. */
553 /* Return true if OP is a valid call operand. */
556 call_address_operand (op, mode)
558 enum machine_mode mode ATTRIBUTE_UNUSED;
560 return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == REG);
563 /* What (if any) secondary registers are needed to move IN with mode
564 MODE into a register in register class CLASS.
566 We might be able to simplify this. */
568 secondary_reload_class (class, mode, in)
569 enum reg_class class;
570 enum machine_mode mode;
573 /* Memory loads less than a full word wide can't have an
574 address or stack pointer destination. They must use
575 a data register as an intermediate register. */
576 if (GET_CODE (in) == MEM
577 && (mode == QImode || mode == HImode)
578 && (class == ADDRESS_REGS || class == SP_REGS))
581 return DATA_OR_EXTENDED_REGS;
585 /* We can't directly load sp + const_int into a data register;
586 we must use an address register as an intermediate. */
588 && class != ADDRESS_REGS
589 && class != SP_OR_ADDRESS_REGS
590 && class != SP_OR_EXTENDED_REGS
591 && class != ADDRESS_OR_EXTENDED_REGS
592 && class != SP_OR_ADDRESS_OR_EXTENDED_REGS
593 && (in == stack_pointer_rtx
594 || (GET_CODE (in) == PLUS
595 && (XEXP (in, 0) == stack_pointer_rtx
596 || XEXP (in, 1) == stack_pointer_rtx))))
599 if (GET_CODE (in) == PLUS
600 && (XEXP (in, 0) == stack_pointer_rtx
601 || XEXP (in, 1) == stack_pointer_rtx))
604 return DATA_OR_EXTENDED_REGS;
608 /* Otherwise assume no secondary reloads are needed. */
613 initial_offset (from, to)
616 /* The difference between the argument pointer and the frame pointer
617 is the size of the callee register save area. */
618 if (from == ARG_POINTER_REGNUM && to == FRAME_POINTER_REGNUM)
620 if (regs_ever_live[2] || regs_ever_live[3]
621 || regs_ever_live[6] || regs_ever_live[7]
622 || regs_ever_live[14] || regs_ever_live[15]
623 || regs_ever_live[16] || regs_ever_live[17]
624 || frame_pointer_needed)
625 return REG_SAVE_BYTES;
630 /* The difference between the argument pointer and the stack pointer is
631 the sum of the size of this function's frame, the callee register save
632 area, and the fixed stack space needed for function calls (if any). */
633 if (from == ARG_POINTER_REGNUM && to == STACK_POINTER_REGNUM)
635 if (regs_ever_live[2] || regs_ever_live[3]
636 || regs_ever_live[6] || regs_ever_live[7]
637 || regs_ever_live[14] || regs_ever_live[15]
638 || regs_ever_live[16] || regs_ever_live[17]
639 || frame_pointer_needed)
640 return (get_frame_size () + REG_SAVE_BYTES
641 + (current_function_outgoing_args_size
642 ? current_function_outgoing_args_size + 4 : 0));
644 return (get_frame_size ()
645 + (current_function_outgoing_args_size
646 ? current_function_outgoing_args_size + 4 : 0));
649 /* The difference between the frame pointer and stack pointer is the sum
650 of the size of this function's frame and the fixed stack space needed
651 for function calls (if any). */
652 if (from == FRAME_POINTER_REGNUM && to == STACK_POINTER_REGNUM)
653 return (get_frame_size ()
654 + (current_function_outgoing_args_size
655 ? current_function_outgoing_args_size + 4 : 0));
660 /* Flush the argument registers to the stack for a stdarg function;
661 return the new argument pointer. */
663 mn10300_builtin_saveregs ()
666 tree fntype = TREE_TYPE (current_function_decl);
667 int argadj = ((!(TYPE_ARG_TYPES (fntype) != 0
668 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype)))
670 ? UNITS_PER_WORD : 0);
671 int set = get_varargs_alias_set ();
674 offset = plus_constant (current_function_arg_offset_rtx, argadj);
676 offset = current_function_arg_offset_rtx;
678 mem = gen_rtx_MEM (SImode, current_function_internal_arg_pointer);
679 MEM_ALIAS_SET (mem) = set;
680 emit_move_insn (mem, gen_rtx_REG (SImode, 0));
682 mem = gen_rtx_MEM (SImode,
683 plus_constant (current_function_internal_arg_pointer, 4));
684 MEM_ALIAS_SET (mem) = set;
685 emit_move_insn (mem, gen_rtx_REG (SImode, 1));
687 return copy_to_reg (expand_binop (Pmode, add_optab,
688 current_function_internal_arg_pointer,
689 offset, 0, 0, OPTAB_LIB_WIDEN));
693 mn10300_va_start (stdarg_p, valist, nextarg)
699 nextarg = expand_builtin_saveregs ();
701 std_expand_builtin_va_start (stdarg_p, valist, nextarg);
705 mn10300_va_arg (valist, type)
708 HOST_WIDE_INT align, rsize;
711 /* Compute the rounded size of the type. */
712 align = PARM_BOUNDARY / BITS_PER_UNIT;
713 rsize = (((int_size_in_bytes (type) + align - 1) / align) * align);
715 t = build (POSTINCREMENT_EXPR, TREE_TYPE (valist), valist,
716 build_int_2 ((rsize > 8 ? 4 : rsize), 0));
717 TREE_SIDE_EFFECTS (t) = 1;
719 ptr = build_pointer_type (type);
721 /* "Large" types are passed by reference. */
724 pptr = build_pointer_type (ptr);
725 t = build1 (NOP_EXPR, pptr, t);
726 TREE_SIDE_EFFECTS (t) = 1;
728 t = build1 (INDIRECT_REF, ptr, t);
729 TREE_SIDE_EFFECTS (t) = 1;
733 t = build1 (NOP_EXPR, ptr, t);
734 TREE_SIDE_EFFECTS (t) = 1;
738 return expand_expr (t, NULL_RTX, Pmode, EXPAND_NORMAL);
741 /* Return an RTX to represent where a value with mode MODE will be returned
742 from a function. If the result is 0, the argument is pushed. */
745 function_arg (cum, mode, type, named)
746 CUMULATIVE_ARGS *cum;
747 enum machine_mode mode;
749 int named ATTRIBUTE_UNUSED;
754 /* We only support using 2 data registers as argument registers. */
757 /* Figure out the size of the object to be passed. */
759 size = int_size_in_bytes (type);
761 size = GET_MODE_SIZE (mode);
763 /* Figure out the alignment of the object to be passed. */
766 cum->nbytes = (cum->nbytes + 3) & ~3;
768 /* Don't pass this arg via a register if all the argument registers
770 if (cum->nbytes > nregs * UNITS_PER_WORD)
773 /* Don't pass this arg via a register if it would be split between
774 registers and memory. */
775 if (type == NULL_TREE
776 && cum->nbytes + size > nregs * UNITS_PER_WORD)
779 switch (cum->nbytes / UNITS_PER_WORD)
782 result = gen_rtx_REG (mode, 0);
785 result = gen_rtx_REG (mode, 1);
794 /* Return the number of registers to use for an argument passed partially
795 in registers and partially in memory. */
798 function_arg_partial_nregs (cum, mode, type, named)
799 CUMULATIVE_ARGS *cum;
800 enum machine_mode mode;
802 int named ATTRIBUTE_UNUSED;
806 /* We only support using 2 data registers as argument registers. */
809 /* Figure out the size of the object to be passed. */
811 size = int_size_in_bytes (type);
813 size = GET_MODE_SIZE (mode);
815 /* Figure out the alignment of the object to be passed. */
818 cum->nbytes = (cum->nbytes + 3) & ~3;
820 /* Don't pass this arg via a register if all the argument registers
822 if (cum->nbytes > nregs * UNITS_PER_WORD)
825 if (cum->nbytes + size <= nregs * UNITS_PER_WORD)
828 /* Don't pass this arg via a register if it would be split between
829 registers and memory. */
830 if (type == NULL_TREE
831 && cum->nbytes + size > nregs * UNITS_PER_WORD)
834 return (nregs * UNITS_PER_WORD - cum->nbytes) / UNITS_PER_WORD;
837 /* Output a tst insn. */
839 output_tst (operand, insn)
845 /* We can save a byte if we can find a register which has the value
847 temp = PREV_INSN (insn);
848 while (optimize && temp)
852 /* We allow the search to go through call insns. We record
853 the fact that we've past a CALL_INSN and reject matches which
854 use call clobbered registers. */
855 if (GET_CODE (temp) == CODE_LABEL
856 || GET_CODE (temp) == JUMP_INSN
857 || GET_CODE (temp) == BARRIER)
860 if (GET_CODE (temp) == CALL_INSN)
863 if (GET_CODE (temp) == NOTE)
865 temp = PREV_INSN (temp);
869 /* It must be an insn, see if it is a simple set. */
870 set = single_set (temp);
873 temp = PREV_INSN (temp);
877 /* Are we setting a data register to zero (this does not win for
880 If it's a call clobbered register, have we past a call?
882 Make sure the register we find isn't the same as ourself;
883 the mn10300 can't encode that.
885 ??? reg_set_between_p return nonzero anytime we pass a CALL_INSN
886 so the code to detect calls here isn't doing anything useful. */
887 if (REG_P (SET_DEST (set))
888 && SET_SRC (set) == CONST0_RTX (GET_MODE (SET_DEST (set)))
889 && !reg_set_between_p (SET_DEST (set), temp, insn)
890 && (REGNO_REG_CLASS (REGNO (SET_DEST (set)))
891 == REGNO_REG_CLASS (REGNO (operand)))
892 && REGNO_REG_CLASS (REGNO (SET_DEST (set))) != EXTENDED_REGS
893 && REGNO (SET_DEST (set)) != REGNO (operand)
895 || !call_used_regs[REGNO (SET_DEST (set))]))
898 xoperands[0] = operand;
899 xoperands[1] = SET_DEST (set);
901 output_asm_insn ("cmp %1,%0", xoperands);
905 if (REGNO_REG_CLASS (REGNO (operand)) == EXTENDED_REGS
906 && REG_P (SET_DEST (set))
907 && SET_SRC (set) == CONST0_RTX (GET_MODE (SET_DEST (set)))
908 && !reg_set_between_p (SET_DEST (set), temp, insn)
909 && (REGNO_REG_CLASS (REGNO (SET_DEST (set)))
910 != REGNO_REG_CLASS (REGNO (operand)))
911 && REGNO_REG_CLASS (REGNO (SET_DEST (set))) == EXTENDED_REGS
912 && REGNO (SET_DEST (set)) != REGNO (operand)
914 || !call_used_regs[REGNO (SET_DEST (set))]))
917 xoperands[0] = operand;
918 xoperands[1] = SET_DEST (set);
920 output_asm_insn ("cmp %1,%0", xoperands);
923 temp = PREV_INSN (temp);
929 impossible_plus_operand (op, mode)
931 enum machine_mode mode ATTRIBUTE_UNUSED;
933 if (GET_CODE (op) != PLUS)
936 if (XEXP (op, 0) == stack_pointer_rtx
937 || XEXP (op, 1) == stack_pointer_rtx)
943 /* Return 1 if X is a CONST_INT that is only 8 bits wide. This is used
944 for the btst insn which may examine memory or a register (the memory
945 variant only allows an unsigned 8 bit integer). */
947 const_8bit_operand (op, mode)
949 enum machine_mode mode ATTRIBUTE_UNUSED;
951 return (GET_CODE (op) == CONST_INT
953 && INTVAL (op) < 256);
956 /* Similarly, but when using a zero_extract pattern for a btst where
957 the source operand might end up in memory. */
959 mask_ok_for_mem_btst (len, bit)
972 /* MASK must bit into an 8bit value. */
973 return (((mask & 0xff) == mask)
974 || ((mask & 0xff00) == mask)
975 || ((mask & 0xff0000) == mask)
976 || ((mask & 0xff000000) == mask));
979 /* Return 1 if X contains a symbolic expression. We know these
980 expressions will have one of a few well defined forms, so
981 we need only check those forms. */
983 symbolic_operand (op, mode)
985 enum machine_mode mode ATTRIBUTE_UNUSED;
987 switch (GET_CODE (op))
994 return ((GET_CODE (XEXP (op, 0)) == SYMBOL_REF
995 || GET_CODE (XEXP (op, 0)) == LABEL_REF)
996 && GET_CODE (XEXP (op, 1)) == CONST_INT);
1002 /* Try machine dependent ways of modifying an illegitimate address
1003 to be legitimate. If we find one, return the new valid address.
1004 This macro is used in only one place: `memory_address' in explow.c.
1006 OLDX is the address as it was before break_out_memory_refs was called.
1007 In some cases it is useful to look at this to decide what needs to be done.
1009 MODE and WIN are passed so that this macro can use
1010 GO_IF_LEGITIMATE_ADDRESS.
1012 Normally it is always safe for this macro to do nothing. It exists to
1013 recognize opportunities to optimize the output.
1015 But on a few ports with segmented architectures and indexed addressing
1016 (mn10300, hppa) it is used to rewrite certain problematical addresses. */
1018 legitimize_address (x, oldx, mode)
1020 rtx oldx ATTRIBUTE_UNUSED;
1021 enum machine_mode mode ATTRIBUTE_UNUSED;
1023 /* Uh-oh. We might have an address for x[n-100000]. This needs
1024 special handling to avoid creating an indexed memory address
1025 with x-100000 as the base. */
1026 if (GET_CODE (x) == PLUS
1027 && symbolic_operand (XEXP (x, 1), VOIDmode))
1029 /* Ugly. We modify things here so that the address offset specified
1030 by the index expression is computed first, then added to x to form
1031 the entire address. */
1033 rtx regx1, regy1, regy2, y;
1035 /* Strip off any CONST. */
1037 if (GET_CODE (y) == CONST)
1040 if (GET_CODE (y) == PLUS || GET_CODE (y) == MINUS)
1042 regx1 = force_reg (Pmode, force_operand (XEXP (x, 0), 0));
1043 regy1 = force_reg (Pmode, force_operand (XEXP (y, 0), 0));
1044 regy2 = force_reg (Pmode, force_operand (XEXP (y, 1), 0));
1045 regx1 = force_reg (Pmode,
1046 gen_rtx (GET_CODE (y), Pmode, regx1, regy2));
1047 return force_reg (Pmode, gen_rtx_PLUS (Pmode, regx1, regy1));
1054 mn10300_address_cost (x, unsig)
1062 switch (GET_CODE (x))
1065 switch (REGNO_REG_CLASS (REGNO (x)))
1088 return (mn10300_address_cost (XEXP (x, 0), unsig)
1089 + mn10300_address_cost (XEXP (x, 1), unsig));
1094 return ADDRESS_COST (XEXP (x, 0));
1098 return mn10300_address_cost (XEXP (x, 0), unsig);
1101 if (INTVAL (x) == 0)
1103 if (INTVAL (x) + (*unsig ? 0 : 0x80) < 0x100)
1105 if (INTVAL (x) + (*unsig ? 0 : 0x8000) < 0x10000)
1107 if (INTVAL (x) + (*unsig ? 0 : 0x800000) < 0x1000000)
1116 switch (GET_CODE (XEXP (x, 0)))
1119 return ADDRESS_COST (XEXP (x, 0));