1 /* Simulator model support for sh5_media.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright (C) 2000-2010 Red Hat, Inc.
7 This file is part of the Red Hat simulators.
12 #ifndef SH5_MEDIA_MODEL_H
13 #define SH5_MEDIA_MODEL_H
16 #include "cgen-model.h"
22 class sh5_media_sh5_model : public cgen_model
25 sh5_media_sh5_model (sh5_cpu *cpu);
27 // Call the proper unit modelling function for the given insn.
28 UINT model_before (sh5_cpu *current_cpu, sh5_media_scache* sem)
30 return (this->*(timing[sem->idesc->sem_index].model_before)) (current_cpu, sem);
32 UINT model_after (sh5_cpu *current_cpu, sh5_media_scache* sem)
34 return (this->*(timing[sem->idesc->sem_index].model_after)) (current_cpu, sem);
37 // Function unit handlers
38 // To be overridden as needed.
39 virtual UINT model_u_ftrv_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*fvn*/)
43 virtual UINT model_u_ftrv_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*fvn*/)
45 return timing[idesc->sem_index].units[unit_num].done;
47 virtual UINT model_u_fipr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*fvm*/, INT /*fvn*/)
51 virtual UINT model_u_fipr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*fvm*/, INT /*fvn*/)
53 return timing[idesc->sem_index].units[unit_num].done;
55 virtual UINT model_u_ocb_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
59 virtual UINT model_u_ocb_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
61 return timing[idesc->sem_index].units[unit_num].done;
63 virtual UINT model_u_mulr_gr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
67 virtual UINT model_u_mulr_gr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
69 return timing[idesc->sem_index].units[unit_num].done;
71 virtual UINT model_u_mulr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
75 virtual UINT model_u_mulr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
77 return timing[idesc->sem_index].units[unit_num].done;
79 virtual UINT model_u_use_dr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*usereg*/)
83 virtual UINT model_u_use_dr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*usereg*/)
85 return timing[idesc->sem_index].units[unit_num].done;
87 virtual UINT model_u_load_dr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
91 virtual UINT model_u_load_dr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
93 return timing[idesc->sem_index].units[unit_num].done;
95 virtual UINT model_u_set_dr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
99 virtual UINT model_u_set_dr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
101 return timing[idesc->sem_index].units[unit_num].done;
103 virtual UINT model_u_fcnv_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
107 virtual UINT model_u_fcnv_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
109 return timing[idesc->sem_index].units[unit_num].done;
111 virtual UINT model_u_fcmp_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
115 virtual UINT model_u_fcmp_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
117 return timing[idesc->sem_index].units[unit_num].done;
119 virtual UINT model_u_fsqrt_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
123 virtual UINT model_u_fsqrt_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
125 return timing[idesc->sem_index].units[unit_num].done;
127 virtual UINT model_u_fdiv_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
131 virtual UINT model_u_fdiv_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
133 return timing[idesc->sem_index].units[unit_num].done;
135 virtual UINT model_u_fpu_load_gr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
139 virtual UINT model_u_fpu_load_gr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
141 return timing[idesc->sem_index].units[unit_num].done;
143 virtual UINT model_u_use_fpscr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
147 virtual UINT model_u_use_fpscr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
149 return timing[idesc->sem_index].units[unit_num].done;
151 virtual UINT model_u_ldsl_fpscr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
155 virtual UINT model_u_ldsl_fpscr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
157 return timing[idesc->sem_index].units[unit_num].done;
159 virtual UINT model_u_lds_fpscr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
163 virtual UINT model_u_lds_fpscr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
165 return timing[idesc->sem_index].units[unit_num].done;
167 virtual UINT model_u_use_fpul_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
171 virtual UINT model_u_use_fpul_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
173 return timing[idesc->sem_index].units[unit_num].done;
175 virtual UINT model_u_flds_fpul_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
179 virtual UINT model_u_flds_fpul_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
181 return timing[idesc->sem_index].units[unit_num].done;
183 virtual UINT model_u_load_fpul_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
187 virtual UINT model_u_load_fpul_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
189 return timing[idesc->sem_index].units[unit_num].done;
191 virtual UINT model_u_set_fpul_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
195 virtual UINT model_u_set_fpul_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
197 return timing[idesc->sem_index].units[unit_num].done;
199 virtual UINT model_u_fpu_memory_access_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
203 virtual UINT model_u_fpu_memory_access_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
205 return timing[idesc->sem_index].units[unit_num].done;
207 virtual UINT model_u_use_fr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*usereg*/)
211 virtual UINT model_u_use_fr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*usereg*/)
213 return timing[idesc->sem_index].units[unit_num].done;
215 virtual UINT model_u_set_fr_0_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
219 virtual UINT model_u_set_fr_0_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
221 return timing[idesc->sem_index].units[unit_num].done;
223 virtual UINT model_u_set_fr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
227 virtual UINT model_u_set_fr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
229 return timing[idesc->sem_index].units[unit_num].done;
231 virtual UINT model_u_load_fr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
235 virtual UINT model_u_load_fr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
237 return timing[idesc->sem_index].units[unit_num].done;
239 virtual UINT model_u_maybe_fpu_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
243 virtual UINT model_u_maybe_fpu_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
245 return timing[idesc->sem_index].units[unit_num].done;
247 virtual UINT model_u_fpu_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
251 virtual UINT model_u_fpu_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
253 return timing[idesc->sem_index].units[unit_num].done;
255 virtual UINT model_u_trap_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
259 virtual UINT model_u_trap_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
261 return timing[idesc->sem_index].units[unit_num].done;
263 virtual UINT model_u_write_back_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
267 virtual UINT model_u_write_back_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
269 return timing[idesc->sem_index].units[unit_num].done;
271 virtual UINT model_u_use_multiply_result_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
275 virtual UINT model_u_use_multiply_result_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
277 return timing[idesc->sem_index].units[unit_num].done;
279 virtual UINT model_u_shift_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
283 virtual UINT model_u_shift_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
285 return timing[idesc->sem_index].units[unit_num].done;
287 virtual UINT model_u_tas_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
291 virtual UINT model_u_tas_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
293 return timing[idesc->sem_index].units[unit_num].done;
295 virtual UINT model_u_mulsw_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
299 virtual UINT model_u_mulsw_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
301 return timing[idesc->sem_index].units[unit_num].done;
303 virtual UINT model_u_mull_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
307 virtual UINT model_u_mull_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
309 return timing[idesc->sem_index].units[unit_num].done;
311 virtual UINT model_u_dmul_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
315 virtual UINT model_u_dmul_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
317 return timing[idesc->sem_index].units[unit_num].done;
319 virtual UINT model_u_macl_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
323 virtual UINT model_u_macl_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
325 return timing[idesc->sem_index].units[unit_num].done;
327 virtual UINT model_u_macw_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
331 virtual UINT model_u_macw_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
333 return timing[idesc->sem_index].units[unit_num].done;
335 virtual UINT model_u_multiply_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
339 virtual UINT model_u_multiply_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
341 return timing[idesc->sem_index].units[unit_num].done;
343 virtual UINT model_u_set_mac_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
347 virtual UINT model_u_set_mac_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
349 return timing[idesc->sem_index].units[unit_num].done;
351 virtual UINT model_u_load_mac_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
355 virtual UINT model_u_load_mac_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
357 return timing[idesc->sem_index].units[unit_num].done;
359 virtual UINT model_u_load_vbr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
363 virtual UINT model_u_load_vbr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
365 return timing[idesc->sem_index].units[unit_num].done;
367 virtual UINT model_u_load_gbr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
371 virtual UINT model_u_load_gbr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
373 return timing[idesc->sem_index].units[unit_num].done;
375 virtual UINT model_u_use_gr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*usereg*/)
379 virtual UINT model_u_use_gr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*usereg*/)
381 return timing[idesc->sem_index].units[unit_num].done;
383 virtual UINT model_u_load_gr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
387 virtual UINT model_u_load_gr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
389 return timing[idesc->sem_index].units[unit_num].done;
391 virtual UINT model_u_stc_vbr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
395 virtual UINT model_u_stc_vbr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
397 return timing[idesc->sem_index].units[unit_num].done;
399 virtual UINT model_u_ldcl_vbr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
403 virtual UINT model_u_ldcl_vbr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
405 return timing[idesc->sem_index].units[unit_num].done;
407 virtual UINT model_u_ldcl_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
411 virtual UINT model_u_ldcl_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
413 return timing[idesc->sem_index].units[unit_num].done;
415 virtual UINT model_u_use_tbit_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
419 virtual UINT model_u_use_tbit_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
421 return timing[idesc->sem_index].units[unit_num].done;
423 virtual UINT model_u_ldc_gbr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
427 virtual UINT model_u_ldc_gbr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
429 return timing[idesc->sem_index].units[unit_num].done;
431 virtual UINT model_u_ldc_sr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
435 virtual UINT model_u_ldc_sr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
437 return timing[idesc->sem_index].units[unit_num].done;
439 virtual UINT model_u_set_sr_bit_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
443 virtual UINT model_u_set_sr_bit_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
445 return timing[idesc->sem_index].units[unit_num].done;
447 virtual UINT model_u_use_pr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
451 virtual UINT model_u_use_pr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
453 return timing[idesc->sem_index].units[unit_num].done;
455 virtual UINT model_u_load_pr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
459 virtual UINT model_u_load_pr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
461 return timing[idesc->sem_index].units[unit_num].done;
463 virtual UINT model_u_sts_pr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
467 virtual UINT model_u_sts_pr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
469 return timing[idesc->sem_index].units[unit_num].done;
471 virtual UINT model_u_lds_pr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
475 virtual UINT model_u_lds_pr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
477 return timing[idesc->sem_index].units[unit_num].done;
479 virtual UINT model_u_memory_access_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
483 virtual UINT model_u_memory_access_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
485 return timing[idesc->sem_index].units[unit_num].done;
487 virtual UINT model_u_logic_b_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
491 virtual UINT model_u_logic_b_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
493 return timing[idesc->sem_index].units[unit_num].done;
495 virtual UINT model_u_jsr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
499 virtual UINT model_u_jsr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
501 return timing[idesc->sem_index].units[unit_num].done;
503 virtual UINT model_u_jmp_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
507 virtual UINT model_u_jmp_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
509 return timing[idesc->sem_index].units[unit_num].done;
511 virtual UINT model_u_branch_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
515 virtual UINT model_u_branch_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
517 return timing[idesc->sem_index].units[unit_num].done;
519 virtual UINT model_u_sx_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
523 virtual UINT model_u_sx_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
525 return timing[idesc->sem_index].units[unit_num].done;
527 virtual UINT model_u_exec_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
531 virtual UINT model_u_exec_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
533 return timing[idesc->sem_index].units[unit_num].done;
537 // These methods call the appropriate unit modeller(s) for each insn.
538 UINT model_add_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
539 UINT model_add_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
540 UINT model_addl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
541 UINT model_addl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
542 UINT model_addi_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
543 UINT model_addi_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
544 UINT model_addil_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
545 UINT model_addil_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
546 UINT model_addzl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
547 UINT model_addzl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
548 UINT model_alloco_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
549 UINT model_alloco_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
550 UINT model_and_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
551 UINT model_and_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
552 UINT model_andc_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
553 UINT model_andc_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
554 UINT model_andi_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
555 UINT model_andi_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
556 UINT model_beq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
557 UINT model_beq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
558 UINT model_beqi_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
559 UINT model_beqi_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
560 UINT model_bge_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
561 UINT model_bge_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
562 UINT model_bgeu_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
563 UINT model_bgeu_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
564 UINT model_bgt_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
565 UINT model_bgt_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
566 UINT model_bgtu_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
567 UINT model_bgtu_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
568 UINT model_blink_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
569 UINT model_blink_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
570 UINT model_bne_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
571 UINT model_bne_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
572 UINT model_bnei_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
573 UINT model_bnei_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
574 UINT model_brk_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
575 UINT model_brk_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
576 UINT model_byterev_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
577 UINT model_byterev_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
578 UINT model_cmpeq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
579 UINT model_cmpeq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
580 UINT model_cmpgt_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
581 UINT model_cmpgt_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
582 UINT model_cmpgtu_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
583 UINT model_cmpgtu_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
584 UINT model_cmveq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
585 UINT model_cmveq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
586 UINT model_cmvne_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
587 UINT model_cmvne_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
588 UINT model_fabsd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
589 UINT model_fabsd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
590 UINT model_fabss_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
591 UINT model_fabss_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
592 UINT model_faddd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
593 UINT model_faddd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
594 UINT model_fadds_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
595 UINT model_fadds_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
596 UINT model_fcmpeqd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
597 UINT model_fcmpeqd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
598 UINT model_fcmpeqs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
599 UINT model_fcmpeqs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
600 UINT model_fcmpged_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
601 UINT model_fcmpged_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
602 UINT model_fcmpges_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
603 UINT model_fcmpges_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
604 UINT model_fcmpgtd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
605 UINT model_fcmpgtd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
606 UINT model_fcmpgts_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
607 UINT model_fcmpgts_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
608 UINT model_fcmpund_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
609 UINT model_fcmpund_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
610 UINT model_fcmpuns_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
611 UINT model_fcmpuns_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
612 UINT model_fcnvds_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
613 UINT model_fcnvds_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
614 UINT model_fcnvsd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
615 UINT model_fcnvsd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
616 UINT model_fdivd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
617 UINT model_fdivd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
618 UINT model_fdivs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
619 UINT model_fdivs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
620 UINT model_fgetscr_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
621 UINT model_fgetscr_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
622 UINT model_fiprs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
623 UINT model_fiprs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
624 UINT model_fldd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
625 UINT model_fldd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
626 UINT model_fldp_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
627 UINT model_fldp_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
628 UINT model_flds_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
629 UINT model_flds_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
630 UINT model_fldxd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
631 UINT model_fldxd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
632 UINT model_fldxp_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
633 UINT model_fldxp_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
634 UINT model_fldxs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
635 UINT model_fldxs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
636 UINT model_floatld_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
637 UINT model_floatld_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
638 UINT model_floatls_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
639 UINT model_floatls_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
640 UINT model_floatqd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
641 UINT model_floatqd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
642 UINT model_floatqs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
643 UINT model_floatqs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
644 UINT model_fmacs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
645 UINT model_fmacs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
646 UINT model_fmovd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
647 UINT model_fmovd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
648 UINT model_fmovdq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
649 UINT model_fmovdq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
650 UINT model_fmovls_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
651 UINT model_fmovls_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
652 UINT model_fmovqd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
653 UINT model_fmovqd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
654 UINT model_fmovs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
655 UINT model_fmovs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
656 UINT model_fmovsl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
657 UINT model_fmovsl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
658 UINT model_fmuld_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
659 UINT model_fmuld_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
660 UINT model_fmuls_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
661 UINT model_fmuls_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
662 UINT model_fnegd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
663 UINT model_fnegd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
664 UINT model_fnegs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
665 UINT model_fnegs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
666 UINT model_fputscr_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
667 UINT model_fputscr_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
668 UINT model_fsqrtd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
669 UINT model_fsqrtd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
670 UINT model_fsqrts_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
671 UINT model_fsqrts_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
672 UINT model_fstd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
673 UINT model_fstd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
674 UINT model_fstp_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
675 UINT model_fstp_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
676 UINT model_fsts_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
677 UINT model_fsts_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
678 UINT model_fstxd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
679 UINT model_fstxd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
680 UINT model_fstxp_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
681 UINT model_fstxp_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
682 UINT model_fstxs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
683 UINT model_fstxs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
684 UINT model_fsubd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
685 UINT model_fsubd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
686 UINT model_fsubs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
687 UINT model_fsubs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
688 UINT model_ftrcdl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
689 UINT model_ftrcdl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
690 UINT model_ftrcsl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
691 UINT model_ftrcsl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
692 UINT model_ftrcdq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
693 UINT model_ftrcdq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
694 UINT model_ftrcsq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
695 UINT model_ftrcsq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
696 UINT model_ftrvs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
697 UINT model_ftrvs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
698 UINT model_getcfg_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
699 UINT model_getcfg_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
700 UINT model_getcon_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
701 UINT model_getcon_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
702 UINT model_gettr_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
703 UINT model_gettr_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
704 UINT model_icbi_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
705 UINT model_icbi_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
706 UINT model_ldb_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
707 UINT model_ldb_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
708 UINT model_ldl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
709 UINT model_ldl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
710 UINT model_ldq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
711 UINT model_ldq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
712 UINT model_ldub_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
713 UINT model_ldub_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
714 UINT model_lduw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
715 UINT model_lduw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
716 UINT model_ldw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
717 UINT model_ldw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
718 UINT model_ldhil_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
719 UINT model_ldhil_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
720 UINT model_ldhiq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
721 UINT model_ldhiq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
722 UINT model_ldlol_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
723 UINT model_ldlol_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
724 UINT model_ldloq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
725 UINT model_ldloq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
726 UINT model_ldxb_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
727 UINT model_ldxb_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
728 UINT model_ldxl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
729 UINT model_ldxl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
730 UINT model_ldxq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
731 UINT model_ldxq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
732 UINT model_ldxub_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
733 UINT model_ldxub_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
734 UINT model_ldxuw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
735 UINT model_ldxuw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
736 UINT model_ldxw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
737 UINT model_ldxw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
738 UINT model_mabsl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
739 UINT model_mabsl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
740 UINT model_mabsw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
741 UINT model_mabsw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
742 UINT model_maddl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
743 UINT model_maddl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
744 UINT model_maddw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
745 UINT model_maddw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
746 UINT model_maddsl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
747 UINT model_maddsl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
748 UINT model_maddsub_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
749 UINT model_maddsub_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
750 UINT model_maddsw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
751 UINT model_maddsw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
752 UINT model_mcmpeqb_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
753 UINT model_mcmpeqb_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
754 UINT model_mcmpeql_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
755 UINT model_mcmpeql_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
756 UINT model_mcmpeqw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
757 UINT model_mcmpeqw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
758 UINT model_mcmpgtl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
759 UINT model_mcmpgtl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
760 UINT model_mcmpgtub_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
761 UINT model_mcmpgtub_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
762 UINT model_mcmpgtw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
763 UINT model_mcmpgtw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
764 UINT model_mcmv_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
765 UINT model_mcmv_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
766 UINT model_mcnvslw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
767 UINT model_mcnvslw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
768 UINT model_mcnvswb_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
769 UINT model_mcnvswb_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
770 UINT model_mcnvswub_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
771 UINT model_mcnvswub_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
772 UINT model_mextr1_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
773 UINT model_mextr1_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
774 UINT model_mextr2_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
775 UINT model_mextr2_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
776 UINT model_mextr3_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
777 UINT model_mextr3_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
778 UINT model_mextr4_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
779 UINT model_mextr4_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
780 UINT model_mextr5_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
781 UINT model_mextr5_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
782 UINT model_mextr6_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
783 UINT model_mextr6_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
784 UINT model_mextr7_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
785 UINT model_mextr7_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
786 UINT model_mmacfxwl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
787 UINT model_mmacfxwl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
788 UINT model_mmacnfx_wl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
789 UINT model_mmacnfx_wl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
790 UINT model_mmull_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
791 UINT model_mmull_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
792 UINT model_mmulw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
793 UINT model_mmulw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
794 UINT model_mmulfxl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
795 UINT model_mmulfxl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
796 UINT model_mmulfxw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
797 UINT model_mmulfxw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
798 UINT model_mmulfxrpw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
799 UINT model_mmulfxrpw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
800 UINT model_mmulhiwl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
801 UINT model_mmulhiwl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
802 UINT model_mmullowl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
803 UINT model_mmullowl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
804 UINT model_mmulsumwq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
805 UINT model_mmulsumwq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
806 UINT model_movi_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
807 UINT model_movi_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
808 UINT model_mpermw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
809 UINT model_mpermw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
810 UINT model_msadubq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
811 UINT model_msadubq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
812 UINT model_mshaldsl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
813 UINT model_mshaldsl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
814 UINT model_mshaldsw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
815 UINT model_mshaldsw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
816 UINT model_mshardl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
817 UINT model_mshardl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
818 UINT model_mshardw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
819 UINT model_mshardw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
820 UINT model_mshardsq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
821 UINT model_mshardsq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
822 UINT model_mshfhib_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
823 UINT model_mshfhib_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
824 UINT model_mshfhil_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
825 UINT model_mshfhil_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
826 UINT model_mshfhiw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
827 UINT model_mshfhiw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
828 UINT model_mshflob_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
829 UINT model_mshflob_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
830 UINT model_mshflol_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
831 UINT model_mshflol_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
832 UINT model_mshflow_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
833 UINT model_mshflow_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
834 UINT model_mshlldl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
835 UINT model_mshlldl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
836 UINT model_mshlldw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
837 UINT model_mshlldw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
838 UINT model_mshlrdl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
839 UINT model_mshlrdl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
840 UINT model_mshlrdw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
841 UINT model_mshlrdw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
842 UINT model_msubl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
843 UINT model_msubl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
844 UINT model_msubw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
845 UINT model_msubw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
846 UINT model_msubsl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
847 UINT model_msubsl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
848 UINT model_msubsub_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
849 UINT model_msubsub_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
850 UINT model_msubsw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
851 UINT model_msubsw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
852 UINT model_mulsl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
853 UINT model_mulsl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
854 UINT model_mulul_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
855 UINT model_mulul_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
856 UINT model_nop_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
857 UINT model_nop_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
858 UINT model_nsb_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
859 UINT model_nsb_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
860 UINT model_ocbi_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
861 UINT model_ocbi_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
862 UINT model_ocbp_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
863 UINT model_ocbp_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
864 UINT model_ocbwb_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
865 UINT model_ocbwb_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
866 UINT model_or_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
867 UINT model_or_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
868 UINT model_ori_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
869 UINT model_ori_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
870 UINT model_prefi_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
871 UINT model_prefi_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
872 UINT model_pta_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
873 UINT model_pta_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
874 UINT model_ptabs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
875 UINT model_ptabs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
876 UINT model_ptb_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
877 UINT model_ptb_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
878 UINT model_ptrel_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
879 UINT model_ptrel_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
880 UINT model_putcfg_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
881 UINT model_putcfg_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
882 UINT model_putcon_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
883 UINT model_putcon_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
884 UINT model_rte_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
885 UINT model_rte_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
886 UINT model_shard_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
887 UINT model_shard_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
888 UINT model_shardl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
889 UINT model_shardl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
890 UINT model_shari_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
891 UINT model_shari_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
892 UINT model_sharil_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
893 UINT model_sharil_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
894 UINT model_shlld_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
895 UINT model_shlld_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
896 UINT model_shlldl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
897 UINT model_shlldl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
898 UINT model_shlli_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
899 UINT model_shlli_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
900 UINT model_shllil_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
901 UINT model_shllil_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
902 UINT model_shlrd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
903 UINT model_shlrd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
904 UINT model_shlrdl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
905 UINT model_shlrdl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
906 UINT model_shlri_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
907 UINT model_shlri_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
908 UINT model_shlril_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
909 UINT model_shlril_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
910 UINT model_shori_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
911 UINT model_shori_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
912 UINT model_sleep_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
913 UINT model_sleep_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
914 UINT model_stb_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
915 UINT model_stb_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
916 UINT model_stl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
917 UINT model_stl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
918 UINT model_stq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
919 UINT model_stq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
920 UINT model_stw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
921 UINT model_stw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
922 UINT model_sthil_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
923 UINT model_sthil_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
924 UINT model_sthiq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
925 UINT model_sthiq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
926 UINT model_stlol_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
927 UINT model_stlol_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
928 UINT model_stloq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
929 UINT model_stloq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
930 UINT model_stxb_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
931 UINT model_stxb_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
932 UINT model_stxl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
933 UINT model_stxl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
934 UINT model_stxq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
935 UINT model_stxq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
936 UINT model_stxw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
937 UINT model_stxw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
938 UINT model_sub_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
939 UINT model_sub_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
940 UINT model_subl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
941 UINT model_subl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
942 UINT model_swapq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
943 UINT model_swapq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
944 UINT model_synci_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
945 UINT model_synci_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
946 UINT model_synco_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
947 UINT model_synco_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
948 UINT model_trapa_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
949 UINT model_trapa_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
950 UINT model_xor_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
951 UINT model_xor_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
952 UINT model_xori_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
953 UINT model_xori_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
955 /* Enum declaration for unit types. */
956 typedef enum unit_number {
957 UNIT_NONE, UNIT_U_FTRV, UNIT_U_FIPR, UNIT_U_OCB
958 , UNIT_U_MULR_GR, UNIT_U_MULR, UNIT_U_USE_DR, UNIT_U_LOAD_DR
959 , UNIT_U_SET_DR, UNIT_U_FCNV, UNIT_U_FCMP, UNIT_U_FSQRT
960 , UNIT_U_FDIV, UNIT_U_FPU_LOAD_GR, UNIT_U_USE_FPSCR, UNIT_U_LDSL_FPSCR
961 , UNIT_U_LDS_FPSCR, UNIT_U_USE_FPUL, UNIT_U_FLDS_FPUL, UNIT_U_LOAD_FPUL
962 , UNIT_U_SET_FPUL, UNIT_U_FPU_MEMORY_ACCESS, UNIT_U_USE_FR, UNIT_U_SET_FR_0
963 , UNIT_U_SET_FR, UNIT_U_LOAD_FR, UNIT_U_MAYBE_FPU, UNIT_U_FPU
964 , UNIT_U_TRAP, UNIT_U_WRITE_BACK, UNIT_U_USE_MULTIPLY_RESULT, UNIT_U_SHIFT
965 , UNIT_U_TAS, UNIT_U_MULSW, UNIT_U_MULL, UNIT_U_DMUL
966 , UNIT_U_MACL, UNIT_U_MACW, UNIT_U_MULTIPLY, UNIT_U_SET_MAC
967 , UNIT_U_LOAD_MAC, UNIT_U_LOAD_VBR, UNIT_U_LOAD_GBR, UNIT_U_USE_GR
968 , UNIT_U_LOAD_GR, UNIT_U_STC_VBR, UNIT_U_LDCL_VBR, UNIT_U_LDCL
969 , UNIT_U_USE_TBIT, UNIT_U_LDC_GBR, UNIT_U_LDC_SR, UNIT_U_SET_SR_BIT
970 , UNIT_U_USE_PR, UNIT_U_LOAD_PR, UNIT_U_STS_PR, UNIT_U_LDS_PR
971 , UNIT_U_MEMORY_ACCESS, UNIT_U_LOGIC_B, UNIT_U_JSR, UNIT_U_JMP
972 , UNIT_U_BRANCH, UNIT_U_SX, UNIT_U_EXEC, UNIT_MAX
981 static const int MAX_UNITS = 9;
983 typedef UINT (sh5_media_sh5_model::*model_function) (sh5_cpu* current_cpu, sh5_media_scache* sem);
986 // This is an integer that identifies this insn.
988 // Functions to handle insn-specific profiling.
989 model_function model_before;
990 model_function model_after;
991 // Array of function units used by this insn.
992 unit units[MAX_UNITS];
995 static const insn_timing timing[];
998 class sh5_media_sh5_media_model : public cgen_model
1001 sh5_media_sh5_media_model (sh5_cpu *cpu);
1003 // Call the proper unit modelling function for the given insn.
1004 UINT model_before (sh5_cpu *current_cpu, sh5_media_scache* sem)
1006 return (this->*(timing[sem->idesc->sem_index].model_before)) (current_cpu, sem);
1008 UINT model_after (sh5_cpu *current_cpu, sh5_media_scache* sem)
1010 return (this->*(timing[sem->idesc->sem_index].model_after)) (current_cpu, sem);
1013 // Function unit handlers
1014 // To be overridden as needed.
1015 virtual UINT model_u_putcfg_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1019 virtual UINT model_u_putcfg_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1021 return timing[idesc->sem_index].units[unit_num].done;
1023 virtual UINT model_u_getcfg_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1027 virtual UINT model_u_getcfg_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1029 return timing[idesc->sem_index].units[unit_num].done;
1031 virtual UINT model_u_pt_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*targetreg*/)
1035 virtual UINT model_u_pt_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*targetreg*/)
1037 return timing[idesc->sem_index].units[unit_num].done;
1039 virtual UINT model_u_ftrvs_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
1043 virtual UINT model_u_ftrvs_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
1045 return timing[idesc->sem_index].units[unit_num].done;
1047 virtual UINT model_u_fsqrtd_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
1051 virtual UINT model_u_fsqrtd_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
1053 return timing[idesc->sem_index].units[unit_num].done;
1055 virtual UINT model_u_fdivd_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
1059 virtual UINT model_u_fdivd_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
1061 return timing[idesc->sem_index].units[unit_num].done;
1063 virtual UINT model_u_cond_branch_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*targetreg*/)
1067 virtual UINT model_u_cond_branch_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*targetreg*/)
1069 return timing[idesc->sem_index].units[unit_num].done;
1071 virtual UINT model_u_blink_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*targetreg*/)
1075 virtual UINT model_u_blink_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*targetreg*/)
1077 return timing[idesc->sem_index].units[unit_num].done;
1079 virtual UINT model_u_use_tr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*usereg*/)
1083 virtual UINT model_u_use_tr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*usereg*/)
1085 return timing[idesc->sem_index].units[unit_num].done;
1087 virtual UINT model_u_use_mtrx_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*usereg*/)
1091 virtual UINT model_u_use_mtrx_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*usereg*/)
1093 return timing[idesc->sem_index].units[unit_num].done;
1095 virtual UINT model_u_use_fv_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*usereg*/)
1099 virtual UINT model_u_use_fv_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*usereg*/)
1101 return timing[idesc->sem_index].units[unit_num].done;
1103 virtual UINT model_u_use_fp_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*usereg*/)
1107 virtual UINT model_u_use_fp_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*usereg*/)
1109 return timing[idesc->sem_index].units[unit_num].done;
1111 virtual UINT model_u_load_mtrx_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
1115 virtual UINT model_u_load_mtrx_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
1117 return timing[idesc->sem_index].units[unit_num].done;
1119 virtual UINT model_u_load_fv_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
1123 virtual UINT model_u_load_fv_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
1125 return timing[idesc->sem_index].units[unit_num].done;
1127 virtual UINT model_u_load_fp_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
1131 virtual UINT model_u_load_fp_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
1133 return timing[idesc->sem_index].units[unit_num].done;
1135 virtual UINT model_u_set_mtrx_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
1139 virtual UINT model_u_set_mtrx_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
1141 return timing[idesc->sem_index].units[unit_num].done;
1143 virtual UINT model_u_set_fv_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
1147 virtual UINT model_u_set_fv_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
1149 return timing[idesc->sem_index].units[unit_num].done;
1151 virtual UINT model_u_set_fp_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
1155 virtual UINT model_u_set_fp_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
1157 return timing[idesc->sem_index].units[unit_num].done;
1159 virtual UINT model_u_set_gr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
1163 virtual UINT model_u_set_gr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
1165 return timing[idesc->sem_index].units[unit_num].done;
1167 virtual UINT model_u_ftrv_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*fvn*/)
1171 virtual UINT model_u_ftrv_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*fvn*/)
1173 return timing[idesc->sem_index].units[unit_num].done;
1175 virtual UINT model_u_fipr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*fvm*/, INT /*fvn*/)
1179 virtual UINT model_u_fipr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*fvm*/, INT /*fvn*/)
1181 return timing[idesc->sem_index].units[unit_num].done;
1183 virtual UINT model_u_ocb_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1187 virtual UINT model_u_ocb_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1189 return timing[idesc->sem_index].units[unit_num].done;
1191 virtual UINT model_u_mulr_gr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
1195 virtual UINT model_u_mulr_gr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
1197 return timing[idesc->sem_index].units[unit_num].done;
1199 virtual UINT model_u_mulr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1203 virtual UINT model_u_mulr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1205 return timing[idesc->sem_index].units[unit_num].done;
1207 virtual UINT model_u_use_dr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*usereg*/)
1211 virtual UINT model_u_use_dr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*usereg*/)
1213 return timing[idesc->sem_index].units[unit_num].done;
1215 virtual UINT model_u_load_dr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
1219 virtual UINT model_u_load_dr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
1221 return timing[idesc->sem_index].units[unit_num].done;
1223 virtual UINT model_u_set_dr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
1227 virtual UINT model_u_set_dr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
1229 return timing[idesc->sem_index].units[unit_num].done;
1231 virtual UINT model_u_fcnv_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1235 virtual UINT model_u_fcnv_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1237 return timing[idesc->sem_index].units[unit_num].done;
1239 virtual UINT model_u_fcmp_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1243 virtual UINT model_u_fcmp_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1245 return timing[idesc->sem_index].units[unit_num].done;
1247 virtual UINT model_u_fsqrt_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
1251 virtual UINT model_u_fsqrt_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
1253 return timing[idesc->sem_index].units[unit_num].done;
1255 virtual UINT model_u_fdiv_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
1259 virtual UINT model_u_fdiv_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
1261 return timing[idesc->sem_index].units[unit_num].done;
1263 virtual UINT model_u_fpu_load_gr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
1267 virtual UINT model_u_fpu_load_gr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
1269 return timing[idesc->sem_index].units[unit_num].done;
1271 virtual UINT model_u_use_fpscr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1275 virtual UINT model_u_use_fpscr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1277 return timing[idesc->sem_index].units[unit_num].done;
1279 virtual UINT model_u_ldsl_fpscr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1283 virtual UINT model_u_ldsl_fpscr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1285 return timing[idesc->sem_index].units[unit_num].done;
1287 virtual UINT model_u_lds_fpscr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1291 virtual UINT model_u_lds_fpscr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1293 return timing[idesc->sem_index].units[unit_num].done;
1295 virtual UINT model_u_use_fpul_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1299 virtual UINT model_u_use_fpul_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1301 return timing[idesc->sem_index].units[unit_num].done;
1303 virtual UINT model_u_flds_fpul_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1307 virtual UINT model_u_flds_fpul_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1309 return timing[idesc->sem_index].units[unit_num].done;
1311 virtual UINT model_u_load_fpul_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1315 virtual UINT model_u_load_fpul_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1317 return timing[idesc->sem_index].units[unit_num].done;
1319 virtual UINT model_u_set_fpul_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1323 virtual UINT model_u_set_fpul_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1325 return timing[idesc->sem_index].units[unit_num].done;
1327 virtual UINT model_u_fpu_memory_access_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1331 virtual UINT model_u_fpu_memory_access_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1333 return timing[idesc->sem_index].units[unit_num].done;
1335 virtual UINT model_u_use_fr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*usereg*/)
1339 virtual UINT model_u_use_fr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*usereg*/)
1341 return timing[idesc->sem_index].units[unit_num].done;
1343 virtual UINT model_u_set_fr_0_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
1347 virtual UINT model_u_set_fr_0_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
1349 return timing[idesc->sem_index].units[unit_num].done;
1351 virtual UINT model_u_set_fr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
1355 virtual UINT model_u_set_fr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
1357 return timing[idesc->sem_index].units[unit_num].done;
1359 virtual UINT model_u_load_fr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
1363 virtual UINT model_u_load_fr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
1365 return timing[idesc->sem_index].units[unit_num].done;
1367 virtual UINT model_u_maybe_fpu_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1371 virtual UINT model_u_maybe_fpu_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1373 return timing[idesc->sem_index].units[unit_num].done;
1375 virtual UINT model_u_fpu_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1379 virtual UINT model_u_fpu_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1381 return timing[idesc->sem_index].units[unit_num].done;
1383 virtual UINT model_u_trap_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1387 virtual UINT model_u_trap_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1389 return timing[idesc->sem_index].units[unit_num].done;
1391 virtual UINT model_u_write_back_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1395 virtual UINT model_u_write_back_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1397 return timing[idesc->sem_index].units[unit_num].done;
1399 virtual UINT model_u_use_multiply_result_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1403 virtual UINT model_u_use_multiply_result_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1405 return timing[idesc->sem_index].units[unit_num].done;
1407 virtual UINT model_u_shift_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1411 virtual UINT model_u_shift_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1413 return timing[idesc->sem_index].units[unit_num].done;
1415 virtual UINT model_u_tas_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1419 virtual UINT model_u_tas_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1421 return timing[idesc->sem_index].units[unit_num].done;
1423 virtual UINT model_u_mulsw_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1427 virtual UINT model_u_mulsw_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1429 return timing[idesc->sem_index].units[unit_num].done;
1431 virtual UINT model_u_mull_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1435 virtual UINT model_u_mull_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1437 return timing[idesc->sem_index].units[unit_num].done;
1439 virtual UINT model_u_dmul_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1443 virtual UINT model_u_dmul_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1445 return timing[idesc->sem_index].units[unit_num].done;
1447 virtual UINT model_u_macl_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1451 virtual UINT model_u_macl_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1453 return timing[idesc->sem_index].units[unit_num].done;
1455 virtual UINT model_u_macw_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1459 virtual UINT model_u_macw_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1461 return timing[idesc->sem_index].units[unit_num].done;
1463 virtual UINT model_u_multiply_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1467 virtual UINT model_u_multiply_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1469 return timing[idesc->sem_index].units[unit_num].done;
1471 virtual UINT model_u_set_mac_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1475 virtual UINT model_u_set_mac_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1477 return timing[idesc->sem_index].units[unit_num].done;
1479 virtual UINT model_u_load_mac_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1483 virtual UINT model_u_load_mac_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1485 return timing[idesc->sem_index].units[unit_num].done;
1487 virtual UINT model_u_load_vbr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1491 virtual UINT model_u_load_vbr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1493 return timing[idesc->sem_index].units[unit_num].done;
1495 virtual UINT model_u_load_gbr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1499 virtual UINT model_u_load_gbr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1501 return timing[idesc->sem_index].units[unit_num].done;
1503 virtual UINT model_u_use_gr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*usereg*/)
1507 virtual UINT model_u_use_gr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*usereg*/)
1509 return timing[idesc->sem_index].units[unit_num].done;
1511 virtual UINT model_u_load_gr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, INT /*loadreg*/)
1515 virtual UINT model_u_load_gr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/)
1517 return timing[idesc->sem_index].units[unit_num].done;
1519 virtual UINT model_u_stc_vbr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1523 virtual UINT model_u_stc_vbr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1525 return timing[idesc->sem_index].units[unit_num].done;
1527 virtual UINT model_u_ldcl_vbr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1531 virtual UINT model_u_ldcl_vbr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1533 return timing[idesc->sem_index].units[unit_num].done;
1535 virtual UINT model_u_ldcl_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1539 virtual UINT model_u_ldcl_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1541 return timing[idesc->sem_index].units[unit_num].done;
1543 virtual UINT model_u_use_tbit_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1547 virtual UINT model_u_use_tbit_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1549 return timing[idesc->sem_index].units[unit_num].done;
1551 virtual UINT model_u_ldc_gbr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1555 virtual UINT model_u_ldc_gbr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1557 return timing[idesc->sem_index].units[unit_num].done;
1559 virtual UINT model_u_ldc_sr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1563 virtual UINT model_u_ldc_sr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1565 return timing[idesc->sem_index].units[unit_num].done;
1567 virtual UINT model_u_set_sr_bit_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1571 virtual UINT model_u_set_sr_bit_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1573 return timing[idesc->sem_index].units[unit_num].done;
1575 virtual UINT model_u_use_pr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1579 virtual UINT model_u_use_pr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1581 return timing[idesc->sem_index].units[unit_num].done;
1583 virtual UINT model_u_load_pr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1587 virtual UINT model_u_load_pr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1589 return timing[idesc->sem_index].units[unit_num].done;
1591 virtual UINT model_u_sts_pr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1595 virtual UINT model_u_sts_pr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1597 return timing[idesc->sem_index].units[unit_num].done;
1599 virtual UINT model_u_lds_pr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1603 virtual UINT model_u_lds_pr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1605 return timing[idesc->sem_index].units[unit_num].done;
1607 virtual UINT model_u_memory_access_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1611 virtual UINT model_u_memory_access_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1613 return timing[idesc->sem_index].units[unit_num].done;
1615 virtual UINT model_u_logic_b_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1619 virtual UINT model_u_logic_b_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1621 return timing[idesc->sem_index].units[unit_num].done;
1623 virtual UINT model_u_jsr_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1627 virtual UINT model_u_jsr_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1629 return timing[idesc->sem_index].units[unit_num].done;
1631 virtual UINT model_u_jmp_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1635 virtual UINT model_u_jmp_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1637 return timing[idesc->sem_index].units[unit_num].done;
1639 virtual UINT model_u_branch_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1643 virtual UINT model_u_branch_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1645 return timing[idesc->sem_index].units[unit_num].done;
1647 virtual UINT model_u_sx_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1651 virtual UINT model_u_sx_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1653 return timing[idesc->sem_index].units[unit_num].done;
1655 virtual UINT model_u_exec_before (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num)
1659 virtual UINT model_u_exec_after (sh5_cpu *cpu, const struct sh5_media_idesc *idesc, int unit_num, unsigned long long referenced)
1661 return timing[idesc->sem_index].units[unit_num].done;
1665 // These methods call the appropriate unit modeller(s) for each insn.
1666 UINT model_add_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1667 UINT model_add_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1668 UINT model_addl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1669 UINT model_addl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1670 UINT model_addi_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1671 UINT model_addi_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1672 UINT model_addil_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1673 UINT model_addil_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1674 UINT model_addzl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1675 UINT model_addzl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1676 UINT model_alloco_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1677 UINT model_alloco_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1678 UINT model_and_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1679 UINT model_and_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1680 UINT model_andc_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1681 UINT model_andc_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1682 UINT model_andi_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1683 UINT model_andi_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1684 UINT model_beq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1685 UINT model_beq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1686 UINT model_beqi_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1687 UINT model_beqi_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1688 UINT model_bge_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1689 UINT model_bge_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1690 UINT model_bgeu_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1691 UINT model_bgeu_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1692 UINT model_bgt_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1693 UINT model_bgt_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1694 UINT model_bgtu_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1695 UINT model_bgtu_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1696 UINT model_blink_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1697 UINT model_blink_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1698 UINT model_bne_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1699 UINT model_bne_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1700 UINT model_bnei_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1701 UINT model_bnei_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1702 UINT model_brk_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1703 UINT model_brk_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1704 UINT model_byterev_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1705 UINT model_byterev_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1706 UINT model_cmpeq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1707 UINT model_cmpeq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1708 UINT model_cmpgt_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1709 UINT model_cmpgt_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1710 UINT model_cmpgtu_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1711 UINT model_cmpgtu_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1712 UINT model_cmveq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1713 UINT model_cmveq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1714 UINT model_cmvne_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1715 UINT model_cmvne_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1716 UINT model_fabsd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1717 UINT model_fabsd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1718 UINT model_fabss_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1719 UINT model_fabss_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1720 UINT model_faddd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1721 UINT model_faddd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1722 UINT model_fadds_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1723 UINT model_fadds_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1724 UINT model_fcmpeqd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1725 UINT model_fcmpeqd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1726 UINT model_fcmpeqs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1727 UINT model_fcmpeqs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1728 UINT model_fcmpged_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1729 UINT model_fcmpged_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1730 UINT model_fcmpges_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1731 UINT model_fcmpges_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1732 UINT model_fcmpgtd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1733 UINT model_fcmpgtd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1734 UINT model_fcmpgts_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1735 UINT model_fcmpgts_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1736 UINT model_fcmpund_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1737 UINT model_fcmpund_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1738 UINT model_fcmpuns_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1739 UINT model_fcmpuns_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1740 UINT model_fcnvds_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1741 UINT model_fcnvds_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1742 UINT model_fcnvsd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1743 UINT model_fcnvsd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1744 UINT model_fdivd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1745 UINT model_fdivd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1746 UINT model_fdivs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1747 UINT model_fdivs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1748 UINT model_fgetscr_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1749 UINT model_fgetscr_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1750 UINT model_fiprs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1751 UINT model_fiprs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1752 UINT model_fldd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1753 UINT model_fldd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1754 UINT model_fldp_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1755 UINT model_fldp_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1756 UINT model_flds_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1757 UINT model_flds_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1758 UINT model_fldxd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1759 UINT model_fldxd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1760 UINT model_fldxp_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1761 UINT model_fldxp_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1762 UINT model_fldxs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1763 UINT model_fldxs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1764 UINT model_floatld_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1765 UINT model_floatld_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1766 UINT model_floatls_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1767 UINT model_floatls_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1768 UINT model_floatqd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1769 UINT model_floatqd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1770 UINT model_floatqs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1771 UINT model_floatqs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1772 UINT model_fmacs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1773 UINT model_fmacs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1774 UINT model_fmovd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1775 UINT model_fmovd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1776 UINT model_fmovdq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1777 UINT model_fmovdq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1778 UINT model_fmovls_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1779 UINT model_fmovls_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1780 UINT model_fmovqd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1781 UINT model_fmovqd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1782 UINT model_fmovs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1783 UINT model_fmovs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1784 UINT model_fmovsl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1785 UINT model_fmovsl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1786 UINT model_fmuld_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1787 UINT model_fmuld_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1788 UINT model_fmuls_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1789 UINT model_fmuls_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1790 UINT model_fnegd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1791 UINT model_fnegd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1792 UINT model_fnegs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1793 UINT model_fnegs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1794 UINT model_fputscr_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1795 UINT model_fputscr_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1796 UINT model_fsqrtd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1797 UINT model_fsqrtd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1798 UINT model_fsqrts_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1799 UINT model_fsqrts_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1800 UINT model_fstd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1801 UINT model_fstd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1802 UINT model_fstp_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1803 UINT model_fstp_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1804 UINT model_fsts_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1805 UINT model_fsts_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1806 UINT model_fstxd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1807 UINT model_fstxd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1808 UINT model_fstxp_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1809 UINT model_fstxp_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1810 UINT model_fstxs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1811 UINT model_fstxs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1812 UINT model_fsubd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1813 UINT model_fsubd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1814 UINT model_fsubs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1815 UINT model_fsubs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1816 UINT model_ftrcdl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1817 UINT model_ftrcdl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1818 UINT model_ftrcsl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1819 UINT model_ftrcsl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1820 UINT model_ftrcdq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1821 UINT model_ftrcdq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1822 UINT model_ftrcsq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1823 UINT model_ftrcsq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1824 UINT model_ftrvs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1825 UINT model_ftrvs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1826 UINT model_getcfg_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1827 UINT model_getcfg_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1828 UINT model_getcon_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1829 UINT model_getcon_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1830 UINT model_gettr_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1831 UINT model_gettr_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1832 UINT model_icbi_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1833 UINT model_icbi_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1834 UINT model_ldb_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1835 UINT model_ldb_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1836 UINT model_ldl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1837 UINT model_ldl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1838 UINT model_ldq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1839 UINT model_ldq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1840 UINT model_ldub_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1841 UINT model_ldub_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1842 UINT model_lduw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1843 UINT model_lduw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1844 UINT model_ldw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1845 UINT model_ldw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1846 UINT model_ldhil_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1847 UINT model_ldhil_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1848 UINT model_ldhiq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1849 UINT model_ldhiq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1850 UINT model_ldlol_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1851 UINT model_ldlol_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1852 UINT model_ldloq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1853 UINT model_ldloq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1854 UINT model_ldxb_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1855 UINT model_ldxb_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1856 UINT model_ldxl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1857 UINT model_ldxl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1858 UINT model_ldxq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1859 UINT model_ldxq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1860 UINT model_ldxub_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1861 UINT model_ldxub_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1862 UINT model_ldxuw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1863 UINT model_ldxuw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1864 UINT model_ldxw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1865 UINT model_ldxw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1866 UINT model_mabsl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1867 UINT model_mabsl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1868 UINT model_mabsw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1869 UINT model_mabsw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1870 UINT model_maddl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1871 UINT model_maddl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1872 UINT model_maddw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1873 UINT model_maddw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1874 UINT model_maddsl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1875 UINT model_maddsl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1876 UINT model_maddsub_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1877 UINT model_maddsub_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1878 UINT model_maddsw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1879 UINT model_maddsw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1880 UINT model_mcmpeqb_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1881 UINT model_mcmpeqb_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1882 UINT model_mcmpeql_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1883 UINT model_mcmpeql_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1884 UINT model_mcmpeqw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1885 UINT model_mcmpeqw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1886 UINT model_mcmpgtl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1887 UINT model_mcmpgtl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1888 UINT model_mcmpgtub_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1889 UINT model_mcmpgtub_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1890 UINT model_mcmpgtw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1891 UINT model_mcmpgtw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1892 UINT model_mcmv_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1893 UINT model_mcmv_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1894 UINT model_mcnvslw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1895 UINT model_mcnvslw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1896 UINT model_mcnvswb_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1897 UINT model_mcnvswb_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1898 UINT model_mcnvswub_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1899 UINT model_mcnvswub_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1900 UINT model_mextr1_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1901 UINT model_mextr1_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1902 UINT model_mextr2_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1903 UINT model_mextr2_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1904 UINT model_mextr3_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1905 UINT model_mextr3_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1906 UINT model_mextr4_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1907 UINT model_mextr4_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1908 UINT model_mextr5_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1909 UINT model_mextr5_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1910 UINT model_mextr6_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1911 UINT model_mextr6_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1912 UINT model_mextr7_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1913 UINT model_mextr7_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1914 UINT model_mmacfxwl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1915 UINT model_mmacfxwl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1916 UINT model_mmacnfx_wl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1917 UINT model_mmacnfx_wl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1918 UINT model_mmull_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1919 UINT model_mmull_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1920 UINT model_mmulw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1921 UINT model_mmulw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1922 UINT model_mmulfxl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1923 UINT model_mmulfxl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1924 UINT model_mmulfxw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1925 UINT model_mmulfxw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1926 UINT model_mmulfxrpw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1927 UINT model_mmulfxrpw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1928 UINT model_mmulhiwl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1929 UINT model_mmulhiwl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1930 UINT model_mmullowl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1931 UINT model_mmullowl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1932 UINT model_mmulsumwq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1933 UINT model_mmulsumwq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1934 UINT model_movi_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1935 UINT model_movi_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1936 UINT model_mpermw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1937 UINT model_mpermw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1938 UINT model_msadubq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1939 UINT model_msadubq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1940 UINT model_mshaldsl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1941 UINT model_mshaldsl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1942 UINT model_mshaldsw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1943 UINT model_mshaldsw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1944 UINT model_mshardl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1945 UINT model_mshardl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1946 UINT model_mshardw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1947 UINT model_mshardw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1948 UINT model_mshardsq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1949 UINT model_mshardsq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1950 UINT model_mshfhib_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1951 UINT model_mshfhib_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1952 UINT model_mshfhil_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1953 UINT model_mshfhil_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1954 UINT model_mshfhiw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1955 UINT model_mshfhiw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1956 UINT model_mshflob_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1957 UINT model_mshflob_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1958 UINT model_mshflol_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1959 UINT model_mshflol_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1960 UINT model_mshflow_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1961 UINT model_mshflow_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1962 UINT model_mshlldl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1963 UINT model_mshlldl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1964 UINT model_mshlldw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1965 UINT model_mshlldw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1966 UINT model_mshlrdl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1967 UINT model_mshlrdl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1968 UINT model_mshlrdw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1969 UINT model_mshlrdw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1970 UINT model_msubl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1971 UINT model_msubl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1972 UINT model_msubw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1973 UINT model_msubw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1974 UINT model_msubsl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1975 UINT model_msubsl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1976 UINT model_msubsub_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1977 UINT model_msubsub_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1978 UINT model_msubsw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1979 UINT model_msubsw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1980 UINT model_mulsl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1981 UINT model_mulsl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1982 UINT model_mulul_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1983 UINT model_mulul_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1984 UINT model_nop_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1985 UINT model_nop_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1986 UINT model_nsb_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1987 UINT model_nsb_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1988 UINT model_ocbi_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1989 UINT model_ocbi_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1990 UINT model_ocbp_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1991 UINT model_ocbp_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1992 UINT model_ocbwb_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1993 UINT model_ocbwb_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1994 UINT model_or_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1995 UINT model_or_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1996 UINT model_ori_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1997 UINT model_ori_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
1998 UINT model_prefi_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
1999 UINT model_prefi_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2000 UINT model_pta_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2001 UINT model_pta_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2002 UINT model_ptabs_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2003 UINT model_ptabs_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2004 UINT model_ptb_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2005 UINT model_ptb_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2006 UINT model_ptrel_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2007 UINT model_ptrel_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2008 UINT model_putcfg_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2009 UINT model_putcfg_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2010 UINT model_putcon_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2011 UINT model_putcon_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2012 UINT model_rte_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2013 UINT model_rte_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2014 UINT model_shard_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2015 UINT model_shard_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2016 UINT model_shardl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2017 UINT model_shardl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2018 UINT model_shari_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2019 UINT model_shari_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2020 UINT model_sharil_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2021 UINT model_sharil_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2022 UINT model_shlld_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2023 UINT model_shlld_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2024 UINT model_shlldl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2025 UINT model_shlldl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2026 UINT model_shlli_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2027 UINT model_shlli_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2028 UINT model_shllil_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2029 UINT model_shllil_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2030 UINT model_shlrd_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2031 UINT model_shlrd_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2032 UINT model_shlrdl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2033 UINT model_shlrdl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2034 UINT model_shlri_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2035 UINT model_shlri_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2036 UINT model_shlril_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2037 UINT model_shlril_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2038 UINT model_shori_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2039 UINT model_shori_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2040 UINT model_sleep_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2041 UINT model_sleep_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2042 UINT model_stb_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2043 UINT model_stb_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2044 UINT model_stl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2045 UINT model_stl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2046 UINT model_stq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2047 UINT model_stq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2048 UINT model_stw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2049 UINT model_stw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2050 UINT model_sthil_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2051 UINT model_sthil_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2052 UINT model_sthiq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2053 UINT model_sthiq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2054 UINT model_stlol_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2055 UINT model_stlol_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2056 UINT model_stloq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2057 UINT model_stloq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2058 UINT model_stxb_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2059 UINT model_stxb_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2060 UINT model_stxl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2061 UINT model_stxl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2062 UINT model_stxq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2063 UINT model_stxq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2064 UINT model_stxw_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2065 UINT model_stxw_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2066 UINT model_sub_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2067 UINT model_sub_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2068 UINT model_subl_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2069 UINT model_subl_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2070 UINT model_swapq_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2071 UINT model_swapq_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2072 UINT model_synci_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2073 UINT model_synci_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2074 UINT model_synco_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2075 UINT model_synco_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2076 UINT model_trapa_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2077 UINT model_trapa_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2078 UINT model_xor_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2079 UINT model_xor_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2080 UINT model_xori_before (sh5_cpu *current_cpu, sh5_media_scache *sem);
2081 UINT model_xori_after (sh5_cpu *current_cpu, sh5_media_scache *sem);
2083 /* Enum declaration for unit types. */
2084 typedef enum unit_number {
2085 UNIT_NONE, UNIT_U_PUTCFG, UNIT_U_GETCFG, UNIT_U_PT
2086 , UNIT_U_FTRVS, UNIT_U_FSQRTD, UNIT_U_FDIVD, UNIT_U_COND_BRANCH
2087 , UNIT_U_BLINK, UNIT_U_USE_TR, UNIT_U_USE_MTRX, UNIT_U_USE_FV
2088 , UNIT_U_USE_FP, UNIT_U_LOAD_MTRX, UNIT_U_LOAD_FV, UNIT_U_LOAD_FP
2089 , UNIT_U_SET_MTRX, UNIT_U_SET_FV, UNIT_U_SET_FP, UNIT_U_SET_GR
2090 , UNIT_U_FTRV, UNIT_U_FIPR, UNIT_U_OCB, UNIT_U_MULR_GR
2091 , UNIT_U_MULR, UNIT_U_USE_DR, UNIT_U_LOAD_DR, UNIT_U_SET_DR
2092 , UNIT_U_FCNV, UNIT_U_FCMP, UNIT_U_FSQRT, UNIT_U_FDIV
2093 , UNIT_U_FPU_LOAD_GR, UNIT_U_USE_FPSCR, UNIT_U_LDSL_FPSCR, UNIT_U_LDS_FPSCR
2094 , UNIT_U_USE_FPUL, UNIT_U_FLDS_FPUL, UNIT_U_LOAD_FPUL, UNIT_U_SET_FPUL
2095 , UNIT_U_FPU_MEMORY_ACCESS, UNIT_U_USE_FR, UNIT_U_SET_FR_0, UNIT_U_SET_FR
2096 , UNIT_U_LOAD_FR, UNIT_U_MAYBE_FPU, UNIT_U_FPU, UNIT_U_TRAP
2097 , UNIT_U_WRITE_BACK, UNIT_U_USE_MULTIPLY_RESULT, UNIT_U_SHIFT, UNIT_U_TAS
2098 , UNIT_U_MULSW, UNIT_U_MULL, UNIT_U_DMUL, UNIT_U_MACL
2099 , UNIT_U_MACW, UNIT_U_MULTIPLY, UNIT_U_SET_MAC, UNIT_U_LOAD_MAC
2100 , UNIT_U_LOAD_VBR, UNIT_U_LOAD_GBR, UNIT_U_USE_GR, UNIT_U_LOAD_GR
2101 , UNIT_U_STC_VBR, UNIT_U_LDCL_VBR, UNIT_U_LDCL, UNIT_U_USE_TBIT
2102 , UNIT_U_LDC_GBR, UNIT_U_LDC_SR, UNIT_U_SET_SR_BIT, UNIT_U_USE_PR
2103 , UNIT_U_LOAD_PR, UNIT_U_STS_PR, UNIT_U_LDS_PR, UNIT_U_MEMORY_ACCESS
2104 , UNIT_U_LOGIC_B, UNIT_U_JSR, UNIT_U_JMP, UNIT_U_BRANCH
2105 , UNIT_U_SX, UNIT_U_EXEC, UNIT_MAX
2114 static const int MAX_UNITS = 9;
2116 typedef UINT (sh5_media_sh5_media_model::*model_function) (sh5_cpu* current_cpu, sh5_media_scache* sem);
2118 struct insn_timing {
2119 // This is an integer that identifies this insn.
2121 // Functions to handle insn-specific profiling.
2122 model_function model_before;
2123 model_function model_after;
2124 // Array of function units used by this insn.
2125 unit units[MAX_UNITS];
2128 static const insn_timing timing[];
2133 #endif // SH5_MEDIA_MODEL_H