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Fix miscompilation of MIPS cross assembler on sparc host.
authorwilson <wilson@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 2 Sep 1998 14:49:17 +0000 (14:49 +0000)
committerwilson <wilson@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 2 Sep 1998 14:49:17 +0000 (14:49 +0000)
* jump.c (jump_optimize): In if/then/else transformations, add
another call to modified_between_p for the jump insn.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@22187 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/jump.c

index 81d164c..415830a 100644 (file)
@@ -1,3 +1,8 @@
+Wed Sep  2 14:47:36 1998  Jim Wilson  <wilson@cygnus.com>
+
+       * jump.c (jump_optimize): In if/then/else transformations, add
+       another call to modified_between_p for the jump insn.
+
 Wed Sep  2 14:16:49 1998  Jeffrey A Law  (law@cygnus.com)
 
        * fix-header.c (symlink): Treat like readlink.
index befd707..77c3556 100644 (file)
@@ -855,7 +855,11 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan)
                  && ! reg_referenced_between_p (temp1, p, NEXT_INSN (temp3))
                  && ! reg_set_between_p (temp1, p, temp3)
                  && (GET_CODE (SET_SRC (temp4)) == CONST_INT
-                     || ! modified_between_p (SET_SRC (temp4), p, temp2)))
+                     || ! modified_between_p (SET_SRC (temp4), p, temp2))
+                 /* Verify that registers used by the jump are not clobbered
+                    by the instruction being moved.  */
+                 && ! modified_between_p (PATTERN (temp), temp2,
+                                          NEXT_INSN (temp2)))
                {
                  emit_insn_after_with_line_notes (PATTERN (temp2), p, temp2);
                  delete_insn (temp2);
@@ -953,6 +957,10 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan)
                                                 NEXT_INSN (temp2))
                  && ! reg_set_between_p (temp1, insert_after, temp)
                  && ! modified_between_p (SET_SRC (temp4), insert_after, temp)
+                 /* Verify that registers used by the jump are not clobbered
+                    by the instruction being moved.  */
+                 && ! modified_between_p (PATTERN (temp), temp3,
+                                          NEXT_INSN (temp3))
                  && invert_jump (temp, JUMP_LABEL (insn)))
                {
                  emit_insn_after_with_line_notes (PATTERN (temp3),