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* config/mips/mips.md (mov_lwl): Use memory_operand where appropriate.
authorrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 30 Oct 2003 18:11:27 +0000 (18:11 +0000)
committerrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 30 Oct 2003 18:11:27 +0000 (18:11 +0000)
(mov_lwr, mov_swl, mov_swr): Likewise.
(mov_ldl, mov_ldr, mov_sdl, mov_sdr): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@73095 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog patch | blob | history
gcc/config/mips/mips.md patch | blob | history

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 99f3442..8a8dfd0 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,11 @@
 2003-10-30  Richard Sandiford  <rsandifo@redhat.com>
 
 2003-10-30  Richard Sandiford  <rsandifo@redhat.com>
 
+       * config/mips/mips.md (mov_lwl): Use memory_operand where appropriate.
+       (mov_lwr, mov_swl, mov_swr): Likewise.
+       (mov_ldl, mov_ldr, mov_sdl, mov_sdr): Likewise.
+
+2003-10-30  Richard Sandiford  <rsandifo@redhat.com>
+
        * config/mips/mips.c (mips_global_pointer): Don't try to use $25.
 
 2003-10-30  Richard Henderson  <rth@redhat.com>
        * config/mips/mips.c (mips_global_pointer): Don't try to use $25.
 
 2003-10-30  Richard Henderson  <rth@redhat.com>
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index def0088..7a082b4 100644 (file)
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -4061,8 +4061,8 @@ dsrl\t%3,%3,1\n\
 
 (define_insn "mov_lwl"
   [(set (match_operand:SI 0 "register_operand" "=d")
 
 (define_insn "mov_lwl"
   [(set (match_operand:SI 0 "register_operand" "=d")
-       (unspec:SI [(match_operand:BLK 1 "general_operand" "m")
-                   (match_operand:QI 2 "general_operand" "m")]
+       (unspec:SI [(match_operand:BLK 1 "memory_operand" "m")
+                   (match_operand:QI 2 "memory_operand" "m")]
                   UNSPEC_LWL))]
   "!TARGET_MIPS16"
   "lwl\t%0,%2"
                   UNSPEC_LWL))]
   "!TARGET_MIPS16"
   "lwl\t%0,%2"
@@ -4072,8 +4072,8 @@ dsrl\t%3,%3,1\n\
 
 (define_insn "mov_lwr"
   [(set (match_operand:SI 0 "register_operand" "=d")
 
 (define_insn "mov_lwr"
   [(set (match_operand:SI 0 "register_operand" "=d")
-       (unspec:SI [(match_operand:BLK 1 "general_operand" "m")
-                   (match_operand:QI 2 "general_operand" "m")
+       (unspec:SI [(match_operand:BLK 1 "memory_operand" "m")
+                   (match_operand:QI 2 "memory_operand" "m")
                    (match_operand:SI 3 "register_operand" "0")]
                   UNSPEC_LWR))]
   "!TARGET_MIPS16"
                    (match_operand:SI 3 "register_operand" "0")]
                   UNSPEC_LWR))]
   "!TARGET_MIPS16"
@@ -4085,7 +4085,7 @@ dsrl\t%3,%3,1\n\
 (define_insn "mov_swl"
   [(set (match_operand:BLK 0 "memory_operand" "=m")
        (unspec:BLK [(match_operand:SI 1 "reg_or_0_operand" "dJ")
 (define_insn "mov_swl"
   [(set (match_operand:BLK 0 "memory_operand" "=m")
        (unspec:BLK [(match_operand:SI 1 "reg_or_0_operand" "dJ")
-                    (match_operand:QI 2 "general_operand" "m")]
+                    (match_operand:QI 2 "memory_operand" "m")]
                    UNSPEC_SWL))]
   "!TARGET_MIPS16"
   "swl\t%z1,%2"
                    UNSPEC_SWL))]
   "!TARGET_MIPS16"
   "swl\t%z1,%2"
@@ -4095,7 +4095,7 @@ dsrl\t%3,%3,1\n\
 (define_insn "mov_swr"
   [(set (match_operand:BLK 0 "memory_operand" "+m")
        (unspec:BLK [(match_operand:SI 1 "reg_or_0_operand" "dJ")
 (define_insn "mov_swr"
   [(set (match_operand:BLK 0 "memory_operand" "+m")
        (unspec:BLK [(match_operand:SI 1 "reg_or_0_operand" "dJ")
-                    (match_operand:QI 2 "general_operand" "m")
+                    (match_operand:QI 2 "memory_operand" "m")
                     (match_dup 0)]
                    UNSPEC_SWR))]
   "!TARGET_MIPS16"
                     (match_dup 0)]
                    UNSPEC_SWR))]
   "!TARGET_MIPS16"
@@ -4106,8 +4106,8 @@ dsrl\t%3,%3,1\n\
 
 (define_insn "mov_ldl"
   [(set (match_operand:DI 0 "register_operand" "=d")
 
 (define_insn "mov_ldl"
   [(set (match_operand:DI 0 "register_operand" "=d")
-       (unspec:DI [(match_operand:BLK 1 "general_operand" "m")
-                   (match_operand:QI 2 "general_operand" "m")]
+       (unspec:DI [(match_operand:BLK 1 "memory_operand" "m")
+                   (match_operand:QI 2 "memory_operand" "m")]
                   UNSPEC_LDL))]
   "TARGET_64BIT && !TARGET_MIPS16"
   "ldl\t%0,%2"
                   UNSPEC_LDL))]
   "TARGET_64BIT && !TARGET_MIPS16"
   "ldl\t%0,%2"
@@ -4116,8 +4116,8 @@ dsrl\t%3,%3,1\n\
 
 (define_insn "mov_ldr"
   [(set (match_operand:DI 0 "register_operand" "=d")
 
 (define_insn "mov_ldr"
   [(set (match_operand:DI 0 "register_operand" "=d")
-       (unspec:DI [(match_operand:BLK 1 "general_operand" "m")
-                   (match_operand:QI 2 "general_operand" "m")
+       (unspec:DI [(match_operand:BLK 1 "memory_operand" "m")
+                   (match_operand:QI 2 "memory_operand" "m")
                    (match_operand:DI 3 "register_operand" "0")]
                   UNSPEC_LDR))]
   "TARGET_64BIT && !TARGET_MIPS16"
                    (match_operand:DI 3 "register_operand" "0")]
                   UNSPEC_LDR))]
   "TARGET_64BIT && !TARGET_MIPS16"
@@ -4129,7 +4129,7 @@ dsrl\t%3,%3,1\n\
 (define_insn "mov_sdl"
   [(set (match_operand:BLK 0 "memory_operand" "=m")
        (unspec:BLK [(match_operand:DI 1 "reg_or_0_operand" "dJ")
 (define_insn "mov_sdl"
   [(set (match_operand:BLK 0 "memory_operand" "=m")
        (unspec:BLK [(match_operand:DI 1 "reg_or_0_operand" "dJ")
-                    (match_operand:QI 2 "general_operand" "m")]
+                    (match_operand:QI 2 "memory_operand" "m")]
                    UNSPEC_SDL))]
   "TARGET_64BIT && !TARGET_MIPS16"
   "sdl\t%z1,%2"
                    UNSPEC_SDL))]
   "TARGET_64BIT && !TARGET_MIPS16"
   "sdl\t%z1,%2"
@@ -4139,7 +4139,7 @@ dsrl\t%3,%3,1\n\
 (define_insn "mov_sdr"
   [(set (match_operand:BLK 0 "memory_operand" "+m")
        (unspec:BLK [(match_operand:DI 1 "reg_or_0_operand" "dJ")
 (define_insn "mov_sdr"
   [(set (match_operand:BLK 0 "memory_operand" "+m")
        (unspec:BLK [(match_operand:DI 1 "reg_or_0_operand" "dJ")
-                    (match_operand:QI 2 "general_operand" "m")
+                    (match_operand:QI 2 "memory_operand" "m")
                     (match_dup 0)]
                    UNSPEC_SDR))]
   "TARGET_64BIT && !TARGET_MIPS16"
                     (match_dup 0)]
                    UNSPEC_SDR))]
   "TARGET_64BIT && !TARGET_MIPS16"
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