(addsf3, subsf3, mulsf3, divsf3): Put POWERPC first, then POWER.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@5932 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index b454b18..e03fa3b 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -2103,16 +2103,16 @@
   [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
        (plus:SF (match_operand:SF 1 "gpc_reg_operand" "%f")
                 (match_operand:SF 2 "gpc_reg_operand" "f")))]
-  "TARGET_POWER"
-  "{fa|fadd} %0,%1,%2"
+  "TARGET_POWERPC"
+  "fadds %0,%1,%2"
   [(set_attr "type" "fp")])
 
 (define_insn ""
   [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
        (plus:SF (match_operand:SF 1 "gpc_reg_operand" "%f")
                 (match_operand:SF 2 "gpc_reg_operand" "f")))]
-  "TARGET_POWERPC"
-  "fadds %0,%1,%2"
+  "TARGET_POWER"
+  "{fa|fadd} %0,%1,%2"
   [(set_attr "type" "fp")])
 
 (define_expand "subsf3"
@@ -2126,16 +2126,16 @@
   [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
        (minus:SF (match_operand:SF 1 "gpc_reg_operand" "f")
                  (match_operand:SF 2 "gpc_reg_operand" "f")))]
-  "TARGET_POWER"
-  "{fs|fsub} %0,%1,%2"
+  "TARGET_POWERPC"
+  "fsubs %0,%1,%2"
   [(set_attr "type" "fp")])
 
 (define_insn ""
   [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
        (minus:SF (match_operand:SF 1 "gpc_reg_operand" "f")
                  (match_operand:SF 2 "gpc_reg_operand" "f")))]
-  "TARGET_POWERPC"
-  "fsubs %0,%1,%2"
+  "TARGET_POWER"
+  "{fs|fsub} %0,%1,%2"
   [(set_attr "type" "fp")])
 
 (define_expand "mulsf3"
@@ -2149,16 +2149,16 @@
   [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
        (mult:SF (match_operand:SF 1 "gpc_reg_operand" "%f")
                 (match_operand:SF 2 "gpc_reg_operand" "f")))]
-  "TARGET_POWER"
-  "{fm|fmul} %0,%1,%2"
+  "TARGET_POWERPC"
+  "fmuls %0,%1,%2"
   [(set_attr "type" "fp")])
 
 (define_insn ""
   [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
        (mult:SF (match_operand:SF 1 "gpc_reg_operand" "%f")
                 (match_operand:SF 2 "gpc_reg_operand" "f")))]
-  "TARGET_POWERPC"
-  "fmuls %0,%1,%2"
+  "TARGET_POWER"
+  "{fm|fmul} %0,%1,%2"
   [(set_attr "type" "fp")])
 
 (define_expand "divsf3"
@@ -2172,16 +2172,16 @@
   [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
        (div:SF (match_operand:SF 1 "gpc_reg_operand" "f")
                (match_operand:SF 2 "gpc_reg_operand" "f")))]
-  "TARGET_POWER"
-  "{fd|fdiv} %0,%1,%2"
+  "TARGET_POWERPC"
+  "fdivs %0,%1,%2"
   [(set_attr "type" "sdiv")])
 
 (define_insn ""
   [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
        (div:SF (match_operand:SF 1 "gpc_reg_operand" "f")
                (match_operand:SF 2 "gpc_reg_operand" "f")))]
-  "TARGET_POWERPC"
-  "fdivs %0,%1,%2"
+  "TARGET_POWER"
+  "{fd|fdiv} %0,%1,%2"
   [(set_attr "type" "sdiv")])
 
 (define_insn ""
@@ -2189,8 +2189,8 @@
        (plus:SF (mult:SF (match_operand:SF 1 "gpc_reg_operand" "%f")
                          (match_operand:SF 2 "gpc_reg_operand" "f"))
                 (match_operand:SF 3 "gpc_reg_operand" "f")))]
-  "TARGET_POWER"
-  "{fma|fmadd} %0,%1,%2,%3"
+  "TARGET_POWERPC"
+  "fmadds %0,%1,%2,%3"
   [(set_attr "type" "fp")])
 
 (define_insn ""
@@ -2198,8 +2198,8 @@
        (plus:SF (mult:SF (match_operand:SF 1 "gpc_reg_operand" "%f")
                          (match_operand:SF 2 "gpc_reg_operand" "f"))
                 (match_operand:SF 3 "gpc_reg_operand" "f")))]
-  "TARGET_POWERPC"
-  "fmadds %0,%1,%2,%3"
+  "TARGET_POWER"
+  "{fma|fmadd} %0,%1,%2,%3"
   [(set_attr "type" "fp")])
 
 (define_insn ""
@@ -2207,8 +2207,8 @@
        (minus:SF (mult:SF (match_operand:SF 1 "gpc_reg_operand" "%f")
                           (match_operand:SF 2 "gpc_reg_operand" "f"))
                  (match_operand:SF 3 "gpc_reg_operand" "f")))]
-  "TARGET_POWER"
-  "{fms|fmsub} %0,%1,%2,%3"
+  "TARGET_POWERPC"
+  "fmsubs %0,%1,%2,%3"
   [(set_attr "type" "fp")])
 
 (define_insn ""
@@ -2216,8 +2216,8 @@
        (minus:SF (mult:SF (match_operand:SF 1 "gpc_reg_operand" "%f")
                           (match_operand:SF 2 "gpc_reg_operand" "f"))
                  (match_operand:SF 3 "gpc_reg_operand" "f")))]
-  "TARGET_POWERPC"
-  "fmsubs %0,%1,%2,%3"
+  "TARGET_POWER"
+  "{fms|fmsub} %0,%1,%2,%3"
   [(set_attr "type" "fp")])
 
 (define_insn ""
@@ -2225,8 +2225,8 @@
        (neg:SF (plus:SF (mult:SF (match_operand:SF 1 "gpc_reg_operand" "%f")
                                  (match_operand:SF 2 "gpc_reg_operand" "f"))
                         (match_operand:SF 3 "gpc_reg_operand" "f"))))]
-  "TARGET_POWER"
-  "{fnma|fnmadd} %0,%1,%2,%3"
+  "TARGET_POWERPC"
+  "fnmadds %0,%1,%2,%3"
   [(set_attr "type" "fp")])
 
 (define_insn ""
@@ -2234,8 +2234,8 @@
        (neg:SF (plus:SF (mult:SF (match_operand:SF 1 "gpc_reg_operand" "%f")
                                  (match_operand:SF 2 "gpc_reg_operand" "f"))
                         (match_operand:SF 3 "gpc_reg_operand" "f"))))]
-  "TARGET_POWERPC"
-  "fnmadds %0,%1,%2,%3"
+  "TARGET_POWER"
+  "{fnma|fnmadd} %0,%1,%2,%3"
   [(set_attr "type" "fp")])
 
 (define_insn ""
@@ -2243,8 +2243,8 @@
        (neg:SF (minus:SF (mult:SF (match_operand:SF 1 "gpc_reg_operand" "%f")
                                   (match_operand:SF 2 "gpc_reg_operand" "f"))
                          (match_operand:SF 3 "gpc_reg_operand" "f"))))]
-  "TARGET_POWER"
-  "{fnms|fnmsub} %0,%1,%2,%3"
+  "TARGET_POWERPC"
+  "fnmsubs %0,%1,%2,%3"
   [(set_attr "type" "fp")])
 
 (define_insn ""
@@ -2252,8 +2252,8 @@
        (neg:SF (minus:SF (mult:SF (match_operand:SF 1 "gpc_reg_operand" "%f")
                                   (match_operand:SF 2 "gpc_reg_operand" "f"))
                          (match_operand:SF 3 "gpc_reg_operand" "f"))))]
-  "TARGET_POWERPC"
-  "fnmsubs %0,%1,%2,%3"
+  "TARGET_POWER"
+  "{fnms|fnmsub} %0,%1,%2,%3"
   [(set_attr "type" "fp")])
 
 (define_expand "sqrtsf2"