PR target/29852

	* config/i386/i386.md (*truncxfsf2_mixed, *truncxfdf2_mixed): Enable
	insn patterns for TARGET_80387.
	(*truncxfsf2_i387, *truncxfdf2_i387): Remove.
	(*truncxfsf2_i387_1): Rename to *truncxfsf2_i387.
	(*truncxfdf2_i387_1): Rename to *truncxfdf2_i387.
	(fmod<mode>3, remainder<mode>3): Enable expaders for SSE math.
	Generate truncxf<mode>2 insn patterns for strict SSE math.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@119356 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 19e340d..035324e 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,16 @@
 2006-11-30  Uros Bizjak  <ubizjak@gmail.com>
 
 2006-11-30  Uros Bizjak  <ubizjak@gmail.com>
 

+       PR target/29852
+       * config/i386/i386.md (*truncxfsf2_mixed, *truncxfdf2_mixed): Enable
+       insn patterns for TARGET_80387.
+       (*truncxfsf2_i387, *truncxfdf2_i387): Remove.
+       (*truncxfsf2_i387_1): Rename to *truncxfsf2_i387.
+       (*truncxfdf2_i387_1): Rename to *truncxfdf2_i387.
+       (fmod<mode>3, remainder<mode>3): Enable expaders for SSE math.
+       Generate truncxf<mode>2 insn patterns for strict SSE math.
+
+2006-11-30  Uros Bizjak  <ubizjak@gmail.com>
+

        * config/i386/i386.md (movsf_1): Enable pattern for standard
        80387 constants before reload when optimizing for size.
        (*movdf_nointeger, *movdf_integer): Ditto.
        * config/i386/i386.md (movsf_1): Enable pattern for standard
        80387 constants before reload when optimizing for size.
        (*movdf_nointeger, *movdf_integer): Ditto.

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 227a1cc..e6a3d7b 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -3947,7 +3947,7 @@
        (float_truncate:SF
         (match_operand:XF 1 "register_operand" "f,f,f,f")))
    (clobber (match_operand:SF 2 "memory_operand" "=X,m,m,m"))]
        (float_truncate:SF
         (match_operand:XF 1 "register_operand" "f,f,f,f")))
    (clobber (match_operand:SF 2 "memory_operand" "=X,m,m,m"))]

-  "TARGET_MIX_SSE_I387"
+  "TARGET_80387"

 {
   gcc_assert (!which_alternative);
   if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
 {
   gcc_assert (!which_alternative);
   if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))


@@ -3968,23 +3968,6 @@
    (set_attr "mode" "SF")])
 
 (define_insn "*truncxfsf2_i387"
    (set_attr "mode" "SF")])
 
 (define_insn "*truncxfsf2_i387"

-  [(set (match_operand:SF 0 "nonimmediate_operand" "=m,?f,?r")
-       (float_truncate:SF
-        (match_operand:XF 1 "register_operand" "f,f,f")))
-   (clobber (match_operand:SF 2 "memory_operand" "=X,m,m"))]
-  "TARGET_80387"
-{
-  gcc_assert (!which_alternative);
-  if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
-    return "fstp%z0\t%y0";
-   else
-     return "fst%z0\t%y0";
-}
-  [(set_attr "type" "fmov,multi,multi")
-   (set_attr "unit" "*,i387,i387")
-   (set_attr "mode" "SF")])
-
-(define_insn "*truncxfsf2_i387_1"

   [(set (match_operand:SF 0 "memory_operand" "=m")
        (float_truncate:SF
         (match_operand:XF 1 "register_operand" "f")))]
   [(set (match_operand:SF 0 "memory_operand" "=m")
        (float_truncate:SF
         (match_operand:XF 1 "register_operand" "f")))]


@@ -4043,7 +4026,7 @@
        (float_truncate:DF
         (match_operand:XF 1 "register_operand" "f,f,f,f")))
    (clobber (match_operand:DF 2 "memory_operand" "=X,m,m,m"))]
        (float_truncate:DF
         (match_operand:XF 1 "register_operand" "f,f,f,f")))
    (clobber (match_operand:DF 2 "memory_operand" "=X,m,m,m"))]

-  "TARGET_SSE2 && TARGET_MIX_SSE_I387"
+  "TARGET_80387"

 {
   gcc_assert (!which_alternative);
   if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
 {
   gcc_assert (!which_alternative);
   if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))


@@ -4064,23 +4047,6 @@
    (set_attr "mode" "DF")])
 
 (define_insn "*truncxfdf2_i387"
    (set_attr "mode" "DF")])
 
 (define_insn "*truncxfdf2_i387"

-  [(set (match_operand:DF 0 "nonimmediate_operand" "=m,?f,?r")
-       (float_truncate:DF
-        (match_operand:XF 1 "register_operand" "f,f,f")))
-   (clobber (match_operand:DF 2 "memory_operand" "=X,m,m"))]
-  "TARGET_80387"
-{
-  gcc_assert (!which_alternative);
-  if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
-    return "fstp%z0\t%y0";
-  else
-    return "fst%z0\t%y0";
-}
-  [(set_attr "type" "fmov,multi,multi")
-   (set_attr "unit" "*,i387,i387")
-   (set_attr "mode" "DF")])
-
-(define_insn "*truncxfdf2_i387_1"

   [(set (match_operand:DF 0 "memory_operand" "=m")
        (float_truncate:DF
          (match_operand:XF 1 "register_operand" "f")))]
   [(set (match_operand:DF 0 "memory_operand" "=m")
        (float_truncate:DF
          (match_operand:XF 1 "register_operand" "f")))]


@@ -15674,23 +15640,27 @@
   [(use (match_operand:X87MODEF12 0 "register_operand" ""))
    (use (match_operand:X87MODEF12 1 "general_operand" ""))
    (use (match_operand:X87MODEF12 2 "general_operand" ""))]
   [(use (match_operand:X87MODEF12 0 "register_operand" ""))
    (use (match_operand:X87MODEF12 1 "general_operand" ""))
    (use (match_operand:X87MODEF12 2 "general_operand" ""))]

-  "TARGET_USE_FANCY_MATH_387
-   && (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
-       || TARGET_MIX_SSE_I387)"
+  "TARGET_USE_FANCY_MATH_387"

 {
   rtx label = gen_label_rtx ();
 
   rtx op1 = gen_reg_rtx (XFmode);
   rtx op2 = gen_reg_rtx (XFmode);
 
 {
   rtx label = gen_label_rtx ();
 
   rtx op1 = gen_reg_rtx (XFmode);
   rtx op2 = gen_reg_rtx (XFmode);
 

-  emit_insn(gen_extend<mode>xf2 (op1, operands[1]));
-  emit_insn(gen_extend<mode>xf2 (op2, operands[2]));
+  emit_insn (gen_extend<mode>xf2 (op1, operands[1]));
+  emit_insn (gen_extend<mode>xf2 (op2, operands[2]));

 
   emit_label (label);
   emit_insn (gen_fpremxf4_i387 (op1, op2, op1, op2));
   ix86_emit_fp_unordered_jump (label);
 
 
   emit_label (label);
   emit_insn (gen_fpremxf4_i387 (op1, op2, op1, op2));
   ix86_emit_fp_unordered_jump (label);
 

-  emit_insn (gen_truncxf<mode>2_i387_noop_unspec (operands[0], op1));
+  /* Truncate the result properly for strict SSE math.  */
+  if (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
+      && !TARGET_MIX_SSE_I387)
+    emit_insn (gen_truncxf<mode>2 (operands[0], op1));
+  else
+    emit_insn (gen_truncxf<mode>2_i387_noop_unspec (operands[0], op1));
+

   DONE;
 })
 
   DONE;
 })
 


@@ -15731,24 +15701,28 @@
   [(use (match_operand:X87MODEF12 0 "register_operand" ""))
    (use (match_operand:X87MODEF12 1 "general_operand" ""))
    (use (match_operand:X87MODEF12 2 "general_operand" ""))]
   [(use (match_operand:X87MODEF12 0 "register_operand" ""))
    (use (match_operand:X87MODEF12 1 "general_operand" ""))
    (use (match_operand:X87MODEF12 2 "general_operand" ""))]

-  "TARGET_USE_FANCY_MATH_387
-   && (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
-       || TARGET_MIX_SSE_I387)"
+  "TARGET_USE_FANCY_MATH_387"

 {
   rtx label = gen_label_rtx ();
 
   rtx op1 = gen_reg_rtx (XFmode);
   rtx op2 = gen_reg_rtx (XFmode);
 
 {
   rtx label = gen_label_rtx ();
 
   rtx op1 = gen_reg_rtx (XFmode);
   rtx op2 = gen_reg_rtx (XFmode);
 

-  emit_insn(gen_extend<mode>xf2 (op1, operands[1]));
-  emit_insn(gen_extend<mode>xf2 (op2, operands[2]));
+  emit_insn (gen_extend<mode>xf2 (op1, operands[1]));
+  emit_insn (gen_extend<mode>xf2 (op2, operands[2]));

 
   emit_label (label);
 
   emit_insn (gen_fprem1xf4_i387 (op1, op2, op1, op2));
   ix86_emit_fp_unordered_jump (label);
 
 
   emit_label (label);
 
   emit_insn (gen_fprem1xf4_i387 (op1, op2, op1, op2));
   ix86_emit_fp_unordered_jump (label);
 

-  emit_insn (gen_truncxf<mode>2_i387_noop_unspec (operands[0], op1));
+  /* Truncate the result properly for strict SSE math.  */
+  if (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
+      && !TARGET_MIX_SSE_I387)
+    emit_insn (gen_truncxf<mode>2 (operands[0], op1));
+  else
+    emit_insn (gen_truncxf<mode>2_i387_noop_unspec (operands[0], op1));
+

   DONE;
 })
 
   DONE;
 })