PR middle-end/19330

	* expmed.c (extract_bit_field): Use adjust_address instead of
	gen_lowpart when op0 is a MEM.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@94198 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index baf96ff..702f8cc 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2005-01-24  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
+
+       PR middle-end/19330
+       * expmed.c (extract_bit_field): Use adjust_address instead of
+       gen_lowpart when op0 is a MEM.
+

 2005-01-24  Steven Bosscher  <stevenb@suse.de>
 
        * cfgexpand.c (expand_gimple_tailcall): Fix typo.
 2005-01-24  Steven Bosscher  <stevenb@suse.de>
 
        * cfgexpand.c (expand_gimple_tailcall): Fix typo.

diff --git a/gcc/expmed.c b/gcc/expmed.c
index dcd77ac..47b3d0d 100644 (file)
--- a/gcc/expmed.c
+++ b/gcc/expmed.c
@@ -1158,12 +1158,18 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
     enum machine_mode imode = int_mode_for_mode (GET_MODE (op0));
     if (imode != GET_MODE (op0))
       {
     enum machine_mode imode = int_mode_for_mode (GET_MODE (op0));
     if (imode != GET_MODE (op0))
       {

-       op0 = gen_lowpart (imode, op0);
+       if (MEM_P (op0))
+         op0 = adjust_address (op0, imode, 0);
+       else
+         {
+           gcc_assert (imode != BLKmode);
+           op0 = gen_lowpart (imode, op0);

 
 

-       /* If we got a SUBREG, force it into a register since we aren't going
-          to be able to do another SUBREG on it.  */
-       if (GET_CODE (op0) == SUBREG)
-         op0 = force_reg (imode, op0);
+           /* If we got a SUBREG, force it into a register since we
+              aren't going to be able to do another SUBREG on it.  */
+           if (GET_CODE (op0) == SUBREG)
+             op0 = force_reg (imode, op0);
+         }

       }
   }
 
       }
   }