PR target/38548

	* arm/t-linux (LIB1ASMFUNCS): Add _arm_addsubdf3 and
_arm_addsubsf3.
	* arm/lib1funcs.asm (clzsi2): Use RET macro for return
instruction.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@142838 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fa2ccd6..581efad 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,11 @@
 2008-12-19  Richard Earnshaw  <rearnsha@arm.com>
 
+       PR target/38548
+       * arm/t-linux (LIB1ASMFUNCS): Add _arm_addsubdf3 and _arm_addsubsf3.
+       * arm/lib1funcs.asm (clzsi2): Use RET macro for return instruction.
+
+2008-12-19  Richard Earnshaw  <rearnsha@arm.com>
+
        PR bootstrap/38578
        * arm.c (load_multiple_sequence): Initialize ORDER array.
        (store_multiple_sequence): Likewise.

diff --git a/gcc/config/arm/lib1funcs.asm b/gcc/config/arm/lib1funcs.asm
index fe315bc..d265057 100644 (file)
--- a/gcc/config/arm/lib1funcs.asm
+++ b/gcc/config/arm/lib1funcs.asm
@@ -1280,7 +1280,7 @@ ARM_FUNC_START clzsi2
        adr     r2, 1f
        ldrb    r0, [r2, r0]
        add     r0, r0, r1
-       bx lr
+       RET
 .align 2
 1:
 .byte 4, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0

diff --git a/gcc/config/arm/t-linux b/gcc/config/arm/t-linux
index ea32895..73d6213 100644 (file)
--- a/gcc/config/arm/t-linux
+++ b/gcc/config/arm/t-linux
@@ -3,7 +3,8 @@
 TARGET_LIBGCC2_CFLAGS = -fomit-frame-pointer -fPIC
 
 LIB1ASMSRC = arm/lib1funcs.asm
-LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx _clzsi2 _clzdi2
+LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx _clzsi2 _clzdi2 \
+       _arm_addsubdf3 _arm_addsubsf3
 
 # MULTILIB_OPTIONS = mhard-float/msoft-float
 # MULTILIB_DIRNAMES = hard-float soft-float