H.J. Lu <hongjiu.lu@intel.com>
PR target/31478
* config/i386/sse.md (sse2_umulv2siv2di3): Use V4SImode instead
of V8HImode when calling ix86_binary_operator_ok.
(sse2_pmaddwd): Call ix86_binary_operator_ok.
(sdot_prodv8hi): Operands 1 and 2 must be register.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@123527
138bc75d-0d04-0410-961f-
82ee72b054a4
+2007-04-05 Uros Bizjak <ubizjak@gmail.com>
+ H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/31478
+ * config/i386/sse.md (sse2_umulv2siv2di3): Use V4SImode instead
+ of V8HImode when calling ix86_binary_operator_ok.
+ (sse2_pmaddwd): Call ix86_binary_operator_ok.
+ (sdot_prodv8hi): Operands 1 and 2 must be register.
+
2007-04-05 Alexandre Oliva <aoliva@redhat.com>
* tree-sra.c (try_instantiate_multiple_fields): Needlessly
2007-04-05 Alexandre Oliva <aoliva@redhat.com>
* tree-sra.c (try_instantiate_multiple_fields): Needlessly
(vec_select:V2SI
(match_operand:V4SI 2 "nonimmediate_operand" "xm")
(parallel [(const_int 0) (const_int 2)])))))]
(vec_select:V2SI
(match_operand:V4SI 2 "nonimmediate_operand" "xm")
(parallel [(const_int 0) (const_int 2)])))))]
- "TARGET_SSE2 && ix86_binary_operator_ok (MULT, V8HImode, operands)"
+ "TARGET_SSE2 && ix86_binary_operator_ok (MULT, V4SImode, operands)"
"pmuludq\t{%2, %0|%0, %2}"
[(set_attr "type" "sseimul")
(set_attr "mode" "TI")])
"pmuludq\t{%2, %0|%0, %2}"
[(set_attr "type" "sseimul")
(set_attr "mode" "TI")])
(const_int 3)
(const_int 5)
(const_int 7)]))))))]
(const_int 3)
(const_int 5)
(const_int 7)]))))))]
+ "TARGET_SSE2 && ix86_binary_operator_ok (MULT, V8HImode, operands)"
"pmaddwd\t{%2, %0|%0, %2}"
[(set_attr "type" "sseiadd")
(set_attr "mode" "TI")])
"pmaddwd\t{%2, %0|%0, %2}"
[(set_attr "type" "sseiadd")
(set_attr "mode" "TI")])
(define_expand "sdot_prodv8hi"
[(match_operand:V4SI 0 "register_operand" "")
(define_expand "sdot_prodv8hi"
[(match_operand:V4SI 0 "register_operand" "")
- (match_operand:V8HI 1 "nonimmediate_operand" "")
- (match_operand:V8HI 2 "nonimmediate_operand" "")
+ (match_operand:V8HI 1 "register_operand" "")
+ (match_operand:V8HI 2 "register_operand" "")
(match_operand:V4SI 3 "register_operand" "")]
"TARGET_SSE2"
{
(match_operand:V4SI 3 "register_operand" "")]
"TARGET_SSE2"
{