gcc_unreachable as appropriate.
(machopic_function_base_name, machopic_indirect_data_reference,
machopic_legitimize_pic_address, darwin_non_lazy_pcrel): Likewise.
* config/host-darwin.c (darwin_gt_pch_use_address): Likewise
* config/rs6000/altivec.md (*mov<mode>_internal,
build_vector_mask_for_load): Likewise.
* config/rs6000/darwin.md (movdf_low_si, movdf_low_di,
*call_nonlocal_darwin64, *call_value_nonlocal_darwin64,
*sibcall_symbolic_64, *sibcall_value_symbolic_64): Likewise.
* config/rs6000/predicates.md (easy_fp_constant,
logical_operand): Likewise.
* config/rs6000/rs6000.c (spe_expand_predicate_builtin,
compute_save_world_info, rs6000_emit_prologue,
rs6000_output_mi_thunk): Reword comments to avoid 'abort'.
* config/rs6000/host-darwin.c (segv_handler): Use fancy_abort
directly.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@99152
138bc75d-0d04-0410-961f-
82ee72b054a4
+2005-05-03 Nathan Sidwell <nathan@codesourcery.com>
+
+ * config/darwin.c (machopic_define_symbol): Use gcc_assert or
+ gcc_unreachable as appropriate.
+ (machopic_function_base_name, machopic_indirect_data_reference,
+ machopic_legitimize_pic_address, darwin_non_lazy_pcrel): Likewise.
+ * config/host-darwin.c (darwin_gt_pch_use_address): Likewise
+ * config/rs6000/altivec.md (*mov<mode>_internal,
+ build_vector_mask_for_load): Likewise.
+ * config/rs6000/darwin.md (movdf_low_si, movdf_low_di,
+ *call_nonlocal_darwin64, *call_value_nonlocal_darwin64,
+ *sibcall_symbolic_64, *sibcall_value_symbolic_64): Likewise.
+ * config/rs6000/predicates.md (easy_fp_constant,
+ logical_operand): Likewise.
+ * config/rs6000/rs6000.c (spe_expand_predicate_builtin,
+ compute_save_world_info, rs6000_emit_prologue,
+ rs6000_output_mi_thunk): Reword comments to avoid 'abort'.
+ * config/rs6000/host-darwin.c (segv_handler): Use fancy_abort
+ directly.
+
2005-05-03 Uros Bizjak <uros@kss-loka.si>
PR middle-end/21282
machopic_define_symbol (rtx mem)
{
rtx sym_ref;
- if (GET_CODE (mem) != MEM)
- abort ();
+
+ gcc_assert (GET_CODE (mem) == MEM);
sym_ref = XEXP (mem, 0);
SYMBOL_REF_FLAGS (sym_ref) |= MACHO_SYMBOL_FLAG_DEFINED;
}
machopic_function_base_name (void)
{
/* if dynamic-no-pic is on, we should not get here */
- if (MACHO_DYNAMIC_NO_PIC_P)
- abort ();
+ gcc_assert (!MACHO_DYNAMIC_NO_PIC_P);
if (function_base == NULL)
function_base =
const char *current_name;
/* If dynamic-no-pic is on, we should not get here. */
- if (MACHO_DYNAMIC_NO_PIC_P)
- abort ();
+ gcc_assert (!MACHO_DYNAMIC_NO_PIC_P);
current_name =
IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (current_function_decl));
if (function_base_func_name != current_name)
emit_insn (gen_macho_low (reg, reg, orig));
#else
/* some other cpu -- writeme! */
- abort ();
+ gcc_unreachable ();
#endif
return reg;
}
#if defined (TARGET_TOC) /* i.e., PowerPC */
rtx hi_sum_reg = (no_new_pseudos ? reg : gen_reg_rtx (Pmode));
- if (reg == NULL)
- abort ();
+ gcc_assert (reg);
emit_insn (gen_rtx_SET (Pmode, hi_sum_reg,
gen_rtx_PLUS (Pmode, pic_offset_table_rtx,
orig = reg;
#else
#if defined (HAVE_lo_sum)
- if (reg == 0) abort ();
+ gcc_assert (reg);
emit_insn (gen_rtx_SET (VOIDmode, reg,
gen_rtx_HIGH (Pmode, offset)));
{
if (reg == 0)
{
- if (reload_in_progress)
- abort ();
- else
- reg = gen_reg_rtx (Pmode);
+ gcc_assert (!reload_in_progress);
+ reg = gen_reg_rtx (Pmode);
}
#ifdef HAVE_lo_sum
emit_insn (gen_rtx_SET (VOIDmode, reg, mem));
#else
/* Some other CPU -- WriteMe! but right now there are no other platform that can use dynamic-no-pic */
- abort ();
+ gcc_unreachable ();
#endif
pic_ref = reg;
}
if (reg == 0)
{
- if (reload_in_progress)
- abort ();
- else
- reg = gen_reg_rtx (Pmode);
+ gcc_assert (!reload_in_progress);
+ reg = gen_reg_rtx (Pmode);
}
hi_sum_reg = reg;
{
const char *nlp_name;
- if (GET_CODE (addr) != SYMBOL_REF)
- abort ();
+ gcc_assert (GET_CODE (addr) == SYMBOL_REF);
nlp_name = machopic_indirection_name (addr, /*stub_p=*/false);
fputs ("\t.long\t", file);
void *mmap_result;
int ret;
- if ((size_t)pch_address_space % pagesize != 0
- || sizeof (pch_address_space) % pagesize != 0)
- abort ();
+ gcc_assert ((size_t)pch_address_space % pagesize == 0
+ && sizeof (pch_address_space) % pagesize == 0);
ret = (addr == pch_address_space && sz <= sizeof (pch_address_space));
if (! ret)
ret = mmap_result != (void *) MAP_FAILED;
/* Sanity check for broken MAP_FIXED. */
- if (ret && mmap_result != addr)
- abort ();
+ gcc_assert (!ret || mmap_result == addr);
}
return ret;
case 4: return "#";
case 5: return "#";
case 6: return output_vec_const_move (operands);
- default: abort();
+ default: gcc_unreachable ();
}
}
[(set_attr "type" "vecstore,vecload,vecsimple,store,load,*,*")])
rtx addr;
rtx temp;
- if (GET_CODE (operands[1]) != MEM)
- abort ();
+ gcc_assert (GET_CODE (operands[1]) == MEM);
addr = XEXP (operands[1], 0);
temp = gen_reg_rtx (GET_MODE (addr));
}
}
default:
- abort();
+ gcc_unreachable ();
}
}"
[(set_attr "type" "load")
case 1:
return \"ld %0,lo16(%2)(%1)\";
default:
- abort();
+ gcc_unreachable ();
}
}"
[(set_attr "type" "load")
#if TARGET_MACHO
return output_call(insn, operands, 0, 2);
#else
- abort();
+ gcc_unreachable ();
#endif
}
[(set_attr "type" "branch,branch")
#if TARGET_MACHO
return output_call(insn, operands, 1, 3);
#else
- abort();
+ gcc_unreachable ();
#endif
}
[(set_attr "type" "branch,branch")
{
case 0: return \"b %z0\";
case 1: return \"b%T0\";
- default: abort();
+ default: gcc_unreachable ();
}
}"
[(set_attr "type" "branch")
{
case 0: return \"b %z1\";
case 1: return \"b%T1\";
- default: abort();
+ default: gcc_unreachable ();
}
}"
[(set_attr "type" "branch")
}
if (global_dc->abort_on_error)
- abort ();
+ fancy_abort (__FILE__, __LINE__, __FUNCTION__);
exit (FATAL_EXIT_CODE);
}
(define_predicate "easy_fp_constant"
(match_code "const_double")
{
+ long k[4];
+ REAL_VALUE_TYPE rv;
+
if (GET_MODE (op) != mode
|| (GET_MODE_CLASS (mode) != MODE_FLOAT && mode != DImode))
return 0;
return 0;
#endif
- if (mode == TFmode)
+ switch (mode)
{
- long k[4];
- REAL_VALUE_TYPE rv;
-
+ case TFmode:
REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
&& num_insns_constant_wide ((HOST_WIDE_INT) k[1]) == 1
&& num_insns_constant_wide ((HOST_WIDE_INT) k[2]) == 1
&& num_insns_constant_wide ((HOST_WIDE_INT) k[3]) == 1);
- }
-
- else if (mode == DFmode)
- {
- long k[2];
- REAL_VALUE_TYPE rv;
+ case DFmode:
/* Force constants to memory before reload to utilize
compress_float_constant.
Avoid this when flag_unsafe_math_optimizations is enabled
return (num_insns_constant_wide ((HOST_WIDE_INT) k[0]) == 1
&& num_insns_constant_wide ((HOST_WIDE_INT) k[1]) == 1);
- }
-
- else if (mode == SFmode)
- {
- long l;
- REAL_VALUE_TYPE rv;
+ case SFmode:
/* Force constants to memory before reload to utilize
compress_float_constant.
Avoid this when flag_unsafe_math_optimizations is enabled
return 0;
REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
- REAL_VALUE_TO_TARGET_SINGLE (rv, l);
+ REAL_VALUE_TO_TARGET_SINGLE (rv, k[0]);
- return num_insns_constant_wide (l) == 1;
- }
+ return num_insns_constant_wide (k[0]) == 1;
- else if (mode == DImode)
+ case DImode:
return ((TARGET_POWERPC64
&& GET_CODE (op) == CONST_DOUBLE && CONST_DOUBLE_LOW (op) == 0)
|| (num_insns_constant (op, DImode) <= 2));
- else if (mode == SImode)
+ case SImode:
return 1;
- else
- abort ();
+
+ default:
+ gcc_unreachable ();
+ }
})
;; Return 1 if the operand is a CONST_VECTOR and can be loaded into a
}
else if (GET_CODE (op) == CONST_DOUBLE)
{
- if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
- abort ();
+ gcc_assert (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT);
opl = CONST_DOUBLE_LOW (op);
oph = CONST_DOUBLE_HIGH (op);
int
num_insns_constant (rtx op, enum machine_mode mode)
{
+<<<<<<< rs6000.c
+ switch (GET_CODE (op))
+=======
HOST_WIDE_INT low, high;
switch (GET_CODE (op))
+>>>>>>> 1.815
{
case CONST_INT:
#if HOST_BITS_PER_WIDE_INT == 64
return num_insns_constant_wide ((HOST_WIDE_INT) l);
}
+<<<<<<< rs6000.c
+ {
+ HOST_WIDE_INT low;
+ HOST_WIDE_INT high;
+ long l[2];
+ REAL_VALUE_TYPE rv;
+ int endian = (WORDS_BIG_ENDIAN == 0);
+
+ if (mode == VOIDmode || mode == DImode)
+ {
+ high = CONST_DOUBLE_HIGH (op);
+ low = CONST_DOUBLE_LOW (op);
+ }
+ else
+ {
+ REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
+ REAL_VALUE_TO_TARGET_DOUBLE (rv, l);
+ high = l[endian];
+ low = l[1 - endian];
+ }
+
+ if (TARGET_32BIT)
+ return (num_insns_constant_wide (low)
+ + num_insns_constant_wide (high));
+
+ else
+ {
+ if (high == 0 && low >= 0)
+ return num_insns_constant_wide (low);
+
+ else if (high == -1 && low < 0)
+ return num_insns_constant_wide (low);
+
+ else if (mask64_operand (op, mode))
+ return 2;
+
+ else if (low == 0)
+ return num_insns_constant_wide (high) + 1;
+
+ else
+ return (num_insns_constant_wide (high)
+ + num_insns_constant_wide (low) + 1);
+ }
+ }
+
+ default:
+ gcc_unreachable ();
+=======
if (mode == VOIDmode || mode == DImode)
{
high = CONST_DOUBLE_HIGH (op);
default:
gcc_unreachable ();
+>>>>>>> 1.815
}
}
gen_rtx_IOR (SImode, result,
GEN_INT (INTVAL (source) & 0xffff))));
result = dest;
+<<<<<<< rs6000.c
+
+ case DImode:
+ switch (GET_CODE (source))
+=======
break;
case DImode:
switch (GET_CODE (source))
+>>>>>>> 1.815
{
case CONST_INT:
c0 = INTVAL (source);
case 0:
/* We need to get to the OV bit, which is the ORDERED bit. We
could generate (ordered:SI (reg:CC xx) (const_int 0)), but
- that's ugly and will trigger a validate_condition_mode abort.
+ that's ugly and will make validate_condition_mode die.
So let's just use another pattern. */
emit_insn (gen_move_from_CR_ov_bit (target, scratch));
return target;
if (d->code == fcode)
return rs6000_expand_binop_builtin (d->icode, arglist, target);
+<<<<<<< rs6000.c
+ /* Handle simple ternary operations. */
+ d = (struct builtin_description *) bdesc_3arg;
+ for (i = 0; i < ARRAY_SIZE (bdesc_3arg); i++, d++)
+ if (d->code == fcode)
+ return rs6000_expand_ternop_builtin (d->icode, arglist, target);
+
+ gcc_unreachable ();
+ return NULL_RTX;
+=======
/* Handle simple ternary operations. */
d = (struct builtin_description *) bdesc_3arg;
for (i = 0; i < ARRAY_SIZE (bdesc_3arg); i++, d++)
return rs6000_expand_ternop_builtin (d->icode, arglist, target);
gcc_unreachable ();
+>>>>>>> 1.815
}
static tree
/* Because the Darwin register save/restore routines only handle
F14 .. F31 and V20 .. V31 as per the ABI, perform a consistency
- check and abort if there's something worng. */
+ check. */
gcc_assert (info_ptr->first_fp_reg_save >= FIRST_SAVED_FP_REGNO
&& (info_ptr->first_altivec_reg_save
>= FIRST_SAVED_ALTIVEC_REGNO));
/* The SAVE_WORLD and RESTORE_WORLD routines make a number of
assumptions about the offsets of various bits of the stack
- frame. Abort if things aren't what they should be. */
+ frame. */
gcc_assert (info->gp_save_offset == -220
&& info->fp_save_offset == -144
&& info->lr_save_offset == 8
#endif
/* gen_sibcall expects reload to convert scratch pseudo to LR so we must
- generate sibcall RTL explicitly to avoid constraint abort. */
+ generate sibcall RTL explicitly. */
insn = emit_call_insn (
gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (4,
&& XEXP (XEXP (orig, 0), 0) == pic_offset_table_rtx)
return orig;
+<<<<<<< rs6000.c
+ gcc_assert (GET_CODE (XEXP (orig, 0)) == PLUS);
+
+ /* Use a different reg for the intermediate value, as
+ it will be marked UNCHANGING. */
+ rtx reg_temp = no_new_pseudos ? reg : gen_reg_rtx (Pmode);
+
+ base = rs6000_machopic_legitimize_pic_address (XEXP (XEXP (orig, 0), 0),
+ Pmode, reg_temp);
+ offset =
+ rs6000_machopic_legitimize_pic_address (XEXP (XEXP (orig, 0), 1),
+ Pmode, reg);
+
+=======
gcc_assert (GET_CODE (XEXP (orig, 0)) == PLUS);
/* Use a different reg for the intermediate value, as
rs6000_machopic_legitimize_pic_address (XEXP (XEXP (orig, 0), 1),
Pmode, reg);
+>>>>>>> 1.815
if (GET_CODE (offset) == CONST_INT)
{
if (SMALL_INT (offset))
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