* longlong.h: Import current PowerPC defintion from GMP-4.1.

        * config/rs6000/rs6000.h (MIN_UNITS_PER_WORD): Add IN_LIBGCC2 case.

        * config/rs6000/linux64.h (ADJUST_FIELD_ALIGN): Undef before define.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@56600 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9be3516..721a6ec 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2002-08-27  David Edelsohn  <edelsohn@gnu.org>
+
+       * longlong.h: Import current PowerPC defintion from GMP-4.1.
+
+       * config/rs6000/rs6000.h (MIN_UNITS_PER_WORD): Add IN_LIBGCC2 case.
+
+       * config/rs6000/linux64.h (ADJUST_FIELD_ALIGN): Undef before define.
+
 Tue Aug 27 13:53:57 2002  J"orn Rennecke <joern.rennecke@superh.com>
 
        * sh.h (MAX_FIXED_MODE_SIZE): Define.

diff --git a/gcc/config/rs6000/linux64.h b/gcc/config/rs6000/linux64.h
index a1f162e..ee46931 100644 (file)
--- a/gcc/config/rs6000/linux64.h
+++ b/gcc/config/rs6000/linux64.h
@@ -73,6 +73,7 @@ Boston, MA 02111-1307, USA.  */
 #define USER_LABEL_PREFIX  ""
 
 /* AIX word-aligns FP doubles but doubleword-aligns 64-bit ints.  */
+#undef  ADJUST_FIELD_ALIGN
 #define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \
   (TYPE_MODE (TREE_CODE (TREE_TYPE (FIELD)) == ARRAY_TYPE \
              ? get_inner_array_type (FIELD) \

diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 42aa929..f91afcd 100644 (file)
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -522,7 +522,11 @@ extern int rs6000_default_long_calls;
 
 /* Width of a word, in units (bytes).  */
 #define UNITS_PER_WORD (! TARGET_POWERPC64 ? 4 : 8)
+#ifdef IN_LIBGCC2
+#define MIN_UNITS_PER_WORD UNITS_PER_WORD
+#else
 #define MIN_UNITS_PER_WORD 4
+#endif
 #define UNITS_PER_FP_WORD 8
 #define UNITS_PER_ALTIVEC_WORD 16
 #define UNITS_PER_SPE_WORD 8

diff --git a/gcc/longlong.h b/gcc/longlong.h
index 40f03fe..a593150 100644 (file)
--- a/gcc/longlong.h
+++ b/gcc/longlong.h
@@ -621,127 +621,135 @@ UDItype __umulsidi3 (USItype, USItype);
   } while (0)
 #endif /* __ns32000__ */
 
-#if (defined (_ARCH_PPC) || defined (_IBMR2))
-#if W_TYPE_SIZE == 32
+/* FIXME: We should test _IBMR2 here when we add assembly support for the
+   system vendor compilers.
+   FIXME: What's needed for gcc PowerPC VxWorks?  __vxworks__ is not good
+   enough, since that hits ARM and m68k too.  */
+#if (defined (_ARCH_PPC)       /* AIX */                               \
+     || defined (_ARCH_PWR)    /* AIX */                               \
+     || defined (_ARCH_COM)    /* AIX */                               \
+     || defined (__powerpc__)  /* gcc */                               \
+     || defined (__POWERPC__)  /* BEOS */                              \
+     || defined (__ppc__)      /* Darwin */                            \
+     || defined (PPC)          /* GNU/Linux, SysV */                   \
+     ) && W_TYPE_SIZE == 32
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
   do {                                                                 \
     if (__builtin_constant_p (bh) && (bh) == 0)                                \
       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"          \
-            : "=r" ((USItype) (sh)),                                   \
-              "=&r" ((USItype) (sl))                                   \
-            : "%r" ((USItype) (ah)),                                   \
-              "%r" ((USItype) (al)),                                   \
-              "rI" ((USItype) (bl)));                                  \
-    else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)         \
+            : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
+    else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0)                \
       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"          \
-            : "=r" ((USItype) (sh)),                                   \
-              "=&r" ((USItype) (sl))                                   \
-            : "%r" ((USItype) (ah)),                                   \
-              "%r" ((USItype) (al)),                                   \
-              "rI" ((USItype) (bl)));                                  \
+            : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
     else                                                               \
       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"         \
-            : "=r" ((USItype) (sh)),                                   \
-              "=&r" ((USItype) (sl))                                   \
-            : "%r" ((USItype) (ah)),                                   \
-              "r" ((USItype) (bh)),                                    \
-              "%r" ((USItype) (al)),                                   \
-              "rI" ((USItype) (bl)));                                  \
+            : "=r" (sh), "=&r" (sl)                                    \
+            : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl));              \
   } while (0)
 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
   do {                                                                 \
     if (__builtin_constant_p (ah) && (ah) == 0)                                \
       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"      \
-              : "=r" ((USItype) (sh)),                                 \
-                "=&r" ((USItype) (sl))                                 \
-              : "r" ((USItype) (bh)),                                  \
-                "rI" ((USItype) (al)),                                 \
-                "r" ((USItype) (bl)));                                 \
-    else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0)         \
+              : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
+    else if (__builtin_constant_p (ah) && (ah) == ~(USItype) 0)                \
       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"      \
-              : "=r" ((USItype) (sh)),                                 \
-                "=&r" ((USItype) (sl))                                 \
-              : "r" ((USItype) (bh)),                                  \
-                "rI" ((USItype) (al)),                                 \
-                "r" ((USItype) (bl)));                                 \
+              : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
     else if (__builtin_constant_p (bh) && (bh) == 0)                   \
       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"                \
-              : "=r" ((USItype) (sh)),                                 \
-                "=&r" ((USItype) (sl))                                 \
-              : "r" ((USItype) (ah)),                                  \
-                "rI" ((USItype) (al)),                                 \
-                "r" ((USItype) (bl)));                                 \
-    else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)         \
+              : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
+    else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0)                \
       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"                \
-              : "=r" ((USItype) (sh)),                                 \
-                "=&r" ((USItype) (sl))                                 \
-              : "r" ((USItype) (ah)),                                  \
-                "rI" ((USItype) (al)),                                 \
-                "r" ((USItype) (bl)));                                 \
+              : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
     else                                                               \
       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"     \
-              : "=r" ((USItype) (sh)),                                 \
-                "=&r" ((USItype) (sl))                                 \
-              : "r" ((USItype) (ah)),                                  \
-                "r" ((USItype) (bh)),                                  \
-                "rI" ((USItype) (al)),                                 \
-                "r" ((USItype) (bl)));                                 \
+              : "=r" (sh), "=&r" (sl)                                  \
+              : "r" (ah), "r" (bh), "rI" (al), "r" (bl));              \
   } while (0)
-#endif /* W_TYPE_SIZE */
 #define count_leading_zeros(count, x) \
-  __asm__ ("{cntlz|cntlzw} %0,%1"                                      \
-          : "=r" ((USItype) (count))                                   \
-          : "r" ((USItype) (x)))
+  __asm__ ("{cntlz|cntlzw} %0,%1" : "=r" (count) : "r" (x))
 #define COUNT_LEADING_ZEROS_0 32
-#if defined (_ARCH_PPC)
+#if defined (_ARCH_PPC) || defined (__powerpc__) || defined (__POWERPC__) \
+  || defined (__ppc__) || defined (PPC) || defined (__vxworks__)
 #define umul_ppmm(ph, pl, m0, m1) \
   do {                                                                 \
     USItype __m0 = (m0), __m1 = (m1);                                  \
-    __asm__ ("mulhwu %0,%1,%2"                                         \
-            : "=r" ((USItype) ph)                                      \
-            : "%r" (__m0),                                             \
-              "r" (__m1));                                             \
+    __asm__ ("mulhwu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));     \
     (pl) = __m0 * __m1;                                                        \
   } while (0)
 #define UMUL_TIME 15
 #define smul_ppmm(ph, pl, m0, m1) \
   do {                                                                 \
     SItype __m0 = (m0), __m1 = (m1);                                   \
-    __asm__ ("mulhw %0,%1,%2"                                          \
-            : "=r" ((SItype) ph)                                       \
-            : "%r" (__m0),                                             \
-              "r" (__m1));                                             \
+    __asm__ ("mulhw %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));      \
     (pl) = __m0 * __m1;                                                        \
   } while (0)
 #define SMUL_TIME 14
 #define UDIV_TIME 120
 #elif defined (_ARCH_PWR)
-#define umul_ppmm(xh, xl, m0, m1) \
-  do {                                                                 \
-    USItype __m0 = (m0), __m1 = (m1);                                  \
-    __asm__ ("mul %0,%2,%3"                                            \
-            : "=r" ((USItype) (xh)),                                   \
-              "=q" ((USItype) (xl))                                    \
-            : "r" (__m0),                                              \
-              "r" (__m1));                                             \
-    (xh) += ((((SItype) __m0 >> 31) & __m1)                            \
-            + (((SItype) __m1 >> 31) & __m0));                         \
-  } while (0)
 #define UMUL_TIME 8
 #define smul_ppmm(xh, xl, m0, m1) \
-  __asm__ ("mul %0,%2,%3"                                              \
-          : "=r" ((SItype) (xh)),                                      \
-            "=q" ((SItype) (xl))                                       \
-          : "r" (m0),                                                  \
-            "r" (m1))
+  __asm__ ("mul %0,%2,%3" : "=r" (xh), "=q" (xl) : "r" (m0), "r" (m1))
 #define SMUL_TIME 4
 #define sdiv_qrnnd(q, r, nh, nl, d) \
-  __asm__ ("div %0,%2,%4"                                              \
-          : "=r" ((SItype) (q)), "=q" ((SItype) (r))                   \
-          : "r" ((SItype) (nh)), "1" ((SItype) (nl)), "r" ((SItype) (d)))
+  __asm__ ("div %0,%2,%4" : "=r" (q), "=q" (r) : "r" (nh), "1" (nl), "r" (d))
 #define UDIV_TIME 100
 #endif
-#endif /* Power architecture variants.  */
+#endif /* 32-bit POWER architecture variants.  */
+
+/* We should test _IBMR2 here when we add assembly support for the system
+   vendor compilers.  */
+#if (defined (_ARCH_PPC64) || defined (__powerpc64__)) && W_TYPE_SIZE == 64
+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
+  do {                                                                 \
+    if (__builtin_constant_p (bh) && (bh) == 0)                                \
+      __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"          \
+            : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
+    else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0)                \
+      __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"          \
+            : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
+    else                                                               \
+      __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"         \
+            : "=r" (sh), "=&r" (sl)                                    \
+            : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl));              \
+  } while (0)
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+  do {                                                                 \
+    if (__builtin_constant_p (ah) && (ah) == 0)                                \
+      __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"      \
+              : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
+    else if (__builtin_constant_p (ah) && (ah) == ~(UDItype) 0)                \
+      __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"      \
+              : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
+    else if (__builtin_constant_p (bh) && (bh) == 0)                   \
+      __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"                \
+              : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
+    else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0)                \
+      __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"                \
+              : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
+    else                                                               \
+      __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"     \
+              : "=r" (sh), "=&r" (sl)                                  \
+              : "r" (ah), "r" (bh), "rI" (al), "r" (bl));              \
+  } while (0)
+#define count_leading_zeros(count, x) \
+  __asm__ ("cntlzd %0,%1" : "=r" (count) : "r" (x))
+#define COUNT_LEADING_ZEROS_0 64
+#define umul_ppmm(ph, pl, m0, m1) \
+  do {                                                                 \
+    UDItype __m0 = (m0), __m1 = (m1);                                  \
+    __asm__ ("mulhdu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));     \
+    (pl) = __m0 * __m1;                                                        \
+  } while (0)
+#define UMUL_TIME 15
+#define smul_ppmm(ph, pl, m0, m1) \
+  do {                                                                 \
+    DItype __m0 = (m0), __m1 = (m1);                                   \
+    __asm__ ("mulhd %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));      \
+    (pl) = __m0 * __m1;                                                        \
+  } while (0)
+#define SMUL_TIME 14  /* ??? */
+#define UDIV_TIME 120 /* ??? */
+#endif /* 64-bit PowerPC.  */
 
 #if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \