OSDN Git Service

* config/c4x/c4x.c (call_address_operand, symbolic_address_operand):
authorm.hayes <m.hayes@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 8 Feb 1999 14:18:31 +0000 (14:18 +0000)
committerm.hayes <m.hayes@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 8 Feb 1999 14:18:31 +0000 (14:18 +0000)
  Rename from call_operand and symbolic_operand respectively.  All
callers changed.
* config/c4x/c4x.md (call_address_operand, symbolic_address_operand):
Likewise.
* config/c4x/c4x.h (call_address_operand, symbolic_address_operand):
Likewise.
(PREDICATE_CODES): Allow CONST, LABEL_REF for call_address_operand.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@25089 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/c4x/c4x.c
gcc/config/c4x/c4x.h
gcc/config/c4x/c4x.md

index 49d3227..131551e 100644 (file)
@@ -1,3 +1,14 @@
+Tue Feb  9 11:08:41 1999  Michael Hayes  <m.hayes@elec.canterbury.ac.nz>
+
+       * config/c4x/c4x.c (call_address_operand, symbolic_address_operand):
+       Rename from call_operand and symbolic_operand respectively.  All
+       callers changed.
+       * config/c4x/c4x.md (call_address_operand, symbolic_address_operand): 
+       Likewise.
+       * config/c4x/c4x.h (call_address_operand, symbolic_address_operand): 
+       Likewise.
+       (PREDICATE_CODES): Allow CONST, LABEL_REF for call_address_operand.
+
 Tue Feb  9 10:52:27 1999  Michael Hayes  <m.hayes@elec.canterbury.ac.nz>
 
        * config/c4x/c4x.c (c4x_legitimize_address): Don't generate a
index e4ee65f..878eb1e 100644 (file)
@@ -1037,7 +1037,7 @@ c4x_emit_move_sequence (operands, mode)
         address.  */
       op1 = XEXP (op1, 1);
     }
-  else if (symbolic_operand (op1, mode))
+  else if (symbolic_address_operand (op1, mode))
     {
       if (TARGET_LOAD_ADDRESS)
        {
@@ -1072,7 +1072,7 @@ c4x_emit_move_sequence (operands, mode)
      perhaps by calling validize_address.  */
   if (! (reload_in_progress || reload_completed)
       && GET_CODE (op1) == MEM
-      && symbolic_operand (XEXP (op1, 0), Pmode))
+      && symbolic_address_operand (XEXP (op1, 0), Pmode))
     {
       rtx dp_reg = gen_rtx_REG (Pmode, DP_REGNO);
       if (! TARGET_SMALL)
@@ -1083,7 +1083,7 @@ c4x_emit_move_sequence (operands, mode)
 
   if (! (reload_in_progress || reload_completed)
       && GET_CODE (op0) == MEM 
-      && symbolic_operand (XEXP (op0, 0), Pmode))
+      && symbolic_address_operand (XEXP (op0, 0), Pmode))
     {
       rtx dp_reg = gen_rtx_REG (Pmode, DP_REGNO);
       if (! TARGET_SMALL)
@@ -2880,26 +2880,18 @@ rc_reg_operand (op, mode)
 
 
 int
-call_operand (op, mode)
+call_address_operand (op, mode)
      rtx op;
      enum machine_mode mode ATTRIBUTE_UNUSED;
 {
-  op = XEXP (op, 0);
-  switch (GET_CODE (op))
-    {
-    case SYMBOL_REF:
-    case REG:
-      return 1;
-    default:
-    }
-  return 0;
+  return (REG_P (op) || symbolic_address_operand (op, mode));
 }
 
 
 /* Symbolic operand.  */
 
 int
-symbolic_operand (op, mode)
+symbolic_address_operand (op, mode)
      register rtx op;
      enum machine_mode mode ATTRIBUTE_UNUSED;
 {
index cc28fcc..7f7d7d0 100644 (file)
@@ -340,6 +340,11 @@ extern void c4x_optimization_options ();
 #define TARGET_FLOAT_FORMAT    C4X_FLOAT_FORMAT
 #define MAX_FIXED_MODE_SIZE    64 /* HImode */
 
+/* Number of bits in the high and low parts of a two stage
+   load of an immediate constant.  */
+#define BITS_PER_HIGH 16
+#define BITS_PER_LO_SUM 16
+
 /* Use the internal floating point stuff in the compiler and not the
    host floating point stuff. */
 
@@ -2529,7 +2534,7 @@ if (final_sequence != NULL_RTX)           \
   {"sp_reg_operand", {REG}},                                   \
   {"st_reg_operand", {REG}},                                   \
   {"rc_reg_operand", {REG}},                                   \
-  {"call_operand", {REG, SYMBOL_REF}},                         \
+  {"call_address_operand", {REG, SYMBOL_REF, LABEL_REF, CONST}}, \
   {"src_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE}}, \
   {"src_hi_operand", {SUBREG, REG, MEM, CONST_DOUBLE}},        \
   {"lsrc_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE}}, \
@@ -2537,7 +2542,7 @@ if (final_sequence != NULL_RTX)           \
   {"any_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE}}, \
   {"par_ind_operand", {MEM}},                                  \
   {"parallel_operand", {SUBREG, REG, MEM}},                    \
-  {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}},                \
+  {"symbolic_address_operand", {SYMBOL_REF, LABEL_REF, CONST}},        \
   {"mem_operand", {MEM}},                                      
 
 
@@ -2628,7 +2633,7 @@ extern int rc_reg_operand ();
 
 extern int st_reg_operand ();
 
-extern int symbolic_operand ();
+extern int symbolic_address_operand ();
 
 extern int ar0_reg_operand ();
 
@@ -2676,7 +2681,7 @@ extern int group1_mem_operand ();
 
 extern int arx_reg_operand ();
 
-extern int call_operand ();
+extern int call_address_operand ();
 
 extern int par_ind_operand ();
 
index 8e406cc..7890cca 100644 (file)
 
 (define_insn "set_high"
   [(set (match_operand:QI 0 "std_reg_operand" "=c")
-        (high:QI (match_operand:QI 1 "symbolic_operand" "")))]
+        (high:QI (match_operand:QI 1 "symbolic_address_operand" "")))]
   "! TARGET_C3X "
   "ldhi\\t^%H1,%0"
   [(set_attr "type" "unary")])
 (define_insn "set_lo_sum"
   [(set (match_operand:QI 0 "std_reg_operand" "=c")
         (lo_sum:QI (match_dup 0)
-                   (match_operand:QI 1 "symbolic_operand" "")))]
+                   (match_operand:QI 1 "symbolic_address_operand" "")))]
   ""
   "or\\t#%H1,%0"
   [(set_attr "type" "unary")])
 
 (define_split
   [(set (match_operand:QI 0 "std_reg_operand" "")
-        (match_operand:QI 1 "symbolic_operand" ""))]
+        (match_operand:QI 1 "symbolic_address_operand" ""))]
   "! TARGET_C3X"
   [(set (match_dup 0) (high:QI (match_dup 1)))
    (set (match_dup 0) (lo_sum:QI (match_dup 0) (match_dup 1)))]
 ; easily load symbolic addresses into a register.
 (define_split
   [(set (match_operand:QI 0 "reg_operand" "")
-        (match_operand:QI 1 "symbolic_operand" ""))]
+        (match_operand:QI 1 "symbolic_address_operand" ""))]
   "! TARGET_SMALL 
    && (TARGET_C3X || (reload_completed
                       && ! std_reg_operand (operands[0], QImode)))"
 ; for the small memory model.
 (define_split
   [(set (match_operand:QI 0 "reg_operand" "")
-        (match_operand:QI 1 "symbolic_operand" ""))]
+        (match_operand:QI 1 "symbolic_address_operand" ""))]
   "TARGET_SMALL
    && (TARGET_C3X || (reload_completed
                       && ! std_reg_operand (operands[0], QImode)))"
 
 (define_insn "load_immed_address"
   [(set (match_operand:QI 0 "reg_operand" "=a?x?c*r")
-        (match_operand:QI 1 "symbolic_operand" ""))]
+        (match_operand:QI 1 "symbolic_address_operand" ""))]
    "TARGET_LOAD_ADDRESS"
   "#"
   [(set_attr "type" "multi")])
   "(REG_P (operands[0]) || REG_P (operands[1])
     || GET_CODE (operands[0]) == SUBREG
     || GET_CODE (operands[1]) == SUBREG)
-    && ! symbolic_operand (operands[1], QImode)"
+    && ! symbolic_address_operand (operands[1], QImode)"
   "*
    if (which_alternative == 2)
      return \"sti\\t%1,%0\";
 ; CALL
 ;
 (define_insn "*call_c3x"
- [(call (mem:QI (match_operand:QI 0 "call_operand" ""))
+ [(call (mem:QI (match_operand:QI 0 "call_address_operand" ""))
         (match_operand:QI 1 "general_operand" ""))
   (clobber (reg:QI 31))]
   ;; Operand 1 not really used on the C4x.  The C30 doesn't have reg 31.
 
 ; LAJ requires R11 (31) for the return address
 (define_insn "*laj"
- [(call (mem:QI (match_operand:QI 0 "call_operand" ""))
+ [(call (mem:QI (match_operand:QI 0 "call_address_operand" ""))
         (match_operand:QI 1 "general_operand" ""))
   (clobber (reg:QI 31))]
   ;; Operand 1 not really used on the C4x.
   [(set_attr "type" "laj")])
 
 (define_expand "call"
- [(parallel [(call (mem:QI (match_operand:QI 0 "call_operand" ""))
+ [(parallel [(call (mem:QI (match_operand:QI 0 "call_address_operand" ""))
                    (match_operand:QI 1 "general_operand" ""))
              (clobber (reg:QI 31))])]
  ""
 
 (define_insn "*callv_c3x"
  [(set (match_operand 0 "" "=r")
-       (call (mem:QI (match_operand:QI 1 "call_operand" ""))
+       (call (mem:QI (match_operand:QI 1 "call_address_operand" ""))
              (match_operand:QI 2 "general_operand" "")))
   (clobber (reg:QI 31))]
   ;; Operand 0 and 2 not really used for the C4x. 
 ; LAJ requires R11 (31) for the return address
 (define_insn "*lajv"
  [(set (match_operand 0 "" "=r")
-       (call (mem:QI (match_operand:QI 1 "call_operand" ""))
+       (call (mem:QI (match_operand:QI 1 "call_address_operand" ""))
              (match_operand:QI 2 "general_operand" "")))
   (clobber (reg:QI 31))]
   ;; Operand 0 and 2 not really used in the C30 instruction.
 
 (define_expand "call_value"
  [(parallel [(set (match_operand 0 "" "")
-                  (call (mem:QI (match_operand:QI 1 "call_operand" ""))
+                  (call (mem:QI (match_operand:QI 1 "call_address_operand" ""))
                         (match_operand:QI 2 "general_operand" "")))
              (clobber (reg:QI 31))])]
  ""
 ; Peepholes to convert 'call label; rets' into jump label
 ;
 (define_peephole
-  [(parallel [(call (mem:QI (match_operand:QI 0 "call_operand" ""))
+  [(parallel [(call (mem:QI (match_operand:QI 0 "call_address_operand" ""))
                     (match_operand:QI 1 "general_operand" ""))
               (clobber (reg:QI 31))])
    (return)]
 
 (define_peephole
   [(parallel [(set (match_operand 0 "" "")
-                   (call (mem:QI (match_operand:QI 1 "call_operand" ""))
+                   (call (mem:QI (match_operand:QI 1 "call_address_operand" ""))
                          (match_operand:QI 2 "general_operand" "")))
               (clobber (reg:QI 31))])
    (return)]