PARAMS ((FILE *));
/* Get the number of args of a function in one of two ways. */
-#ifdef OPEN_VMS
+#if TARGET_ABI_OPEN_VMS
#define NUM_ARGS current_function_args_info.num_args
#else
#define NUM_ARGS current_function_args_info
#define REG_RA 26
\f
/* Initialize the GCC target structure. */
-#ifdef OPEN_VMS
+#if TARGET_ABI_OPEN_VMS
static int vms_valid_decl_attribute_p PARAMS ((tree, tree, tree, tree));
# undef TARGET_VALID_DECL_ATTRIBUTE
# define TARGET_VALID_DECL_ATTRIBUTE vms_valid_decl_attribute_p
if (mode != Pmode)
return 0;
- return (GET_CODE (op) == SYMBOL_REF
- || (GET_CODE (op) == REG
- && (TARGET_OPEN_VMS || TARGET_WINDOWS_NT || REGNO (op) == 27)));
+ if (GET_CODE (op) == SYMBOL_REF)
+ return 1;
+ if (GET_CODE (op) == REG)
+ {
+ if (TARGET_ABI_OSF)
+ return REGNO (op) == 27;
+ else
+ return 1;
+ }
+
+ return 0;
}
/* Return 1 if OP is a valid Alpha comparison operator. Here we know which
int
direct_return ()
{
- return (! TARGET_OPEN_VMS && reload_completed && alpha_sa_size () == 0
+ return (! TARGET_ABI_OPEN_VMS
+ && reload_completed
+ && alpha_sa_size () == 0
&& get_frame_size () == 0
&& current_function_outgoing_args_size == 0
&& current_function_pretend_args_size == 0);
knowledge of the G_floating routines. */
if (TARGET_FLOAT_VAX)
{
- if (TARGET_OPEN_VMS)
+ if (TARGET_ABI_OPEN_VMS)
{
if (code == FLOAT_EXTEND)
return "OTS$CVT_FLOAT_G_X";
}
}
- if (TARGET_OPEN_VMS)
+ if (TARGET_ABI_OPEN_VMS)
ops = vms_xfloating_ops;
else
ops = osf_xfloating_ops;
{
rtx temp, temp1, addr;
/* VMS really uses DImode pointers in memory at this point. */
- enum machine_mode mode = TARGET_OPEN_VMS ? Pmode : ptr_mode;
+ enum machine_mode mode = TARGET_ABI_OPEN_VMS ? Pmode : ptr_mode;
#ifdef POINTERS_EXTEND_UNSIGNED
fnaddr = convert_memory_address (mode, fnaddr);
int basereg;
int num_args;
-#ifndef OPEN_VMS
+#if TARGET_ABI_OPEN_VMS
+ if (mode == VOIDmode)
+ return alpha_arg_info_reg_val (cum);
+
+ num_args = cum.num_args;
+ if (num_args >= 6 || MUST_PASS_IN_STACK (mode, type))
+ return NULL_RTX;
+#else
if (cum >= 6)
return NULL_RTX;
num_args = cum;
return NULL_RTX;
else if (FUNCTION_ARG_PASS_BY_REFERENCE (cum, mode, type, named))
basereg = 16;
-#else
- if (mode == VOIDmode)
- return alpha_arg_info_reg_val (cum);
-
- num_args = cum.num_args;
- if (num_args >= 6 || MUST_PASS_IN_STACK (mode, type))
- return NULL_RTX;
-#endif /* OPEN_VMS */
+#endif /* TARGET_ABI_OPEN_VMS */
else if (TARGET_FPREGS
&& (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
|| GET_MODE_CLASS (mode) == MODE_FLOAT))
{
tree base, ofs, record, type_decl;
- if (TARGET_OPEN_VMS)
+ if (TARGET_ABI_OPEN_VMS)
return ptr_type_node;
record = make_lang_type (RECORD_TYPE);
if (TREE_CODE (TREE_TYPE (valist)) == ERROR_MARK)
return;
- if (TARGET_OPEN_VMS)
+ if (TARGET_ABI_OPEN_VMS)
std_expand_builtin_va_start (stdarg_p, valist, nextarg);
/* For Unix, SETUP_INCOMING_VARARGS moves the starting address base
tree wide_type, wide_ofs;
int indirect = 0;
- if (TARGET_OPEN_VMS)
+ if (TARGET_ABI_OPEN_VMS)
return std_expand_builtin_va_arg (valist, type);
tsize = ((TREE_INT_CST_LOW (TYPE_SIZE (type)) / BITS_PER_UNIT + 7) / 8) * 8;
if (!current_function_is_thunk)
#endif
{
- if (TARGET_OPEN_VMS && vms_is_stack_procedure)
+ if (TARGET_ABI_OPEN_VMS && vms_is_stack_procedure)
imask |= (1L << HARD_FRAME_POINTER_REGNUM);
/* One for every register we have to save. */
sa_size++;
}
- if (TARGET_OPEN_VMS)
+ if (TARGET_ABI_OPEN_VMS)
{
/* Start by assuming we can use a register procedure if we don't
make any calls (REG_RA not used) or need to save any
return vms_unwind_regno == HARD_FRAME_POINTER_REGNUM;
}
-#ifdef OPEN_VMS
+#if TARGET_ABI_OPEN_VMS
static int
vms_valid_decl_attribute_p (decl, attributes, identifier, args)
rtx insn;
/* We never need a GP for Windows/NT or VMS. */
- if (TARGET_WINDOWS_NT || TARGET_OPEN_VMS)
+ if (TARGET_ABI_WINDOWS_NT || TARGET_ABI_OPEN_VMS)
return 0;
if (TARGET_PROFILING_NEEDS_GP && profile_flag)
sa_size = alpha_sa_size ();
frame_size = get_frame_size ();
- if (TARGET_OPEN_VMS)
+ if (TARGET_ABI_OPEN_VMS)
frame_size = ALPHA_ROUND (sa_size
+ (vms_is_stack_procedure ? 8 : 0)
+ frame_size
+ ALPHA_ROUND (frame_size
+ current_function_pretend_args_size));
- if (TARGET_OPEN_VMS)
+ if (TARGET_ABI_OPEN_VMS)
reg_offset = 8;
else
reg_offset = ALPHA_ROUND (current_function_outgoing_args_size);
alpha_sa_mask (&imask, &fmask);
/* Emit an insn to reload GP, if needed. */
- if (!TARGET_OPEN_VMS && !TARGET_WINDOWS_NT)
+ if (TARGET_ABI_OSF)
{
alpha_function_needs_gp = alpha_does_function_need_gp ();
if (alpha_function_needs_gp)
emit_move_insn (last, const0_rtx);
}
- if (TARGET_WINDOWS_NT)
+ if (TARGET_ABI_WINDOWS_NT)
{
/* For NT stack unwind (done by 'reverse execution'), it's
not OK to take the result of a loop, even though the value
}
/* Save regs in stack order. Beginning with VMS PV. */
- if (TARGET_OPEN_VMS && vms_is_stack_procedure)
+ if (TARGET_ABI_OPEN_VMS && vms_is_stack_procedure)
{
mem = gen_rtx_MEM (DImode, stack_pointer_rtx);
set_mem_alias_set (mem, alpha_sr_alias_set);
reg_offset += 8;
}
- if (TARGET_OPEN_VMS)
+ if (TARGET_ABI_OPEN_VMS)
{
if (!vms_is_stack_procedure)
/* Register frame procedures fave the fp. */
sa_size = alpha_sa_size ();
frame_size = get_frame_size ();
- if (TARGET_OPEN_VMS)
+ if (TARGET_ABI_OPEN_VMS)
frame_size = ALPHA_ROUND (sa_size
+ (vms_is_stack_procedure ? 8 : 0)
+ frame_size
+ ALPHA_ROUND (frame_size
+ current_function_pretend_args_size));
- if (TARGET_OPEN_VMS)
+ if (TARGET_ABI_OPEN_VMS)
reg_offset = 8;
else
reg_offset = ALPHA_ROUND (current_function_outgoing_args_size);
}
/* Issue function start and label. */
- if (TARGET_OPEN_VMS || !flag_inhibit_size_directive)
+ if (TARGET_ABI_OPEN_VMS || !flag_inhibit_size_directive)
{
fputs ("\t.ent ", file);
assemble_name (file, fnname);
/* If the function needs GP, we'll write the "..ng" label there.
Otherwise, do it here. */
- if (! TARGET_OPEN_VMS && ! TARGET_WINDOWS_NT
- && ! alpha_function_needs_gp)
+ if (TARGET_ABI_OSF && ! alpha_function_needs_gp)
{
putc ('$', file);
assemble_name (file, fnname);
}
strcpy (entry_label, fnname);
- if (TARGET_OPEN_VMS)
+ if (TARGET_ABI_OPEN_VMS)
strcat (entry_label, "..en");
ASM_OUTPUT_LABEL (file, entry_label);
inside_function = TRUE;
- if (TARGET_OPEN_VMS)
+ if (TARGET_ABI_OPEN_VMS)
fprintf (file, "\t.base $%d\n", vms_base_regno);
- if (!TARGET_OPEN_VMS && TARGET_IEEE_CONFORMANT
+ if (!TARGET_ABI_OPEN_VMS && TARGET_IEEE_CONFORMANT
&& !flag_inhibit_size_directive)
{
/* Set flags in procedure descriptor to request IEEE-conformant
/* Describe our frame. If the frame size is larger than an integer,
print it as zero to avoid an assembler error. We won't be
properly describing such a frame, but that's the best we can do. */
- if (TARGET_OPEN_VMS)
+ if (TARGET_ABI_OPEN_VMS)
{
fprintf (file, "\t.frame $%d,", vms_unwind_regno);
fprintf (file, HOST_WIDE_INT_PRINT_DEC,
}
/* Describe which registers were spilled. */
- if (TARGET_OPEN_VMS)
+ if (TARGET_ABI_OPEN_VMS)
{
if (imask)
/* ??? Does VMS care if mask contains ra? The old code did'nt
}
}
-#ifdef OPEN_VMS
+#if TARGET_ABI_OPEN_VMS
/* Ifdef'ed cause readonly_section and link_section are only
available then. */
readonly_section ();
alpha_output_function_end_prologue (file)
FILE *file;
{
- if (TARGET_OPEN_VMS)
+ if (TARGET_ABI_OPEN_VMS)
fputs ("\t.prologue\n", file);
- else if (TARGET_WINDOWS_NT)
+ else if (TARGET_ABI_WINDOWS_NT)
fputs ("\t.prologue 0\n", file);
else if (!flag_inhibit_size_directive)
fprintf (file, "\t.prologue %d\n", alpha_function_needs_gp);
sa_size = alpha_sa_size ();
frame_size = get_frame_size ();
- if (TARGET_OPEN_VMS)
+ if (TARGET_ABI_OPEN_VMS)
frame_size = ALPHA_ROUND (sa_size
+ (vms_is_stack_procedure ? 8 : 0)
+ frame_size
+ ALPHA_ROUND (frame_size
+ current_function_pretend_args_size));
- if (TARGET_OPEN_VMS)
+ if (TARGET_ABI_OPEN_VMS)
reg_offset = 8;
else
reg_offset = ALPHA_ROUND (current_function_outgoing_args_size);
alpha_sa_mask (&imask, &fmask);
- fp_is_frame_pointer = ((TARGET_OPEN_VMS && vms_is_stack_procedure)
- || (!TARGET_OPEN_VMS && frame_pointer_needed));
+ fp_is_frame_pointer = ((TARGET_ABI_OPEN_VMS && vms_is_stack_procedure)
+ || (!TARGET_ABI_OPEN_VMS && frame_pointer_needed));
fp_offset = 0;
sa_reg = stack_pointer_rtx;
if (sa_size)
{
/* If we have a frame pointer, restore SP from it. */
- if ((TARGET_OPEN_VMS
+ if ((TARGET_ABI_OPEN_VMS
&& vms_unwind_regno == HARD_FRAME_POINTER_REGNUM)
- || (!TARGET_OPEN_VMS && frame_pointer_needed))
+ || (!TARGET_ABI_OPEN_VMS && frame_pointer_needed))
FRP (emit_move_insn (stack_pointer_rtx, hard_frame_pointer_rtx));
/* Cope with very large offsets to the register save area. */
set_mem_alias_set (mem, alpha_sr_alias_set);
FRP (emit_move_insn (hard_frame_pointer_rtx, mem));
}
- else if (TARGET_OPEN_VMS)
+ else if (TARGET_ABI_OPEN_VMS)
{
emit_insn (gen_blockage ());
FRP (emit_move_insn (hard_frame_pointer_rtx,
}
else
{
- if (TARGET_OPEN_VMS && !vms_is_stack_procedure)
+ if (TARGET_ABI_OPEN_VMS && !vms_is_stack_procedure)
{
emit_insn (gen_blockage ());
FRP (emit_move_insn (hard_frame_pointer_rtx,
return 0;
}
-#if OPEN_VMS
+#if TARGET_ABI_OPEN_VMS
/* Return the VMS argument type corresponding to MODE. */
return NULL_RTX;
}
-#endif /* OPEN_VMS */
+#endif /* TARGET_ABI_OPEN_VMS */
(and (eq_attr "cpu" "ev5")
(eq_attr "type" "fadd,fcmov,fmul,fcpys,fbr,fdiv"))
4 1)
-
+
(define_function_unit "ev5_fm" 1 0
(and (eq_attr "cpu" "ev5")
(eq_attr "type" "fmul"))
4 1)
; Add and cmov as you would expect; fbr never produces a result;
-; fdiv issues through fa to the divider,
+; fdiv issues through fa to the divider,
(define_function_unit "ev5_fa" 1 0
(and (eq_attr "cpu" "ev5")
(eq_attr "type" "fadd,fcmov,fbr,fdiv"))
;; EV6 has two symmetric pairs ("clusters") of two asymetric integer units
;; ("upper" and "lower"), yielding pipe names U0, U1, L0, L1.
-;; Conditional moves decompose into two independant primitives, each
+;; Conditional moves decompose into two independant primitives, each
;; taking one cycle. Since ev6 is out-of-order, we can't see anything
;; but two cycles.
(define_function_unit "ev6_ebox" 4 0
;; For the FPU we are very similar to EV5, except there's no insn that
;; can issue to fm & fa, so we get to leave that out.
-
+
(define_function_unit "ev6_fm" 1 0
(and (eq_attr "cpu" "ev6")
(eq_attr "type" "fmul"))
;; (that's a bug, but not one we can do anything about). As of NT4.0 SP3,
;; the exception handling code will loop if a subq is used and an
;; exception occurs.
-;;
+;;
;; The 19980616 change to emit prologues as RTL also confused some
;; versions of GDB, which also interprets prologues. This has been
;; fixed as of GDB 4.18, but it does not harm to unconditionally
(clobber (reg:DI 28))])
(set (match_operand:SI 0 "nonimmediate_operand" "")
(subreg:SI (reg:DI 27) 0))]
- "!TARGET_OPEN_VMS"
+ "! TARGET_ABI_OPEN_VMS"
"")
(define_expand "udivsi3"
(clobber (reg:DI 28))])
(set (match_operand:SI 0 "nonimmediate_operand" "")
(subreg:SI (reg:DI 27) 0))]
- "!TARGET_OPEN_VMS"
+ "! TARGET_ABI_OPEN_VMS"
"")
(define_expand "modsi3"
(clobber (reg:DI 28))])
(set (match_operand:SI 0 "nonimmediate_operand" "")
(subreg:SI (reg:DI 27) 0))]
- "!TARGET_OPEN_VMS"
+ "! TARGET_ABI_OPEN_VMS"
"")
(define_expand "umodsi3"
(clobber (reg:DI 28))])
(set (match_operand:SI 0 "nonimmediate_operand" "")
(subreg:SI (reg:DI 27) 0))]
- "!TARGET_OPEN_VMS"
+ "! TARGET_ABI_OPEN_VMS"
"")
(define_expand "divdi3"
(clobber (reg:DI 28))])
(set (match_operand:DI 0 "nonimmediate_operand" "")
(reg:DI 27))]
- "!TARGET_OPEN_VMS"
+ "! TARGET_ABI_OPEN_VMS"
"")
(define_expand "udivdi3"
(clobber (reg:DI 28))])
(set (match_operand:DI 0 "nonimmediate_operand" "")
(reg:DI 27))]
- "!TARGET_OPEN_VMS"
+ "! TARGET_ABI_OPEN_VMS"
"")
(define_expand "moddi3"
(clobber (reg:DI 28))])
(set (match_operand:DI 0 "nonimmediate_operand" "")
(reg:DI 27))]
- "!TARGET_OPEN_VMS"
+ "! TARGET_ABI_OPEN_VMS"
"")
(define_expand "umoddi3"
(clobber (reg:DI 28))])
(set (match_operand:DI 0 "nonimmediate_operand" "")
(reg:DI 27))]
- "!TARGET_OPEN_VMS"
+ "! TARGET_ABI_OPEN_VMS"
"")
;; Lengths of 8 for ldq $t12,__divq($gp); jsr $t9,($t12),__divq as
[(reg:DI 24) (reg:DI 25)])))
(clobber (reg:DI 23))
(clobber (reg:DI 28))]
- "!TARGET_OPEN_VMS"
+ "! TARGET_ABI_OPEN_VMS"
"%E0 $24,$25,$27"
[(set_attr "type" "jsr")
(set_attr "length" "8")])
[(reg:DI 24) (reg:DI 25)]))
(clobber (reg:DI 23))
(clobber (reg:DI 28))]
- "!TARGET_OPEN_VMS"
+ "! TARGET_ABI_OPEN_VMS"
"%E0 $24,$25,$27"
[(set_attr "type" "jsr")
(set_attr "length" "8")])
if (! TARGET_BWX)
operands[1] = force_reg (QImode, operands[1]);
}")
-
+
(define_insn "*zero_extendqidi2_bwx"
[(set (match_operand:DI 0 "register_operand" "=r,r")
(zero_extend:DI (match_operand:QI 1 "nonimmediate_operand" "r,m")))]
"! TARGET_BWX"
"and %1,0xff,%0"
[(set_attr "type" "ilog")])
-
+
(define_expand "zero_extendhisi2"
[(set (match_operand:SI 0 "register_operand" "")
(zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "")))]
"eqv %r1,%2,%0"
[(set_attr "type" "ilog")])
\f
-;; Handle the FFS insn iff we support CIX.
+;; Handle the FFS insn iff we support CIX.
(define_expand "ffsdi2"
[(set (match_dup 2)
(unspec:DI [(match_operand:DI 1 "register_operand" "r")] UNSPEC_CTTZ))]
"TARGET_CIX"
"cttz %1,%0"
- ; EV6 calls all mvi and cttz/ctlz/popc class imisc, so just
+ ; EV6 calls all mvi and cttz/ctlz/popc class imisc, so just
; reuse the existing type name.
[(set_attr "type" "mvi")])
\f
;; return \"s%P2addl %r1,0,%0\";
;; }"
;; [(set_attr "type" "iadd")])
-
+
(define_insn "lshrdi3"
[(set (match_operand:DI 0 "register_operand" "=r")
(lshiftrt:DI (match_operand:DI 1 "reg_or_0_operand" "rJ")
force_reg (QImode, operands[1])));
DONE;
}
-
+
/* If we have an unaligned MEM, extend to DImode (which we do
specially) and then copy to the result. */
if (unaligned_memory_operand (operands[1], HImode))
[(set_attr "type" "shift")])
;; Combine has some strange notion of preserving existing undefined behaviour
-;; in shifts larger than a word size. So capture these patterns that it
+;; in shifts larger than a word size. So capture these patterns that it
;; should have turned into zero_extracts.
(define_insn "*extxl_1"
;; (match_dup 4)))]
;; "
;;{
-;; operands[6] = plus_constant (operands[3],
+;; operands[6] = plus_constant (operands[3],
;; INTVAL (operands[2]) / BITS_PER_UNIT);
;; operands[7] = GEN_INT (- INTVAL (operands[2]) / BITS_PER_UNIT);
;;}")
-
+
(define_insn "*insbl_const"
[(set (match_operand:DI 0 "register_operand" "=r")
(ashift:DI (zero_extend:DI (match_operand:QI 1 "register_operand" "r"))
bit at bit 48 of the fraction, which is representable in DFmode,
which prevents rounding error in the final conversion to SFmode. */
- emit_insn (gen_rtx_SET (VOIDmode, sticky,
+ emit_insn (gen_rtx_SET (VOIDmode, sticky,
gen_rtx_NE (DImode, lo, const0_rtx)));
emit_insn (gen_iordi3 (hi, hi, sticky));
emit_insn (gen_trunctfdf2 (tmpf, arg));
[(set_attr "type" "icmov")])
(define_expand "umaxdi3"
- [(set (match_dup 3)
+ [(set (match_dup 3)
(leu:DI (match_operand:DI 1 "reg_or_0_operand" "")
(match_operand:DI 2 "reg_or_8bit_operand" "")))
(set (match_operand:DI 0 "register_operand" "")
(define_insn "*movdfcc_internal"
[(set (match_operand:DF 0 "register_operand" "=f,f")
- (if_then_else:DF
+ (if_then_else:DF
(match_operator 3 "signed_comparison_operator"
[(match_operand:DF 4 "reg_or_fp0_operand" "fG,fG")
(match_operand:DF 2 "fp0_operand" "G,G")])
(define_insn "*movsfcc_internal"
[(set (match_operand:SF 0 "register_operand" "=f,f")
- (if_then_else:SF
+ (if_then_else:SF
(match_operator 3 "signed_comparison_operator"
[(match_operand:DF 4 "reg_or_fp0_operand" "fG,fG")
(match_operand:DF 2 "fp0_operand" "G,G")])
(define_insn "*movdfcc_ext1"
[(set (match_operand:DF 0 "register_operand" "=f,f")
- (if_then_else:DF
+ (if_then_else:DF
(match_operator 3 "signed_comparison_operator"
[(match_operand:DF 4 "reg_or_fp0_operand" "fG,fG")
(match_operand:DF 2 "fp0_operand" "G,G")])
(define_insn "*movdfcc_ext2"
[(set (match_operand:DF 0 "register_operand" "=f,f")
- (if_then_else:DF
+ (if_then_else:DF
(match_operator 3 "signed_comparison_operator"
- [(float_extend:DF
+ [(float_extend:DF
(match_operand:SF 4 "reg_or_fp0_operand" "fG,fG"))
(match_operand:DF 2 "fp0_operand" "G,G")])
(match_operand:DF 1 "reg_or_fp0_operand" "fG,0")
(define_insn "*movdfcc_ext3"
[(set (match_operand:SF 0 "register_operand" "=f,f")
- (if_then_else:SF
+ (if_then_else:SF
(match_operator 3 "signed_comparison_operator"
[(float_extend:DF
(match_operand:SF 4 "reg_or_fp0_operand" "fG,fG"))
(define_insn "*movdfcc_ext4"
[(set (match_operand:DF 0 "register_operand" "=f,f")
- (if_then_else:DF
+ (if_then_else:DF
(match_operator 3 "signed_comparison_operator"
[(float_extend:DF
(match_operand:SF 4 "reg_or_fp0_operand" "fG,fG"))
&& ! (extended_count (operands[2], DImode, unsignedp) >= 1
&& extended_count (operands[3], DImode, unsignedp) >= 1)))
FAIL;
-
+
if (GET_CODE (operands[3]) == CONST_INT)
tem = gen_rtx_PLUS (SImode, operands[2],
GEN_INT (- INTVAL (operands[3])));
GEN_INT (- INTVAL (operands[3])));
else
tem = gen_rtx_MINUS (SImode, operands[2], operands[3]);
-
+
operands[5] = gen_rtx_SIGN_EXTEND (DImode, tem);
operands[6] = gen_rtx_fmt_ee (GET_CODE (operands[1]), VOIDmode,
operands[4], const0_rtx);
(use (match_operand 3 "" ""))]
""
"
-{ if (TARGET_WINDOWS_NT)
+{ if (TARGET_ABI_WINDOWS_NT)
emit_call_insn (gen_call_nt (operands[0], operands[1]));
- else if (TARGET_OPEN_VMS)
+ else if (TARGET_ABI_OPEN_VMS)
emit_call_insn (gen_call_vms (operands[0], operands[2]));
else
emit_call_insn (gen_call_osf (operands[0], operands[1]));
(define_expand "sibcall"
[(call (mem:DI (match_operand 0 "" ""))
(match_operand 1 "" ""))]
- "!TARGET_OPEN_VMS && !TARGET_WINDOWS_NT"
+ "TARGET_ABI_OSF"
"
{
if (GET_CODE (operands[0]) != MEM)
(use (match_operand 4 "" ""))]
""
"
-{ if (TARGET_WINDOWS_NT)
+{
+ if (TARGET_ABI_WINDOWS_NT)
emit_call_insn (gen_call_value_nt (operands[0], operands[1], operands[2]));
- else if (TARGET_OPEN_VMS)
+ else if (TARGET_ABI_OPEN_VMS)
emit_call_insn (gen_call_value_vms (operands[0], operands[1],
operands[3]));
else
[(set (match_operand 0 "" "")
(call (mem:DI (match_operand 1 "" ""))
(match_operand 2 "" "")))]
- "!TARGET_OPEN_VMS && !TARGET_WINDOWS_NT"
+ "TARGET_ABI_OSF"
"
{
if (GET_CODE (operands[1]) != MEM)
(match_operand 1 "" ""))
(clobber (reg:DI 27))
(clobber (reg:DI 26))]
- "! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS
- && find_reg_note (insn, REG_NORETURN, NULL_RTX)"
+ "TARGET_ABI_OSF && find_reg_note (insn, REG_NORETURN, NULL_RTX)"
"@
jsr $26,($27),0
bsr $26,$%0..ng
jsr $26,%0"
[(set_attr "type" "jsr")
(set_attr "length" "*,*,8")])
-
+
(define_insn "*call_osf_1"
[(call (mem:DI (match_operand:DI 0 "call_operand" "c,R,i"))
(match_operand 1 "" ""))
(clobber (reg:DI 27))
(clobber (reg:DI 26))]
- "! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS"
+ "TARGET_ABI_OSF"
"@
jsr $26,($27),0\;ldgp $29,0($26)
bsr $26,$%0..ng
jsr $26,%0\;ldgp $29,0($26)"
[(set_attr "type" "jsr")
(set_attr "length" "12,*,16")])
-
+
(define_insn "*sibcall_osf_1"
[(call (mem:DI (match_operand:DI 0 "call_operand" "R,i"))
(match_operand 1 "" ""))]
- "! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS"
+ "TARGET_ABI_OSF"
"@
br $31,$%0..ng
jmp $31,%0"
[(call (mem:DI (match_operand:DI 0 "call_operand" "r,R,i"))
(match_operand 1 "" ""))
(clobber (reg:DI 26))]
- "TARGET_WINDOWS_NT"
+ "TARGET_ABI_WINDOWS_NT"
"@
jsr $26,(%0)
bsr $26,%0
jsr $26,%0"
[(set_attr "type" "jsr")
(set_attr "length" "*,*,12")])
-
+
(define_insn "*call_vms_1"
[(call (mem:DI (match_operand:DI 0 "call_operand" "r,i"))
(match_operand 1 "" ""))
(use (reg:DI 25))
(use (reg:DI 26))
(clobber (reg:DI 27))]
- "TARGET_OPEN_VMS"
+ "TARGET_ABI_OPEN_VMS"
"@
mov %2,$27\;jsr $26,0\;ldq $27,0($29)
ldq $27,%2\;jsr $26,%0\;ldq $27,0($29)"
""
"
{
- if (TARGET_WINDOWS_NT)
+ if (TARGET_ABI_WINDOWS_NT)
emit_jump_insn (gen_tablejump_nt (operands[0], operands[1]));
- else if (TARGET_OPEN_VMS)
+ else if (TARGET_ABI_OPEN_VMS)
emit_jump_insn (gen_tablejump_vms (operands[0], operands[1]));
else
emit_jump_insn (gen_tablejump_osf (operands[0], operands[1]));
(plus (match_operand:DI 0 "register_operand" "r")
(label_ref (match_operand 1 "" ""))))
(clobber (match_scratch:DI 2 "=r"))]
- "! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS && next_active_insn (insn) != 0
+ "TARGET_ABI_OSF && next_active_insn (insn) != 0
&& GET_CODE (PATTERN (next_active_insn (insn))) == ADDR_DIFF_VEC
&& PREV_INSN (next_active_insn (insn)) == operands[1]"
"*
[(set (pc)
(match_operand:DI 0 "register_operand" "r"))
(use (label_ref (match_operand 1 "" "")))]
- "TARGET_WINDOWS_NT && next_active_insn (insn) != 0
+ "TARGET_ABI_WINDOWS_NT && next_active_insn (insn) != 0
&& GET_CODE (PATTERN (next_active_insn (insn))) == ADDR_DIFF_VEC
&& PREV_INSN (next_active_insn (insn)) == operands[1]"
"*
[(set (pc)
(plus (match_operand:DI 0 "register_operand" "r")
(label_ref (match_operand 1 "" ""))))]
- "TARGET_OPEN_VMS"
+ "TARGET_ABI_OPEN_VMS"
"jmp $31,(%0),0"
[(set_attr "type" "ibr")])
(define_insn "*movsi_nofix"
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,m,*f,*f,m")
(match_operand:SI 1 "input_operand" "rJ,K,L,m,rJ,*fJ,m,*f"))]
- "! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS && ! TARGET_FIX
+ "TARGET_ABI_OSF && ! TARGET_FIX
&& (register_operand (operands[0], SImode)
|| reg_or_0_operand (operands[1], SImode))"
"@
(define_insn "*movsi_fix"
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,m,*f,*f,m,r,*f")
(match_operand:SI 1 "input_operand" "rJ,K,L,m,rJ,*fJ,m,*f,*f,r"))]
- "! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS && TARGET_FIX
+ "TARGET_ABI_OSF && TARGET_FIX
&& (register_operand (operands[0], SImode)
|| reg_or_0_operand (operands[1], SImode))"
"@
(define_insn "*movsi_nt_vms"
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,r,m,*f,*f,m")
(match_operand:SI 1 "input_operand" "rJ,K,L,s,m,rJ,*fJ,m,*f"))]
- "(TARGET_WINDOWS_NT || TARGET_OPEN_VMS)
+ "(TARGET_ABI_WINDOWS_NT || TARGET_ABI_OPEN_VMS)
&& (register_operand (operands[0], SImode)
|| reg_or_0_operand (operands[1], SImode))"
"@
}
else
abort();
-
+
tem = alpha_emit_set_long_const (operands[0], i0, i1);
if (rtx_equal_p (tem, operands[0]))
DONE;
(zero_extract:DI (subreg:DI (match_dup 3) 0)
(const_int 8)
(match_operand:DI 2 "const_int_operand" "")))]
-
+
""
"")
-
+
(define_expand "aligned_loadhi"
[(set (match_operand:SI 3 "register_operand" "")
(match_operand:SI 1 "memory_operand" ""))
(zero_extract:DI (subreg:DI (match_dup 3) 0)
(const_int 16)
(match_operand:DI 2 "const_int_operand" "")))]
-
+
""
"")
-
+
;; Similar for unaligned loads, where we use the sequence from the
;; Alpha Architecture manual.
;;
"")
;; Storing an aligned byte or word requires two temporaries. Operand 0 is the
-;; aligned SImode MEM. Operand 1 is the register containing the
+;; aligned SImode MEM. Operand 1 is the register containing the
;; byte or word to store. Operand 2 is the number of bits within the word that
;; the value should be placed. Operands 3 and 4 are SImode temporaries.
}
else if (GET_CODE (operands[0]) == MEM
- || (GET_CODE (operands[0]) == SUBREG
+ || (GET_CODE (operands[0]) == SUBREG
&& GET_CODE (SUBREG_REG (operands[0])) == MEM)
|| (reload_in_progress && GET_CODE (operands[0]) == REG
&& REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER)
}
else if (GET_CODE (operands[0]) == MEM
- || (GET_CODE (operands[0]) == SUBREG
+ || (GET_CODE (operands[0]) == SUBREG
&& GET_CODE (SUBREG_REG (operands[0])) == MEM)
|| (reload_in_progress && GET_CODE (operands[0]) == REG
&& REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER)
if (aligned_memory_operand (operands[1], HImode))
{
- seq = gen_reload_inhi_help (operands[0], operands[1],
+ seq = gen_reload_inhi_help (operands[0], operands[1],
gen_rtx_REG (SImode, REGNO (operands[2])));
}
else
operands[2]));
DONE;
}")
-
+
(define_split
[(set (match_operand:HI 0 "register_operand" "")
(match_operand:HI 1 "memory_operand" ""))
operands[2]));
DONE;
}")
-
+
(define_split
[(set (match_operand:QI 0 "memory_operand" "")
(match_operand:QI 1 "register_operand" ""))
;; bytes, we need do nothing.
;;
;; If it is more than 4096 bytes, we need to probe the stack
-;; periodically.
+;; periodically.
(define_expand "allocate_stack"
[(set (reg:DI 30)
(plus:DI (reg:DI 30)
(define_expand "sibcall_epilogue"
[(return)]
- "!TARGET_OPEN_VMS && !TARGET_WINDOWS_NT"
+ "TARGET_ABI_OSF"
"
{
alpha_expand_epilogue ();
(define_expand "builtin_longjmp"
[(use (match_operand:DI 0 "register_operand" "r"))]
- "! TARGET_OPEN_VMS && ! TARGET_WINDOWS_NT"
+ "TARGET_ABI_OSF"
"
{
/* The elements of the buffer are, in order: */
(define_insn "*builtin_setjmp_receiver_sub_label"
[(unspec_volatile [(label_ref (match_operand 0 "" ""))] UNSPECV_SETJMPR)]
- "! TARGET_OPEN_VMS && ! TARGET_WINDOWS_NT && TARGET_AS_CAN_SUBTRACT_LABELS"
+ "TARGET_ABI_OSF && TARGET_AS_CAN_SUBTRACT_LABELS"
"\\n$LSJ%=:\;ldgp $29,$LSJ%=-%l0($27)"
[(set_attr "length" "8")
(set_attr "type" "multi")])
(define_insn "builtin_setjmp_receiver"
[(unspec_volatile [(label_ref (match_operand 0 "" ""))] UNSPECV_SETJMPR)]
- "! TARGET_OPEN_VMS && ! TARGET_WINDOWS_NT"
+ "TARGET_ABI_OSF"
"br $29,$LSJ%=\\n$LSJ%=:\;ldgp $29,0($29)"
[(set_attr "length" "12")
(set_attr "type" "multi")])
(define_expand "exception_receiver"
[(unspec_volatile [(match_dup 0)] UNSPECV_EHR)]
- "! TARGET_OPEN_VMS && ! TARGET_WINDOWS_NT"
+ "TARGET_ABI_OSF"
"
{
if (TARGET_LD_BUGGY_LDGP)
(set (reg:DI 27) (mem:DI (reg:DI 29)))
(unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE)
(use (reg:DI 27))]
- "TARGET_OPEN_VMS"
+ "TARGET_ABI_OPEN_VMS"
"")
(define_insn "arg_home"
(clobber (reg:DI 24))
(clobber (reg:DI 25))
(clobber (reg:DI 0))]
- "TARGET_OPEN_VMS"
+ "TARGET_ABI_OPEN_VMS"
"lda $0,OTS$HOME_ARGS\;ldq $0,8($0)\;jsr $0,OTS$HOME_ARGS"
[(set_attr "length" "16")
(set_attr "type" "multi")])
(match_operand 2 "" "")))
(clobber (reg:DI 27))
(clobber (reg:DI 26))]
- "! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS"
+ "TARGET_ABI_OSF"
"@
jsr $26,($27),0\;ldgp $29,0($26)
bsr $26,$%1..ng
[(set (match_operand 0 "" "")
(call (mem:DI (match_operand:DI 1 "call_operand" "R,i"))
(match_operand 2 "" "")))]
- "! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS"
+ "TARGET_ABI_OSF"
"@
br $31,$%1..ng
jmp $31,%1"
(call (mem:DI (match_operand:DI 1 "call_operand" "r,R,i"))
(match_operand 2 "" "")))
(clobber (reg:DI 26))]
- "TARGET_WINDOWS_NT"
+ "TARGET_ABI_WINDOWS_NT"
"@
jsr $26,(%1)
bsr $26,%1
(use (reg:DI 25))
(use (reg:DI 26))
(clobber (reg:DI 27))]
- "TARGET_OPEN_VMS"
+ "TARGET_ABI_OPEN_VMS"
"@
mov %3,$27\;jsr $26,0\;ldq $27,0($29)
ldq $27,%3\;jsr $26,%1\;ldq $27,0($29)"
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