return 1;
case LT: case GE:
inmode = GET_MODE (XEXP (op, 0));
- if (inmode == CCmode || inmode == CCGCmode
+ if (inmode == CCmode || inmode == CCGCmode || inmode == CCRCmode
|| inmode == CCGOCmode || inmode == CCNOmode)
return 1;
return 0;
- case LTU: case GTU: case LEU: case ORDERED: case UNORDERED: case GEU:
+ case LTU: case GTU:
inmode = GET_MODE (XEXP (op, 0));
- if (inmode == CCmode)
+ return inmode == CCmode;
+ case LEU: case ORDERED: case UNORDERED: case GEU:
+ inmode = GET_MODE (XEXP (op, 0));
+ if (inmode == CCmode || inmode == CCRCmode)
return 1;
return 0;
case GT: case LE:
inmode = GET_MODE (XEXP (op, 0));
- if (inmode == CCmode || inmode == CCGCmode || inmode == CCNOmode)
+ if (inmode == CCmode || inmode == CCGCmode || inmode == CCNOmode
+ || inmode == CCRCmode)
return 1;
return 0;
default:
suffix = "ne";
break;
case GT:
- if (mode != CCmode && mode != CCNOmode && mode != CCGCmode)
+ if (mode != CCmode && mode != CCNOmode && mode != CCGCmode
+ && mode != CCRCmode)
abort ();
suffix = "g";
break;
case GTU:
/* ??? Use "nbe" instead of "a" for fcmov losage on some assemblers.
Those same assemblers have the same but opposite losage on cmov. */
- if (mode != CCmode)
+ if (mode != CCmode && mode != CCRCmode)
abort ();
suffix = fp ? "nbe" : "a";
break;
case LT:
if (mode == CCNOmode || mode == CCGOCmode)
suffix = "s";
- else if (mode == CCmode || mode == CCGCmode)
+ else if (mode == CCmode || mode == CCGCmode || mode == CCRCmode)
suffix = "l";
else
abort ();
case GE:
if (mode == CCNOmode || mode == CCGOCmode)
suffix = "ns";
- else if (mode == CCmode || mode == CCGCmode)
+ else if (mode == CCmode || mode == CCGCmode || mode == CCRCmode)
suffix = "ge";
else
abort ();
break;
case GEU:
/* ??? As above. */
- if (mode != CCmode)
+ if (mode != CCmode && mode != CCRCmode)
abort ();
- suffix = fp ? "nb" : "ae";
+ if (mode == CCRCmode)
+ suffix = "be";
+ else
+ suffix = fp ? "nb" : "ae";
break;
case LE:
- if (mode != CCmode && mode != CCGCmode && mode != CCNOmode)
+ if (mode != CCmode && mode != CCGCmode && mode != CCNOmode
+ && mode != CCRCmode)
abort ();
suffix = "le";
break;
case LEU:
if (mode != CCmode)
abort ();
- suffix = "be";
+ if (mode == CCRCmode)
+ suffix = fp ? "nb" : "ae";
+ else
+ suffix = "be";
break;
case UNORDERED:
suffix = "p";
return 0;
break;
case CCmode:
+ if (req_mode == CCRCmode)
+ return 0;
+ goto no_carry;
+ case CCRCmode:
+ if (req_mode == CCmode)
+ return 0;
+ no_carry:
if (req_mode == CCGCmode)
return 0;
/* FALLTHRU */
case NE: /* ZF!=0 */
return CCZmode;
/* Codes needing carry flag. */
- case GEU: /* CF=0 */
- case GTU: /* CF=0 & ZF=0 */
case LTU: /* CF=1 */
case LEU: /* CF=1 | ZF=1 */
return CCmode;
+ case GEU: /* CF=0 */
+ case GTU: /* CF=0 & ZF=0 */
+ if (GET_CODE (op1) == NEG)
+ return CCRCmode;
+ return CCmode;
/* Codes possibly doable only with sign flag when
comparing against zero. */
case GE: /* SF=OF or SF=0 */
/* Avoid branch in fixing the byte. */
tmpreg = gen_lowpart (QImode, tmpreg);
- emit_insn (gen_addqi3_cc (tmpreg, tmpreg, tmpreg));
- emit_insn (gen_subsi3_carry (out, out, GEN_INT (3)));
+ emit_insn (gen_addqi3_ccrc (tmpreg, tmpreg, tmpreg));
+ emit_insn (gen_subsi3_carry_rc (out, out, GEN_INT (3)));
emit_label (end_0_label);
}
(match_operand:DI 2 "general_operand" "")))
(clobber (reg:CC 17))]
"reload_completed"
- [(parallel [(set (reg:CC 17) (compare:CC (neg:SI (match_dup 2)) (match_dup 1)))
+ [(parallel [(set (reg:CCRC 17)
+ (compare:CCRC (match_dup 1) (neg:SI (match_dup 2))))
(set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2)))])
(parallel [(set (match_dup 3)
- (plus:SI (plus:SI (ltu:SI (reg:CC 17) (const_int 0))
+ (plus:SI (plus:SI (gtu:SI (reg:CCRC 17) (const_int 0))
(match_dup 4))
(match_dup 5)))
(clobber (reg:CC 17))])]
(set_attr "mode" "SI")
(set_attr "ppro_uops" "few")])
+(define_insn "*addsi3_carry_rc"
+ [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
+ (plus:SI (plus:SI (gtu:SI (reg:CCRC 17) (const_int 0))
+ (match_operand:SI 1 "nonimmediate_operand" "%0,0"))
+ (match_operand:SI 2 "general_operand" "ri,rm")))
+ (clobber (reg:CC 17))]
+ "ix86_binary_operator_ok (PLUS, SImode, operands)"
+ "adc{l}\\t{%2, %0|%0, %2}"
+ [(set_attr "type" "alu")
+ (set_attr "pent_pair" "pu")
+ (set_attr "mode" "SI")
+ (set_attr "ppro_uops" "few")])
+
(define_expand "addsi3"
[(parallel [(set (match_operand:SI 0 "nonimmediate_operand" "")
(plus:SI (match_operand:SI 1 "nonimmediate_operand" "")
(define_insn "*addsi_3"
[(set (reg 17)
- (compare (neg:SI (match_operand:SI 2 "general_operand" "rmni"))
- (match_operand:SI 1 "nonimmediate_operand" "%0")))
+ (compare (match_operand:SI 1 "nonimmediate_operand" "%0")
+ (neg:SI (match_operand:SI 2 "general_operand" "rmni"))))
(clobber (match_scratch:SI 0 "=r"))]
"ix86_match_ccmode (insn, CCGCmode)
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)
(define_insn "*addsi_4"
[(set (reg 17)
- (compare (neg:SI (match_operand:SI 2 "general_operand" "rmni,rni"))
- (match_operand:SI 1 "nonimmediate_operand" "%0,0")))
+ (compare (match_operand:SI 1 "nonimmediate_operand" "%0,0")
+ (neg:SI (match_operand:SI 2 "general_operand" "rmni,rni"))))
(set (match_operand:SI 0 "nonimmediate_operand" "=r,rm")
(plus:SI (match_dup 1) (match_dup 2)))]
"ix86_binary_operator_ok (PLUS, SImode, operands)
- && ix86_match_ccmode (insn, CCmode)
+ && ix86_match_ccmode (insn, CCRCmode)
/* Current assemblers are broken and do not allow @GOTOFF in
ought but a memory context. */
&& ! pic_symbolic_operand (operands[2], VOIDmode)"
(define_insn "*addsi_5"
[(set (reg 17)
- (compare (neg:SI (match_operand:SI 2 "general_operand" "rmni"))
- (match_operand:SI 1 "nonimmediate_operand" "%0")))
+ (compare (match_operand:SI 1 "nonimmediate_operand" "%0")
+ (neg:SI (match_operand:SI 2 "general_operand" "rmni"))))
(clobber (match_scratch:SI 0 "=r"))]
"(GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)
- && ix86_match_ccmode (insn, CCmode)
+ && ix86_match_ccmode (insn, CCRCmode)
/* Current assemblers are broken and do not allow @GOTOFF in
ought but a memory context. */
&& ! pic_symbolic_operand (operands[2], VOIDmode)"
(define_insn "*addhi_3"
[(set (reg 17)
- (compare (neg:HI (match_operand:HI 2 "general_operand" "rmni"))
- (match_operand:HI 1 "nonimmediate_operand" "%0")))
+ (compare (match_operand:HI 1 "nonimmediate_operand" "%0")
+ (neg:HI (match_operand:HI 2 "general_operand" "rmni"))))
(clobber (match_scratch:HI 0 "=r"))]
"ix86_match_ccmode (insn, CCGCmode)
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
(define_insn "*addhi_4"
[(set (reg 17)
- (compare (neg:HI (match_operand:HI 2 "general_operand" "rmni,rni"))
- (match_operand:HI 1 "nonimmediate_operand" "%0,0")))
+ (compare (match_operand:HI 1 "nonimmediate_operand" "%0,0")
+ (neg:HI (match_operand:HI 2 "general_operand" "rmni,rni"))))
(set (match_operand:HI 0 "nonimmediate_operand" "=r,rm")
(plus:HI (match_dup 1) (match_dup 2)))]
- "ix86_match_ccmode (insn, CCmode)
+ "ix86_match_ccmode (insn, CCRCmode)
&& ix86_binary_operator_ok (PLUS, HImode, operands)"
"add{w}\\t{%2, %0|%0, %2}"
[(set_attr "type" "alu")
(define_insn "*addhi_5"
[(set (reg 17)
- (compare (neg:HI (match_operand:HI 2 "general_operand" "rmni"))
- (match_operand:HI 1 "nonimmediate_operand" "%0")))
+ (compare (match_operand:HI 1 "nonimmediate_operand" "%0")
+ (neg:HI (match_operand:HI 2 "general_operand" "rmni"))))
(clobber (match_scratch:HI 0 "=r"))]
- "ix86_match_ccmode (insn, CCmode)
+ "ix86_match_ccmode (insn, CCRCmode)
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
"add{w}\\t{%2, %0|%0, %2}"
[(set_attr "type" "alu")
(define_insn "*addqi_3"
[(set (reg 17)
- (compare (neg:QI (match_operand:QI 2 "general_operand" "qmni"))
- (match_operand:QI 1 "nonimmediate_operand" "%0")))
+ (compare (match_operand:QI 1 "nonimmediate_operand" "%0")
+ (neg:QI (match_operand:QI 2 "general_operand" "qmni"))))
(clobber (match_scratch:QI 0 "=r"))]
"ix86_match_ccmode (insn, CCGCmode)
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
(define_insn "*addqi_4"
[(set (reg 17)
- (compare (neg:QI (match_operand:QI 2 "general_operand" "qmni,qni"))
- (match_operand:QI 1 "nonimmediate_operand" "%0,0")))
+ (compare (match_operand:QI 1 "nonimmediate_operand" "%0,0")
+ (neg:QI (match_operand:QI 2 "general_operand" "qmni,qni"))))
(set (match_operand:QI 0 "nonimmediate_operand" "=q,qm")
(plus:QI (match_dup 1) (match_dup 2)))]
- "ix86_match_ccmode (insn, CCmode)
+ "ix86_match_ccmode (insn, CCRCmode)
&& ix86_binary_operator_ok (PLUS, QImode, operands)"
"add{b}\\t{%2, %0|%0, %2}"
[(set_attr "type" "alu")
(set_attr "mode" "QI")])
-(define_expand "addqi3_cc"
+(define_expand "addqi3_ccrc"
[(parallel [
- (set (reg:CC 17)
- (compare:CC (neg:QI (match_operand:QI 2 "general_operand" ""))
- (match_operand:QI 1 "nonimmediate_operand" "")))
+ (set (reg:CCRC 17)
+ (compare:CCRC (match_operand:QI 1 "nonimmediate_operand" "")
+ (neg:QI (match_operand:QI 2 "general_operand" ""))))
(clobber (match_scratch:QI 0 ""))])]
""
"")
(define_insn "*addqi_5"
[(set (reg 17)
- (compare (neg:QI (match_operand:QI 2 "general_operand" "qmni"))
- (match_operand:QI 1 "nonimmediate_operand" "%0")))
+ (compare (match_operand:QI 1 "nonimmediate_operand" "%0")
+ (neg:QI (match_operand:QI 2 "general_operand" "qmni"))))
(clobber (match_scratch:QI 0 "=r"))]
- "ix86_match_ccmode (insn, CCmode)
+ "ix86_match_ccmode (insn, CCRCmode)
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
"add{b}\\t{%2, %0|%0, %2}"
[(set_attr "type" "alu")
split_di (operands+1, 1, operands+1, operands+4);
split_di (operands+2, 1, operands+2, operands+5);")
-(define_insn "subsi3_carry"
+(define_insn "*subsi3_carry"
[(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
(minus:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
(plus:SI (ltu:SI (reg:CC 17) (const_int 0))
(set_attr "ppro_uops" "few")
(set_attr "mode" "SI")])
+(define_insn "subsi3_carry_rc"
+ [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
+ (minus:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
+ (plus:SI (gtu:SI (reg:CCRC 17) (const_int 0))
+ (match_operand:SI 2 "general_operand" "ri,rm"))))
+ (clobber (reg:CC 17))]
+ "ix86_binary_operator_ok (MINUS, SImode, operands)"
+ "sbb{l}\\t{%2, %0|%0, %2}"
+ [(set_attr "type" "alu")
+ (set_attr "pent_pair" "pu")
+ (set_attr "ppro_uops" "few")
+ (set_attr "mode" "SI")])
+
(define_expand "subsi3"
[(parallel [(set (match_operand:SI 0 "nonimmediate_operand" "")
(minus:SI (match_operand:SI 1 "nonimmediate_operand" "")
(set (match_dup 0) (neg:SI (match_dup 2)))])
(parallel
[(set (match_dup 1)
- (plus:SI (plus:SI (ltu:SI (reg:CC 17) (const_int 0))
+ (plus:SI (plus:SI (gtu:SI (reg:CCRC 17) (const_int 0))
(match_dup 3))
(const_int 0)))
(clobber (reg:CC 17))])
(set_attr "mode" "SI")
(set_attr "length_immediate" "0")])
+(define_insn "x86_movsicc_0_m1_rc"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (if_then_else:SI (gtu (reg:CCRC 17) (const_int 0))
+ (const_int -1)
+ (const_int 0)))
+ (clobber (reg:CC 17))]
+ ""
+ "sbb{l}\\t%0, %0"
+ ; Since we don't have the proper number of operands for an alu insn,
+ ; fill in all the blanks.
+ [(set_attr "type" "alu")
+ (set_attr "memory" "none")
+ (set_attr "imm_disp" "false")
+ (set_attr "mode" "SI")
+ (set_attr "length_immediate" "0")])
+
(define_insn "*movsicc_noc"
[(set (match_operand:SI 0 "register_operand" "=r,r")
(if_then_else:SI (match_operator 1 "ix86_comparison_operator"
"ix86_match_ccmode (insn, CCGCmode)
&& find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
[(parallel [(set (reg:CCGC 17)
- (compare:CCGC (neg:SI (match_dup 1))
- (match_dup 0)))
+ (compare:CCGC (match_dup 0)
+ (neg:SI (match_dup 1))))
(clobber (match_dup 0))])]
"operands[1] = (operands[1] == const1_rtx) ? constm1_rtx : const1_rtx;")
"ix86_match_ccmode (insn, CCGCmode)
&& find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
[(parallel [(set (reg:CCGC 17)
- (compare:CCGC (neg:HI (match_dup 1))
- (match_dup 0)))
+ (compare:CCGC (match_dup 0)
+ (neg:HI (match_dup 1))))
(clobber (match_dup 0))])]
"operands[1] = (operands[1] == const1_rtx) ? constm1_rtx : const1_rtx;")
"ix86_match_ccmode (insn, CCGCmode)
&& find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
[(parallel [(set (reg:CCGC 17)
- (compare:CCGC (neg:QI (match_dup 1))
- (match_dup 0)))
+ (compare:CCGC (match_dup 0)
+ (neg:QI (match_dup 1))))
(clobber (match_dup 0))])]
"operands[1] = (operands[1] == const1_rtx) ? constm1_rtx : const1_rtx;")
[(set (reg 17)
(compare (match_operand:SI 0 "register_operand" "")
(const_int 128)))]
- "ix86_match_ccmode (insn, CCmode)
+ "ix86_match_ccmode (insn, CCRCmode)
&& find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
- [(parallel [(set (reg:CC 17)
- (compare:CC (neg:SI (const_int -128))
- (match_dup 0)))
+ [(parallel [(set (reg:CCRC 17)
+ (compare:CCRC (match_dup 0)
+ (neg:SI (const_int -128))))
(clobber (match_dup 0))])]
"")
[(set (reg 17)
(compare (match_operand:HI 0 "register_operand" "")
(const_int 128)))]
- "ix86_match_ccmode (insn, CCmode)
+ "ix86_match_ccmode (insn, CCRCmode)
&& find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
- [(parallel [(set (reg:CC 17)
- (compare:CC (neg:HI (const_int -128))
- (match_dup 0)))
+ [(parallel [(set (reg:CCRC 17)
+ (compare:CCRC (match_dup 0)
+ (neg:HI (const_int -128))))
(clobber (match_dup 0))])]
"")
\f