1 /* RTL simplification functions for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
29 #include "hard-reg-set.h"
32 #include "insn-config.h"
40 /* Simplification and canonicalization of RTL. */
42 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
43 virtual regs here because the simplify_*_operation routines are called
44 by integrate.c, which is called before virtual register instantiation.
46 ?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
47 a header file so that their definitions can be shared with the
48 simplification routines in simplify-rtx.c. Until then, do not
49 change these macros without also changing the copy in simplify-rtx.c. */
51 #define FIXED_BASE_PLUS_P(X) \
52 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
53 || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\
54 || (X) == virtual_stack_vars_rtx \
55 || (X) == virtual_incoming_args_rtx \
56 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
57 && (XEXP (X, 0) == frame_pointer_rtx \
58 || XEXP (X, 0) == hard_frame_pointer_rtx \
59 || ((X) == arg_pointer_rtx \
60 && fixed_regs[ARG_POINTER_REGNUM]) \
61 || XEXP (X, 0) == virtual_stack_vars_rtx \
62 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
63 || GET_CODE (X) == ADDRESSOF)
65 /* Similar, but also allows reference to the stack pointer.
67 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
68 arg_pointer_rtx by itself is nonzero, because on at least one machine,
69 the i960, the arg pointer is zero when it is unused. */
71 #define NONZERO_BASE_PLUS_P(X) \
72 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
73 || (X) == virtual_stack_vars_rtx \
74 || (X) == virtual_incoming_args_rtx \
75 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
76 && (XEXP (X, 0) == frame_pointer_rtx \
77 || XEXP (X, 0) == hard_frame_pointer_rtx \
78 || ((X) == arg_pointer_rtx \
79 && fixed_regs[ARG_POINTER_REGNUM]) \
80 || XEXP (X, 0) == virtual_stack_vars_rtx \
81 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
82 || (X) == stack_pointer_rtx \
83 || (X) == virtual_stack_dynamic_rtx \
84 || (X) == virtual_outgoing_args_rtx \
85 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
86 && (XEXP (X, 0) == stack_pointer_rtx \
87 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
88 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
89 || GET_CODE (X) == ADDRESSOF)
91 /* Much code operates on (low, high) pairs; the low value is an
92 unsigned wide int, the high value a signed wide int. We
93 occasionally need to sign extend from low to high as if low were a
95 #define HWI_SIGN_EXTEND(low) \
96 ((((HOST_WIDE_INT) low) < 0) ? ((HOST_WIDE_INT) -1) : ((HOST_WIDE_INT) 0))
98 static rtx neg_const_int PARAMS ((enum machine_mode, rtx));
99 static int simplify_plus_minus_op_data_cmp PARAMS ((const void *,
101 static rtx simplify_plus_minus PARAMS ((enum rtx_code,
102 enum machine_mode, rtx,
104 static void check_fold_consts PARAMS ((PTR));
105 static void simplify_unary_real PARAMS ((PTR));
106 static void simplify_binary_real PARAMS ((PTR));
107 static void simplify_binary_is2orm1 PARAMS ((PTR));
110 /* Negate a CONST_INT rtx, truncating (because a conversion from a
111 maximally negative number can overflow). */
113 neg_const_int (mode, i)
114 enum machine_mode mode;
117 return gen_int_mode (- INTVAL (i), mode);
121 /* Make a binary operation by properly ordering the operands and
122 seeing if the expression folds. */
125 simplify_gen_binary (code, mode, op0, op1)
127 enum machine_mode mode;
132 /* Put complex operands first and constants second if commutative. */
133 if (GET_RTX_CLASS (code) == 'c'
134 && swap_commutative_operands_p (op0, op1))
135 tem = op0, op0 = op1, op1 = tem;
137 /* If this simplifies, do it. */
138 tem = simplify_binary_operation (code, mode, op0, op1);
142 /* Handle addition and subtraction specially. Otherwise, just form
145 if (code == PLUS || code == MINUS)
147 tem = simplify_plus_minus (code, mode, op0, op1, 1);
152 return gen_rtx_fmt_ee (code, mode, op0, op1);
155 /* If X is a MEM referencing the constant pool, return the real value.
156 Otherwise return X. */
158 avoid_constant_pool_reference (x)
162 enum machine_mode cmode;
164 if (GET_CODE (x) != MEM)
168 if (GET_CODE (addr) != SYMBOL_REF
169 || ! CONSTANT_POOL_ADDRESS_P (addr))
172 c = get_pool_constant (addr);
173 cmode = get_pool_mode (addr);
175 /* If we're accessing the constant in a different mode than it was
176 originally stored, attempt to fix that up via subreg simplifications.
177 If that fails we have no choice but to return the original memory. */
178 if (cmode != GET_MODE (x))
180 c = simplify_subreg (GET_MODE (x), c, cmode, 0);
187 /* Make a unary operation by first seeing if it folds and otherwise making
188 the specified operation. */
191 simplify_gen_unary (code, mode, op, op_mode)
193 enum machine_mode mode;
195 enum machine_mode op_mode;
199 /* If this simplifies, use it. */
200 if ((tem = simplify_unary_operation (code, mode, op, op_mode)) != 0)
203 return gen_rtx_fmt_e (code, mode, op);
206 /* Likewise for ternary operations. */
209 simplify_gen_ternary (code, mode, op0_mode, op0, op1, op2)
211 enum machine_mode mode, op0_mode;
216 /* If this simplifies, use it. */
217 if (0 != (tem = simplify_ternary_operation (code, mode, op0_mode,
221 return gen_rtx_fmt_eee (code, mode, op0, op1, op2);
224 /* Likewise, for relational operations.
225 CMP_MODE specifies mode comparison is done in.
229 simplify_gen_relational (code, mode, cmp_mode, op0, op1)
231 enum machine_mode mode;
232 enum machine_mode cmp_mode;
237 if ((tem = simplify_relational_operation (code, cmp_mode, op0, op1)) != 0)
240 /* Put complex operands first and constants second. */
241 if (swap_commutative_operands_p (op0, op1))
242 tem = op0, op0 = op1, op1 = tem, code = swap_condition (code);
244 return gen_rtx_fmt_ee (code, mode, op0, op1);
247 /* Replace all occurrences of OLD in X with NEW and try to simplify the
248 resulting RTX. Return a new RTX which is as simplified as possible. */
251 simplify_replace_rtx (x, old, new)
256 enum rtx_code code = GET_CODE (x);
257 enum machine_mode mode = GET_MODE (x);
259 /* If X is OLD, return NEW. Otherwise, if this is an expression, try
260 to build a new expression substituting recursively. If we can't do
261 anything, return our input. */
266 switch (GET_RTX_CLASS (code))
270 enum machine_mode op_mode = GET_MODE (XEXP (x, 0));
271 rtx op = (XEXP (x, 0) == old
272 ? new : simplify_replace_rtx (XEXP (x, 0), old, new));
274 return simplify_gen_unary (code, mode, op, op_mode);
280 simplify_gen_binary (code, mode,
281 simplify_replace_rtx (XEXP (x, 0), old, new),
282 simplify_replace_rtx (XEXP (x, 1), old, new));
285 enum machine_mode op_mode = (GET_MODE (XEXP (x, 0)) != VOIDmode
286 ? GET_MODE (XEXP (x, 0))
287 : GET_MODE (XEXP (x, 1)));
288 rtx op0 = simplify_replace_rtx (XEXP (x, 0), old, new);
289 rtx op1 = simplify_replace_rtx (XEXP (x, 1), old, new);
292 simplify_gen_relational (code, mode,
295 : GET_MODE (op0) != VOIDmode
304 enum machine_mode op_mode = GET_MODE (XEXP (x, 0));
305 rtx op0 = simplify_replace_rtx (XEXP (x, 0), old, new);
308 simplify_gen_ternary (code, mode,
313 simplify_replace_rtx (XEXP (x, 1), old, new),
314 simplify_replace_rtx (XEXP (x, 2), old, new));
318 /* The only case we try to handle is a SUBREG. */
322 exp = simplify_gen_subreg (GET_MODE (x),
323 simplify_replace_rtx (SUBREG_REG (x),
325 GET_MODE (SUBREG_REG (x)),
333 if (GET_CODE (x) == MEM)
335 replace_equiv_address_nv (x,
336 simplify_replace_rtx (XEXP (x, 0),
344 /* Subroutine of simplify_unary_operation, called via do_float_handler.
345 Handles simplification of unary ops on floating point values. */
346 struct simplify_unary_real_args
350 enum machine_mode mode;
354 #define REAL_VALUE_ABS(d_) \
355 (REAL_VALUE_NEGATIVE (d_) ? REAL_VALUE_NEGATE (d_) : (d_))
358 simplify_unary_real (p)
363 struct simplify_unary_real_args *args =
364 (struct simplify_unary_real_args *) p;
366 REAL_VALUE_FROM_CONST_DOUBLE (d, args->operand);
368 if (args->want_integer)
374 case FIX: i = REAL_VALUE_FIX (d); break;
375 case UNSIGNED_FIX: i = REAL_VALUE_UNSIGNED_FIX (d); break;
379 args->result = gen_int_mode (i, args->mode);
386 /* We don't attempt to optimize this. */
390 case ABS: d = REAL_VALUE_ABS (d); break;
391 case NEG: d = REAL_VALUE_NEGATE (d); break;
392 case FLOAT_TRUNCATE: d = real_value_truncate (args->mode, d); break;
393 case FLOAT_EXTEND: /* All this does is change the mode. */ break;
394 case FIX: d = REAL_VALUE_RNDZINT (d); break;
395 case UNSIGNED_FIX: d = REAL_VALUE_UNSIGNED_RNDZINT (d); break;
399 args->result = CONST_DOUBLE_FROM_REAL_VALUE (d, args->mode);
403 /* Try to simplify a unary operation CODE whose output mode is to be
404 MODE with input operand OP whose mode was originally OP_MODE.
405 Return zero if no simplification can be made. */
407 simplify_unary_operation (code, mode, op, op_mode)
409 enum machine_mode mode;
411 enum machine_mode op_mode;
413 unsigned int width = GET_MODE_BITSIZE (mode);
414 rtx trueop = avoid_constant_pool_reference (op);
416 /* The order of these tests is critical so that, for example, we don't
417 check the wrong mode (input vs. output) for a conversion operation,
418 such as FIX. At some point, this should be simplified. */
420 if (code == FLOAT && GET_MODE (trueop) == VOIDmode
421 && (GET_CODE (trueop) == CONST_DOUBLE || GET_CODE (trueop) == CONST_INT))
423 HOST_WIDE_INT hv, lv;
426 if (GET_CODE (trueop) == CONST_INT)
427 lv = INTVAL (trueop), hv = HWI_SIGN_EXTEND (lv);
429 lv = CONST_DOUBLE_LOW (trueop), hv = CONST_DOUBLE_HIGH (trueop);
431 REAL_VALUE_FROM_INT (d, lv, hv, mode);
432 d = real_value_truncate (mode, d);
433 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
435 else if (code == UNSIGNED_FLOAT && GET_MODE (trueop) == VOIDmode
436 && (GET_CODE (trueop) == CONST_DOUBLE
437 || GET_CODE (trueop) == CONST_INT))
439 HOST_WIDE_INT hv, lv;
442 if (GET_CODE (trueop) == CONST_INT)
443 lv = INTVAL (trueop), hv = HWI_SIGN_EXTEND (lv);
445 lv = CONST_DOUBLE_LOW (trueop), hv = CONST_DOUBLE_HIGH (trueop);
447 if (op_mode == VOIDmode)
449 /* We don't know how to interpret negative-looking numbers in
450 this case, so don't try to fold those. */
454 else if (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT * 2)
457 hv = 0, lv &= GET_MODE_MASK (op_mode);
459 REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv, mode);
460 d = real_value_truncate (mode, d);
461 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
464 if (GET_CODE (trueop) == CONST_INT
465 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
467 HOST_WIDE_INT arg0 = INTVAL (trueop);
481 val = (arg0 >= 0 ? arg0 : - arg0);
485 /* Don't use ffs here. Instead, get low order bit and then its
486 number. If arg0 is zero, this will return 0, as desired. */
487 arg0 &= GET_MODE_MASK (mode);
488 val = exact_log2 (arg0 & (- arg0)) + 1;
496 /* When zero-extending a CONST_INT, we need to know its
498 if (op_mode == VOIDmode)
500 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
502 /* If we were really extending the mode,
503 we would have to distinguish between zero-extension
504 and sign-extension. */
505 if (width != GET_MODE_BITSIZE (op_mode))
509 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
510 val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
516 if (op_mode == VOIDmode)
518 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
520 /* If we were really extending the mode,
521 we would have to distinguish between zero-extension
522 and sign-extension. */
523 if (width != GET_MODE_BITSIZE (op_mode))
527 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
530 = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
532 & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1)))
533 val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
550 val = trunc_int_for_mode (val, mode);
552 return GEN_INT (val);
555 /* We can do some operations on integer CONST_DOUBLEs. Also allow
556 for a DImode operation on a CONST_INT. */
557 else if (GET_MODE (trueop) == VOIDmode
558 && width <= HOST_BITS_PER_WIDE_INT * 2
559 && (GET_CODE (trueop) == CONST_DOUBLE
560 || GET_CODE (trueop) == CONST_INT))
562 unsigned HOST_WIDE_INT l1, lv;
563 HOST_WIDE_INT h1, hv;
565 if (GET_CODE (trueop) == CONST_DOUBLE)
566 l1 = CONST_DOUBLE_LOW (trueop), h1 = CONST_DOUBLE_HIGH (trueop);
568 l1 = INTVAL (trueop), h1 = HWI_SIGN_EXTEND (l1);
578 neg_double (l1, h1, &lv, &hv);
583 neg_double (l1, h1, &lv, &hv);
591 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1;
593 lv = exact_log2 (l1 & (-l1)) + 1;
597 /* This is just a change-of-mode, so do nothing. */
602 if (op_mode == VOIDmode)
605 if (GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
609 lv = l1 & GET_MODE_MASK (op_mode);
613 if (op_mode == VOIDmode
614 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
618 lv = l1 & GET_MODE_MASK (op_mode);
619 if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT
620 && (lv & ((HOST_WIDE_INT) 1
621 << (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
622 lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
624 hv = HWI_SIGN_EXTEND (lv);
635 return immed_double_const (lv, hv, mode);
638 else if (GET_CODE (trueop) == CONST_DOUBLE
639 && GET_MODE_CLASS (mode) == MODE_FLOAT)
641 struct simplify_unary_real_args args;
642 args.operand = trueop;
645 args.want_integer = false;
647 if (do_float_handler (simplify_unary_real, (PTR) &args))
653 else if (GET_CODE (trueop) == CONST_DOUBLE
654 && GET_MODE_CLASS (GET_MODE (trueop)) == MODE_FLOAT
655 && GET_MODE_CLASS (mode) == MODE_INT
656 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
658 struct simplify_unary_real_args args;
659 args.operand = trueop;
662 args.want_integer = true;
664 if (do_float_handler (simplify_unary_real, (PTR) &args))
670 /* This was formerly used only for non-IEEE float.
671 eggert@twinsun.com says it is safe for IEEE also. */
674 enum rtx_code reversed;
675 /* There are some simplifications we can do even if the operands
680 /* (not (not X)) == X. */
681 if (GET_CODE (op) == NOT)
684 /* (not (eq X Y)) == (ne X Y), etc. */
685 if (mode == BImode && GET_RTX_CLASS (GET_CODE (op)) == '<'
686 && ((reversed = reversed_comparison_code (op, NULL_RTX))
688 return gen_rtx_fmt_ee (reversed,
689 op_mode, XEXP (op, 0), XEXP (op, 1));
693 /* (neg (neg X)) == X. */
694 if (GET_CODE (op) == NEG)
699 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
700 becomes just the MINUS if its mode is MODE. This allows
701 folding switch statements on machines using casesi (such as
703 if (GET_CODE (op) == TRUNCATE
704 && GET_MODE (XEXP (op, 0)) == mode
705 && GET_CODE (XEXP (op, 0)) == MINUS
706 && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
707 && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
710 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
711 if (! POINTERS_EXTEND_UNSIGNED
712 && mode == Pmode && GET_MODE (op) == ptr_mode
714 || (GET_CODE (op) == SUBREG
715 && GET_CODE (SUBREG_REG (op)) == REG
716 && REG_POINTER (SUBREG_REG (op))
717 && GET_MODE (SUBREG_REG (op)) == Pmode)))
718 return convert_memory_address (Pmode, op);
722 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
724 if (POINTERS_EXTEND_UNSIGNED > 0
725 && mode == Pmode && GET_MODE (op) == ptr_mode
727 || (GET_CODE (op) == SUBREG
728 && GET_CODE (SUBREG_REG (op)) == REG
729 && REG_POINTER (SUBREG_REG (op))
730 && GET_MODE (SUBREG_REG (op)) == Pmode)))
731 return convert_memory_address (Pmode, op);
743 /* Subroutine of simplify_binary_operation, called via do_float_handler.
744 Handles simplification of binary ops on floating point values. */
745 struct simplify_binary_real_args
747 rtx trueop0, trueop1;
750 enum machine_mode mode;
754 simplify_binary_real (p)
757 REAL_VALUE_TYPE f0, f1, value;
758 struct simplify_binary_real_args *args =
759 (struct simplify_binary_real_args *) p;
761 REAL_VALUE_FROM_CONST_DOUBLE (f0, args->trueop0);
762 REAL_VALUE_FROM_CONST_DOUBLE (f1, args->trueop1);
763 f0 = real_value_truncate (args->mode, f0);
764 f1 = real_value_truncate (args->mode, f1);
766 if (args->code == DIV
767 && !MODE_HAS_INFINITIES (args->mode)
768 && REAL_VALUES_EQUAL (f1, dconst0))
773 REAL_ARITHMETIC (value, rtx_to_tree_code (args->code), f0, f1);
775 value = real_value_truncate (args->mode, value);
776 args->result = CONST_DOUBLE_FROM_REAL_VALUE (value, args->mode);
779 /* Another subroutine called via do_float_handler. This one tests
780 the floating point value given against 2. and -1. */
781 struct simplify_binary_is2orm1_args
789 simplify_binary_is2orm1 (p)
793 struct simplify_binary_is2orm1_args *args =
794 (struct simplify_binary_is2orm1_args *) p;
796 REAL_VALUE_FROM_CONST_DOUBLE (d, args->value);
797 args->is_2 = REAL_VALUES_EQUAL (d, dconst2);
798 args->is_m1 = REAL_VALUES_EQUAL (d, dconstm1);
801 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
802 and OP1. Return 0 if no simplification is possible.
804 Don't use this for relational operations such as EQ or LT.
805 Use simplify_relational_operation instead. */
807 simplify_binary_operation (code, mode, op0, op1)
809 enum machine_mode mode;
812 HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
814 unsigned int width = GET_MODE_BITSIZE (mode);
816 rtx trueop0 = avoid_constant_pool_reference (op0);
817 rtx trueop1 = avoid_constant_pool_reference (op1);
819 /* Relational operations don't work here. We must know the mode
820 of the operands in order to do the comparison correctly.
821 Assuming a full word can give incorrect results.
822 Consider comparing 128 with -128 in QImode. */
824 if (GET_RTX_CLASS (code) == '<')
827 /* Make sure the constant is second. */
828 if (GET_RTX_CLASS (code) == 'c'
829 && swap_commutative_operands_p (trueop0, trueop1))
831 tem = op0, op0 = op1, op1 = tem;
832 tem = trueop0, trueop0 = trueop1, trueop1 = tem;
835 if (GET_MODE_CLASS (mode) == MODE_FLOAT
836 && GET_CODE (trueop0) == CONST_DOUBLE
837 && GET_CODE (trueop1) == CONST_DOUBLE
838 && mode == GET_MODE (op0) && mode == GET_MODE (op1))
840 struct simplify_binary_real_args args;
841 args.trueop0 = trueop0;
842 args.trueop1 = trueop1;
846 if (do_float_handler (simplify_binary_real, (PTR) &args))
851 /* We can fold some multi-word operations. */
852 if (GET_MODE_CLASS (mode) == MODE_INT
853 && width == HOST_BITS_PER_WIDE_INT * 2
854 && (GET_CODE (trueop0) == CONST_DOUBLE
855 || GET_CODE (trueop0) == CONST_INT)
856 && (GET_CODE (trueop1) == CONST_DOUBLE
857 || GET_CODE (trueop1) == CONST_INT))
859 unsigned HOST_WIDE_INT l1, l2, lv;
860 HOST_WIDE_INT h1, h2, hv;
862 if (GET_CODE (trueop0) == CONST_DOUBLE)
863 l1 = CONST_DOUBLE_LOW (trueop0), h1 = CONST_DOUBLE_HIGH (trueop0);
865 l1 = INTVAL (trueop0), h1 = HWI_SIGN_EXTEND (l1);
867 if (GET_CODE (trueop1) == CONST_DOUBLE)
868 l2 = CONST_DOUBLE_LOW (trueop1), h2 = CONST_DOUBLE_HIGH (trueop1);
870 l2 = INTVAL (trueop1), h2 = HWI_SIGN_EXTEND (l2);
875 /* A - B == A + (-B). */
876 neg_double (l2, h2, &lv, &hv);
879 /* .. fall through ... */
882 add_double (l1, h1, l2, h2, &lv, &hv);
886 mul_double (l1, h1, l2, h2, &lv, &hv);
889 case DIV: case MOD: case UDIV: case UMOD:
890 /* We'd need to include tree.h to do this and it doesn't seem worth
895 lv = l1 & l2, hv = h1 & h2;
899 lv = l1 | l2, hv = h1 | h2;
903 lv = l1 ^ l2, hv = h1 ^ h2;
909 && ((unsigned HOST_WIDE_INT) l1
910 < (unsigned HOST_WIDE_INT) l2)))
919 && ((unsigned HOST_WIDE_INT) l1
920 > (unsigned HOST_WIDE_INT) l2)))
927 if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2
929 && ((unsigned HOST_WIDE_INT) l1
930 < (unsigned HOST_WIDE_INT) l2)))
937 if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2
939 && ((unsigned HOST_WIDE_INT) l1
940 > (unsigned HOST_WIDE_INT) l2)))
946 case LSHIFTRT: case ASHIFTRT:
948 case ROTATE: case ROTATERT:
949 #ifdef SHIFT_COUNT_TRUNCATED
950 if (SHIFT_COUNT_TRUNCATED)
951 l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
954 if (h2 != 0 || l2 >= GET_MODE_BITSIZE (mode))
957 if (code == LSHIFTRT || code == ASHIFTRT)
958 rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
960 else if (code == ASHIFT)
961 lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1);
962 else if (code == ROTATE)
963 lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
964 else /* code == ROTATERT */
965 rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
972 return immed_double_const (lv, hv, mode);
975 if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
976 || width > HOST_BITS_PER_WIDE_INT || width == 0)
978 /* Even if we can't compute a constant result,
979 there are some cases worth simplifying. */
984 /* Maybe simplify x + 0 to x. The two expressions are equivalent
985 when x is NaN, infinite, or finite and non-zero. They aren't
986 when x is -0 and the rounding mode is not towards -infinity,
987 since (-0) + 0 is then 0. */
988 if (!HONOR_SIGNED_ZEROS (mode) && trueop1 == CONST0_RTX (mode))
991 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)). These
992 transformations are safe even for IEEE. */
993 if (GET_CODE (op0) == NEG)
994 return simplify_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
995 else if (GET_CODE (op1) == NEG)
996 return simplify_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
999 if (INTEGRAL_MODE_P (mode)
1000 && GET_CODE (op0) == NOT
1001 && trueop1 == const1_rtx)
1002 return gen_rtx_NEG (mode, XEXP (op0, 0));
1004 /* Handle both-operands-constant cases. We can only add
1005 CONST_INTs to constants since the sum of relocatable symbols
1006 can't be handled by most assemblers. Don't add CONST_INT
1007 to CONST_INT since overflow won't be computed properly if wider
1008 than HOST_BITS_PER_WIDE_INT. */
1010 if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode
1011 && GET_CODE (op1) == CONST_INT)
1012 return plus_constant (op0, INTVAL (op1));
1013 else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode
1014 && GET_CODE (op0) == CONST_INT)
1015 return plus_constant (op1, INTVAL (op0));
1017 /* See if this is something like X * C - X or vice versa or
1018 if the multiplication is written as a shift. If so, we can
1019 distribute and make a new multiply, shift, or maybe just
1020 have X (if C is 2 in the example above). But don't make
1021 real multiply if we didn't have one before. */
1023 if (! FLOAT_MODE_P (mode))
1025 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
1026 rtx lhs = op0, rhs = op1;
1029 if (GET_CODE (lhs) == NEG)
1030 coeff0 = -1, lhs = XEXP (lhs, 0);
1031 else if (GET_CODE (lhs) == MULT
1032 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
1034 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
1037 else if (GET_CODE (lhs) == ASHIFT
1038 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
1039 && INTVAL (XEXP (lhs, 1)) >= 0
1040 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
1042 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
1043 lhs = XEXP (lhs, 0);
1046 if (GET_CODE (rhs) == NEG)
1047 coeff1 = -1, rhs = XEXP (rhs, 0);
1048 else if (GET_CODE (rhs) == MULT
1049 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
1051 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
1054 else if (GET_CODE (rhs) == ASHIFT
1055 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
1056 && INTVAL (XEXP (rhs, 1)) >= 0
1057 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
1059 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
1060 rhs = XEXP (rhs, 0);
1063 if (rtx_equal_p (lhs, rhs))
1065 tem = simplify_gen_binary (MULT, mode, lhs,
1066 GEN_INT (coeff0 + coeff1));
1067 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
1071 /* If one of the operands is a PLUS or a MINUS, see if we can
1072 simplify this by the associative law.
1073 Don't use the associative law for floating point.
1074 The inaccuracy makes it nonassociative,
1075 and subtle programs can break if operations are associated. */
1077 if (INTEGRAL_MODE_P (mode)
1078 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
1079 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS
1080 || (GET_CODE (op0) == CONST
1081 && GET_CODE (XEXP (op0, 0)) == PLUS)
1082 || (GET_CODE (op1) == CONST
1083 && GET_CODE (XEXP (op1, 0)) == PLUS))
1084 && (tem = simplify_plus_minus (code, mode, op0, op1, 0)) != 0)
1090 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
1091 using cc0, in which case we want to leave it as a COMPARE
1092 so we can distinguish it from a register-register-copy.
1094 In IEEE floating point, x-0 is not the same as x. */
1096 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
1097 || ! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
1098 && trueop1 == CONST0_RTX (mode))
1102 /* Convert (compare (gt (flags) 0) (lt (flags) 0)) to (flags). */
1103 if (((GET_CODE (op0) == GT && GET_CODE (op1) == LT)
1104 || (GET_CODE (op0) == GTU && GET_CODE (op1) == LTU))
1105 && XEXP (op0, 1) == const0_rtx && XEXP (op1, 1) == const0_rtx)
1107 rtx xop00 = XEXP (op0, 0);
1108 rtx xop10 = XEXP (op1, 0);
1111 if (GET_CODE (xop00) == CC0 && GET_CODE (xop10) == CC0)
1113 if (GET_CODE (xop00) == REG && GET_CODE (xop10) == REG
1114 && GET_MODE (xop00) == GET_MODE (xop10)
1115 && REGNO (xop00) == REGNO (xop10)
1116 && GET_MODE_CLASS (GET_MODE (xop00)) == MODE_CC
1117 && GET_MODE_CLASS (GET_MODE (xop10)) == MODE_CC)
1124 /* We can't assume x-x is 0 even with non-IEEE floating point,
1125 but since it is zero except in very strange circumstances, we
1126 will treat it as zero with -funsafe-math-optimizations. */
1127 if (rtx_equal_p (trueop0, trueop1)
1128 && ! side_effects_p (op0)
1129 && (! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations))
1130 return CONST0_RTX (mode);
1132 /* Change subtraction from zero into negation. (0 - x) is the
1133 same as -x when x is NaN, infinite, or finite and non-zero.
1134 But if the mode has signed zeros, and does not round towards
1135 -infinity, then 0 - 0 is 0, not -0. */
1136 if (!HONOR_SIGNED_ZEROS (mode) && trueop0 == CONST0_RTX (mode))
1137 return gen_rtx_NEG (mode, op1);
1139 /* (-1 - a) is ~a. */
1140 if (trueop0 == constm1_rtx)
1141 return gen_rtx_NOT (mode, op1);
1143 /* Subtracting 0 has no effect unless the mode has signed zeros
1144 and supports rounding towards -infinity. In such a case,
1146 if (!(HONOR_SIGNED_ZEROS (mode)
1147 && HONOR_SIGN_DEPENDENT_ROUNDING (mode))
1148 && trueop1 == CONST0_RTX (mode))
1151 /* See if this is something like X * C - X or vice versa or
1152 if the multiplication is written as a shift. If so, we can
1153 distribute and make a new multiply, shift, or maybe just
1154 have X (if C is 2 in the example above). But don't make
1155 real multiply if we didn't have one before. */
1157 if (! FLOAT_MODE_P (mode))
1159 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
1160 rtx lhs = op0, rhs = op1;
1163 if (GET_CODE (lhs) == NEG)
1164 coeff0 = -1, lhs = XEXP (lhs, 0);
1165 else if (GET_CODE (lhs) == MULT
1166 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
1168 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
1171 else if (GET_CODE (lhs) == ASHIFT
1172 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
1173 && INTVAL (XEXP (lhs, 1)) >= 0
1174 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
1176 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
1177 lhs = XEXP (lhs, 0);
1180 if (GET_CODE (rhs) == NEG)
1181 coeff1 = - 1, rhs = XEXP (rhs, 0);
1182 else if (GET_CODE (rhs) == MULT
1183 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
1185 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
1188 else if (GET_CODE (rhs) == ASHIFT
1189 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
1190 && INTVAL (XEXP (rhs, 1)) >= 0
1191 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
1193 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
1194 rhs = XEXP (rhs, 0);
1197 if (rtx_equal_p (lhs, rhs))
1199 tem = simplify_gen_binary (MULT, mode, lhs,
1200 GEN_INT (coeff0 - coeff1));
1201 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
1205 /* (a - (-b)) -> (a + b). True even for IEEE. */
1206 if (GET_CODE (op1) == NEG)
1207 return simplify_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
1209 /* If one of the operands is a PLUS or a MINUS, see if we can
1210 simplify this by the associative law.
1211 Don't use the associative law for floating point.
1212 The inaccuracy makes it nonassociative,
1213 and subtle programs can break if operations are associated. */
1215 if (INTEGRAL_MODE_P (mode)
1216 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
1217 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS
1218 || (GET_CODE (op0) == CONST
1219 && GET_CODE (XEXP (op0, 0)) == PLUS)
1220 || (GET_CODE (op1) == CONST
1221 && GET_CODE (XEXP (op1, 0)) == PLUS))
1222 && (tem = simplify_plus_minus (code, mode, op0, op1, 0)) != 0)
1225 /* Don't let a relocatable value get a negative coeff. */
1226 if (GET_CODE (op1) == CONST_INT && GET_MODE (op0) != VOIDmode)
1227 return simplify_gen_binary (PLUS, mode,
1229 neg_const_int (mode, op1));
1231 /* (x - (x & y)) -> (x & ~y) */
1232 if (GET_CODE (op1) == AND)
1234 if (rtx_equal_p (op0, XEXP (op1, 0)))
1235 return simplify_gen_binary (AND, mode, op0,
1236 gen_rtx_NOT (mode, XEXP (op1, 1)));
1237 if (rtx_equal_p (op0, XEXP (op1, 1)))
1238 return simplify_gen_binary (AND, mode, op0,
1239 gen_rtx_NOT (mode, XEXP (op1, 0)));
1244 if (trueop1 == constm1_rtx)
1246 tem = simplify_unary_operation (NEG, mode, op0, mode);
1248 return tem ? tem : gen_rtx_NEG (mode, op0);
1251 /* Maybe simplify x * 0 to 0. The reduction is not valid if
1252 x is NaN, since x * 0 is then also NaN. Nor is it valid
1253 when the mode has signed zeros, since multiplying a negative
1254 number by 0 will give -0, not 0. */
1255 if (!HONOR_NANS (mode)
1256 && !HONOR_SIGNED_ZEROS (mode)
1257 && trueop1 == CONST0_RTX (mode)
1258 && ! side_effects_p (op0))
1261 /* In IEEE floating point, x*1 is not equivalent to x for nans.
1262 However, ANSI says we can drop signals,
1263 so we can do this anyway. */
1264 if (trueop1 == CONST1_RTX (mode))
1267 /* Convert multiply by constant power of two into shift unless
1268 we are still generating RTL. This test is a kludge. */
1269 if (GET_CODE (trueop1) == CONST_INT
1270 && (val = exact_log2 (INTVAL (trueop1))) >= 0
1271 /* If the mode is larger than the host word size, and the
1272 uppermost bit is set, then this isn't a power of two due
1273 to implicit sign extension. */
1274 && (width <= HOST_BITS_PER_WIDE_INT
1275 || val != HOST_BITS_PER_WIDE_INT - 1)
1276 && ! rtx_equal_function_value_matters)
1277 return gen_rtx_ASHIFT (mode, op0, GEN_INT (val));
1279 if (GET_CODE (trueop1) == CONST_DOUBLE
1280 && GET_MODE_CLASS (GET_MODE (trueop1)) == MODE_FLOAT)
1282 struct simplify_binary_is2orm1_args args;
1284 args.value = trueop1;
1285 if (! do_float_handler (simplify_binary_is2orm1, (PTR) &args))
1288 /* x*2 is x+x and x*(-1) is -x */
1289 if (args.is_2 && GET_MODE (op0) == mode)
1290 return gen_rtx_PLUS (mode, op0, copy_rtx (op0));
1292 else if (args.is_m1 && GET_MODE (op0) == mode)
1293 return gen_rtx_NEG (mode, op0);
1298 if (trueop1 == const0_rtx)
1300 if (GET_CODE (trueop1) == CONST_INT
1301 && ((INTVAL (trueop1) & GET_MODE_MASK (mode))
1302 == GET_MODE_MASK (mode)))
1304 if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1306 /* A | (~A) -> -1 */
1307 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
1308 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
1309 && ! side_effects_p (op0)
1310 && GET_MODE_CLASS (mode) != MODE_CC)
1315 if (trueop1 == const0_rtx)
1317 if (GET_CODE (trueop1) == CONST_INT
1318 && ((INTVAL (trueop1) & GET_MODE_MASK (mode))
1319 == GET_MODE_MASK (mode)))
1320 return gen_rtx_NOT (mode, op0);
1321 if (trueop0 == trueop1 && ! side_effects_p (op0)
1322 && GET_MODE_CLASS (mode) != MODE_CC)
1327 if (trueop1 == const0_rtx && ! side_effects_p (op0))
1329 if (GET_CODE (trueop1) == CONST_INT
1330 && ((INTVAL (trueop1) & GET_MODE_MASK (mode))
1331 == GET_MODE_MASK (mode)))
1333 if (trueop0 == trueop1 && ! side_effects_p (op0)
1334 && GET_MODE_CLASS (mode) != MODE_CC)
1337 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
1338 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
1339 && ! side_effects_p (op0)
1340 && GET_MODE_CLASS (mode) != MODE_CC)
1345 /* Convert divide by power of two into shift (divide by 1 handled
1347 if (GET_CODE (trueop1) == CONST_INT
1348 && (arg1 = exact_log2 (INTVAL (trueop1))) > 0)
1349 return gen_rtx_LSHIFTRT (mode, op0, GEN_INT (arg1));
1351 /* ... fall through ... */
1354 if (trueop1 == CONST1_RTX (mode))
1356 /* On some platforms DIV uses narrower mode than its
1358 rtx x = gen_lowpart_common (mode, op0);
1361 else if (mode != GET_MODE (op0) && GET_MODE (op0) != VOIDmode)
1362 return gen_lowpart_SUBREG (mode, op0);
1367 /* Maybe change 0 / x to 0. This transformation isn't safe for
1368 modes with NaNs, since 0 / 0 will then be NaN rather than 0.
1369 Nor is it safe for modes with signed zeros, since dividing
1370 0 by a negative number gives -0, not 0. */
1371 if (!HONOR_NANS (mode)
1372 && !HONOR_SIGNED_ZEROS (mode)
1373 && trueop0 == CONST0_RTX (mode)
1374 && ! side_effects_p (op1))
1377 /* Change division by a constant into multiplication. Only do
1378 this with -funsafe-math-optimizations. */
1379 else if (GET_CODE (trueop1) == CONST_DOUBLE
1380 && GET_MODE_CLASS (GET_MODE (trueop1)) == MODE_FLOAT
1381 && trueop1 != CONST0_RTX (mode)
1382 && flag_unsafe_math_optimizations)
1385 REAL_VALUE_FROM_CONST_DOUBLE (d, trueop1);
1387 if (! REAL_VALUES_EQUAL (d, dconst0))
1389 REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d);
1390 return gen_rtx_MULT (mode, op0,
1391 CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
1397 /* Handle modulus by power of two (mod with 1 handled below). */
1398 if (GET_CODE (trueop1) == CONST_INT
1399 && exact_log2 (INTVAL (trueop1)) > 0)
1400 return gen_rtx_AND (mode, op0, GEN_INT (INTVAL (op1) - 1));
1402 /* ... fall through ... */
1405 if ((trueop0 == const0_rtx || trueop1 == const1_rtx)
1406 && ! side_effects_p (op0) && ! side_effects_p (op1))
1412 /* Rotating ~0 always results in ~0. */
1413 if (GET_CODE (trueop0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
1414 && (unsigned HOST_WIDE_INT) INTVAL (trueop0) == GET_MODE_MASK (mode)
1415 && ! side_effects_p (op1))
1418 /* ... fall through ... */
1423 if (trueop1 == const0_rtx)
1425 if (trueop0 == const0_rtx && ! side_effects_p (op1))
1430 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (trueop1) == CONST_INT
1431 && INTVAL (trueop1) == (HOST_WIDE_INT) 1 << (width -1)
1432 && ! side_effects_p (op0))
1434 else if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1439 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (trueop1) == CONST_INT
1440 && ((unsigned HOST_WIDE_INT) INTVAL (trueop1)
1441 == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
1442 && ! side_effects_p (op0))
1444 else if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1449 if (trueop1 == const0_rtx && ! side_effects_p (op0))
1451 else if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1456 if (trueop1 == constm1_rtx && ! side_effects_p (op0))
1458 else if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1466 /* ??? There are simplifications that can be done. */
1476 /* Get the integer argument values in two forms:
1477 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
1479 arg0 = INTVAL (trueop0);
1480 arg1 = INTVAL (trueop1);
1482 if (width < HOST_BITS_PER_WIDE_INT)
1484 arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
1485 arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
1488 if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
1489 arg0s |= ((HOST_WIDE_INT) (-1) << width);
1492 if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
1493 arg1s |= ((HOST_WIDE_INT) (-1) << width);
1501 /* Compute the value of the arithmetic. */
1506 val = arg0s + arg1s;
1510 val = arg0s - arg1s;
1514 val = arg0s * arg1s;
1519 || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
1522 val = arg0s / arg1s;
1527 || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
1530 val = arg0s % arg1s;
1535 || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
1538 val = (unsigned HOST_WIDE_INT) arg0 / arg1;
1543 || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
1546 val = (unsigned HOST_WIDE_INT) arg0 % arg1;
1562 /* If shift count is undefined, don't fold it; let the machine do
1563 what it wants. But truncate it if the machine will do that. */
1567 #ifdef SHIFT_COUNT_TRUNCATED
1568 if (SHIFT_COUNT_TRUNCATED)
1572 val = ((unsigned HOST_WIDE_INT) arg0) >> arg1;
1579 #ifdef SHIFT_COUNT_TRUNCATED
1580 if (SHIFT_COUNT_TRUNCATED)
1584 val = ((unsigned HOST_WIDE_INT) arg0) << arg1;
1591 #ifdef SHIFT_COUNT_TRUNCATED
1592 if (SHIFT_COUNT_TRUNCATED)
1596 val = arg0s >> arg1;
1598 /* Bootstrap compiler may not have sign extended the right shift.
1599 Manually extend the sign to insure bootstrap cc matches gcc. */
1600 if (arg0s < 0 && arg1 > 0)
1601 val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1);
1610 val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
1611 | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
1619 val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
1620 | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
1624 /* Do nothing here. */
1628 val = arg0s <= arg1s ? arg0s : arg1s;
1632 val = ((unsigned HOST_WIDE_INT) arg0
1633 <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
1637 val = arg0s > arg1s ? arg0s : arg1s;
1641 val = ((unsigned HOST_WIDE_INT) arg0
1642 > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
1649 val = trunc_int_for_mode (val, mode);
1651 return GEN_INT (val);
1654 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
1657 Rather than test for specific case, we do this by a brute-force method
1658 and do all possible simplifications until no more changes occur. Then
1659 we rebuild the operation.
1661 If FORCE is true, then always generate the rtx. This is used to
1662 canonicalize stuff emitted from simplify_gen_binary. Note that this
1663 can still fail if the rtx is too complex. It won't fail just because
1664 the result is not 'simpler' than the input, however. */
1666 struct simplify_plus_minus_op_data
1673 simplify_plus_minus_op_data_cmp (p1, p2)
1677 const struct simplify_plus_minus_op_data *d1 = p1;
1678 const struct simplify_plus_minus_op_data *d2 = p2;
1680 return (commutative_operand_precedence (d2->op)
1681 - commutative_operand_precedence (d1->op));
1685 simplify_plus_minus (code, mode, op0, op1, force)
1687 enum machine_mode mode;
1691 struct simplify_plus_minus_op_data ops[8];
1693 int n_ops = 2, input_ops = 2, input_consts = 0, n_consts;
1694 int first, negate, changed;
1697 memset ((char *) ops, 0, sizeof ops);
1699 /* Set up the two operands and then expand them until nothing has been
1700 changed. If we run out of room in our array, give up; this should
1701 almost never happen. */
1706 ops[1].neg = (code == MINUS);
1712 for (i = 0; i < n_ops; i++)
1714 rtx this_op = ops[i].op;
1715 int this_neg = ops[i].neg;
1716 enum rtx_code this_code = GET_CODE (this_op);
1725 ops[n_ops].op = XEXP (this_op, 1);
1726 ops[n_ops].neg = (this_code == MINUS) ^ this_neg;
1729 ops[i].op = XEXP (this_op, 0);
1735 ops[i].op = XEXP (this_op, 0);
1736 ops[i].neg = ! this_neg;
1742 && GET_CODE (XEXP (this_op, 0)) == PLUS
1743 && CONSTANT_P (XEXP (XEXP (this_op, 0), 0))
1744 && CONSTANT_P (XEXP (XEXP (this_op, 0), 1)))
1746 ops[i].op = XEXP (XEXP (this_op, 0), 0);
1747 ops[n_ops].op = XEXP (XEXP (this_op, 0), 1);
1748 ops[n_ops].neg = this_neg;
1756 /* ~a -> (-a - 1) */
1759 ops[n_ops].op = constm1_rtx;
1760 ops[n_ops++].neg = this_neg;
1761 ops[i].op = XEXP (this_op, 0);
1762 ops[i].neg = !this_neg;
1770 ops[i].op = neg_const_int (mode, this_op);
1783 /* If we only have two operands, we can't do anything. */
1784 if (n_ops <= 2 && !force)
1787 /* Count the number of CONSTs we didn't split above. */
1788 for (i = 0; i < n_ops; i++)
1789 if (GET_CODE (ops[i].op) == CONST)
1792 /* Now simplify each pair of operands until nothing changes. The first
1793 time through just simplify constants against each other. */
1800 for (i = 0; i < n_ops - 1; i++)
1801 for (j = i + 1; j < n_ops; j++)
1803 rtx lhs = ops[i].op, rhs = ops[j].op;
1804 int lneg = ops[i].neg, rneg = ops[j].neg;
1806 if (lhs != 0 && rhs != 0
1807 && (! first || (CONSTANT_P (lhs) && CONSTANT_P (rhs))))
1809 enum rtx_code ncode = PLUS;
1815 tem = lhs, lhs = rhs, rhs = tem;
1817 else if (swap_commutative_operands_p (lhs, rhs))
1818 tem = lhs, lhs = rhs, rhs = tem;
1820 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
1822 /* Reject "simplifications" that just wrap the two
1823 arguments in a CONST. Failure to do so can result
1824 in infinite recursion with simplify_binary_operation
1825 when it calls us to simplify CONST operations. */
1827 && ! (GET_CODE (tem) == CONST
1828 && GET_CODE (XEXP (tem, 0)) == ncode
1829 && XEXP (XEXP (tem, 0), 0) == lhs
1830 && XEXP (XEXP (tem, 0), 1) == rhs)
1831 /* Don't allow -x + -1 -> ~x simplifications in the
1832 first pass. This allows us the chance to combine
1833 the -1 with other constants. */
1835 && GET_CODE (tem) == NOT
1836 && XEXP (tem, 0) == rhs))
1839 if (GET_CODE (tem) == NEG)
1840 tem = XEXP (tem, 0), lneg = !lneg;
1841 if (GET_CODE (tem) == CONST_INT && lneg)
1842 tem = neg_const_int (mode, tem), lneg = 0;
1846 ops[j].op = NULL_RTX;
1856 /* Pack all the operands to the lower-numbered entries. */
1857 for (i = 0, j = 0; j < n_ops; j++)
1862 /* Sort the operations based on swap_commutative_operands_p. */
1863 qsort (ops, n_ops, sizeof (*ops), simplify_plus_minus_op_data_cmp);
1865 /* We suppressed creation of trivial CONST expressions in the
1866 combination loop to avoid recursion. Create one manually now.
1867 The combination loop should have ensured that there is exactly
1868 one CONST_INT, and the sort will have ensured that it is last
1869 in the array and that any other constant will be next-to-last. */
1872 && GET_CODE (ops[n_ops - 1].op) == CONST_INT
1873 && CONSTANT_P (ops[n_ops - 2].op))
1875 rtx value = ops[n_ops - 1].op;
1876 if (ops[n_ops - 1].neg ^ ops[n_ops - 2].neg)
1877 value = neg_const_int (mode, value);
1878 ops[n_ops - 2].op = plus_constant (ops[n_ops - 2].op, INTVAL (value));
1882 /* Count the number of CONSTs that we generated. */
1884 for (i = 0; i < n_ops; i++)
1885 if (GET_CODE (ops[i].op) == CONST)
1888 /* Give up if we didn't reduce the number of operands we had. Make
1889 sure we count a CONST as two operands. If we have the same
1890 number of operands, but have made more CONSTs than before, this
1891 is also an improvement, so accept it. */
1893 && (n_ops + n_consts > input_ops
1894 || (n_ops + n_consts == input_ops && n_consts <= input_consts)))
1897 /* Put a non-negated operand first. If there aren't any, make all
1898 operands positive and negate the whole thing later. */
1901 for (i = 0; i < n_ops && ops[i].neg; i++)
1905 for (i = 0; i < n_ops; i++)
1917 /* Now make the result by performing the requested operations. */
1919 for (i = 1; i < n_ops; i++)
1920 result = gen_rtx_fmt_ee (ops[i].neg ? MINUS : PLUS,
1921 mode, result, ops[i].op);
1923 return negate ? gen_rtx_NEG (mode, result) : result;
1928 rtx op0, op1; /* Input */
1929 int equal, op0lt, op1lt; /* Output */
1934 check_fold_consts (data)
1937 struct cfc_args *args = (struct cfc_args *) data;
1938 REAL_VALUE_TYPE d0, d1;
1940 /* We may possibly raise an exception while reading the value. */
1941 args->unordered = 1;
1942 REAL_VALUE_FROM_CONST_DOUBLE (d0, args->op0);
1943 REAL_VALUE_FROM_CONST_DOUBLE (d1, args->op1);
1945 /* Comparisons of Inf versus Inf are ordered. */
1946 if (REAL_VALUE_ISNAN (d0)
1947 || REAL_VALUE_ISNAN (d1))
1949 args->equal = REAL_VALUES_EQUAL (d0, d1);
1950 args->op0lt = REAL_VALUES_LESS (d0, d1);
1951 args->op1lt = REAL_VALUES_LESS (d1, d0);
1952 args->unordered = 0;
1955 /* Like simplify_binary_operation except used for relational operators.
1956 MODE is the mode of the operands, not that of the result. If MODE
1957 is VOIDmode, both operands must also be VOIDmode and we compare the
1958 operands in "infinite precision".
1960 If no simplification is possible, this function returns zero. Otherwise,
1961 it returns either const_true_rtx or const0_rtx. */
1964 simplify_relational_operation (code, mode, op0, op1)
1966 enum machine_mode mode;
1969 int equal, op0lt, op0ltu, op1lt, op1ltu;
1974 if (mode == VOIDmode
1975 && (GET_MODE (op0) != VOIDmode
1976 || GET_MODE (op1) != VOIDmode))
1979 /* If op0 is a compare, extract the comparison arguments from it. */
1980 if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
1981 op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
1983 trueop0 = avoid_constant_pool_reference (op0);
1984 trueop1 = avoid_constant_pool_reference (op1);
1986 /* We can't simplify MODE_CC values since we don't know what the
1987 actual comparison is. */
1988 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC
1995 /* Make sure the constant is second. */
1996 if (swap_commutative_operands_p (trueop0, trueop1))
1998 tem = op0, op0 = op1, op1 = tem;
1999 tem = trueop0, trueop0 = trueop1, trueop1 = tem;
2000 code = swap_condition (code);
2003 /* For integer comparisons of A and B maybe we can simplify A - B and can
2004 then simplify a comparison of that with zero. If A and B are both either
2005 a register or a CONST_INT, this can't help; testing for these cases will
2006 prevent infinite recursion here and speed things up.
2008 If CODE is an unsigned comparison, then we can never do this optimization,
2009 because it gives an incorrect result if the subtraction wraps around zero.
2010 ANSI C defines unsigned operations such that they never overflow, and
2011 thus such cases can not be ignored. */
2013 if (INTEGRAL_MODE_P (mode) && trueop1 != const0_rtx
2014 && ! ((GET_CODE (op0) == REG || GET_CODE (trueop0) == CONST_INT)
2015 && (GET_CODE (op1) == REG || GET_CODE (trueop1) == CONST_INT))
2016 && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1))
2017 && code != GTU && code != GEU && code != LTU && code != LEU)
2018 return simplify_relational_operation (signed_condition (code),
2019 mode, tem, const0_rtx);
2021 if (flag_unsafe_math_optimizations && code == ORDERED)
2022 return const_true_rtx;
2024 if (flag_unsafe_math_optimizations && code == UNORDERED)
2027 /* For modes without NaNs, if the two operands are equal, we know the
2029 if (!HONOR_NANS (GET_MODE (trueop0)) && rtx_equal_p (trueop0, trueop1))
2030 equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0;
2032 /* If the operands are floating-point constants, see if we can fold
2034 else if (GET_CODE (trueop0) == CONST_DOUBLE
2035 && GET_CODE (trueop1) == CONST_DOUBLE
2036 && GET_MODE_CLASS (GET_MODE (trueop0)) == MODE_FLOAT)
2038 struct cfc_args args;
2040 /* Setup input for check_fold_consts() */
2045 if (!do_float_handler (check_fold_consts, (PTR) &args))
2058 return const_true_rtx;
2071 /* Receive output from check_fold_consts() */
2073 op0lt = op0ltu = args.op0lt;
2074 op1lt = op1ltu = args.op1lt;
2077 /* Otherwise, see if the operands are both integers. */
2078 else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
2079 && (GET_CODE (trueop0) == CONST_DOUBLE
2080 || GET_CODE (trueop0) == CONST_INT)
2081 && (GET_CODE (trueop1) == CONST_DOUBLE
2082 || GET_CODE (trueop1) == CONST_INT))
2084 int width = GET_MODE_BITSIZE (mode);
2085 HOST_WIDE_INT l0s, h0s, l1s, h1s;
2086 unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u;
2088 /* Get the two words comprising each integer constant. */
2089 if (GET_CODE (trueop0) == CONST_DOUBLE)
2091 l0u = l0s = CONST_DOUBLE_LOW (trueop0);
2092 h0u = h0s = CONST_DOUBLE_HIGH (trueop0);
2096 l0u = l0s = INTVAL (trueop0);
2097 h0u = h0s = HWI_SIGN_EXTEND (l0s);
2100 if (GET_CODE (trueop1) == CONST_DOUBLE)
2102 l1u = l1s = CONST_DOUBLE_LOW (trueop1);
2103 h1u = h1s = CONST_DOUBLE_HIGH (trueop1);
2107 l1u = l1s = INTVAL (trueop1);
2108 h1u = h1s = HWI_SIGN_EXTEND (l1s);
2111 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
2112 we have to sign or zero-extend the values. */
2113 if (width != 0 && width < HOST_BITS_PER_WIDE_INT)
2115 l0u &= ((HOST_WIDE_INT) 1 << width) - 1;
2116 l1u &= ((HOST_WIDE_INT) 1 << width) - 1;
2118 if (l0s & ((HOST_WIDE_INT) 1 << (width - 1)))
2119 l0s |= ((HOST_WIDE_INT) (-1) << width);
2121 if (l1s & ((HOST_WIDE_INT) 1 << (width - 1)))
2122 l1s |= ((HOST_WIDE_INT) (-1) << width);
2124 if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
2125 h0u = h1u = 0, h0s = HWI_SIGN_EXTEND (l0s), h1s = HWI_SIGN_EXTEND (l1s);
2127 equal = (h0u == h1u && l0u == l1u);
2128 op0lt = (h0s < h1s || (h0s == h1s && l0u < l1u));
2129 op1lt = (h1s < h0s || (h1s == h0s && l1u < l0u));
2130 op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u));
2131 op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u));
2134 /* Otherwise, there are some code-specific tests we can make. */
2140 /* References to the frame plus a constant or labels cannot
2141 be zero, but a SYMBOL_REF can due to #pragma weak. */
2142 if (((NONZERO_BASE_PLUS_P (op0) && trueop1 == const0_rtx)
2143 || GET_CODE (trueop0) == LABEL_REF)
2144 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
2145 /* On some machines, the ap reg can be 0 sometimes. */
2146 && op0 != arg_pointer_rtx
2153 if (((NONZERO_BASE_PLUS_P (op0) && trueop1 == const0_rtx)
2154 || GET_CODE (trueop0) == LABEL_REF)
2155 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
2156 && op0 != arg_pointer_rtx
2159 return const_true_rtx;
2163 /* Unsigned values are never negative. */
2164 if (trueop1 == const0_rtx)
2165 return const_true_rtx;
2169 if (trueop1 == const0_rtx)
2174 /* Unsigned values are never greater than the largest
2176 if (GET_CODE (trueop1) == CONST_INT
2177 && (unsigned HOST_WIDE_INT) INTVAL (trueop1) == GET_MODE_MASK (mode)
2178 && INTEGRAL_MODE_P (mode))
2179 return const_true_rtx;
2183 if (GET_CODE (trueop1) == CONST_INT
2184 && (unsigned HOST_WIDE_INT) INTVAL (trueop1) == GET_MODE_MASK (mode)
2185 && INTEGRAL_MODE_P (mode))
2196 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
2202 return equal ? const_true_rtx : const0_rtx;
2205 return ! equal ? const_true_rtx : const0_rtx;
2208 return op0lt ? const_true_rtx : const0_rtx;
2211 return op1lt ? const_true_rtx : const0_rtx;
2213 return op0ltu ? const_true_rtx : const0_rtx;
2215 return op1ltu ? const_true_rtx : const0_rtx;
2218 return equal || op0lt ? const_true_rtx : const0_rtx;
2221 return equal || op1lt ? const_true_rtx : const0_rtx;
2223 return equal || op0ltu ? const_true_rtx : const0_rtx;
2225 return equal || op1ltu ? const_true_rtx : const0_rtx;
2227 return const_true_rtx;
2235 /* Simplify CODE, an operation with result mode MODE and three operands,
2236 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
2237 a constant. Return 0 if no simplifications is possible. */
2240 simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
2242 enum machine_mode mode, op0_mode;
2245 unsigned int width = GET_MODE_BITSIZE (mode);
2247 /* VOIDmode means "infinite" precision. */
2249 width = HOST_BITS_PER_WIDE_INT;
2255 if (GET_CODE (op0) == CONST_INT
2256 && GET_CODE (op1) == CONST_INT
2257 && GET_CODE (op2) == CONST_INT
2258 && ((unsigned) INTVAL (op1) + (unsigned) INTVAL (op2) <= width)
2259 && width <= (unsigned) HOST_BITS_PER_WIDE_INT)
2261 /* Extracting a bit-field from a constant */
2262 HOST_WIDE_INT val = INTVAL (op0);
2264 if (BITS_BIG_ENDIAN)
2265 val >>= (GET_MODE_BITSIZE (op0_mode)
2266 - INTVAL (op2) - INTVAL (op1));
2268 val >>= INTVAL (op2);
2270 if (HOST_BITS_PER_WIDE_INT != INTVAL (op1))
2272 /* First zero-extend. */
2273 val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1;
2274 /* If desired, propagate sign bit. */
2275 if (code == SIGN_EXTRACT
2276 && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1))))
2277 val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1);
2280 /* Clear the bits that don't belong in our mode,
2281 unless they and our sign bit are all one.
2282 So we get either a reasonable negative value or a reasonable
2283 unsigned value for this mode. */
2284 if (width < HOST_BITS_PER_WIDE_INT
2285 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
2286 != ((HOST_WIDE_INT) (-1) << (width - 1))))
2287 val &= ((HOST_WIDE_INT) 1 << width) - 1;
2289 return GEN_INT (val);
2294 if (GET_CODE (op0) == CONST_INT)
2295 return op0 != const0_rtx ? op1 : op2;
2297 /* Convert a == b ? b : a to "a". */
2298 if (GET_CODE (op0) == NE && ! side_effects_p (op0)
2299 && (! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
2300 && rtx_equal_p (XEXP (op0, 0), op1)
2301 && rtx_equal_p (XEXP (op0, 1), op2))
2303 else if (GET_CODE (op0) == EQ && ! side_effects_p (op0)
2304 && (! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
2305 && rtx_equal_p (XEXP (op0, 1), op1)
2306 && rtx_equal_p (XEXP (op0, 0), op2))
2308 else if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && ! side_effects_p (op0))
2310 enum machine_mode cmp_mode = (GET_MODE (XEXP (op0, 0)) == VOIDmode
2311 ? GET_MODE (XEXP (op0, 1))
2312 : GET_MODE (XEXP (op0, 0)));
2314 if (cmp_mode == VOIDmode)
2315 cmp_mode = op0_mode;
2316 temp = simplify_relational_operation (GET_CODE (op0), cmp_mode,
2317 XEXP (op0, 0), XEXP (op0, 1));
2319 /* See if any simplifications were possible. */
2320 if (temp == const0_rtx)
2322 else if (temp == const1_rtx)
2327 /* Look for happy constants in op1 and op2. */
2328 if (GET_CODE (op1) == CONST_INT && GET_CODE (op2) == CONST_INT)
2330 HOST_WIDE_INT t = INTVAL (op1);
2331 HOST_WIDE_INT f = INTVAL (op2);
2333 if (t == STORE_FLAG_VALUE && f == 0)
2334 code = GET_CODE (op0);
2335 else if (t == 0 && f == STORE_FLAG_VALUE)
2338 tmp = reversed_comparison_code (op0, NULL_RTX);
2346 return gen_rtx_fmt_ee (code, mode, XEXP (op0, 0), XEXP (op0, 1));
2358 /* Simplify SUBREG:OUTERMODE(OP:INNERMODE, BYTE)
2359 Return 0 if no simplifications is possible. */
2361 simplify_subreg (outermode, op, innermode, byte)
2364 enum machine_mode outermode, innermode;
2366 /* Little bit of sanity checking. */
2367 if (innermode == VOIDmode || outermode == VOIDmode
2368 || innermode == BLKmode || outermode == BLKmode)
2371 if (GET_MODE (op) != innermode
2372 && GET_MODE (op) != VOIDmode)
2375 if (byte % GET_MODE_SIZE (outermode)
2376 || byte >= GET_MODE_SIZE (innermode))
2379 if (outermode == innermode && !byte)
2382 /* Attempt to simplify constant to non-SUBREG expression. */
2383 if (CONSTANT_P (op))
2386 unsigned HOST_WIDE_INT val = 0;
2388 /* ??? This code is partly redundant with code below, but can handle
2389 the subregs of floats and similar corner cases.
2390 Later it we should move all simplification code here and rewrite
2391 GEN_LOWPART_IF_POSSIBLE, GEN_HIGHPART, OPERAND_SUBWORD and friends
2392 using SIMPLIFY_SUBREG. */
2393 if (subreg_lowpart_offset (outermode, innermode) == byte)
2395 rtx new = gen_lowpart_if_possible (outermode, op);
2400 /* Similar comment as above apply here. */
2401 if (GET_MODE_SIZE (outermode) == UNITS_PER_WORD
2402 && GET_MODE_SIZE (innermode) > UNITS_PER_WORD
2403 && GET_MODE_CLASS (outermode) == MODE_INT)
2405 rtx new = constant_subword (op,
2406 (byte / UNITS_PER_WORD),
2412 offset = byte * BITS_PER_UNIT;
2413 switch (GET_CODE (op))
2416 if (GET_MODE (op) != VOIDmode)
2419 /* We can't handle this case yet. */
2420 if (GET_MODE_BITSIZE (outermode) >= HOST_BITS_PER_WIDE_INT)
2423 part = offset >= HOST_BITS_PER_WIDE_INT;
2424 if ((BITS_PER_WORD > HOST_BITS_PER_WIDE_INT
2425 && BYTES_BIG_ENDIAN)
2426 || (BITS_PER_WORD <= HOST_BITS_PER_WIDE_INT
2427 && WORDS_BIG_ENDIAN))
2429 val = part ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op);
2430 offset %= HOST_BITS_PER_WIDE_INT;
2432 /* We've already picked the word we want from a double, so
2433 pretend this is actually an integer. */
2434 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
2438 if (GET_CODE (op) == CONST_INT)
2441 /* We don't handle synthetizing of non-integral constants yet. */
2442 if (GET_MODE_CLASS (outermode) != MODE_INT)
2445 if (BYTES_BIG_ENDIAN || WORDS_BIG_ENDIAN)
2447 if (WORDS_BIG_ENDIAN)
2448 offset = (GET_MODE_BITSIZE (innermode)
2449 - GET_MODE_BITSIZE (outermode) - offset);
2450 if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN
2451 && GET_MODE_SIZE (outermode) < UNITS_PER_WORD)
2452 offset = (offset + BITS_PER_WORD - GET_MODE_BITSIZE (outermode)
2453 - 2 * (offset % BITS_PER_WORD));
2456 if (offset >= HOST_BITS_PER_WIDE_INT)
2457 return ((HOST_WIDE_INT) val < 0) ? constm1_rtx : const0_rtx;
2461 if (GET_MODE_BITSIZE (outermode) < HOST_BITS_PER_WIDE_INT)
2462 val = trunc_int_for_mode (val, outermode);
2463 return GEN_INT (val);
2470 /* Changing mode twice with SUBREG => just change it once,
2471 or not at all if changing back op starting mode. */
2472 if (GET_CODE (op) == SUBREG)
2474 enum machine_mode innermostmode = GET_MODE (SUBREG_REG (op));
2475 int final_offset = byte + SUBREG_BYTE (op);
2478 if (outermode == innermostmode
2479 && byte == 0 && SUBREG_BYTE (op) == 0)
2480 return SUBREG_REG (op);
2482 /* The SUBREG_BYTE represents offset, as if the value were stored
2483 in memory. Irritating exception is paradoxical subreg, where
2484 we define SUBREG_BYTE to be 0. On big endian machines, this
2485 value should be negative. For a moment, undo this exception. */
2486 if (byte == 0 && GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
2488 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
2489 if (WORDS_BIG_ENDIAN)
2490 final_offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2491 if (BYTES_BIG_ENDIAN)
2492 final_offset += difference % UNITS_PER_WORD;
2494 if (SUBREG_BYTE (op) == 0
2495 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
2497 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
2498 if (WORDS_BIG_ENDIAN)
2499 final_offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2500 if (BYTES_BIG_ENDIAN)
2501 final_offset += difference % UNITS_PER_WORD;
2504 /* See whether resulting subreg will be paradoxical. */
2505 if (GET_MODE_SIZE (innermostmode) > GET_MODE_SIZE (outermode))
2507 /* In nonparadoxical subregs we can't handle negative offsets. */
2508 if (final_offset < 0)
2510 /* Bail out in case resulting subreg would be incorrect. */
2511 if (final_offset % GET_MODE_SIZE (outermode)
2512 || (unsigned) final_offset >= GET_MODE_SIZE (innermostmode))
2518 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (outermode));
2520 /* In paradoxical subreg, see if we are still looking on lower part.
2521 If so, our SUBREG_BYTE will be 0. */
2522 if (WORDS_BIG_ENDIAN)
2523 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2524 if (BYTES_BIG_ENDIAN)
2525 offset += difference % UNITS_PER_WORD;
2526 if (offset == final_offset)
2532 /* Recurse for futher possible simplifications. */
2533 new = simplify_subreg (outermode, SUBREG_REG (op),
2534 GET_MODE (SUBREG_REG (op)),
2538 return gen_rtx_SUBREG (outermode, SUBREG_REG (op), final_offset);
2541 /* SUBREG of a hard register => just change the register number
2542 and/or mode. If the hard register is not valid in that mode,
2543 suppress this simplification. If the hard register is the stack,
2544 frame, or argument pointer, leave this as a SUBREG. */
2547 && (! REG_FUNCTION_VALUE_P (op)
2548 || ! rtx_equal_function_value_matters)
2549 #ifdef CLASS_CANNOT_CHANGE_MODE
2550 && ! (CLASS_CANNOT_CHANGE_MODE_P (outermode, innermode)
2551 && GET_MODE_CLASS (innermode) != MODE_COMPLEX_INT
2552 && GET_MODE_CLASS (innermode) != MODE_COMPLEX_FLOAT
2553 && (TEST_HARD_REG_BIT
2554 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
2557 && REGNO (op) < FIRST_PSEUDO_REGISTER
2558 && ((reload_completed && !frame_pointer_needed)
2559 || (REGNO (op) != FRAME_POINTER_REGNUM
2560 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
2561 && REGNO (op) != HARD_FRAME_POINTER_REGNUM
2564 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
2565 && REGNO (op) != ARG_POINTER_REGNUM
2567 && REGNO (op) != STACK_POINTER_REGNUM)
2569 int final_regno = subreg_hard_regno (gen_rtx_SUBREG (outermode, op, byte),
2572 /* ??? We do allow it if the current REG is not valid for
2573 its mode. This is a kludge to work around how float/complex
2574 arguments are passed on 32-bit Sparc and should be fixed. */
2575 if (HARD_REGNO_MODE_OK (final_regno, outermode)
2576 || ! HARD_REGNO_MODE_OK (REGNO (op), innermode))
2578 rtx x = gen_rtx_REG (outermode, final_regno);
2580 /* Propagate original regno. We don't have any way to specify
2581 the offset inside orignal regno, so do so only for lowpart.
2582 The information is used only by alias analysis that can not
2583 grog partial register anyway. */
2585 if (subreg_lowpart_offset (outermode, innermode) == byte)
2586 ORIGINAL_REGNO (x) = ORIGINAL_REGNO (op);
2591 /* If we have a SUBREG of a register that we are replacing and we are
2592 replacing it with a MEM, make a new MEM and try replacing the
2593 SUBREG with it. Don't do this if the MEM has a mode-dependent address
2594 or if we would be widening it. */
2596 if (GET_CODE (op) == MEM
2597 && ! mode_dependent_address_p (XEXP (op, 0))
2598 /* Allow splitting of volatile memory references in case we don't
2599 have instruction to move the whole thing. */
2600 && (! MEM_VOLATILE_P (op)
2601 || ! have_insn_for (SET, innermode))
2602 && GET_MODE_SIZE (outermode) <= GET_MODE_SIZE (GET_MODE (op)))
2603 return adjust_address_nv (op, outermode, byte);
2605 /* Handle complex values represented as CONCAT
2606 of real and imaginary part. */
2607 if (GET_CODE (op) == CONCAT)
2609 int is_realpart = byte < GET_MODE_UNIT_SIZE (innermode);
2610 rtx part = is_realpart ? XEXP (op, 0) : XEXP (op, 1);
2611 unsigned int final_offset;
2614 final_offset = byte % (GET_MODE_UNIT_SIZE (innermode));
2615 res = simplify_subreg (outermode, part, GET_MODE (part), final_offset);
2618 /* We can at least simplify it by referring directly to the relevant part. */
2619 return gen_rtx_SUBREG (outermode, part, final_offset);
2624 /* Make a SUBREG operation or equivalent if it folds. */
2627 simplify_gen_subreg (outermode, op, innermode, byte)
2630 enum machine_mode outermode, innermode;
2633 /* Little bit of sanity checking. */
2634 if (innermode == VOIDmode || outermode == VOIDmode
2635 || innermode == BLKmode || outermode == BLKmode)
2638 if (GET_MODE (op) != innermode
2639 && GET_MODE (op) != VOIDmode)
2642 if (byte % GET_MODE_SIZE (outermode)
2643 || byte >= GET_MODE_SIZE (innermode))
2646 if (GET_CODE (op) == QUEUED)
2649 new = simplify_subreg (outermode, op, innermode, byte);
2653 if (GET_CODE (op) == SUBREG || GET_MODE (op) == VOIDmode)
2656 return gen_rtx_SUBREG (outermode, op, byte);
2658 /* Simplify X, an rtx expression.
2660 Return the simplified expression or NULL if no simplifications
2663 This is the preferred entry point into the simplification routines;
2664 however, we still allow passes to call the more specific routines.
2666 Right now GCC has three (yes, three) major bodies of RTL simplficiation
2667 code that need to be unified.
2669 1. fold_rtx in cse.c. This code uses various CSE specific
2670 information to aid in RTL simplification.
2672 2. simplify_rtx in combine.c. Similar to fold_rtx, except that
2673 it uses combine specific information to aid in RTL
2676 3. The routines in this file.
2679 Long term we want to only have one body of simplification code; to
2680 get to that state I recommend the following steps:
2682 1. Pour over fold_rtx & simplify_rtx and move any simplifications
2683 which are not pass dependent state into these routines.
2685 2. As code is moved by #1, change fold_rtx & simplify_rtx to
2686 use this routine whenever possible.
2688 3. Allow for pass dependent state to be provided to these
2689 routines and add simplifications based on the pass dependent
2690 state. Remove code from cse.c & combine.c that becomes
2693 It will take time, but ultimately the compiler will be easier to
2694 maintain and improve. It's totally silly that when we add a
2695 simplification that it needs to be added to 4 places (3 for RTL
2696 simplification and 1 for tree simplification. */
2702 enum rtx_code code = GET_CODE (x);
2703 enum machine_mode mode = GET_MODE (x);
2705 switch (GET_RTX_CLASS (code))
2708 return simplify_unary_operation (code, mode,
2709 XEXP (x, 0), GET_MODE (XEXP (x, 0)));
2711 if (swap_commutative_operands_p (XEXP (x, 0), XEXP (x, 1)))
2716 XEXP (x, 0) = XEXP (x, 1);
2718 return simplify_binary_operation (code, mode,
2719 XEXP (x, 0), XEXP (x, 1));
2723 return simplify_binary_operation (code, mode, XEXP (x, 0), XEXP (x, 1));
2727 return simplify_ternary_operation (code, mode, GET_MODE (XEXP (x, 0)),
2728 XEXP (x, 0), XEXP (x, 1),
2732 return simplify_relational_operation (code,
2733 ((GET_MODE (XEXP (x, 0))
2735 ? GET_MODE (XEXP (x, 0))
2736 : GET_MODE (XEXP (x, 1))),
2737 XEXP (x, 0), XEXP (x, 1));
2739 /* The only case we try to handle is a SUBREG. */
2741 return simplify_gen_subreg (mode, SUBREG_REG (x),
2742 GET_MODE (SUBREG_REG (x)),