1 /* RTL simplification functions for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
29 #include "hard-reg-set.h"
32 #include "insn-config.h"
41 /* Simplification and canonicalization of RTL. */
43 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
44 virtual regs here because the simplify_*_operation routines are called
45 by integrate.c, which is called before virtual register instantiation.
47 ?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
48 a header file so that their definitions can be shared with the
49 simplification routines in simplify-rtx.c. Until then, do not
50 change these macros without also changing the copy in simplify-rtx.c. */
52 #define FIXED_BASE_PLUS_P(X) \
53 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
54 || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\
55 || (X) == virtual_stack_vars_rtx \
56 || (X) == virtual_incoming_args_rtx \
57 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
58 && (XEXP (X, 0) == frame_pointer_rtx \
59 || XEXP (X, 0) == hard_frame_pointer_rtx \
60 || ((X) == arg_pointer_rtx \
61 && fixed_regs[ARG_POINTER_REGNUM]) \
62 || XEXP (X, 0) == virtual_stack_vars_rtx \
63 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
64 || GET_CODE (X) == ADDRESSOF)
66 /* Similar, but also allows reference to the stack pointer.
68 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
69 arg_pointer_rtx by itself is nonzero, because on at least one machine,
70 the i960, the arg pointer is zero when it is unused. */
72 #define NONZERO_BASE_PLUS_P(X) \
73 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
74 || (X) == virtual_stack_vars_rtx \
75 || (X) == virtual_incoming_args_rtx \
76 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
77 && (XEXP (X, 0) == frame_pointer_rtx \
78 || XEXP (X, 0) == hard_frame_pointer_rtx \
79 || ((X) == arg_pointer_rtx \
80 && fixed_regs[ARG_POINTER_REGNUM]) \
81 || XEXP (X, 0) == virtual_stack_vars_rtx \
82 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
83 || (X) == stack_pointer_rtx \
84 || (X) == virtual_stack_dynamic_rtx \
85 || (X) == virtual_outgoing_args_rtx \
86 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
87 && (XEXP (X, 0) == stack_pointer_rtx \
88 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
89 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
90 || GET_CODE (X) == ADDRESSOF)
92 /* Much code operates on (low, high) pairs; the low value is an
93 unsigned wide int, the high value a signed wide int. We
94 occasionally need to sign extend from low to high as if low were a
96 #define HWI_SIGN_EXTEND(low) \
97 ((((HOST_WIDE_INT) low) < 0) ? ((HOST_WIDE_INT) -1) : ((HOST_WIDE_INT) 0))
99 static rtx simplify_plus_minus PARAMS ((enum rtx_code,
100 enum machine_mode, rtx, rtx));
101 static void check_fold_consts PARAMS ((PTR));
102 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
103 static void simplify_unary_real PARAMS ((PTR));
104 static void simplify_binary_real PARAMS ((PTR));
106 static void simplify_binary_is2orm1 PARAMS ((PTR));
109 /* Make a binary operation by properly ordering the operands and
110 seeing if the expression folds. */
113 simplify_gen_binary (code, mode, op0, op1)
115 enum machine_mode mode;
120 /* Put complex operands first and constants second if commutative. */
121 if (GET_RTX_CLASS (code) == 'c'
122 && swap_commutative_operands_p (op0, op1))
123 tem = op0, op0 = op1, op1 = tem;
125 /* If this simplifies, do it. */
126 tem = simplify_binary_operation (code, mode, op0, op1);
131 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
132 just form the operation. */
134 if (code == PLUS && GET_CODE (op1) == CONST_INT
135 && GET_MODE (op0) != VOIDmode)
136 return plus_constant (op0, INTVAL (op1));
137 else if (code == MINUS && GET_CODE (op1) == CONST_INT
138 && GET_MODE (op0) != VOIDmode)
139 return plus_constant (op0, - INTVAL (op1));
141 return gen_rtx_fmt_ee (code, mode, op0, op1);
144 /* If X is a MEM referencing the constant pool, return the real value.
145 Otherwise return X. */
147 avoid_constant_pool_reference (x)
151 enum machine_mode cmode;
153 if (GET_CODE (x) != MEM)
157 if (GET_CODE (addr) != SYMBOL_REF
158 || ! CONSTANT_POOL_ADDRESS_P (addr))
161 c = get_pool_constant (addr);
162 cmode = get_pool_mode (addr);
164 /* If we're accessing the constant in a different mode than it was
165 originally stored, attempt to fix that up via subreg simplifications.
166 If that fails we have no choice but to return the original memory. */
167 if (cmode != GET_MODE (x))
169 c = simplify_subreg (GET_MODE (x), c, cmode, 0);
176 /* Make a unary operation by first seeing if it folds and otherwise making
177 the specified operation. */
180 simplify_gen_unary (code, mode, op, op_mode)
182 enum machine_mode mode;
184 enum machine_mode op_mode;
188 /* If this simplifies, use it. */
189 if ((tem = simplify_unary_operation (code, mode, op, op_mode)) != 0)
192 return gen_rtx_fmt_e (code, mode, op);
195 /* Likewise for ternary operations. */
198 simplify_gen_ternary (code, mode, op0_mode, op0, op1, op2)
200 enum machine_mode mode, op0_mode;
205 /* If this simplifies, use it. */
206 if (0 != (tem = simplify_ternary_operation (code, mode, op0_mode,
210 return gen_rtx_fmt_eee (code, mode, op0, op1, op2);
213 /* Likewise, for relational operations.
214 CMP_MODE specifies mode comparison is done in.
218 simplify_gen_relational (code, mode, cmp_mode, op0, op1)
220 enum machine_mode mode;
221 enum machine_mode cmp_mode;
226 if ((tem = simplify_relational_operation (code, cmp_mode, op0, op1)) != 0)
229 /* Put complex operands first and constants second. */
230 if (swap_commutative_operands_p (op0, op1))
231 tem = op0, op0 = op1, op1 = tem, code = swap_condition (code);
233 return gen_rtx_fmt_ee (code, mode, op0, op1);
236 /* Replace all occurrences of OLD in X with NEW and try to simplify the
237 resulting RTX. Return a new RTX which is as simplified as possible. */
240 simplify_replace_rtx (x, old, new)
245 enum rtx_code code = GET_CODE (x);
246 enum machine_mode mode = GET_MODE (x);
248 /* If X is OLD, return NEW. Otherwise, if this is an expression, try
249 to build a new expression substituting recursively. If we can't do
250 anything, return our input. */
255 switch (GET_RTX_CLASS (code))
259 enum machine_mode op_mode = GET_MODE (XEXP (x, 0));
260 rtx op = (XEXP (x, 0) == old
261 ? new : simplify_replace_rtx (XEXP (x, 0), old, new));
263 return simplify_gen_unary (code, mode, op, op_mode);
269 simplify_gen_binary (code, mode,
270 simplify_replace_rtx (XEXP (x, 0), old, new),
271 simplify_replace_rtx (XEXP (x, 1), old, new));
274 enum machine_mode op_mode = (GET_MODE (XEXP (x, 0)) != VOIDmode
275 ? GET_MODE (XEXP (x, 0))
276 : GET_MODE (XEXP (x, 1)));
277 rtx op0 = simplify_replace_rtx (XEXP (x, 0), old, new);
278 rtx op1 = simplify_replace_rtx (XEXP (x, 1), old, new);
281 simplify_gen_relational (code, mode,
284 : GET_MODE (op0) != VOIDmode
293 enum machine_mode op_mode = GET_MODE (XEXP (x, 0));
294 rtx op0 = simplify_replace_rtx (XEXP (x, 0), old, new);
297 simplify_gen_ternary (code, mode,
302 simplify_replace_rtx (XEXP (x, 1), old, new),
303 simplify_replace_rtx (XEXP (x, 2), old, new));
307 /* The only case we try to handle is a SUBREG. */
311 exp = simplify_gen_subreg (GET_MODE (x),
312 simplify_replace_rtx (SUBREG_REG (x),
314 GET_MODE (SUBREG_REG (x)),
322 if (GET_CODE (x) == MEM)
324 replace_equiv_address_nv (x,
325 simplify_replace_rtx (XEXP (x, 0),
333 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
334 /* Subroutine of simplify_unary_operation, called via do_float_handler.
335 Handles simplification of unary ops on floating point values. */
336 struct simplify_unary_real_args
340 enum machine_mode mode;
344 #define REAL_VALUE_ABS(d_) \
345 (REAL_VALUE_NEGATIVE (d_) ? REAL_VALUE_NEGATE (d_) : (d_))
348 simplify_unary_real (p)
353 struct simplify_unary_real_args *args =
354 (struct simplify_unary_real_args *) p;
356 REAL_VALUE_FROM_CONST_DOUBLE (d, args->operand);
358 if (args->want_integer)
364 case FIX: i = REAL_VALUE_FIX (d); break;
365 case UNSIGNED_FIX: i = REAL_VALUE_UNSIGNED_FIX (d); break;
369 args->result = GEN_INT (trunc_int_for_mode (i, args->mode));
376 /* We don't attempt to optimize this. */
380 case ABS: d = REAL_VALUE_ABS (d); break;
381 case NEG: d = REAL_VALUE_NEGATE (d); break;
382 case FLOAT_TRUNCATE: d = real_value_truncate (args->mode, d); break;
383 case FLOAT_EXTEND: /* All this does is change the mode. */ break;
384 case FIX: d = REAL_VALUE_RNDZINT (d); break;
385 case UNSIGNED_FIX: d = REAL_VALUE_UNSIGNED_RNDZINT (d); break;
389 args->result = CONST_DOUBLE_FROM_REAL_VALUE (d, args->mode);
394 /* Try to simplify a unary operation CODE whose output mode is to be
395 MODE with input operand OP whose mode was originally OP_MODE.
396 Return zero if no simplification can be made. */
398 simplify_unary_operation (code, mode, op, op_mode)
400 enum machine_mode mode;
402 enum machine_mode op_mode;
404 unsigned int width = GET_MODE_BITSIZE (mode);
405 rtx trueop = avoid_constant_pool_reference (op);
407 /* The order of these tests is critical so that, for example, we don't
408 check the wrong mode (input vs. output) for a conversion operation,
409 such as FIX. At some point, this should be simplified. */
411 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
413 if (code == FLOAT && GET_MODE (trueop) == VOIDmode
414 && (GET_CODE (trueop) == CONST_DOUBLE || GET_CODE (trueop) == CONST_INT))
416 HOST_WIDE_INT hv, lv;
419 if (GET_CODE (trueop) == CONST_INT)
420 lv = INTVAL (trueop), hv = HWI_SIGN_EXTEND (lv);
422 lv = CONST_DOUBLE_LOW (trueop), hv = CONST_DOUBLE_HIGH (trueop);
424 #ifdef REAL_ARITHMETIC
425 REAL_VALUE_FROM_INT (d, lv, hv, mode);
430 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
431 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
432 d += (double) (unsigned HOST_WIDE_INT) (~ lv);
438 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
439 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
440 d += (double) (unsigned HOST_WIDE_INT) lv;
442 #endif /* REAL_ARITHMETIC */
443 d = real_value_truncate (mode, d);
444 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
446 else if (code == UNSIGNED_FLOAT && GET_MODE (trueop) == VOIDmode
447 && (GET_CODE (trueop) == CONST_DOUBLE
448 || GET_CODE (trueop) == CONST_INT))
450 HOST_WIDE_INT hv, lv;
453 if (GET_CODE (trueop) == CONST_INT)
454 lv = INTVAL (trueop), hv = HWI_SIGN_EXTEND (lv);
456 lv = CONST_DOUBLE_LOW (trueop), hv = CONST_DOUBLE_HIGH (trueop);
458 if (op_mode == VOIDmode)
460 /* We don't know how to interpret negative-looking numbers in
461 this case, so don't try to fold those. */
465 else if (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT * 2)
468 hv = 0, lv &= GET_MODE_MASK (op_mode);
470 #ifdef REAL_ARITHMETIC
471 REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv, mode);
474 d = (double) (unsigned HOST_WIDE_INT) hv;
475 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
476 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
477 d += (double) (unsigned HOST_WIDE_INT) lv;
478 #endif /* REAL_ARITHMETIC */
479 d = real_value_truncate (mode, d);
480 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
484 if (GET_CODE (trueop) == CONST_INT
485 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
487 register HOST_WIDE_INT arg0 = INTVAL (trueop);
488 register HOST_WIDE_INT val;
501 val = (arg0 >= 0 ? arg0 : - arg0);
505 /* Don't use ffs here. Instead, get low order bit and then its
506 number. If arg0 is zero, this will return 0, as desired. */
507 arg0 &= GET_MODE_MASK (mode);
508 val = exact_log2 (arg0 & (- arg0)) + 1;
516 if (op_mode == VOIDmode)
518 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
520 /* If we were really extending the mode,
521 we would have to distinguish between zero-extension
522 and sign-extension. */
523 if (width != GET_MODE_BITSIZE (op_mode))
527 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
528 val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
534 if (op_mode == VOIDmode)
536 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
538 /* If we were really extending the mode,
539 we would have to distinguish between zero-extension
540 and sign-extension. */
541 if (width != GET_MODE_BITSIZE (op_mode))
545 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
548 = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
550 & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1)))
551 val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
566 val = trunc_int_for_mode (val, mode);
568 return GEN_INT (val);
571 /* We can do some operations on integer CONST_DOUBLEs. Also allow
572 for a DImode operation on a CONST_INT. */
573 else if (GET_MODE (trueop) == VOIDmode && width <= HOST_BITS_PER_INT * 2
574 && (GET_CODE (trueop) == CONST_DOUBLE
575 || GET_CODE (trueop) == CONST_INT))
577 unsigned HOST_WIDE_INT l1, lv;
578 HOST_WIDE_INT h1, hv;
580 if (GET_CODE (trueop) == CONST_DOUBLE)
581 l1 = CONST_DOUBLE_LOW (trueop), h1 = CONST_DOUBLE_HIGH (trueop);
583 l1 = INTVAL (trueop), h1 = HWI_SIGN_EXTEND (l1);
593 neg_double (l1, h1, &lv, &hv);
598 neg_double (l1, h1, &lv, &hv);
606 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1;
608 lv = exact_log2 (l1 & (-l1)) + 1;
612 /* This is just a change-of-mode, so do nothing. */
617 if (op_mode == VOIDmode
618 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
622 lv = l1 & GET_MODE_MASK (op_mode);
626 if (op_mode == VOIDmode
627 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
631 lv = l1 & GET_MODE_MASK (op_mode);
632 if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT
633 && (lv & ((HOST_WIDE_INT) 1
634 << (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
635 lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
637 hv = HWI_SIGN_EXTEND (lv);
648 return immed_double_const (lv, hv, mode);
651 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
652 else if (GET_CODE (trueop) == CONST_DOUBLE
653 && GET_MODE_CLASS (mode) == MODE_FLOAT)
655 struct simplify_unary_real_args args;
656 args.operand = trueop;
659 args.want_integer = false;
661 if (do_float_handler (simplify_unary_real, (PTR) &args))
667 else if (GET_CODE (trueop) == CONST_DOUBLE
668 && GET_MODE_CLASS (GET_MODE (trueop)) == MODE_FLOAT
669 && GET_MODE_CLASS (mode) == MODE_INT
670 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
672 struct simplify_unary_real_args args;
673 args.operand = trueop;
676 args.want_integer = true;
678 if (do_float_handler (simplify_unary_real, (PTR) &args))
684 /* This was formerly used only for non-IEEE float.
685 eggert@twinsun.com says it is safe for IEEE also. */
688 enum rtx_code reversed;
689 /* There are some simplifications we can do even if the operands
694 /* (not (not X)) == X. */
695 if (GET_CODE (op) == NOT)
698 /* (not (eq X Y)) == (ne X Y), etc. */
699 if (mode == BImode && GET_RTX_CLASS (GET_CODE (op)) == '<'
700 && ((reversed = reversed_comparison_code (op, NULL_RTX))
702 return gen_rtx_fmt_ee (reversed,
703 op_mode, XEXP (op, 0), XEXP (op, 1));
707 /* (neg (neg X)) == X. */
708 if (GET_CODE (op) == NEG)
713 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
714 becomes just the MINUS if its mode is MODE. This allows
715 folding switch statements on machines using casesi (such as
717 if (GET_CODE (op) == TRUNCATE
718 && GET_MODE (XEXP (op, 0)) == mode
719 && GET_CODE (XEXP (op, 0)) == MINUS
720 && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
721 && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
724 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
725 if (! POINTERS_EXTEND_UNSIGNED
726 && mode == Pmode && GET_MODE (op) == ptr_mode
728 || (GET_CODE (op) == SUBREG
729 && GET_CODE (SUBREG_REG (op)) == REG
730 && REG_POINTER (SUBREG_REG (op))
731 && GET_MODE (SUBREG_REG (op)) == Pmode)))
732 return convert_memory_address (Pmode, op);
736 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
738 if (POINTERS_EXTEND_UNSIGNED > 0
739 && mode == Pmode && GET_MODE (op) == ptr_mode
741 || (GET_CODE (op) == SUBREG
742 && GET_CODE (SUBREG_REG (op)) == REG
743 && REG_POINTER (SUBREG_REG (op))
744 && GET_MODE (SUBREG_REG (op)) == Pmode)))
745 return convert_memory_address (Pmode, op);
757 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
758 /* Subroutine of simplify_binary_operation, called via do_float_handler.
759 Handles simplification of binary ops on floating point values. */
760 struct simplify_binary_real_args
762 rtx trueop0, trueop1;
765 enum machine_mode mode;
769 simplify_binary_real (p)
772 REAL_VALUE_TYPE f0, f1, value;
773 struct simplify_binary_real_args *args =
774 (struct simplify_binary_real_args *) p;
776 REAL_VALUE_FROM_CONST_DOUBLE (f0, args->trueop0);
777 REAL_VALUE_FROM_CONST_DOUBLE (f1, args->trueop1);
778 f0 = real_value_truncate (args->mode, f0);
779 f1 = real_value_truncate (args->mode, f1);
781 #ifdef REAL_ARITHMETIC
782 #ifndef REAL_INFINITY
783 if (args->code == DIV && REAL_VALUES_EQUAL (f1, dconst0))
789 REAL_ARITHMETIC (value, rtx_to_tree_code (args->code), f0, f1);
803 #ifndef REAL_INFINITY
810 value = MIN (f0, f1);
813 value = MAX (f0, f1);
820 value = real_value_truncate (args->mode, value);
821 args->result = CONST_DOUBLE_FROM_REAL_VALUE (value, args->mode);
825 /* Another subroutine called via do_float_handler. This one tests
826 the floating point value given against 2. and -1. */
827 struct simplify_binary_is2orm1_args
835 simplify_binary_is2orm1 (p)
839 struct simplify_binary_is2orm1_args *args =
840 (struct simplify_binary_is2orm1_args *) p;
842 REAL_VALUE_FROM_CONST_DOUBLE (d, args->value);
843 args->is_2 = REAL_VALUES_EQUAL (d, dconst2);
844 args->is_m1 = REAL_VALUES_EQUAL (d, dconstm1);
847 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
848 and OP1. Return 0 if no simplification is possible.
850 Don't use this for relational operations such as EQ or LT.
851 Use simplify_relational_operation instead. */
853 simplify_binary_operation (code, mode, op0, op1)
855 enum machine_mode mode;
858 register HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
860 unsigned int width = GET_MODE_BITSIZE (mode);
862 rtx trueop0 = avoid_constant_pool_reference (op0);
863 rtx trueop1 = avoid_constant_pool_reference (op1);
865 /* Relational operations don't work here. We must know the mode
866 of the operands in order to do the comparison correctly.
867 Assuming a full word can give incorrect results.
868 Consider comparing 128 with -128 in QImode. */
870 if (GET_RTX_CLASS (code) == '<')
873 /* Make sure the constant is second. */
874 if (GET_RTX_CLASS (code) == 'c'
875 && swap_commutative_operands_p (trueop0, trueop1))
877 tem = op0, op0 = op1, op1 = tem;
878 tem = trueop0, trueop0 = trueop1, trueop1 = tem;
881 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
882 if (GET_MODE_CLASS (mode) == MODE_FLOAT
883 && GET_CODE (trueop0) == CONST_DOUBLE
884 && GET_CODE (trueop1) == CONST_DOUBLE
885 && mode == GET_MODE (op0) && mode == GET_MODE (op1))
887 struct simplify_binary_real_args args;
888 args.trueop0 = trueop0;
889 args.trueop1 = trueop1;
893 if (do_float_handler (simplify_binary_real, (PTR) &args))
897 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
899 /* We can fold some multi-word operations. */
900 if (GET_MODE_CLASS (mode) == MODE_INT
901 && width == HOST_BITS_PER_WIDE_INT * 2
902 && (GET_CODE (trueop0) == CONST_DOUBLE
903 || GET_CODE (trueop0) == CONST_INT)
904 && (GET_CODE (trueop1) == CONST_DOUBLE
905 || GET_CODE (trueop1) == CONST_INT))
907 unsigned HOST_WIDE_INT l1, l2, lv;
908 HOST_WIDE_INT h1, h2, hv;
910 if (GET_CODE (trueop0) == CONST_DOUBLE)
911 l1 = CONST_DOUBLE_LOW (trueop0), h1 = CONST_DOUBLE_HIGH (trueop0);
913 l1 = INTVAL (trueop0), h1 = HWI_SIGN_EXTEND (l1);
915 if (GET_CODE (trueop1) == CONST_DOUBLE)
916 l2 = CONST_DOUBLE_LOW (trueop1), h2 = CONST_DOUBLE_HIGH (trueop1);
918 l2 = INTVAL (trueop1), h2 = HWI_SIGN_EXTEND (l2);
923 /* A - B == A + (-B). */
924 neg_double (l2, h2, &lv, &hv);
927 /* .. fall through ... */
930 add_double (l1, h1, l2, h2, &lv, &hv);
934 mul_double (l1, h1, l2, h2, &lv, &hv);
937 case DIV: case MOD: case UDIV: case UMOD:
938 /* We'd need to include tree.h to do this and it doesn't seem worth
943 lv = l1 & l2, hv = h1 & h2;
947 lv = l1 | l2, hv = h1 | h2;
951 lv = l1 ^ l2, hv = h1 ^ h2;
957 && ((unsigned HOST_WIDE_INT) l1
958 < (unsigned HOST_WIDE_INT) l2)))
967 && ((unsigned HOST_WIDE_INT) l1
968 > (unsigned HOST_WIDE_INT) l2)))
975 if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2
977 && ((unsigned HOST_WIDE_INT) l1
978 < (unsigned HOST_WIDE_INT) l2)))
985 if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2
987 && ((unsigned HOST_WIDE_INT) l1
988 > (unsigned HOST_WIDE_INT) l2)))
994 case LSHIFTRT: case ASHIFTRT:
996 case ROTATE: case ROTATERT:
997 #ifdef SHIFT_COUNT_TRUNCATED
998 if (SHIFT_COUNT_TRUNCATED)
999 l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
1002 if (h2 != 0 || l2 >= GET_MODE_BITSIZE (mode))
1005 if (code == LSHIFTRT || code == ASHIFTRT)
1006 rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
1008 else if (code == ASHIFT)
1009 lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1);
1010 else if (code == ROTATE)
1011 lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
1012 else /* code == ROTATERT */
1013 rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
1020 return immed_double_const (lv, hv, mode);
1023 if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
1024 || width > HOST_BITS_PER_WIDE_INT || width == 0)
1026 /* Even if we can't compute a constant result,
1027 there are some cases worth simplifying. */
1032 /* In IEEE floating point, x+0 is not the same as x. Similarly
1033 for the other optimizations below. */
1034 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
1035 && FLOAT_MODE_P (mode) && ! flag_unsafe_math_optimizations)
1038 if (trueop1 == CONST0_RTX (mode))
1041 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
1042 if (GET_CODE (op0) == NEG)
1043 return simplify_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
1044 else if (GET_CODE (op1) == NEG)
1045 return simplify_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
1047 /* (~a) + 1 -> -a */
1048 if (INTEGRAL_MODE_P (mode)
1049 && GET_CODE (op0) == NOT
1050 && trueop1 == const1_rtx)
1051 return gen_rtx_NEG (mode, XEXP (op0, 0));
1053 /* Handle both-operands-constant cases. We can only add
1054 CONST_INTs to constants since the sum of relocatable symbols
1055 can't be handled by most assemblers. Don't add CONST_INT
1056 to CONST_INT since overflow won't be computed properly if wider
1057 than HOST_BITS_PER_WIDE_INT. */
1059 if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode
1060 && GET_CODE (op1) == CONST_INT)
1061 return plus_constant (op0, INTVAL (op1));
1062 else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode
1063 && GET_CODE (op0) == CONST_INT)
1064 return plus_constant (op1, INTVAL (op0));
1066 /* See if this is something like X * C - X or vice versa or
1067 if the multiplication is written as a shift. If so, we can
1068 distribute and make a new multiply, shift, or maybe just
1069 have X (if C is 2 in the example above). But don't make
1070 real multiply if we didn't have one before. */
1072 if (! FLOAT_MODE_P (mode))
1074 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
1075 rtx lhs = op0, rhs = op1;
1078 if (GET_CODE (lhs) == NEG)
1079 coeff0 = -1, lhs = XEXP (lhs, 0);
1080 else if (GET_CODE (lhs) == MULT
1081 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
1083 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
1086 else if (GET_CODE (lhs) == ASHIFT
1087 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
1088 && INTVAL (XEXP (lhs, 1)) >= 0
1089 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
1091 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
1092 lhs = XEXP (lhs, 0);
1095 if (GET_CODE (rhs) == NEG)
1096 coeff1 = -1, rhs = XEXP (rhs, 0);
1097 else if (GET_CODE (rhs) == MULT
1098 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
1100 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
1103 else if (GET_CODE (rhs) == ASHIFT
1104 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
1105 && INTVAL (XEXP (rhs, 1)) >= 0
1106 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
1108 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
1109 rhs = XEXP (rhs, 0);
1112 if (rtx_equal_p (lhs, rhs))
1114 tem = simplify_gen_binary (MULT, mode, lhs,
1115 GEN_INT (coeff0 + coeff1));
1116 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
1120 /* If one of the operands is a PLUS or a MINUS, see if we can
1121 simplify this by the associative law.
1122 Don't use the associative law for floating point.
1123 The inaccuracy makes it nonassociative,
1124 and subtle programs can break if operations are associated. */
1126 if (INTEGRAL_MODE_P (mode)
1127 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
1128 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
1129 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
1135 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
1136 using cc0, in which case we want to leave it as a COMPARE
1137 so we can distinguish it from a register-register-copy.
1139 In IEEE floating point, x-0 is not the same as x. */
1141 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
1142 || ! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
1143 && trueop1 == CONST0_RTX (mode))
1147 /* Convert (compare (gt (flags) 0) (lt (flags) 0)) to (flags). */
1148 if (((GET_CODE (op0) == GT && GET_CODE (op1) == LT)
1149 || (GET_CODE (op0) == GTU && GET_CODE (op1) == LTU))
1150 && XEXP (op0, 1) == const0_rtx && XEXP (op1, 1) == const0_rtx)
1152 rtx xop00 = XEXP (op0, 0);
1153 rtx xop10 = XEXP (op1, 0);
1156 if (GET_CODE (xop00) == CC0 && GET_CODE (xop10) == CC0)
1158 if (GET_CODE (xop00) == REG && GET_CODE (xop10) == REG
1159 && GET_MODE (xop00) == GET_MODE (xop10)
1160 && REGNO (xop00) == REGNO (xop10)
1161 && GET_MODE_CLASS (GET_MODE (xop00)) == MODE_CC
1162 && GET_MODE_CLASS (GET_MODE (xop10)) == MODE_CC)
1169 /* None of these optimizations can be done for IEEE
1171 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
1172 && FLOAT_MODE_P (mode) && ! flag_unsafe_math_optimizations)
1175 /* We can't assume x-x is 0 even with non-IEEE floating point,
1176 but since it is zero except in very strange circumstances, we
1177 will treat it as zero with -funsafe-math-optimizations. */
1178 if (rtx_equal_p (trueop0, trueop1)
1179 && ! side_effects_p (op0)
1180 && (! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations))
1181 return CONST0_RTX (mode);
1183 /* Change subtraction from zero into negation. */
1184 if (trueop0 == CONST0_RTX (mode))
1185 return gen_rtx_NEG (mode, op1);
1187 /* (-1 - a) is ~a. */
1188 if (trueop0 == constm1_rtx)
1189 return gen_rtx_NOT (mode, op1);
1191 /* Subtracting 0 has no effect. */
1192 if (trueop1 == CONST0_RTX (mode))
1195 /* See if this is something like X * C - X or vice versa or
1196 if the multiplication is written as a shift. If so, we can
1197 distribute and make a new multiply, shift, or maybe just
1198 have X (if C is 2 in the example above). But don't make
1199 real multiply if we didn't have one before. */
1201 if (! FLOAT_MODE_P (mode))
1203 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
1204 rtx lhs = op0, rhs = op1;
1207 if (GET_CODE (lhs) == NEG)
1208 coeff0 = -1, lhs = XEXP (lhs, 0);
1209 else if (GET_CODE (lhs) == MULT
1210 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
1212 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
1215 else if (GET_CODE (lhs) == ASHIFT
1216 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
1217 && INTVAL (XEXP (lhs, 1)) >= 0
1218 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
1220 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
1221 lhs = XEXP (lhs, 0);
1224 if (GET_CODE (rhs) == NEG)
1225 coeff1 = - 1, rhs = XEXP (rhs, 0);
1226 else if (GET_CODE (rhs) == MULT
1227 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
1229 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
1232 else if (GET_CODE (rhs) == ASHIFT
1233 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
1234 && INTVAL (XEXP (rhs, 1)) >= 0
1235 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
1237 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
1238 rhs = XEXP (rhs, 0);
1241 if (rtx_equal_p (lhs, rhs))
1243 tem = simplify_gen_binary (MULT, mode, lhs,
1244 GEN_INT (coeff0 - coeff1));
1245 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
1249 /* (a - (-b)) -> (a + b). */
1250 if (GET_CODE (op1) == NEG)
1251 return simplify_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
1253 /* If one of the operands is a PLUS or a MINUS, see if we can
1254 simplify this by the associative law.
1255 Don't use the associative law for floating point.
1256 The inaccuracy makes it nonassociative,
1257 and subtle programs can break if operations are associated. */
1259 if (INTEGRAL_MODE_P (mode)
1260 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
1261 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
1262 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
1265 /* Don't let a relocatable value get a negative coeff. */
1266 if (GET_CODE (op1) == CONST_INT && GET_MODE (op0) != VOIDmode)
1267 return plus_constant (op0, - INTVAL (op1));
1269 /* (x - (x & y)) -> (x & ~y) */
1270 if (GET_CODE (op1) == AND)
1272 if (rtx_equal_p (op0, XEXP (op1, 0)))
1273 return simplify_gen_binary (AND, mode, op0,
1274 gen_rtx_NOT (mode, XEXP (op1, 1)));
1275 if (rtx_equal_p (op0, XEXP (op1, 1)))
1276 return simplify_gen_binary (AND, mode, op0,
1277 gen_rtx_NOT (mode, XEXP (op1, 0)));
1282 if (trueop1 == constm1_rtx)
1284 tem = simplify_unary_operation (NEG, mode, op0, mode);
1286 return tem ? tem : gen_rtx_NEG (mode, op0);
1289 /* In IEEE floating point, x*0 is not always 0. */
1290 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
1291 || ! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
1292 && trueop1 == CONST0_RTX (mode)
1293 && ! side_effects_p (op0))
1296 /* In IEEE floating point, x*1 is not equivalent to x for nans.
1297 However, ANSI says we can drop signals,
1298 so we can do this anyway. */
1299 if (trueop1 == CONST1_RTX (mode))
1302 /* Convert multiply by constant power of two into shift unless
1303 we are still generating RTL. This test is a kludge. */
1304 if (GET_CODE (trueop1) == CONST_INT
1305 && (val = exact_log2 (INTVAL (trueop1))) >= 0
1306 /* If the mode is larger than the host word size, and the
1307 uppermost bit is set, then this isn't a power of two due
1308 to implicit sign extension. */
1309 && (width <= HOST_BITS_PER_WIDE_INT
1310 || val != HOST_BITS_PER_WIDE_INT - 1)
1311 && ! rtx_equal_function_value_matters)
1312 return gen_rtx_ASHIFT (mode, op0, GEN_INT (val));
1314 if (GET_CODE (trueop1) == CONST_DOUBLE
1315 && GET_MODE_CLASS (GET_MODE (trueop1)) == MODE_FLOAT)
1317 struct simplify_binary_is2orm1_args args;
1319 args.value = trueop1;
1320 if (! do_float_handler (simplify_binary_is2orm1, (PTR) &args))
1323 /* x*2 is x+x and x*(-1) is -x */
1324 if (args.is_2 && GET_MODE (op0) == mode)
1325 return gen_rtx_PLUS (mode, op0, copy_rtx (op0));
1327 else if (args.is_m1 && GET_MODE (op0) == mode)
1328 return gen_rtx_NEG (mode, op0);
1333 if (trueop1 == const0_rtx)
1335 if (GET_CODE (trueop1) == CONST_INT
1336 && ((INTVAL (trueop1) & GET_MODE_MASK (mode))
1337 == GET_MODE_MASK (mode)))
1339 if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1341 /* A | (~A) -> -1 */
1342 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
1343 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
1344 && ! side_effects_p (op0)
1345 && GET_MODE_CLASS (mode) != MODE_CC)
1350 if (trueop1 == const0_rtx)
1352 if (GET_CODE (trueop1) == CONST_INT
1353 && ((INTVAL (trueop1) & GET_MODE_MASK (mode))
1354 == GET_MODE_MASK (mode)))
1355 return gen_rtx_NOT (mode, op0);
1356 if (trueop0 == trueop1 && ! side_effects_p (op0)
1357 && GET_MODE_CLASS (mode) != MODE_CC)
1362 if (trueop1 == const0_rtx && ! side_effects_p (op0))
1364 if (GET_CODE (trueop1) == CONST_INT
1365 && ((INTVAL (trueop1) & GET_MODE_MASK (mode))
1366 == GET_MODE_MASK (mode)))
1368 if (trueop0 == trueop1 && ! side_effects_p (op0)
1369 && GET_MODE_CLASS (mode) != MODE_CC)
1372 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
1373 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
1374 && ! side_effects_p (op0)
1375 && GET_MODE_CLASS (mode) != MODE_CC)
1380 /* Convert divide by power of two into shift (divide by 1 handled
1382 if (GET_CODE (trueop1) == CONST_INT
1383 && (arg1 = exact_log2 (INTVAL (trueop1))) > 0)
1384 return gen_rtx_LSHIFTRT (mode, op0, GEN_INT (arg1));
1386 /* ... fall through ... */
1389 if (trueop1 == CONST1_RTX (mode))
1392 /* In IEEE floating point, 0/x is not always 0. */
1393 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
1394 || ! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
1395 && trueop0 == CONST0_RTX (mode)
1396 && ! side_effects_p (op1))
1399 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
1400 /* Change division by a constant into multiplication. Only do
1401 this with -funsafe-math-optimizations. */
1402 else if (GET_CODE (trueop1) == CONST_DOUBLE
1403 && GET_MODE_CLASS (GET_MODE (trueop1)) == MODE_FLOAT
1404 && trueop1 != CONST0_RTX (mode)
1405 && flag_unsafe_math_optimizations)
1408 REAL_VALUE_FROM_CONST_DOUBLE (d, trueop1);
1410 if (! REAL_VALUES_EQUAL (d, dconst0))
1412 #if defined (REAL_ARITHMETIC)
1413 REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d);
1414 return gen_rtx_MULT (mode, op0,
1415 CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
1418 gen_rtx_MULT (mode, op0,
1419 CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode));
1427 /* Handle modulus by power of two (mod with 1 handled below). */
1428 if (GET_CODE (trueop1) == CONST_INT
1429 && exact_log2 (INTVAL (trueop1)) > 0)
1430 return gen_rtx_AND (mode, op0, GEN_INT (INTVAL (op1) - 1));
1432 /* ... fall through ... */
1435 if ((trueop0 == const0_rtx || trueop1 == const1_rtx)
1436 && ! side_effects_p (op0) && ! side_effects_p (op1))
1442 /* Rotating ~0 always results in ~0. */
1443 if (GET_CODE (trueop0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
1444 && (unsigned HOST_WIDE_INT) INTVAL (trueop0) == GET_MODE_MASK (mode)
1445 && ! side_effects_p (op1))
1448 /* ... fall through ... */
1453 if (trueop1 == const0_rtx)
1455 if (trueop0 == const0_rtx && ! side_effects_p (op1))
1460 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (trueop1) == CONST_INT
1461 && INTVAL (trueop1) == (HOST_WIDE_INT) 1 << (width -1)
1462 && ! side_effects_p (op0))
1464 else if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1469 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (trueop1) == CONST_INT
1470 && ((unsigned HOST_WIDE_INT) INTVAL (trueop1)
1471 == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
1472 && ! side_effects_p (op0))
1474 else if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1479 if (trueop1 == const0_rtx && ! side_effects_p (op0))
1481 else if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1486 if (trueop1 == constm1_rtx && ! side_effects_p (op0))
1488 else if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1499 /* Get the integer argument values in two forms:
1500 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
1502 arg0 = INTVAL (trueop0);
1503 arg1 = INTVAL (trueop1);
1505 if (width < HOST_BITS_PER_WIDE_INT)
1507 arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
1508 arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
1511 if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
1512 arg0s |= ((HOST_WIDE_INT) (-1) << width);
1515 if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
1516 arg1s |= ((HOST_WIDE_INT) (-1) << width);
1524 /* Compute the value of the arithmetic. */
1529 val = arg0s + arg1s;
1533 val = arg0s - arg1s;
1537 val = arg0s * arg1s;
1542 || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
1545 val = arg0s / arg1s;
1550 || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
1553 val = arg0s % arg1s;
1558 || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
1561 val = (unsigned HOST_WIDE_INT) arg0 / arg1;
1566 || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
1569 val = (unsigned HOST_WIDE_INT) arg0 % arg1;
1585 /* If shift count is undefined, don't fold it; let the machine do
1586 what it wants. But truncate it if the machine will do that. */
1590 #ifdef SHIFT_COUNT_TRUNCATED
1591 if (SHIFT_COUNT_TRUNCATED)
1595 val = ((unsigned HOST_WIDE_INT) arg0) >> arg1;
1602 #ifdef SHIFT_COUNT_TRUNCATED
1603 if (SHIFT_COUNT_TRUNCATED)
1607 val = ((unsigned HOST_WIDE_INT) arg0) << arg1;
1614 #ifdef SHIFT_COUNT_TRUNCATED
1615 if (SHIFT_COUNT_TRUNCATED)
1619 val = arg0s >> arg1;
1621 /* Bootstrap compiler may not have sign extended the right shift.
1622 Manually extend the sign to insure bootstrap cc matches gcc. */
1623 if (arg0s < 0 && arg1 > 0)
1624 val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1);
1633 val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
1634 | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
1642 val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
1643 | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
1647 /* Do nothing here. */
1651 val = arg0s <= arg1s ? arg0s : arg1s;
1655 val = ((unsigned HOST_WIDE_INT) arg0
1656 <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
1660 val = arg0s > arg1s ? arg0s : arg1s;
1664 val = ((unsigned HOST_WIDE_INT) arg0
1665 > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
1672 val = trunc_int_for_mode (val, mode);
1674 return GEN_INT (val);
1677 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
1680 Rather than test for specific case, we do this by a brute-force method
1681 and do all possible simplifications until no more changes occur. Then
1682 we rebuild the operation. */
1685 simplify_plus_minus (code, mode, op0, op1)
1687 enum machine_mode mode;
1693 int n_ops = 2, input_ops = 2, input_consts = 0, n_consts = 0;
1694 int first = 1, negate = 0, changed;
1697 memset ((char *) ops, 0, sizeof ops);
1699 /* Set up the two operands and then expand them until nothing has been
1700 changed. If we run out of room in our array, give up; this should
1701 almost never happen. */
1703 ops[0] = op0, ops[1] = op1, negs[0] = 0, negs[1] = (code == MINUS);
1710 for (i = 0; i < n_ops; i++)
1711 switch (GET_CODE (ops[i]))
1718 ops[n_ops] = XEXP (ops[i], 1);
1719 negs[n_ops++] = GET_CODE (ops[i]) == MINUS ? !negs[i] : negs[i];
1720 ops[i] = XEXP (ops[i], 0);
1726 ops[i] = XEXP (ops[i], 0);
1727 negs[i] = ! negs[i];
1732 ops[i] = XEXP (ops[i], 0);
1738 /* ~a -> (-a - 1) */
1741 ops[n_ops] = constm1_rtx;
1742 negs[n_ops++] = negs[i];
1743 ops[i] = XEXP (ops[i], 0);
1744 negs[i] = ! negs[i];
1751 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0, changed = 1;
1759 /* If we only have two operands, we can't do anything. */
1763 /* Now simplify each pair of operands until nothing changes. The first
1764 time through just simplify constants against each other. */
1771 for (i = 0; i < n_ops - 1; i++)
1772 for (j = i + 1; j < n_ops; j++)
1773 if (ops[i] != 0 && ops[j] != 0
1774 && (! first || (CONSTANT_P (ops[i]) && CONSTANT_P (ops[j]))))
1776 rtx lhs = ops[i], rhs = ops[j];
1777 enum rtx_code ncode = PLUS;
1779 if (negs[i] && ! negs[j])
1780 lhs = ops[j], rhs = ops[i], ncode = MINUS;
1781 else if (! negs[i] && negs[j])
1784 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
1787 ops[i] = tem, ops[j] = 0;
1788 negs[i] = negs[i] && negs[j];
1789 if (GET_CODE (tem) == NEG)
1790 ops[i] = XEXP (tem, 0), negs[i] = ! negs[i];
1792 if (GET_CODE (ops[i]) == CONST_INT && negs[i])
1793 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0;
1801 /* Pack all the operands to the lower-numbered entries and give up if
1802 we didn't reduce the number of operands we had. Make sure we
1803 count a CONST as two operands. If we have the same number of
1804 operands, but have made more CONSTs than we had, this is also
1805 an improvement, so accept it. */
1807 for (i = 0, j = 0; j < n_ops; j++)
1810 ops[i] = ops[j], negs[i++] = negs[j];
1811 if (GET_CODE (ops[j]) == CONST)
1815 if (i + n_consts > input_ops
1816 || (i + n_consts == input_ops && n_consts <= input_consts))
1821 /* If we have a CONST_INT, put it last. */
1822 for (i = 0; i < n_ops - 1; i++)
1823 if (GET_CODE (ops[i]) == CONST_INT)
1825 tem = ops[n_ops - 1], ops[n_ops - 1] = ops[i] , ops[i] = tem;
1826 j = negs[n_ops - 1], negs[n_ops - 1] = negs[i], negs[i] = j;
1829 /* Put a non-negated operand first. If there aren't any, make all
1830 operands positive and negate the whole thing later. */
1831 for (i = 0; i < n_ops && negs[i]; i++)
1836 for (i = 0; i < n_ops; i++)
1842 tem = ops[0], ops[0] = ops[i], ops[i] = tem;
1843 j = negs[0], negs[0] = negs[i], negs[i] = j;
1846 /* Now make the result by performing the requested operations. */
1848 for (i = 1; i < n_ops; i++)
1849 result = simplify_gen_binary (negs[i] ? MINUS : PLUS, mode, result, ops[i]);
1851 return negate ? gen_rtx_NEG (mode, result) : result;
1856 rtx op0, op1; /* Input */
1857 int equal, op0lt, op1lt; /* Output */
1862 check_fold_consts (data)
1865 struct cfc_args *args = (struct cfc_args *) data;
1866 REAL_VALUE_TYPE d0, d1;
1868 /* We may possibly raise an exception while reading the value. */
1869 args->unordered = 1;
1870 REAL_VALUE_FROM_CONST_DOUBLE (d0, args->op0);
1871 REAL_VALUE_FROM_CONST_DOUBLE (d1, args->op1);
1873 /* Comparisons of Inf versus Inf are ordered. */
1874 if (REAL_VALUE_ISNAN (d0)
1875 || REAL_VALUE_ISNAN (d1))
1877 args->equal = REAL_VALUES_EQUAL (d0, d1);
1878 args->op0lt = REAL_VALUES_LESS (d0, d1);
1879 args->op1lt = REAL_VALUES_LESS (d1, d0);
1880 args->unordered = 0;
1883 /* Like simplify_binary_operation except used for relational operators.
1884 MODE is the mode of the operands, not that of the result. If MODE
1885 is VOIDmode, both operands must also be VOIDmode and we compare the
1886 operands in "infinite precision".
1888 If no simplification is possible, this function returns zero. Otherwise,
1889 it returns either const_true_rtx or const0_rtx. */
1892 simplify_relational_operation (code, mode, op0, op1)
1894 enum machine_mode mode;
1897 int equal, op0lt, op0ltu, op1lt, op1ltu;
1902 if (mode == VOIDmode
1903 && (GET_MODE (op0) != VOIDmode
1904 || GET_MODE (op1) != VOIDmode))
1907 /* If op0 is a compare, extract the comparison arguments from it. */
1908 if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
1909 op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
1911 trueop0 = avoid_constant_pool_reference (op0);
1912 trueop1 = avoid_constant_pool_reference (op1);
1914 /* We can't simplify MODE_CC values since we don't know what the
1915 actual comparison is. */
1916 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC
1923 /* Make sure the constant is second. */
1924 if (swap_commutative_operands_p (trueop0, trueop1))
1926 tem = op0, op0 = op1, op1 = tem;
1927 tem = trueop0, trueop0 = trueop1, trueop1 = tem;
1928 code = swap_condition (code);
1931 /* For integer comparisons of A and B maybe we can simplify A - B and can
1932 then simplify a comparison of that with zero. If A and B are both either
1933 a register or a CONST_INT, this can't help; testing for these cases will
1934 prevent infinite recursion here and speed things up.
1936 If CODE is an unsigned comparison, then we can never do this optimization,
1937 because it gives an incorrect result if the subtraction wraps around zero.
1938 ANSI C defines unsigned operations such that they never overflow, and
1939 thus such cases can not be ignored. */
1941 if (INTEGRAL_MODE_P (mode) && trueop1 != const0_rtx
1942 && ! ((GET_CODE (op0) == REG || GET_CODE (trueop0) == CONST_INT)
1943 && (GET_CODE (op1) == REG || GET_CODE (trueop1) == CONST_INT))
1944 && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1))
1945 && code != GTU && code != GEU && code != LTU && code != LEU)
1946 return simplify_relational_operation (signed_condition (code),
1947 mode, tem, const0_rtx);
1949 if (flag_unsafe_math_optimizations && code == ORDERED)
1950 return const_true_rtx;
1952 if (flag_unsafe_math_optimizations && code == UNORDERED)
1955 /* For non-IEEE floating-point, if the two operands are equal, we know the
1957 if (rtx_equal_p (trueop0, trueop1)
1958 && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
1959 || ! FLOAT_MODE_P (GET_MODE (trueop0))
1960 || flag_unsafe_math_optimizations))
1961 equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0;
1963 /* If the operands are floating-point constants, see if we can fold
1965 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
1966 else if (GET_CODE (trueop0) == CONST_DOUBLE
1967 && GET_CODE (trueop1) == CONST_DOUBLE
1968 && GET_MODE_CLASS (GET_MODE (trueop0)) == MODE_FLOAT)
1970 struct cfc_args args;
1972 /* Setup input for check_fold_consts() */
1977 if (!do_float_handler (check_fold_consts, (PTR) &args))
1990 return const_true_rtx;
2003 /* Receive output from check_fold_consts() */
2005 op0lt = op0ltu = args.op0lt;
2006 op1lt = op1ltu = args.op1lt;
2008 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
2010 /* Otherwise, see if the operands are both integers. */
2011 else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
2012 && (GET_CODE (trueop0) == CONST_DOUBLE
2013 || GET_CODE (trueop0) == CONST_INT)
2014 && (GET_CODE (trueop1) == CONST_DOUBLE
2015 || GET_CODE (trueop1) == CONST_INT))
2017 int width = GET_MODE_BITSIZE (mode);
2018 HOST_WIDE_INT l0s, h0s, l1s, h1s;
2019 unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u;
2021 /* Get the two words comprising each integer constant. */
2022 if (GET_CODE (trueop0) == CONST_DOUBLE)
2024 l0u = l0s = CONST_DOUBLE_LOW (trueop0);
2025 h0u = h0s = CONST_DOUBLE_HIGH (trueop0);
2029 l0u = l0s = INTVAL (trueop0);
2030 h0u = h0s = HWI_SIGN_EXTEND (l0s);
2033 if (GET_CODE (trueop1) == CONST_DOUBLE)
2035 l1u = l1s = CONST_DOUBLE_LOW (trueop1);
2036 h1u = h1s = CONST_DOUBLE_HIGH (trueop1);
2040 l1u = l1s = INTVAL (trueop1);
2041 h1u = h1s = HWI_SIGN_EXTEND (l1s);
2044 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
2045 we have to sign or zero-extend the values. */
2046 if (width != 0 && width < HOST_BITS_PER_WIDE_INT)
2048 l0u &= ((HOST_WIDE_INT) 1 << width) - 1;
2049 l1u &= ((HOST_WIDE_INT) 1 << width) - 1;
2051 if (l0s & ((HOST_WIDE_INT) 1 << (width - 1)))
2052 l0s |= ((HOST_WIDE_INT) (-1) << width);
2054 if (l1s & ((HOST_WIDE_INT) 1 << (width - 1)))
2055 l1s |= ((HOST_WIDE_INT) (-1) << width);
2057 if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
2058 h0u = h1u = 0, h0s = HWI_SIGN_EXTEND (l0s), h1s = HWI_SIGN_EXTEND (l1s);
2060 equal = (h0u == h1u && l0u == l1u);
2061 op0lt = (h0s < h1s || (h0s == h1s && l0u < l1u));
2062 op1lt = (h1s < h0s || (h1s == h0s && l1u < l0u));
2063 op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u));
2064 op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u));
2067 /* Otherwise, there are some code-specific tests we can make. */
2073 /* References to the frame plus a constant or labels cannot
2074 be zero, but a SYMBOL_REF can due to #pragma weak. */
2075 if (((NONZERO_BASE_PLUS_P (op0) && trueop1 == const0_rtx)
2076 || GET_CODE (trueop0) == LABEL_REF)
2077 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
2078 /* On some machines, the ap reg can be 0 sometimes. */
2079 && op0 != arg_pointer_rtx
2086 if (((NONZERO_BASE_PLUS_P (op0) && trueop1 == const0_rtx)
2087 || GET_CODE (trueop0) == LABEL_REF)
2088 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
2089 && op0 != arg_pointer_rtx
2092 return const_true_rtx;
2096 /* Unsigned values are never negative. */
2097 if (trueop1 == const0_rtx)
2098 return const_true_rtx;
2102 if (trueop1 == const0_rtx)
2107 /* Unsigned values are never greater than the largest
2109 if (GET_CODE (trueop1) == CONST_INT
2110 && (unsigned HOST_WIDE_INT) INTVAL (trueop1) == GET_MODE_MASK (mode)
2111 && INTEGRAL_MODE_P (mode))
2112 return const_true_rtx;
2116 if (GET_CODE (trueop1) == CONST_INT
2117 && (unsigned HOST_WIDE_INT) INTVAL (trueop1) == GET_MODE_MASK (mode)
2118 && INTEGRAL_MODE_P (mode))
2129 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
2135 return equal ? const_true_rtx : const0_rtx;
2138 return ! equal ? const_true_rtx : const0_rtx;
2141 return op0lt ? const_true_rtx : const0_rtx;
2144 return op1lt ? const_true_rtx : const0_rtx;
2146 return op0ltu ? const_true_rtx : const0_rtx;
2148 return op1ltu ? const_true_rtx : const0_rtx;
2151 return equal || op0lt ? const_true_rtx : const0_rtx;
2154 return equal || op1lt ? const_true_rtx : const0_rtx;
2156 return equal || op0ltu ? const_true_rtx : const0_rtx;
2158 return equal || op1ltu ? const_true_rtx : const0_rtx;
2160 return const_true_rtx;
2168 /* Simplify CODE, an operation with result mode MODE and three operands,
2169 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
2170 a constant. Return 0 if no simplifications is possible. */
2173 simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
2175 enum machine_mode mode, op0_mode;
2178 unsigned int width = GET_MODE_BITSIZE (mode);
2180 /* VOIDmode means "infinite" precision. */
2182 width = HOST_BITS_PER_WIDE_INT;
2188 if (GET_CODE (op0) == CONST_INT
2189 && GET_CODE (op1) == CONST_INT
2190 && GET_CODE (op2) == CONST_INT
2191 && ((unsigned) INTVAL (op1) + (unsigned) INTVAL (op2) <= width)
2192 && width <= (unsigned) HOST_BITS_PER_WIDE_INT)
2194 /* Extracting a bit-field from a constant */
2195 HOST_WIDE_INT val = INTVAL (op0);
2197 if (BITS_BIG_ENDIAN)
2198 val >>= (GET_MODE_BITSIZE (op0_mode)
2199 - INTVAL (op2) - INTVAL (op1));
2201 val >>= INTVAL (op2);
2203 if (HOST_BITS_PER_WIDE_INT != INTVAL (op1))
2205 /* First zero-extend. */
2206 val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1;
2207 /* If desired, propagate sign bit. */
2208 if (code == SIGN_EXTRACT
2209 && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1))))
2210 val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1);
2213 /* Clear the bits that don't belong in our mode,
2214 unless they and our sign bit are all one.
2215 So we get either a reasonable negative value or a reasonable
2216 unsigned value for this mode. */
2217 if (width < HOST_BITS_PER_WIDE_INT
2218 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
2219 != ((HOST_WIDE_INT) (-1) << (width - 1))))
2220 val &= ((HOST_WIDE_INT) 1 << width) - 1;
2222 return GEN_INT (val);
2227 if (GET_CODE (op0) == CONST_INT)
2228 return op0 != const0_rtx ? op1 : op2;
2230 /* Convert a == b ? b : a to "a". */
2231 if (GET_CODE (op0) == NE && ! side_effects_p (op0)
2232 && (! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
2233 && rtx_equal_p (XEXP (op0, 0), op1)
2234 && rtx_equal_p (XEXP (op0, 1), op2))
2236 else if (GET_CODE (op0) == EQ && ! side_effects_p (op0)
2237 && (! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
2238 && rtx_equal_p (XEXP (op0, 1), op1)
2239 && rtx_equal_p (XEXP (op0, 0), op2))
2241 else if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && ! side_effects_p (op0))
2243 enum machine_mode cmp_mode = (GET_MODE (XEXP (op0, 0)) == VOIDmode
2244 ? GET_MODE (XEXP (op0, 1))
2245 : GET_MODE (XEXP (op0, 0)));
2247 if (cmp_mode == VOIDmode)
2248 cmp_mode = op0_mode;
2249 temp = simplify_relational_operation (GET_CODE (op0), cmp_mode,
2250 XEXP (op0, 0), XEXP (op0, 1));
2252 /* See if any simplifications were possible. */
2253 if (temp == const0_rtx)
2255 else if (temp == const1_rtx)
2260 /* Look for happy constants in op1 and op2. */
2261 if (GET_CODE (op1) == CONST_INT && GET_CODE (op2) == CONST_INT)
2263 HOST_WIDE_INT t = INTVAL (op1);
2264 HOST_WIDE_INT f = INTVAL (op2);
2266 if (t == STORE_FLAG_VALUE && f == 0)
2267 code = GET_CODE (op0);
2268 else if (t == 0 && f == STORE_FLAG_VALUE)
2271 tmp = reversed_comparison_code (op0, NULL_RTX);
2279 return gen_rtx_fmt_ee (code, mode, XEXP (op0, 0), XEXP (op0, 1));
2291 /* Simplify SUBREG:OUTERMODE(OP:INNERMODE, BYTE)
2292 Return 0 if no simplifications is possible. */
2294 simplify_subreg (outermode, op, innermode, byte)
2297 enum machine_mode outermode, innermode;
2299 /* Little bit of sanity checking. */
2300 if (innermode == VOIDmode || outermode == VOIDmode
2301 || innermode == BLKmode || outermode == BLKmode)
2304 if (GET_MODE (op) != innermode
2305 && GET_MODE (op) != VOIDmode)
2308 if (byte % GET_MODE_SIZE (outermode)
2309 || byte >= GET_MODE_SIZE (innermode))
2312 if (outermode == innermode && !byte)
2315 /* Attempt to simplify constant to non-SUBREG expression. */
2316 if (CONSTANT_P (op))
2319 unsigned HOST_WIDE_INT val = 0;
2321 /* ??? This code is partly redundant with code below, but can handle
2322 the subregs of floats and similar corner cases.
2323 Later it we should move all simplification code here and rewrite
2324 GEN_LOWPART_IF_POSSIBLE, GEN_HIGHPART, OPERAND_SUBWORD and friends
2325 using SIMPLIFY_SUBREG. */
2326 if (subreg_lowpart_offset (outermode, innermode) == byte)
2328 rtx new = gen_lowpart_if_possible (outermode, op);
2333 /* Similar comment as above apply here. */
2334 if (GET_MODE_SIZE (outermode) == UNITS_PER_WORD
2335 && GET_MODE_SIZE (innermode) > UNITS_PER_WORD
2336 && GET_MODE_CLASS (outermode) == MODE_INT)
2338 rtx new = constant_subword (op,
2339 (byte / UNITS_PER_WORD),
2345 offset = byte * BITS_PER_UNIT;
2346 switch (GET_CODE (op))
2349 if (GET_MODE (op) != VOIDmode)
2352 /* We can't handle this case yet. */
2353 if (GET_MODE_BITSIZE (outermode) >= HOST_BITS_PER_WIDE_INT)
2356 part = offset >= HOST_BITS_PER_WIDE_INT;
2357 if ((BITS_PER_WORD > HOST_BITS_PER_WIDE_INT
2358 && BYTES_BIG_ENDIAN)
2359 || (BITS_PER_WORD <= HOST_BITS_PER_WIDE_INT
2360 && WORDS_BIG_ENDIAN))
2362 val = part ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op);
2363 offset %= HOST_BITS_PER_WIDE_INT;
2365 /* We've already picked the word we want from a double, so
2366 pretend this is actually an integer. */
2367 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
2371 if (GET_CODE (op) == CONST_INT)
2374 /* We don't handle synthetizing of non-integral constants yet. */
2375 if (GET_MODE_CLASS (outermode) != MODE_INT)
2378 if (BYTES_BIG_ENDIAN || WORDS_BIG_ENDIAN)
2380 if (WORDS_BIG_ENDIAN)
2381 offset = (GET_MODE_BITSIZE (innermode)
2382 - GET_MODE_BITSIZE (outermode) - offset);
2383 if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN
2384 && GET_MODE_SIZE (outermode) < UNITS_PER_WORD)
2385 offset = (offset + BITS_PER_WORD - GET_MODE_BITSIZE (outermode)
2386 - 2 * (offset % BITS_PER_WORD));
2389 if (offset >= HOST_BITS_PER_WIDE_INT)
2390 return ((HOST_WIDE_INT) val < 0) ? constm1_rtx : const0_rtx;
2394 if (GET_MODE_BITSIZE (outermode) < HOST_BITS_PER_WIDE_INT)
2395 val = trunc_int_for_mode (val, outermode);
2396 return GEN_INT (val);
2403 /* Changing mode twice with SUBREG => just change it once,
2404 or not at all if changing back op starting mode. */
2405 if (GET_CODE (op) == SUBREG)
2407 enum machine_mode innermostmode = GET_MODE (SUBREG_REG (op));
2408 int final_offset = byte + SUBREG_BYTE (op);
2411 if (outermode == innermostmode
2412 && byte == 0 && SUBREG_BYTE (op) == 0)
2413 return SUBREG_REG (op);
2415 /* The SUBREG_BYTE represents offset, as if the value were stored
2416 in memory. Irritating exception is paradoxical subreg, where
2417 we define SUBREG_BYTE to be 0. On big endian machines, this
2418 value should be negative. For a moment, undo this exception. */
2419 if (byte == 0 && GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
2421 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
2422 if (WORDS_BIG_ENDIAN)
2423 final_offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2424 if (BYTES_BIG_ENDIAN)
2425 final_offset += difference % UNITS_PER_WORD;
2427 if (SUBREG_BYTE (op) == 0
2428 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
2430 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
2431 if (WORDS_BIG_ENDIAN)
2432 final_offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2433 if (BYTES_BIG_ENDIAN)
2434 final_offset += difference % UNITS_PER_WORD;
2437 /* See whether resulting subreg will be paradoxical. */
2438 if (GET_MODE_SIZE (innermostmode) > GET_MODE_SIZE (outermode))
2440 /* In nonparadoxical subregs we can't handle negative offsets. */
2441 if (final_offset < 0)
2443 /* Bail out in case resulting subreg would be incorrect. */
2444 if (final_offset % GET_MODE_SIZE (outermode)
2445 || (unsigned) final_offset >= GET_MODE_SIZE (innermostmode))
2451 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (outermode));
2453 /* In paradoxical subreg, see if we are still looking on lower part.
2454 If so, our SUBREG_BYTE will be 0. */
2455 if (WORDS_BIG_ENDIAN)
2456 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2457 if (BYTES_BIG_ENDIAN)
2458 offset += difference % UNITS_PER_WORD;
2459 if (offset == final_offset)
2465 /* Recurse for futher possible simplifications. */
2466 new = simplify_subreg (outermode, SUBREG_REG (op),
2467 GET_MODE (SUBREG_REG (op)),
2471 return gen_rtx_SUBREG (outermode, SUBREG_REG (op), final_offset);
2474 /* SUBREG of a hard register => just change the register number
2475 and/or mode. If the hard register is not valid in that mode,
2476 suppress this simplification. If the hard register is the stack,
2477 frame, or argument pointer, leave this as a SUBREG. */
2480 && (! REG_FUNCTION_VALUE_P (op)
2481 || ! rtx_equal_function_value_matters)
2482 #ifdef CLASS_CANNOT_CHANGE_MODE
2483 && ! (CLASS_CANNOT_CHANGE_MODE_P (outermode, innermode)
2484 && GET_MODE_CLASS (innermode) != MODE_COMPLEX_INT
2485 && GET_MODE_CLASS (innermode) != MODE_COMPLEX_FLOAT
2486 && (TEST_HARD_REG_BIT
2487 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
2490 && REGNO (op) < FIRST_PSEUDO_REGISTER
2491 && ((reload_completed && !frame_pointer_needed)
2492 || (REGNO (op) != FRAME_POINTER_REGNUM
2493 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
2494 && REGNO (op) != HARD_FRAME_POINTER_REGNUM
2497 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
2498 && REGNO (op) != ARG_POINTER_REGNUM
2500 && REGNO (op) != STACK_POINTER_REGNUM)
2502 int final_regno = subreg_hard_regno (gen_rtx_SUBREG (outermode, op, byte),
2505 /* ??? We do allow it if the current REG is not valid for
2506 its mode. This is a kludge to work around how float/complex
2507 arguments are passed on 32-bit Sparc and should be fixed. */
2508 if (HARD_REGNO_MODE_OK (final_regno, outermode)
2509 || ! HARD_REGNO_MODE_OK (REGNO (op), innermode))
2510 return gen_rtx_REG (outermode, final_regno);
2513 /* If we have a SUBREG of a register that we are replacing and we are
2514 replacing it with a MEM, make a new MEM and try replacing the
2515 SUBREG with it. Don't do this if the MEM has a mode-dependent address
2516 or if we would be widening it. */
2518 if (GET_CODE (op) == MEM
2519 && ! mode_dependent_address_p (XEXP (op, 0))
2520 /* Allow splitting of volatile memory references in case we don't
2521 have instruction to move the whole thing. */
2522 && (! MEM_VOLATILE_P (op)
2523 || (mov_optab->handlers[(int) innermode].insn_code
2524 == CODE_FOR_nothing))
2525 && GET_MODE_SIZE (outermode) <= GET_MODE_SIZE (GET_MODE (op)))
2526 return adjust_address_nv (op, outermode, byte);
2528 /* Handle complex values represented as CONCAT
2529 of real and imaginary part. */
2530 if (GET_CODE (op) == CONCAT)
2532 int is_realpart = byte < GET_MODE_UNIT_SIZE (innermode);
2533 rtx part = is_realpart ? XEXP (op, 0) : XEXP (op, 1);
2534 unsigned int final_offset;
2537 final_offset = byte % (GET_MODE_UNIT_SIZE (innermode));
2538 res = simplify_subreg (outermode, part, GET_MODE (part), final_offset);
2541 /* We can at least simplify it by referring directly to the relevent part. */
2542 return gen_rtx_SUBREG (outermode, part, final_offset);
2547 /* Make a SUBREG operation or equivalent if it folds. */
2550 simplify_gen_subreg (outermode, op, innermode, byte)
2553 enum machine_mode outermode, innermode;
2556 /* Little bit of sanity checking. */
2557 if (innermode == VOIDmode || outermode == VOIDmode
2558 || innermode == BLKmode || outermode == BLKmode)
2561 if (GET_MODE (op) != innermode
2562 && GET_MODE (op) != VOIDmode)
2565 if (byte % GET_MODE_SIZE (outermode)
2566 || byte >= GET_MODE_SIZE (innermode))
2569 if (GET_CODE (op) == QUEUED)
2572 new = simplify_subreg (outermode, op, innermode, byte);
2576 if (GET_CODE (op) == SUBREG || GET_MODE (op) == VOIDmode)
2579 return gen_rtx_SUBREG (outermode, op, byte);
2581 /* Simplify X, an rtx expression.
2583 Return the simplified expression or NULL if no simplifications
2586 This is the preferred entry point into the simplification routines;
2587 however, we still allow passes to call the more specific routines.
2589 Right now GCC has three (yes, three) major bodies of RTL simplficiation
2590 code that need to be unified.
2592 1. fold_rtx in cse.c. This code uses various CSE specific
2593 information to aid in RTL simplification.
2595 2. simplify_rtx in combine.c. Similar to fold_rtx, except that
2596 it uses combine specific information to aid in RTL
2599 3. The routines in this file.
2602 Long term we want to only have one body of simplification code; to
2603 get to that state I recommend the following steps:
2605 1. Pour over fold_rtx & simplify_rtx and move any simplifications
2606 which are not pass dependent state into these routines.
2608 2. As code is moved by #1, change fold_rtx & simplify_rtx to
2609 use this routine whenever possible.
2611 3. Allow for pass dependent state to be provided to these
2612 routines and add simplifications based on the pass dependent
2613 state. Remove code from cse.c & combine.c that becomes
2616 It will take time, but ultimately the compiler will be easier to
2617 maintain and improve. It's totally silly that when we add a
2618 simplification that it needs to be added to 4 places (3 for RTL
2619 simplification and 1 for tree simplification. */
2625 enum rtx_code code = GET_CODE (x);
2626 enum machine_mode mode = GET_MODE (x);
2628 switch (GET_RTX_CLASS (code))
2631 return simplify_unary_operation (code, mode,
2632 XEXP (x, 0), GET_MODE (XEXP (x, 0)));
2634 if (swap_commutative_operands_p (XEXP (x, 0), XEXP (x, 1)))
2639 XEXP (x, 0) = XEXP (x, 1);
2641 return simplify_binary_operation (code, mode,
2642 XEXP (x, 0), XEXP (x, 1));
2646 return simplify_binary_operation (code, mode, XEXP (x, 0), XEXP (x, 1));
2650 return simplify_ternary_operation (code, mode, GET_MODE (XEXP (x, 0)),
2651 XEXP (x, 0), XEXP (x, 1),
2655 return simplify_relational_operation (code,
2656 ((GET_MODE (XEXP (x, 0))
2658 ? GET_MODE (XEXP (x, 0))
2659 : GET_MODE (XEXP (x, 1))),
2660 XEXP (x, 0), XEXP (x, 1));
2662 /* The only case we try to handle is a SUBREG. */
2664 return simplify_gen_subreg (mode, SUBREG_REG (x),
2665 GET_MODE (SUBREG_REG (x)),