1 /* Analyze RTL for C-Compiler
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
25 #include "coretypes.h"
29 #include "hard-reg-set.h"
30 #include "insn-config.h"
36 #include "basic-block.h"
41 /* Forward declarations */
42 static int global_reg_mentioned_p_1 (rtx *, void *);
43 static void set_of_1 (rtx, rtx, void *);
44 static bool covers_regno_p (rtx, unsigned int);
45 static bool covers_regno_no_parallel_p (rtx, unsigned int);
46 static int rtx_referenced_p_1 (rtx *, void *);
47 static int computed_jump_p_1 (rtx);
48 static void parms_set (rtx, rtx, void *);
50 static unsigned HOST_WIDE_INT cached_nonzero_bits (rtx, enum machine_mode,
51 rtx, enum machine_mode,
52 unsigned HOST_WIDE_INT);
53 static unsigned HOST_WIDE_INT nonzero_bits1 (rtx, enum machine_mode, rtx,
55 unsigned HOST_WIDE_INT);
56 static unsigned int cached_num_sign_bit_copies (rtx, enum machine_mode, rtx,
59 static unsigned int num_sign_bit_copies1 (rtx, enum machine_mode, rtx,
60 enum machine_mode, unsigned int);
62 /* Bit flags that specify the machine subtype we are compiling for.
63 Bits are tested using macros TARGET_... defined in the tm.h file
64 and set by `-m...' switches. Must be defined in rtlanal.c. */
68 /* Return 1 if the value of X is unstable
69 (would be different at a different point in the program).
70 The frame pointer, arg pointer, etc. are considered stable
71 (within one function) and so is anything marked `unchanging'. */
74 rtx_unstable_p (rtx x)
76 RTX_CODE code = GET_CODE (x);
83 return !MEM_READONLY_P (x) || rtx_unstable_p (XEXP (x, 0));
94 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
95 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
96 /* The arg pointer varies if it is not a fixed register. */
97 || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]))
99 #ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
100 /* ??? When call-clobbered, the value is stable modulo the restore
101 that must happen after a call. This currently screws up local-alloc
102 into believing that the restore is not needed. */
103 if (x == pic_offset_table_rtx)
109 if (MEM_VOLATILE_P (x))
118 fmt = GET_RTX_FORMAT (code);
119 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
122 if (rtx_unstable_p (XEXP (x, i)))
125 else if (fmt[i] == 'E')
128 for (j = 0; j < XVECLEN (x, i); j++)
129 if (rtx_unstable_p (XVECEXP (x, i, j)))
136 /* Return 1 if X has a value that can vary even between two
137 executions of the program. 0 means X can be compared reliably
138 against certain constants or near-constants.
139 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
140 zero, we are slightly more conservative.
141 The frame pointer and the arg pointer are considered constant. */
144 rtx_varies_p (rtx x, int for_alias)
157 return !MEM_READONLY_P (x) || rtx_varies_p (XEXP (x, 0), for_alias);
168 /* Note that we have to test for the actual rtx used for the frame
169 and arg pointers and not just the register number in case we have
170 eliminated the frame and/or arg pointer and are using it
172 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
173 /* The arg pointer varies if it is not a fixed register. */
174 || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]))
176 if (x == pic_offset_table_rtx
177 #ifdef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
178 /* ??? When call-clobbered, the value is stable modulo the restore
179 that must happen after a call. This currently screws up
180 local-alloc into believing that the restore is not needed, so we
181 must return 0 only if we are called from alias analysis. */
189 /* The operand 0 of a LO_SUM is considered constant
190 (in fact it is related specifically to operand 1)
191 during alias analysis. */
192 return (! for_alias && rtx_varies_p (XEXP (x, 0), for_alias))
193 || rtx_varies_p (XEXP (x, 1), for_alias);
196 if (MEM_VOLATILE_P (x))
205 fmt = GET_RTX_FORMAT (code);
206 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
209 if (rtx_varies_p (XEXP (x, i), for_alias))
212 else if (fmt[i] == 'E')
215 for (j = 0; j < XVECLEN (x, i); j++)
216 if (rtx_varies_p (XVECEXP (x, i, j), for_alias))
223 /* Return 0 if the use of X as an address in a MEM can cause a trap. */
226 rtx_addr_can_trap_p (rtx x)
228 enum rtx_code code = GET_CODE (x);
233 return SYMBOL_REF_WEAK (x);
239 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
240 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
241 || x == stack_pointer_rtx
242 /* The arg pointer varies if it is not a fixed register. */
243 || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]))
245 /* All of the virtual frame registers are stack references. */
246 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
247 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
252 return rtx_addr_can_trap_p (XEXP (x, 0));
255 /* An address is assumed not to trap if it is an address that can't
256 trap plus a constant integer or it is the pic register plus a
258 return ! ((! rtx_addr_can_trap_p (XEXP (x, 0))
259 && GET_CODE (XEXP (x, 1)) == CONST_INT)
260 || (XEXP (x, 0) == pic_offset_table_rtx
261 && CONSTANT_P (XEXP (x, 1))));
265 return rtx_addr_can_trap_p (XEXP (x, 1));
272 return rtx_addr_can_trap_p (XEXP (x, 0));
278 /* If it isn't one of the case above, it can cause a trap. */
282 /* Return true if X is an address that is known to not be zero. */
285 nonzero_address_p (rtx x)
287 enum rtx_code code = GET_CODE (x);
292 return !SYMBOL_REF_WEAK (x);
298 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
299 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
300 || x == stack_pointer_rtx
301 || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]))
303 /* All of the virtual frame registers are stack references. */
304 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
305 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
310 return nonzero_address_p (XEXP (x, 0));
313 if (GET_CODE (XEXP (x, 1)) == CONST_INT)
315 /* Pointers aren't allowed to wrap. If we've got a register
316 that is known to be a pointer, and a positive offset, then
317 the composite can't be zero. */
318 if (INTVAL (XEXP (x, 1)) > 0
319 && REG_P (XEXP (x, 0))
320 && REG_POINTER (XEXP (x, 0)))
323 return nonzero_address_p (XEXP (x, 0));
325 /* Handle PIC references. */
326 else if (XEXP (x, 0) == pic_offset_table_rtx
327 && CONSTANT_P (XEXP (x, 1)))
332 /* Similar to the above; allow positive offsets. Further, since
333 auto-inc is only allowed in memories, the register must be a
335 if (GET_CODE (XEXP (x, 1)) == CONST_INT
336 && INTVAL (XEXP (x, 1)) > 0)
338 return nonzero_address_p (XEXP (x, 0));
341 /* Similarly. Further, the offset is always positive. */
348 return nonzero_address_p (XEXP (x, 0));
351 return nonzero_address_p (XEXP (x, 1));
357 /* If it isn't one of the case above, might be zero. */
361 /* Return 1 if X refers to a memory location whose address
362 cannot be compared reliably with constant addresses,
363 or if X refers to a BLKmode memory object.
364 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
365 zero, we are slightly more conservative. */
368 rtx_addr_varies_p (rtx x, int for_alias)
379 return GET_MODE (x) == BLKmode || rtx_varies_p (XEXP (x, 0), for_alias);
381 fmt = GET_RTX_FORMAT (code);
382 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
385 if (rtx_addr_varies_p (XEXP (x, i), for_alias))
388 else if (fmt[i] == 'E')
391 for (j = 0; j < XVECLEN (x, i); j++)
392 if (rtx_addr_varies_p (XVECEXP (x, i, j), for_alias))
398 /* Return the value of the integer term in X, if one is apparent;
400 Only obvious integer terms are detected.
401 This is used in cse.c with the `related_value' field. */
404 get_integer_term (rtx x)
406 if (GET_CODE (x) == CONST)
409 if (GET_CODE (x) == MINUS
410 && GET_CODE (XEXP (x, 1)) == CONST_INT)
411 return - INTVAL (XEXP (x, 1));
412 if (GET_CODE (x) == PLUS
413 && GET_CODE (XEXP (x, 1)) == CONST_INT)
414 return INTVAL (XEXP (x, 1));
418 /* If X is a constant, return the value sans apparent integer term;
420 Only obvious integer terms are detected. */
423 get_related_value (rtx x)
425 if (GET_CODE (x) != CONST)
428 if (GET_CODE (x) == PLUS
429 && GET_CODE (XEXP (x, 1)) == CONST_INT)
431 else if (GET_CODE (x) == MINUS
432 && GET_CODE (XEXP (x, 1)) == CONST_INT)
437 /* A subroutine of global_reg_mentioned_p, returns 1 if *LOC mentions
438 a global register. */
441 global_reg_mentioned_p_1 (rtx *loc, void *data ATTRIBUTE_UNUSED)
449 switch (GET_CODE (x))
452 if (REG_P (SUBREG_REG (x)))
454 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER
455 && global_regs[subreg_regno (x)])
463 if (regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
477 /* A non-constant call might use a global register. */
487 /* Returns nonzero if X mentions a global register. */
490 global_reg_mentioned_p (rtx x)
496 if (! CONST_OR_PURE_CALL_P (x))
498 x = CALL_INSN_FUNCTION_USAGE (x);
506 return for_each_rtx (&x, global_reg_mentioned_p_1, NULL);
509 /* Return the number of places FIND appears within X. If COUNT_DEST is
510 zero, we do not count occurrences inside the destination of a SET. */
513 count_occurrences (rtx x, rtx find, int count_dest)
517 const char *format_ptr;
538 if (MEM_P (find) && rtx_equal_p (x, find))
543 if (SET_DEST (x) == find && ! count_dest)
544 return count_occurrences (SET_SRC (x), find, count_dest);
551 format_ptr = GET_RTX_FORMAT (code);
554 for (i = 0; i < GET_RTX_LENGTH (code); i++)
556 switch (*format_ptr++)
559 count += count_occurrences (XEXP (x, i), find, count_dest);
563 for (j = 0; j < XVECLEN (x, i); j++)
564 count += count_occurrences (XVECEXP (x, i, j), find, count_dest);
571 /* Nonzero if register REG appears somewhere within IN.
572 Also works if REG is not a register; in this case it checks
573 for a subexpression of IN that is Lisp "equal" to REG. */
576 reg_mentioned_p (rtx reg, rtx in)
588 if (GET_CODE (in) == LABEL_REF)
589 return reg == XEXP (in, 0);
591 code = GET_CODE (in);
595 /* Compare registers by number. */
597 return REG_P (reg) && REGNO (in) == REGNO (reg);
599 /* These codes have no constituent expressions
609 /* These are kept unique for a given value. */
616 if (GET_CODE (reg) == code && rtx_equal_p (reg, in))
619 fmt = GET_RTX_FORMAT (code);
621 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
626 for (j = XVECLEN (in, i) - 1; j >= 0; j--)
627 if (reg_mentioned_p (reg, XVECEXP (in, i, j)))
630 else if (fmt[i] == 'e'
631 && reg_mentioned_p (reg, XEXP (in, i)))
637 /* Return 1 if in between BEG and END, exclusive of BEG and END, there is
638 no CODE_LABEL insn. */
641 no_labels_between_p (rtx beg, rtx end)
646 for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p))
652 /* Nonzero if register REG is used in an insn between
653 FROM_INSN and TO_INSN (exclusive of those two). */
656 reg_used_between_p (rtx reg, rtx from_insn, rtx to_insn)
660 if (from_insn == to_insn)
663 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
665 && (reg_overlap_mentioned_p (reg, PATTERN (insn))
667 && (find_reg_fusage (insn, USE, reg)
668 || find_reg_fusage (insn, CLOBBER, reg)))))
673 /* Nonzero if the old value of X, a register, is referenced in BODY. If X
674 is entirely replaced by a new value and the only use is as a SET_DEST,
675 we do not consider it a reference. */
678 reg_referenced_p (rtx x, rtx body)
682 switch (GET_CODE (body))
685 if (reg_overlap_mentioned_p (x, SET_SRC (body)))
688 /* If the destination is anything other than CC0, PC, a REG or a SUBREG
689 of a REG that occupies all of the REG, the insn references X if
690 it is mentioned in the destination. */
691 if (GET_CODE (SET_DEST (body)) != CC0
692 && GET_CODE (SET_DEST (body)) != PC
693 && !REG_P (SET_DEST (body))
694 && ! (GET_CODE (SET_DEST (body)) == SUBREG
695 && REG_P (SUBREG_REG (SET_DEST (body)))
696 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body))))
697 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
698 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body)))
699 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
700 && reg_overlap_mentioned_p (x, SET_DEST (body)))
705 for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--)
706 if (reg_overlap_mentioned_p (x, ASM_OPERANDS_INPUT (body, i)))
713 return reg_overlap_mentioned_p (x, body);
716 return reg_overlap_mentioned_p (x, TRAP_CONDITION (body));
719 return reg_overlap_mentioned_p (x, XEXP (body, 0));
722 case UNSPEC_VOLATILE:
723 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
724 if (reg_overlap_mentioned_p (x, XVECEXP (body, 0, i)))
729 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
730 if (reg_referenced_p (x, XVECEXP (body, 0, i)))
735 if (MEM_P (XEXP (body, 0)))
736 if (reg_overlap_mentioned_p (x, XEXP (XEXP (body, 0), 0)))
741 if (reg_overlap_mentioned_p (x, COND_EXEC_TEST (body)))
743 return reg_referenced_p (x, COND_EXEC_CODE (body));
750 /* Nonzero if register REG is set or clobbered in an insn between
751 FROM_INSN and TO_INSN (exclusive of those two). */
754 reg_set_between_p (rtx reg, rtx from_insn, rtx to_insn)
758 if (from_insn == to_insn)
761 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
762 if (INSN_P (insn) && reg_set_p (reg, insn))
767 /* Internals of reg_set_between_p. */
769 reg_set_p (rtx reg, rtx insn)
771 /* We can be passed an insn or part of one. If we are passed an insn,
772 check if a side-effect of the insn clobbers REG. */
774 && (FIND_REG_INC_NOTE (insn, reg)
777 && REGNO (reg) < FIRST_PSEUDO_REGISTER
778 && TEST_HARD_REG_BIT (regs_invalidated_by_call,
781 || find_reg_fusage (insn, CLOBBER, reg)))))
784 return set_of (reg, insn) != NULL_RTX;
787 /* Similar to reg_set_between_p, but check all registers in X. Return 0
788 only if none of them are modified between START and END. Do not
789 consider non-registers one way or the other. */
792 regs_set_between_p (rtx x, rtx start, rtx end)
794 enum rtx_code code = GET_CODE (x);
811 return reg_set_between_p (x, start, end);
817 fmt = GET_RTX_FORMAT (code);
818 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
820 if (fmt[i] == 'e' && regs_set_between_p (XEXP (x, i), start, end))
823 else if (fmt[i] == 'E')
824 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
825 if (regs_set_between_p (XVECEXP (x, i, j), start, end))
832 /* Similar to reg_set_between_p, but check all registers in X. Return 0
833 only if none of them are modified between START and END. Return 1 if
834 X contains a MEM; this routine does usememory aliasing. */
837 modified_between_p (rtx x, rtx start, rtx end)
839 enum rtx_code code = GET_CODE (x);
862 if (MEM_READONLY_P (x))
864 if (modified_between_p (XEXP (x, 0), start, end))
866 for (insn = NEXT_INSN (start); insn != end; insn = NEXT_INSN (insn))
867 if (memory_modified_in_insn_p (x, insn))
873 return reg_set_between_p (x, start, end);
879 fmt = GET_RTX_FORMAT (code);
880 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
882 if (fmt[i] == 'e' && modified_between_p (XEXP (x, i), start, end))
885 else if (fmt[i] == 'E')
886 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
887 if (modified_between_p (XVECEXP (x, i, j), start, end))
894 /* Similar to reg_set_p, but check all registers in X. Return 0 only if none
895 of them are modified in INSN. Return 1 if X contains a MEM; this routine
896 does use memory aliasing. */
899 modified_in_p (rtx x, rtx insn)
901 enum rtx_code code = GET_CODE (x);
920 if (MEM_READONLY_P (x))
922 if (modified_in_p (XEXP (x, 0), insn))
924 if (memory_modified_in_insn_p (x, insn))
930 return reg_set_p (x, insn);
936 fmt = GET_RTX_FORMAT (code);
937 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
939 if (fmt[i] == 'e' && modified_in_p (XEXP (x, i), insn))
942 else if (fmt[i] == 'E')
943 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
944 if (modified_in_p (XVECEXP (x, i, j), insn))
951 /* Helper function for set_of. */
959 set_of_1 (rtx x, rtx pat, void *data1)
961 struct set_of_data *data = (struct set_of_data *) (data1);
962 if (rtx_equal_p (x, data->pat)
963 || (!MEM_P (x) && reg_overlap_mentioned_p (data->pat, x)))
967 /* Give an INSN, return a SET or CLOBBER expression that does modify PAT
968 (either directly or via STRICT_LOW_PART and similar modifiers). */
970 set_of (rtx pat, rtx insn)
972 struct set_of_data data;
973 data.found = NULL_RTX;
975 note_stores (INSN_P (insn) ? PATTERN (insn) : insn, set_of_1, &data);
979 /* Given an INSN, return a SET expression if this insn has only a single SET.
980 It may also have CLOBBERs, USEs, or SET whose output
981 will not be used, which we ignore. */
984 single_set_2 (rtx insn, rtx pat)
987 int set_verified = 1;
990 if (GET_CODE (pat) == PARALLEL)
992 for (i = 0; i < XVECLEN (pat, 0); i++)
994 rtx sub = XVECEXP (pat, 0, i);
995 switch (GET_CODE (sub))
1002 /* We can consider insns having multiple sets, where all
1003 but one are dead as single set insns. In common case
1004 only single set is present in the pattern so we want
1005 to avoid checking for REG_UNUSED notes unless necessary.
1007 When we reach set first time, we just expect this is
1008 the single set we are looking for and only when more
1009 sets are found in the insn, we check them. */
1012 if (find_reg_note (insn, REG_UNUSED, SET_DEST (set))
1013 && !side_effects_p (set))
1019 set = sub, set_verified = 0;
1020 else if (!find_reg_note (insn, REG_UNUSED, SET_DEST (sub))
1021 || side_effects_p (sub))
1033 /* Given an INSN, return nonzero if it has more than one SET, else return
1037 multiple_sets (rtx insn)
1042 /* INSN must be an insn. */
1043 if (! INSN_P (insn))
1046 /* Only a PARALLEL can have multiple SETs. */
1047 if (GET_CODE (PATTERN (insn)) == PARALLEL)
1049 for (i = 0, found = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1050 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET)
1052 /* If we have already found a SET, then return now. */
1060 /* Either zero or one SET. */
1064 /* Return nonzero if the destination of SET equals the source
1065 and there are no side effects. */
1068 set_noop_p (rtx set)
1070 rtx src = SET_SRC (set);
1071 rtx dst = SET_DEST (set);
1073 if (dst == pc_rtx && src == pc_rtx)
1076 if (MEM_P (dst) && MEM_P (src))
1077 return rtx_equal_p (dst, src) && !side_effects_p (dst);
1079 if (GET_CODE (dst) == SIGN_EXTRACT
1080 || GET_CODE (dst) == ZERO_EXTRACT)
1081 return rtx_equal_p (XEXP (dst, 0), src)
1082 && ! BYTES_BIG_ENDIAN && XEXP (dst, 2) == const0_rtx
1083 && !side_effects_p (src);
1085 if (GET_CODE (dst) == STRICT_LOW_PART)
1086 dst = XEXP (dst, 0);
1088 if (GET_CODE (src) == SUBREG && GET_CODE (dst) == SUBREG)
1090 if (SUBREG_BYTE (src) != SUBREG_BYTE (dst))
1092 src = SUBREG_REG (src);
1093 dst = SUBREG_REG (dst);
1096 return (REG_P (src) && REG_P (dst)
1097 && REGNO (src) == REGNO (dst));
1100 /* Return nonzero if an insn consists only of SETs, each of which only sets a
1104 noop_move_p (rtx insn)
1106 rtx pat = PATTERN (insn);
1108 if (INSN_CODE (insn) == NOOP_MOVE_INSN_CODE)
1111 /* Insns carrying these notes are useful later on. */
1112 if (find_reg_note (insn, REG_EQUAL, NULL_RTX))
1115 /* For now treat an insn with a REG_RETVAL note as a
1116 a special insn which should not be considered a no-op. */
1117 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
1120 if (GET_CODE (pat) == SET && set_noop_p (pat))
1123 if (GET_CODE (pat) == PARALLEL)
1126 /* If nothing but SETs of registers to themselves,
1127 this insn can also be deleted. */
1128 for (i = 0; i < XVECLEN (pat, 0); i++)
1130 rtx tem = XVECEXP (pat, 0, i);
1132 if (GET_CODE (tem) == USE
1133 || GET_CODE (tem) == CLOBBER)
1136 if (GET_CODE (tem) != SET || ! set_noop_p (tem))
1146 /* Return the last thing that X was assigned from before *PINSN. If VALID_TO
1147 is not NULL_RTX then verify that the object is not modified up to VALID_TO.
1148 If the object was modified, if we hit a partial assignment to X, or hit a
1149 CODE_LABEL first, return X. If we found an assignment, update *PINSN to
1150 point to it. ALLOW_HWREG is set to 1 if hardware registers are allowed to
1154 find_last_value (rtx x, rtx *pinsn, rtx valid_to, int allow_hwreg)
1158 for (p = PREV_INSN (*pinsn); p && !LABEL_P (p);
1162 rtx set = single_set (p);
1163 rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX);
1165 if (set && rtx_equal_p (x, SET_DEST (set)))
1167 rtx src = SET_SRC (set);
1169 if (note && GET_CODE (XEXP (note, 0)) != EXPR_LIST)
1170 src = XEXP (note, 0);
1172 if ((valid_to == NULL_RTX
1173 || ! modified_between_p (src, PREV_INSN (p), valid_to))
1174 /* Reject hard registers because we don't usually want
1175 to use them; we'd rather use a pseudo. */
1177 && REGNO (src) < FIRST_PSEUDO_REGISTER) || allow_hwreg))
1184 /* If set in non-simple way, we don't have a value. */
1185 if (reg_set_p (x, p))
1192 /* Return nonzero if register in range [REGNO, ENDREGNO)
1193 appears either explicitly or implicitly in X
1194 other than being stored into.
1196 References contained within the substructure at LOC do not count.
1197 LOC may be zero, meaning don't ignore anything. */
1200 refers_to_regno_p (unsigned int regno, unsigned int endregno, rtx x,
1204 unsigned int x_regno;
1209 /* The contents of a REG_NONNEG note is always zero, so we must come here
1210 upon repeat in case the last REG_NOTE is a REG_NONNEG note. */
1214 code = GET_CODE (x);
1219 x_regno = REGNO (x);
1221 /* If we modifying the stack, frame, or argument pointer, it will
1222 clobber a virtual register. In fact, we could be more precise,
1223 but it isn't worth it. */
1224 if ((x_regno == STACK_POINTER_REGNUM
1225 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1226 || x_regno == ARG_POINTER_REGNUM
1228 || x_regno == FRAME_POINTER_REGNUM)
1229 && regno >= FIRST_VIRTUAL_REGISTER && regno <= LAST_VIRTUAL_REGISTER)
1232 return (endregno > x_regno
1233 && regno < x_regno + (x_regno < FIRST_PSEUDO_REGISTER
1234 ? hard_regno_nregs[x_regno][GET_MODE (x)]
1238 /* If this is a SUBREG of a hard reg, we can see exactly which
1239 registers are being modified. Otherwise, handle normally. */
1240 if (REG_P (SUBREG_REG (x))
1241 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
1243 unsigned int inner_regno = subreg_regno (x);
1244 unsigned int inner_endregno
1245 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
1246 ? hard_regno_nregs[inner_regno][GET_MODE (x)] : 1);
1248 return endregno > inner_regno && regno < inner_endregno;
1254 if (&SET_DEST (x) != loc
1255 /* Note setting a SUBREG counts as referring to the REG it is in for
1256 a pseudo but not for hard registers since we can
1257 treat each word individually. */
1258 && ((GET_CODE (SET_DEST (x)) == SUBREG
1259 && loc != &SUBREG_REG (SET_DEST (x))
1260 && REG_P (SUBREG_REG (SET_DEST (x)))
1261 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
1262 && refers_to_regno_p (regno, endregno,
1263 SUBREG_REG (SET_DEST (x)), loc))
1264 || (!REG_P (SET_DEST (x))
1265 && refers_to_regno_p (regno, endregno, SET_DEST (x), loc))))
1268 if (code == CLOBBER || loc == &SET_SRC (x))
1277 /* X does not match, so try its subexpressions. */
1279 fmt = GET_RTX_FORMAT (code);
1280 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1282 if (fmt[i] == 'e' && loc != &XEXP (x, i))
1290 if (refers_to_regno_p (regno, endregno, XEXP (x, i), loc))
1293 else if (fmt[i] == 'E')
1296 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1297 if (loc != &XVECEXP (x, i, j)
1298 && refers_to_regno_p (regno, endregno, XVECEXP (x, i, j), loc))
1305 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
1306 we check if any register number in X conflicts with the relevant register
1307 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
1308 contains a MEM (we don't bother checking for memory addresses that can't
1309 conflict because we expect this to be a rare case. */
1312 reg_overlap_mentioned_p (rtx x, rtx in)
1314 unsigned int regno, endregno;
1316 /* If either argument is a constant, then modifying X can not
1317 affect IN. Here we look at IN, we can profitably combine
1318 CONSTANT_P (x) with the switch statement below. */
1319 if (CONSTANT_P (in))
1323 switch (GET_CODE (x))
1325 case STRICT_LOW_PART:
1328 /* Overly conservative. */
1333 regno = REGNO (SUBREG_REG (x));
1334 if (regno < FIRST_PSEUDO_REGISTER)
1335 regno = subreg_regno (x);
1341 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
1342 ? hard_regno_nregs[regno][GET_MODE (x)] : 1);
1343 return refers_to_regno_p (regno, endregno, in, (rtx*) 0);
1353 fmt = GET_RTX_FORMAT (GET_CODE (in));
1354 for (i = GET_RTX_LENGTH (GET_CODE (in)) - 1; i >= 0; i--)
1355 if (fmt[i] == 'e' && reg_overlap_mentioned_p (x, XEXP (in, i)))
1364 return reg_mentioned_p (x, in);
1370 /* If any register in here refers to it we return true. */
1371 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
1372 if (XEXP (XVECEXP (x, 0, i), 0) != 0
1373 && reg_overlap_mentioned_p (XEXP (XVECEXP (x, 0, i), 0), in))
1379 gcc_assert (CONSTANT_P (x));
1384 /* Call FUN on each register or MEM that is stored into or clobbered by X.
1385 (X would be the pattern of an insn).
1386 FUN receives two arguments:
1387 the REG, MEM, CC0 or PC being stored in or clobbered,
1388 the SET or CLOBBER rtx that does the store.
1390 If the item being stored in or clobbered is a SUBREG of a hard register,
1391 the SUBREG will be passed. */
1394 note_stores (rtx x, void (*fun) (rtx, rtx, void *), void *data)
1398 if (GET_CODE (x) == COND_EXEC)
1399 x = COND_EXEC_CODE (x);
1401 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1403 rtx dest = SET_DEST (x);
1405 while ((GET_CODE (dest) == SUBREG
1406 && (!REG_P (SUBREG_REG (dest))
1407 || REGNO (SUBREG_REG (dest)) >= FIRST_PSEUDO_REGISTER))
1408 || GET_CODE (dest) == ZERO_EXTRACT
1409 || GET_CODE (dest) == SIGN_EXTRACT
1410 || GET_CODE (dest) == STRICT_LOW_PART)
1411 dest = XEXP (dest, 0);
1413 /* If we have a PARALLEL, SET_DEST is a list of EXPR_LIST expressions,
1414 each of whose first operand is a register. */
1415 if (GET_CODE (dest) == PARALLEL)
1417 for (i = XVECLEN (dest, 0) - 1; i >= 0; i--)
1418 if (XEXP (XVECEXP (dest, 0, i), 0) != 0)
1419 (*fun) (XEXP (XVECEXP (dest, 0, i), 0), x, data);
1422 (*fun) (dest, x, data);
1425 else if (GET_CODE (x) == PARALLEL)
1426 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
1427 note_stores (XVECEXP (x, 0, i), fun, data);
1430 /* Like notes_stores, but call FUN for each expression that is being
1431 referenced in PBODY, a pointer to the PATTERN of an insn. We only call
1432 FUN for each expression, not any interior subexpressions. FUN receives a
1433 pointer to the expression and the DATA passed to this function.
1435 Note that this is not quite the same test as that done in reg_referenced_p
1436 since that considers something as being referenced if it is being
1437 partially set, while we do not. */
1440 note_uses (rtx *pbody, void (*fun) (rtx *, void *), void *data)
1445 switch (GET_CODE (body))
1448 (*fun) (&COND_EXEC_TEST (body), data);
1449 note_uses (&COND_EXEC_CODE (body), fun, data);
1453 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
1454 note_uses (&XVECEXP (body, 0, i), fun, data);
1458 (*fun) (&XEXP (body, 0), data);
1462 for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--)
1463 (*fun) (&ASM_OPERANDS_INPUT (body, i), data);
1467 (*fun) (&TRAP_CONDITION (body), data);
1471 (*fun) (&XEXP (body, 0), data);
1475 case UNSPEC_VOLATILE:
1476 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
1477 (*fun) (&XVECEXP (body, 0, i), data);
1481 if (MEM_P (XEXP (body, 0)))
1482 (*fun) (&XEXP (XEXP (body, 0), 0), data);
1487 rtx dest = SET_DEST (body);
1489 /* For sets we replace everything in source plus registers in memory
1490 expression in store and operands of a ZERO_EXTRACT. */
1491 (*fun) (&SET_SRC (body), data);
1493 if (GET_CODE (dest) == ZERO_EXTRACT)
1495 (*fun) (&XEXP (dest, 1), data);
1496 (*fun) (&XEXP (dest, 2), data);
1499 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART)
1500 dest = XEXP (dest, 0);
1503 (*fun) (&XEXP (dest, 0), data);
1508 /* All the other possibilities never store. */
1509 (*fun) (pbody, data);
1514 /* Return nonzero if X's old contents don't survive after INSN.
1515 This will be true if X is (cc0) or if X is a register and
1516 X dies in INSN or because INSN entirely sets X.
1518 "Entirely set" means set directly and not through a SUBREG,
1519 ZERO_EXTRACT or SIGN_EXTRACT, so no trace of the old contents remains.
1520 Likewise, REG_INC does not count.
1522 REG may be a hard or pseudo reg. Renumbering is not taken into account,
1523 but for this use that makes no difference, since regs don't overlap
1524 during their lifetimes. Therefore, this function may be used
1525 at any time after deaths have been computed (in flow.c).
1527 If REG is a hard reg that occupies multiple machine registers, this
1528 function will only return 1 if each of those registers will be replaced
1532 dead_or_set_p (rtx insn, rtx x)
1534 unsigned int regno, last_regno;
1537 /* Can't use cc0_rtx below since this file is used by genattrtab.c. */
1538 if (GET_CODE (x) == CC0)
1541 gcc_assert (REG_P (x));
1544 last_regno = (regno >= FIRST_PSEUDO_REGISTER ? regno
1545 : regno + hard_regno_nregs[regno][GET_MODE (x)] - 1);
1547 for (i = regno; i <= last_regno; i++)
1548 if (! dead_or_set_regno_p (insn, i))
1554 /* Return TRUE iff DEST is a register or subreg of a register and
1555 doesn't change the number of words of the inner register, and any
1556 part of the register is TEST_REGNO. */
1559 covers_regno_no_parallel_p (rtx dest, unsigned int test_regno)
1561 unsigned int regno, endregno;
1563 if (GET_CODE (dest) == SUBREG
1564 && (((GET_MODE_SIZE (GET_MODE (dest))
1565 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
1566 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))
1567 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
1568 dest = SUBREG_REG (dest);
1573 regno = REGNO (dest);
1574 endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1
1575 : regno + hard_regno_nregs[regno][GET_MODE (dest)]);
1576 return (test_regno >= regno && test_regno < endregno);
1579 /* Like covers_regno_no_parallel_p, but also handles PARALLELs where
1580 any member matches the covers_regno_no_parallel_p criteria. */
1583 covers_regno_p (rtx dest, unsigned int test_regno)
1585 if (GET_CODE (dest) == PARALLEL)
1587 /* Some targets place small structures in registers for return
1588 values of functions, and those registers are wrapped in
1589 PARALLELs that we may see as the destination of a SET. */
1592 for (i = XVECLEN (dest, 0) - 1; i >= 0; i--)
1594 rtx inner = XEXP (XVECEXP (dest, 0, i), 0);
1595 if (inner != NULL_RTX
1596 && covers_regno_no_parallel_p (inner, test_regno))
1603 return covers_regno_no_parallel_p (dest, test_regno);
1606 /* Utility function for dead_or_set_p to check an individual register. Also
1607 called from flow.c. */
1610 dead_or_set_regno_p (rtx insn, unsigned int test_regno)
1614 /* See if there is a death note for something that includes TEST_REGNO. */
1615 if (find_regno_note (insn, REG_DEAD, test_regno))
1619 && find_regno_fusage (insn, CLOBBER, test_regno))
1622 pattern = PATTERN (insn);
1624 if (GET_CODE (pattern) == COND_EXEC)
1625 pattern = COND_EXEC_CODE (pattern);
1627 if (GET_CODE (pattern) == SET)
1628 return covers_regno_p (SET_DEST (pattern), test_regno);
1629 else if (GET_CODE (pattern) == PARALLEL)
1633 for (i = XVECLEN (pattern, 0) - 1; i >= 0; i--)
1635 rtx body = XVECEXP (pattern, 0, i);
1637 if (GET_CODE (body) == COND_EXEC)
1638 body = COND_EXEC_CODE (body);
1640 if ((GET_CODE (body) == SET || GET_CODE (body) == CLOBBER)
1641 && covers_regno_p (SET_DEST (body), test_regno))
1649 /* Return the reg-note of kind KIND in insn INSN, if there is one.
1650 If DATUM is nonzero, look for one whose datum is DATUM. */
1653 find_reg_note (rtx insn, enum reg_note kind, rtx datum)
1657 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1658 if (! INSN_P (insn))
1662 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1663 if (REG_NOTE_KIND (link) == kind)
1668 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1669 if (REG_NOTE_KIND (link) == kind && datum == XEXP (link, 0))
1674 /* Return the reg-note of kind KIND in insn INSN which applies to register
1675 number REGNO, if any. Return 0 if there is no such reg-note. Note that
1676 the REGNO of this NOTE need not be REGNO if REGNO is a hard register;
1677 it might be the case that the note overlaps REGNO. */
1680 find_regno_note (rtx insn, enum reg_note kind, unsigned int regno)
1684 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1685 if (! INSN_P (insn))
1688 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1689 if (REG_NOTE_KIND (link) == kind
1690 /* Verify that it is a register, so that scratch and MEM won't cause a
1692 && REG_P (XEXP (link, 0))
1693 && REGNO (XEXP (link, 0)) <= regno
1694 && ((REGNO (XEXP (link, 0))
1695 + (REGNO (XEXP (link, 0)) >= FIRST_PSEUDO_REGISTER ? 1
1696 : hard_regno_nregs[REGNO (XEXP (link, 0))]
1697 [GET_MODE (XEXP (link, 0))]))
1703 /* Return a REG_EQUIV or REG_EQUAL note if insn has only a single set and
1707 find_reg_equal_equiv_note (rtx insn)
1713 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1714 if (REG_NOTE_KIND (link) == REG_EQUAL
1715 || REG_NOTE_KIND (link) == REG_EQUIV)
1717 if (single_set (insn) == 0)
1724 /* Return true if DATUM, or any overlap of DATUM, of kind CODE is found
1725 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1728 find_reg_fusage (rtx insn, enum rtx_code code, rtx datum)
1730 /* If it's not a CALL_INSN, it can't possibly have a
1731 CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */
1741 for (link = CALL_INSN_FUNCTION_USAGE (insn);
1743 link = XEXP (link, 1))
1744 if (GET_CODE (XEXP (link, 0)) == code
1745 && rtx_equal_p (datum, XEXP (XEXP (link, 0), 0)))
1750 unsigned int regno = REGNO (datum);
1752 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1753 to pseudo registers, so don't bother checking. */
1755 if (regno < FIRST_PSEUDO_REGISTER)
1757 unsigned int end_regno
1758 = regno + hard_regno_nregs[regno][GET_MODE (datum)];
1761 for (i = regno; i < end_regno; i++)
1762 if (find_regno_fusage (insn, code, i))
1770 /* Return true if REGNO, or any overlap of REGNO, of kind CODE is found
1771 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1774 find_regno_fusage (rtx insn, enum rtx_code code, unsigned int regno)
1778 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1779 to pseudo registers, so don't bother checking. */
1781 if (regno >= FIRST_PSEUDO_REGISTER
1785 for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1))
1787 unsigned int regnote;
1790 if (GET_CODE (op = XEXP (link, 0)) == code
1791 && REG_P (reg = XEXP (op, 0))
1792 && (regnote = REGNO (reg)) <= regno
1793 && regnote + hard_regno_nregs[regnote][GET_MODE (reg)] > regno)
1800 /* Return true if INSN is a call to a pure function. */
1803 pure_call_p (rtx insn)
1807 if (!CALL_P (insn) || ! CONST_OR_PURE_CALL_P (insn))
1810 /* Look for the note that differentiates const and pure functions. */
1811 for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1))
1815 if (GET_CODE (u = XEXP (link, 0)) == USE
1816 && MEM_P (m = XEXP (u, 0)) && GET_MODE (m) == BLKmode
1817 && GET_CODE (XEXP (m, 0)) == SCRATCH)
1824 /* Remove register note NOTE from the REG_NOTES of INSN. */
1827 remove_note (rtx insn, rtx note)
1831 if (note == NULL_RTX)
1834 if (REG_NOTES (insn) == note)
1836 REG_NOTES (insn) = XEXP (note, 1);
1840 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1841 if (XEXP (link, 1) == note)
1843 XEXP (link, 1) = XEXP (note, 1);
1850 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
1851 return 1 if it is found. A simple equality test is used to determine if
1855 in_expr_list_p (rtx listp, rtx node)
1859 for (x = listp; x; x = XEXP (x, 1))
1860 if (node == XEXP (x, 0))
1866 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
1867 remove that entry from the list if it is found.
1869 A simple equality test is used to determine if NODE matches. */
1872 remove_node_from_expr_list (rtx node, rtx *listp)
1875 rtx prev = NULL_RTX;
1879 if (node == XEXP (temp, 0))
1881 /* Splice the node out of the list. */
1883 XEXP (prev, 1) = XEXP (temp, 1);
1885 *listp = XEXP (temp, 1);
1891 temp = XEXP (temp, 1);
1895 /* Nonzero if X contains any volatile instructions. These are instructions
1896 which may cause unpredictable machine state instructions, and thus no
1897 instructions should be moved or combined across them. This includes
1898 only volatile asms and UNSPEC_VOLATILE instructions. */
1901 volatile_insn_p (rtx x)
1905 code = GET_CODE (x);
1925 case UNSPEC_VOLATILE:
1926 /* case TRAP_IF: This isn't clear yet. */
1931 if (MEM_VOLATILE_P (x))
1938 /* Recursively scan the operands of this expression. */
1941 const char *fmt = GET_RTX_FORMAT (code);
1944 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1948 if (volatile_insn_p (XEXP (x, i)))
1951 else if (fmt[i] == 'E')
1954 for (j = 0; j < XVECLEN (x, i); j++)
1955 if (volatile_insn_p (XVECEXP (x, i, j)))
1963 /* Nonzero if X contains any volatile memory references
1964 UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */
1967 volatile_refs_p (rtx x)
1971 code = GET_CODE (x);
1989 case UNSPEC_VOLATILE:
1995 if (MEM_VOLATILE_P (x))
2002 /* Recursively scan the operands of this expression. */
2005 const char *fmt = GET_RTX_FORMAT (code);
2008 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2012 if (volatile_refs_p (XEXP (x, i)))
2015 else if (fmt[i] == 'E')
2018 for (j = 0; j < XVECLEN (x, i); j++)
2019 if (volatile_refs_p (XVECEXP (x, i, j)))
2027 /* Similar to above, except that it also rejects register pre- and post-
2031 side_effects_p (rtx x)
2035 code = GET_CODE (x);
2053 /* Reject CLOBBER with a non-VOID mode. These are made by combine.c
2054 when some combination can't be done. If we see one, don't think
2055 that we can simplify the expression. */
2056 return (GET_MODE (x) != VOIDmode);
2065 case UNSPEC_VOLATILE:
2066 /* case TRAP_IF: This isn't clear yet. */
2072 if (MEM_VOLATILE_P (x))
2079 /* Recursively scan the operands of this expression. */
2082 const char *fmt = GET_RTX_FORMAT (code);
2085 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2089 if (side_effects_p (XEXP (x, i)))
2092 else if (fmt[i] == 'E')
2095 for (j = 0; j < XVECLEN (x, i); j++)
2096 if (side_effects_p (XVECEXP (x, i, j)))
2104 /* Return nonzero if evaluating rtx X might cause a trap. */
2115 code = GET_CODE (x);
2118 /* Handle these cases quickly. */
2132 case UNSPEC_VOLATILE:
2137 return MEM_VOLATILE_P (x);
2139 /* Memory ref can trap unless it's a static var or a stack slot. */
2141 if (MEM_NOTRAP_P (x))
2143 return rtx_addr_can_trap_p (XEXP (x, 0));
2145 /* Division by a non-constant might trap. */
2150 if (HONOR_SNANS (GET_MODE (x)))
2152 if (! CONSTANT_P (XEXP (x, 1))
2153 || (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
2154 && flag_trapping_math))
2156 if (XEXP (x, 1) == const0_rtx)
2161 /* An EXPR_LIST is used to represent a function call. This
2162 certainly may trap. */
2171 /* Some floating point comparisons may trap. */
2172 if (!flag_trapping_math)
2174 /* ??? There is no machine independent way to check for tests that trap
2175 when COMPARE is used, though many targets do make this distinction.
2176 For instance, sparc uses CCFPE for compares which generate exceptions
2177 and CCFP for compares which do not generate exceptions. */
2178 if (HONOR_NANS (GET_MODE (x)))
2180 /* But often the compare has some CC mode, so check operand
2182 if (HONOR_NANS (GET_MODE (XEXP (x, 0)))
2183 || HONOR_NANS (GET_MODE (XEXP (x, 1))))
2189 if (HONOR_SNANS (GET_MODE (x)))
2191 /* Often comparison is CC mode, so check operand modes. */
2192 if (HONOR_SNANS (GET_MODE (XEXP (x, 0)))
2193 || HONOR_SNANS (GET_MODE (XEXP (x, 1))))
2198 /* Conversion of floating point might trap. */
2199 if (flag_trapping_math && HONOR_NANS (GET_MODE (XEXP (x, 0))))
2205 /* These operations don't trap even with floating point. */
2209 /* Any floating arithmetic may trap. */
2210 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
2211 && flag_trapping_math)
2215 fmt = GET_RTX_FORMAT (code);
2216 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2220 if (may_trap_p (XEXP (x, i)))
2223 else if (fmt[i] == 'E')
2226 for (j = 0; j < XVECLEN (x, i); j++)
2227 if (may_trap_p (XVECEXP (x, i, j)))
2234 /* Return nonzero if X contains a comparison that is not either EQ or NE,
2235 i.e., an inequality. */
2238 inequality_comparisons_p (rtx x)
2242 enum rtx_code code = GET_CODE (x);
2272 len = GET_RTX_LENGTH (code);
2273 fmt = GET_RTX_FORMAT (code);
2275 for (i = 0; i < len; i++)
2279 if (inequality_comparisons_p (XEXP (x, i)))
2282 else if (fmt[i] == 'E')
2285 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2286 if (inequality_comparisons_p (XVECEXP (x, i, j)))
2294 /* Replace any occurrence of FROM in X with TO. The function does
2295 not enter into CONST_DOUBLE for the replace.
2297 Note that copying is not done so X must not be shared unless all copies
2298 are to be modified. */
2301 replace_rtx (rtx x, rtx from, rtx to)
2306 /* The following prevents loops occurrence when we change MEM in
2307 CONST_DOUBLE onto the same CONST_DOUBLE. */
2308 if (x != 0 && GET_CODE (x) == CONST_DOUBLE)
2314 /* Allow this function to make replacements in EXPR_LISTs. */
2318 if (GET_CODE (x) == SUBREG)
2320 rtx new = replace_rtx (SUBREG_REG (x), from, to);
2322 if (GET_CODE (new) == CONST_INT)
2324 x = simplify_subreg (GET_MODE (x), new,
2325 GET_MODE (SUBREG_REG (x)),
2330 SUBREG_REG (x) = new;
2334 else if (GET_CODE (x) == ZERO_EXTEND)
2336 rtx new = replace_rtx (XEXP (x, 0), from, to);
2338 if (GET_CODE (new) == CONST_INT)
2340 x = simplify_unary_operation (ZERO_EXTEND, GET_MODE (x),
2341 new, GET_MODE (XEXP (x, 0)));
2350 fmt = GET_RTX_FORMAT (GET_CODE (x));
2351 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
2354 XEXP (x, i) = replace_rtx (XEXP (x, i), from, to);
2355 else if (fmt[i] == 'E')
2356 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2357 XVECEXP (x, i, j) = replace_rtx (XVECEXP (x, i, j), from, to);
2363 /* Throughout the rtx X, replace many registers according to REG_MAP.
2364 Return the replacement for X (which may be X with altered contents).
2365 REG_MAP[R] is the replacement for register R, or 0 for don't replace.
2366 NREGS is the length of REG_MAP; regs >= NREGS are not mapped.
2368 We only support REG_MAP entries of REG or SUBREG. Also, hard registers
2369 should not be mapped to pseudos or vice versa since validate_change
2372 If REPLACE_DEST is 1, replacements are also done in destinations;
2373 otherwise, only sources are replaced. */
2376 replace_regs (rtx x, rtx *reg_map, unsigned int nregs, int replace_dest)
2385 code = GET_CODE (x);
2400 /* Verify that the register has an entry before trying to access it. */
2401 if (REGNO (x) < nregs && reg_map[REGNO (x)] != 0)
2403 /* SUBREGs can't be shared. Always return a copy to ensure that if
2404 this replacement occurs more than once then each instance will
2405 get distinct rtx. */
2406 if (GET_CODE (reg_map[REGNO (x)]) == SUBREG)
2407 return copy_rtx (reg_map[REGNO (x)]);
2408 return reg_map[REGNO (x)];
2413 /* Prevent making nested SUBREGs. */
2414 if (REG_P (SUBREG_REG (x)) && REGNO (SUBREG_REG (x)) < nregs
2415 && reg_map[REGNO (SUBREG_REG (x))] != 0
2416 && GET_CODE (reg_map[REGNO (SUBREG_REG (x))]) == SUBREG)
2418 rtx map_val = reg_map[REGNO (SUBREG_REG (x))];
2419 return simplify_gen_subreg (GET_MODE (x), map_val,
2420 GET_MODE (SUBREG_REG (x)),
2427 SET_DEST (x) = replace_regs (SET_DEST (x), reg_map, nregs, 0);
2429 else if (MEM_P (SET_DEST (x))
2430 || GET_CODE (SET_DEST (x)) == STRICT_LOW_PART)
2431 /* Even if we are not to replace destinations, replace register if it
2432 is CONTAINED in destination (destination is memory or
2433 STRICT_LOW_PART). */
2434 XEXP (SET_DEST (x), 0) = replace_regs (XEXP (SET_DEST (x), 0),
2436 else if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
2437 /* Similarly, for ZERO_EXTRACT we replace all operands. */
2440 SET_SRC (x) = replace_regs (SET_SRC (x), reg_map, nregs, 0);
2447 fmt = GET_RTX_FORMAT (code);
2448 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2451 XEXP (x, i) = replace_regs (XEXP (x, i), reg_map, nregs, replace_dest);
2452 else if (fmt[i] == 'E')
2455 for (j = 0; j < XVECLEN (x, i); j++)
2456 XVECEXP (x, i, j) = replace_regs (XVECEXP (x, i, j), reg_map,
2457 nregs, replace_dest);
2463 /* Replace occurrences of the old label in *X with the new one.
2464 DATA is a REPLACE_LABEL_DATA containing the old and new labels. */
2467 replace_label (rtx *x, void *data)
2470 rtx old_label = ((replace_label_data *) data)->r1;
2471 rtx new_label = ((replace_label_data *) data)->r2;
2472 bool update_label_nuses = ((replace_label_data *) data)->update_label_nuses;
2477 if (GET_CODE (l) == SYMBOL_REF
2478 && CONSTANT_POOL_ADDRESS_P (l))
2480 rtx c = get_pool_constant (l);
2481 if (rtx_referenced_p (old_label, c))
2484 replace_label_data *d = (replace_label_data *) data;
2486 /* Create a copy of constant C; replace the label inside
2487 but do not update LABEL_NUSES because uses in constant pool
2489 new_c = copy_rtx (c);
2490 d->update_label_nuses = false;
2491 for_each_rtx (&new_c, replace_label, data);
2492 d->update_label_nuses = update_label_nuses;
2494 /* Add the new constant NEW_C to constant pool and replace
2495 the old reference to constant by new reference. */
2496 new_l = XEXP (force_const_mem (get_pool_mode (l), new_c), 0);
2497 *x = replace_rtx (l, l, new_l);
2502 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
2503 field. This is not handled by for_each_rtx because it doesn't
2504 handle unprinted ('0') fields. */
2505 if (JUMP_P (l) && JUMP_LABEL (l) == old_label)
2506 JUMP_LABEL (l) = new_label;
2508 if ((GET_CODE (l) == LABEL_REF
2509 || GET_CODE (l) == INSN_LIST)
2510 && XEXP (l, 0) == old_label)
2512 XEXP (l, 0) = new_label;
2513 if (update_label_nuses)
2515 ++LABEL_NUSES (new_label);
2516 --LABEL_NUSES (old_label);
2524 /* When *BODY is equal to X or X is directly referenced by *BODY
2525 return nonzero, thus FOR_EACH_RTX stops traversing and returns nonzero
2526 too, otherwise FOR_EACH_RTX continues traversing *BODY. */
2529 rtx_referenced_p_1 (rtx *body, void *x)
2533 if (*body == NULL_RTX)
2534 return y == NULL_RTX;
2536 /* Return true if a label_ref *BODY refers to label Y. */
2537 if (GET_CODE (*body) == LABEL_REF && LABEL_P (y))
2538 return XEXP (*body, 0) == y;
2540 /* If *BODY is a reference to pool constant traverse the constant. */
2541 if (GET_CODE (*body) == SYMBOL_REF
2542 && CONSTANT_POOL_ADDRESS_P (*body))
2543 return rtx_referenced_p (y, get_pool_constant (*body));
2545 /* By default, compare the RTL expressions. */
2546 return rtx_equal_p (*body, y);
2549 /* Return true if X is referenced in BODY. */
2552 rtx_referenced_p (rtx x, rtx body)
2554 return for_each_rtx (&body, rtx_referenced_p_1, x);
2557 /* If INSN is a tablejump return true and store the label (before jump table) to
2558 *LABELP and the jump table to *TABLEP. LABELP and TABLEP may be NULL. */
2561 tablejump_p (rtx insn, rtx *labelp, rtx *tablep)
2566 && (label = JUMP_LABEL (insn)) != NULL_RTX
2567 && (table = next_active_insn (label)) != NULL_RTX
2569 && (GET_CODE (PATTERN (table)) == ADDR_VEC
2570 || GET_CODE (PATTERN (table)) == ADDR_DIFF_VEC))
2581 /* A subroutine of computed_jump_p, return 1 if X contains a REG or MEM or
2582 constant that is not in the constant pool and not in the condition
2583 of an IF_THEN_ELSE. */
2586 computed_jump_p_1 (rtx x)
2588 enum rtx_code code = GET_CODE (x);
2607 return ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
2608 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)));
2611 return (computed_jump_p_1 (XEXP (x, 1))
2612 || computed_jump_p_1 (XEXP (x, 2)));
2618 fmt = GET_RTX_FORMAT (code);
2619 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2622 && computed_jump_p_1 (XEXP (x, i)))
2625 else if (fmt[i] == 'E')
2626 for (j = 0; j < XVECLEN (x, i); j++)
2627 if (computed_jump_p_1 (XVECEXP (x, i, j)))
2634 /* Return nonzero if INSN is an indirect jump (aka computed jump).
2636 Tablejumps and casesi insns are not considered indirect jumps;
2637 we can recognize them by a (use (label_ref)). */
2640 computed_jump_p (rtx insn)
2645 rtx pat = PATTERN (insn);
2647 if (find_reg_note (insn, REG_LABEL, NULL_RTX))
2649 else if (GET_CODE (pat) == PARALLEL)
2651 int len = XVECLEN (pat, 0);
2652 int has_use_labelref = 0;
2654 for (i = len - 1; i >= 0; i--)
2655 if (GET_CODE (XVECEXP (pat, 0, i)) == USE
2656 && (GET_CODE (XEXP (XVECEXP (pat, 0, i), 0))
2658 has_use_labelref = 1;
2660 if (! has_use_labelref)
2661 for (i = len - 1; i >= 0; i--)
2662 if (GET_CODE (XVECEXP (pat, 0, i)) == SET
2663 && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx
2664 && computed_jump_p_1 (SET_SRC (XVECEXP (pat, 0, i))))
2667 else if (GET_CODE (pat) == SET
2668 && SET_DEST (pat) == pc_rtx
2669 && computed_jump_p_1 (SET_SRC (pat)))
2675 /* Traverse X via depth-first search, calling F for each
2676 sub-expression (including X itself). F is also passed the DATA.
2677 If F returns -1, do not traverse sub-expressions, but continue
2678 traversing the rest of the tree. If F ever returns any other
2679 nonzero value, stop the traversal, and return the value returned
2680 by F. Otherwise, return 0. This function does not traverse inside
2681 tree structure that contains RTX_EXPRs, or into sub-expressions
2682 whose format code is `0' since it is not known whether or not those
2683 codes are actually RTL.
2685 This routine is very general, and could (should?) be used to
2686 implement many of the other routines in this file. */
2689 for_each_rtx (rtx *x, rtx_function f, void *data)
2697 result = (*f) (x, data);
2699 /* Do not traverse sub-expressions. */
2701 else if (result != 0)
2702 /* Stop the traversal. */
2706 /* There are no sub-expressions. */
2709 length = GET_RTX_LENGTH (GET_CODE (*x));
2710 format = GET_RTX_FORMAT (GET_CODE (*x));
2712 for (i = 0; i < length; ++i)
2717 result = for_each_rtx (&XEXP (*x, i), f, data);
2724 if (XVEC (*x, i) != 0)
2727 for (j = 0; j < XVECLEN (*x, i); ++j)
2729 result = for_each_rtx (&XVECEXP (*x, i, j), f, data);
2737 /* Nothing to do. */
2746 /* Searches X for any reference to REGNO, returning the rtx of the
2747 reference found if any. Otherwise, returns NULL_RTX. */
2750 regno_use_in (unsigned int regno, rtx x)
2756 if (REG_P (x) && REGNO (x) == regno)
2759 fmt = GET_RTX_FORMAT (GET_CODE (x));
2760 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
2764 if ((tem = regno_use_in (regno, XEXP (x, i))))
2767 else if (fmt[i] == 'E')
2768 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2769 if ((tem = regno_use_in (regno , XVECEXP (x, i, j))))
2776 /* Return a value indicating whether OP, an operand of a commutative
2777 operation, is preferred as the first or second operand. The higher
2778 the value, the stronger the preference for being the first operand.
2779 We use negative values to indicate a preference for the first operand
2780 and positive values for the second operand. */
2783 commutative_operand_precedence (rtx op)
2785 enum rtx_code code = GET_CODE (op);
2787 /* Constants always come the second operand. Prefer "nice" constants. */
2788 if (code == CONST_INT)
2790 if (code == CONST_DOUBLE)
2792 op = avoid_constant_pool_reference (op);
2793 code = GET_CODE (op);
2795 switch (GET_RTX_CLASS (code))
2798 if (code == CONST_INT)
2800 if (code == CONST_DOUBLE)
2805 /* SUBREGs of objects should come second. */
2806 if (code == SUBREG && OBJECT_P (SUBREG_REG (op)))
2809 if (!CONSTANT_P (op))
2812 /* As for RTX_CONST_OBJ. */
2816 /* Complex expressions should be the first, so decrease priority
2820 case RTX_COMM_ARITH:
2821 /* Prefer operands that are themselves commutative to be first.
2822 This helps to make things linear. In particular,
2823 (and (and (reg) (reg)) (not (reg))) is canonical. */
2827 /* If only one operand is a binary expression, it will be the first
2828 operand. In particular, (plus (minus (reg) (reg)) (neg (reg)))
2829 is canonical, although it will usually be further simplified. */
2833 /* Then prefer NEG and NOT. */
2834 if (code == NEG || code == NOT)
2842 /* Return 1 iff it is necessary to swap operands of commutative operation
2843 in order to canonicalize expression. */
2846 swap_commutative_operands_p (rtx x, rtx y)
2848 return (commutative_operand_precedence (x)
2849 < commutative_operand_precedence (y));
2852 /* Return 1 if X is an autoincrement side effect and the register is
2853 not the stack pointer. */
2857 switch (GET_CODE (x))
2865 /* There are no REG_INC notes for SP. */
2866 if (XEXP (x, 0) != stack_pointer_rtx)
2874 /* Return 1 if the sequence of instructions beginning with FROM and up
2875 to and including TO is safe to move. If NEW_TO is non-NULL, and
2876 the sequence is not already safe to move, but can be easily
2877 extended to a sequence which is safe, then NEW_TO will point to the
2878 end of the extended sequence.
2880 For now, this function only checks that the region contains whole
2881 exception regions, but it could be extended to check additional
2882 conditions as well. */
2885 insns_safe_to_move_p (rtx from, rtx to, rtx *new_to)
2887 int eh_region_count = 0;
2891 /* By default, assume the end of the region will be what was
2900 switch (NOTE_LINE_NUMBER (r))
2902 case NOTE_INSN_EH_REGION_BEG:
2906 case NOTE_INSN_EH_REGION_END:
2907 if (eh_region_count == 0)
2908 /* This sequence of instructions contains the end of
2909 an exception region, but not he beginning. Moving
2910 it will cause chaos. */
2921 /* If we've passed TO, and we see a non-note instruction, we
2922 can't extend the sequence to a movable sequence. */
2928 /* It's OK to move the sequence if there were matched sets of
2929 exception region notes. */
2930 return eh_region_count == 0;
2935 /* It's OK to move the sequence if there were matched sets of
2936 exception region notes. */
2937 if (past_to_p && eh_region_count == 0)
2943 /* Go to the next instruction. */
2950 /* Return nonzero if IN contains a piece of rtl that has the address LOC. */
2952 loc_mentioned_in_p (rtx *loc, rtx in)
2954 enum rtx_code code = GET_CODE (in);
2955 const char *fmt = GET_RTX_FORMAT (code);
2958 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2960 if (loc == &in->u.fld[i].rt_rtx)
2964 if (loc_mentioned_in_p (loc, XEXP (in, i)))
2967 else if (fmt[i] == 'E')
2968 for (j = XVECLEN (in, i) - 1; j >= 0; j--)
2969 if (loc_mentioned_in_p (loc, XVECEXP (in, i, j)))
2975 /* Helper function for subreg_lsb. Given a subreg's OUTER_MODE, INNER_MODE,
2976 and SUBREG_BYTE, return the bit offset where the subreg begins
2977 (counting from the least significant bit of the operand). */
2980 subreg_lsb_1 (enum machine_mode outer_mode,
2981 enum machine_mode inner_mode,
2982 unsigned int subreg_byte)
2984 unsigned int bitpos;
2988 /* A paradoxical subreg begins at bit position 0. */
2989 if (GET_MODE_BITSIZE (outer_mode) > GET_MODE_BITSIZE (inner_mode))
2992 if (WORDS_BIG_ENDIAN != BYTES_BIG_ENDIAN)
2993 /* If the subreg crosses a word boundary ensure that
2994 it also begins and ends on a word boundary. */
2995 gcc_assert (!((subreg_byte % UNITS_PER_WORD
2996 + GET_MODE_SIZE (outer_mode)) > UNITS_PER_WORD
2997 && (subreg_byte % UNITS_PER_WORD
2998 || GET_MODE_SIZE (outer_mode) % UNITS_PER_WORD)));
3000 if (WORDS_BIG_ENDIAN)
3001 word = (GET_MODE_SIZE (inner_mode)
3002 - (subreg_byte + GET_MODE_SIZE (outer_mode))) / UNITS_PER_WORD;
3004 word = subreg_byte / UNITS_PER_WORD;
3005 bitpos = word * BITS_PER_WORD;
3007 if (BYTES_BIG_ENDIAN)
3008 byte = (GET_MODE_SIZE (inner_mode)
3009 - (subreg_byte + GET_MODE_SIZE (outer_mode))) % UNITS_PER_WORD;
3011 byte = subreg_byte % UNITS_PER_WORD;
3012 bitpos += byte * BITS_PER_UNIT;
3017 /* Given a subreg X, return the bit offset where the subreg begins
3018 (counting from the least significant bit of the reg). */
3023 return subreg_lsb_1 (GET_MODE (x), GET_MODE (SUBREG_REG (x)),
3027 /* This function returns the regno offset of a subreg expression.
3028 xregno - A regno of an inner hard subreg_reg (or what will become one).
3029 xmode - The mode of xregno.
3030 offset - The byte offset.
3031 ymode - The mode of a top level SUBREG (or what may become one).
3032 RETURN - The regno offset which would be used. */
3034 subreg_regno_offset (unsigned int xregno, enum machine_mode xmode,
3035 unsigned int offset, enum machine_mode ymode)
3037 int nregs_xmode, nregs_ymode;
3038 int mode_multiple, nregs_multiple;
3041 gcc_assert (xregno < FIRST_PSEUDO_REGISTER);
3043 nregs_xmode = hard_regno_nregs[xregno][xmode];
3044 nregs_ymode = hard_regno_nregs[xregno][ymode];
3046 /* If this is a big endian paradoxical subreg, which uses more actual
3047 hard registers than the original register, we must return a negative
3048 offset so that we find the proper highpart of the register. */
3050 && nregs_ymode > nregs_xmode
3051 && (GET_MODE_SIZE (ymode) > UNITS_PER_WORD
3052 ? WORDS_BIG_ENDIAN : BYTES_BIG_ENDIAN))
3053 return nregs_xmode - nregs_ymode;
3055 if (offset == 0 || nregs_xmode == nregs_ymode)
3058 /* size of ymode must not be greater than the size of xmode. */
3059 mode_multiple = GET_MODE_SIZE (xmode) / GET_MODE_SIZE (ymode);
3060 gcc_assert (mode_multiple != 0);
3062 y_offset = offset / GET_MODE_SIZE (ymode);
3063 nregs_multiple = nregs_xmode / nregs_ymode;
3064 return (y_offset / (mode_multiple / nregs_multiple)) * nregs_ymode;
3067 /* This function returns true when the offset is representable via
3068 subreg_offset in the given regno.
3069 xregno - A regno of an inner hard subreg_reg (or what will become one).
3070 xmode - The mode of xregno.
3071 offset - The byte offset.
3072 ymode - The mode of a top level SUBREG (or what may become one).
3073 RETURN - The regno offset which would be used. */
3075 subreg_offset_representable_p (unsigned int xregno, enum machine_mode xmode,
3076 unsigned int offset, enum machine_mode ymode)
3078 int nregs_xmode, nregs_ymode;
3079 int mode_multiple, nregs_multiple;
3082 gcc_assert (xregno < FIRST_PSEUDO_REGISTER);
3084 nregs_xmode = hard_regno_nregs[xregno][xmode];
3085 nregs_ymode = hard_regno_nregs[xregno][ymode];
3087 /* Paradoxical subregs are always valid. */
3089 && nregs_ymode > nregs_xmode
3090 && (GET_MODE_SIZE (ymode) > UNITS_PER_WORD
3091 ? WORDS_BIG_ENDIAN : BYTES_BIG_ENDIAN))
3094 /* Lowpart subregs are always valid. */
3095 if (offset == subreg_lowpart_offset (ymode, xmode))
3098 /* This should always pass, otherwise we don't know how to verify the
3099 constraint. These conditions may be relaxed but subreg_offset would
3100 need to be redesigned. */
3101 gcc_assert ((GET_MODE_SIZE (xmode) % GET_MODE_SIZE (ymode)) == 0);
3102 gcc_assert ((GET_MODE_SIZE (ymode) % nregs_ymode) == 0);
3103 gcc_assert ((nregs_xmode % nregs_ymode) == 0);
3105 /* The XMODE value can be seen as a vector of NREGS_XMODE
3106 values. The subreg must represent a lowpart of given field.
3107 Compute what field it is. */
3108 offset -= subreg_lowpart_offset (ymode,
3109 mode_for_size (GET_MODE_BITSIZE (xmode)
3113 /* size of ymode must not be greater than the size of xmode. */
3114 mode_multiple = GET_MODE_SIZE (xmode) / GET_MODE_SIZE (ymode);
3115 gcc_assert (mode_multiple != 0);
3117 y_offset = offset / GET_MODE_SIZE (ymode);
3118 nregs_multiple = nregs_xmode / nregs_ymode;
3120 gcc_assert ((offset % GET_MODE_SIZE (ymode)) == 0);
3121 gcc_assert ((mode_multiple % nregs_multiple) == 0);
3123 return (!(y_offset % (mode_multiple / nregs_multiple)));
3126 /* Return the final regno that a subreg expression refers to. */
3128 subreg_regno (rtx x)
3131 rtx subreg = SUBREG_REG (x);
3132 int regno = REGNO (subreg);
3134 ret = regno + subreg_regno_offset (regno,
3141 struct parms_set_data
3147 /* Helper function for noticing stores to parameter registers. */
3149 parms_set (rtx x, rtx pat ATTRIBUTE_UNUSED, void *data)
3151 struct parms_set_data *d = data;
3152 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
3153 && TEST_HARD_REG_BIT (d->regs, REGNO (x)))
3155 CLEAR_HARD_REG_BIT (d->regs, REGNO (x));
3160 /* Look backward for first parameter to be loaded.
3161 Do not skip BOUNDARY. */
3163 find_first_parameter_load (rtx call_insn, rtx boundary)
3165 struct parms_set_data parm;
3168 /* Since different machines initialize their parameter registers
3169 in different orders, assume nothing. Collect the set of all
3170 parameter registers. */
3171 CLEAR_HARD_REG_SET (parm.regs);
3173 for (p = CALL_INSN_FUNCTION_USAGE (call_insn); p; p = XEXP (p, 1))
3174 if (GET_CODE (XEXP (p, 0)) == USE
3175 && REG_P (XEXP (XEXP (p, 0), 0)))
3177 gcc_assert (REGNO (XEXP (XEXP (p, 0), 0)) < FIRST_PSEUDO_REGISTER);
3179 /* We only care about registers which can hold function
3181 if (!FUNCTION_ARG_REGNO_P (REGNO (XEXP (XEXP (p, 0), 0))))
3184 SET_HARD_REG_BIT (parm.regs, REGNO (XEXP (XEXP (p, 0), 0)));
3189 /* Search backward for the first set of a register in this set. */
3190 while (parm.nregs && before != boundary)
3192 before = PREV_INSN (before);
3194 /* It is possible that some loads got CSEed from one call to
3195 another. Stop in that case. */
3196 if (CALL_P (before))
3199 /* Our caller needs either ensure that we will find all sets
3200 (in case code has not been optimized yet), or take care
3201 for possible labels in a way by setting boundary to preceding
3203 if (LABEL_P (before))
3205 gcc_assert (before == boundary);
3209 if (INSN_P (before))
3210 note_stores (PATTERN (before), parms_set, &parm);
3215 /* Return true if we should avoid inserting code between INSN and preceding
3216 call instruction. */
3219 keep_with_call_p (rtx insn)
3223 if (INSN_P (insn) && (set = single_set (insn)) != NULL)
3225 if (REG_P (SET_DEST (set))
3226 && REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
3227 && fixed_regs[REGNO (SET_DEST (set))]
3228 && general_operand (SET_SRC (set), VOIDmode))
3230 if (REG_P (SET_SRC (set))
3231 && FUNCTION_VALUE_REGNO_P (REGNO (SET_SRC (set)))
3232 && REG_P (SET_DEST (set))
3233 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
3235 /* There may be a stack pop just after the call and before the store
3236 of the return register. Search for the actual store when deciding
3237 if we can break or not. */
3238 if (SET_DEST (set) == stack_pointer_rtx)
3240 rtx i2 = next_nonnote_insn (insn);
3241 if (i2 && keep_with_call_p (i2))
3248 /* Return true if LABEL is a target of JUMP_INSN. This applies only
3249 to non-complex jumps. That is, direct unconditional, conditional,
3250 and tablejumps, but not computed jumps or returns. It also does
3251 not apply to the fallthru case of a conditional jump. */
3254 label_is_jump_target_p (rtx label, rtx jump_insn)
3256 rtx tmp = JUMP_LABEL (jump_insn);
3261 if (tablejump_p (jump_insn, NULL, &tmp))
3263 rtvec vec = XVEC (PATTERN (tmp),
3264 GET_CODE (PATTERN (tmp)) == ADDR_DIFF_VEC);
3265 int i, veclen = GET_NUM_ELEM (vec);
3267 for (i = 0; i < veclen; ++i)
3268 if (XEXP (RTVEC_ELT (vec, i), 0) == label)
3276 /* Return an estimate of the cost of computing rtx X.
3277 One use is in cse, to decide which expression to keep in the hash table.
3278 Another is in rtl generation, to pick the cheapest way to multiply.
3279 Other uses like the latter are expected in the future. */
3282 rtx_cost (rtx x, enum rtx_code outer_code ATTRIBUTE_UNUSED)
3292 /* Compute the default costs of certain things.
3293 Note that targetm.rtx_costs can override the defaults. */
3295 code = GET_CODE (x);
3299 total = COSTS_N_INSNS (5);
3305 total = COSTS_N_INSNS (7);
3308 /* Used in loop.c and combine.c as a marker. */
3312 total = COSTS_N_INSNS (1);
3321 /* If we can't tie these modes, make this expensive. The larger
3322 the mode, the more expensive it is. */
3323 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
3324 return COSTS_N_INSNS (2
3325 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
3329 if (targetm.rtx_costs (x, code, outer_code, &total))
3334 /* Sum the costs of the sub-rtx's, plus cost of this operation,
3335 which is already in total. */
3337 fmt = GET_RTX_FORMAT (code);
3338 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3340 total += rtx_cost (XEXP (x, i), code);
3341 else if (fmt[i] == 'E')
3342 for (j = 0; j < XVECLEN (x, i); j++)
3343 total += rtx_cost (XVECEXP (x, i, j), code);
3348 /* Return cost of address expression X.
3349 Expect that X is properly formed address reference. */
3352 address_cost (rtx x, enum machine_mode mode)
3354 /* We may be asked for cost of various unusual addresses, such as operands
3355 of push instruction. It is not worthwhile to complicate writing
3356 of the target hook by such cases. */
3358 if (!memory_address_p (mode, x))
3361 return targetm.address_cost (x);
3364 /* If the target doesn't override, compute the cost as with arithmetic. */
3367 default_address_cost (rtx x)
3369 return rtx_cost (x, MEM);
3373 unsigned HOST_WIDE_INT
3374 nonzero_bits (rtx x, enum machine_mode mode)
3376 return cached_nonzero_bits (x, mode, NULL_RTX, VOIDmode, 0);
3380 num_sign_bit_copies (rtx x, enum machine_mode mode)
3382 return cached_num_sign_bit_copies (x, mode, NULL_RTX, VOIDmode, 0);
3385 /* The function cached_nonzero_bits is a wrapper around nonzero_bits1.
3386 It avoids exponential behavior in nonzero_bits1 when X has
3387 identical subexpressions on the first or the second level. */
3389 static unsigned HOST_WIDE_INT
3390 cached_nonzero_bits (rtx x, enum machine_mode mode, rtx known_x,
3391 enum machine_mode known_mode,
3392 unsigned HOST_WIDE_INT known_ret)
3394 if (x == known_x && mode == known_mode)
3397 /* Try to find identical subexpressions. If found call
3398 nonzero_bits1 on X with the subexpressions as KNOWN_X and the
3399 precomputed value for the subexpression as KNOWN_RET. */
3401 if (ARITHMETIC_P (x))
3403 rtx x0 = XEXP (x, 0);
3404 rtx x1 = XEXP (x, 1);
3406 /* Check the first level. */
3408 return nonzero_bits1 (x, mode, x0, mode,
3409 cached_nonzero_bits (x0, mode, known_x,
3410 known_mode, known_ret));
3412 /* Check the second level. */
3413 if (ARITHMETIC_P (x0)
3414 && (x1 == XEXP (x0, 0) || x1 == XEXP (x0, 1)))
3415 return nonzero_bits1 (x, mode, x1, mode,
3416 cached_nonzero_bits (x1, mode, known_x,
3417 known_mode, known_ret));
3419 if (ARITHMETIC_P (x1)
3420 && (x0 == XEXP (x1, 0) || x0 == XEXP (x1, 1)))
3421 return nonzero_bits1 (x, mode, x0, mode,
3422 cached_nonzero_bits (x0, mode, known_x,
3423 known_mode, known_ret));
3426 return nonzero_bits1 (x, mode, known_x, known_mode, known_ret);
3429 /* We let num_sign_bit_copies recur into nonzero_bits as that is useful.
3430 We don't let nonzero_bits recur into num_sign_bit_copies, because that
3431 is less useful. We can't allow both, because that results in exponential
3432 run time recursion. There is a nullstone testcase that triggered
3433 this. This macro avoids accidental uses of num_sign_bit_copies. */
3434 #define cached_num_sign_bit_copies sorry_i_am_preventing_exponential_behavior
3436 /* Given an expression, X, compute which bits in X can be nonzero.
3437 We don't care about bits outside of those defined in MODE.
3439 For most X this is simply GET_MODE_MASK (GET_MODE (MODE)), but if X is
3440 an arithmetic operation, we can do better. */
3442 static unsigned HOST_WIDE_INT
3443 nonzero_bits1 (rtx x, enum machine_mode mode, rtx known_x,
3444 enum machine_mode known_mode,
3445 unsigned HOST_WIDE_INT known_ret)
3447 unsigned HOST_WIDE_INT nonzero = GET_MODE_MASK (mode);
3448 unsigned HOST_WIDE_INT inner_nz;
3450 unsigned int mode_width = GET_MODE_BITSIZE (mode);
3452 /* For floating-point values, assume all bits are needed. */
3453 if (FLOAT_MODE_P (GET_MODE (x)) || FLOAT_MODE_P (mode))
3456 /* If X is wider than MODE, use its mode instead. */
3457 if (GET_MODE_BITSIZE (GET_MODE (x)) > mode_width)
3459 mode = GET_MODE (x);
3460 nonzero = GET_MODE_MASK (mode);
3461 mode_width = GET_MODE_BITSIZE (mode);
3464 if (mode_width > HOST_BITS_PER_WIDE_INT)
3465 /* Our only callers in this case look for single bit values. So
3466 just return the mode mask. Those tests will then be false. */
3469 #ifndef WORD_REGISTER_OPERATIONS
3470 /* If MODE is wider than X, but both are a single word for both the host
3471 and target machines, we can compute this from which bits of the
3472 object might be nonzero in its own mode, taking into account the fact
3473 that on many CISC machines, accessing an object in a wider mode
3474 causes the high-order bits to become undefined. So they are
3475 not known to be zero. */
3477 if (GET_MODE (x) != VOIDmode && GET_MODE (x) != mode
3478 && GET_MODE_BITSIZE (GET_MODE (x)) <= BITS_PER_WORD
3479 && GET_MODE_BITSIZE (GET_MODE (x)) <= HOST_BITS_PER_WIDE_INT
3480 && GET_MODE_BITSIZE (mode) > GET_MODE_BITSIZE (GET_MODE (x)))
3482 nonzero &= cached_nonzero_bits (x, GET_MODE (x),
3483 known_x, known_mode, known_ret);
3484 nonzero |= GET_MODE_MASK (mode) & ~GET_MODE_MASK (GET_MODE (x));
3489 code = GET_CODE (x);
3493 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
3494 /* If pointers extend unsigned and this is a pointer in Pmode, say that
3495 all the bits above ptr_mode are known to be zero. */
3496 if (POINTERS_EXTEND_UNSIGNED && GET_MODE (x) == Pmode
3498 nonzero &= GET_MODE_MASK (ptr_mode);
3501 /* Include declared information about alignment of pointers. */
3502 /* ??? We don't properly preserve REG_POINTER changes across
3503 pointer-to-integer casts, so we can't trust it except for
3504 things that we know must be pointers. See execute/960116-1.c. */
3505 if ((x == stack_pointer_rtx
3506 || x == frame_pointer_rtx
3507 || x == arg_pointer_rtx)
3508 && REGNO_POINTER_ALIGN (REGNO (x)))
3510 unsigned HOST_WIDE_INT alignment
3511 = REGNO_POINTER_ALIGN (REGNO (x)) / BITS_PER_UNIT;
3513 #ifdef PUSH_ROUNDING
3514 /* If PUSH_ROUNDING is defined, it is possible for the
3515 stack to be momentarily aligned only to that amount,
3516 so we pick the least alignment. */
3517 if (x == stack_pointer_rtx && PUSH_ARGS)
3518 alignment = MIN ((unsigned HOST_WIDE_INT) PUSH_ROUNDING (1),
3522 nonzero &= ~(alignment - 1);
3526 unsigned HOST_WIDE_INT nonzero_for_hook = nonzero;
3527 rtx new = rtl_hooks.reg_nonzero_bits (x, mode, known_x,
3528 known_mode, known_ret,
3532 nonzero_for_hook &= cached_nonzero_bits (new, mode, known_x,
3533 known_mode, known_ret);
3535 return nonzero_for_hook;
3539 #ifdef SHORT_IMMEDIATES_SIGN_EXTEND
3540 /* If X is negative in MODE, sign-extend the value. */
3541 if (INTVAL (x) > 0 && mode_width < BITS_PER_WORD
3542 && 0 != (INTVAL (x) & ((HOST_WIDE_INT) 1 << (mode_width - 1))))
3543 return (INTVAL (x) | ((HOST_WIDE_INT) (-1) << mode_width));
3549 #ifdef LOAD_EXTEND_OP
3550 /* In many, if not most, RISC machines, reading a byte from memory
3551 zeros the rest of the register. Noticing that fact saves a lot
3552 of extra zero-extends. */
3553 if (LOAD_EXTEND_OP (GET_MODE (x)) == ZERO_EXTEND)
3554 nonzero &= GET_MODE_MASK (GET_MODE (x));
3559 case UNEQ: case LTGT:
3560 case GT: case GTU: case UNGT:
3561 case LT: case LTU: case UNLT:
3562 case GE: case GEU: case UNGE:
3563 case LE: case LEU: case UNLE:
3564 case UNORDERED: case ORDERED:
3566 /* If this produces an integer result, we know which bits are set.
3567 Code here used to clear bits outside the mode of X, but that is
3570 if (GET_MODE_CLASS (mode) == MODE_INT
3571 && mode_width <= HOST_BITS_PER_WIDE_INT)
3572 nonzero = STORE_FLAG_VALUE;
3577 /* Disabled to avoid exponential mutual recursion between nonzero_bits
3578 and num_sign_bit_copies. */
3579 if (num_sign_bit_copies (XEXP (x, 0), GET_MODE (x))
3580 == GET_MODE_BITSIZE (GET_MODE (x)))
3584 if (GET_MODE_SIZE (GET_MODE (x)) < mode_width)
3585 nonzero |= (GET_MODE_MASK (mode) & ~GET_MODE_MASK (GET_MODE (x)));
3590 /* Disabled to avoid exponential mutual recursion between nonzero_bits
3591 and num_sign_bit_copies. */
3592 if (num_sign_bit_copies (XEXP (x, 0), GET_MODE (x))
3593 == GET_MODE_BITSIZE (GET_MODE (x)))
3599 nonzero &= (cached_nonzero_bits (XEXP (x, 0), mode,
3600 known_x, known_mode, known_ret)
3601 & GET_MODE_MASK (mode));
3605 nonzero &= cached_nonzero_bits (XEXP (x, 0), mode,
3606 known_x, known_mode, known_ret);
3607 if (GET_MODE (XEXP (x, 0)) != VOIDmode)
3608 nonzero &= GET_MODE_MASK (GET_MODE (XEXP (x, 0)));
3612 /* If the sign bit is known clear, this is the same as ZERO_EXTEND.
3613 Otherwise, show all the bits in the outer mode but not the inner
3615 inner_nz = cached_nonzero_bits (XEXP (x, 0), mode,
3616 known_x, known_mode, known_ret);
3617 if (GET_MODE (XEXP (x, 0)) != VOIDmode)
3619 inner_nz &= GET_MODE_MASK (GET_MODE (XEXP (x, 0)));
3621 & (((HOST_WIDE_INT) 1
3622 << (GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0))) - 1))))
3623 inner_nz |= (GET_MODE_MASK (mode)
3624 & ~GET_MODE_MASK (GET_MODE (XEXP (x, 0))));
3627 nonzero &= inner_nz;
3631 nonzero &= cached_nonzero_bits (XEXP (x, 0), mode,
3632 known_x, known_mode, known_ret)
3633 & cached_nonzero_bits (XEXP (x, 1), mode,
3634 known_x, known_mode, known_ret);
3638 case UMIN: case UMAX: case SMIN: case SMAX:
3640 unsigned HOST_WIDE_INT nonzero0 =
3641 cached_nonzero_bits (XEXP (x, 0), mode,
3642 known_x, known_mode, known_ret);
3644 /* Don't call nonzero_bits for the second time if it cannot change
3646 if ((nonzero & nonzero0) != nonzero)
3648 | cached_nonzero_bits (XEXP (x, 1), mode,
3649 known_x, known_mode, known_ret);
3653 case PLUS: case MINUS:
3655 case DIV: case UDIV:
3656 case MOD: case UMOD:
3657 /* We can apply the rules of arithmetic to compute the number of
3658 high- and low-order zero bits of these operations. We start by
3659 computing the width (position of the highest-order nonzero bit)
3660 and the number of low-order zero bits for each value. */
3662 unsigned HOST_WIDE_INT nz0 =
3663 cached_nonzero_bits (XEXP (x, 0), mode,
3664 known_x, known_mode, known_ret);
3665 unsigned HOST_WIDE_INT nz1 =
3666 cached_nonzero_bits (XEXP (x, 1), mode,
3667 known_x, known_mode, known_ret);
3668 int sign_index = GET_MODE_BITSIZE (GET_MODE (x)) - 1;
3669 int width0 = floor_log2 (nz0) + 1;
3670 int width1 = floor_log2 (nz1) + 1;
3671 int low0 = floor_log2 (nz0 & -nz0);
3672 int low1 = floor_log2 (nz1 & -nz1);
3673 HOST_WIDE_INT op0_maybe_minusp
3674 = (nz0 & ((HOST_WIDE_INT) 1 << sign_index));
3675 HOST_WIDE_INT op1_maybe_minusp
3676 = (nz1 & ((HOST_WIDE_INT) 1 << sign_index));
3677 unsigned int result_width = mode_width;
3683 result_width = MAX (width0, width1) + 1;
3684 result_low = MIN (low0, low1);
3687 result_low = MIN (low0, low1);
3690 result_width = width0 + width1;
3691 result_low = low0 + low1;
3696 if (! op0_maybe_minusp && ! op1_maybe_minusp)
3697 result_width = width0;
3702 result_width = width0;
3707 if (! op0_maybe_minusp && ! op1_maybe_minusp)
3708 result_width = MIN (width0, width1);
3709 result_low = MIN (low0, low1);
3714 result_width = MIN (width0, width1);
3715 result_low = MIN (low0, low1);
3721 if (result_width < mode_width)
3722 nonzero &= ((HOST_WIDE_INT) 1 << result_width) - 1;
3725 nonzero &= ~(((HOST_WIDE_INT) 1 << result_low) - 1);
3727 #ifdef POINTERS_EXTEND_UNSIGNED
3728 /* If pointers extend unsigned and this is an addition or subtraction
3729 to a pointer in Pmode, all the bits above ptr_mode are known to be
3731 if (POINTERS_EXTEND_UNSIGNED > 0 && GET_MODE (x) == Pmode
3732 && (code == PLUS || code == MINUS)
3733 && REG_P (XEXP (x, 0)) && REG_POINTER (XEXP (x, 0)))
3734 nonzero &= GET_MODE_MASK (ptr_mode);
3740 if (GET_CODE (XEXP (x, 1)) == CONST_INT
3741 && INTVAL (XEXP (x, 1)) < HOST_BITS_PER_WIDE_INT)
3742 nonzero &= ((HOST_WIDE_INT) 1 << INTVAL (XEXP (x, 1))) - 1;
3746 /* If this is a SUBREG formed for a promoted variable that has
3747 been zero-extended, we know that at least the high-order bits
3748 are zero, though others might be too. */
3750 if (SUBREG_PROMOTED_VAR_P (x) && SUBREG_PROMOTED_UNSIGNED_P (x) > 0)
3751 nonzero = GET_MODE_MASK (GET_MODE (x))
3752 & cached_nonzero_bits (SUBREG_REG (x), GET_MODE (x),
3753 known_x, known_mode, known_ret);
3755 /* If the inner mode is a single word for both the host and target
3756 machines, we can compute this from which bits of the inner
3757 object might be nonzero. */
3758 if (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) <= BITS_PER_WORD
3759 && (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
3760 <= HOST_BITS_PER_WIDE_INT))
3762 nonzero &= cached_nonzero_bits (SUBREG_REG (x), mode,
3763 known_x, known_mode, known_ret);
3765 #if defined (WORD_REGISTER_OPERATIONS) && defined (LOAD_EXTEND_OP)
3766 /* If this is a typical RISC machine, we only have to worry
3767 about the way loads are extended. */
3768 if ((LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x))) == SIGN_EXTEND
3770 & (((unsigned HOST_WIDE_INT) 1
3771 << (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) - 1))))
3773 : LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x))) != ZERO_EXTEND)
3774 || !MEM_P (SUBREG_REG (x)))
3777 /* On many CISC machines, accessing an object in a wider mode
3778 causes the high-order bits to become undefined. So they are
3779 not known to be zero. */
3780 if (GET_MODE_SIZE (GET_MODE (x))
3781 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3782 nonzero |= (GET_MODE_MASK (GET_MODE (x))
3783 & ~GET_MODE_MASK (GET_MODE (SUBREG_REG (x))));
3792 /* The nonzero bits are in two classes: any bits within MODE
3793 that aren't in GET_MODE (x) are always significant. The rest of the
3794 nonzero bits are those that are significant in the operand of
3795 the shift when shifted the appropriate number of bits. This
3796 shows that high-order bits are cleared by the right shift and
3797 low-order bits by left shifts. */
3798 if (GET_CODE (XEXP (x, 1)) == CONST_INT
3799 && INTVAL (XEXP (x, 1)) >= 0
3800 && INTVAL (XEXP (x, 1)) < HOST_BITS_PER_WIDE_INT)
3802 enum machine_mode inner_mode = GET_MODE (x);
3803 unsigned int width = GET_MODE_BITSIZE (inner_mode);
3804 int count = INTVAL (XEXP (x, 1));
3805 unsigned HOST_WIDE_INT mode_mask = GET_MODE_MASK (inner_mode);
3806 unsigned HOST_WIDE_INT op_nonzero =
3807 cached_nonzero_bits (XEXP (x, 0), mode,
3808 known_x, known_mode, known_ret);
3809 unsigned HOST_WIDE_INT inner = op_nonzero & mode_mask;
3810 unsigned HOST_WIDE_INT outer = 0;
3812 if (mode_width > width)
3813 outer = (op_nonzero & nonzero & ~mode_mask);
3815 if (code == LSHIFTRT)
3817 else if (code == ASHIFTRT)
3821 /* If the sign bit may have been nonzero before the shift, we
3822 need to mark all the places it could have been copied to
3823 by the shift as possibly nonzero. */
3824 if (inner & ((HOST_WIDE_INT) 1 << (width - 1 - count)))
3825 inner |= (((HOST_WIDE_INT) 1 << count) - 1) << (width - count);
3827 else if (code == ASHIFT)
3830 inner = ((inner << (count % width)
3831 | (inner >> (width - (count % width)))) & mode_mask);
3833 nonzero &= (outer | inner);
3839 /* This is at most the number of bits in the mode. */
3840 nonzero = ((HOST_WIDE_INT) 2 << (floor_log2 (mode_width))) - 1;
3844 /* If CLZ has a known value at zero, then the nonzero bits are
3845 that value, plus the number of bits in the mode minus one. */
3846 if (CLZ_DEFINED_VALUE_AT_ZERO (mode, nonzero))
3847 nonzero |= ((HOST_WIDE_INT) 1 << (floor_log2 (mode_width))) - 1;
3853 /* If CTZ has a known value at zero, then the nonzero bits are
3854 that value, plus the number of bits in the mode minus one. */
3855 if (CTZ_DEFINED_VALUE_AT_ZERO (mode, nonzero))
3856 nonzero |= ((HOST_WIDE_INT) 1 << (floor_log2 (mode_width))) - 1;
3867 unsigned HOST_WIDE_INT nonzero_true =
3868 cached_nonzero_bits (XEXP (x, 1), mode,
3869 known_x, known_mode, known_ret);
3871 /* Don't call nonzero_bits for the second time if it cannot change
3873 if ((nonzero & nonzero_true) != nonzero)
3874 nonzero &= nonzero_true
3875 | cached_nonzero_bits (XEXP (x, 2), mode,
3876 known_x, known_mode, known_ret);
3887 /* See the macro definition above. */
3888 #undef cached_num_sign_bit_copies
3891 /* The function cached_num_sign_bit_copies is a wrapper around
3892 num_sign_bit_copies1. It avoids exponential behavior in
3893 num_sign_bit_copies1 when X has identical subexpressions on the
3894 first or the second level. */
3897 cached_num_sign_bit_copies (rtx x, enum machine_mode mode, rtx known_x,
3898 enum machine_mode known_mode,
3899 unsigned int known_ret)
3901 if (x == known_x && mode == known_mode)
3904 /* Try to find identical subexpressions. If found call
3905 num_sign_bit_copies1 on X with the subexpressions as KNOWN_X and
3906 the precomputed value for the subexpression as KNOWN_RET. */
3908 if (ARITHMETIC_P (x))
3910 rtx x0 = XEXP (x, 0);
3911 rtx x1 = XEXP (x, 1);
3913 /* Check the first level. */
3916 num_sign_bit_copies1 (x, mode, x0, mode,
3917 cached_num_sign_bit_copies (x0, mode, known_x,
3921 /* Check the second level. */
3922 if (ARITHMETIC_P (x0)
3923 && (x1 == XEXP (x0, 0) || x1 == XEXP (x0, 1)))
3925 num_sign_bit_copies1 (x, mode, x1, mode,
3926 cached_num_sign_bit_copies (x1, mode, known_x,
3930 if (ARITHMETIC_P (x1)
3931 && (x0 == XEXP (x1, 0) || x0 == XEXP (x1, 1)))
3933 num_sign_bit_copies1 (x, mode, x0, mode,
3934 cached_num_sign_bit_copies (x0, mode, known_x,
3939 return num_sign_bit_copies1 (x, mode, known_x, known_mode, known_ret);
3942 /* Return the number of bits at the high-order end of X that are known to
3943 be equal to the sign bit. X will be used in mode MODE; if MODE is
3944 VOIDmode, X will be used in its own mode. The returned value will always
3945 be between 1 and the number of bits in MODE. */
3948 num_sign_bit_copies1 (rtx x, enum machine_mode mode, rtx known_x,
3949 enum machine_mode known_mode,
3950 unsigned int known_ret)
3952 enum rtx_code code = GET_CODE (x);
3953 unsigned int bitwidth = GET_MODE_BITSIZE (mode);
3954 int num0, num1, result;
3955 unsigned HOST_WIDE_INT nonzero;
3957 /* If we weren't given a mode, use the mode of X. If the mode is still
3958 VOIDmode, we don't know anything. Likewise if one of the modes is
3961 if (mode == VOIDmode)
3962 mode = GET_MODE (x);
3964 if (mode == VOIDmode || FLOAT_MODE_P (mode) || FLOAT_MODE_P (GET_MODE (x)))
3967 /* For a smaller object, just ignore the high bits. */
3968 if (bitwidth < GET_MODE_BITSIZE (GET_MODE (x)))
3970 num0 = cached_num_sign_bit_copies (x, GET_MODE (x),
3971 known_x, known_mode, known_ret);
3973 num0 - (int) (GET_MODE_BITSIZE (GET_MODE (x)) - bitwidth));
3976 if (GET_MODE (x) != VOIDmode && bitwidth > GET_MODE_BITSIZE (GET_MODE (x)))
3978 #ifndef WORD_REGISTER_OPERATIONS
3979 /* If this machine does not do all register operations on the entire
3980 register and MODE is wider than the mode of X, we can say nothing
3981 at all about the high-order bits. */
3984 /* Likewise on machines that do, if the mode of the object is smaller
3985 than a word and loads of that size don't sign extend, we can say
3986 nothing about the high order bits. */
3987 if (GET_MODE_BITSIZE (GET_MODE (x)) < BITS_PER_WORD
3988 #ifdef LOAD_EXTEND_OP
3989 && LOAD_EXTEND_OP (GET_MODE (x)) != SIGN_EXTEND
4000 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
4001 /* If pointers extend signed and this is a pointer in Pmode, say that
4002 all the bits above ptr_mode are known to be sign bit copies. */
4003 if (! POINTERS_EXTEND_UNSIGNED && GET_MODE (x) == Pmode && mode == Pmode
4005 return GET_MODE_BITSIZE (Pmode) - GET_MODE_BITSIZE (ptr_mode) + 1;
4009 unsigned int copies_for_hook = 1, copies = 1;
4010 rtx new = rtl_hooks.reg_num_sign_bit_copies (x, mode, known_x,
4011 known_mode, known_ret,
4015 copies = cached_num_sign_bit_copies (new, mode, known_x,
4016 known_mode, known_ret);
4018 if (copies > 1 || copies_for_hook > 1)
4019 return MAX (copies, copies_for_hook);
4021 /* Else, use nonzero_bits to guess num_sign_bit_copies (see below). */
4026 #ifdef LOAD_EXTEND_OP
4027 /* Some RISC machines sign-extend all loads of smaller than a word. */
4028 if (LOAD_EXTEND_OP (GET_MODE (x)) == SIGN_EXTEND)
4029 return MAX (1, ((int) bitwidth
4030 - (int) GET_MODE_BITSIZE (GET_MODE (x)) + 1));
4035 /* If the constant is negative, take its 1's complement and remask.
4036 Then see how many zero bits we have. */
4037 nonzero = INTVAL (x) & GET_MODE_MASK (mode);
4038 if (bitwidth <= HOST_BITS_PER_WIDE_INT
4039 && (nonzero & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0)
4040 nonzero = (~nonzero) & GET_MODE_MASK (mode);
4042 return (nonzero == 0 ? bitwidth : bitwidth - floor_log2 (nonzero) - 1);
4045 /* If this is a SUBREG for a promoted object that is sign-extended
4046 and we are looking at it in a wider mode, we know that at least the
4047 high-order bits are known to be sign bit copies. */
4049 if (SUBREG_PROMOTED_VAR_P (x) && ! SUBREG_PROMOTED_UNSIGNED_P (x))
4051 num0 = cached_num_sign_bit_copies (SUBREG_REG (x), mode,
4052 known_x, known_mode, known_ret);
4053 return MAX ((int) bitwidth
4054 - (int) GET_MODE_BITSIZE (GET_MODE (x)) + 1,
4058 /* For a smaller object, just ignore the high bits. */
4059 if (bitwidth <= GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))))
4061 num0 = cached_num_sign_bit_copies (SUBREG_REG (x), VOIDmode,
4062 known_x, known_mode, known_ret);
4063 return MAX (1, (num0
4064 - (int) (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4068 #ifdef WORD_REGISTER_OPERATIONS
4069 #ifdef LOAD_EXTEND_OP
4070 /* For paradoxical SUBREGs on machines where all register operations
4071 affect the entire register, just look inside. Note that we are
4072 passing MODE to the recursive call, so the number of sign bit copies
4073 will remain relative to that mode, not the inner mode. */
4075 /* This works only if loads sign extend. Otherwise, if we get a
4076 reload for the inner part, it may be loaded from the stack, and
4077 then we lose all sign bit copies that existed before the store
4080 if ((GET_MODE_SIZE (GET_MODE (x))
4081 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4082 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x))) == SIGN_EXTEND
4083 && MEM_P (SUBREG_REG (x)))
4084 return cached_num_sign_bit_copies (SUBREG_REG (x), mode,
4085 known_x, known_mode, known_ret);
4091 if (GET_CODE (XEXP (x, 1)) == CONST_INT)
4092 return MAX (1, (int) bitwidth - INTVAL (XEXP (x, 1)));
4096 return (bitwidth - GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0)))
4097 + cached_num_sign_bit_copies (XEXP (x, 0), VOIDmode,
4098 known_x, known_mode, known_ret));
4101 /* For a smaller object, just ignore the high bits. */
4102 num0 = cached_num_sign_bit_copies (XEXP (x, 0), VOIDmode,
4103 known_x, known_mode, known_ret);
4104 return MAX (1, (num0 - (int) (GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0)))
4108 return cached_num_sign_bit_copies (XEXP (x, 0), mode,
4109 known_x, known_mode, known_ret);
4111 case ROTATE: case ROTATERT:
4112 /* If we are rotating left by a number of bits less than the number
4113 of sign bit copies, we can just subtract that amount from the
4115 if (GET_CODE (XEXP (x, 1)) == CONST_INT
4116 && INTVAL (XEXP (x, 1)) >= 0
4117 && INTVAL (XEXP (x, 1)) < (int) bitwidth)
4119 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4120 known_x, known_mode, known_ret);
4121 return MAX (1, num0 - (code == ROTATE ? INTVAL (XEXP (x, 1))
4122 : (int) bitwidth - INTVAL (XEXP (x, 1))));
4127 /* In general, this subtracts one sign bit copy. But if the value
4128 is known to be positive, the number of sign bit copies is the
4129 same as that of the input. Finally, if the input has just one bit
4130 that might be nonzero, all the bits are copies of the sign bit. */
4131 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4132 known_x, known_mode, known_ret);
4133 if (bitwidth > HOST_BITS_PER_WIDE_INT)
4134 return num0 > 1 ? num0 - 1 : 1;
4136 nonzero = nonzero_bits (XEXP (x, 0), mode);
4141 && (((HOST_WIDE_INT) 1 << (bitwidth - 1)) & nonzero))
4146 case IOR: case AND: case XOR:
4147 case SMIN: case SMAX: case UMIN: case UMAX:
4148 /* Logical operations will preserve the number of sign-bit copies.
4149 MIN and MAX operations always return one of the operands. */
4150 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4151 known_x, known_mode, known_ret);
4152 num1 = cached_num_sign_bit_copies (XEXP (x, 1), mode,
4153 known_x, known_mode, known_ret);
4154 return MIN (num0, num1);
4156 case PLUS: case MINUS:
4157 /* For addition and subtraction, we can have a 1-bit carry. However,
4158 if we are subtracting 1 from a positive number, there will not
4159 be such a carry. Furthermore, if the positive number is known to
4160 be 0 or 1, we know the result is either -1 or 0. */
4162 if (code == PLUS && XEXP (x, 1) == constm1_rtx
4163 && bitwidth <= HOST_BITS_PER_WIDE_INT)
4165 nonzero = nonzero_bits (XEXP (x, 0), mode);
4166 if ((((HOST_WIDE_INT) 1 << (bitwidth - 1)) & nonzero) == 0)
4167 return (nonzero == 1 || nonzero == 0 ? bitwidth
4168 : bitwidth - floor_log2 (nonzero) - 1);
4171 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4172 known_x, known_mode, known_ret);
4173 num1 = cached_num_sign_bit_copies (XEXP (x, 1), mode,
4174 known_x, known_mode, known_ret);
4175 result = MAX (1, MIN (num0, num1) - 1);
4177 #ifdef POINTERS_EXTEND_UNSIGNED
4178 /* If pointers extend signed and this is an addition or subtraction
4179 to a pointer in Pmode, all the bits above ptr_mode are known to be
4181 if (! POINTERS_EXTEND_UNSIGNED && GET_MODE (x) == Pmode
4182 && (code == PLUS || code == MINUS)
4183 && REG_P (XEXP (x, 0)) && REG_POINTER (XEXP (x, 0)))
4184 result = MAX ((int) (GET_MODE_BITSIZE (Pmode)
4185 - GET_MODE_BITSIZE (ptr_mode) + 1),
4191 /* The number of bits of the product is the sum of the number of
4192 bits of both terms. However, unless one of the terms if known
4193 to be positive, we must allow for an additional bit since negating
4194 a negative number can remove one sign bit copy. */
4196 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4197 known_x, known_mode, known_ret);
4198 num1 = cached_num_sign_bit_copies (XEXP (x, 1), mode,
4199 known_x, known_mode, known_ret);
4201 result = bitwidth - (bitwidth - num0) - (bitwidth - num1);
4203 && (bitwidth > HOST_BITS_PER_WIDE_INT
4204 || (((nonzero_bits (XEXP (x, 0), mode)
4205 & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0)
4206 && ((nonzero_bits (XEXP (x, 1), mode)
4207 & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0))))
4210 return MAX (1, result);
4213 /* The result must be <= the first operand. If the first operand
4214 has the high bit set, we know nothing about the number of sign
4216 if (bitwidth > HOST_BITS_PER_WIDE_INT)
4218 else if ((nonzero_bits (XEXP (x, 0), mode)
4219 & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0)
4222 return cached_num_sign_bit_copies (XEXP (x, 0), mode,
4223 known_x, known_mode, known_ret);
4226 /* The result must be <= the second operand. */
4227 return cached_num_sign_bit_copies (XEXP (x, 1), mode,
4228 known_x, known_mode, known_ret);
4231 /* Similar to unsigned division, except that we have to worry about
4232 the case where the divisor is negative, in which case we have
4234 result = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4235 known_x, known_mode, known_ret);
4237 && (bitwidth > HOST_BITS_PER_WIDE_INT
4238 || (nonzero_bits (XEXP (x, 1), mode)
4239 & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0))
4245 result = cached_num_sign_bit_copies (XEXP (x, 1), mode,
4246 known_x, known_mode, known_ret);
4248 && (bitwidth > HOST_BITS_PER_WIDE_INT
4249 || (nonzero_bits (XEXP (x, 1), mode)
4250 & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0))
4256 /* Shifts by a constant add to the number of bits equal to the
4258 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4259 known_x, known_mode, known_ret);
4260 if (GET_CODE (XEXP (x, 1)) == CONST_INT
4261 && INTVAL (XEXP (x, 1)) > 0)
4262 num0 = MIN ((int) bitwidth, num0 + INTVAL (XEXP (x, 1)));
4267 /* Left shifts destroy copies. */
4268 if (GET_CODE (XEXP (x, 1)) != CONST_INT
4269 || INTVAL (XEXP (x, 1)) < 0
4270 || INTVAL (XEXP (x, 1)) >= (int) bitwidth)
4273 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4274 known_x, known_mode, known_ret);
4275 return MAX (1, num0 - INTVAL (XEXP (x, 1)));
4278 num0 = cached_num_sign_bit_copies (XEXP (x, 1), mode,
4279 known_x, known_mode, known_ret);
4280 num1 = cached_num_sign_bit_copies (XEXP (x, 2), mode,
4281 known_x, known_mode, known_ret);
4282 return MIN (num0, num1);
4284 case EQ: case NE: case GE: case GT: case LE: case LT:
4285 case UNEQ: case LTGT: case UNGE: case UNGT: case UNLE: case UNLT:
4286 case GEU: case GTU: case LEU: case LTU:
4287 case UNORDERED: case ORDERED:
4288 /* If the constant is negative, take its 1's complement and remask.
4289 Then see how many zero bits we have. */
4290 nonzero = STORE_FLAG_VALUE;
4291 if (bitwidth <= HOST_BITS_PER_WIDE_INT
4292 && (nonzero & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0)
4293 nonzero = (~nonzero) & GET_MODE_MASK (mode);
4295 return (nonzero == 0 ? bitwidth : bitwidth - floor_log2 (nonzero) - 1);
4301 /* If we haven't been able to figure it out by one of the above rules,
4302 see if some of the high-order bits are known to be zero. If so,
4303 count those bits and return one less than that amount. If we can't
4304 safely compute the mask for this mode, always return BITWIDTH. */
4306 bitwidth = GET_MODE_BITSIZE (mode);
4307 if (bitwidth > HOST_BITS_PER_WIDE_INT)
4310 nonzero = nonzero_bits (x, mode);
4311 return nonzero & ((HOST_WIDE_INT) 1 << (bitwidth - 1))
4312 ? 1 : bitwidth - floor_log2 (nonzero) - 1;
4315 /* Calculate the rtx_cost of a single instruction. A return value of
4316 zero indicates an instruction pattern without a known cost. */
4319 insn_rtx_cost (rtx pat)
4324 /* Extract the single set rtx from the instruction pattern.
4325 We can't use single_set since we only have the pattern. */
4326 if (GET_CODE (pat) == SET)
4328 else if (GET_CODE (pat) == PARALLEL)
4331 for (i = 0; i < XVECLEN (pat, 0); i++)
4333 rtx x = XVECEXP (pat, 0, i);
4334 if (GET_CODE (x) == SET)
4347 cost = rtx_cost (SET_SRC (set), SET);
4348 return cost > 0 ? cost : COSTS_N_INSNS (1);
4351 /* Given an insn INSN and condition COND, return the condition in a
4352 canonical form to simplify testing by callers. Specifically:
4354 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
4355 (2) Both operands will be machine operands; (cc0) will have been replaced.
4356 (3) If an operand is a constant, it will be the second operand.
4357 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
4358 for GE, GEU, and LEU.
4360 If the condition cannot be understood, or is an inequality floating-point
4361 comparison which needs to be reversed, 0 will be returned.
4363 If REVERSE is nonzero, then reverse the condition prior to canonizing it.
4365 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4366 insn used in locating the condition was found. If a replacement test
4367 of the condition is desired, it should be placed in front of that
4368 insn and we will be sure that the inputs are still valid.
4370 If WANT_REG is nonzero, we wish the condition to be relative to that
4371 register, if possible. Therefore, do not canonicalize the condition
4372 further. If ALLOW_CC_MODE is nonzero, allow the condition returned
4373 to be a compare to a CC mode register.
4375 If VALID_AT_INSN_P, the condition must be valid at both *EARLIEST
4379 canonicalize_condition (rtx insn, rtx cond, int reverse, rtx *earliest,
4380 rtx want_reg, int allow_cc_mode, int valid_at_insn_p)
4387 int reverse_code = 0;
4388 enum machine_mode mode;
4390 code = GET_CODE (cond);
4391 mode = GET_MODE (cond);
4392 op0 = XEXP (cond, 0);
4393 op1 = XEXP (cond, 1);
4396 code = reversed_comparison_code (cond, insn);
4397 if (code == UNKNOWN)
4403 /* If we are comparing a register with zero, see if the register is set
4404 in the previous insn to a COMPARE or a comparison operation. Perform
4405 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
4408 while ((GET_RTX_CLASS (code) == RTX_COMPARE
4409 || GET_RTX_CLASS (code) == RTX_COMM_COMPARE)
4410 && op1 == CONST0_RTX (GET_MODE (op0))
4413 /* Set nonzero when we find something of interest. */
4417 /* If comparison with cc0, import actual comparison from compare
4421 if ((prev = prev_nonnote_insn (prev)) == 0
4422 || !NONJUMP_INSN_P (prev)
4423 || (set = single_set (prev)) == 0
4424 || SET_DEST (set) != cc0_rtx)
4427 op0 = SET_SRC (set);
4428 op1 = CONST0_RTX (GET_MODE (op0));
4434 /* If this is a COMPARE, pick up the two things being compared. */
4435 if (GET_CODE (op0) == COMPARE)
4437 op1 = XEXP (op0, 1);
4438 op0 = XEXP (op0, 0);
4441 else if (!REG_P (op0))
4444 /* Go back to the previous insn. Stop if it is not an INSN. We also
4445 stop if it isn't a single set or if it has a REG_INC note because
4446 we don't want to bother dealing with it. */
4448 if ((prev = prev_nonnote_insn (prev)) == 0
4449 || !NONJUMP_INSN_P (prev)
4450 || FIND_REG_INC_NOTE (prev, NULL_RTX))
4453 set = set_of (op0, prev);
4456 && (GET_CODE (set) != SET
4457 || !rtx_equal_p (SET_DEST (set), op0)))
4460 /* If this is setting OP0, get what it sets it to if it looks
4464 enum machine_mode inner_mode = GET_MODE (SET_DEST (set));
4465 #ifdef FLOAT_STORE_FLAG_VALUE
4466 REAL_VALUE_TYPE fsfv;
4469 /* ??? We may not combine comparisons done in a CCmode with
4470 comparisons not done in a CCmode. This is to aid targets
4471 like Alpha that have an IEEE compliant EQ instruction, and
4472 a non-IEEE compliant BEQ instruction. The use of CCmode is
4473 actually artificial, simply to prevent the combination, but
4474 should not affect other platforms.
4476 However, we must allow VOIDmode comparisons to match either
4477 CCmode or non-CCmode comparison, because some ports have
4478 modeless comparisons inside branch patterns.
4480 ??? This mode check should perhaps look more like the mode check
4481 in simplify_comparison in combine. */
4483 if ((GET_CODE (SET_SRC (set)) == COMPARE
4486 && GET_MODE_CLASS (inner_mode) == MODE_INT
4487 && (GET_MODE_BITSIZE (inner_mode)
4488 <= HOST_BITS_PER_WIDE_INT)
4489 && (STORE_FLAG_VALUE
4490 & ((HOST_WIDE_INT) 1
4491 << (GET_MODE_BITSIZE (inner_mode) - 1))))
4492 #ifdef FLOAT_STORE_FLAG_VALUE
4494 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
4495 && (fsfv = FLOAT_STORE_FLAG_VALUE (inner_mode),
4496 REAL_VALUE_NEGATIVE (fsfv)))
4499 && COMPARISON_P (SET_SRC (set))))
4500 && (((GET_MODE_CLASS (mode) == MODE_CC)
4501 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
4502 || mode == VOIDmode || inner_mode == VOIDmode))
4504 else if (((code == EQ
4506 && (GET_MODE_BITSIZE (inner_mode)
4507 <= HOST_BITS_PER_WIDE_INT)
4508 && GET_MODE_CLASS (inner_mode) == MODE_INT
4509 && (STORE_FLAG_VALUE
4510 & ((HOST_WIDE_INT) 1
4511 << (GET_MODE_BITSIZE (inner_mode) - 1))))
4512 #ifdef FLOAT_STORE_FLAG_VALUE
4514 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
4515 && (fsfv = FLOAT_STORE_FLAG_VALUE (inner_mode),
4516 REAL_VALUE_NEGATIVE (fsfv)))
4519 && COMPARISON_P (SET_SRC (set))
4520 && (((GET_MODE_CLASS (mode) == MODE_CC)
4521 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
4522 || mode == VOIDmode || inner_mode == VOIDmode))
4532 else if (reg_set_p (op0, prev))
4533 /* If this sets OP0, but not directly, we have to give up. */
4538 /* If the caller is expecting the condition to be valid at INSN,
4539 make sure X doesn't change before INSN. */
4540 if (valid_at_insn_p)
4541 if (modified_in_p (x, prev) || modified_between_p (x, prev, insn))
4543 if (COMPARISON_P (x))
4544 code = GET_CODE (x);
4547 code = reversed_comparison_code (x, prev);
4548 if (code == UNKNOWN)
4553 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
4559 /* If constant is first, put it last. */
4560 if (CONSTANT_P (op0))
4561 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
4563 /* If OP0 is the result of a comparison, we weren't able to find what
4564 was really being compared, so fail. */
4566 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
4569 /* Canonicalize any ordered comparison with integers involving equality
4570 if we can do computations in the relevant mode and we do not
4573 if (GET_MODE_CLASS (GET_MODE (op0)) != MODE_CC
4574 && GET_CODE (op1) == CONST_INT
4575 && GET_MODE (op0) != VOIDmode
4576 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
4578 HOST_WIDE_INT const_val = INTVAL (op1);
4579 unsigned HOST_WIDE_INT uconst_val = const_val;
4580 unsigned HOST_WIDE_INT max_val
4581 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
4586 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
4587 code = LT, op1 = gen_int_mode (const_val + 1, GET_MODE (op0));
4590 /* When cross-compiling, const_val might be sign-extended from
4591 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
4593 if ((HOST_WIDE_INT) (const_val & max_val)
4594 != (((HOST_WIDE_INT) 1
4595 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
4596 code = GT, op1 = gen_int_mode (const_val - 1, GET_MODE (op0));
4600 if (uconst_val < max_val)
4601 code = LTU, op1 = gen_int_mode (uconst_val + 1, GET_MODE (op0));
4605 if (uconst_val != 0)
4606 code = GTU, op1 = gen_int_mode (uconst_val - 1, GET_MODE (op0));
4614 /* Never return CC0; return zero instead. */
4618 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
4621 /* Given a jump insn JUMP, return the condition that will cause it to branch
4622 to its JUMP_LABEL. If the condition cannot be understood, or is an
4623 inequality floating-point comparison which needs to be reversed, 0 will
4626 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4627 insn used in locating the condition was found. If a replacement test
4628 of the condition is desired, it should be placed in front of that
4629 insn and we will be sure that the inputs are still valid. If EARLIEST
4630 is null, the returned condition will be valid at INSN.
4632 If ALLOW_CC_MODE is nonzero, allow the condition returned to be a
4633 compare CC mode register.
4635 VALID_AT_INSN_P is the same as for canonicalize_condition. */
4638 get_condition (rtx jump, rtx *earliest, int allow_cc_mode, int valid_at_insn_p)
4644 /* If this is not a standard conditional jump, we can't parse it. */
4646 || ! any_condjump_p (jump))
4648 set = pc_set (jump);
4650 cond = XEXP (SET_SRC (set), 0);
4652 /* If this branches to JUMP_LABEL when the condition is false, reverse
4655 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
4656 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump);
4658 return canonicalize_condition (jump, cond, reverse, earliest, NULL_RTX,
4659 allow_cc_mode, valid_at_insn_p);