1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
4 Hacked by Michael Tiemann (tiemann@cygnus.com).
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
23 /* Instruction reorganization pass.
25 This pass runs after register allocation and final jump
26 optimization. It should be the last pass to run before peephole.
27 It serves primarily to fill delay slots of insns, typically branch
28 and call insns. Other insns typically involve more complicated
29 interactions of data dependencies and resource constraints, and
30 are better handled by scheduling before register allocation (by the
31 function `schedule_insns').
33 The Branch Penalty is the number of extra cycles that are needed to
34 execute a branch insn. On an ideal machine, branches take a single
35 cycle, and the Branch Penalty is 0. Several RISC machines approach
36 branch delays differently:
38 The MIPS and AMD 29000 have a single branch delay slot. Most insns
39 (except other branches) can be used to fill this slot. When the
40 slot is filled, two insns execute in two cycles, reducing the
41 branch penalty to zero.
43 The Motorola 88000 conditionally exposes its branch delay slot,
44 so code is shorter when it is turned off, but will run faster
45 when useful insns are scheduled there.
47 The IBM ROMP has two forms of branch and call insns, both with and
48 without a delay slot. Much like the 88k, insns not using the delay
49 slot can be shorted (2 bytes vs. 4 bytes), but will run slowed.
51 The SPARC always has a branch delay slot, but its effects can be
52 annulled when the branch is not taken. This means that failing to
53 find other sources of insns, we can hoist an insn from the branch
54 target that would only be safe to execute knowing that the branch
57 The HP-PA always has a branch delay slot. For unconditional branches
58 its effects can be annulled when the branch is taken. The effects
59 of the delay slot in a conditional branch can be nullified for forward
60 taken branches, or for untaken backward branches. This means
61 we can hoist insns from the fall-through path for forward branches or
62 steal insns from the target of backward branches.
64 Three techniques for filling delay slots have been implemented so far:
66 (1) `fill_simple_delay_slots' is the simplest, most efficient way
67 to fill delay slots. This pass first looks for insns which come
68 from before the branch and which are safe to execute after the
69 branch. Then it searches after the insn requiring delay slots or,
70 in the case of a branch, for insns that are after the point at
71 which the branch merges into the fallthrough code, if such a point
72 exists. When such insns are found, the branch penalty decreases
73 and no code expansion takes place.
75 (2) `fill_eager_delay_slots' is more complicated: it is used for
76 scheduling conditional jumps, or for scheduling jumps which cannot
77 be filled using (1). A machine need not have annulled jumps to use
78 this strategy, but it helps (by keeping more options open).
79 `fill_eager_delay_slots' tries to guess the direction the branch
80 will go; if it guesses right 100% of the time, it can reduce the
81 branch penalty as much as `fill_simple_delay_slots' does. If it
82 guesses wrong 100% of the time, it might as well schedule nops (or
83 on the m88k, unexpose the branch slot). When
84 `fill_eager_delay_slots' takes insns from the fall-through path of
85 the jump, usually there is no code expansion; when it takes insns
86 from the branch target, there is code expansion if it is not the
87 only way to reach that target.
89 (3) `relax_delay_slots' uses a set of rules to simplify code that
90 has been reorganized by (1) and (2). It finds cases where
91 conditional test can be eliminated, jumps can be threaded, extra
92 insns can be eliminated, etc. It is the job of (1) and (2) to do a
93 good job of scheduling locally; `relax_delay_slots' takes care of
94 making the various individual schedules work well together. It is
95 especially tuned to handle the control flow interactions of branch
96 insns. It does nothing for insns with delay slots that do not
99 On machines that use CC0, we are very conservative. We will not make
100 a copy of an insn involving CC0 since we want to maintain a 1-1
101 correspondence between the insn that sets and uses CC0. The insns are
102 allowed to be separated by placing an insn that sets CC0 (but not an insn
103 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
104 delay slot. In that case, we point each insn at the other with REG_CC_USER
105 and REG_CC_SETTER notes. Note that these restrictions affect very few
106 machines because most RISC machines with delay slots will not use CC0
107 (the RT is the only known exception at this point).
111 The Acorn Risc Machine can conditionally execute most insns, so
112 it is profitable to move single insns into a position to execute
113 based on the condition code of the previous insn.
115 The HP-PA can conditionally nullify insns, providing a similar
116 effect to the ARM, differing mostly in which insn is "in charge". */
121 #include "insn-config.h"
122 #include "conditions.h"
123 #include "hard-reg-set.h"
124 #include "basic-block.h"
126 #include "insn-flags.h"
131 #include "insn-attr.h"
133 /* Import list of registers used as spill regs from reload. */
134 extern HARD_REG_SET used_spill_regs;
136 /* Import highest label used in function at end of reload. */
137 extern int max_label_num_after_reload;
142 #define obstack_chunk_alloc xmalloc
143 #define obstack_chunk_free free
145 #ifndef ANNUL_IFTRUE_SLOTS
146 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
148 #ifndef ANNUL_IFFALSE_SLOTS
149 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
152 /* Insns which have delay slots that have not yet been filled. */
154 static struct obstack unfilled_slots_obstack;
155 static rtx *unfilled_firstobj;
157 /* Define macros to refer to the first and last slot containing unfilled
158 insns. These are used because the list may move and its address
159 should be recomputed at each use. */
161 #define unfilled_slots_base \
162 ((rtx *) obstack_base (&unfilled_slots_obstack))
164 #define unfilled_slots_next \
165 ((rtx *) obstack_next_free (&unfilled_slots_obstack))
167 /* This structure is used to indicate which hardware resources are set or
168 needed by insns so far. */
172 char memory; /* Insn sets or needs a memory location. */
173 char unch_memory; /* Insn sets of needs a "unchanging" MEM. */
174 char volatil; /* Insn sets or needs a volatile memory loc. */
175 char cc; /* Insn sets or needs the condition codes. */
176 HARD_REG_SET regs; /* Which registers are set or needed. */
179 /* Macro to clear all resources. */
180 #define CLEAR_RESOURCE(RES) \
181 do { (RES)->memory = (RES)->unch_memory = (RES)->volatil = (RES)->cc = 0; \
182 CLEAR_HARD_REG_SET ((RES)->regs); } while (0)
184 /* Indicates what resources are required at the beginning of the epilogue. */
185 static struct resources start_of_epilogue_needs;
187 /* Indicates what resources are required at function end. */
188 static struct resources end_of_function_needs;
190 /* Points to the label before the end of the function. */
191 static rtx end_of_function_label;
193 /* This structure is used to record liveness information at the targets or
194 fallthrough insns of branches. We will most likely need the information
195 at targets again, so save them in a hash table rather than recomputing them
200 int uid; /* INSN_UID of target. */
201 struct target_info *next; /* Next info for same hash bucket. */
202 HARD_REG_SET live_regs; /* Registers live at target. */
203 int block; /* Basic block number containing target. */
204 int bb_tick; /* Generation count of basic block info. */
207 #define TARGET_HASH_PRIME 257
209 /* Define the hash table itself. */
210 static struct target_info **target_hash_table;
212 /* For each basic block, we maintain a generation number of its basic
213 block info, which is updated each time we move an insn from the
214 target of a jump. This is the generation number indexed by block
217 static int *bb_ticks;
219 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
220 not always monotonically increase. */
221 static int *uid_to_ruid;
223 /* Highest valid index in `uid_to_ruid'. */
226 static void mark_referenced_resources PROTO((rtx, struct resources *, int));
227 static void mark_set_resources PROTO((rtx, struct resources *, int, int));
228 static int stop_search_p PROTO((rtx, int));
229 static int resource_conflicts_p PROTO((struct resources *,
230 struct resources *));
231 static int insn_references_resource_p PROTO((rtx, struct resources *, int));
232 static int insn_sets_resources_p PROTO((rtx, struct resources *, int));
233 static rtx find_end_label PROTO((void));
234 static rtx emit_delay_sequence PROTO((rtx, rtx, int, int));
235 static rtx add_to_delay_list PROTO((rtx, rtx));
236 static void delete_from_delay_slot PROTO((rtx));
237 static void delete_scheduled_jump PROTO((rtx));
238 static void note_delay_statistics PROTO((int, int));
239 static rtx optimize_skip PROTO((rtx));
240 static int get_jump_flags PROTO((rtx, rtx));
241 static int rare_destination PROTO((rtx));
242 static int mostly_true_jump PROTO((rtx, rtx));
243 static rtx get_branch_condition PROTO((rtx, rtx));
244 static int condition_dominates_p PROTO((rtx, rtx));
245 static rtx steal_delay_list_from_target PROTO((rtx, rtx, rtx, rtx,
249 int, int *, int *, rtx *));
250 static rtx steal_delay_list_from_fallthrough PROTO((rtx, rtx, rtx, rtx,
255 static void try_merge_delay_insns PROTO((rtx, rtx));
256 static rtx redundant_insn PROTO((rtx, rtx, rtx));
257 static int own_thread_p PROTO((rtx, rtx, int));
258 static int find_basic_block PROTO((rtx));
259 static void update_block PROTO((rtx, rtx));
260 static int reorg_redirect_jump PROTO((rtx, rtx));
261 static void update_reg_dead_notes PROTO((rtx, rtx));
262 static void fix_reg_dead_note PROTO((rtx, rtx));
263 static void update_reg_unused_notes PROTO((rtx, rtx));
264 static void update_live_status PROTO((rtx, rtx));
265 static rtx next_insn_no_annul PROTO((rtx));
266 static void mark_target_live_regs PROTO((rtx, struct resources *));
267 static void fill_simple_delay_slots PROTO((rtx, int));
268 static rtx fill_slots_from_thread PROTO((rtx, rtx, rtx, rtx, int, int,
269 int, int, int, int *));
270 static void fill_eager_delay_slots PROTO((rtx));
271 static void relax_delay_slots PROTO((rtx));
272 static void make_return_insns PROTO((rtx));
273 static int redirect_with_delay_slots_safe_p PROTO ((rtx, rtx, rtx));
274 static int redirect_with_delay_list_safe_p PROTO ((rtx, rtx, rtx));
276 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
277 which resources are references by the insn. If INCLUDE_CALLED_ROUTINE
278 is TRUE, resources used by the called routine will be included for
282 mark_referenced_resources (x, res, include_delayed_effects)
284 register struct resources *res;
285 register int include_delayed_effects;
287 register enum rtx_code code = GET_CODE (x);
289 register char *format_ptr;
291 /* Handle leaf items for which we set resource flags. Also, special-case
292 CALL, SET and CLOBBER operators. */
304 if (GET_CODE (SUBREG_REG (x)) != REG)
305 mark_referenced_resources (SUBREG_REG (x), res, 0);
308 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
309 int last_regno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
310 for (i = regno; i < last_regno; i++)
311 SET_HARD_REG_BIT (res->regs, i);
316 for (i = 0; i < HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)); i++)
317 SET_HARD_REG_BIT (res->regs, REGNO (x) + i);
321 /* If this memory shouldn't change, it really isn't referencing
323 if (RTX_UNCHANGING_P (x))
324 res->unch_memory = 1;
327 res->volatil = MEM_VOLATILE_P (x);
329 /* Mark registers used to access memory. */
330 mark_referenced_resources (XEXP (x, 0), res, 0);
337 case UNSPEC_VOLATILE:
340 /* Traditional asm's are always volatile. */
345 res->volatil = MEM_VOLATILE_P (x);
347 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
348 We can not just fall through here since then we would be confused
349 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
350 traditional asms unlike their normal usage. */
352 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
353 mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, 0);
357 /* The first operand will be a (MEM (xxx)) but doesn't really reference
358 memory. The second operand may be referenced, though. */
359 mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, 0);
360 mark_referenced_resources (XEXP (x, 1), res, 0);
364 /* Usually, the first operand of SET is set, not referenced. But
365 registers used to access memory are referenced. SET_DEST is
366 also referenced if it is a ZERO_EXTRACT or SIGN_EXTRACT. */
368 mark_referenced_resources (SET_SRC (x), res, 0);
371 if (GET_CODE (x) == SIGN_EXTRACT || GET_CODE (x) == ZERO_EXTRACT)
372 mark_referenced_resources (x, res, 0);
373 else if (GET_CODE (x) == SUBREG)
375 if (GET_CODE (x) == MEM)
376 mark_referenced_resources (XEXP (x, 0), res, 0);
383 if (include_delayed_effects)
385 /* A CALL references memory, the frame pointer if it exists, the
386 stack pointer, any global registers and any registers given in
387 USE insns immediately in front of the CALL.
389 However, we may have moved some of the parameter loading insns
390 into the delay slot of this CALL. If so, the USE's for them
391 don't count and should be skipped. */
392 rtx insn = PREV_INSN (x);
395 rtx next = NEXT_INSN (x);
398 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
399 if (NEXT_INSN (insn) != x)
401 next = NEXT_INSN (NEXT_INSN (insn));
402 sequence = PATTERN (NEXT_INSN (insn));
403 seq_size = XVECLEN (sequence, 0);
404 if (GET_CODE (sequence) != SEQUENCE)
409 SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM);
410 if (frame_pointer_needed)
412 SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM);
413 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
414 SET_HARD_REG_BIT (res->regs, HARD_FRAME_POINTER_REGNUM);
418 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
420 SET_HARD_REG_BIT (res->regs, i);
422 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
423 assume that this call can need any register.
425 This is done to be more conservative about how we handle setjmp.
426 We assume that they both use and set all registers. Using all
427 registers ensures that a register will not be considered dead
428 just because it crosses a setjmp call. A register should be
429 considered dead only if the setjmp call returns non-zero. */
430 if (next && GET_CODE (next) == NOTE
431 && NOTE_LINE_NUMBER (next) == NOTE_INSN_SETJMP)
432 SET_HARD_REG_SET (res->regs);
437 for (link = CALL_INSN_FUNCTION_USAGE (x);
439 link = XEXP (link, 1))
440 if (GET_CODE (XEXP (link, 0)) == USE)
442 for (i = 1; i < seq_size; i++)
444 rtx slot_pat = PATTERN (XVECEXP (sequence, 0, i));
445 if (GET_CODE (slot_pat) == SET
446 && rtx_equal_p (SET_DEST (slot_pat),
447 SET_DEST (XEXP (link, 0))))
451 mark_referenced_resources (SET_DEST (XEXP (link, 0)),
457 /* ... fall through to other INSN processing ... */
462 #ifdef INSN_REFERENCES_ARE_DELAYED
463 if (! include_delayed_effects
464 && INSN_REFERENCES_ARE_DELAYED (x))
468 /* No special processing, just speed up. */
469 mark_referenced_resources (PATTERN (x), res, include_delayed_effects);
473 /* Process each sub-expression and flag what it needs. */
474 format_ptr = GET_RTX_FORMAT (code);
475 for (i = 0; i < GET_RTX_LENGTH (code); i++)
476 switch (*format_ptr++)
479 mark_referenced_resources (XEXP (x, i), res, include_delayed_effects);
483 for (j = 0; j < XVECLEN (x, i); j++)
484 mark_referenced_resources (XVECEXP (x, i, j), res,
485 include_delayed_effects);
490 /* Given X, a part of an insn, and a pointer to a `struct resource', RES,
491 indicate which resources are modified by the insn. If INCLUDE_CALLED_ROUTINE
492 is nonzero, also mark resources potentially set by the called routine.
494 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
495 objects are being referenced instead of set.
497 We never mark the insn as modifying the condition code unless it explicitly
498 SETs CC0 even though this is not totally correct. The reason for this is
499 that we require a SET of CC0 to immediately precede the reference to CC0.
500 So if some other insn sets CC0 as a side-effect, we know it cannot affect
501 our computation and thus may be placed in a delay slot. */
504 mark_set_resources (x, res, in_dest, include_delayed_effects)
506 register struct resources *res;
508 int include_delayed_effects;
510 register enum rtx_code code;
512 register char *format_ptr;
530 /* These don't set any resources. */
539 /* Called routine modifies the condition code, memory, any registers
540 that aren't saved across calls, global registers and anything
541 explicitly CLOBBERed immediately after the CALL_INSN. */
543 if (include_delayed_effects)
545 rtx next = NEXT_INSN (x);
546 rtx prev = PREV_INSN (x);
549 res->cc = res->memory = 1;
550 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
551 if (call_used_regs[i] || global_regs[i])
552 SET_HARD_REG_BIT (res->regs, i);
554 /* If X is part of a delay slot sequence, then NEXT should be
555 the first insn after the sequence. */
556 if (NEXT_INSN (prev) != x)
557 next = NEXT_INSN (NEXT_INSN (prev));
559 for (link = CALL_INSN_FUNCTION_USAGE (x);
560 link; link = XEXP (link, 1))
561 if (GET_CODE (XEXP (link, 0)) == CLOBBER)
562 mark_set_resources (SET_DEST (XEXP (link, 0)), res, 1, 0);
564 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
565 assume that this call can clobber any register. */
566 if (next && GET_CODE (next) == NOTE
567 && NOTE_LINE_NUMBER (next) == NOTE_INSN_SETJMP)
568 SET_HARD_REG_SET (res->regs);
571 /* ... and also what it's RTL says it modifies, if anything. */
576 /* An insn consisting of just a CLOBBER (or USE) is just for flow
577 and doesn't actually do anything, so we ignore it. */
579 #ifdef INSN_SETS_ARE_DELAYED
580 if (! include_delayed_effects
581 && INSN_SETS_ARE_DELAYED (x))
586 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
591 /* If the source of a SET is a CALL, this is actually done by
592 the called routine. So only include it if we are to include the
593 effects of the calling routine. */
595 mark_set_resources (SET_DEST (x), res,
596 (include_delayed_effects
597 || GET_CODE (SET_SRC (x)) != CALL),
600 mark_set_resources (SET_SRC (x), res, 0, 0);
604 mark_set_resources (XEXP (x, 0), res, 1, 0);
608 for (i = 0; i < XVECLEN (x, 0); i++)
609 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x, 0, 0))
610 && INSN_FROM_TARGET_P (XVECEXP (x, 0, i))))
611 mark_set_resources (XVECEXP (x, 0, i), res, 0,
612 include_delayed_effects);
619 mark_set_resources (XEXP (x, 0), res, 1, 0);
623 mark_set_resources (XEXP (x, 0), res, in_dest, 0);
624 mark_set_resources (XEXP (x, 1), res, 0, 0);
625 mark_set_resources (XEXP (x, 2), res, 0, 0);
632 res->unch_memory = RTX_UNCHANGING_P (x);
633 res->volatil = MEM_VOLATILE_P (x);
636 mark_set_resources (XEXP (x, 0), res, 0, 0);
642 if (GET_CODE (SUBREG_REG (x)) != REG)
643 mark_set_resources (SUBREG_REG (x), res,
644 in_dest, include_delayed_effects);
647 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
648 int last_regno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
649 for (i = regno; i < last_regno; i++)
650 SET_HARD_REG_BIT (res->regs, i);
657 for (i = 0; i < HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)); i++)
658 SET_HARD_REG_BIT (res->regs, REGNO (x) + i);
662 /* Process each sub-expression and flag what it needs. */
663 format_ptr = GET_RTX_FORMAT (code);
664 for (i = 0; i < GET_RTX_LENGTH (code); i++)
665 switch (*format_ptr++)
668 mark_set_resources (XEXP (x, i), res, in_dest, include_delayed_effects);
672 for (j = 0; j < XVECLEN (x, i); j++)
673 mark_set_resources (XVECEXP (x, i, j), res, in_dest,
674 include_delayed_effects);
679 /* Return TRUE if this insn should stop the search for insn to fill delay
680 slots. LABELS_P indicates that labels should terminate the search.
681 In all cases, jumps terminate the search. */
684 stop_search_p (insn, labels_p)
691 switch (GET_CODE (insn))
705 /* OK unless it contains a delay slot or is an `asm' insn of some type.
706 We don't know anything about these. */
707 return (GET_CODE (PATTERN (insn)) == SEQUENCE
708 || GET_CODE (PATTERN (insn)) == ASM_INPUT
709 || asm_noperands (PATTERN (insn)) >= 0);
716 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
717 resource set contains a volatile memory reference. Otherwise, return FALSE. */
720 resource_conflicts_p (res1, res2)
721 struct resources *res1, *res2;
723 if ((res1->cc && res2->cc) || (res1->memory && res2->memory)
724 || (res1->unch_memory && res2->unch_memory)
725 || res1->volatil || res2->volatil)
729 return (res1->regs & res2->regs) != HARD_CONST (0);
734 for (i = 0; i < HARD_REG_SET_LONGS; i++)
735 if ((res1->regs[i] & res2->regs[i]) != 0)
742 /* Return TRUE if any resource marked in RES, a `struct resources', is
743 referenced by INSN. If INCLUDE_CALLED_ROUTINE is set, return if the called
744 routine is using those resources.
746 We compute this by computing all the resources referenced by INSN and
747 seeing if this conflicts with RES. It might be faster to directly check
748 ourselves, and this is the way it used to work, but it means duplicating
749 a large block of complex code. */
752 insn_references_resource_p (insn, res, include_delayed_effects)
754 register struct resources *res;
755 int include_delayed_effects;
757 struct resources insn_res;
759 CLEAR_RESOURCE (&insn_res);
760 mark_referenced_resources (insn, &insn_res, include_delayed_effects);
761 return resource_conflicts_p (&insn_res, res);
764 /* Return TRUE if INSN modifies resources that are marked in RES.
765 INCLUDE_CALLED_ROUTINE is set if the actions of that routine should be
766 included. CC0 is only modified if it is explicitly set; see comments
767 in front of mark_set_resources for details. */
770 insn_sets_resource_p (insn, res, include_delayed_effects)
772 register struct resources *res;
773 int include_delayed_effects;
775 struct resources insn_sets;
777 CLEAR_RESOURCE (&insn_sets);
778 mark_set_resources (insn, &insn_sets, 0, include_delayed_effects);
779 return resource_conflicts_p (&insn_sets, res);
782 /* Find a label at the end of the function or before a RETURN. If there is
790 /* If we found one previously, return it. */
791 if (end_of_function_label)
792 return end_of_function_label;
794 /* Otherwise, see if there is a label at the end of the function. If there
795 is, it must be that RETURN insns aren't needed, so that is our return
796 label and we don't have to do anything else. */
798 insn = get_last_insn ();
799 while (GET_CODE (insn) == NOTE
800 || (GET_CODE (insn) == INSN
801 && (GET_CODE (PATTERN (insn)) == USE
802 || GET_CODE (PATTERN (insn)) == CLOBBER)))
803 insn = PREV_INSN (insn);
805 /* When a target threads its epilogue we might already have a
806 suitable return insn. If so put a label before it for the
807 end_of_function_label. */
808 if (GET_CODE (insn) == BARRIER
809 && GET_CODE (PREV_INSN (insn)) == JUMP_INSN
810 && GET_CODE (PATTERN (PREV_INSN (insn))) == RETURN)
812 rtx temp = PREV_INSN (PREV_INSN (insn));
813 end_of_function_label = gen_label_rtx ();
814 LABEL_NUSES (end_of_function_label) = 0;
816 /* Put the label before an USE insns that may proceed the RETURN insn. */
817 while (GET_CODE (temp) == USE)
818 temp = PREV_INSN (temp);
820 emit_label_after (end_of_function_label, temp);
823 else if (GET_CODE (insn) == CODE_LABEL)
824 end_of_function_label = insn;
827 /* Otherwise, make a new label and emit a RETURN and BARRIER,
829 end_of_function_label = gen_label_rtx ();
830 LABEL_NUSES (end_of_function_label) = 0;
831 emit_label (end_of_function_label);
835 /* The return we make may have delay slots too. */
836 rtx insn = gen_return ();
837 insn = emit_jump_insn (insn);
839 if (num_delay_slots (insn) > 0)
840 obstack_ptr_grow (&unfilled_slots_obstack, insn);
845 /* Show one additional use for this label so it won't go away until
847 ++LABEL_NUSES (end_of_function_label);
849 return end_of_function_label;
852 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
853 the pattern of INSN with the SEQUENCE.
855 Chain the insns so that NEXT_INSN of each insn in the sequence points to
856 the next and NEXT_INSN of the last insn in the sequence points to
857 the first insn after the sequence. Similarly for PREV_INSN. This makes
858 it easier to scan all insns.
860 Returns the SEQUENCE that replaces INSN. */
863 emit_delay_sequence (insn, list, length, avail)
873 /* Allocate the the rtvec to hold the insns and the SEQUENCE. */
874 rtvec seqv = rtvec_alloc (length + 1);
875 rtx seq = gen_rtx (SEQUENCE, VOIDmode, seqv);
876 rtx seq_insn = make_insn_raw (seq);
877 rtx first = get_insns ();
878 rtx last = get_last_insn ();
880 /* Make a copy of the insn having delay slots. */
881 rtx delay_insn = copy_rtx (insn);
883 /* If INSN is followed by a BARRIER, delete the BARRIER since it will only
884 confuse further processing. Update LAST in case it was the last insn.
885 We will put the BARRIER back in later. */
886 if (NEXT_INSN (insn) && GET_CODE (NEXT_INSN (insn)) == BARRIER)
888 delete_insn (NEXT_INSN (insn));
889 last = get_last_insn ();
893 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
894 NEXT_INSN (seq_insn) = NEXT_INSN (insn);
895 PREV_INSN (seq_insn) = PREV_INSN (insn);
898 set_new_first_and_last_insn (first, seq_insn);
900 PREV_INSN (NEXT_INSN (seq_insn)) = seq_insn;
903 set_new_first_and_last_insn (seq_insn, last);
905 NEXT_INSN (PREV_INSN (seq_insn)) = seq_insn;
907 /* Build our SEQUENCE and rebuild the insn chain. */
908 XVECEXP (seq, 0, 0) = delay_insn;
909 INSN_DELETED_P (delay_insn) = 0;
910 PREV_INSN (delay_insn) = PREV_INSN (seq_insn);
912 for (li = list; li; li = XEXP (li, 1), i++)
914 rtx tem = XEXP (li, 0);
917 /* Show that this copy of the insn isn't deleted. */
918 INSN_DELETED_P (tem) = 0;
920 XVECEXP (seq, 0, i) = tem;
921 PREV_INSN (tem) = XVECEXP (seq, 0, i - 1);
922 NEXT_INSN (XVECEXP (seq, 0, i - 1)) = tem;
924 /* Remove any REG_DEAD notes because we can't rely on them now
925 that the insn has been moved. */
926 for (note = REG_NOTES (tem); note; note = XEXP (note, 1))
927 if (REG_NOTE_KIND (note) == REG_DEAD)
928 XEXP (note, 0) = const0_rtx;
931 NEXT_INSN (XVECEXP (seq, 0, length)) = NEXT_INSN (seq_insn);
933 /* If the previous insn is a SEQUENCE, update the NEXT_INSN pointer on the
934 last insn in that SEQUENCE to point to us. Similarly for the first
935 insn in the following insn if it is a SEQUENCE. */
937 if (PREV_INSN (seq_insn) && GET_CODE (PREV_INSN (seq_insn)) == INSN
938 && GET_CODE (PATTERN (PREV_INSN (seq_insn))) == SEQUENCE)
939 NEXT_INSN (XVECEXP (PATTERN (PREV_INSN (seq_insn)), 0,
940 XVECLEN (PATTERN (PREV_INSN (seq_insn)), 0) - 1))
943 if (NEXT_INSN (seq_insn) && GET_CODE (NEXT_INSN (seq_insn)) == INSN
944 && GET_CODE (PATTERN (NEXT_INSN (seq_insn))) == SEQUENCE)
945 PREV_INSN (XVECEXP (PATTERN (NEXT_INSN (seq_insn)), 0, 0)) = seq_insn;
947 /* If there used to be a BARRIER, put it back. */
949 emit_barrier_after (seq_insn);
957 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
958 be in the order in which the insns are to be executed. */
961 add_to_delay_list (insn, delay_list)
965 /* If we have an empty list, just make a new list element. If
966 INSN has it's block number recorded, clear it since we may
967 be moving the insn to a new block. */
971 struct target_info *tinfo;
973 for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME];
974 tinfo; tinfo = tinfo->next)
975 if (tinfo->uid == INSN_UID (insn))
981 return gen_rtx (INSN_LIST, VOIDmode, insn, NULL_RTX);
984 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
986 XEXP (delay_list, 1) = add_to_delay_list (insn, XEXP (delay_list, 1));
991 /* Delete INSN from the the delay slot of the insn that it is in. This may
992 produce an insn without anything in its delay slots. */
995 delete_from_delay_slot (insn)
998 rtx trial, seq_insn, seq, prev;
1002 /* We first must find the insn containing the SEQUENCE with INSN in its
1003 delay slot. Do this by finding an insn, TRIAL, where
1004 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
1007 PREV_INSN (NEXT_INSN (trial)) == trial;
1008 trial = NEXT_INSN (trial))
1011 seq_insn = PREV_INSN (NEXT_INSN (trial));
1012 seq = PATTERN (seq_insn);
1014 /* Create a delay list consisting of all the insns other than the one
1015 we are deleting (unless we were the only one). */
1016 if (XVECLEN (seq, 0) > 2)
1017 for (i = 1; i < XVECLEN (seq, 0); i++)
1018 if (XVECEXP (seq, 0, i) != insn)
1019 delay_list = add_to_delay_list (XVECEXP (seq, 0, i), delay_list);
1021 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
1022 list, and rebuild the delay list if non-empty. */
1023 prev = PREV_INSN (seq_insn);
1024 trial = XVECEXP (seq, 0, 0);
1025 delete_insn (seq_insn);
1026 add_insn_after (trial, prev);
1028 if (GET_CODE (trial) == JUMP_INSN
1029 && (simplejump_p (trial) || GET_CODE (PATTERN (trial)) == RETURN))
1030 emit_barrier_after (trial);
1032 /* If there are any delay insns, remit them. Otherwise clear the
1035 trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2, 0);
1037 INSN_ANNULLED_BRANCH_P (trial) = 0;
1039 INSN_FROM_TARGET_P (insn) = 0;
1041 /* Show we need to fill this insn again. */
1042 obstack_ptr_grow (&unfilled_slots_obstack, trial);
1045 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
1046 the insn that sets CC0 for it and delete it too. */
1049 delete_scheduled_jump (insn)
1052 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
1053 delete the insn that sets the condition code, but it is hard to find it.
1054 Since this case is rare anyway, don't bother trying; there would likely
1055 be other insns that became dead anyway, which we wouldn't know to
1059 if (reg_mentioned_p (cc0_rtx, insn))
1061 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
1063 /* If a reg-note was found, it points to an insn to set CC0. This
1064 insn is in the delay list of some other insn. So delete it from
1065 the delay list it was in. */
1068 if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
1069 && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
1070 delete_from_delay_slot (XEXP (note, 0));
1074 /* The insn setting CC0 is our previous insn, but it may be in
1075 a delay slot. It will be the last insn in the delay slot, if
1077 rtx trial = previous_insn (insn);
1078 if (GET_CODE (trial) == NOTE)
1079 trial = prev_nonnote_insn (trial);
1080 if (sets_cc0_p (PATTERN (trial)) != 1
1081 || FIND_REG_INC_NOTE (trial, 0))
1083 if (PREV_INSN (NEXT_INSN (trial)) == trial)
1084 delete_insn (trial);
1086 delete_from_delay_slot (trial);
1094 /* Counters for delay-slot filling. */
1096 #define NUM_REORG_FUNCTIONS 2
1097 #define MAX_DELAY_HISTOGRAM 3
1098 #define MAX_REORG_PASSES 2
1100 static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES];
1102 static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES];
1104 static int reorg_pass_number;
1107 note_delay_statistics (slots_filled, index)
1108 int slots_filled, index;
1110 num_insns_needing_delays[index][reorg_pass_number]++;
1111 if (slots_filled > MAX_DELAY_HISTOGRAM)
1112 slots_filled = MAX_DELAY_HISTOGRAM;
1113 num_filled_delays[index][slots_filled][reorg_pass_number]++;
1116 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
1118 /* Optimize the following cases:
1120 1. When a conditional branch skips over only one instruction,
1121 use an annulling branch and put that insn in the delay slot.
1122 Use either a branch that annuls when the condition if true or
1123 invert the test with a branch that annuls when the condition is
1124 false. This saves insns, since otherwise we must copy an insn
1127 (orig) (skip) (otherwise)
1128 Bcc.n L1 Bcc',a L1 Bcc,a L1'
1135 2. When a conditional branch skips over only one instruction,
1136 and after that, it unconditionally branches somewhere else,
1137 perform the similar optimization. This saves executing the
1138 second branch in the case where the inverted condition is true.
1145 INSN is a JUMP_INSN.
1147 This should be expanded to skip over N insns, where N is the number
1148 of delay slots required. */
1151 optimize_skip (insn)
1154 register rtx trial = next_nonnote_insn (insn);
1155 rtx next_trial = next_active_insn (trial);
1160 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1163 || GET_CODE (trial) != INSN
1164 || GET_CODE (PATTERN (trial)) == SEQUENCE
1165 || recog_memoized (trial) < 0
1166 || (! eligible_for_annul_false (insn, 0, trial, flags)
1167 && ! eligible_for_annul_true (insn, 0, trial, flags)))
1170 /* There are two cases where we are just executing one insn (we assume
1171 here that a branch requires only one insn; this should be generalized
1172 at some point): Where the branch goes around a single insn or where
1173 we have one insn followed by a branch to the same label we branch to.
1174 In both of these cases, inverting the jump and annulling the delay
1175 slot give the same effect in fewer insns. */
1176 if ((next_trial == next_active_insn (JUMP_LABEL (insn)))
1178 && GET_CODE (next_trial) == JUMP_INSN
1179 && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)
1180 && (simplejump_p (next_trial)
1181 || GET_CODE (PATTERN (next_trial)) == RETURN)))
1183 if (eligible_for_annul_false (insn, 0, trial, flags))
1185 if (invert_jump (insn, JUMP_LABEL (insn)))
1186 INSN_FROM_TARGET_P (trial) = 1;
1187 else if (! eligible_for_annul_true (insn, 0, trial, flags))
1191 delay_list = add_to_delay_list (trial, NULL_RTX);
1192 next_trial = next_active_insn (trial);
1193 update_block (trial, trial);
1194 delete_insn (trial);
1196 /* Also, if we are targeting an unconditional
1197 branch, thread our jump to the target of that branch. Don't
1198 change this into a RETURN here, because it may not accept what
1199 we have in the delay slot. We'll fix this up later. */
1200 if (next_trial && GET_CODE (next_trial) == JUMP_INSN
1201 && (simplejump_p (next_trial)
1202 || GET_CODE (PATTERN (next_trial)) == RETURN))
1204 target_label = JUMP_LABEL (next_trial);
1205 if (target_label == 0)
1206 target_label = find_end_label ();
1208 /* Recompute the flags based on TARGET_LABEL since threading
1209 the jump to TARGET_LABEL may change the direction of the
1210 jump (which may change the circumstances in which the
1211 delay slot is nullified). */
1212 flags = get_jump_flags (insn, target_label);
1213 if (eligible_for_annul_true (insn, 0, trial, flags))
1214 reorg_redirect_jump (insn, target_label);
1217 INSN_ANNULLED_BRANCH_P (insn) = 1;
1225 /* Encode and return branch direction and prediction information for
1226 INSN assuming it will jump to LABEL.
1228 Non conditional branches return no direction information and
1229 are predicted as very likely taken. */
1232 get_jump_flags (insn, label)
1237 /* get_jump_flags can be passed any insn with delay slots, these may
1238 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
1239 direction information, and only if they are conditional jumps.
1241 If LABEL is zero, then there is no way to determine the branch
1243 if (GET_CODE (insn) == JUMP_INSN
1244 && (condjump_p (insn) || condjump_in_parallel_p (insn))
1245 && INSN_UID (insn) <= max_uid
1247 && INSN_UID (label) <= max_uid)
1249 = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
1250 ? ATTR_FLAG_forward : ATTR_FLAG_backward;
1251 /* No valid direction information. */
1255 /* If insn is a conditional branch call mostly_true_jump to get
1256 determine the branch prediction.
1258 Non conditional branches are predicted as very likely taken. */
1259 if (GET_CODE (insn) == JUMP_INSN
1260 && (condjump_p (insn) || condjump_in_parallel_p (insn)))
1264 prediction = mostly_true_jump (insn, get_branch_condition (insn, label));
1268 flags |= (ATTR_FLAG_very_likely | ATTR_FLAG_likely);
1271 flags |= ATTR_FLAG_likely;
1274 flags |= ATTR_FLAG_unlikely;
1277 flags |= (ATTR_FLAG_very_unlikely | ATTR_FLAG_unlikely);
1285 flags |= (ATTR_FLAG_very_likely | ATTR_FLAG_likely);
1290 /* Return 1 if INSN is a destination that will be branched to rarely (the
1291 return point of a function); return 2 if DEST will be branched to very
1292 rarely (a call to a function that doesn't return). Otherwise,
1296 rare_destination (insn)
1302 for (; insn; insn = next)
1304 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1305 insn = XVECEXP (PATTERN (insn), 0, 0);
1307 next = NEXT_INSN (insn);
1309 switch (GET_CODE (insn))
1314 /* A BARRIER can either be after a JUMP_INSN or a CALL_INSN. We
1315 don't scan past JUMP_INSNs, so any barrier we find here must
1316 have been after a CALL_INSN and hence mean the call doesn't
1320 if (GET_CODE (PATTERN (insn)) == RETURN)
1322 else if (simplejump_p (insn)
1323 && jump_count++ < 10)
1324 next = JUMP_LABEL (insn);
1330 /* If we got here it means we hit the end of the function. So this
1331 is an unlikely destination. */
1336 /* Return truth value of the statement that this branch
1337 is mostly taken. If we think that the branch is extremely likely
1338 to be taken, we return 2. If the branch is slightly more likely to be
1339 taken, return 1. If the branch is slightly less likely to be taken,
1340 return 0 and if the branch is highly unlikely to be taken, return -1.
1342 CONDITION, if non-zero, is the condition that JUMP_INSN is testing. */
1345 mostly_true_jump (jump_insn, condition)
1346 rtx jump_insn, condition;
1348 rtx target_label = JUMP_LABEL (jump_insn);
1350 int rare_dest = rare_destination (target_label);
1351 int rare_fallthrough = rare_destination (NEXT_INSN (jump_insn));
1353 /* If this is a branch outside a loop, it is highly unlikely. */
1354 if (GET_CODE (PATTERN (jump_insn)) == SET
1355 && GET_CODE (SET_SRC (PATTERN (jump_insn))) == IF_THEN_ELSE
1356 && ((GET_CODE (XEXP (SET_SRC (PATTERN (jump_insn)), 1)) == LABEL_REF
1357 && LABEL_OUTSIDE_LOOP_P (XEXP (SET_SRC (PATTERN (jump_insn)), 1)))
1358 || (GET_CODE (XEXP (SET_SRC (PATTERN (jump_insn)), 2)) == LABEL_REF
1359 && LABEL_OUTSIDE_LOOP_P (XEXP (SET_SRC (PATTERN (jump_insn)), 2)))))
1364 /* If this is the test of a loop, it is very likely true. We scan
1365 backwards from the target label. If we find a NOTE_INSN_LOOP_BEG
1366 before the next real insn, we assume the branch is to the top of
1368 for (insn = PREV_INSN (target_label);
1369 insn && GET_CODE (insn) == NOTE;
1370 insn = PREV_INSN (insn))
1371 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1374 /* If this is a jump to the test of a loop, it is likely true. We scan
1375 forwards from the target label. If we find a NOTE_INSN_LOOP_VTOP
1376 before the next real insn, we assume the branch is to the loop branch
1378 for (insn = NEXT_INSN (target_label);
1379 insn && GET_CODE (insn) == NOTE;
1380 insn = PREV_INSN (insn))
1381 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP)
1385 /* Look at the relative rarities of the fallthrough and destination. If
1386 they differ, we can predict the branch that way. */
1388 switch (rare_fallthrough - rare_dest)
1402 /* If we couldn't figure out what this jump was, assume it won't be
1403 taken. This should be rare. */
1407 /* EQ tests are usually false and NE tests are usually true. Also,
1408 most quantities are positive, so we can make the appropriate guesses
1409 about signed comparisons against zero. */
1410 switch (GET_CODE (condition))
1413 /* Unconditional branch. */
1421 if (XEXP (condition, 1) == const0_rtx)
1426 if (XEXP (condition, 1) == const0_rtx)
1431 /* Predict backward branches usually take, forward branches usually not. If
1432 we don't know whether this is forward or backward, assume the branch
1433 will be taken, since most are. */
1434 return (target_label == 0 || INSN_UID (jump_insn) > max_uid
1435 || INSN_UID (target_label) > max_uid
1436 || (uid_to_ruid[INSN_UID (jump_insn)]
1437 > uid_to_ruid[INSN_UID (target_label)]));;
1440 /* Return the condition under which INSN will branch to TARGET. If TARGET
1441 is zero, return the condition under which INSN will return. If INSN is
1442 an unconditional branch, return const_true_rtx. If INSN isn't a simple
1443 type of jump, or it doesn't go to TARGET, return 0. */
1446 get_branch_condition (insn, target)
1450 rtx pat = PATTERN (insn);
1453 if (condjump_in_parallel_p (insn))
1454 pat = XVECEXP (pat, 0, 0);
1456 if (GET_CODE (pat) == RETURN)
1457 return target == 0 ? const_true_rtx : 0;
1459 else if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
1462 src = SET_SRC (pat);
1463 if (GET_CODE (src) == LABEL_REF && XEXP (src, 0) == target)
1464 return const_true_rtx;
1466 else if (GET_CODE (src) == IF_THEN_ELSE
1467 && ((target == 0 && GET_CODE (XEXP (src, 1)) == RETURN)
1468 || (GET_CODE (XEXP (src, 1)) == LABEL_REF
1469 && XEXP (XEXP (src, 1), 0) == target))
1470 && XEXP (src, 2) == pc_rtx)
1471 return XEXP (src, 0);
1473 else if (GET_CODE (src) == IF_THEN_ELSE
1474 && ((target == 0 && GET_CODE (XEXP (src, 2)) == RETURN)
1475 || (GET_CODE (XEXP (src, 2)) == LABEL_REF
1476 && XEXP (XEXP (src, 2), 0) == target))
1477 && XEXP (src, 1) == pc_rtx)
1478 return gen_rtx (reverse_condition (GET_CODE (XEXP (src, 0))),
1479 GET_MODE (XEXP (src, 0)),
1480 XEXP (XEXP (src, 0), 0), XEXP (XEXP (src, 0), 1));
1485 /* Return non-zero if CONDITION is more strict than the condition of
1486 INSN, i.e., if INSN will always branch if CONDITION is true. */
1489 condition_dominates_p (condition, insn)
1493 rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn));
1494 enum rtx_code code = GET_CODE (condition);
1495 enum rtx_code other_code;
1497 if (rtx_equal_p (condition, other_condition)
1498 || other_condition == const_true_rtx)
1501 else if (condition == const_true_rtx || other_condition == 0)
1504 other_code = GET_CODE (other_condition);
1505 if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2
1506 || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0))
1507 || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1)))
1510 return comparison_dominates_p (code, other_code);
1513 /* Return non-zero if redirecting JUMP to NEWLABEL does not invalidate
1514 any insns already in the delay slot of JUMP. */
1517 redirect_with_delay_slots_safe_p (jump, newlabel, seq)
1518 rtx jump, newlabel, seq;
1520 int flags, slots, i;
1521 rtx pat = PATTERN (seq);
1523 /* Make sure all the delay slots of this jump would still
1524 be valid after threading the jump. If they are still
1525 valid, then return non-zero. */
1527 flags = get_jump_flags (jump, newlabel);
1528 for (i = 1; i < XVECLEN (pat, 0); i++)
1530 #ifdef ANNUL_IFFALSE_SLOTS
1531 (INSN_ANNULLED_BRANCH_P (jump)
1532 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
1533 ? eligible_for_annul_false (jump, i - 1,
1534 XVECEXP (pat, 0, i), flags) :
1536 #ifdef ANNUL_IFTRUE_SLOTS
1537 (INSN_ANNULLED_BRANCH_P (jump)
1538 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
1539 ? eligible_for_annul_true (jump, i - 1,
1540 XVECEXP (pat, 0, i), flags) :
1542 eligible_for_delay (jump, i -1, XVECEXP (pat, 0, i), flags)))
1545 return (i == XVECLEN (pat, 0));
1548 /* Return non-zero if redirecting JUMP to NEWLABEL does not invalidate
1549 any insns we wish to place in the delay slot of JUMP. */
1552 redirect_with_delay_list_safe_p (jump, newlabel, delay_list)
1553 rtx jump, newlabel, delay_list;
1558 /* Make sure all the insns in DELAY_LIST would still be
1559 valid after threading the jump. If they are still
1560 valid, then return non-zero. */
1562 flags = get_jump_flags (jump, newlabel);
1563 for (li = delay_list, i = 0; li; li = XEXP (li, 1), i++)
1565 #ifdef ANNUL_IFFALSE_SLOTS
1566 (INSN_ANNULLED_BRANCH_P (jump)
1567 && INSN_FROM_TARGET_P (XEXP (li, 0)))
1568 ? eligible_for_annul_false (jump, i, XEXP (li, 0), flags) :
1570 #ifdef ANNUL_IFTRUE_SLOTS
1571 (INSN_ANNULLED_BRANCH_P (jump)
1572 && ! INSN_FROM_TARGET_P (XEXP (li, 0)))
1573 ? eligible_for_annul_true (jump, i, XEXP (li, 0), flags) :
1575 eligible_for_delay (jump, i, XEXP (li, 0), flags)))
1578 return (li == NULL);
1582 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1583 the condition tested by INSN is CONDITION and the resources shown in
1584 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1585 from SEQ's delay list, in addition to whatever insns it may execute
1586 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1587 needed while searching for delay slot insns. Return the concatenated
1588 delay list if possible, otherwise, return 0.
1590 SLOTS_TO_FILL is the total number of slots required by INSN, and
1591 PSLOTS_FILLED points to the number filled so far (also the number of
1592 insns in DELAY_LIST). It is updated with the number that have been
1593 filled from the SEQUENCE, if any.
1595 PANNUL_P points to a non-zero value if we already know that we need
1596 to annul INSN. If this routine determines that annulling is needed,
1597 it may set that value non-zero.
1599 PNEW_THREAD points to a location that is to receive the place at which
1600 execution should continue. */
1603 steal_delay_list_from_target (insn, condition, seq, delay_list,
1604 sets, needed, other_needed,
1605 slots_to_fill, pslots_filled, pannul_p,
1607 rtx insn, condition;
1610 struct resources *sets, *needed, *other_needed;
1617 int slots_remaining = slots_to_fill - *pslots_filled;
1618 int total_slots_filled = *pslots_filled;
1619 rtx new_delay_list = 0;
1620 int must_annul = *pannul_p;
1623 /* We can't do anything if there are more delay slots in SEQ than we
1624 can handle, or if we don't know that it will be a taken branch.
1625 We know that it will be a taken branch if it is either an unconditional
1626 branch or a conditional branch with a stricter branch condition.
1628 Also, exit if the branch has more than one set, since then it is computing
1629 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1630 ??? It may be possible to move other sets into INSN in addition to
1631 moving the instructions in the delay slots. */
1633 if (XVECLEN (seq, 0) - 1 > slots_remaining
1634 || ! condition_dominates_p (condition, XVECEXP (seq, 0, 0))
1635 || ! single_set (XVECEXP (seq, 0, 0)))
1638 for (i = 1; i < XVECLEN (seq, 0); i++)
1640 rtx trial = XVECEXP (seq, 0, i);
1643 if (insn_references_resource_p (trial, sets, 0)
1644 || insn_sets_resource_p (trial, needed, 0)
1645 || insn_sets_resource_p (trial, sets, 0)
1647 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1649 || find_reg_note (trial, REG_CC_USER, NULL_RTX)
1651 /* If TRIAL is from the fallthrough code of an annulled branch insn
1652 in SEQ, we cannot use it. */
1653 || (INSN_ANNULLED_BRANCH_P (XVECEXP (seq, 0, 0))
1654 && ! INSN_FROM_TARGET_P (trial)))
1657 /* If this insn was already done (usually in a previous delay slot),
1658 pretend we put it in our delay slot. */
1659 if (redundant_insn (trial, insn, new_delay_list))
1662 /* We will end up re-vectoring this branch, so compute flags
1663 based on jumping to the new label. */
1664 flags = get_jump_flags (insn, JUMP_LABEL (XVECEXP (seq, 0, 0)));
1667 && ((condition == const_true_rtx
1668 || (! insn_sets_resource_p (trial, other_needed, 0)
1669 && ! may_trap_p (PATTERN (trial)))))
1670 ? eligible_for_delay (insn, total_slots_filled, trial, flags)
1672 eligible_for_annul_false (insn, total_slots_filled, trial, flags)))
1674 temp = copy_rtx (trial);
1675 INSN_FROM_TARGET_P (temp) = 1;
1676 new_delay_list = add_to_delay_list (temp, new_delay_list);
1677 total_slots_filled++;
1679 if (--slots_remaining == 0)
1686 /* Show the place to which we will be branching. */
1687 *pnew_thread = next_active_insn (JUMP_LABEL (XVECEXP (seq, 0, 0)));
1689 /* Add any new insns to the delay list and update the count of the
1690 number of slots filled. */
1691 *pslots_filled = total_slots_filled;
1692 *pannul_p = must_annul;
1694 if (delay_list == 0)
1695 return new_delay_list;
1697 for (temp = new_delay_list; temp; temp = XEXP (temp, 1))
1698 delay_list = add_to_delay_list (XEXP (temp, 0), delay_list);
1703 /* Similar to steal_delay_list_from_target except that SEQ is on the
1704 fallthrough path of INSN. Here we only do something if the delay insn
1705 of SEQ is an unconditional branch. In that case we steal its delay slot
1706 for INSN since unconditional branches are much easier to fill. */
1709 steal_delay_list_from_fallthrough (insn, condition, seq,
1710 delay_list, sets, needed, other_needed,
1711 slots_to_fill, pslots_filled, pannul_p)
1712 rtx insn, condition;
1715 struct resources *sets, *needed, *other_needed;
1723 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1725 /* We can't do anything if SEQ's delay insn isn't an
1726 unconditional branch. */
1728 if (! simplejump_p (XVECEXP (seq, 0, 0))
1729 && GET_CODE (PATTERN (XVECEXP (seq, 0, 0))) != RETURN)
1732 for (i = 1; i < XVECLEN (seq, 0); i++)
1734 rtx trial = XVECEXP (seq, 0, i);
1736 /* If TRIAL sets CC0, stealing it will move it too far from the use
1738 if (insn_references_resource_p (trial, sets, 0)
1739 || insn_sets_resource_p (trial, needed, 0)
1740 || insn_sets_resource_p (trial, sets, 0)
1742 || sets_cc0_p (PATTERN (trial))
1748 /* If this insn was already done, we don't need it. */
1749 if (redundant_insn (trial, insn, delay_list))
1751 delete_from_delay_slot (trial);
1756 && ((condition == const_true_rtx
1757 || (! insn_sets_resource_p (trial, other_needed, 0)
1758 && ! may_trap_p (PATTERN (trial)))))
1759 ? eligible_for_delay (insn, *pslots_filled, trial, flags)
1761 eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
1763 delete_from_delay_slot (trial);
1764 delay_list = add_to_delay_list (trial, delay_list);
1766 if (++(*pslots_filled) == slots_to_fill)
1776 /* Try merging insns starting at THREAD which match exactly the insns in
1779 If all insns were matched and the insn was previously annulling, the
1780 annul bit will be cleared.
1782 For each insn that is merged, if the branch is or will be non-annulling,
1783 we delete the merged insn. */
1786 try_merge_delay_insns (insn, thread)
1789 rtx trial, next_trial;
1790 rtx delay_insn = XVECEXP (PATTERN (insn), 0, 0);
1791 int annul_p = INSN_ANNULLED_BRANCH_P (delay_insn);
1792 int slot_number = 1;
1793 int num_slots = XVECLEN (PATTERN (insn), 0);
1794 rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1795 struct resources set, needed;
1796 rtx merged_insns = 0;
1800 flags = get_jump_flags (delay_insn, JUMP_LABEL (delay_insn));
1802 CLEAR_RESOURCE (&needed);
1803 CLEAR_RESOURCE (&set);
1805 /* If this is not an annulling branch, take into account anything needed in
1806 NEXT_TO_MATCH. This prevents two increments from being incorrectly
1807 folded into one. If we are annulling, this would be the correct
1808 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1809 will essentially disable this optimization. This method is somewhat of
1810 a kludge, but I don't see a better way.) */
1812 mark_referenced_resources (next_to_match, &needed, 1);
1814 for (trial = thread; !stop_search_p (trial, 1); trial = next_trial)
1816 rtx pat = PATTERN (trial);
1817 rtx oldtrial = trial;
1819 next_trial = next_nonnote_insn (trial);
1821 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1822 if (GET_CODE (trial) == INSN
1823 && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER))
1826 if (GET_CODE (next_to_match) == GET_CODE (trial)
1828 /* We can't share an insn that sets cc0. */
1829 && ! sets_cc0_p (pat)
1831 && ! insn_references_resource_p (trial, &set, 1)
1832 && ! insn_sets_resource_p (trial, &set, 1)
1833 && ! insn_sets_resource_p (trial, &needed, 1)
1834 && (trial = try_split (pat, trial, 0)) != 0
1835 /* Update next_trial, in case try_split succeeded. */
1836 && (next_trial = next_nonnote_insn (trial))
1837 /* Likewise THREAD. */
1838 && (thread = oldtrial == thread ? trial : thread)
1839 && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial))
1840 /* Have to test this condition if annul condition is different
1841 from (and less restrictive than) non-annulling one. */
1842 && eligible_for_delay (delay_insn, slot_number - 1, trial, flags))
1847 update_block (trial, thread);
1848 if (trial == thread)
1849 thread = next_active_insn (thread);
1851 delete_insn (trial);
1852 INSN_FROM_TARGET_P (next_to_match) = 0;
1855 merged_insns = gen_rtx (INSN_LIST, VOIDmode, trial, merged_insns);
1857 if (++slot_number == num_slots)
1860 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1862 mark_referenced_resources (next_to_match, &needed, 1);
1865 mark_set_resources (trial, &set, 0, 1);
1866 mark_referenced_resources (trial, &needed, 1);
1869 /* See if we stopped on a filled insn. If we did, try to see if its
1870 delay slots match. */
1871 if (slot_number != num_slots
1872 && trial && GET_CODE (trial) == INSN
1873 && GET_CODE (PATTERN (trial)) == SEQUENCE
1874 && ! INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0)))
1876 rtx pat = PATTERN (trial);
1877 rtx filled_insn = XVECEXP (pat, 0, 0);
1879 /* Account for resources set/needed by the filled insn. */
1880 mark_set_resources (filled_insn, &set, 0, 1);
1881 mark_referenced_resources (filled_insn, &needed, 1);
1883 for (i = 1; i < XVECLEN (pat, 0); i++)
1885 rtx dtrial = XVECEXP (pat, 0, i);
1887 if (! insn_references_resource_p (dtrial, &set, 1)
1888 && ! insn_sets_resource_p (dtrial, &set, 1)
1889 && ! insn_sets_resource_p (dtrial, &needed, 1)
1891 && ! sets_cc0_p (PATTERN (dtrial))
1893 && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial))
1894 && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags))
1898 update_block (dtrial, thread);
1899 delete_from_delay_slot (dtrial);
1900 INSN_FROM_TARGET_P (next_to_match) = 0;
1903 merged_insns = gen_rtx (INSN_LIST, SImode, dtrial,
1906 if (++slot_number == num_slots)
1909 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1914 /* If all insns in the delay slot have been matched and we were previously
1915 annulling the branch, we need not any more. In that case delete all the
1916 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn the
1917 the delay list so that we know that it isn't only being used at the
1919 if (slot_number == num_slots && annul_p)
1921 for (; merged_insns; merged_insns = XEXP (merged_insns, 1))
1923 if (GET_MODE (merged_insns) == SImode)
1925 update_block (XEXP (merged_insns, 0), thread);
1926 delete_from_delay_slot (XEXP (merged_insns, 0));
1930 update_block (XEXP (merged_insns, 0), thread);
1931 delete_insn (XEXP (merged_insns, 0));
1935 INSN_ANNULLED_BRANCH_P (delay_insn) = 0;
1937 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1938 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0;
1942 /* See if INSN is redundant with an insn in front of TARGET. Often this
1943 is called when INSN is a candidate for a delay slot of TARGET.
1944 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1945 of INSN. Often INSN will be redundant with an insn in a delay slot of
1946 some previous insn. This happens when we have a series of branches to the
1947 same label; in that case the first insn at the target might want to go
1948 into each of the delay slots.
1950 If we are not careful, this routine can take up a significant fraction
1951 of the total compilation time (4%), but only wins rarely. Hence we
1952 speed this routine up by making two passes. The first pass goes back
1953 until it hits a label and sees if it find an insn with an identical
1954 pattern. Only in this (relatively rare) event does it check for
1957 We do not split insns we encounter. This could cause us not to find a
1958 redundant insn, but the cost of splitting seems greater than the possible
1959 gain in rare cases. */
1962 redundant_insn (insn, target, delay_list)
1967 rtx target_main = target;
1968 rtx ipat = PATTERN (insn);
1970 struct resources needed, set;
1973 /* Scan backwards looking for a match. */
1974 for (trial = PREV_INSN (target); trial; trial = PREV_INSN (trial))
1976 if (GET_CODE (trial) == CODE_LABEL)
1979 if (GET_RTX_CLASS (GET_CODE (trial)) != 'i')
1982 pat = PATTERN (trial);
1983 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1986 if (GET_CODE (pat) == SEQUENCE)
1988 /* Stop for a CALL and its delay slots because it is difficult to
1989 track its resource needs correctly. */
1990 if (GET_CODE (XVECEXP (pat, 0, 0)) == CALL_INSN)
1993 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1994 slots because it is difficult to track its resource needs
1997 #ifdef INSN_SETS_ARE_DELAYED
1998 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0)))
2002 #ifdef INSN_REFERENCES_ARE_DELAYED
2003 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0)))
2007 /* See if any of the insns in the delay slot match, updating
2008 resource requirements as we go. */
2009 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
2010 if (GET_CODE (XVECEXP (pat, 0, i)) == GET_CODE (insn)
2011 && rtx_equal_p (PATTERN (XVECEXP (pat, 0, i)), ipat))
2014 /* If found a match, exit this loop early. */
2019 else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat))
2023 /* If we didn't find an insn that matches, return 0. */
2027 /* See what resources this insn sets and needs. If they overlap, or
2028 if this insn references CC0, it can't be redundant. */
2030 CLEAR_RESOURCE (&needed);
2031 CLEAR_RESOURCE (&set);
2032 mark_set_resources (insn, &set, 0, 1);
2033 mark_referenced_resources (insn, &needed, 1);
2035 /* If TARGET is a SEQUENCE, get the main insn. */
2036 if (GET_CODE (target) == INSN && GET_CODE (PATTERN (target)) == SEQUENCE)
2037 target_main = XVECEXP (PATTERN (target), 0, 0);
2039 if (resource_conflicts_p (&needed, &set)
2041 || reg_mentioned_p (cc0_rtx, ipat)
2043 /* The insn requiring the delay may not set anything needed or set by
2045 || insn_sets_resource_p (target_main, &needed, 1)
2046 || insn_sets_resource_p (target_main, &set, 1))
2049 /* Insns we pass may not set either NEEDED or SET, so merge them for
2051 needed.memory |= set.memory;
2052 needed.unch_memory |= set.unch_memory;
2053 IOR_HARD_REG_SET (needed.regs, set.regs);
2055 /* This insn isn't redundant if it conflicts with an insn that either is
2056 or will be in a delay slot of TARGET. */
2060 if (insn_sets_resource_p (XEXP (delay_list, 0), &needed, 1))
2062 delay_list = XEXP (delay_list, 1);
2065 if (GET_CODE (target) == INSN && GET_CODE (PATTERN (target)) == SEQUENCE)
2066 for (i = 1; i < XVECLEN (PATTERN (target), 0); i++)
2067 if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed, 1))
2070 /* Scan backwards until we reach a label or an insn that uses something
2071 INSN sets or sets something insn uses or sets. */
2073 for (trial = PREV_INSN (target);
2074 trial && GET_CODE (trial) != CODE_LABEL;
2075 trial = PREV_INSN (trial))
2077 if (GET_CODE (trial) != INSN && GET_CODE (trial) != CALL_INSN
2078 && GET_CODE (trial) != JUMP_INSN)
2081 pat = PATTERN (trial);
2082 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2085 if (GET_CODE (pat) == SEQUENCE)
2087 /* If this is a CALL_INSN and its delay slots, it is hard to track
2088 the resource needs properly, so give up. */
2089 if (GET_CODE (XVECEXP (pat, 0, 0)) == CALL_INSN)
2092 /* If this this is an INSN or JUMP_INSN with delayed effects, it
2093 is hard to track the resource needs properly, so give up. */
2095 #ifdef INSN_SETS_ARE_DELAYED
2096 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0)))
2100 #ifdef INSN_REFERENCES_ARE_DELAYED
2101 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0)))
2105 /* See if any of the insns in the delay slot match, updating
2106 resource requirements as we go. */
2107 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
2109 rtx candidate = XVECEXP (pat, 0, i);
2111 /* If an insn will be annulled if the branch is false, it isn't
2112 considered as a possible duplicate insn. */
2113 if (rtx_equal_p (PATTERN (candidate), ipat)
2114 && ! (INSN_ANNULLED_BRANCH_P (XVECEXP (pat, 0, 0))
2115 && INSN_FROM_TARGET_P (candidate)))
2117 /* Show that this insn will be used in the sequel. */
2118 INSN_FROM_TARGET_P (candidate) = 0;
2122 /* Unless this is an annulled insn from the target of a branch,
2123 we must stop if it sets anything needed or set by INSN. */
2124 if ((! INSN_ANNULLED_BRANCH_P (XVECEXP (pat, 0, 0))
2125 || ! INSN_FROM_TARGET_P (candidate))
2126 && insn_sets_resource_p (candidate, &needed, 1))
2131 /* If the insn requiring the delay slot conflicts with INSN, we
2133 if (insn_sets_resource_p (XVECEXP (pat, 0, 0), &needed, 1))
2138 /* See if TRIAL is the same as INSN. */
2139 pat = PATTERN (trial);
2140 if (rtx_equal_p (pat, ipat))
2143 /* Can't go any further if TRIAL conflicts with INSN. */
2144 if (insn_sets_resource_p (trial, &needed, 1))
2152 /* Return 1 if THREAD can only be executed in one way. If LABEL is non-zero,
2153 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
2154 is non-zero, we are allowed to fall into this thread; otherwise, we are
2157 If LABEL is used more than one or we pass a label other than LABEL before
2158 finding an active insn, we do not own this thread. */
2161 own_thread_p (thread, label, allow_fallthrough)
2164 int allow_fallthrough;
2169 /* We don't own the function end. */
2173 /* Get the first active insn, or THREAD, if it is an active insn. */
2174 active_insn = next_active_insn (PREV_INSN (thread));
2176 for (insn = thread; insn != active_insn; insn = NEXT_INSN (insn))
2177 if (GET_CODE (insn) == CODE_LABEL
2178 && (insn != label || LABEL_NUSES (insn) != 1))
2181 if (allow_fallthrough)
2184 /* Ensure that we reach a BARRIER before any insn or label. */
2185 for (insn = prev_nonnote_insn (thread);
2186 insn == 0 || GET_CODE (insn) != BARRIER;
2187 insn = prev_nonnote_insn (insn))
2189 || GET_CODE (insn) == CODE_LABEL
2190 || (GET_CODE (insn) == INSN
2191 && GET_CODE (PATTERN (insn)) != USE
2192 && GET_CODE (PATTERN (insn)) != CLOBBER))
2198 /* Find the number of the basic block that starts closest to INSN. Return -1
2199 if we couldn't find such a basic block. */
2202 find_basic_block (insn)
2207 /* Scan backwards to the previous BARRIER. Then see if we can find a
2208 label that starts a basic block. Return the basic block number. */
2210 for (insn = prev_nonnote_insn (insn);
2211 insn && GET_CODE (insn) != BARRIER;
2212 insn = prev_nonnote_insn (insn))
2215 /* The start of the function is basic block zero. */
2219 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
2220 anything other than a CODE_LABEL or note, we can't find this code. */
2221 for (insn = next_nonnote_insn (insn);
2222 insn && GET_CODE (insn) == CODE_LABEL;
2223 insn = next_nonnote_insn (insn))
2225 for (i = 0; i < n_basic_blocks; i++)
2226 if (insn == basic_block_head[i])
2233 /* Called when INSN is being moved from a location near the target of a jump.
2234 We leave a marker of the form (use (INSN)) immediately in front
2235 of WHERE for mark_target_live_regs. These markers will be deleted when
2238 We used to try to update the live status of registers if WHERE is at
2239 the start of a basic block, but that can't work since we may remove a
2240 BARRIER in relax_delay_slots. */
2243 update_block (insn, where)
2249 /* Ignore if this was in a delay slot and it came from the target of
2251 if (INSN_FROM_TARGET_P (insn))
2254 emit_insn_before (gen_rtx (USE, VOIDmode, insn), where);
2256 /* INSN might be making a value live in a block where it didn't use to
2257 be. So recompute liveness information for this block. */
2259 b = find_basic_block (insn);
2264 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
2265 the basic block containing the jump. */
2268 reorg_redirect_jump (jump, nlabel)
2272 int b = find_basic_block (jump);
2277 return redirect_jump (jump, nlabel);
2280 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
2281 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
2282 that reference values used in INSN. If we find one, then we move the
2283 REG_DEAD note to INSN.
2285 This is needed to handle the case where an later insn (after INSN) has a
2286 REG_DEAD note for a register used by INSN, and this later insn subsequently
2287 gets moved before a CODE_LABEL because it is a redundant insn. In this
2288 case, mark_target_live_regs may be confused into thinking the register
2289 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
2292 update_reg_dead_notes (insn, delayed_insn)
2293 rtx insn, delayed_insn;
2297 for (p = next_nonnote_insn (insn); p != delayed_insn;
2298 p = next_nonnote_insn (p))
2299 for (link = REG_NOTES (p); link; link = next)
2301 next = XEXP (link, 1);
2303 if (REG_NOTE_KIND (link) != REG_DEAD
2304 || GET_CODE (XEXP (link, 0)) != REG)
2307 if (reg_referenced_p (XEXP (link, 0), PATTERN (insn)))
2309 /* Move the REG_DEAD note from P to INSN. */
2310 remove_note (p, link);
2311 XEXP (link, 1) = REG_NOTES (insn);
2312 REG_NOTES (insn) = link;
2317 /* Called when an insn redundant with start_insn is deleted. If there
2318 is a REG_DEAD note for the target of start_insn between start_insn
2319 and stop_insn, then the REG_DEAD note needs to be deleted since the
2320 value no longer dies there.
2322 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
2323 confused into thinking the register is dead. */
2326 fix_reg_dead_note (start_insn, stop_insn)
2327 rtx start_insn, stop_insn;
2331 for (p = next_nonnote_insn (start_insn); p != stop_insn;
2332 p = next_nonnote_insn (p))
2333 for (link = REG_NOTES (p); link; link = next)
2335 next = XEXP (link, 1);
2337 if (REG_NOTE_KIND (link) != REG_DEAD
2338 || GET_CODE (XEXP (link, 0)) != REG)
2341 if (reg_set_p (XEXP (link, 0), PATTERN (start_insn)))
2343 remove_note (p, link);
2349 /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN.
2351 This handles the case of udivmodXi4 instructions which optimize their
2352 output depending on whether any REG_UNUSED notes are present.
2353 we must make sure that INSN calculates as many results as REDUNDANT_INSN
2357 update_reg_unused_notes (insn, redundant_insn)
2358 rtx insn, redundant_insn;
2362 for (link = REG_NOTES (insn); link; link = next)
2364 next = XEXP (link, 1);
2366 if (REG_NOTE_KIND (link) != REG_UNUSED
2367 || GET_CODE (XEXP (link, 0)) != REG)
2370 if (! find_regno_note (redundant_insn, REG_UNUSED,
2371 REGNO (XEXP (link, 0))))
2372 remove_note (insn, link);
2376 /* Marks registers possibly live at the current place being scanned by
2377 mark_target_live_regs. Used only by next two function. */
2379 static HARD_REG_SET current_live_regs;
2381 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
2382 Also only used by the next two functions. */
2384 static HARD_REG_SET pending_dead_regs;
2386 /* Utility function called from mark_target_live_regs via note_stores.
2387 It deadens any CLOBBERed registers and livens any SET registers. */
2390 update_live_status (dest, x)
2394 int first_regno, last_regno;
2397 if (GET_CODE (dest) != REG
2398 && (GET_CODE (dest) != SUBREG || GET_CODE (SUBREG_REG (dest)) != REG))
2401 if (GET_CODE (dest) == SUBREG)
2402 first_regno = REGNO (SUBREG_REG (dest)) + SUBREG_WORD (dest);
2404 first_regno = REGNO (dest);
2406 last_regno = first_regno + HARD_REGNO_NREGS (first_regno, GET_MODE (dest));
2408 if (GET_CODE (x) == CLOBBER)
2409 for (i = first_regno; i < last_regno; i++)
2410 CLEAR_HARD_REG_BIT (current_live_regs, i);
2412 for (i = first_regno; i < last_regno; i++)
2414 SET_HARD_REG_BIT (current_live_regs, i);
2415 CLEAR_HARD_REG_BIT (pending_dead_regs, i);
2419 /* Similar to next_insn, but ignores insns in the delay slots of
2420 an annulled branch. */
2423 next_insn_no_annul (insn)
2428 /* If INSN is an annulled branch, skip any insns from the target
2430 if (INSN_ANNULLED_BRANCH_P (insn)
2431 && NEXT_INSN (PREV_INSN (insn)) != insn)
2432 while (INSN_FROM_TARGET_P (NEXT_INSN (insn)))
2433 insn = NEXT_INSN (insn);
2435 insn = NEXT_INSN (insn);
2436 if (insn && GET_CODE (insn) == INSN
2437 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2438 insn = XVECEXP (PATTERN (insn), 0, 0);
2444 /* A subroutine of mark_target_live_regs. Search forward from TARGET
2445 looking for registers that are set before they are used. These are dead.
2446 Stop after passing a few conditional jumps, and/or a small
2447 number of unconditional branches. */
2450 find_dead_or_set_registers (target, res, jump_target, jump_count, set, needed)
2452 struct resources *res;
2455 struct resources set, needed;
2457 HARD_REG_SET scratch;
2462 for (insn = target; insn; insn = next)
2464 rtx this_jump_insn = insn;
2466 next = NEXT_INSN (insn);
2467 switch (GET_CODE (insn))
2470 /* After a label, any pending dead registers that weren't yet
2471 used can be made dead. */
2472 AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs);
2473 AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs);
2474 CLEAR_HARD_REG_SET (pending_dead_regs);
2476 if (CODE_LABEL_NUMBER (insn) < max_label_num_after_reload)
2478 /* All spill registers are dead at a label, so kill all of the
2479 ones that aren't needed also. */
2480 COPY_HARD_REG_SET (scratch, used_spill_regs);
2481 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
2482 AND_COMPL_HARD_REG_SET (res->regs, scratch);
2491 if (GET_CODE (PATTERN (insn)) == USE)
2493 /* If INSN is a USE made by update_block, we care about the
2494 underlying insn. Any registers set by the underlying insn
2495 are live since the insn is being done somewhere else. */
2496 if (GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn), 0))) == 'i')
2497 mark_set_resources (XEXP (PATTERN (insn), 0), res, 0, 1);
2499 /* All other USE insns are to be ignored. */
2502 else if (GET_CODE (PATTERN (insn)) == CLOBBER)
2504 else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
2506 /* An unconditional jump can be used to fill the delay slot
2507 of a call, so search for a JUMP_INSN in any position. */
2508 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2510 this_jump_insn = XVECEXP (PATTERN (insn), 0, i);
2511 if (GET_CODE (this_jump_insn) == JUMP_INSN)
2517 if (GET_CODE (this_jump_insn) == JUMP_INSN)
2519 if (jump_count++ < 10)
2521 if (simplejump_p (this_jump_insn)
2522 || GET_CODE (PATTERN (this_jump_insn)) == RETURN)
2524 next = JUMP_LABEL (this_jump_insn);
2529 *jump_target = JUMP_LABEL (this_jump_insn);
2532 else if (condjump_p (this_jump_insn)
2533 || condjump_in_parallel_p (this_jump_insn))
2535 struct resources target_set, target_res;
2536 struct resources fallthrough_res;
2538 /* We can handle conditional branches here by following
2539 both paths, and then IOR the results of the two paths
2540 together, which will give us registers that are dead
2541 on both paths. Since this is expensive, we give it
2542 a much higher cost than unconditional branches. The
2543 cost was chosen so that we will follow at most 1
2544 conditional branch. */
2547 if (jump_count >= 10)
2550 mark_referenced_resources (insn, &needed, 1);
2552 /* For an annulled branch, mark_set_resources ignores slots
2553 filled by instructions from the target. This is correct
2554 if the branch is not taken. Since we are following both
2555 paths from the branch, we must also compute correct info
2556 if the branch is taken. We do this by inverting all of
2557 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
2558 and then inverting the INSN_FROM_TARGET_P bits again. */
2560 if (GET_CODE (PATTERN (insn)) == SEQUENCE
2561 && INSN_ANNULLED_BRANCH_P (this_jump_insn))
2563 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
2564 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
2565 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
2568 mark_set_resources (insn, &target_set, 0, 1);
2570 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
2571 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
2572 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
2574 mark_set_resources (insn, &set, 0, 1);
2578 mark_set_resources (insn, &set, 0, 1);
2583 COPY_HARD_REG_SET (scratch, target_set.regs);
2584 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
2585 AND_COMPL_HARD_REG_SET (target_res.regs, scratch);
2587 fallthrough_res = *res;
2588 COPY_HARD_REG_SET (scratch, set.regs);
2589 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
2590 AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
2592 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn),
2593 &target_res, 0, jump_count,
2594 target_set, needed);
2595 find_dead_or_set_registers (next,
2596 &fallthrough_res, 0, jump_count,
2598 IOR_HARD_REG_SET (fallthrough_res.regs, target_res.regs);
2599 AND_HARD_REG_SET (res->regs, fallthrough_res.regs);
2607 /* Don't try this optimization if we expired our jump count
2608 above, since that would mean there may be an infinite loop
2609 in the function being compiled. */
2615 mark_referenced_resources (insn, &needed, 1);
2616 mark_set_resources (insn, &set, 0, 1);
2618 COPY_HARD_REG_SET (scratch, set.regs);
2619 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
2620 AND_COMPL_HARD_REG_SET (res->regs, scratch);
2626 /* Set the resources that are live at TARGET.
2628 If TARGET is zero, we refer to the end of the current function and can
2629 return our precomputed value.
2631 Otherwise, we try to find out what is live by consulting the basic block
2632 information. This is tricky, because we must consider the actions of
2633 reload and jump optimization, which occur after the basic block information
2636 Accordingly, we proceed as follows::
2638 We find the previous BARRIER and look at all immediately following labels
2639 (with no intervening active insns) to see if any of them start a basic
2640 block. If we hit the start of the function first, we use block 0.
2642 Once we have found a basic block and a corresponding first insns, we can
2643 accurately compute the live status from basic_block_live_regs and
2644 reg_renumber. (By starting at a label following a BARRIER, we are immune
2645 to actions taken by reload and jump.) Then we scan all insns between
2646 that point and our target. For each CLOBBER (or for call-clobbered regs
2647 when we pass a CALL_INSN), mark the appropriate registers are dead. For
2648 a SET, mark them as live.
2650 We have to be careful when using REG_DEAD notes because they are not
2651 updated by such things as find_equiv_reg. So keep track of registers
2652 marked as dead that haven't been assigned to, and mark them dead at the
2653 next CODE_LABEL since reload and jump won't propagate values across labels.
2655 If we cannot find the start of a basic block (should be a very rare
2656 case, if it can happen at all), mark everything as potentially live.
2658 Next, scan forward from TARGET looking for things set or clobbered
2659 before they are used. These are not live.
2661 Because we can be called many times on the same target, save our results
2662 in a hash table indexed by INSN_UID. */
2665 mark_target_live_regs (target, res)
2667 struct resources *res;
2671 struct target_info *tinfo;
2675 HARD_REG_SET scratch;
2676 struct resources set, needed;
2679 /* Handle end of function. */
2682 *res = end_of_function_needs;
2686 /* We have to assume memory is needed, but the CC isn't. */
2688 res->volatil = res->unch_memory = 0;
2691 /* See if we have computed this value already. */
2692 for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
2693 tinfo; tinfo = tinfo->next)
2694 if (tinfo->uid == INSN_UID (target))
2697 /* Start by getting the basic block number. If we have saved information,
2698 we can get it from there unless the insn at the start of the basic block
2699 has been deleted. */
2700 if (tinfo && tinfo->block != -1
2701 && ! INSN_DELETED_P (basic_block_head[tinfo->block]))
2705 b = find_basic_block (target);
2709 /* If the information is up-to-date, use it. Otherwise, we will
2711 if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b])
2713 COPY_HARD_REG_SET (res->regs, tinfo->live_regs);
2719 /* Allocate a place to put our results and chain it into the
2721 tinfo = (struct target_info *) oballoc (sizeof (struct target_info));
2722 tinfo->uid = INSN_UID (target);
2724 tinfo->next = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
2725 target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo;
2728 CLEAR_HARD_REG_SET (pending_dead_regs);
2730 /* If we found a basic block, get the live registers from it and update
2731 them with anything set or killed between its start and the insn before
2732 TARGET. Otherwise, we must assume everything is live. */
2735 regset regs_live = basic_block_live_at_start[b];
2737 REGSET_ELT_TYPE bit;
2739 rtx start_insn, stop_insn;
2741 /* Compute hard regs live at start of block -- this is the real hard regs
2742 marked live, plus live pseudo regs that have been renumbered to
2746 current_live_regs = *regs_live;
2748 COPY_HARD_REG_SET (current_live_regs, regs_live);
2751 for (offset = 0, i = 0; offset < regset_size; offset++)
2753 if (regs_live[offset] == 0)
2754 i += REGSET_ELT_BITS;
2756 for (bit = 1; bit && i < max_regno; bit <<= 1, i++)
2757 if ((regs_live[offset] & bit)
2758 && (regno = reg_renumber[i]) >= 0)
2760 j < regno + HARD_REGNO_NREGS (regno,
2761 PSEUDO_REGNO_MODE (i));
2763 SET_HARD_REG_BIT (current_live_regs, j);
2766 /* Get starting and ending insn, handling the case where each might
2768 start_insn = (b == 0 ? get_insns () : basic_block_head[b]);
2771 if (GET_CODE (start_insn) == INSN
2772 && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
2773 start_insn = XVECEXP (PATTERN (start_insn), 0, 0);
2775 if (GET_CODE (stop_insn) == INSN
2776 && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
2777 stop_insn = next_insn (PREV_INSN (stop_insn));
2779 for (insn = start_insn; insn != stop_insn;
2780 insn = next_insn_no_annul (insn))
2783 rtx real_insn = insn;
2785 /* If this insn is from the target of a branch, it isn't going to
2786 be used in the sequel. If it is used in both cases, this
2787 test will not be true. */
2788 if (INSN_FROM_TARGET_P (insn))
2791 /* If this insn is a USE made by update_block, we care about the
2793 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == USE
2794 && GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn), 0))) == 'i')
2795 real_insn = XEXP (PATTERN (insn), 0);
2797 if (GET_CODE (real_insn) == CALL_INSN)
2799 /* CALL clobbers all call-used regs that aren't fixed except
2800 sp, ap, and fp. Do this before setting the result of the
2802 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2803 if (call_used_regs[i]
2804 && i != STACK_POINTER_REGNUM && i != FRAME_POINTER_REGNUM
2805 && i != ARG_POINTER_REGNUM
2806 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
2807 && i != HARD_FRAME_POINTER_REGNUM
2809 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
2810 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
2812 #ifdef PIC_OFFSET_TABLE_REGNUM
2813 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
2816 CLEAR_HARD_REG_BIT (current_live_regs, i);
2818 /* A CALL_INSN sets any global register live, since it may
2819 have been modified by the call. */
2820 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2822 SET_HARD_REG_BIT (current_live_regs, i);
2825 /* Mark anything killed in an insn to be deadened at the next
2826 label. Ignore USE insns; the only REG_DEAD notes will be for
2827 parameters. But they might be early. A CALL_INSN will usually
2828 clobber registers used for parameters. It isn't worth bothering
2829 with the unlikely case when it won't. */
2830 if ((GET_CODE (real_insn) == INSN
2831 && GET_CODE (PATTERN (real_insn)) != USE
2832 && GET_CODE (PATTERN (real_insn)) != CLOBBER)
2833 || GET_CODE (real_insn) == JUMP_INSN
2834 || GET_CODE (real_insn) == CALL_INSN)
2836 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
2837 if (REG_NOTE_KIND (link) == REG_DEAD
2838 && GET_CODE (XEXP (link, 0)) == REG
2839 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
2841 int first_regno = REGNO (XEXP (link, 0));
2844 + HARD_REGNO_NREGS (first_regno,
2845 GET_MODE (XEXP (link, 0))));
2847 for (i = first_regno; i < last_regno; i++)
2848 SET_HARD_REG_BIT (pending_dead_regs, i);
2851 note_stores (PATTERN (real_insn), update_live_status);
2853 /* If any registers were unused after this insn, kill them.
2854 These notes will always be accurate. */
2855 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
2856 if (REG_NOTE_KIND (link) == REG_UNUSED
2857 && GET_CODE (XEXP (link, 0)) == REG
2858 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
2860 int first_regno = REGNO (XEXP (link, 0));
2863 + HARD_REGNO_NREGS (first_regno,
2864 GET_MODE (XEXP (link, 0))));
2866 for (i = first_regno; i < last_regno; i++)
2867 CLEAR_HARD_REG_BIT (current_live_regs, i);
2871 else if (GET_CODE (real_insn) == CODE_LABEL)
2873 /* A label clobbers the pending dead registers since neither
2874 reload nor jump will propagate a value across a label. */
2875 AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs);
2876 CLEAR_HARD_REG_SET (pending_dead_regs);
2879 /* The beginning of the epilogue corresponds to the end of the
2880 RTL chain when there are no epilogue insns. Certain resources
2881 are implicitly required at that point. */
2882 else if (GET_CODE (real_insn) == NOTE
2883 && NOTE_LINE_NUMBER (real_insn) == NOTE_INSN_EPILOGUE_BEG)
2884 IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
2887 COPY_HARD_REG_SET (res->regs, current_live_regs);
2889 tinfo->bb_tick = bb_ticks[b];
2892 /* We didn't find the start of a basic block. Assume everything
2893 in use. This should happen only extremely rarely. */
2894 SET_HARD_REG_SET (res->regs);
2896 CLEAR_RESOURCE (&set);
2897 CLEAR_RESOURCE (&needed);
2899 jump_insn = find_dead_or_set_registers (target, res, &jump_target, 0,
2902 /* If we hit an unconditional branch, we have another way of finding out
2903 what is live: we can see what is live at the branch target and include
2904 anything used but not set before the branch. The only things that are
2905 live are those that are live using the above test and the test below. */
2909 struct resources new_resources;
2910 rtx stop_insn = next_active_insn (jump_insn);
2912 mark_target_live_regs (next_active_insn (jump_target), &new_resources);
2913 CLEAR_RESOURCE (&set);
2914 CLEAR_RESOURCE (&needed);
2916 /* Include JUMP_INSN in the needed registers. */
2917 for (insn = target; insn != stop_insn; insn = next_active_insn (insn))
2919 mark_referenced_resources (insn, &needed, 1);
2921 COPY_HARD_REG_SET (scratch, needed.regs);
2922 AND_COMPL_HARD_REG_SET (scratch, set.regs);
2923 IOR_HARD_REG_SET (new_resources.regs, scratch);
2925 mark_set_resources (insn, &set, 0, 1);
2928 AND_HARD_REG_SET (res->regs, new_resources.regs);
2931 COPY_HARD_REG_SET (tinfo->live_regs, res->regs);
2934 /* Scan a function looking for insns that need a delay slot and find insns to
2935 put into the delay slot.
2937 NON_JUMPS_P is non-zero if we are to only try to fill non-jump insns (such
2938 as calls). We do these first since we don't want jump insns (that are
2939 easier to fill) to get the only insns that could be used for non-jump insns.
2940 When it is zero, only try to fill JUMP_INSNs.
2942 When slots are filled in this manner, the insns (including the
2943 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
2944 it is possible to tell whether a delay slot has really been filled
2945 or not. `final' knows how to deal with this, by communicating
2946 through FINAL_SEQUENCE. */
2949 fill_simple_delay_slots (first, non_jumps_p)
2953 register rtx insn, pat, trial, next_trial;
2955 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2956 struct resources needed, set;
2957 int slots_to_fill, slots_filled;
2960 for (i = 0; i < num_unfilled_slots; i++)
2963 /* Get the next insn to fill. If it has already had any slots assigned,
2964 we can't do anything with it. Maybe we'll improve this later. */
2966 insn = unfilled_slots_base[i];
2968 || INSN_DELETED_P (insn)
2969 || (GET_CODE (insn) == INSN
2970 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2971 || (GET_CODE (insn) == JUMP_INSN && non_jumps_p)
2972 || (GET_CODE (insn) != JUMP_INSN && ! non_jumps_p))
2975 if (GET_CODE (insn) == JUMP_INSN)
2976 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2978 flags = get_jump_flags (insn, NULL_RTX);
2979 slots_to_fill = num_delay_slots (insn);
2980 if (slots_to_fill == 0)
2983 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
2984 says how many. After initialization, first try optimizing
2987 nop add %o7,.-L1,%o7
2991 If this case applies, the delay slot of the call is filled with
2992 the unconditional jump. This is done first to avoid having the
2993 delay slot of the call filled in the backward scan. Also, since
2994 the unconditional jump is likely to also have a delay slot, that
2995 insn must exist when it is subsequently scanned.
2997 This is tried on each insn with delay slots as some machines
2998 have insns which perform calls, but are not represented as
3004 if ((trial = next_active_insn (insn))
3005 && GET_CODE (trial) == JUMP_INSN
3006 && simplejump_p (trial)
3007 && eligible_for_delay (insn, slots_filled, trial, flags)
3008 && no_labels_between_p (insn, trial))
3012 delay_list = add_to_delay_list (trial, delay_list);
3014 /* TRIAL may have had its delay slot filled, then unfilled. When
3015 the delay slot is unfilled, TRIAL is placed back on the unfilled
3016 slots obstack. Unfortunately, it is placed on the end of the
3017 obstack, not in its original location. Therefore, we must search
3018 from entry i + 1 to the end of the unfilled slots obstack to
3019 try and find TRIAL. */
3020 tmp = &unfilled_slots_base[i + 1];
3021 while (*tmp != trial && tmp != unfilled_slots_next)
3024 /* Remove the unconditional jump from consideration for delay slot
3025 filling and unthread it. */
3029 rtx next = NEXT_INSN (trial);
3030 rtx prev = PREV_INSN (trial);
3032 NEXT_INSN (prev) = next;
3034 PREV_INSN (next) = prev;
3038 /* Now, scan backwards from the insn to search for a potential
3039 delay-slot candidate. Stop searching when a label or jump is hit.
3041 For each candidate, if it is to go into the delay slot (moved
3042 forward in execution sequence), it must not need or set any resources
3043 that were set by later insns and must not set any resources that
3044 are needed for those insns.
3046 The delay slot insn itself sets resources unless it is a call
3047 (in which case the called routine, not the insn itself, is doing
3050 if (slots_filled < slots_to_fill)
3052 CLEAR_RESOURCE (&needed);
3053 CLEAR_RESOURCE (&set);
3054 mark_set_resources (insn, &set, 0, 0);
3055 mark_referenced_resources (insn, &needed, 0);
3057 for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1);
3060 next_trial = prev_nonnote_insn (trial);
3062 /* This must be an INSN or CALL_INSN. */
3063 pat = PATTERN (trial);
3065 /* USE and CLOBBER at this level was just for flow; ignore it. */
3066 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
3069 /* Check for resource conflict first, to avoid unnecessary
3071 if (! insn_references_resource_p (trial, &set, 1)
3072 && ! insn_sets_resource_p (trial, &set, 1)
3073 && ! insn_sets_resource_p (trial, &needed, 1)
3075 /* Can't separate set of cc0 from its use. */
3076 && ! (reg_mentioned_p (cc0_rtx, pat)
3077 && ! sets_cc0_p (cc0_rtx, pat))
3081 trial = try_split (pat, trial, 1);
3082 next_trial = prev_nonnote_insn (trial);
3083 if (eligible_for_delay (insn, slots_filled, trial, flags))
3085 /* In this case, we are searching backward, so if we
3086 find insns to put on the delay list, we want
3087 to put them at the head, rather than the
3088 tail, of the list. */
3090 update_reg_dead_notes (trial, insn);
3091 delay_list = gen_rtx (INSN_LIST, VOIDmode,
3093 update_block (trial, trial);
3094 delete_insn (trial);
3095 if (slots_to_fill == ++slots_filled)
3101 mark_set_resources (trial, &set, 0, 1);
3102 mark_referenced_resources (trial, &needed, 1);
3106 /* If all needed slots haven't been filled, we come here. */
3108 /* Try to optimize case of jumping around a single insn. */
3109 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
3110 if (slots_filled != slots_to_fill
3112 && GET_CODE (insn) == JUMP_INSN
3113 && (condjump_p (insn) || condjump_in_parallel_p (insn)))
3115 delay_list = optimize_skip (insn);
3121 /* Try to get insns from beyond the insn needing the delay slot.
3122 These insns can neither set or reference resources set in insns being
3123 skipped, cannot set resources in the insn being skipped, and, if this
3124 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
3125 call might not return).
3127 There used to be code which continued past the target label if
3128 we saw all uses of the target label. This code did not work,
3129 because it failed to account for some instructions which were
3130 both annulled and marked as from the target. This can happen as a
3131 result of optimize_skip. Since this code was redundant with
3132 fill_eager_delay_slots anyways, it was just deleted. */
3134 if (slots_filled != slots_to_fill
3135 && (GET_CODE (insn) != JUMP_INSN
3136 || ((condjump_p (insn) || condjump_in_parallel_p (insn))
3137 && ! simplejump_p (insn)
3138 && JUMP_LABEL (insn) != 0)))
3141 int maybe_never = 0;
3142 struct resources needed_at_jump;
3144 CLEAR_RESOURCE (&needed);
3145 CLEAR_RESOURCE (&set);
3147 if (GET_CODE (insn) == CALL_INSN)
3149 mark_set_resources (insn, &set, 0, 1);
3150 mark_referenced_resources (insn, &needed, 1);
3155 mark_set_resources (insn, &set, 0, 1);
3156 mark_referenced_resources (insn, &needed, 1);
3157 if (GET_CODE (insn) == JUMP_INSN)
3158 target = JUMP_LABEL (insn);
3161 for (trial = next_nonnote_insn (insn); trial; trial = next_trial)
3163 rtx pat, trial_delay;
3165 next_trial = next_nonnote_insn (trial);
3167 if (GET_CODE (trial) == CODE_LABEL
3168 || GET_CODE (trial) == BARRIER)
3171 /* We must have an INSN, JUMP_INSN, or CALL_INSN. */
3172 pat = PATTERN (trial);
3174 /* Stand-alone USE and CLOBBER are just for flow. */
3175 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
3178 /* If this already has filled delay slots, get the insn needing
3180 if (GET_CODE (pat) == SEQUENCE)
3181 trial_delay = XVECEXP (pat, 0, 0);
3183 trial_delay = trial;
3185 /* If this is a jump insn to our target, indicate that we have
3186 seen another jump to it. If we aren't handling a conditional
3187 jump, stop our search. Otherwise, compute the needs at its
3188 target and add them to NEEDED. */
3189 if (GET_CODE (trial_delay) == JUMP_INSN)
3193 else if (JUMP_LABEL (trial_delay) != target)
3195 mark_target_live_regs
3196 (next_active_insn (JUMP_LABEL (trial_delay)),
3198 needed.memory |= needed_at_jump.memory;
3199 needed.unch_memory |= needed_at_jump.unch_memory;
3200 IOR_HARD_REG_SET (needed.regs, needed_at_jump.regs);
3204 /* See if we have a resource problem before we try to
3207 && GET_CODE (pat) != SEQUENCE
3208 && ! insn_references_resource_p (trial, &set, 1)
3209 && ! insn_sets_resource_p (trial, &set, 1)
3210 && ! insn_sets_resource_p (trial, &needed, 1)
3212 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
3214 && ! (maybe_never && may_trap_p (pat))
3215 && (trial = try_split (pat, trial, 0))
3216 && eligible_for_delay (insn, slots_filled, trial, flags))
3218 next_trial = next_nonnote_insn (trial);
3219 delay_list = add_to_delay_list (trial, delay_list);
3222 if (reg_mentioned_p (cc0_rtx, pat))
3223 link_cc0_insns (trial);
3226 delete_insn (trial);
3227 if (slots_to_fill == ++slots_filled)
3232 mark_set_resources (trial, &set, 0, 1);
3233 mark_referenced_resources (trial, &needed, 1);
3235 /* Ensure we don't put insns between the setting of cc and the
3236 comparison by moving a setting of cc into an earlier delay
3237 slot since these insns could clobber the condition code. */
3240 /* If this is a call or jump, we might not get here. */
3241 if (GET_CODE (trial_delay) == CALL_INSN
3242 || GET_CODE (trial_delay) == JUMP_INSN)
3246 /* If there are slots left to fill and our search was stopped by an
3247 unconditional branch, try the insn at the branch target. We can
3248 redirect the branch if it works.
3250 Don't do this if the insn at the branch target is a branch. */
3251 if (slots_to_fill != slots_filled
3253 && GET_CODE (trial) == JUMP_INSN
3254 && simplejump_p (trial)
3255 && (target == 0 || JUMP_LABEL (trial) == target)
3256 && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0
3257 && ! (GET_CODE (next_trial) == INSN
3258 && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
3259 && GET_CODE (next_trial) != JUMP_INSN
3260 && ! insn_references_resource_p (next_trial, &set, 1)
3261 && ! insn_sets_resource_p (next_trial, &set, 1)
3262 && ! insn_sets_resource_p (next_trial, &needed, 1)
3264 && ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial))
3266 && ! (maybe_never && may_trap_p (PATTERN (next_trial)))
3267 && (next_trial = try_split (PATTERN (next_trial), next_trial, 0))
3268 && eligible_for_delay (insn, slots_filled, next_trial, flags))
3270 rtx new_label = next_active_insn (next_trial);
3273 new_label = get_label_before (new_label);
3275 new_label = find_end_label ();
3278 = add_to_delay_list (copy_rtx (next_trial), delay_list);
3280 reorg_redirect_jump (trial, new_label);
3282 /* If we merged because we both jumped to the same place,
3283 redirect the original insn also. */
3285 reorg_redirect_jump (insn, new_label);
3289 /* If this is an unconditional jump, then try to get insns from the
3290 target of the jump. */
3291 if (GET_CODE (insn) == JUMP_INSN
3292 && simplejump_p (insn)
3293 && slots_filled != slots_to_fill)
3295 = fill_slots_from_thread (insn, const_true_rtx,
3296 next_active_insn (JUMP_LABEL (insn)),
3298 own_thread_p (JUMP_LABEL (insn),
3299 JUMP_LABEL (insn), 0),
3300 0, slots_to_fill, &slots_filled);
3303 unfilled_slots_base[i]
3304 = emit_delay_sequence (insn, delay_list,
3305 slots_filled, slots_to_fill);
3307 if (slots_to_fill == slots_filled)
3308 unfilled_slots_base[i] = 0;
3310 note_delay_statistics (slots_filled, 0);
3313 #ifdef DELAY_SLOTS_FOR_EPILOGUE
3314 /* See if the epilogue needs any delay slots. Try to fill them if so.
3315 The only thing we can do is scan backwards from the end of the
3316 function. If we did this in a previous pass, it is incorrect to do it
3318 if (current_function_epilogue_delay_list)
3321 slots_to_fill = DELAY_SLOTS_FOR_EPILOGUE;
3322 if (slots_to_fill == 0)
3326 CLEAR_RESOURCE (&set);
3328 /* The frame pointer and stack pointer are needed at the beginning of
3329 the epilogue, so instructions setting them can not be put in the
3330 epilogue delay slot. However, everything else needed at function
3331 end is safe, so we don't want to use end_of_function_needs here. */
3332 CLEAR_RESOURCE (&needed);
3333 if (frame_pointer_needed)
3335 SET_HARD_REG_BIT (needed.regs, FRAME_POINTER_REGNUM);
3336 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3337 SET_HARD_REG_BIT (needed.regs, HARD_FRAME_POINTER_REGNUM);
3339 #ifdef EXIT_IGNORE_STACK
3340 if (! EXIT_IGNORE_STACK)
3342 SET_HARD_REG_BIT (needed.regs, STACK_POINTER_REGNUM);
3345 SET_HARD_REG_BIT (needed.regs, STACK_POINTER_REGNUM);
3347 #ifdef EPILOGUE_USES
3348 for (i = 0; i <FIRST_PSEUDO_REGISTER; i++)
3350 if (EPILOGUE_USES (i))
3351 SET_HARD_REG_BIT (needed.regs, i);
3355 for (trial = get_last_insn (); ! stop_search_p (trial, 1);
3356 trial = PREV_INSN (trial))
3358 if (GET_CODE (trial) == NOTE)
3360 pat = PATTERN (trial);
3361 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
3364 if (! insn_references_resource_p (trial, &set, 1)
3365 && ! insn_sets_resource_p (trial, &needed, 1)
3366 && ! insn_sets_resource_p (trial, &set, 1)
3368 /* Don't want to mess with cc0 here. */
3369 && ! reg_mentioned_p (cc0_rtx, pat)
3373 trial = try_split (pat, trial, 1);
3374 if (ELIGIBLE_FOR_EPILOGUE_DELAY (trial, slots_filled))
3376 /* Here as well we are searching backward, so put the
3377 insns we find on the head of the list. */
3379 current_function_epilogue_delay_list
3380 = gen_rtx (INSN_LIST, VOIDmode, trial,
3381 current_function_epilogue_delay_list);
3382 mark_referenced_resources (trial, &end_of_function_needs, 1);
3383 update_block (trial, trial);
3384 delete_insn (trial);
3386 /* Clear deleted bit so final.c will output the insn. */
3387 INSN_DELETED_P (trial) = 0;
3389 if (slots_to_fill == ++slots_filled)
3395 mark_set_resources (trial, &set, 0, 1);
3396 mark_referenced_resources (trial, &needed, 1);
3399 note_delay_statistics (slots_filled, 0);
3403 /* Try to find insns to place in delay slots.
3405 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
3406 or is an unconditional branch if CONDITION is const_true_rtx.
3407 *PSLOTS_FILLED is updated with the number of slots that we have filled.
3409 THREAD is a flow-of-control, either the insns to be executed if the
3410 branch is true or if the branch is false, THREAD_IF_TRUE says which.
3412 OPPOSITE_THREAD is the thread in the opposite direction. It is used
3413 to see if any potential delay slot insns set things needed there.
3415 LIKELY is non-zero if it is extremely likely that the branch will be
3416 taken and THREAD_IF_TRUE is set. This is used for the branch at the
3417 end of a loop back up to the top.
3419 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
3420 thread. I.e., it is the fallthrough code of our jump or the target of the
3421 jump when we are the only jump going there.
3423 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
3424 case, we can only take insns from the head of the thread for our delay
3425 slot. We then adjust the jump to point after the insns we have taken. */
3428 fill_slots_from_thread (insn, condition, thread, opposite_thread, likely,
3429 thread_if_true, own_thread, own_opposite_thread,
3430 slots_to_fill, pslots_filled)
3433 rtx thread, opposite_thread;
3436 int own_thread, own_opposite_thread;
3437 int slots_to_fill, *pslots_filled;
3441 struct resources opposite_needed, set, needed;
3447 /* Validate our arguments. */
3448 if ((condition == const_true_rtx && ! thread_if_true)
3449 || (! own_thread && ! thread_if_true))
3452 flags = get_jump_flags (insn, JUMP_LABEL (insn));
3454 /* If our thread is the end of subroutine, we can't get any delay
3459 /* If this is an unconditional branch, nothing is needed at the
3460 opposite thread. Otherwise, compute what is needed there. */
3461 if (condition == const_true_rtx)
3462 CLEAR_RESOURCE (&opposite_needed);
3464 mark_target_live_regs (opposite_thread, &opposite_needed);
3466 /* If the insn at THREAD can be split, do it here to avoid having to
3467 update THREAD and NEW_THREAD if it is done in the loop below. Also
3468 initialize NEW_THREAD. */
3470 new_thread = thread = try_split (PATTERN (thread), thread, 0);
3472 /* Scan insns at THREAD. We are looking for an insn that can be removed
3473 from THREAD (it neither sets nor references resources that were set
3474 ahead of it and it doesn't set anything needs by the insns ahead of
3475 it) and that either can be placed in an annulling insn or aren't
3476 needed at OPPOSITE_THREAD. */
3478 CLEAR_RESOURCE (&needed);
3479 CLEAR_RESOURCE (&set);
3481 /* If we do not own this thread, we must stop as soon as we find
3482 something that we can't put in a delay slot, since all we can do
3483 is branch into THREAD at a later point. Therefore, labels stop
3484 the search if this is not the `true' thread. */
3486 for (trial = thread;
3487 ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread);
3488 trial = next_nonnote_insn (trial))
3492 /* If we have passed a label, we no longer own this thread. */
3493 if (GET_CODE (trial) == CODE_LABEL)
3499 pat = PATTERN (trial);
3500 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
3503 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
3504 don't separate or copy insns that set and use CC0. */
3505 if (! insn_references_resource_p (trial, &set, 1)
3506 && ! insn_sets_resource_p (trial, &set, 1)
3507 && ! insn_sets_resource_p (trial, &needed, 1)
3509 && ! (reg_mentioned_p (cc0_rtx, pat)
3510 && (! own_thread || ! sets_cc0_p (pat)))
3516 /* If TRIAL is redundant with some insn before INSN, we don't
3517 actually need to add it to the delay list; we can merely pretend
3519 if (prior_insn = redundant_insn (trial, insn, delay_list))
3521 fix_reg_dead_note (prior_insn, insn);
3524 update_block (trial, thread);
3525 if (trial == thread)
3527 thread = next_active_insn (thread);
3528 if (new_thread == trial)
3529 new_thread = thread;
3532 delete_insn (trial);
3536 update_reg_unused_notes (prior_insn, trial);
3537 new_thread = next_active_insn (trial);
3543 /* There are two ways we can win: If TRIAL doesn't set anything
3544 needed at the opposite thread and can't trap, or if it can
3545 go into an annulled delay slot. */
3546 if (condition == const_true_rtx
3547 || (! insn_sets_resource_p (trial, &opposite_needed, 1)
3548 && ! may_trap_p (pat)))
3551 trial = try_split (pat, trial, 0);
3552 if (new_thread == old_trial)
3554 if (thread == old_trial)
3556 pat = PATTERN (trial);
3557 if (eligible_for_delay (insn, *pslots_filled, trial, flags))
3561 #ifdef ANNUL_IFTRUE_SLOTS
3564 #ifdef ANNUL_IFFALSE_SLOTS
3570 trial = try_split (pat, trial, 0);
3571 if (new_thread == old_trial)
3573 if (thread == old_trial)
3575 pat = PATTERN (trial);
3577 ? eligible_for_annul_false (insn, *pslots_filled, trial, flags)
3578 : eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
3586 if (reg_mentioned_p (cc0_rtx, pat))
3587 link_cc0_insns (trial);
3590 /* If we own this thread, delete the insn. If this is the
3591 destination of a branch, show that a basic block status
3592 may have been updated. In any case, mark the new
3593 starting point of this thread. */
3596 update_block (trial, thread);
3597 delete_insn (trial);
3600 new_thread = next_active_insn (trial);
3602 temp = own_thread ? trial : copy_rtx (trial);
3604 INSN_FROM_TARGET_P (temp) = 1;
3606 delay_list = add_to_delay_list (temp, delay_list);
3608 if (slots_to_fill == ++(*pslots_filled))
3610 /* Even though we have filled all the slots, we
3611 may be branching to a location that has a
3612 redundant insn. Skip any if so. */
3613 while (new_thread && ! own_thread
3614 && ! insn_sets_resource_p (new_thread, &set, 1)
3615 && ! insn_sets_resource_p (new_thread, &needed, 1)
3616 && ! insn_references_resource_p (new_thread,
3618 && redundant_insn (new_thread, insn, delay_list))
3619 new_thread = next_active_insn (new_thread);
3628 /* This insn can't go into a delay slot. */
3630 mark_set_resources (trial, &set, 0, 1);
3631 mark_referenced_resources (trial, &needed, 1);
3633 /* Ensure we don't put insns between the setting of cc and the comparison
3634 by moving a setting of cc into an earlier delay slot since these insns
3635 could clobber the condition code. */
3638 /* If this insn is a register-register copy and the next insn has
3639 a use of our destination, change it to use our source. That way,
3640 it will become a candidate for our delay slot the next time
3641 through this loop. This case occurs commonly in loops that
3644 We could check for more complex cases than those tested below,
3645 but it doesn't seem worth it. It might also be a good idea to try
3646 to swap the two insns. That might do better.
3648 We can't do this if the next insn modifies our destination, because
3649 that would make the replacement into the insn invalid. We also can't
3650 do this if it modifies our source, because it might be an earlyclobber
3651 operand. This latter test also prevents updating the contents of
3654 if (GET_CODE (trial) == INSN && GET_CODE (pat) == SET
3655 && GET_CODE (SET_SRC (pat)) == REG
3656 && GET_CODE (SET_DEST (pat)) == REG)
3658 rtx next = next_nonnote_insn (trial);
3660 if (next && GET_CODE (next) == INSN
3661 && GET_CODE (PATTERN (next)) != USE
3662 && ! reg_set_p (SET_DEST (pat), next)
3663 && ! reg_set_p (SET_SRC (pat), next)
3664 && reg_referenced_p (SET_DEST (pat), PATTERN (next)))
3665 validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next);
3669 /* If we stopped on a branch insn that has delay slots, see if we can
3670 steal some of the insns in those slots. */
3671 if (trial && GET_CODE (trial) == INSN
3672 && GET_CODE (PATTERN (trial)) == SEQUENCE
3673 && GET_CODE (XVECEXP (PATTERN (trial), 0, 0)) == JUMP_INSN)
3675 /* If this is the `true' thread, we will want to follow the jump,
3676 so we can only do this if we have taken everything up to here. */
3677 if (thread_if_true && trial == new_thread)
3679 = steal_delay_list_from_target (insn, condition, PATTERN (trial),
3680 delay_list, &set, &needed,
3681 &opposite_needed, slots_to_fill,
3682 pslots_filled, &must_annul,
3684 else if (! thread_if_true)
3686 = steal_delay_list_from_fallthrough (insn, condition,
3688 delay_list, &set, &needed,
3689 &opposite_needed, slots_to_fill,
3690 pslots_filled, &must_annul);
3693 /* If we haven't found anything for this delay slot and it is very
3694 likely that the branch will be taken, see if the insn at our target
3695 increments or decrements a register with an increment that does not
3696 depend on the destination register. If so, try to place the opposite
3697 arithmetic insn after the jump insn and put the arithmetic insn in the
3698 delay slot. If we can't do this, return. */
3699 if (delay_list == 0 && likely && new_thread && GET_CODE (new_thread) == INSN)
3701 rtx pat = PATTERN (new_thread);
3706 pat = PATTERN (trial);
3708 if (GET_CODE (trial) != INSN || GET_CODE (pat) != SET
3709 || ! eligible_for_delay (insn, 0, trial, flags))
3712 dest = SET_DEST (pat), src = SET_SRC (pat);
3713 if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS)
3714 && rtx_equal_p (XEXP (src, 0), dest)
3715 && ! reg_overlap_mentioned_p (dest, XEXP (src, 1)))
3717 rtx other = XEXP (src, 1);
3721 /* If this is a constant adjustment, use the same code with
3722 the negated constant. Otherwise, reverse the sense of the
3724 if (GET_CODE (other) == CONST_INT)
3725 new_arith = gen_rtx (GET_CODE (src), GET_MODE (src), dest,
3726 negate_rtx (GET_MODE (src), other));
3728 new_arith = gen_rtx (GET_CODE (src) == PLUS ? MINUS : PLUS,
3729 GET_MODE (src), dest, other);
3731 ninsn = emit_insn_after (gen_rtx (SET, VOIDmode, dest, new_arith),
3734 if (recog_memoized (ninsn) < 0
3735 || (insn_extract (ninsn),
3736 ! constrain_operands (INSN_CODE (ninsn), 1)))
3738 delete_insn (ninsn);
3744 update_block (trial, thread);
3745 delete_insn (trial);
3748 new_thread = next_active_insn (trial);
3750 ninsn = own_thread ? trial : copy_rtx (trial);
3752 INSN_FROM_TARGET_P (ninsn) = 1;
3754 delay_list = add_to_delay_list (ninsn, NULL_RTX);
3759 if (delay_list && must_annul)
3760 INSN_ANNULLED_BRANCH_P (insn) = 1;
3762 /* If we are to branch into the middle of this thread, find an appropriate
3763 label or make a new one if none, and redirect INSN to it. If we hit the
3764 end of the function, use the end-of-function label. */
3765 if (new_thread != thread)
3769 if (! thread_if_true)
3772 if (new_thread && GET_CODE (new_thread) == JUMP_INSN
3773 && (simplejump_p (new_thread)
3774 || GET_CODE (PATTERN (new_thread)) == RETURN)
3775 && redirect_with_delay_list_safe_p (insn,
3776 JUMP_LABEL (new_thread),
3778 new_thread = follow_jumps (JUMP_LABEL (new_thread));
3780 if (new_thread == 0)
3781 label = find_end_label ();
3782 else if (GET_CODE (new_thread) == CODE_LABEL)
3785 label = get_label_before (new_thread);
3787 reorg_redirect_jump (insn, label);
3793 /* Make another attempt to find insns to place in delay slots.
3795 We previously looked for insns located in front of the delay insn
3796 and, for non-jump delay insns, located behind the delay insn.
3798 Here only try to schedule jump insns and try to move insns from either
3799 the target or the following insns into the delay slot. If annulling is
3800 supported, we will be likely to do this. Otherwise, we can do this only
3804 fill_eager_delay_slots (first)
3809 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
3811 for (i = 0; i < num_unfilled_slots; i++)
3814 rtx target_label, insn_at_target, fallthrough_insn;
3817 int own_fallthrough;
3818 int prediction, slots_to_fill, slots_filled;
3820 insn = unfilled_slots_base[i];
3822 || INSN_DELETED_P (insn)
3823 || GET_CODE (insn) != JUMP_INSN
3824 || ! (condjump_p (insn) || condjump_in_parallel_p (insn)))
3827 slots_to_fill = num_delay_slots (insn);
3828 if (slots_to_fill == 0)
3832 target_label = JUMP_LABEL (insn);
3833 condition = get_branch_condition (insn, target_label);
3838 /* Get the next active fallthrough and target insns and see if we own
3839 them. Then see whether the branch is likely true. We don't need
3840 to do a lot of this for unconditional branches. */
3842 insn_at_target = next_active_insn (target_label);
3843 own_target = own_thread_p (target_label, target_label, 0);
3845 if (condition == const_true_rtx)
3847 own_fallthrough = 0;
3848 fallthrough_insn = 0;
3853 fallthrough_insn = next_active_insn (insn);
3854 own_fallthrough = own_thread_p (NEXT_INSN (insn), NULL_RTX, 1);
3855 prediction = mostly_true_jump (insn, condition);
3858 /* If this insn is expected to branch, first try to get insns from our
3859 target, then our fallthrough insns. If it is not, expected to branch,
3860 try the other order. */
3865 = fill_slots_from_thread (insn, condition, insn_at_target,
3866 fallthrough_insn, prediction == 2, 1,
3867 own_target, own_fallthrough,
3868 slots_to_fill, &slots_filled);
3870 if (delay_list == 0 && own_fallthrough)
3872 /* Even though we didn't find anything for delay slots,
3873 we might have found a redundant insn which we deleted
3874 from the thread that was filled. So we have to recompute
3875 the next insn at the target. */
3876 target_label = JUMP_LABEL (insn);
3877 insn_at_target = next_active_insn (target_label);
3880 = fill_slots_from_thread (insn, condition, fallthrough_insn,
3881 insn_at_target, 0, 0,
3882 own_fallthrough, own_target,
3883 slots_to_fill, &slots_filled);
3888 if (own_fallthrough)
3890 = fill_slots_from_thread (insn, condition, fallthrough_insn,
3891 insn_at_target, 0, 0,
3892 own_fallthrough, own_target,
3893 slots_to_fill, &slots_filled);
3895 if (delay_list == 0)
3897 = fill_slots_from_thread (insn, condition, insn_at_target,
3898 next_active_insn (insn), 0, 1,
3899 own_target, own_fallthrough,
3900 slots_to_fill, &slots_filled);
3904 unfilled_slots_base[i]
3905 = emit_delay_sequence (insn, delay_list,
3906 slots_filled, slots_to_fill);
3908 if (slots_to_fill == slots_filled)
3909 unfilled_slots_base[i] = 0;
3911 note_delay_statistics (slots_filled, 1);
3915 /* Once we have tried two ways to fill a delay slot, make a pass over the
3916 code to try to improve the results and to do such things as more jump
3920 relax_delay_slots (first)
3923 register rtx insn, next, pat;
3924 register rtx trial, delay_insn, target_label;
3926 /* Look at every JUMP_INSN and see if we can improve it. */
3927 for (insn = first; insn; insn = next)
3931 next = next_active_insn (insn);
3933 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3934 the next insn, or jumps to a label that is not the last of a
3935 group of consecutive labels. */
3936 if (GET_CODE (insn) == JUMP_INSN
3937 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3938 && (target_label = JUMP_LABEL (insn)) != 0)
3940 target_label = follow_jumps (target_label);
3941 target_label = prev_label (next_active_insn (target_label));
3943 if (target_label == 0)
3944 target_label = find_end_label ();
3946 if (next_active_insn (target_label) == next
3947 && ! condjump_in_parallel_p (insn))
3953 if (target_label != JUMP_LABEL (insn))
3954 reorg_redirect_jump (insn, target_label);
3956 /* See if this jump branches around a unconditional jump.
3957 If so, invert this jump and point it to the target of the
3959 if (next && GET_CODE (next) == JUMP_INSN
3960 && (simplejump_p (next) || GET_CODE (PATTERN (next)) == RETURN)
3961 && next_active_insn (target_label) == next_active_insn (next)
3962 && no_labels_between_p (insn, next))
3964 rtx label = JUMP_LABEL (next);
3966 /* Be careful how we do this to avoid deleting code or
3967 labels that are momentarily dead. See similar optimization
3970 We also need to ensure we properly handle the case when
3971 invert_jump fails. */
3973 ++LABEL_NUSES (target_label);
3975 ++LABEL_NUSES (label);
3977 if (invert_jump (insn, label))
3984 --LABEL_NUSES (label);
3986 if (--LABEL_NUSES (target_label) == 0)
3987 delete_insn (target_label);
3993 /* If this is an unconditional jump and the previous insn is a
3994 conditional jump, try reversing the condition of the previous
3995 insn and swapping our targets. The next pass might be able to
3998 Don't do this if we expect the conditional branch to be true, because
3999 we would then be making the more common case longer. */
4001 if (GET_CODE (insn) == JUMP_INSN
4002 && (simplejump_p (insn) || GET_CODE (PATTERN (insn)) == RETURN)
4003 && (other = prev_active_insn (insn)) != 0
4004 && (condjump_p (other) || condjump_in_parallel_p (other))
4005 && no_labels_between_p (other, insn)
4006 && 0 < mostly_true_jump (other,
4007 get_branch_condition (other,
4008 JUMP_LABEL (other))))
4010 rtx other_target = JUMP_LABEL (other);
4011 target_label = JUMP_LABEL (insn);
4013 /* Increment the count of OTHER_TARGET, so it doesn't get deleted
4014 as we move the label. */
4016 ++LABEL_NUSES (other_target);
4018 if (invert_jump (other, target_label))
4019 reorg_redirect_jump (insn, other_target);
4022 --LABEL_NUSES (other_target);
4025 /* Now look only at cases where we have filled a delay slot. */
4026 if (GET_CODE (insn) != INSN
4027 || GET_CODE (PATTERN (insn)) != SEQUENCE)
4030 pat = PATTERN (insn);
4031 delay_insn = XVECEXP (pat, 0, 0);
4033 /* See if the first insn in the delay slot is redundant with some
4034 previous insn. Remove it from the delay slot if so; then set up
4035 to reprocess this insn. */
4036 if (redundant_insn (XVECEXP (pat, 0, 1), delay_insn, 0))
4038 delete_from_delay_slot (XVECEXP (pat, 0, 1));
4039 next = prev_active_insn (next);
4043 /* Now look only at the cases where we have a filled JUMP_INSN. */
4044 if (GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) != JUMP_INSN
4045 || ! (condjump_p (XVECEXP (PATTERN (insn), 0, 0))
4046 || condjump_in_parallel_p (XVECEXP (PATTERN (insn), 0, 0))))
4049 target_label = JUMP_LABEL (delay_insn);
4053 /* If this jump goes to another unconditional jump, thread it, but
4054 don't convert a jump into a RETURN here. */
4055 trial = follow_jumps (target_label);
4056 /* We use next_real_insn instead of next_active_insn, so that
4057 the special USE insns emitted by reorg won't be ignored.
4058 If they are ignored, then they will get deleted if target_label
4059 is now unreachable, and that would cause mark_target_live_regs
4061 trial = prev_label (next_real_insn (trial));
4062 if (trial == 0 && target_label != 0)
4063 trial = find_end_label ();
4065 if (trial != target_label
4066 && redirect_with_delay_slots_safe_p (delay_insn, trial, insn))
4068 reorg_redirect_jump (delay_insn, trial);
4069 target_label = trial;
4072 /* If the first insn at TARGET_LABEL is redundant with a previous
4073 insn, redirect the jump to the following insn process again. */
4074 trial = next_active_insn (target_label);
4075 if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE
4076 && redundant_insn (trial, insn, 0))
4080 /* Figure out where to emit the special USE insn so we don't
4081 later incorrectly compute register live/death info. */
4082 tmp = next_active_insn (trial);
4084 tmp = find_end_label ();
4086 /* Insert the special USE insn and update dataflow info. */
4087 update_block (trial, tmp);
4089 /* Now emit a label before the special USE insn, and
4090 redirect our jump to the new label. */
4091 target_label = get_label_before (PREV_INSN (tmp));
4092 reorg_redirect_jump (delay_insn, target_label);
4097 /* Similarly, if it is an unconditional jump with one insn in its
4098 delay list and that insn is redundant, thread the jump. */
4099 if (trial && GET_CODE (PATTERN (trial)) == SEQUENCE
4100 && XVECLEN (PATTERN (trial), 0) == 2
4101 && GET_CODE (XVECEXP (PATTERN (trial), 0, 0)) == JUMP_INSN
4102 && (simplejump_p (XVECEXP (PATTERN (trial), 0, 0))
4103 || GET_CODE (PATTERN (XVECEXP (PATTERN (trial), 0, 0))) == RETURN)
4104 && redundant_insn (XVECEXP (PATTERN (trial), 0, 1), insn, 0))
4106 target_label = JUMP_LABEL (XVECEXP (PATTERN (trial), 0, 0));
4107 if (target_label == 0)
4108 target_label = find_end_label ();
4110 if (redirect_with_delay_slots_safe_p (delay_insn, target_label,
4113 reorg_redirect_jump (delay_insn, target_label);
4120 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
4121 && prev_active_insn (target_label) == insn
4122 && ! condjump_in_parallel_p (delay_insn)
4124 /* If the last insn in the delay slot sets CC0 for some insn,
4125 various code assumes that it is in a delay slot. We could
4126 put it back where it belonged and delete the register notes,
4127 but it doesn't seem worthwhile in this uncommon case. */
4128 && ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1),
4129 REG_CC_USER, NULL_RTX)
4135 /* All this insn does is execute its delay list and jump to the
4136 following insn. So delete the jump and just execute the delay
4139 We do this by deleting the INSN containing the SEQUENCE, then
4140 re-emitting the insns separately, and then deleting the jump.
4141 This allows the count of the jump target to be properly
4144 /* Clear the from target bit, since these insns are no longer
4146 for (i = 0; i < XVECLEN (pat, 0); i++)
4147 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
4149 trial = PREV_INSN (insn);
4151 emit_insn_after (pat, trial);
4152 delete_scheduled_jump (delay_insn);
4156 /* See if this is an unconditional jump around a single insn which is
4157 identical to the one in its delay slot. In this case, we can just
4158 delete the branch and the insn in its delay slot. */
4159 if (next && GET_CODE (next) == INSN
4160 && prev_label (next_active_insn (next)) == target_label
4161 && simplejump_p (insn)
4162 && XVECLEN (pat, 0) == 2
4163 && rtx_equal_p (PATTERN (next), PATTERN (XVECEXP (pat, 0, 1))))
4169 /* See if this jump (with its delay slots) branches around another
4170 jump (without delay slots). If so, invert this jump and point
4171 it to the target of the second jump. We cannot do this for
4172 annulled jumps, though. Again, don't convert a jump to a RETURN
4174 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
4175 && next && GET_CODE (next) == JUMP_INSN
4176 && (simplejump_p (next) || GET_CODE (PATTERN (next)) == RETURN)
4177 && next_active_insn (target_label) == next_active_insn (next)
4178 && no_labels_between_p (insn, next))
4180 rtx label = JUMP_LABEL (next);
4181 rtx old_label = JUMP_LABEL (delay_insn);
4184 label = find_end_label ();
4186 if (redirect_with_delay_slots_safe_p (delay_insn, label, insn))
4188 /* Be careful how we do this to avoid deleting code or labels
4189 that are momentarily dead. See similar optimization in
4192 ++LABEL_NUSES (old_label);
4194 if (invert_jump (delay_insn, label))
4198 /* Must update the INSN_FROM_TARGET_P bits now that
4199 the branch is reversed, so that mark_target_live_regs
4200 will handle the delay slot insn correctly. */
4201 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
4203 rtx slot = XVECEXP (PATTERN (insn), 0, i);
4204 INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot);
4211 if (old_label && --LABEL_NUSES (old_label) == 0)
4212 delete_insn (old_label);
4217 /* If we own the thread opposite the way this insn branches, see if we
4218 can merge its delay slots with following insns. */
4219 if (INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
4220 && own_thread_p (NEXT_INSN (insn), 0, 1))
4221 try_merge_delay_insns (insn, next);
4222 else if (! INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
4223 && own_thread_p (target_label, target_label, 0))
4224 try_merge_delay_insns (insn, next_active_insn (target_label));
4226 /* If we get here, we haven't deleted INSN. But we may have deleted
4227 NEXT, so recompute it. */
4228 next = next_active_insn (insn);
4234 /* Look for filled jumps to the end of function label. We can try to convert
4235 them into RETURN insns if the insns in the delay slot are valid for the
4239 make_return_insns (first)
4242 rtx insn, jump_insn, pat;
4243 rtx real_return_label = end_of_function_label;
4246 /* See if there is a RETURN insn in the function other than the one we
4247 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
4248 into a RETURN to jump to it. */
4249 for (insn = first; insn; insn = NEXT_INSN (insn))
4250 if (GET_CODE (insn) == JUMP_INSN && GET_CODE (PATTERN (insn)) == RETURN)
4252 real_return_label = get_label_before (insn);
4256 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
4257 was equal to END_OF_FUNCTION_LABEL. */
4258 LABEL_NUSES (real_return_label)++;
4260 /* Clear the list of insns to fill so we can use it. */
4261 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
4263 for (insn = first; insn; insn = NEXT_INSN (insn))
4267 /* Only look at filled JUMP_INSNs that go to the end of function
4269 if (GET_CODE (insn) != INSN
4270 || GET_CODE (PATTERN (insn)) != SEQUENCE
4271 || GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) != JUMP_INSN
4272 || JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0)) != end_of_function_label)
4275 pat = PATTERN (insn);
4276 jump_insn = XVECEXP (pat, 0, 0);
4278 /* If we can't make the jump into a RETURN, try to redirect it to the best
4279 RETURN and go on to the next insn. */
4280 if (! reorg_redirect_jump (jump_insn, NULL_RTX))
4282 /* Make sure redirecting the jump will not invalidate the delay
4284 if (redirect_with_delay_slots_safe_p (jump_insn,
4287 reorg_redirect_jump (jump_insn, real_return_label);
4291 /* See if this RETURN can accept the insns current in its delay slot.
4292 It can if it has more or an equal number of slots and the contents
4293 of each is valid. */
4295 flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn));
4296 slots = num_delay_slots (jump_insn);
4297 if (slots >= XVECLEN (pat, 0) - 1)
4299 for (i = 1; i < XVECLEN (pat, 0); i++)
4301 #ifdef ANNUL_IFFALSE_SLOTS
4302 (INSN_ANNULLED_BRANCH_P (jump_insn)
4303 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
4304 ? eligible_for_annul_false (jump_insn, i - 1,
4305 XVECEXP (pat, 0, i), flags) :
4307 #ifdef ANNUL_IFTRUE_SLOTS
4308 (INSN_ANNULLED_BRANCH_P (jump_insn)
4309 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
4310 ? eligible_for_annul_true (jump_insn, i - 1,
4311 XVECEXP (pat, 0, i), flags) :
4313 eligible_for_delay (jump_insn, i -1, XVECEXP (pat, 0, i), flags)))
4319 if (i == XVECLEN (pat, 0))
4322 /* We have to do something with this insn. If it is an unconditional
4323 RETURN, delete the SEQUENCE and output the individual insns,
4324 followed by the RETURN. Then set things up so we try to find
4325 insns for its delay slots, if it needs some. */
4326 if (GET_CODE (PATTERN (jump_insn)) == RETURN)
4328 rtx prev = PREV_INSN (insn);
4331 for (i = 1; i < XVECLEN (pat, 0); i++)
4332 prev = emit_insn_after (PATTERN (XVECEXP (pat, 0, i)), prev);
4334 insn = emit_jump_insn_after (PATTERN (jump_insn), prev);
4335 emit_barrier_after (insn);
4338 obstack_ptr_grow (&unfilled_slots_obstack, insn);
4341 /* It is probably more efficient to keep this with its current
4342 delay slot as a branch to a RETURN. */
4343 reorg_redirect_jump (jump_insn, real_return_label);
4346 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
4347 new delay slots we have created. */
4348 if (--LABEL_NUSES (real_return_label) == 0)
4349 delete_insn (real_return_label);
4351 fill_simple_delay_slots (first, 1);
4352 fill_simple_delay_slots (first, 0);
4356 /* Try to find insns to place in delay slots. */
4359 dbr_schedule (first, file)
4363 rtx insn, next, epilogue_insn = 0;
4366 int old_flag_no_peephole = flag_no_peephole;
4368 /* Execute `final' once in prescan mode to delete any insns that won't be
4369 used. Don't let final try to do any peephole optimization--it will
4370 ruin dataflow information for this pass. */
4372 flag_no_peephole = 1;
4373 final (first, 0, NO_DEBUG, 1, 1);
4374 flag_no_peephole = old_flag_no_peephole;
4377 /* If the current function has no insns other than the prologue and
4378 epilogue, then do not try to fill any delay slots. */
4379 if (n_basic_blocks == 0)
4382 /* Find the highest INSN_UID and allocate and initialize our map from
4383 INSN_UID's to position in code. */
4384 for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn))
4386 if (INSN_UID (insn) > max_uid)
4387 max_uid = INSN_UID (insn);
4388 if (GET_CODE (insn) == NOTE
4389 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_EPILOGUE_BEG)
4390 epilogue_insn = insn;
4393 uid_to_ruid = (int *) alloca ((max_uid + 1) * sizeof (int *));
4394 for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn))
4395 uid_to_ruid[INSN_UID (insn)] = i;
4397 /* Initialize the list of insns that need filling. */
4398 if (unfilled_firstobj == 0)
4400 gcc_obstack_init (&unfilled_slots_obstack);
4401 unfilled_firstobj = (rtx *) obstack_alloc (&unfilled_slots_obstack, 0);
4404 for (insn = next_active_insn (first); insn; insn = next_active_insn (insn))
4408 INSN_ANNULLED_BRANCH_P (insn) = 0;
4409 INSN_FROM_TARGET_P (insn) = 0;
4411 /* Skip vector tables. We can't get attributes for them. */
4412 if (GET_CODE (insn) == JUMP_INSN
4413 && (GET_CODE (PATTERN (insn)) == ADDR_VEC
4414 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC))
4417 if (num_delay_slots (insn) > 0)
4418 obstack_ptr_grow (&unfilled_slots_obstack, insn);
4420 /* Ensure all jumps go to the last of a set of consecutive labels. */
4421 if (GET_CODE (insn) == JUMP_INSN
4422 && (condjump_p (insn) || condjump_in_parallel_p (insn))
4423 && JUMP_LABEL (insn) != 0
4424 && ((target = prev_label (next_active_insn (JUMP_LABEL (insn))))
4425 != JUMP_LABEL (insn)))
4426 redirect_jump (insn, target);
4429 /* Indicate what resources are required to be valid at the end of the current
4430 function. The condition code never is and memory always is. If the
4431 frame pointer is needed, it is and so is the stack pointer unless
4432 EXIT_IGNORE_STACK is non-zero. If the frame pointer is not needed, the
4433 stack pointer is. Registers used to return the function value are
4434 needed. Registers holding global variables are needed. */
4436 end_of_function_needs.cc = 0;
4437 end_of_function_needs.memory = 1;
4438 end_of_function_needs.unch_memory = 0;
4439 CLEAR_HARD_REG_SET (end_of_function_needs.regs);
4441 if (frame_pointer_needed)
4443 SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM);
4444 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4445 SET_HARD_REG_BIT (end_of_function_needs.regs, HARD_FRAME_POINTER_REGNUM);
4447 #ifdef EXIT_IGNORE_STACK
4448 if (! EXIT_IGNORE_STACK)
4450 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
4453 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
4455 if (current_function_return_rtx != 0
4456 && GET_CODE (current_function_return_rtx) == REG)
4457 mark_referenced_resources (current_function_return_rtx,
4458 &end_of_function_needs, 1);
4460 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4462 #ifdef EPILOGUE_USES
4463 || EPILOGUE_USES (i)
4466 SET_HARD_REG_BIT (end_of_function_needs.regs, i);
4468 /* The registers required to be live at the end of the function are
4469 represented in the flow information as being dead just prior to
4470 reaching the end of the function. For example, the return of a value
4471 might be represented by a USE of the return register immediately
4472 followed by an unconditional jump to the return label where the
4473 return label is the end of the RTL chain. The end of the RTL chain
4474 is then taken to mean that the return register is live.
4476 This sequence is no longer maintained when epilogue instructions are
4477 added to the RTL chain. To reconstruct the original meaning, the
4478 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
4479 point where these registers become live (start_of_epilogue_needs).
4480 If epilogue instructions are present, the registers set by those
4481 instructions won't have been processed by flow. Thus, those
4482 registers are additionally required at the end of the RTL chain
4483 (end_of_function_needs). */
4485 start_of_epilogue_needs = end_of_function_needs;
4487 while (epilogue_insn = next_nonnote_insn (epilogue_insn))
4488 mark_set_resources (epilogue_insn, &end_of_function_needs, 0, 1);
4490 /* Show we haven't computed an end-of-function label yet. */
4491 end_of_function_label = 0;
4493 /* Allocate and initialize the tables used by mark_target_live_regs. */
4495 = (struct target_info **) alloca ((TARGET_HASH_PRIME
4496 * sizeof (struct target_info *)));
4497 bzero ((char *) target_hash_table,
4498 TARGET_HASH_PRIME * sizeof (struct target_info *));
4500 bb_ticks = (int *) alloca (n_basic_blocks * sizeof (int));
4501 bzero ((char *) bb_ticks, n_basic_blocks * sizeof (int));
4503 /* Initialize the statistics for this function. */
4504 bzero ((char *) num_insns_needing_delays, sizeof num_insns_needing_delays);
4505 bzero ((char *) num_filled_delays, sizeof num_filled_delays);
4507 /* Now do the delay slot filling. Try everything twice in case earlier
4508 changes make more slots fillable. */
4510 for (reorg_pass_number = 0;
4511 reorg_pass_number < MAX_REORG_PASSES;
4512 reorg_pass_number++)
4514 fill_simple_delay_slots (first, 1);
4515 fill_simple_delay_slots (first, 0);
4516 fill_eager_delay_slots (first);
4517 relax_delay_slots (first);
4520 /* Delete any USE insns made by update_block; subsequent passes don't need
4521 them or know how to deal with them. */
4522 for (insn = first; insn; insn = next)
4524 next = NEXT_INSN (insn);
4526 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == USE
4527 && GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn), 0))) == 'i')
4528 next = delete_insn (insn);
4531 /* If we made an end of function label, indicate that it is now
4532 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
4533 If it is now unused, delete it. */
4534 if (end_of_function_label && --LABEL_NUSES (end_of_function_label) == 0)
4535 delete_insn (end_of_function_label);
4538 if (HAVE_return && end_of_function_label != 0)
4539 make_return_insns (first);
4542 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
4544 /* It is not clear why the line below is needed, but it does seem to be. */
4545 unfilled_firstobj = (rtx *) obstack_alloc (&unfilled_slots_obstack, 0);
4547 /* Reposition the prologue and epilogue notes in case we moved the
4548 prologue/epilogue insns. */
4549 reposition_prologue_and_epilogue_notes (first);
4553 register int i, j, need_comma;
4555 for (reorg_pass_number = 0;
4556 reorg_pass_number < MAX_REORG_PASSES;
4557 reorg_pass_number++)
4559 fprintf (file, ";; Reorg pass #%d:\n", reorg_pass_number + 1);
4560 for (i = 0; i < NUM_REORG_FUNCTIONS; i++)
4563 fprintf (file, ";; Reorg function #%d\n", i);
4565 fprintf (file, ";; %d insns needing delay slots\n;; ",
4566 num_insns_needing_delays[i][reorg_pass_number]);
4568 for (j = 0; j < MAX_DELAY_HISTOGRAM; j++)
4569 if (num_filled_delays[i][j][reorg_pass_number])
4572 fprintf (file, ", ");
4574 fprintf (file, "%d got %d delays",
4575 num_filled_delays[i][j][reorg_pass_number], j);
4577 fprintf (file, "\n");
4582 #endif /* DELAY_SLOTS */