1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@nyu.edu).
4 Hacked by Michael Tiemann (tiemann@cygnus.com).
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 /* Instruction reorganization pass.
24 This pass runs after register allocation and final jump
25 optimization. It should be the last pass to run before peephole.
26 It serves primarily to fill delay slots of insns, typically branch
27 and call insns. Other insns typically involve more complicated
28 interactions of data dependencies and resource constraints, and
29 are better handled by scheduling before register allocation (by the
30 function `schedule_insns').
32 The Branch Penalty is the number of extra cycles that are needed to
33 execute a branch insn. On an ideal machine, branches take a single
34 cycle, and the Branch Penalty is 0. Several RISC machines approach
35 branch delays differently:
37 The MIPS and AMD 29000 have a single branch delay slot. Most insns
38 (except other branches) can be used to fill this slot. When the
39 slot is filled, two insns execute in two cycles, reducing the
40 branch penalty to zero.
42 The Motorola 88000 conditionally exposes its branch delay slot,
43 so code is shorter when it is turned off, but will run faster
44 when useful insns are scheduled there.
46 The IBM ROMP has two forms of branch and call insns, both with and
47 without a delay slot. Much like the 88k, insns not using the delay
48 slot can be shorted (2 bytes vs. 4 bytes), but will run slowed.
50 The SPARC always has a branch delay slot, but its effects can be
51 annulled when the branch is not taken. This means that failing to
52 find other sources of insns, we can hoist an insn from the branch
53 target that would only be safe to execute knowing that the branch
56 The HP-PA always has a branch delay slot. For unconditional branches
57 its effects can be annulled when the branch is taken. The effects
58 of the delay slot in a conditional branch can be nullified for forward
59 taken branches, or for untaken backward branches. This means
60 we can hoist insns from the fall-through path for forward branches or
61 steal insns from the target of backward branches.
63 Three techniques for filling delay slots have been implemented so far:
65 (1) `fill_simple_delay_slots' is the simplest, most efficient way
66 to fill delay slots. This pass first looks for insns which come
67 from before the branch and which are safe to execute after the
68 branch. Then it searches after the insn requiring delay slots or,
69 in the case of a branch, for insns that are after the point at
70 which the branch merges into the fallthrough code, if such a point
71 exists. When such insns are found, the branch penalty decreases
72 and no code expansion takes place.
74 (2) `fill_eager_delay_slots' is more complicated: it is used for
75 scheduling conditional jumps, or for scheduling jumps which cannot
76 be filled using (1). A machine need not have annulled jumps to use
77 this strategy, but it helps (by keeping more options open).
78 `fill_eager_delay_slots' tries to guess the direction the branch
79 will go; if it guesses right 100% of the time, it can reduce the
80 branch penalty as much as `fill_simple_delay_slots' does. If it
81 guesses wrong 100% of the time, it might as well schedule nops (or
82 on the m88k, unexpose the branch slot). When
83 `fill_eager_delay_slots' takes insns from the fall-through path of
84 the jump, usually there is no code expansion; when it takes insns
85 from the branch target, there is code expansion if it is not the
86 only way to reach that target.
88 (3) `relax_delay_slots' uses a set of rules to simplify code that
89 has been reorganized by (1) and (2). It finds cases where
90 conditional test can be eliminated, jumps can be threaded, extra
91 insns can be eliminated, etc. It is the job of (1) and (2) to do a
92 good job of scheduling locally; `relax_delay_slots' takes care of
93 making the various individual schedules work well together. It is
94 especially tuned to handle the control flow interactions of branch
95 insns. It does nothing for insns with delay slots that do not
98 On machines that use CC0, we are very conservative. We will not make
99 a copy of an insn involving CC0 since we want to maintain a 1-1
100 correspondence between the insn that sets and uses CC0. The insns are
101 allowed to be separated by placing an insn that sets CC0 (but not an insn
102 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
103 delay slot. In that case, we point each insn at the other with REG_CC_USER
104 and REG_CC_SETTER notes. Note that these restrictions affect very few
105 machines because most RISC machines with delay slots will not use CC0
106 (the RT is the only known exception at this point).
110 The Acorn Risc Machine can conditionally execute most insns, so
111 it is profitable to move single insns into a position to execute
112 based on the condition code of the previous insn.
114 The HP-PA can conditionally nullify insns, providing a similar
115 effect to the ARM, differing mostly in which insn is "in charge". */
120 #include "insn-config.h"
121 #include "conditions.h"
122 #include "hard-reg-set.h"
123 #include "basic-block.h"
125 #include "insn-flags.h"
130 #include "insn-attr.h"
134 #define obstack_chunk_alloc xmalloc
135 #define obstack_chunk_free free
137 #ifndef ANNUL_IFTRUE_SLOTS
138 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
140 #ifndef ANNUL_IFFALSE_SLOTS
141 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
144 /* Insns which have delay slots that have not yet been filled. */
146 static struct obstack unfilled_slots_obstack;
147 static rtx *unfilled_firstobj;
149 /* Define macros to refer to the first and last slot containing unfilled
150 insns. These are used because the list may move and its address
151 should be recomputed at each use. */
153 #define unfilled_slots_base \
154 ((rtx *) obstack_base (&unfilled_slots_obstack))
156 #define unfilled_slots_next \
157 ((rtx *) obstack_next_free (&unfilled_slots_obstack))
159 /* This structure is used to indicate which hardware resources are set or
160 needed by insns so far. */
164 char memory; /* Insn sets or needs a memory location. */
165 char volatil; /* Insn sets or needs a volatile memory loc. */
166 char cc; /* Insn sets or needs the condition codes. */
167 HARD_REG_SET regs; /* Which registers are set or needed. */
170 /* Macro to clear all resources. */
171 #define CLEAR_RESOURCE(RES) \
172 do { (RES)->memory = (RES)->volatil = (RES)->cc = 0; \
173 CLEAR_HARD_REG_SET ((RES)->regs); } while (0)
175 /* Indicates what resources are required at the beginning of the epilogue. */
176 static struct resources start_of_epilogue_needs;
178 /* Indicates what resources are required at function end. */
179 static struct resources end_of_function_needs;
181 /* Points to the label before the end of the function. */
182 static rtx end_of_function_label;
184 /* This structure is used to record liveness information at the targets or
185 fallthrough insns of branches. We will most likely need the information
186 at targets again, so save them in a hash table rather than recomputing them
191 int uid; /* INSN_UID of target. */
192 struct target_info *next; /* Next info for same hash bucket. */
193 HARD_REG_SET live_regs; /* Registers live at target. */
194 int block; /* Basic block number containing target. */
195 int bb_tick; /* Generation count of basic block info. */
198 #define TARGET_HASH_PRIME 257
200 /* Define the hash table itself. */
201 static struct target_info **target_hash_table;
203 /* For each basic block, we maintain a generation number of its basic
204 block info, which is updated each time we move an insn from the
205 target of a jump. This is the generation number indexed by block
208 static int *bb_ticks;
210 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
211 not always monotonically increase. */
212 static int *uid_to_ruid;
214 /* Highest valid index in `uid_to_ruid'. */
217 static void mark_referenced_resources PROTO((rtx, struct resources *, int));
218 static void mark_set_resources PROTO((rtx, struct resources *, int, int));
219 static int stop_search_p PROTO((rtx, int));
220 static int resource_conflicts_p PROTO((struct resources *,
221 struct resources *));
222 static int insn_references_resource_p PROTO((rtx, struct resources *, int));
223 static int insn_sets_resources_p PROTO((rtx, struct resources *, int));
224 static rtx find_end_label PROTO((void));
225 static rtx emit_delay_sequence PROTO((rtx, rtx, int, int));
226 static rtx add_to_delay_list PROTO((rtx, rtx));
227 static void delete_from_delay_slot PROTO((rtx));
228 static void delete_scheduled_jump PROTO((rtx));
229 static void note_delay_statistics PROTO((int, int));
230 static rtx optimize_skip PROTO((rtx));
231 static int get_jump_flags PROTO((rtx, rtx));
232 static int rare_destination PROTO((rtx));
233 static int mostly_true_jump PROTO((rtx, rtx));
234 static rtx get_branch_condition PROTO((rtx, rtx));
235 static int condition_dominates_p PROTO((rtx, rtx));
236 static rtx steal_delay_list_from_target PROTO((rtx, rtx, rtx, rtx,
240 int, int *, int *, rtx *));
241 static rtx steal_delay_list_from_fallthrough PROTO((rtx, rtx, rtx, rtx,
246 static void try_merge_delay_insns PROTO((rtx, rtx));
247 static int redundant_insn_p PROTO((rtx, rtx, rtx));
248 static int own_thread_p PROTO((rtx, rtx, int));
249 static int find_basic_block PROTO((rtx));
250 static void update_block PROTO((rtx, rtx));
251 static void update_reg_dead_notes PROTO((rtx, rtx));
252 static void update_live_status PROTO((rtx, rtx));
253 static rtx next_insn_no_annul PROTO((rtx));
254 static void mark_target_live_regs PROTO((rtx, struct resources *));
255 static void fill_simple_delay_slots PROTO((rtx, int));
256 static rtx fill_slots_from_thread PROTO((rtx, rtx, rtx, rtx, int, int,
257 int, int, int, int *));
258 static void fill_eager_delay_slots PROTO((rtx));
259 static void relax_delay_slots PROTO((rtx));
260 static void make_return_insns PROTO((rtx));
262 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
263 which resources are references by the insn. If INCLUDE_CALLED_ROUTINE
264 is TRUE, resources used by the called routine will be included for
268 mark_referenced_resources (x, res, include_delayed_effects)
270 register struct resources *res;
271 register int include_delayed_effects;
273 register enum rtx_code code = GET_CODE (x);
275 register char *format_ptr;
277 /* Handle leaf items for which we set resource flags. Also, special-case
278 CALL, SET and CLOBBER operators. */
290 if (GET_CODE (SUBREG_REG (x)) != REG)
291 mark_referenced_resources (SUBREG_REG (x), res, 0);
294 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
295 int last_regno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
296 for (i = regno; i < last_regno; i++)
297 SET_HARD_REG_BIT (res->regs, i);
302 for (i = 0; i < HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)); i++)
303 SET_HARD_REG_BIT (res->regs, REGNO (x) + i);
307 /* If this memory shouldn't change, it really isn't referencing
309 if (! RTX_UNCHANGING_P (x))
311 res->volatil = MEM_VOLATILE_P (x);
313 /* Mark registers used to access memory. */
314 mark_referenced_resources (XEXP (x, 0), res, 0);
321 case UNSPEC_VOLATILE:
323 /* Traditional asm's are always volatile. */
328 res->volatil = MEM_VOLATILE_P (x);
330 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
331 We can not just fall through here since then we would be confused
332 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
333 traditional asms unlike their normal usage. */
335 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
336 mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, 0);
340 /* The first operand will be a (MEM (xxx)) but doesn't really reference
341 memory. The second operand may be referenced, though. */
342 mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, 0);
343 mark_referenced_resources (XEXP (x, 1), res, 0);
347 /* Usually, the first operand of SET is set, not referenced. But
348 registers used to access memory are referenced. SET_DEST is
349 also referenced if it is a ZERO_EXTRACT or SIGN_EXTRACT. */
351 mark_referenced_resources (SET_SRC (x), res, 0);
354 if (GET_CODE (x) == SIGN_EXTRACT || GET_CODE (x) == ZERO_EXTRACT)
355 mark_referenced_resources (x, res, 0);
356 else if (GET_CODE (x) == SUBREG)
358 if (GET_CODE (x) == MEM)
359 mark_referenced_resources (XEXP (x, 0), res, 0);
366 if (include_delayed_effects)
368 /* A CALL references memory, the frame pointer if it exists, the
369 stack pointer, any global registers and any registers given in
370 USE insns immediately in front of the CALL.
372 However, we may have moved some of the parameter loading insns
373 into the delay slot of this CALL. If so, the USE's for them
374 don't count and should be skipped. */
375 rtx insn = PREV_INSN (x);
380 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
381 if (NEXT_INSN (insn) != x)
383 sequence = PATTERN (NEXT_INSN (insn));
384 seq_size = XVECLEN (sequence, 0);
385 if (GET_CODE (sequence) != SEQUENCE)
390 SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM);
391 if (frame_pointer_needed)
392 SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM);
394 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
396 SET_HARD_REG_BIT (res->regs, i);
398 /* Skip any labels between the CALL_INSN and possible USE insns. */
399 while (GET_CODE (insn) == CODE_LABEL)
400 insn = PREV_INSN (insn);
402 for ( ; (insn && GET_CODE (insn) == INSN
403 && GET_CODE (PATTERN (insn)) == USE);
404 insn = PREV_INSN (insn))
406 for (i = 1; i < seq_size; i++)
408 rtx slot_pat = PATTERN (XVECEXP (sequence, 0, i));
409 if (GET_CODE (slot_pat) == SET
410 && rtx_equal_p (SET_DEST (slot_pat),
411 XEXP (PATTERN (insn), 0)))
415 mark_referenced_resources (XEXP (PATTERN (insn), 0), res, 0);
419 /* ... fall through to other INSN processing ... */
424 #ifdef INSN_REFERENCES_ARE_DELAYED
425 if (! include_delayed_effects
426 && INSN_REFERENCES_ARE_DELAYED (x))
430 /* No special processing, just speed up. */
431 mark_referenced_resources (PATTERN (x), res, include_delayed_effects);
435 /* Process each sub-expression and flag what it needs. */
436 format_ptr = GET_RTX_FORMAT (code);
437 for (i = 0; i < GET_RTX_LENGTH (code); i++)
438 switch (*format_ptr++)
441 mark_referenced_resources (XEXP (x, i), res, include_delayed_effects);
445 for (j = 0; j < XVECLEN (x, i); j++)
446 mark_referenced_resources (XVECEXP (x, i, j), res,
447 include_delayed_effects);
452 /* Given X, a part of an insn, and a pointer to a `struct resource', RES,
453 indicate which resources are modified by the insn. If INCLUDE_CALLED_ROUTINE
454 is nonzero, also mark resources potentially set by the called routine.
456 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
457 objects are being referenced instead of set.
459 We never mark the insn as modifying the condition code unless it explicitly
460 SETs CC0 even though this is not totally correct. The reason for this is
461 that we require a SET of CC0 to immediately precede the reference to CC0.
462 So if some other insn sets CC0 as a side-effect, we know it cannot affect
463 our computation and thus may be placed in a delay slot. */
466 mark_set_resources (x, res, in_dest, include_delayed_effects)
468 register struct resources *res;
470 int include_delayed_effects;
472 register enum rtx_code code;
474 register char *format_ptr;
492 /* These don't set any resources. */
501 /* Called routine modifies the condition code, memory, any registers
502 that aren't saved across calls, global registers and anything
503 explicitly CLOBBERed immediately after the CALL_INSN. */
505 if (include_delayed_effects)
507 rtx next = NEXT_INSN (x);
509 res->cc = res->memory = 1;
510 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
511 if (call_used_regs[i] || global_regs[i])
512 SET_HARD_REG_BIT (res->regs, i);
514 /* Skip any possible labels between the CALL_INSN and CLOBBERs. */
515 while (GET_CODE (next) == CODE_LABEL)
516 next = NEXT_INSN (next);
518 for (; (next && GET_CODE (next) == INSN
519 && GET_CODE (PATTERN (next)) == CLOBBER);
520 next = NEXT_INSN (next))
521 mark_set_resources (XEXP (PATTERN (next), 0), res, 1, 0);
524 /* ... and also what it's RTL says it modifies, if anything. */
529 /* An insn consisting of just a CLOBBER (or USE) is just for flow
530 and doesn't actually do anything, so we ignore it. */
532 #ifdef INSN_SETS_ARE_DELAYED
533 if (! include_delayed_effects
534 && INSN_SETS_ARE_DELAYED (x))
539 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
544 /* If the source of a SET is a CALL, this is actually done by
545 the called routine. So only include it if we are to include the
546 effects of the calling routine. */
548 mark_set_resources (SET_DEST (x), res,
549 (include_delayed_effects
550 || GET_CODE (SET_SRC (x)) != CALL),
553 mark_set_resources (SET_SRC (x), res, 0, 0);
557 mark_set_resources (XEXP (x, 0), res, 1, 0);
561 for (i = 0; i < XVECLEN (x, 0); i++)
562 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x, 0, 0))
563 && INSN_FROM_TARGET_P (XVECEXP (x, 0, i))))
564 mark_set_resources (XVECEXP (x, 0, i), res, 0,
565 include_delayed_effects);
572 mark_set_resources (XEXP (x, 0), res, 1, 0);
576 mark_set_resources (XEXP (x, 0), res, in_dest, 0);
577 mark_set_resources (XEXP (x, 1), res, 0, 0);
578 mark_set_resources (XEXP (x, 2), res, 0, 0);
585 res->volatil = MEM_VOLATILE_P (x);
588 mark_set_resources (XEXP (x, 0), res, 0, 0);
593 for (i = 0; i < HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)); i++)
594 SET_HARD_REG_BIT (res->regs, REGNO (x) + i);
598 /* Process each sub-expression and flag what it needs. */
599 format_ptr = GET_RTX_FORMAT (code);
600 for (i = 0; i < GET_RTX_LENGTH (code); i++)
601 switch (*format_ptr++)
604 mark_set_resources (XEXP (x, i), res, in_dest, include_delayed_effects);
608 for (j = 0; j < XVECLEN (x, i); j++)
609 mark_set_resources (XVECEXP (x, i, j), res, in_dest,
610 include_delayed_effects);
615 /* Return TRUE if this insn should stop the search for insn to fill delay
616 slots. LABELS_P indicates that labels should terminate the search.
617 In all cases, jumps terminate the search. */
620 stop_search_p (insn, labels_p)
627 switch (GET_CODE (insn))
641 /* OK unless it contains a delay slot or is an `asm' insn of some type.
642 We don't know anything about these. */
643 return (GET_CODE (PATTERN (insn)) == SEQUENCE
644 || GET_CODE (PATTERN (insn)) == ASM_INPUT
645 || asm_noperands (PATTERN (insn)) >= 0);
652 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
653 resource set contains a volatile memory reference. Otherwise, return FALSE. */
656 resource_conflicts_p (res1, res2)
657 struct resources *res1, *res2;
659 if ((res1->cc && res2->cc) || (res1->memory && res2->memory)
660 || res1->volatil || res2->volatil)
664 return (res1->regs & res2->regs) != HARD_CONST (0);
669 for (i = 0; i < HARD_REG_SET_LONGS; i++)
670 if ((res1->regs[i] & res2->regs[i]) != 0)
677 /* Return TRUE if any resource marked in RES, a `struct resources', is
678 referenced by INSN. If INCLUDE_CALLED_ROUTINE is set, return if the called
679 routine is using those resources.
681 We compute this by computing all the resources referenced by INSN and
682 seeing if this conflicts with RES. It might be faster to directly check
683 ourselves, and this is the way it used to work, but it means duplicating
684 a large block of complex code. */
687 insn_references_resource_p (insn, res, include_delayed_effects)
689 register struct resources *res;
690 int include_delayed_effects;
692 struct resources insn_res;
694 CLEAR_RESOURCE (&insn_res);
695 mark_referenced_resources (insn, &insn_res, include_delayed_effects);
696 return resource_conflicts_p (&insn_res, res);
699 /* Return TRUE if INSN modifies resources that are marked in RES.
700 INCLUDE_CALLED_ROUTINE is set if the actions of that routine should be
701 included. CC0 is only modified if it is explicitly set; see comments
702 in front of mark_set_resources for details. */
705 insn_sets_resource_p (insn, res, include_delayed_effects)
707 register struct resources *res;
708 int include_delayed_effects;
710 struct resources insn_sets;
712 CLEAR_RESOURCE (&insn_sets);
713 mark_set_resources (insn, &insn_sets, 0, include_delayed_effects);
714 return resource_conflicts_p (&insn_sets, res);
717 /* Find a label at the end of the function or before a RETURN. If there is
725 /* If we found one previously, return it. */
726 if (end_of_function_label)
727 return end_of_function_label;
729 /* Otherwise, see if there is a label at the end of the function. If there
730 is, it must be that RETURN insns aren't needed, so that is our return
731 label and we don't have to do anything else. */
733 insn = get_last_insn ();
734 while (GET_CODE (insn) == NOTE
735 || (GET_CODE (insn) == INSN
736 && (GET_CODE (PATTERN (insn)) == USE
737 || GET_CODE (PATTERN (insn)) == CLOBBER)))
738 insn = PREV_INSN (insn);
740 if (GET_CODE (insn) == CODE_LABEL)
741 end_of_function_label = insn;
744 /* Otherwise, make a new label and emit a RETURN and BARRIER,
746 end_of_function_label = gen_label_rtx ();
747 LABEL_NUSES (end_of_function_label) = 0;
748 emit_label (end_of_function_label);
752 /* The return we make may have delay slots too. */
753 rtx insn = gen_return();
754 emit_jump_insn (insn);
756 if (num_delay_slots (insn) > 0)
757 obstack_ptr_grow (&unfilled_slots_obstack, insn);
762 /* Show one additional use for this label so it won't go away until
764 ++LABEL_NUSES (end_of_function_label);
766 return end_of_function_label;
769 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
770 the pattern of INSN with the SEQUENCE.
772 Chain the insns so that NEXT_INSN of each insn in the sequence points to
773 the next and NEXT_INSN of the last insn in the sequence points to
774 the first insn after the sequence. Similarly for PREV_INSN. This makes
775 it easier to scan all insns.
777 Returns the SEQUENCE that replaces INSN. */
780 emit_delay_sequence (insn, list, length, avail)
790 /* Allocate the the rtvec to hold the insns and the SEQUENCE. */
791 rtvec seqv = rtvec_alloc (length + 1);
792 rtx seq = gen_rtx (SEQUENCE, VOIDmode, seqv);
793 rtx seq_insn = make_insn_raw (seq);
794 rtx first = get_insns ();
795 rtx last = get_last_insn ();
797 /* Make a copy of the insn having delay slots. */
798 rtx delay_insn = copy_rtx (insn);
800 /* If INSN is followed by a BARRIER, delete the BARRIER since it will only
801 confuse further processing. Update LAST in case it was the last insn.
802 We will put the BARRIER back in later. */
803 if (NEXT_INSN (insn) && GET_CODE (NEXT_INSN (insn)) == BARRIER)
805 delete_insn (NEXT_INSN (insn));
806 last = get_last_insn ();
810 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
811 NEXT_INSN (seq_insn) = NEXT_INSN (insn);
812 PREV_INSN (seq_insn) = PREV_INSN (insn);
815 set_new_first_and_last_insn (first, seq_insn);
817 PREV_INSN (NEXT_INSN (seq_insn)) = seq_insn;
820 set_new_first_and_last_insn (seq_insn, last);
822 NEXT_INSN (PREV_INSN (seq_insn)) = seq_insn;
824 /* Build our SEQUENCE and rebuild the insn chain. */
825 XVECEXP (seq, 0, 0) = delay_insn;
826 INSN_DELETED_P (delay_insn) = 0;
827 PREV_INSN (delay_insn) = PREV_INSN (seq_insn);
829 for (li = list; li; li = XEXP (li, 1), i++)
831 rtx tem = XEXP (li, 0);
834 /* Show that this copy of the insn isn't deleted. */
835 INSN_DELETED_P (tem) = 0;
837 XVECEXP (seq, 0, i) = tem;
838 PREV_INSN (tem) = XVECEXP (seq, 0, i - 1);
839 NEXT_INSN (XVECEXP (seq, 0, i - 1)) = tem;
841 /* Remove any REG_DEAD notes because we can't rely on them now
842 that the insn has been moved. */
843 for (note = REG_NOTES (tem); note; note = XEXP (note, 1))
844 if (REG_NOTE_KIND (note) == REG_DEAD)
845 XEXP (note, 0) = const0_rtx;
848 NEXT_INSN (XVECEXP (seq, 0, length)) = NEXT_INSN (seq_insn);
850 /* If the previous insn is a SEQUENCE, update the NEXT_INSN pointer on the
851 last insn in that SEQUENCE to point to us. Similarly for the first
852 insn in the following insn if it is a SEQUENCE. */
854 if (PREV_INSN (seq_insn) && GET_CODE (PREV_INSN (seq_insn)) == INSN
855 && GET_CODE (PATTERN (PREV_INSN (seq_insn))) == SEQUENCE)
856 NEXT_INSN (XVECEXP (PATTERN (PREV_INSN (seq_insn)), 0,
857 XVECLEN (PATTERN (PREV_INSN (seq_insn)), 0) - 1))
860 if (NEXT_INSN (seq_insn) && GET_CODE (NEXT_INSN (seq_insn)) == INSN
861 && GET_CODE (PATTERN (NEXT_INSN (seq_insn))) == SEQUENCE)
862 PREV_INSN (XVECEXP (PATTERN (NEXT_INSN (seq_insn)), 0, 0)) = seq_insn;
864 /* If there used to be a BARRIER, put it back. */
866 emit_barrier_after (seq_insn);
874 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
875 be in the order in which the insns are to be executed. */
878 add_to_delay_list (insn, delay_list)
882 /* If we have an empty list, just make a new list element. */
884 return gen_rtx (INSN_LIST, VOIDmode, insn, NULL_RTX);
886 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
888 XEXP (delay_list, 1) = add_to_delay_list (insn, XEXP (delay_list, 1));
893 /* Delete INSN from the the delay slot of the insn that it is in. This may
894 produce an insn without anything in its delay slots. */
897 delete_from_delay_slot (insn)
900 rtx trial, seq_insn, seq, prev;
904 /* We first must find the insn containing the SEQUENCE with INSN in its
905 delay slot. Do this by finding an insn, TRIAL, where
906 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
909 PREV_INSN (NEXT_INSN (trial)) == trial;
910 trial = NEXT_INSN (trial))
913 seq_insn = PREV_INSN (NEXT_INSN (trial));
914 seq = PATTERN (seq_insn);
916 /* Create a delay list consisting of all the insns other than the one
917 we are deleting (unless we were the only one). */
918 if (XVECLEN (seq, 0) > 2)
919 for (i = 1; i < XVECLEN (seq, 0); i++)
920 if (XVECEXP (seq, 0, i) != insn)
921 delay_list = add_to_delay_list (XVECEXP (seq, 0, i), delay_list);
923 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
924 list, and rebuild the delay list if non-empty. */
925 prev = PREV_INSN (seq_insn);
926 trial = XVECEXP (seq, 0, 0);
927 delete_insn (seq_insn);
928 add_insn_after (trial, prev);
930 if (GET_CODE (trial) == JUMP_INSN
931 && (simplejump_p (trial) || GET_CODE (PATTERN (trial)) == RETURN))
932 emit_barrier_after (trial);
934 /* If there are any delay insns, remit them. Otherwise clear the
937 trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2, 0);
939 INSN_ANNULLED_BRANCH_P (trial) = 0;
941 INSN_FROM_TARGET_P (insn) = 0;
943 /* Show we need to fill this insn again. */
944 obstack_ptr_grow (&unfilled_slots_obstack, trial);
947 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
948 the insn that sets CC0 for it and delete it too. */
951 delete_scheduled_jump (insn)
954 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
955 delete the insn that sets the condition code, but it is hard to find it.
956 Since this case is rare anyway, don't bother trying; there would likely
957 be other insns that became dead anyway, which we wouldn't know to
961 if (reg_mentioned_p (cc0_rtx, insn))
963 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
965 /* If a reg-note was found, it points to an insn to set CC0. This
966 insn is in the delay list of some other insn. So delete it from
967 the delay list it was in. */
970 if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
971 && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
972 delete_from_delay_slot (XEXP (note, 0));
976 /* The insn setting CC0 is our previous insn, but it may be in
977 a delay slot. It will be the last insn in the delay slot, if
979 rtx trial = previous_insn (insn);
980 if (GET_CODE (trial) == NOTE)
981 trial = prev_nonnote_insn (trial);
982 if (sets_cc0_p (PATTERN (trial)) != 1
983 || FIND_REG_INC_NOTE (trial, 0))
985 if (PREV_INSN (NEXT_INSN (trial)) == trial)
988 delete_from_delay_slot (trial);
996 /* Counters for delay-slot filling. */
998 #define NUM_REORG_FUNCTIONS 2
999 #define MAX_DELAY_HISTOGRAM 3
1000 #define MAX_REORG_PASSES 2
1002 static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES];
1004 static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES];
1006 static int reorg_pass_number;
1009 note_delay_statistics (slots_filled, index)
1010 int slots_filled, index;
1012 num_insns_needing_delays[index][reorg_pass_number]++;
1013 if (slots_filled > MAX_DELAY_HISTOGRAM)
1014 slots_filled = MAX_DELAY_HISTOGRAM;
1015 num_filled_delays[index][slots_filled][reorg_pass_number]++;
1018 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
1020 /* Optimize the following cases:
1022 1. When a conditional branch skips over only one instruction,
1023 use an annulling branch and put that insn in the delay slot.
1024 Use either a branch that annuls when the condition if true or
1025 invert the test with a branch that annuls when the condition is
1026 false. This saves insns, since otherwise we must copy an insn
1029 (orig) (skip) (otherwise)
1030 Bcc.n L1 Bcc',a L1 Bcc,a L1'
1037 2. When a conditional branch skips over only one instruction,
1038 and after that, it unconditionally branches somewhere else,
1039 perform the similar optimization. This saves executing the
1040 second branch in the case where the inverted condition is true.
1047 INSN is a JUMP_INSN.
1049 This should be expanded to skip over N insns, where N is the number
1050 of delay slots required. */
1053 optimize_skip (insn)
1056 register rtx trial = next_nonnote_insn (insn);
1057 rtx next_trial = next_active_insn (trial);
1062 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1065 || GET_CODE (trial) != INSN
1066 || GET_CODE (PATTERN (trial)) == SEQUENCE
1067 || recog_memoized (trial) < 0
1068 || (! eligible_for_annul_false (insn, 0, trial, flags)
1069 && ! eligible_for_annul_true (insn, 0, trial, flags)))
1072 /* There are two cases where we are just executing one insn (we assume
1073 here that a branch requires only one insn; this should be generalized
1074 at some point): Where the branch goes around a single insn or where
1075 we have one insn followed by a branch to the same label we branch to.
1076 In both of these cases, inverting the jump and annulling the delay
1077 slot give the same effect in fewer insns. */
1078 if ((next_trial == next_active_insn (JUMP_LABEL (insn)))
1080 && GET_CODE (next_trial) == JUMP_INSN
1081 && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)
1082 && (simplejump_p (next_trial)
1083 || GET_CODE (PATTERN (next_trial)) == RETURN)))
1085 if (eligible_for_annul_false (insn, 0, trial, flags))
1087 if (invert_jump (insn, JUMP_LABEL (insn)))
1088 INSN_FROM_TARGET_P (trial) = 1;
1089 else if (! eligible_for_annul_true (insn, 0, trial, flags))
1093 delay_list = add_to_delay_list (trial, NULL_RTX);
1094 next_trial = next_active_insn (trial);
1095 update_block (trial, trial);
1096 delete_insn (trial);
1098 /* Also, if we are targeting an unconditional
1099 branch, thread our jump to the target of that branch. Don't
1100 change this into a RETURN here, because it may not accept what
1101 we have in the delay slot. We'll fix this up later. */
1102 if (next_trial && GET_CODE (next_trial) == JUMP_INSN
1103 && (simplejump_p (next_trial)
1104 || GET_CODE (PATTERN (next_trial)) == RETURN))
1106 target_label = JUMP_LABEL (next_trial);
1107 if (target_label == 0)
1108 target_label = find_end_label ();
1109 redirect_jump (insn, target_label);
1112 INSN_ANNULLED_BRANCH_P (insn) = 1;
1120 /* Encode and return branch direction and prediction information for
1121 INSN assuming it will jump to LABEL.
1123 Non conditional branches return no direction information and
1124 are predicted as very likely taken. */
1126 get_jump_flags (insn, label)
1131 /* get_jump_flags can be passed any insn with delay slots, these may
1132 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
1133 direction information, and only if they are conditional jumps.
1135 If LABEL is zero, then there is no way to determine the branch
1137 if (GET_CODE (insn) == JUMP_INSN
1138 && condjump_p (insn)
1139 && INSN_UID (insn) <= max_uid
1140 && INSN_UID (label) <= max_uid
1143 = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
1144 ? ATTR_FLAG_forward : ATTR_FLAG_backward;
1145 /* No valid direction information. */
1149 /* If insn is a conditional branch call mostly_true_jump to get
1150 determine the branch prediction.
1152 Non conditional branches are predicted as very likely taken. */
1153 if (GET_CODE (insn) == JUMP_INSN
1154 && condjump_p (insn))
1158 prediction = mostly_true_jump (insn, get_branch_condition (insn, label));
1162 flags |= (ATTR_FLAG_very_likely | ATTR_FLAG_likely);
1165 flags |= ATTR_FLAG_likely;
1168 flags |= ATTR_FLAG_unlikely;
1171 flags |= (ATTR_FLAG_very_unlikely | ATTR_FLAG_unlikely);
1179 flags |= (ATTR_FLAG_very_likely | ATTR_FLAG_likely);
1184 /* Return 1 if DEST is a destination that will be branched to rarely (the
1185 return point of a function); return 2 if DEST will be branched to very
1186 rarely (a call to a function that doesn't return). Otherwise,
1190 rare_destination (insn)
1195 for (; insn; insn = NEXT_INSN (insn))
1197 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1198 insn = XVECEXP (PATTERN (insn), 0, 0);
1200 switch (GET_CODE (insn))
1205 /* A BARRIER can either be after a JUMP_INSN or a CALL_INSN. We
1206 don't scan past JUMP_INSNs, so any barrier we find here must
1207 have been after a CALL_INSN and hence mean the call doesn't
1211 if (GET_CODE (PATTERN (insn)) == RETURN)
1213 else if (simplejump_p (insn)
1214 && jump_count++ < 10)
1215 insn = JUMP_LABEL (insn);
1221 /* If we got here it means we hit the end of the function. So this
1222 is an unlikely destination. */
1227 /* Return truth value of the statement that this branch
1228 is mostly taken. If we think that the branch is extremely likely
1229 to be taken, we return 2. If the branch is slightly more likely to be
1230 taken, return 1. If the branch is slightly less likely to be taken,
1231 return 0 and if the branch is highly unlikely to be taken, return -1.
1233 CONDITION, if non-zero, is the condition that JUMP_INSN is testing. */
1236 mostly_true_jump (jump_insn, condition)
1237 rtx jump_insn, condition;
1239 rtx target_label = JUMP_LABEL (jump_insn);
1241 int rare_dest = rare_destination (target_label);
1242 int rare_fallthrough = rare_destination (NEXT_INSN (jump_insn));
1244 /* If this is a branch outside a loop, it is highly unlikely. */
1245 if (GET_CODE (PATTERN (jump_insn)) == SET
1246 && GET_CODE (SET_SRC (PATTERN (jump_insn))) == IF_THEN_ELSE
1247 && ((GET_CODE (XEXP (SET_SRC (PATTERN (jump_insn)), 1)) == LABEL_REF
1248 && LABEL_OUTSIDE_LOOP_P (XEXP (SET_SRC (PATTERN (jump_insn)), 1)))
1249 || (GET_CODE (XEXP (SET_SRC (PATTERN (jump_insn)), 2)) == LABEL_REF
1250 && LABEL_OUTSIDE_LOOP_P (XEXP (SET_SRC (PATTERN (jump_insn)), 2)))))
1255 /* If this is the test of a loop, it is very likely true. We scan
1256 backwards from the target label. If we find a NOTE_INSN_LOOP_BEG
1257 before the next real insn, we assume the branch is to the top of
1259 for (insn = PREV_INSN (target_label);
1260 insn && GET_CODE (insn) == NOTE;
1261 insn = PREV_INSN (insn))
1262 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1265 /* If this is a jump to the test of a loop, it is likely true. We scan
1266 forwards from the target label. If we find a NOTE_INSN_LOOP_VTOP
1267 before the next real insn, we assume the branch is to the loop branch
1269 for (insn = NEXT_INSN (target_label);
1270 insn && GET_CODE (insn) == NOTE;
1271 insn = PREV_INSN (insn))
1272 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP)
1276 /* Look at the relative rarities of the fallthough and destination. If
1277 they differ, we can predict the branch that way. */
1279 switch (rare_fallthrough - rare_dest)
1293 /* If we couldn't figure out what this jump was, assume it won't be
1294 taken. This should be rare. */
1298 /* EQ tests are usually false and NE tests are usually true. Also,
1299 most quantities are positive, so we can make the appropriate guesses
1300 about signed comparisons against zero. */
1301 switch (GET_CODE (condition))
1304 /* Unconditional branch. */
1312 if (XEXP (condition, 1) == const0_rtx)
1317 if (XEXP (condition, 1) == const0_rtx)
1322 /* Predict backward branches usually take, forward branches usually not. If
1323 we don't know whether this is forward or backward, assume the branch
1324 will be taken, since most are. */
1325 return (INSN_UID (jump_insn) > max_uid || INSN_UID (target_label) > max_uid
1326 || (uid_to_ruid[INSN_UID (jump_insn)]
1327 > uid_to_ruid[INSN_UID (target_label)]));;
1330 /* Return the condition under which INSN will branch to TARGET. If TARGET
1331 is zero, return the condition under which INSN will return. If INSN is
1332 an unconditional branch, return const_true_rtx. If INSN isn't a simple
1333 type of jump, or it doesn't go to TARGET, return 0. */
1336 get_branch_condition (insn, target)
1340 rtx pat = PATTERN (insn);
1343 if (GET_CODE (pat) == RETURN)
1344 return target == 0 ? const_true_rtx : 0;
1346 else if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
1349 src = SET_SRC (pat);
1350 if (GET_CODE (src) == LABEL_REF && XEXP (src, 0) == target)
1351 return const_true_rtx;
1353 else if (GET_CODE (src) == IF_THEN_ELSE
1354 && ((target == 0 && GET_CODE (XEXP (src, 1)) == RETURN)
1355 || (GET_CODE (XEXP (src, 1)) == LABEL_REF
1356 && XEXP (XEXP (src, 1), 0) == target))
1357 && XEXP (src, 2) == pc_rtx)
1358 return XEXP (src, 0);
1360 else if (GET_CODE (src) == IF_THEN_ELSE
1361 && ((target == 0 && GET_CODE (XEXP (src, 2)) == RETURN)
1362 || (GET_CODE (XEXP (src, 2)) == LABEL_REF
1363 && XEXP (XEXP (src, 2), 0) == target))
1364 && XEXP (src, 1) == pc_rtx)
1365 return gen_rtx (reverse_condition (GET_CODE (XEXP (src, 0))),
1366 GET_MODE (XEXP (src, 0)),
1367 XEXP (XEXP (src, 0), 0), XEXP (XEXP (src, 0), 1));
1372 /* Return non-zero if CONDITION is more strict than the condition of
1373 INSN, i.e., if INSN will always branch if CONDITION is true. */
1376 condition_dominates_p (condition, insn)
1380 rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn));
1381 enum rtx_code code = GET_CODE (condition);
1382 enum rtx_code other_code;
1384 if (rtx_equal_p (condition, other_condition)
1385 || other_condition == const_true_rtx)
1388 else if (condition == const_true_rtx || other_condition == 0)
1391 other_code = GET_CODE (other_condition);
1392 if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2
1393 || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0))
1394 || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1)))
1397 return comparison_dominates_p (code, other_code);
1400 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1401 the condition tested by INSN is CONDITION and the resources shown in
1402 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1403 from SEQ's delay list, in addition to whatever insns it may execute
1404 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1405 needed while searching for delay slot insns. Return the concatenated
1406 delay list if possible, otherwise, return 0.
1408 SLOTS_TO_FILL is the total number of slots required by INSN, and
1409 PSLOTS_FILLED points to the number filled so far (also the number of
1410 insns in DELAY_LIST). It is updated with the number that have been
1411 filled from the SEQUENCE, if any.
1413 PANNUL_P points to a non-zero value if we already know that we need
1414 to annul INSN. If this routine determines that annulling is needed,
1415 it may set that value non-zero.
1417 PNEW_THREAD points to a location that is to receive the place at which
1418 execution should continue. */
1421 steal_delay_list_from_target (insn, condition, seq, delay_list,
1422 sets, needed, other_needed,
1423 slots_to_fill, pslots_filled, pannul_p,
1425 rtx insn, condition;
1428 struct resources *sets, *needed, *other_needed;
1435 int slots_remaining = slots_to_fill - *pslots_filled;
1436 int total_slots_filled = *pslots_filled;
1437 rtx new_delay_list = 0;
1438 int must_annul = *pannul_p;
1441 /* We can't do anything if there are more delay slots in SEQ than we
1442 can handle, or if we don't know that it will be a taken branch.
1444 We know that it will be a taken branch if it is either an unconditional
1445 branch or a conditional branch with a stricter branch condition. */
1447 if (XVECLEN (seq, 0) - 1 > slots_remaining
1448 || ! condition_dominates_p (condition, XVECEXP (seq, 0, 0)))
1451 for (i = 1; i < XVECLEN (seq, 0); i++)
1453 rtx trial = XVECEXP (seq, 0, i);
1456 if (insn_references_resource_p (trial, sets, 0)
1457 || insn_sets_resource_p (trial, needed, 0)
1458 || insn_sets_resource_p (trial, sets, 0)
1460 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1462 || find_reg_note (trial, REG_CC_USER, NULL_RTX)
1464 /* If TRIAL is from the fallthrough code of an annulled branch insn
1465 in SEQ, we cannot use it. */
1466 || (INSN_ANNULLED_BRANCH_P (XVECEXP (seq, 0, 0))
1467 && ! INSN_FROM_TARGET_P (trial)))
1470 /* If this insn was already done (usually in a previous delay slot),
1471 pretend we put it in our delay slot. */
1472 if (redundant_insn_p (trial, insn, new_delay_list))
1475 /* We will end up re-vectoring this branch, so compute flags
1476 based on jumping to the new label. */
1477 flags = get_jump_flags (insn, JUMP_LABEL (XVECEXP (seq, 0, 0)));
1480 && ((condition == const_true_rtx
1481 || (! insn_sets_resource_p (trial, other_needed, 0)
1482 && ! may_trap_p (PATTERN (trial)))))
1483 ? eligible_for_delay (insn, total_slots_filled, trial, flags)
1485 eligible_for_annul_false (insn, total_slots_filled, trial, flags)))
1487 temp = copy_rtx (trial);
1488 INSN_FROM_TARGET_P (temp) = 1;
1489 new_delay_list = add_to_delay_list (temp, new_delay_list);
1490 total_slots_filled++;
1492 if (--slots_remaining == 0)
1499 /* Show the place to which we will be branching. */
1500 *pnew_thread = next_active_insn (JUMP_LABEL (XVECEXP (seq, 0, 0)));
1502 /* Add any new insns to the delay list and update the count of the
1503 number of slots filled. */
1504 *pslots_filled = total_slots_filled;
1505 *pannul_p = must_annul;
1507 if (delay_list == 0)
1508 return new_delay_list;
1510 for (temp = new_delay_list; temp; temp = XEXP (temp, 1))
1511 delay_list = add_to_delay_list (XEXP (temp, 0), delay_list);
1516 /* Similar to steal_delay_list_from_target except that SEQ is on the
1517 fallthrough path of INSN. Here we only do something if the delay insn
1518 of SEQ is an unconditional branch. In that case we steal its delay slot
1519 for INSN since unconditional branches are much easier to fill. */
1522 steal_delay_list_from_fallthrough (insn, condition, seq,
1523 delay_list, sets, needed, other_needed,
1524 slots_to_fill, pslots_filled, pannul_p)
1525 rtx insn, condition;
1528 struct resources *sets, *needed, *other_needed;
1536 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1538 /* We can't do anything if SEQ's delay insn isn't an
1539 unconditional branch. */
1541 if (! simplejump_p (XVECEXP (seq, 0, 0))
1542 && GET_CODE (PATTERN (XVECEXP (seq, 0, 0))) != RETURN)
1545 for (i = 1; i < XVECLEN (seq, 0); i++)
1547 rtx trial = XVECEXP (seq, 0, i);
1549 /* If TRIAL sets CC0, stealing it will move it too far from the use
1551 if (insn_references_resource_p (trial, sets, 0)
1552 || insn_sets_resource_p (trial, needed, 0)
1553 || insn_sets_resource_p (trial, sets, 0)
1555 || sets_cc0_p (PATTERN (trial))
1561 /* If this insn was already done, we don't need it. */
1562 if (redundant_insn_p (trial, insn, delay_list))
1564 delete_from_delay_slot (trial);
1569 && ((condition == const_true_rtx
1570 || (! insn_sets_resource_p (trial, other_needed, 0)
1571 && ! may_trap_p (PATTERN (trial)))))
1572 ? eligible_for_delay (insn, *pslots_filled, trial, flags)
1574 eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
1576 delete_from_delay_slot (trial);
1577 delay_list = add_to_delay_list (trial, delay_list);
1579 if (++(*pslots_filled) == slots_to_fill)
1589 /* Try merging insns starting at THREAD which match exactly the insns in
1592 If all insns were matched and the insn was previously annulling, the
1593 annul bit will be cleared.
1595 For each insn that is merged, if the branch is or will be non-annulling,
1596 we delete the merged insn. */
1599 try_merge_delay_insns (insn, thread)
1602 rtx trial, next_trial;
1603 rtx delay_insn = XVECEXP (PATTERN (insn), 0, 0);
1604 int annul_p = INSN_ANNULLED_BRANCH_P (delay_insn);
1605 int slot_number = 1;
1606 int num_slots = XVECLEN (PATTERN (insn), 0);
1607 rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1608 struct resources set, needed;
1609 rtx merged_insns = 0;
1613 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1615 CLEAR_RESOURCE (&needed);
1616 CLEAR_RESOURCE (&set);
1618 /* If this is not an annulling branch, take into account anything needed in
1619 NEXT_TO_MATCH. This prevents two increments from being incorrectly
1620 folded into one. If we are annulling, this would be the correct
1621 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1622 will essentially disable this optimization. This method is somewhat of
1623 a kludge, but I don't see a better way.) */
1625 mark_referenced_resources (next_to_match, &needed, 1);
1627 for (trial = thread; !stop_search_p (trial, 1); trial = next_trial)
1629 rtx pat = PATTERN (trial);
1631 next_trial = next_nonnote_insn (trial);
1633 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1634 if (GET_CODE (trial) == INSN
1635 && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER))
1638 if (GET_CODE (next_to_match) == GET_CODE (trial)
1640 /* We can't share an insn that sets cc0. */
1641 && ! sets_cc0_p (pat)
1643 && ! insn_references_resource_p (trial, &set, 1)
1644 && ! insn_sets_resource_p (trial, &set, 1)
1645 && ! insn_sets_resource_p (trial, &needed, 1)
1646 && (trial = try_split (pat, trial, 0)) != 0
1647 && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial))
1648 /* Have to test this condition if annul condition is different
1649 from (and less restrictive than) non-annulling one. */
1650 && eligible_for_delay (delay_insn, slot_number - 1, trial, flags))
1652 next_trial = next_nonnote_insn (trial);
1656 update_block (trial, thread);
1657 delete_insn (trial);
1658 INSN_FROM_TARGET_P (next_to_match) = 0;
1661 merged_insns = gen_rtx (INSN_LIST, VOIDmode, trial, merged_insns);
1663 if (++slot_number == num_slots)
1666 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1668 mark_referenced_resources (next_to_match, &needed, 1);
1671 mark_set_resources (trial, &set, 0, 1);
1672 mark_referenced_resources (trial, &needed, 1);
1675 /* See if we stopped on a filled insn. If we did, try to see if its
1676 delay slots match. */
1677 if (slot_number != num_slots
1678 && trial && GET_CODE (trial) == INSN
1679 && GET_CODE (PATTERN (trial)) == SEQUENCE
1680 && ! INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0)))
1682 rtx pat = PATTERN (trial);
1684 for (i = 1; i < XVECLEN (pat, 0); i++)
1686 rtx dtrial = XVECEXP (pat, 0, i);
1688 if (! insn_references_resource_p (dtrial, &set, 1)
1689 && ! insn_sets_resource_p (dtrial, &set, 1)
1690 && ! insn_sets_resource_p (dtrial, &needed, 1)
1692 && ! sets_cc0_p (PATTERN (dtrial))
1694 && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial))
1695 && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags))
1699 update_block (dtrial, thread);
1700 delete_from_delay_slot (dtrial);
1701 INSN_FROM_TARGET_P (next_to_match) = 0;
1704 merged_insns = gen_rtx (INSN_LIST, SImode, dtrial,
1707 if (++slot_number == num_slots)
1710 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1715 /* If all insns in the delay slot have been matched and we were previously
1716 annulling the branch, we need not any more. In that case delete all the
1717 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn the
1718 the delay list so that we know that it isn't only being used at the
1720 if (next_to_match == 0 && annul_p)
1722 for (; merged_insns; merged_insns = XEXP (merged_insns, 1))
1724 if (GET_MODE (merged_insns) == SImode)
1726 update_block (XEXP (merged_insns, 0), thread);
1727 delete_from_delay_slot (XEXP (merged_insns, 0));
1731 update_block (XEXP (merged_insns, 0), thread);
1732 delete_insn (XEXP (merged_insns, 0));
1736 INSN_ANNULLED_BRANCH_P (delay_insn) = 0;
1738 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1739 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0;
1743 /* See if INSN is redundant with an insn in front of TARGET. Often this
1744 is called when INSN is a candidate for a delay slot of TARGET.
1745 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1746 of INSN. Often INSN will be redundant with an insn in a delay slot of
1747 some previous insn. This happens when we have a series of branches to the
1748 same label; in that case the first insn at the target might want to go
1749 into each of the delay slots.
1751 If we are not careful, this routine can take up a significant fraction
1752 of the total compilation time (4%), but only wins rarely. Hence we
1753 speed this routine up by making two passes. The first pass goes back
1754 until it hits a label and sees if it find an insn with an identical
1755 pattern. Only in this (relatively rare) event does it check for
1758 We do not split insns we encounter. This could cause us not to find a
1759 redundant insn, but the cost of splitting seems greater than the possible
1760 gain in rare cases. */
1763 redundant_insn_p (insn, target, delay_list)
1768 rtx target_main = target;
1769 rtx ipat = PATTERN (insn);
1771 struct resources needed, set;
1774 /* Scan backwards looking for a match. */
1775 for (trial = PREV_INSN (target); trial; trial = PREV_INSN (trial))
1777 if (GET_CODE (trial) == CODE_LABEL)
1780 if (GET_RTX_CLASS (GET_CODE (trial)) != 'i')
1783 pat = PATTERN (trial);
1784 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1787 if (GET_CODE (pat) == SEQUENCE)
1789 /* Stop for a CALL and its delay slots because it is difficult to
1790 track its resource needs correctly. */
1791 if (GET_CODE (XVECEXP (pat, 0, 0)) == CALL_INSN)
1794 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1795 slots because it is difficult to track its resource needs
1798 #ifdef INSN_SETS_ARE_DELAYED
1799 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1803 #ifdef INSN_REFERENCES_ARE_DELAYED
1804 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1808 /* See if any of the insns in the delay slot match, updating
1809 resource requirements as we go. */
1810 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1811 if (GET_CODE (XVECEXP (pat, 0, i)) == GET_CODE (insn)
1812 && rtx_equal_p (PATTERN (XVECEXP (pat, 0, i)), ipat))
1815 /* If found a match, exit this loop early. */
1820 else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat))
1824 /* If we didn't find an insn that matches, return 0. */
1828 /* See what resources this insn sets and needs. If they overlap, or
1829 if this insn references CC0, it can't be redundant. */
1831 CLEAR_RESOURCE (&needed);
1832 CLEAR_RESOURCE (&set);
1833 mark_set_resources (insn, &set, 0, 1);
1834 mark_referenced_resources (insn, &needed, 1);
1836 /* If TARGET is a SEQUENCE, get the main insn. */
1837 if (GET_CODE (target) == INSN && GET_CODE (PATTERN (target)) == SEQUENCE)
1838 target_main = XVECEXP (PATTERN (target), 0, 0);
1840 if (resource_conflicts_p (&needed, &set)
1842 || reg_mentioned_p (cc0_rtx, ipat)
1844 /* The insn requiring the delay may not set anything needed or set by
1846 || insn_sets_resource_p (target_main, &needed, 1)
1847 || insn_sets_resource_p (target_main, &set, 1))
1850 /* Insns we pass may not set either NEEDED or SET, so merge them for
1852 needed.memory |= set.memory;
1853 IOR_HARD_REG_SET (needed.regs, set.regs);
1855 /* This insn isn't redundant if it conflicts with an insn that either is
1856 or will be in a delay slot of TARGET. */
1860 if (insn_sets_resource_p (XEXP (delay_list, 0), &needed, 1))
1862 delay_list = XEXP (delay_list, 1);
1865 if (GET_CODE (target) == INSN && GET_CODE (PATTERN (target)) == SEQUENCE)
1866 for (i = 1; i < XVECLEN (PATTERN (target), 0); i++)
1867 if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed, 1))
1870 /* Scan backwards until we reach a label or an insn that uses something
1871 INSN sets or sets something insn uses or sets. */
1873 for (trial = PREV_INSN (target);
1874 trial && GET_CODE (trial) != CODE_LABEL;
1875 trial = PREV_INSN (trial))
1877 if (GET_CODE (trial) != INSN && GET_CODE (trial) != CALL_INSN
1878 && GET_CODE (trial) != JUMP_INSN)
1881 pat = PATTERN (trial);
1882 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1885 if (GET_CODE (pat) == SEQUENCE)
1887 /* If this is a CALL_INSN and its delay slots, it is hard to track
1888 the resource needs properly, so give up. */
1889 if (GET_CODE (XVECEXP (pat, 0, 0)) == CALL_INSN)
1892 /* If this this is an INSN or JUMP_INSN with delayed effects, it
1893 is hard to track the resource needs properly, so give up. */
1895 #ifdef INSN_SETS_ARE_DELAYED
1896 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1900 #ifdef INSN_REFERENCES_ARE_DELAYED
1901 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1905 /* See if any of the insns in the delay slot match, updating
1906 resource requirements as we go. */
1907 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1909 rtx candidate = XVECEXP (pat, 0, i);
1911 /* If an insn will be annulled if the branch is false, it isn't
1912 considered as a possible duplicate insn. */
1913 if (rtx_equal_p (PATTERN (candidate), ipat)
1914 && ! (INSN_ANNULLED_BRANCH_P (XVECEXP (pat, 0, 0))
1915 && INSN_FROM_TARGET_P (candidate)))
1917 /* Show that this insn will be used in the sequel. */
1918 INSN_FROM_TARGET_P (candidate) = 0;
1922 /* Unless this is an annulled insn from the target of a branch,
1923 we must stop if it sets anything needed or set by INSN. */
1924 if ((! INSN_ANNULLED_BRANCH_P (XVECEXP (pat, 0, 0))
1925 || ! INSN_FROM_TARGET_P (candidate))
1926 && insn_sets_resource_p (candidate, &needed, 1))
1931 /* If the insn requiring the delay slot conflicts with INSN, we
1933 if (insn_sets_resource_p (XVECEXP (pat, 0, 0), &needed, 1))
1938 /* See if TRIAL is the same as INSN. */
1939 pat = PATTERN (trial);
1940 if (rtx_equal_p (pat, ipat))
1943 /* Can't go any further if TRIAL conflicts with INSN. */
1944 if (insn_sets_resource_p (trial, &needed, 1))
1952 /* Return 1 if THREAD can only be executed in one way. If LABEL is non-zero,
1953 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1954 is non-zero, we are allowed to fall into this thread; otherwise, we are
1957 If LABEL is used more than one or we pass a label other than LABEL before
1958 finding an active insn, we do not own this thread. */
1961 own_thread_p (thread, label, allow_fallthrough)
1964 int allow_fallthrough;
1969 /* We don't own the function end. */
1973 /* Get the first active insn, or THREAD, if it is an active insn. */
1974 active_insn = next_active_insn (PREV_INSN (thread));
1976 for (insn = thread; insn != active_insn; insn = NEXT_INSN (insn))
1977 if (GET_CODE (insn) == CODE_LABEL
1978 && (insn != label || LABEL_NUSES (insn) != 1))
1981 if (allow_fallthrough)
1984 /* Ensure that we reach a BARRIER before any insn or label. */
1985 for (insn = prev_nonnote_insn (thread);
1986 insn == 0 || GET_CODE (insn) != BARRIER;
1987 insn = prev_nonnote_insn (insn))
1989 || GET_CODE (insn) == CODE_LABEL
1990 || (GET_CODE (insn) == INSN
1991 && GET_CODE (PATTERN (insn)) != USE
1992 && GET_CODE (PATTERN (insn)) != CLOBBER))
1998 /* Find the number of the basic block that starts closest to INSN. Return -1
1999 if we couldn't find such a basic block. */
2002 find_basic_block (insn)
2007 /* Scan backwards to the previous BARRIER. Then see if we can find a
2008 label that starts a basic block. Return the basic block number. */
2010 for (insn = prev_nonnote_insn (insn);
2011 insn && GET_CODE (insn) != BARRIER;
2012 insn = prev_nonnote_insn (insn))
2015 /* The start of the function is basic block zero. */
2019 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
2020 anything other than a CODE_LABEL or note, we can't find this code. */
2021 for (insn = next_nonnote_insn (insn);
2022 insn && GET_CODE (insn) == CODE_LABEL;
2023 insn = next_nonnote_insn (insn))
2025 for (i = 0; i < n_basic_blocks; i++)
2026 if (insn == basic_block_head[i])
2033 /* Called when INSN is being moved from a location near the target of a jump.
2034 We leave a marker of the form (use (INSN)) immediately in front
2035 of WHERE for mark_target_live_regs. These markers will be deleted when
2038 We used to try to update the live status of registers if WHERE is at
2039 the start of a basic block, but that can't work since we may remove a
2040 BARRIER in relax_delay_slots. */
2043 update_block (insn, where)
2049 /* Ignore if this was in a delay slot and it came from the target of
2051 if (INSN_FROM_TARGET_P (insn))
2054 emit_insn_before (gen_rtx (USE, VOIDmode, insn), where);
2056 /* INSN might be making a value live in a block where it didn't use to
2057 be. So recompute liveness information for this block. */
2059 b = find_basic_block (insn);
2064 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
2065 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
2066 that reference values used in INSN. If we find one, then we move the
2067 REG_DEAD note to INSN.
2069 This is needed to handle the case where an later insn (after INSN) has a
2070 REG_DEAD note for a register used by INSN, and this later insn subsequently
2071 gets moved before a CODE_LABEL because it is a redundant insn. In this
2072 case, mark_target_live_regs may be confused into thinking the register
2073 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
2076 update_reg_dead_notes (insn, delayed_insn)
2077 rtx insn, delayed_insn;
2081 for (p = next_nonnote_insn (insn); p != delayed_insn;
2082 p = next_nonnote_insn (p))
2083 for (link = REG_NOTES (p); link; link = next)
2085 next = XEXP (link, 1);
2087 if (REG_NOTE_KIND (link) != REG_DEAD
2088 || GET_CODE (XEXP (link, 0)) != REG)
2091 if (reg_referenced_p (XEXP (link, 0), PATTERN (insn)))
2093 /* Move the REG_DEAD note from P to INSN. */
2094 remove_note (p, link);
2095 XEXP (link, 1) = REG_NOTES (insn);
2096 REG_NOTES (insn) = link;
2101 /* Marks registers possibly live at the current place being scanned by
2102 mark_target_live_regs. Used only by next two function. */
2104 static HARD_REG_SET current_live_regs;
2106 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
2107 Also only used by the next two functions. */
2109 static HARD_REG_SET pending_dead_regs;
2111 /* Utility function called from mark_target_live_regs via note_stores.
2112 It deadens any CLOBBERed registers and livens any SET registers. */
2115 update_live_status (dest, x)
2119 int first_regno, last_regno;
2122 if (GET_CODE (dest) != REG
2123 && (GET_CODE (dest) != SUBREG || GET_CODE (SUBREG_REG (dest)) != REG))
2126 if (GET_CODE (dest) == SUBREG)
2127 first_regno = REGNO (SUBREG_REG (dest)) + SUBREG_WORD (dest);
2129 first_regno = REGNO (dest);
2131 last_regno = first_regno + HARD_REGNO_NREGS (first_regno, GET_MODE (dest));
2133 if (GET_CODE (x) == CLOBBER)
2134 for (i = first_regno; i < last_regno; i++)
2135 CLEAR_HARD_REG_BIT (current_live_regs, i);
2137 for (i = first_regno; i < last_regno; i++)
2139 SET_HARD_REG_BIT (current_live_regs, i);
2140 CLEAR_HARD_REG_BIT (pending_dead_regs, i);
2144 /* Similar to next_insn, but ignores insns in the delay slots of
2145 an annulled branch. */
2148 next_insn_no_annul (insn)
2153 /* If INSN is an annulled branch, skip any insns from the target
2155 if (INSN_ANNULLED_BRANCH_P (insn)
2156 && NEXT_INSN (PREV_INSN (insn)) != insn)
2157 while (INSN_FROM_TARGET_P (NEXT_INSN (insn)))
2158 insn = NEXT_INSN (insn);
2160 insn = NEXT_INSN (insn);
2161 if (insn && GET_CODE (insn) == INSN
2162 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2163 insn = XVECEXP (PATTERN (insn), 0, 0);
2169 /* Set the resources that are live at TARGET.
2171 If TARGET is zero, we refer to the end of the current function and can
2172 return our precomputed value.
2174 Otherwise, we try to find out what is live by consulting the basic block
2175 information. This is tricky, because we must consider the actions of
2176 reload and jump optimization, which occur after the basic block information
2179 Accordingly, we proceed as follows::
2181 We find the previous BARRIER and look at all immediately following labels
2182 (with no intervening active insns) to see if any of them start a basic
2183 block. If we hit the start of the function first, we use block 0.
2185 Once we have found a basic block and a corresponding first insns, we can
2186 accurately compute the live status from basic_block_live_regs and
2187 reg_renumber. (By starting at a label following a BARRIER, we are immune
2188 to actions taken by reload and jump.) Then we scan all insns between
2189 that point and our target. For each CLOBBER (or for call-clobbered regs
2190 when we pass a CALL_INSN), mark the appropriate registers are dead. For
2191 a SET, mark them as live.
2193 We have to be careful when using REG_DEAD notes because they are not
2194 updated by such things as find_equiv_reg. So keep track of registers
2195 marked as dead that haven't been assigned to, and mark them dead at the
2196 next CODE_LABEL since reload and jump won't propagate values across labels.
2198 If we cannot find the start of a basic block (should be a very rare
2199 case, if it can happen at all), mark everything as potentially live.
2201 Next, scan forward from TARGET looking for things set or clobbered
2202 before they are used. These are not live.
2204 Because we can be called many times on the same target, save our results
2205 in a hash table indexed by INSN_UID. */
2208 mark_target_live_regs (target, res)
2210 struct resources *res;
2214 struct target_info *tinfo;
2218 HARD_REG_SET scratch;
2219 struct resources set, needed;
2222 /* Handle end of function. */
2225 *res = end_of_function_needs;
2229 /* We have to assume memory is needed, but the CC isn't. */
2234 /* See if we have computed this value already. */
2235 for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
2236 tinfo; tinfo = tinfo->next)
2237 if (tinfo->uid == INSN_UID (target))
2240 /* Start by getting the basic block number. If we have saved information,
2241 we can get it from there unless the insn at the start of the basic block
2242 has been deleted. */
2243 if (tinfo && tinfo->block != -1
2244 && ! INSN_DELETED_P (basic_block_head[tinfo->block]))
2248 b = find_basic_block (target);
2252 /* If the information is up-to-date, use it. Otherwise, we will
2254 if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b])
2256 COPY_HARD_REG_SET (res->regs, tinfo->live_regs);
2262 /* Allocate a place to put our results and chain it into the
2264 tinfo = (struct target_info *) oballoc (sizeof (struct target_info));
2265 tinfo->uid = INSN_UID (target);
2267 tinfo->next = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
2268 target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo;
2271 CLEAR_HARD_REG_SET (pending_dead_regs);
2273 /* If we found a basic block, get the live registers from it and update
2274 them with anything set or killed between its start and the insn before
2275 TARGET. Otherwise, we must assume everything is live. */
2278 regset regs_live = basic_block_live_at_start[b];
2280 REGSET_ELT_TYPE bit;
2282 rtx start_insn, stop_insn;
2284 /* Compute hard regs live at start of block -- this is the real hard regs
2285 marked live, plus live pseudo regs that have been renumbered to
2289 current_live_regs = *regs_live;
2291 COPY_HARD_REG_SET (current_live_regs, regs_live);
2294 for (offset = 0, i = 0; offset < regset_size; offset++)
2296 if (regs_live[offset] == 0)
2297 i += REGSET_ELT_BITS;
2299 for (bit = 1; bit && i < max_regno; bit <<= 1, i++)
2300 if ((regs_live[offset] & bit)
2301 && (regno = reg_renumber[i]) >= 0)
2303 j < regno + HARD_REGNO_NREGS (regno,
2304 PSEUDO_REGNO_MODE (i));
2306 SET_HARD_REG_BIT (current_live_regs, j);
2309 /* Get starting and ending insn, handling the case where each might
2311 start_insn = (b == 0 ? get_insns () : basic_block_head[b]);
2314 if (GET_CODE (start_insn) == INSN
2315 && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
2316 start_insn = XVECEXP (PATTERN (start_insn), 0, 0);
2318 if (GET_CODE (stop_insn) == INSN
2319 && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
2320 stop_insn = next_insn (PREV_INSN (stop_insn));
2322 for (insn = start_insn; insn != stop_insn;
2323 insn = next_insn_no_annul (insn))
2326 rtx real_insn = insn;
2328 /* If this insn is from the target of a branch, it isn't going to
2329 be used in the sequel. If it is used in both cases, this
2330 test will not be true. */
2331 if (INSN_FROM_TARGET_P (insn))
2334 /* If this insn is a USE made by update_block, we care about the
2336 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == USE
2337 && GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn), 0))) == 'i')
2338 real_insn = XEXP (PATTERN (insn), 0);
2340 if (GET_CODE (real_insn) == CALL_INSN)
2342 /* CALL clobbers all call-used regs that aren't fixed except
2343 sp, ap, and fp. Do this before setting the result of the
2345 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2346 if (call_used_regs[i]
2347 && i != STACK_POINTER_REGNUM && i != FRAME_POINTER_REGNUM
2348 && i != ARG_POINTER_REGNUM
2349 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
2350 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
2352 #ifdef PIC_OFFSET_TABLE_REGNUM
2353 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
2356 CLEAR_HARD_REG_BIT (current_live_regs, i);
2358 /* A CALL_INSN sets any global register live, since it may
2359 have been modified by the call. */
2360 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2362 SET_HARD_REG_BIT (current_live_regs, i);
2365 /* Mark anything killed in an insn to be deadened at the next
2366 label. Ignore USE insns; the only REG_DEAD notes will be for
2367 parameters. But they might be early. A CALL_INSN will usually
2368 clobber registers used for parameters. It isn't worth bothering
2369 with the unlikely case when it won't. */
2370 if ((GET_CODE (real_insn) == INSN
2371 && GET_CODE (PATTERN (real_insn)) != USE)
2372 || GET_CODE (real_insn) == JUMP_INSN
2373 || GET_CODE (real_insn) == CALL_INSN)
2375 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
2376 if (REG_NOTE_KIND (link) == REG_DEAD
2377 && GET_CODE (XEXP (link, 0)) == REG
2378 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
2380 int first_regno = REGNO (XEXP (link, 0));
2383 + HARD_REGNO_NREGS (first_regno,
2384 GET_MODE (XEXP (link, 0))));
2386 for (i = first_regno; i < last_regno; i++)
2387 SET_HARD_REG_BIT (pending_dead_regs, i);
2390 note_stores (PATTERN (real_insn), update_live_status);
2392 /* If any registers were unused after this insn, kill them.
2393 These notes will always be accurate. */
2394 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
2395 if (REG_NOTE_KIND (link) == REG_UNUSED
2396 && GET_CODE (XEXP (link, 0)) == REG
2397 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
2399 int first_regno = REGNO (XEXP (link, 0));
2402 + HARD_REGNO_NREGS (first_regno,
2403 GET_MODE (XEXP (link, 0))));
2405 for (i = first_regno; i < last_regno; i++)
2406 CLEAR_HARD_REG_BIT (current_live_regs, i);
2410 else if (GET_CODE (real_insn) == CODE_LABEL)
2412 /* A label clobbers the pending dead registers since neither
2413 reload nor jump will propagate a value across a label. */
2414 AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs);
2415 CLEAR_HARD_REG_SET (pending_dead_regs);
2418 /* The beginning of the epilogue corresponds to the end of the
2419 RTL chain when there are no epilogue insns. Certain resources
2420 are implicitly required at that point. */
2421 else if (GET_CODE (real_insn) == NOTE
2422 && NOTE_LINE_NUMBER (real_insn) == NOTE_INSN_EPILOGUE_BEG)
2423 IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
2426 COPY_HARD_REG_SET (res->regs, current_live_regs);
2428 tinfo->bb_tick = bb_ticks[b];
2431 /* We didn't find the start of a basic block. Assume everything
2432 in use. This should happen only extremely rarely. */
2433 SET_HARD_REG_SET (res->regs);
2435 /* Now step forward from TARGET looking for registers that are set before
2436 they are used. These are dead. If we pass a label, any pending dead
2437 registers that weren't yet used can be made dead. Stop when we pass a
2438 conditional JUMP_INSN; follow the first few unconditional branches. */
2440 CLEAR_RESOURCE (&set);
2441 CLEAR_RESOURCE (&needed);
2443 for (insn = target; insn; insn = next)
2445 rtx this_jump_insn = insn;
2447 next = NEXT_INSN (insn);
2448 switch (GET_CODE (insn))
2451 AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs);
2452 AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs);
2453 CLEAR_HARD_REG_SET (pending_dead_regs);
2461 if (GET_CODE (PATTERN (insn)) == USE)
2463 /* If INSN is a USE made by update_block, we care about the
2464 underlying insn. Any registers set by the underlying insn
2465 are live since the insn is being done somewhere else. */
2466 if (GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn), 0))) == 'i')
2467 mark_set_resources (XEXP (PATTERN (insn), 0), res, 0, 1);
2469 /* All other USE insns are to be ignored. */
2472 else if (GET_CODE (PATTERN (insn)) == CLOBBER)
2474 else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
2476 /* An unconditional jump can be used to fill the delay slot
2477 of a call, so search for a JUMP_INSN in any position. */
2478 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2480 this_jump_insn = XVECEXP (PATTERN (insn), 0, i);
2481 if (GET_CODE (this_jump_insn) == JUMP_INSN)
2487 if (GET_CODE (this_jump_insn) == JUMP_INSN)
2489 if (jump_count++ < 10
2490 && (simplejump_p (this_jump_insn)
2491 || GET_CODE (PATTERN (this_jump_insn)) == RETURN))
2493 next = next_active_insn (JUMP_LABEL (this_jump_insn));
2497 jump_target = JUMP_LABEL (this_jump_insn);
2504 mark_referenced_resources (insn, &needed, 1);
2505 mark_set_resources (insn, &set, 0, 1);
2507 COPY_HARD_REG_SET (scratch, set.regs);
2508 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
2509 AND_COMPL_HARD_REG_SET (res->regs, scratch);
2512 /* If we hit an unconditional branch, we have another way of finding out
2513 what is live: we can see what is live at the branch target and include
2514 anything used but not set before the branch. The only things that are
2515 live are those that are live using the above test and the test below.
2517 Don't try this if we expired our jump count above, since that would
2518 mean there may be an infinite loop in the function being compiled. */
2520 if (jump_insn && jump_count < 10)
2522 struct resources new_resources;
2523 rtx stop_insn = next_active_insn (jump_insn);
2525 mark_target_live_regs (next_active_insn (jump_target), &new_resources);
2526 CLEAR_RESOURCE (&set);
2527 CLEAR_RESOURCE (&needed);
2529 /* Include JUMP_INSN in the needed registers. */
2530 for (insn = target; insn != stop_insn; insn = next_active_insn (insn))
2532 mark_referenced_resources (insn, &needed, 1);
2534 COPY_HARD_REG_SET (scratch, needed.regs);
2535 AND_COMPL_HARD_REG_SET (scratch, set.regs);
2536 IOR_HARD_REG_SET (new_resources.regs, scratch);
2538 mark_set_resources (insn, &set, 0, 1);
2541 AND_HARD_REG_SET (res->regs, new_resources.regs);
2544 COPY_HARD_REG_SET (tinfo->live_regs, res->regs);
2547 /* Scan a function looking for insns that need a delay slot and find insns to
2548 put into the delay slot.
2550 NON_JUMPS_P is non-zero if we are to only try to fill non-jump insns (such
2551 as calls). We do these first since we don't want jump insns (that are
2552 easier to fill) to get the only insns that could be used for non-jump insns.
2553 When it is zero, only try to fill JUMP_INSNs.
2555 When slots are filled in this manner, the insns (including the
2556 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
2557 it is possible to tell whether a delay slot has really been filled
2558 or not. `final' knows how to deal with this, by communicating
2559 through FINAL_SEQUENCE. */
2562 fill_simple_delay_slots (first, non_jumps_p)
2566 register rtx insn, pat, trial, next_trial;
2568 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2569 struct resources needed, set;
2570 register int slots_to_fill, slots_filled;
2573 for (i = 0; i < num_unfilled_slots; i++)
2576 /* Get the next insn to fill. If it has already had any slots assigned,
2577 we can't do anything with it. Maybe we'll improve this later. */
2579 insn = unfilled_slots_base[i];
2581 || INSN_DELETED_P (insn)
2582 || (GET_CODE (insn) == INSN
2583 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2584 || (GET_CODE (insn) == JUMP_INSN && non_jumps_p)
2585 || (GET_CODE (insn) != JUMP_INSN && ! non_jumps_p))
2588 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2589 slots_to_fill = num_delay_slots (insn);
2590 if (slots_to_fill == 0)
2593 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
2594 says how many. After initialization, first try optimizing
2597 nop add %o7,.-L1,%o7
2601 If this case applies, the delay slot of the call is filled with
2602 the unconditional jump. This is done first to avoid having the
2603 delay slot of the call filled in the backward scan. Also, since
2604 the unconditional jump is likely to also have a delay slot, that
2605 insn must exist when it is subsequently scanned. */
2610 if (GET_CODE (insn) == CALL_INSN
2611 && (trial = next_active_insn (insn))
2612 && GET_CODE (trial) == JUMP_INSN
2613 && simplejump_p (trial)
2614 && eligible_for_delay (insn, slots_filled, trial, flags)
2615 && no_labels_between_p (insn, trial))
2618 delay_list = add_to_delay_list (trial, delay_list);
2619 /* Remove the unconditional jump from consideration for delay slot
2620 filling and unthread it. */
2621 if (unfilled_slots_base[i + 1] == trial)
2622 unfilled_slots_base[i + 1] = 0;
2624 rtx next = NEXT_INSN (trial);
2625 rtx prev = PREV_INSN (trial);
2627 NEXT_INSN (prev) = next;
2629 PREV_INSN (next) = prev;
2633 /* Now, scan backwards from the insn to search for a potential
2634 delay-slot candidate. Stop searching when a label or jump is hit.
2636 For each candidate, if it is to go into the delay slot (moved
2637 forward in execution sequence), it must not need or set any resources
2638 that were set by later insns and must not set any resources that
2639 are needed for those insns.
2641 The delay slot insn itself sets resources unless it is a call
2642 (in which case the called routine, not the insn itself, is doing
2645 if (slots_filled < slots_to_fill)
2647 CLEAR_RESOURCE (&needed);
2648 CLEAR_RESOURCE (&set);
2649 mark_set_resources (insn, &set, 0, 0);
2650 mark_referenced_resources (insn, &needed, 0);
2652 for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1);
2655 next_trial = prev_nonnote_insn (trial);
2657 /* This must be an INSN or CALL_INSN. */
2658 pat = PATTERN (trial);
2660 /* USE and CLOBBER at this level was just for flow; ignore it. */
2661 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2664 /* Check for resource conflict first, to avoid unnecessary
2666 if (! insn_references_resource_p (trial, &set, 1)
2667 && ! insn_sets_resource_p (trial, &set, 1)
2668 && ! insn_sets_resource_p (trial, &needed, 1)
2670 /* Can't separate set of cc0 from its use. */
2671 && ! (reg_mentioned_p (cc0_rtx, pat)
2672 && ! sets_cc0_p (cc0_rtx, pat))
2676 trial = try_split (pat, trial, 1);
2677 next_trial = prev_nonnote_insn (trial);
2678 if (eligible_for_delay (insn, slots_filled, trial, flags))
2680 /* In this case, we are searching backward, so if we
2681 find insns to put on the delay list, we want
2682 to put them at the head, rather than the
2683 tail, of the list. */
2685 update_reg_dead_notes (trial, insn);
2686 delay_list = gen_rtx (INSN_LIST, VOIDmode,
2688 update_block (trial, trial);
2689 delete_insn (trial);
2690 if (slots_to_fill == ++slots_filled)
2696 mark_set_resources (trial, &set, 0, 1);
2697 mark_referenced_resources (trial, &needed, 1);
2701 /* If all needed slots haven't been filled, we come here. */
2703 /* Try to optimize case of jumping around a single insn. */
2704 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2705 if (slots_filled != slots_to_fill
2707 && GET_CODE (insn) == JUMP_INSN && condjump_p (insn))
2709 delay_list = optimize_skip (insn);
2715 /* Try to get insns from beyond the insn needing the delay slot.
2716 These insns can neither set or reference resources set in insns being
2717 skipped, cannot set resources in the insn being skipped, and, if this
2718 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2719 call might not return).
2721 If this is a conditional jump, see if it merges back to us early
2722 enough for us to pick up insns from the merge point. Don't do
2723 this if there is another branch to our label unless we pass all of
2726 Another similar merge is if we jump to the same place that a
2727 later unconditional jump branches to. In that case, we don't
2728 care about the number of uses of our label. */
2730 if (slots_filled != slots_to_fill
2731 && (GET_CODE (insn) != JUMP_INSN
2732 || (condjump_p (insn) && ! simplejump_p (insn)
2733 && JUMP_LABEL (insn) != 0)))
2736 int maybe_never = 0;
2737 int passed_label = 0;
2739 struct resources needed_at_jump;
2741 CLEAR_RESOURCE (&needed);
2742 CLEAR_RESOURCE (&set);
2744 if (GET_CODE (insn) == CALL_INSN)
2746 mark_set_resources (insn, &set, 0, 1);
2747 mark_referenced_resources (insn, &needed, 1);
2752 mark_set_resources (insn, &set, 0, 1);
2753 mark_referenced_resources (insn, &needed, 1);
2754 if (GET_CODE (insn) == JUMP_INSN)
2756 /* Get our target and show how many more uses we want to
2757 see before we hit the label. */
2758 target = JUMP_LABEL (insn);
2759 target_uses = LABEL_NUSES (target) - 1;
2764 for (trial = next_nonnote_insn (insn); trial; trial = next_trial)
2766 rtx pat, trial_delay;
2768 next_trial = next_nonnote_insn (trial);
2770 if (GET_CODE (trial) == CODE_LABEL)
2774 /* If this is our target, see if we have seen all its uses.
2775 If so, indicate we have passed our target and ignore it.
2776 All other labels cause us to stop our search. */
2777 if (trial == target && target_uses == 0)
2785 else if (GET_CODE (trial) == BARRIER)
2788 /* We must have an INSN, JUMP_INSN, or CALL_INSN. */
2789 pat = PATTERN (trial);
2791 /* Stand-alone USE and CLOBBER are just for flow. */
2792 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2795 /* If this already has filled delay slots, get the insn needing
2797 if (GET_CODE (pat) == SEQUENCE)
2798 trial_delay = XVECEXP (pat, 0, 0);
2800 trial_delay = trial;
2802 /* If this is a jump insn to our target, indicate that we have
2803 seen another jump to it. If we aren't handling a conditional
2804 jump, stop our search. Otherwise, compute the needs at its
2805 target and add them to NEEDED. */
2806 if (GET_CODE (trial_delay) == JUMP_INSN)
2810 else if (JUMP_LABEL (trial_delay) == target)
2814 mark_target_live_regs
2815 (next_active_insn (JUMP_LABEL (trial_delay)),
2817 needed.memory |= needed_at_jump.memory;
2818 IOR_HARD_REG_SET (needed.regs, needed_at_jump.regs);
2822 /* See if we have a resource problem before we try to
2825 && GET_CODE (pat) != SEQUENCE
2826 && ! insn_references_resource_p (trial, &set, 1)
2827 && ! insn_sets_resource_p (trial, &set, 1)
2828 && ! insn_sets_resource_p (trial, &needed, 1)
2830 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2832 && ! (maybe_never && may_trap_p (pat))
2833 && (trial = try_split (pat, trial, 0))
2834 && eligible_for_delay (insn, slots_filled, trial, flags))
2836 next_trial = next_nonnote_insn (trial);
2837 delay_list = add_to_delay_list (trial, delay_list);
2840 if (reg_mentioned_p (cc0_rtx, pat))
2841 link_cc0_insns (trial);
2845 update_block (trial, trial);
2846 delete_insn (trial);
2847 if (slots_to_fill == ++slots_filled)
2852 mark_set_resources (trial, &set, 0, 1);
2853 mark_referenced_resources (trial, &needed, 1);
2855 /* Ensure we don't put insns between the setting of cc and the
2856 comparison by moving a setting of cc into an earlier delay
2857 slot since these insns could clobber the condition code. */
2860 /* If this is a call or jump, we might not get here. */
2861 if (GET_CODE (trial) == CALL_INSN
2862 || GET_CODE (trial) == JUMP_INSN)
2866 /* If there are slots left to fill and our search was stopped by an
2867 unconditional branch, try the insn at the branch target. We can
2868 redirect the branch if it works. */
2869 if (slots_to_fill != slots_filled
2871 && GET_CODE (trial) == JUMP_INSN
2872 && simplejump_p (trial)
2873 && (target == 0 || JUMP_LABEL (trial) == target)
2874 && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0
2875 && ! (GET_CODE (next_trial) == INSN
2876 && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
2877 && ! insn_references_resource_p (next_trial, &set, 1)
2878 && ! insn_sets_resource_p (next_trial, &set, 1)
2879 && ! insn_sets_resource_p (next_trial, &needed, 1)
2881 && ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial))
2883 && ! (maybe_never && may_trap_p (PATTERN (next_trial)))
2884 && (next_trial = try_split (PATTERN (next_trial), next_trial, 0))
2885 && eligible_for_delay (insn, slots_filled, next_trial, flags))
2887 rtx new_label = next_active_insn (next_trial);
2890 new_label = get_label_before (new_label);
2893 = add_to_delay_list (copy_rtx (next_trial), delay_list);
2895 redirect_jump (trial, new_label);
2897 /* If we merged because we both jumped to the same place,
2898 redirect the original insn also. */
2900 redirect_jump (insn, new_label);
2905 unfilled_slots_base[i]
2906 = emit_delay_sequence (insn, delay_list,
2907 slots_filled, slots_to_fill);
2909 if (slots_to_fill == slots_filled)
2910 unfilled_slots_base[i] = 0;
2912 note_delay_statistics (slots_filled, 0);
2915 #ifdef DELAY_SLOTS_FOR_EPILOGUE
2916 /* See if the epilogue needs any delay slots. Try to fill them if so.
2917 The only thing we can do is scan backwards from the end of the
2918 function. If we did this in a previous pass, it is incorrect to do it
2920 if (current_function_epilogue_delay_list)
2923 slots_to_fill = DELAY_SLOTS_FOR_EPILOGUE;
2924 if (slots_to_fill == 0)
2928 CLEAR_RESOURCE (&needed);
2929 CLEAR_RESOURCE (&set);
2931 for (trial = get_last_insn (); ! stop_search_p (trial, 1);
2932 trial = PREV_INSN (trial))
2934 if (GET_CODE (trial) == NOTE)
2936 pat = PATTERN (trial);
2937 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2940 if (! insn_references_resource_p (trial, &set, 1)
2941 && ! insn_sets_resource_p (trial, &needed, 1)
2943 /* Don't want to mess with cc0 here. */
2944 && ! reg_mentioned_p (cc0_rtx, pat)
2948 trial = try_split (pat, trial, 1);
2949 if (ELIGIBLE_FOR_EPILOGUE_DELAY (trial, slots_filled))
2951 /* Here as well we are searching backward, so put the
2952 insns we find on the head of the list. */
2954 current_function_epilogue_delay_list
2955 = gen_rtx (INSN_LIST, VOIDmode, trial,
2956 current_function_epilogue_delay_list);
2957 mark_referenced_resources (trial, &end_of_function_needs, 1);
2958 update_block (trial, trial);
2959 delete_insn (trial);
2961 /* Clear deleted bit so final.c will output the insn. */
2962 INSN_DELETED_P (trial) = 0;
2964 if (slots_to_fill == ++slots_filled)
2970 mark_set_resources (trial, &set, 0, 1);
2971 mark_referenced_resources (trial, &needed, 1);
2974 note_delay_statistics (slots_filled, 0);
2978 /* Try to find insns to place in delay slots.
2980 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2981 or is an unconditional branch if CONDITION is const_true_rtx.
2982 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2984 THREAD is a flow-of-control, either the insns to be executed if the
2985 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2987 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2988 to see if any potential delay slot insns set things needed there.
2990 LIKELY is non-zero if it is extremely likely that the branch will be
2991 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2992 end of a loop back up to the top.
2994 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
2995 thread. I.e., it is the fallthrough code of our jump or the target of the
2996 jump when we are the only jump going there.
2998 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2999 case, we can only take insns from the head of the thread for our delay
3000 slot. We then adjust the jump to point after the insns we have taken. */
3003 fill_slots_from_thread (insn, condition, thread, opposite_thread, likely,
3004 thread_if_true, own_thread, own_opposite_thread,
3005 slots_to_fill, pslots_filled)
3008 rtx thread, opposite_thread;
3011 int own_thread, own_opposite_thread;
3012 int slots_to_fill, *pslots_filled;
3016 struct resources opposite_needed, set, needed;
3022 /* Validate our arguments. */
3023 if ((condition == const_true_rtx && ! thread_if_true)
3024 || (! own_thread && ! thread_if_true))
3027 flags = get_jump_flags (insn, JUMP_LABEL (insn));
3029 /* If our thread is the end of subroutine, we can't get any delay
3034 /* If this is an unconditional branch, nothing is needed at the
3035 opposite thread. Otherwise, compute what is needed there. */
3036 if (condition == const_true_rtx)
3037 CLEAR_RESOURCE (&opposite_needed);
3039 mark_target_live_regs (opposite_thread, &opposite_needed);
3041 /* If the insn at THREAD can be split, do it here to avoid having to
3042 update THREAD and NEW_THREAD if it is done in the loop below. Also
3043 initialize NEW_THREAD. */
3045 new_thread = thread = try_split (PATTERN (thread), thread, 0);
3047 /* Scan insns at THREAD. We are looking for an insn that can be removed
3048 from THREAD (it neither sets nor references resources that were set
3049 ahead of it and it doesn't set anything needs by the insns ahead of
3050 it) and that either can be placed in an annulling insn or aren't
3051 needed at OPPOSITE_THREAD. */
3053 CLEAR_RESOURCE (&needed);
3054 CLEAR_RESOURCE (&set);
3056 /* If we do not own this thread, we must stop as soon as we find
3057 something that we can't put in a delay slot, since all we can do
3058 is branch into THREAD at a later point. Therefore, labels stop
3059 the search if this is not the `true' thread. */
3061 for (trial = thread;
3062 ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread);
3063 trial = next_nonnote_insn (trial))
3067 /* If we have passed a label, we no longer own this thread. */
3068 if (GET_CODE (trial) == CODE_LABEL)
3074 pat = PATTERN (trial);
3075 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
3078 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
3079 don't separate or copy insns that set and use CC0. */
3080 if (! insn_references_resource_p (trial, &set, 1)
3081 && ! insn_sets_resource_p (trial, &set, 1)
3082 && ! insn_sets_resource_p (trial, &needed, 1)
3084 && ! (reg_mentioned_p (cc0_rtx, pat)
3085 && (! own_thread || ! sets_cc0_p (pat)))
3089 /* If TRIAL is redundant with some insn before INSN, we don't
3090 actually need to add it to the delay list; we can merely pretend
3092 if (redundant_insn_p (trial, insn, delay_list))
3096 update_block (trial, thread);
3097 delete_insn (trial);
3100 new_thread = next_active_insn (trial);
3105 /* There are two ways we can win: If TRIAL doesn't set anything
3106 needed at the opposite thread and can't trap, or if it can
3107 go into an annulled delay slot. */
3108 if (condition == const_true_rtx
3109 || (! insn_sets_resource_p (trial, &opposite_needed, 1)
3110 && ! may_trap_p (pat)))
3112 trial = try_split (pat, trial, 0);
3113 pat = PATTERN (trial);
3114 if (eligible_for_delay (insn, *pslots_filled, trial, flags))
3118 #ifdef ANNUL_IFTRUE_SLOTS
3121 #ifdef ANNUL_IFFALSE_SLOTS
3126 trial = try_split (pat, trial, 0);
3127 pat = PATTERN (trial);
3129 ? eligible_for_annul_false (insn, *pslots_filled, trial, flags)
3130 : eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
3138 if (reg_mentioned_p (cc0_rtx, pat))
3139 link_cc0_insns (trial);
3142 /* If we own this thread, delete the insn. If this is the
3143 destination of a branch, show that a basic block status
3144 may have been updated. In any case, mark the new
3145 starting point of this thread. */
3148 update_block (trial, thread);
3149 delete_insn (trial);
3152 new_thread = next_active_insn (trial);
3154 temp = own_thread ? trial : copy_rtx (trial);
3156 INSN_FROM_TARGET_P (temp) = 1;
3158 delay_list = add_to_delay_list (temp, delay_list);
3160 if (slots_to_fill == ++(*pslots_filled))
3162 /* Even though we have filled all the slots, we
3163 may be branching to a location that has a
3164 redundant insn. Skip any if so. */
3165 while (new_thread && ! own_thread
3166 && ! insn_sets_resource_p (new_thread, &set, 1)
3167 && ! insn_sets_resource_p (new_thread, &needed, 1)
3168 && ! insn_references_resource_p (new_thread,
3170 && redundant_insn_p (new_thread, insn,
3172 new_thread = next_active_insn (new_thread);
3181 /* This insn can't go into a delay slot. */
3183 mark_set_resources (trial, &set, 0, 1);
3184 mark_referenced_resources (trial, &needed, 1);
3186 /* Ensure we don't put insns between the setting of cc and the comparison
3187 by moving a setting of cc into an earlier delay slot since these insns
3188 could clobber the condition code. */
3191 /* If this insn is a register-register copy and the next insn has
3192 a use of our destination, change it to use our source. That way,
3193 it will become a candidate for our delay slot the next time
3194 through this loop. This case occurs commonly in loops that
3197 We could check for more complex cases than those tested below,
3198 but it doesn't seem worth it. It might also be a good idea to try
3199 to swap the two insns. That might do better.
3201 We can't do this if the next insn modifies our source, because that
3202 would make the replacement into the insn invalid. This also
3203 prevents updating the contents of a PRE_INC. */
3205 if (GET_CODE (trial) == INSN && GET_CODE (pat) == SET
3206 && GET_CODE (SET_SRC (pat)) == REG
3207 && GET_CODE (SET_DEST (pat)) == REG)
3209 rtx next = next_nonnote_insn (trial);
3211 if (next && GET_CODE (next) == INSN
3212 && GET_CODE (PATTERN (next)) != USE
3213 && ! reg_set_p (SET_DEST (pat), next)
3214 && reg_referenced_p (SET_DEST (pat), PATTERN (next)))
3215 validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next);
3219 /* If we stopped on a branch insn that has delay slots, see if we can
3220 steal some of the insns in those slots. */
3221 if (trial && GET_CODE (trial) == INSN
3222 && GET_CODE (PATTERN (trial)) == SEQUENCE
3223 && GET_CODE (XVECEXP (PATTERN (trial), 0, 0)) == JUMP_INSN)
3225 /* If this is the `true' thread, we will want to follow the jump,
3226 so we can only do this if we have taken everything up to here. */
3227 if (thread_if_true && trial == new_thread)
3229 = steal_delay_list_from_target (insn, condition, PATTERN (trial),
3230 delay_list, &set, &needed,
3231 &opposite_needed, slots_to_fill,
3232 pslots_filled, &must_annul,
3234 else if (! thread_if_true)
3236 = steal_delay_list_from_fallthrough (insn, condition,
3238 delay_list, &set, &needed,
3239 &opposite_needed, slots_to_fill,
3240 pslots_filled, &must_annul);
3243 /* If we haven't found anything for this delay slot and it is very
3244 likely that the branch will be taken, see if the insn at our target
3245 increments or decrements a register with an increment that does not
3246 depend on the destination register. If so, try to place the opposite
3247 arithmetic insn after the jump insn and put the arithmetic insn in the
3248 delay slot. If we can't do this, return. */
3249 if (delay_list == 0 && likely && new_thread && GET_CODE (new_thread) == INSN)
3251 rtx pat = PATTERN (new_thread);
3256 pat = PATTERN (trial);
3258 if (GET_CODE (trial) != INSN || GET_CODE (pat) != SET
3259 || ! eligible_for_delay (insn, 0, trial, flags))
3262 dest = SET_DEST (pat), src = SET_SRC (pat);
3263 if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS)
3264 && rtx_equal_p (XEXP (src, 0), dest)
3265 && ! reg_overlap_mentioned_p (dest, XEXP (src, 1)))
3267 rtx other = XEXP (src, 1);
3271 /* If this is a constant adjustment, use the same code with
3272 the negated constant. Otherwise, reverse the sense of the
3274 if (GET_CODE (other) == CONST_INT)
3275 new_arith = gen_rtx (GET_CODE (src), GET_MODE (src), dest,
3276 negate_rtx (GET_MODE (src), other));
3278 new_arith = gen_rtx (GET_CODE (src) == PLUS ? MINUS : PLUS,
3279 GET_MODE (src), dest, other);
3281 ninsn = emit_insn_after (gen_rtx (SET, VOIDmode, dest, new_arith),
3284 if (recog_memoized (ninsn) < 0
3285 || (insn_extract (ninsn),
3286 ! constrain_operands (INSN_CODE (ninsn), 1)))
3288 delete_insn (ninsn);
3294 update_block (trial, thread);
3295 delete_insn (trial);
3298 new_thread = next_active_insn (trial);
3300 ninsn = own_thread ? trial : copy_rtx (trial);
3302 INSN_FROM_TARGET_P (ninsn) = 1;
3304 delay_list = add_to_delay_list (ninsn, NULL_RTX);
3309 if (delay_list && must_annul)
3310 INSN_ANNULLED_BRANCH_P (insn) = 1;
3312 /* If we are to branch into the middle of this thread, find an appropriate
3313 label or make a new one if none, and redirect INSN to it. If we hit the
3314 end of the function, use the end-of-function label. */
3315 if (new_thread != thread)
3319 if (! thread_if_true)
3322 if (new_thread && GET_CODE (new_thread) == JUMP_INSN
3323 && (simplejump_p (new_thread)
3324 || GET_CODE (PATTERN (new_thread)) == RETURN))
3325 new_thread = follow_jumps (JUMP_LABEL (new_thread));
3327 if (new_thread == 0)
3328 label = find_end_label ();
3329 else if (GET_CODE (new_thread) == CODE_LABEL)
3332 label = get_label_before (new_thread);
3334 redirect_jump (insn, label);
3340 /* Make another attempt to find insns to place in delay slots.
3342 We previously looked for insns located in front of the delay insn
3343 and, for non-jump delay insns, located behind the delay insn.
3345 Here only try to schedule jump insns and try to move insns from either
3346 the target or the following insns into the delay slot. If annulling is
3347 supported, we will be likely to do this. Otherwise, we can do this only
3351 fill_eager_delay_slots (first)
3356 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
3358 for (i = 0; i < num_unfilled_slots; i++)
3361 rtx target_label, insn_at_target, fallthrough_insn;
3364 int own_fallthrough;
3365 int prediction, slots_to_fill, slots_filled;
3367 insn = unfilled_slots_base[i];
3369 || INSN_DELETED_P (insn)
3370 || GET_CODE (insn) != JUMP_INSN
3371 || ! condjump_p (insn))
3374 slots_to_fill = num_delay_slots (insn);
3375 if (slots_to_fill == 0)
3379 target_label = JUMP_LABEL (insn);
3380 condition = get_branch_condition (insn, target_label);
3385 /* Get the next active fallthough and target insns and see if we own
3386 them. Then see whether the branch is likely true. We don't need
3387 to do a lot of this for unconditional branches. */
3389 insn_at_target = next_active_insn (target_label);
3390 own_target = own_thread_p (target_label, target_label, 0);
3392 if (condition == const_true_rtx)
3394 own_fallthrough = 0;
3395 fallthrough_insn = 0;
3400 fallthrough_insn = next_active_insn (insn);
3401 own_fallthrough = own_thread_p (NEXT_INSN (insn), NULL_RTX, 1);
3402 prediction = mostly_true_jump (insn, condition);
3405 /* If this insn is expected to branch, first try to get insns from our
3406 target, then our fallthrough insns. If it is not, expected to branch,
3407 try the other order. */
3412 = fill_slots_from_thread (insn, condition, insn_at_target,
3413 fallthrough_insn, prediction == 2, 1,
3414 own_target, own_fallthrough,
3415 slots_to_fill, &slots_filled);
3417 if (delay_list == 0 && own_fallthrough)
3419 /* Even though we didn't find anything for delay slots,
3420 we might have found a redundant insn which we deleted
3421 from the thread that was filled. So we have to recompute
3422 the next insn at the target. */
3423 target_label = JUMP_LABEL (insn);
3424 insn_at_target = next_active_insn (target_label);
3427 = fill_slots_from_thread (insn, condition, fallthrough_insn,
3428 insn_at_target, 0, 0,
3429 own_fallthrough, own_target,
3430 slots_to_fill, &slots_filled);
3435 if (own_fallthrough)
3437 = fill_slots_from_thread (insn, condition, fallthrough_insn,
3438 insn_at_target, 0, 0,
3439 own_fallthrough, own_target,
3440 slots_to_fill, &slots_filled);
3442 if (delay_list == 0)
3444 = fill_slots_from_thread (insn, condition, insn_at_target,
3445 next_active_insn (insn), 0, 1,
3446 own_target, own_fallthrough,
3447 slots_to_fill, &slots_filled);
3451 unfilled_slots_base[i]
3452 = emit_delay_sequence (insn, delay_list,
3453 slots_filled, slots_to_fill);
3455 if (slots_to_fill == slots_filled)
3456 unfilled_slots_base[i] = 0;
3458 note_delay_statistics (slots_filled, 1);
3462 /* Once we have tried two ways to fill a delay slot, make a pass over the
3463 code to try to improve the results and to do such things as more jump
3467 relax_delay_slots (first)
3470 register rtx insn, next, pat;
3471 register rtx trial, delay_insn, target_label;
3473 /* Look at every JUMP_INSN and see if we can improve it. */
3474 for (insn = first; insn; insn = next)
3478 next = next_active_insn (insn);
3480 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3481 the next insn, or jumps to a label that is not the last of a
3482 group of consecutive labels. */
3483 if (GET_CODE (insn) == JUMP_INSN
3484 && condjump_p (insn)
3485 && (target_label = JUMP_LABEL (insn)) != 0)
3487 target_label = follow_jumps (target_label);
3488 target_label = prev_label (next_active_insn (target_label));
3490 if (target_label == 0)
3491 target_label = find_end_label ();
3493 if (next_active_insn (target_label) == next)
3499 if (target_label != JUMP_LABEL (insn))
3500 redirect_jump (insn, target_label);
3502 /* See if this jump branches around a unconditional jump.
3503 If so, invert this jump and point it to the target of the
3505 if (next && GET_CODE (next) == JUMP_INSN
3506 && (simplejump_p (next) || GET_CODE (PATTERN (next)) == RETURN)
3507 && next_active_insn (target_label) == next_active_insn (next)
3508 && no_labels_between_p (insn, next))
3510 rtx label = JUMP_LABEL (next);
3512 /* Be careful how we do this to avoid deleting code or
3513 labels that are momentarily dead. See similar optimization
3516 We also need to ensure we properly handle the case when
3517 invert_jump fails. */
3519 ++LABEL_NUSES (target_label);
3521 ++LABEL_NUSES (label);
3523 if (invert_jump (insn, label))
3530 --LABEL_NUSES (label);
3532 if (--LABEL_NUSES (target_label) == 0)
3533 delete_insn (target_label);
3539 /* If this is an unconditional jump and the previous insn is a
3540 conditional jump, try reversing the condition of the previous
3541 insn and swapping our targets. The next pass might be able to
3544 Don't do this if we expect the conditional branch to be true, because
3545 we would then be making the more common case longer. */
3547 if (GET_CODE (insn) == JUMP_INSN
3548 && (simplejump_p (insn) || GET_CODE (PATTERN (insn)) == RETURN)
3549 && (other = prev_active_insn (insn)) != 0
3550 && condjump_p (other)
3551 && no_labels_between_p (other, insn)
3552 && 0 < mostly_true_jump (other,
3553 get_branch_condition (other,
3554 JUMP_LABEL (other))))
3556 rtx other_target = JUMP_LABEL (other);
3558 /* Increment the count of OTHER_TARGET, so it doesn't get deleted
3559 as we move the label. */
3561 ++LABEL_NUSES (other_target);
3563 if (invert_jump (other, target_label))
3564 redirect_jump (insn, other_target);
3567 --LABEL_NUSES (other_target);
3570 /* Now look only at cases where we have filled a delay slot. */
3571 if (GET_CODE (insn) != INSN
3572 || GET_CODE (PATTERN (insn)) != SEQUENCE)
3575 pat = PATTERN (insn);
3576 delay_insn = XVECEXP (pat, 0, 0);
3578 /* See if the first insn in the delay slot is redundant with some
3579 previous insn. Remove it from the delay slot if so; then set up
3580 to reprocess this insn. */
3581 if (redundant_insn_p (XVECEXP (pat, 0, 1), delay_insn, 0))
3583 delete_from_delay_slot (XVECEXP (pat, 0, 1));
3584 next = prev_active_insn (next);
3588 /* Now look only at the cases where we have a filled JUMP_INSN. */
3589 if (GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) != JUMP_INSN
3590 || ! condjump_p (XVECEXP (PATTERN (insn), 0, 0)))
3593 target_label = JUMP_LABEL (delay_insn);
3597 /* If this jump goes to another unconditional jump, thread it, but
3598 don't convert a jump into a RETURN here. */
3599 trial = follow_jumps (target_label);
3600 trial = prev_label (next_active_insn (trial));
3601 if (trial == 0 && target_label != 0)
3602 trial = find_end_label ();
3604 if (trial != target_label)
3606 redirect_jump (delay_insn, trial);
3607 target_label = trial;
3610 /* If the first insn at TARGET_LABEL is redundant with a previous
3611 insn, redirect the jump to the following insn process again. */
3612 trial = next_active_insn (target_label);
3613 if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE
3614 && redundant_insn_p (trial, insn, 0))
3616 trial = next_active_insn (trial);
3618 target_label = find_end_label ();
3620 target_label = get_label_before (trial);
3621 redirect_jump (delay_insn, target_label);
3626 /* Similarly, if it is an unconditional jump with one insn in its
3627 delay list and that insn is redundant, thread the jump. */
3628 if (trial && GET_CODE (PATTERN (trial)) == SEQUENCE
3629 && XVECLEN (PATTERN (trial), 0) == 2
3630 && GET_CODE (XVECEXP (PATTERN (trial), 0, 0)) == JUMP_INSN
3631 && (simplejump_p (XVECEXP (PATTERN (trial), 0, 0))
3632 || GET_CODE (PATTERN (XVECEXP (PATTERN (trial), 0, 0))) == RETURN)
3633 && redundant_insn_p (XVECEXP (PATTERN (trial), 0, 1), insn, 0))
3635 target_label = JUMP_LABEL (XVECEXP (PATTERN (trial), 0, 0));
3636 if (target_label == 0)
3637 target_label = find_end_label ();
3638 redirect_jump (delay_insn, target_label);
3644 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3645 && prev_active_insn (target_label) == insn
3647 /* If the last insn in the delay slot sets CC0 for some insn,
3648 various code assumes that it is in a delay slot. We could
3649 put it back where it belonged and delete the register notes,
3650 but it doesn't seem worthwhile in this uncommon case. */
3651 && ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1),
3652 REG_CC_USER, NULL_RTX)
3658 /* All this insn does is execute its delay list and jump to the
3659 following insn. So delete the jump and just execute the delay
3662 We do this by deleting the INSN containing the SEQUENCE, then
3663 re-emitting the insns separately, and then deleting the jump.
3664 This allows the count of the jump target to be properly
3667 /* Clear the from target bit, since these insns are no longer
3669 for (i = 0; i < XVECLEN (pat, 0); i++)
3670 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3672 trial = PREV_INSN (insn);
3674 emit_insn_after (pat, trial);
3675 delete_scheduled_jump (delay_insn);
3679 /* See if this is an unconditional jump around a single insn which is
3680 identical to the one in its delay slot. In this case, we can just
3681 delete the branch and the insn in its delay slot. */
3682 if (next && GET_CODE (next) == INSN
3683 && prev_label (next_active_insn (next)) == target_label
3684 && simplejump_p (insn)
3685 && XVECLEN (pat, 0) == 2
3686 && rtx_equal_p (PATTERN (next), PATTERN (XVECEXP (pat, 0, 1))))
3692 /* See if this jump (with its delay slots) branches around another
3693 jump (without delay slots). If so, invert this jump and point
3694 it to the target of the second jump. We cannot do this for
3695 annulled jumps, though. Again, don't convert a jump to a RETURN
3697 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3698 && next && GET_CODE (next) == JUMP_INSN
3699 && (simplejump_p (next) || GET_CODE (PATTERN (next)) == RETURN)
3700 && next_active_insn (target_label) == next_active_insn (next)
3701 && no_labels_between_p (insn, next))
3703 rtx label = JUMP_LABEL (next);
3704 rtx old_label = JUMP_LABEL (delay_insn);
3707 label = find_end_label ();
3709 /* Be careful how we do this to avoid deleting code or labels
3710 that are momentarily dead. See similar optimization in jump.c */
3712 ++LABEL_NUSES (old_label);
3714 if (invert_jump (delay_insn, label))
3720 if (old_label && --LABEL_NUSES (old_label) == 0)
3721 delete_insn (old_label);
3725 /* If we own the thread opposite the way this insn branches, see if we
3726 can merge its delay slots with following insns. */
3727 if (INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3728 && own_thread_p (NEXT_INSN (insn), 0, 1))
3729 try_merge_delay_insns (insn, next);
3730 else if (! INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3731 && own_thread_p (target_label, target_label, 0))
3732 try_merge_delay_insns (insn, next_active_insn (target_label));
3734 /* If we get here, we haven't deleted INSN. But we may have deleted
3735 NEXT, so recompute it. */
3736 next = next_active_insn (insn);
3742 /* Look for filled jumps to the end of function label. We can try to convert
3743 them into RETURN insns if the insns in the delay slot are valid for the
3747 make_return_insns (first)
3750 rtx insn, jump_insn, pat;
3751 rtx real_return_label = end_of_function_label;
3754 /* See if there is a RETURN insn in the function other than the one we
3755 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3756 into a RETURN to jump to it. */
3757 for (insn = first; insn; insn = NEXT_INSN (insn))
3758 if (GET_CODE (insn) == JUMP_INSN && GET_CODE (PATTERN (insn)) == RETURN)
3760 real_return_label = get_label_before (insn);
3764 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3765 was equal to END_OF_FUNCTION_LABEL. */
3766 LABEL_NUSES (real_return_label)++;
3768 /* Clear the list of insns to fill so we can use it. */
3769 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3771 for (insn = first; insn; insn = NEXT_INSN (insn))
3775 /* Only look at filled JUMP_INSNs that go to the end of function
3777 if (GET_CODE (insn) != INSN
3778 || GET_CODE (PATTERN (insn)) != SEQUENCE
3779 || GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) != JUMP_INSN
3780 || JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0)) != end_of_function_label)
3783 pat = PATTERN (insn);
3784 jump_insn = XVECEXP (pat, 0, 0);
3786 /* If we can't make the jump into a RETURN, redirect it to the best
3787 RETURN and go on to the next insn. */
3788 if (! redirect_jump (jump_insn, NULL_RTX))
3790 redirect_jump (jump_insn, real_return_label);
3794 /* See if this RETURN can accept the insns current in its delay slot.
3795 It can if it has more or an equal number of slots and the contents
3796 of each is valid. */
3798 flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn));
3799 slots = num_delay_slots (jump_insn);
3800 if (slots >= XVECLEN (pat, 0) - 1)
3802 for (i = 1; i < XVECLEN (pat, 0); i++)
3804 #ifdef ANNUL_IFFALSE_SLOTS
3805 (INSN_ANNULLED_BRANCH_P (jump_insn)
3806 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3807 ? eligible_for_annul_false (jump_insn, i - 1,
3808 XVECEXP (pat, 0, i), flags) :
3810 #ifdef ANNUL_IFTRUE_SLOTS
3811 (INSN_ANNULLED_BRANCH_P (jump_insn)
3812 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3813 ? eligible_for_annul_true (jump_insn, i - 1,
3814 XVECEXP (pat, 0, i), flags) :
3816 eligible_for_delay (jump_insn, i -1, XVECEXP (pat, 0, i), flags)))
3822 if (i == XVECLEN (pat, 0))
3825 /* We have to do something with this insn. If it is an unconditional
3826 RETURN, delete the SEQUENCE and output the individual insns,
3827 followed by the RETURN. Then set things up so we try to find
3828 insns for its delay slots, if it needs some. */
3829 if (GET_CODE (PATTERN (jump_insn)) == RETURN)
3831 rtx prev = PREV_INSN (insn);
3834 for (i = 1; i < XVECLEN (pat, 0); i++)
3835 prev = emit_insn_after (PATTERN (XVECEXP (pat, 0, i)), prev);
3837 insn = emit_jump_insn_after (PATTERN (jump_insn), prev);
3838 emit_barrier_after (insn);
3841 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3844 /* It is probably more efficient to keep this with its current
3845 delay slot as a branch to a RETURN. */
3846 redirect_jump (jump_insn, real_return_label);
3849 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3850 new delay slots we have created. */
3851 if (--LABEL_NUSES (real_return_label) == 0)
3852 delete_insn (real_return_label);
3854 fill_simple_delay_slots (first, 1);
3855 fill_simple_delay_slots (first, 0);
3859 /* Try to find insns to place in delay slots. */
3862 dbr_schedule (first, file)
3866 rtx insn, next, epilogue_insn = 0;
3869 int old_flag_no_peephole = flag_no_peephole;
3871 /* Execute `final' once in prescan mode to delete any insns that won't be
3872 used. Don't let final try to do any peephole optimization--it will
3873 ruin dataflow information for this pass. */
3875 flag_no_peephole = 1;
3876 final (first, 0, NO_DEBUG, 1, 1);
3877 flag_no_peephole = old_flag_no_peephole;
3880 /* Find the highest INSN_UID and allocate and initialize our map from
3881 INSN_UID's to position in code. */
3882 for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn))
3884 if (INSN_UID (insn) > max_uid)
3885 max_uid = INSN_UID (insn);
3886 if (GET_CODE (insn) == NOTE
3887 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_EPILOGUE_BEG)
3888 epilogue_insn = insn;
3891 uid_to_ruid = (int *) alloca ((max_uid + 1) * sizeof (int *));
3892 for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn))
3893 uid_to_ruid[INSN_UID (insn)] = i;
3895 /* Initialize the list of insns that need filling. */
3896 if (unfilled_firstobj == 0)
3898 gcc_obstack_init (&unfilled_slots_obstack);
3899 unfilled_firstobj = (rtx *) obstack_alloc (&unfilled_slots_obstack, 0);
3902 for (insn = next_active_insn (first); insn; insn = next_active_insn (insn))
3906 INSN_ANNULLED_BRANCH_P (insn) = 0;
3907 INSN_FROM_TARGET_P (insn) = 0;
3909 /* Skip vector tables. We can't get attributes for them. */
3910 if (GET_CODE (insn) == JUMP_INSN
3911 && (GET_CODE (PATTERN (insn)) == ADDR_VEC
3912 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC))
3915 if (num_delay_slots (insn) > 0)
3916 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3918 /* Ensure all jumps go to the last of a set of consecutive labels. */
3919 if (GET_CODE (insn) == JUMP_INSN && condjump_p (insn)
3920 && JUMP_LABEL (insn) != 0
3921 && ((target = prev_label (next_active_insn (JUMP_LABEL (insn))))
3922 != JUMP_LABEL (insn)))
3923 redirect_jump (insn, target);
3926 /* Indicate what resources are required to be valid at the end of the current
3927 function. The condition code never is and memory always is. If the
3928 frame pointer is needed, it is and so is the stack pointer unless
3929 EXIT_IGNORE_STACK is non-zero. If the frame pointer is not needed, the
3930 stack pointer is. Registers used to return the function value are
3931 needed. Registers holding global variables are needed. */
3933 end_of_function_needs.cc = 0;
3934 end_of_function_needs.memory = 1;
3935 CLEAR_HARD_REG_SET (end_of_function_needs.regs);
3937 if (frame_pointer_needed)
3939 SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM);
3940 #ifdef EXIT_IGNORE_STACK
3941 if (! EXIT_IGNORE_STACK)
3943 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
3946 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
3948 if (current_function_return_rtx != 0
3949 && GET_CODE (current_function_return_rtx) == REG)
3950 mark_referenced_resources (current_function_return_rtx,
3951 &end_of_function_needs, 1);
3953 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
3955 SET_HARD_REG_BIT (end_of_function_needs.regs, i);
3957 /* The registers required to be live at the end of the function are
3958 represented in the flow information as being dead just prior to
3959 reaching the end of the function. For example, the return of a value
3960 might be represented by a USE of the return register immediately
3961 followed by an unconditional jump to the return label where the
3962 return label is the end of the RTL chain. The end of the RTL chain
3963 is then taken to mean that the return register is live.
3965 This sequence is no longer maintained when epilogue instructions are
3966 added to the RTL chain. To reconstruct the original meaning, the
3967 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
3968 point where these registers become live (start_of_epilogue_needs).
3969 If epilogue instructions are present, the registers set by those
3970 instructions won't have been processed by flow. Thus, those
3971 registers are additionally required at the end of the RTL chain
3972 (end_of_function_needs). */
3974 start_of_epilogue_needs = end_of_function_needs;
3976 while (epilogue_insn = next_nonnote_insn (epilogue_insn))
3977 mark_set_resources (epilogue_insn, &end_of_function_needs, 0, 1);
3979 /* Show we haven't computed an end-of-function label yet. */
3980 end_of_function_label = 0;
3982 /* Allocate and initialize the tables used by mark_target_live_regs. */
3984 = (struct target_info **) alloca ((TARGET_HASH_PRIME
3985 * sizeof (struct target_info *)));
3986 bzero (target_hash_table, TARGET_HASH_PRIME * sizeof (struct target_info *));
3988 bb_ticks = (int *) alloca (n_basic_blocks * sizeof (int));
3989 bzero (bb_ticks, n_basic_blocks * sizeof (int));
3991 /* Initialize the statistics for this function. */
3992 bzero (num_insns_needing_delays, sizeof num_insns_needing_delays);
3993 bzero (num_filled_delays, sizeof num_filled_delays);
3995 /* Now do the delay slot filling. Try everything twice in case earlier
3996 changes make more slots fillable. */
3998 for (reorg_pass_number = 0;
3999 reorg_pass_number < MAX_REORG_PASSES;
4000 reorg_pass_number++)
4002 fill_simple_delay_slots (first, 1);
4003 fill_simple_delay_slots (first, 0);
4004 fill_eager_delay_slots (first);
4005 relax_delay_slots (first);
4008 /* Delete any USE insns made by update_block; subsequent passes don't need
4009 them or know how to deal with them. */
4010 for (insn = first; insn; insn = next)
4012 next = NEXT_INSN (insn);
4014 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == USE
4015 && GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn), 0))) == 'i')
4016 next = delete_insn (insn);
4019 /* If we made an end of function label, indicate that it is now
4020 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
4021 If it is now unused, delete it. */
4022 if (end_of_function_label && --LABEL_NUSES (end_of_function_label) == 0)
4023 delete_insn (end_of_function_label);
4026 if (HAVE_return && end_of_function_label != 0)
4027 make_return_insns (first);
4030 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
4032 /* It is not clear why the line below is needed, but it does seem to be. */
4033 unfilled_firstobj = (rtx *) obstack_alloc (&unfilled_slots_obstack, 0);
4035 /* Reposition the prologue and epilogue notes in case we moved the
4036 prologue/epilogue insns. */
4037 reposition_prologue_and_epilogue_notes (first);
4041 register int i, j, need_comma;
4043 for (reorg_pass_number = 0;
4044 reorg_pass_number < MAX_REORG_PASSES;
4045 reorg_pass_number++)
4047 fprintf (file, ";; Reorg pass #%d:\n", reorg_pass_number + 1);
4048 for (i = 0; i < NUM_REORG_FUNCTIONS; i++)
4051 fprintf (file, ";; Reorg function #%d\n", i);
4053 fprintf (file, ";; %d insns needing delay slots\n;; ",
4054 num_insns_needing_delays[i][reorg_pass_number]);
4056 for (j = 0; j < MAX_DELAY_HISTOGRAM; j++)
4057 if (num_filled_delays[i][j][reorg_pass_number])
4060 fprintf (file, ", ");
4062 fprintf (file, "%d got %d delays",
4063 num_filled_delays[i][j][reorg_pass_number], j);
4065 fprintf (file, "\n");
4070 #endif /* DELAY_SLOTS */