1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
30 init_reload actually has to be called earlier anyway.
32 To scan an insn, call `find_reloads'. This does two things:
33 1. sets up tables describing which values must be reloaded
34 for this insn, and what kind of hard regs they must be reloaded into;
35 2. optionally record the locations where those values appear in
36 the data, so they can be replaced properly later.
37 This is done only if the second arg to `find_reloads' is nonzero.
39 The third arg to `find_reloads' specifies the number of levels
40 of indirect addressing supported by the machine. If it is zero,
41 indirect addressing is not valid. If it is one, (MEM (REG n))
42 is valid even if (REG n) did not get a hard register; if it is two,
43 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44 hard register, and similarly for higher values.
46 Then you must choose the hard regs to reload those pseudo regs into,
47 and generate appropriate load insns before this insn and perhaps
48 also store insns after this insn. Set up the array `reload_reg_rtx'
49 to contain the REG rtx's for the registers you used. In some
50 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51 for certain reloads. Then that tells you which register to use,
52 so you do not need to allocate one. But you still do need to add extra
53 instructions to copy the value into and out of that register.
55 Finally you must call `subst_reloads' to substitute the reload reg rtx's
56 into the locations already recorded.
60 find_reloads can alter the operands of the instruction it is called on.
62 1. Two operands of any sort may be interchanged, if they are in a
63 commutative instruction.
64 This happens only if find_reloads thinks the instruction will compile
67 2. Pseudo-registers that are equivalent to constants are replaced
68 with those constants if they are not in hard registers.
70 1 happens every time find_reloads is called.
71 2 happens only when REPLACE is 1, which is only when
72 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
92 #include "coretypes.h"
96 #include "insn-config.h"
102 #include "hard-reg-set.h"
106 #include "function.h"
111 #ifndef REGNO_MODE_OK_FOR_BASE_P
112 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
115 #ifndef REG_MODE_OK_FOR_BASE_P
116 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
119 /* True if X is a constant that can be forced into the constant pool. */
120 #define CONST_POOL_OK_P(X) \
122 && GET_CODE (X) != HIGH \
123 && !targetm.cannot_force_const_mem (X))
125 /* All reloads of the current insn are recorded here. See reload.h for
128 struct reload rld[MAX_RELOADS];
130 /* All the "earlyclobber" operands of the current insn
131 are recorded here. */
133 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
135 int reload_n_operands;
137 /* Replacing reloads.
139 If `replace_reloads' is nonzero, then as each reload is recorded
140 an entry is made for it in the table `replacements'.
141 Then later `subst_reloads' can look through that table and
142 perform all the replacements needed. */
144 /* Nonzero means record the places to replace. */
145 static int replace_reloads;
147 /* Each replacement is recorded with a structure like this. */
150 rtx *where; /* Location to store in */
151 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
152 a SUBREG; 0 otherwise. */
153 int what; /* which reload this is for */
154 enum machine_mode mode; /* mode it must have */
157 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
159 /* Number of replacements currently recorded. */
160 static int n_replacements;
162 /* Used to track what is modified by an operand. */
165 int reg_flag; /* Nonzero if referencing a register. */
166 int safe; /* Nonzero if this can't conflict with anything. */
167 rtx base; /* Base address for MEM. */
168 HOST_WIDE_INT start; /* Starting offset or register number. */
169 HOST_WIDE_INT end; /* Ending offset or register number. */
172 #ifdef SECONDARY_MEMORY_NEEDED
174 /* Save MEMs needed to copy from one class of registers to another. One MEM
175 is used per mode, but normally only one or two modes are ever used.
177 We keep two versions, before and after register elimination. The one
178 after register elimination is record separately for each operand. This
179 is done in case the address is not valid to be sure that we separately
182 static rtx secondary_memlocs[NUM_MACHINE_MODES];
183 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
184 static int secondary_memlocs_elim_used = 0;
187 /* The instruction we are doing reloads for;
188 so we can test whether a register dies in it. */
189 static rtx this_insn;
191 /* Nonzero if this instruction is a user-specified asm with operands. */
192 static int this_insn_is_asm;
194 /* If hard_regs_live_known is nonzero,
195 we can tell which hard regs are currently live,
196 at least enough to succeed in choosing dummy reloads. */
197 static int hard_regs_live_known;
199 /* Indexed by hard reg number,
200 element is nonnegative if hard reg has been spilled.
201 This vector is passed to `find_reloads' as an argument
202 and is not changed here. */
203 static short *static_reload_reg_p;
205 /* Set to 1 in subst_reg_equivs if it changes anything. */
206 static int subst_reg_equivs_changed;
208 /* On return from push_reload, holds the reload-number for the OUT
209 operand, which can be different for that from the input operand. */
210 static int output_reloadnum;
212 /* Compare two RTX's. */
213 #define MATCHES(x, y) \
214 (x == y || (x != 0 && (REG_P (x) \
215 ? REG_P (y) && REGNO (x) == REGNO (y) \
216 : rtx_equal_p (x, y) && ! side_effects_p (x))))
218 /* Indicates if two reloads purposes are for similar enough things that we
219 can merge their reloads. */
220 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
221 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
222 || ((when1) == (when2) && (op1) == (op2)) \
223 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
224 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
225 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
226 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
227 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
229 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
230 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
231 ((when1) != (when2) \
232 || ! ((op1) == (op2) \
233 || (when1) == RELOAD_FOR_INPUT \
234 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
235 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
237 /* If we are going to reload an address, compute the reload type to
239 #define ADDR_TYPE(type) \
240 ((type) == RELOAD_FOR_INPUT_ADDRESS \
241 ? RELOAD_FOR_INPADDR_ADDRESS \
242 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
243 ? RELOAD_FOR_OUTADDR_ADDRESS \
246 #ifdef HAVE_SECONDARY_RELOADS
247 static int push_secondary_reload (int, rtx, int, int, enum reg_class,
248 enum machine_mode, enum reload_type,
251 static enum reg_class find_valid_class (enum machine_mode, int, unsigned int);
252 static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
253 static void push_replacement (rtx *, int, enum machine_mode);
254 static void dup_replacements (rtx *, rtx *);
255 static void combine_reloads (void);
256 static int find_reusable_reload (rtx *, rtx, enum reg_class,
257 enum reload_type, int, int);
258 static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
259 enum machine_mode, enum reg_class, int, int);
260 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
261 static struct decomposition decompose (rtx);
262 static int immune_p (rtx, rtx, struct decomposition);
263 static int alternative_allows_memconst (const char *, int);
264 static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
266 static rtx make_memloc (rtx, int);
267 static int maybe_memory_address_p (enum machine_mode, rtx, rtx *);
268 static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
269 int, enum reload_type, int, rtx);
270 static rtx subst_reg_equivs (rtx, rtx);
271 static rtx subst_indexed_address (rtx);
272 static void update_auto_inc_notes (rtx, int, int);
273 static int find_reloads_address_1 (enum machine_mode, rtx, int, rtx *,
274 int, enum reload_type,int, rtx);
275 static void find_reloads_address_part (rtx, rtx *, enum reg_class,
276 enum machine_mode, int,
277 enum reload_type, int);
278 static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
280 static void copy_replacements_1 (rtx *, rtx *, int);
281 static int find_inc_amount (rtx, rtx);
283 #ifdef HAVE_SECONDARY_RELOADS
285 /* Determine if any secondary reloads are needed for loading (if IN_P is
286 nonzero) or storing (if IN_P is zero) X to or from a reload register of
287 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
288 are needed, push them.
290 Return the reload number of the secondary reload we made, or -1 if
291 we didn't need one. *PICODE is set to the insn_code to use if we do
292 need a secondary reload. */
295 push_secondary_reload (int in_p, rtx x, int opnum, int optional,
296 enum reg_class reload_class,
297 enum machine_mode reload_mode, enum reload_type type,
298 enum insn_code *picode)
300 enum reg_class class = NO_REGS;
301 enum machine_mode mode = reload_mode;
302 enum insn_code icode = CODE_FOR_nothing;
303 enum reg_class t_class = NO_REGS;
304 enum machine_mode t_mode = VOIDmode;
305 enum insn_code t_icode = CODE_FOR_nothing;
306 enum reload_type secondary_type;
307 int s_reload, t_reload = -1;
309 if (type == RELOAD_FOR_INPUT_ADDRESS
310 || type == RELOAD_FOR_OUTPUT_ADDRESS
311 || type == RELOAD_FOR_INPADDR_ADDRESS
312 || type == RELOAD_FOR_OUTADDR_ADDRESS)
313 secondary_type = type;
315 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
317 *picode = CODE_FOR_nothing;
319 /* If X is a paradoxical SUBREG, use the inner value to determine both the
320 mode and object being reloaded. */
321 if (GET_CODE (x) == SUBREG
322 && (GET_MODE_SIZE (GET_MODE (x))
323 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
326 reload_mode = GET_MODE (x);
329 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
330 is still a pseudo-register by now, it *must* have an equivalent MEM
331 but we don't want to assume that), use that equivalent when seeing if
332 a secondary reload is needed since whether or not a reload is needed
333 might be sensitive to the form of the MEM. */
335 if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
336 && reg_equiv_mem[REGNO (x)] != 0)
337 x = reg_equiv_mem[REGNO (x)];
339 #ifdef SECONDARY_INPUT_RELOAD_CLASS
341 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
344 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
346 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
349 /* If we don't need any secondary registers, done. */
350 if (class == NO_REGS)
353 /* Get a possible insn to use. If the predicate doesn't accept X, don't
356 icode = (in_p ? reload_in_optab[(int) reload_mode]
357 : reload_out_optab[(int) reload_mode]);
359 if (icode != CODE_FOR_nothing
360 && insn_data[(int) icode].operand[in_p].predicate
361 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
362 icode = CODE_FOR_nothing;
364 /* If we will be using an insn, see if it can directly handle the reload
365 register we will be using. If it can, the secondary reload is for a
366 scratch register. If it can't, we will use the secondary reload for
367 an intermediate register and require a tertiary reload for the scratch
370 if (icode != CODE_FOR_nothing)
372 /* If IN_P is nonzero, the reload register will be the output in
373 operand 0. If IN_P is zero, the reload register will be the input
374 in operand 1. Outputs should have an initial "=", which we must
377 enum reg_class insn_class;
379 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
380 insn_class = ALL_REGS;
383 const char *insn_constraint
384 = &insn_data[(int) icode].operand[!in_p].constraint[in_p];
385 char insn_letter = *insn_constraint;
387 = (insn_letter == 'r' ? GENERAL_REGS
388 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) insn_letter,
391 if (insn_class == NO_REGS)
394 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
398 /* The scratch register's constraint must start with "=&". */
399 if (insn_data[(int) icode].operand[2].constraint[0] != '='
400 || insn_data[(int) icode].operand[2].constraint[1] != '&')
403 if (reg_class_subset_p (reload_class, insn_class))
404 mode = insn_data[(int) icode].operand[2].mode;
407 const char *t_constraint
408 = &insn_data[(int) icode].operand[2].constraint[2];
409 char t_letter = *t_constraint;
411 t_mode = insn_data[(int) icode].operand[2].mode;
412 t_class = (t_letter == 'r' ? GENERAL_REGS
413 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) t_letter,
416 icode = CODE_FOR_nothing;
420 /* This case isn't valid, so fail. Reload is allowed to use the same
421 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
422 in the case of a secondary register, we actually need two different
423 registers for correct code. We fail here to prevent the possibility of
424 silently generating incorrect code later.
426 The convention is that secondary input reloads are valid only if the
427 secondary_class is different from class. If you have such a case, you
428 can not use secondary reloads, you must work around the problem some
431 Allow this when a reload_in/out pattern is being used. I.e. assume
432 that the generated code handles this case. */
434 if (in_p && class == reload_class && icode == CODE_FOR_nothing
435 && t_icode == CODE_FOR_nothing)
438 /* If we need a tertiary reload, see if we have one we can reuse or else
441 if (t_class != NO_REGS)
443 for (t_reload = 0; t_reload < n_reloads; t_reload++)
444 if (rld[t_reload].secondary_p
445 && (reg_class_subset_p (t_class, rld[t_reload].class)
446 || reg_class_subset_p (rld[t_reload].class, t_class))
447 && ((in_p && rld[t_reload].inmode == t_mode)
448 || (! in_p && rld[t_reload].outmode == t_mode))
449 && ((in_p && (rld[t_reload].secondary_in_icode
450 == CODE_FOR_nothing))
451 || (! in_p &&(rld[t_reload].secondary_out_icode
452 == CODE_FOR_nothing)))
453 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
454 && MERGABLE_RELOADS (secondary_type,
455 rld[t_reload].when_needed,
456 opnum, rld[t_reload].opnum))
459 rld[t_reload].inmode = t_mode;
461 rld[t_reload].outmode = t_mode;
463 if (reg_class_subset_p (t_class, rld[t_reload].class))
464 rld[t_reload].class = t_class;
466 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
467 rld[t_reload].optional &= optional;
468 rld[t_reload].secondary_p = 1;
469 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
470 opnum, rld[t_reload].opnum))
471 rld[t_reload].when_needed = RELOAD_OTHER;
474 if (t_reload == n_reloads)
476 /* We need to make a new tertiary reload for this register class. */
477 rld[t_reload].in = rld[t_reload].out = 0;
478 rld[t_reload].class = t_class;
479 rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
480 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
481 rld[t_reload].reg_rtx = 0;
482 rld[t_reload].optional = optional;
483 rld[t_reload].inc = 0;
484 /* Maybe we could combine these, but it seems too tricky. */
485 rld[t_reload].nocombine = 1;
486 rld[t_reload].in_reg = 0;
487 rld[t_reload].out_reg = 0;
488 rld[t_reload].opnum = opnum;
489 rld[t_reload].when_needed = secondary_type;
490 rld[t_reload].secondary_in_reload = -1;
491 rld[t_reload].secondary_out_reload = -1;
492 rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
493 rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
494 rld[t_reload].secondary_p = 1;
500 /* See if we can reuse an existing secondary reload. */
501 for (s_reload = 0; s_reload < n_reloads; s_reload++)
502 if (rld[s_reload].secondary_p
503 && (reg_class_subset_p (class, rld[s_reload].class)
504 || reg_class_subset_p (rld[s_reload].class, class))
505 && ((in_p && rld[s_reload].inmode == mode)
506 || (! in_p && rld[s_reload].outmode == mode))
507 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
508 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
509 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
510 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
511 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
512 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
513 opnum, rld[s_reload].opnum))
516 rld[s_reload].inmode = mode;
518 rld[s_reload].outmode = mode;
520 if (reg_class_subset_p (class, rld[s_reload].class))
521 rld[s_reload].class = class;
523 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
524 rld[s_reload].optional &= optional;
525 rld[s_reload].secondary_p = 1;
526 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
527 opnum, rld[s_reload].opnum))
528 rld[s_reload].when_needed = RELOAD_OTHER;
531 if (s_reload == n_reloads)
533 #ifdef SECONDARY_MEMORY_NEEDED
534 /* If we need a memory location to copy between the two reload regs,
535 set it up now. Note that we do the input case before making
536 the reload and the output case after. This is due to the
537 way reloads are output. */
539 if (in_p && icode == CODE_FOR_nothing
540 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
542 get_secondary_mem (x, reload_mode, opnum, type);
544 /* We may have just added new reloads. Make sure we add
545 the new reload at the end. */
546 s_reload = n_reloads;
550 /* We need to make a new secondary reload for this register class. */
551 rld[s_reload].in = rld[s_reload].out = 0;
552 rld[s_reload].class = class;
554 rld[s_reload].inmode = in_p ? mode : VOIDmode;
555 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
556 rld[s_reload].reg_rtx = 0;
557 rld[s_reload].optional = optional;
558 rld[s_reload].inc = 0;
559 /* Maybe we could combine these, but it seems too tricky. */
560 rld[s_reload].nocombine = 1;
561 rld[s_reload].in_reg = 0;
562 rld[s_reload].out_reg = 0;
563 rld[s_reload].opnum = opnum;
564 rld[s_reload].when_needed = secondary_type;
565 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
566 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
567 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
568 rld[s_reload].secondary_out_icode
569 = ! in_p ? t_icode : CODE_FOR_nothing;
570 rld[s_reload].secondary_p = 1;
574 #ifdef SECONDARY_MEMORY_NEEDED
575 if (! in_p && icode == CODE_FOR_nothing
576 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
577 get_secondary_mem (x, mode, opnum, type);
584 #endif /* HAVE_SECONDARY_RELOADS */
586 #ifdef SECONDARY_MEMORY_NEEDED
588 /* Return a memory location that will be used to copy X in mode MODE.
589 If we haven't already made a location for this mode in this insn,
590 call find_reloads_address on the location being returned. */
593 get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
594 int opnum, enum reload_type type)
599 /* By default, if MODE is narrower than a word, widen it to a word.
600 This is required because most machines that require these memory
601 locations do not support short load and stores from all registers
602 (e.g., FP registers). */
604 #ifdef SECONDARY_MEMORY_NEEDED_MODE
605 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
607 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
608 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
611 /* If we already have made a MEM for this operand in MODE, return it. */
612 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
613 return secondary_memlocs_elim[(int) mode][opnum];
615 /* If this is the first time we've tried to get a MEM for this mode,
616 allocate a new one. `something_changed' in reload will get set
617 by noticing that the frame size has changed. */
619 if (secondary_memlocs[(int) mode] == 0)
621 #ifdef SECONDARY_MEMORY_NEEDED_RTX
622 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
624 secondary_memlocs[(int) mode]
625 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
629 /* Get a version of the address doing any eliminations needed. If that
630 didn't give us a new MEM, make a new one if it isn't valid. */
632 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
633 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
635 if (! mem_valid && loc == secondary_memlocs[(int) mode])
636 loc = copy_rtx (loc);
638 /* The only time the call below will do anything is if the stack
639 offset is too large. In that case IND_LEVELS doesn't matter, so we
640 can just pass a zero. Adjust the type to be the address of the
641 corresponding object. If the address was valid, save the eliminated
642 address. If it wasn't valid, we need to make a reload each time, so
647 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
648 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
651 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
655 secondary_memlocs_elim[(int) mode][opnum] = loc;
656 if (secondary_memlocs_elim_used <= (int)mode)
657 secondary_memlocs_elim_used = (int)mode + 1;
661 /* Clear any secondary memory locations we've made. */
664 clear_secondary_mem (void)
666 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
668 #endif /* SECONDARY_MEMORY_NEEDED */
670 /* Find the largest class for which every register number plus N is valid in
671 M1 (if in range) and is cheap to move into REGNO.
672 Abort if no such class exists. */
674 static enum reg_class
675 find_valid_class (enum machine_mode m1 ATTRIBUTE_UNUSED, int n,
676 unsigned int dest_regno ATTRIBUTE_UNUSED)
681 enum reg_class best_class = NO_REGS;
682 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
683 unsigned int best_size = 0;
686 for (class = 1; class < N_REG_CLASSES; class++)
689 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
690 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
691 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
692 && ! HARD_REGNO_MODE_OK (regno + n, m1))
697 cost = REGISTER_MOVE_COST (m1, class, dest_class);
699 if ((reg_class_size[class] > best_size
700 && (best_cost < 0 || best_cost >= cost))
704 best_size = reg_class_size[class];
705 best_cost = REGISTER_MOVE_COST (m1, class, dest_class);
715 /* Return the number of a previously made reload that can be combined with
716 a new one, or n_reloads if none of the existing reloads can be used.
717 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
718 push_reload, they determine the kind of the new reload that we try to
719 combine. P_IN points to the corresponding value of IN, which can be
720 modified by this function.
721 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
724 find_reusable_reload (rtx *p_in, rtx out, enum reg_class class,
725 enum reload_type type, int opnum, int dont_share)
729 /* We can't merge two reloads if the output of either one is
732 if (earlyclobber_operand_p (out))
735 /* We can use an existing reload if the class is right
736 and at least one of IN and OUT is a match
737 and the other is at worst neutral.
738 (A zero compared against anything is neutral.)
740 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
741 for the same thing since that can cause us to need more reload registers
742 than we otherwise would. */
744 for (i = 0; i < n_reloads; i++)
745 if ((reg_class_subset_p (class, rld[i].class)
746 || reg_class_subset_p (rld[i].class, class))
747 /* If the existing reload has a register, it must fit our class. */
748 && (rld[i].reg_rtx == 0
749 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
750 true_regnum (rld[i].reg_rtx)))
751 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
752 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
753 || (out != 0 && MATCHES (rld[i].out, out)
754 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
755 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
756 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
757 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
760 /* Reloading a plain reg for input can match a reload to postincrement
761 that reg, since the postincrement's value is the right value.
762 Likewise, it can match a preincrement reload, since we regard
763 the preincrementation as happening before any ref in this insn
765 for (i = 0; i < n_reloads; i++)
766 if ((reg_class_subset_p (class, rld[i].class)
767 || reg_class_subset_p (rld[i].class, class))
768 /* If the existing reload has a register, it must fit our
770 && (rld[i].reg_rtx == 0
771 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
772 true_regnum (rld[i].reg_rtx)))
773 && out == 0 && rld[i].out == 0 && rld[i].in != 0
775 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC
776 && MATCHES (XEXP (rld[i].in, 0), in))
777 || (REG_P (rld[i].in)
778 && GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC
779 && MATCHES (XEXP (in, 0), rld[i].in)))
780 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
781 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
782 && MERGABLE_RELOADS (type, rld[i].when_needed,
783 opnum, rld[i].opnum))
785 /* Make sure reload_in ultimately has the increment,
786 not the plain register. */
794 /* Return nonzero if X is a SUBREG which will require reloading of its
795 SUBREG_REG expression. */
798 reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
802 /* Only SUBREGs are problematical. */
803 if (GET_CODE (x) != SUBREG)
806 inner = SUBREG_REG (x);
808 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
809 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
812 /* If INNER is not a hard register, then INNER will not need to
815 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
818 /* If INNER is not ok for MODE, then INNER will need reloading. */
819 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
822 /* If the outer part is a word or smaller, INNER larger than a
823 word and the number of regs for INNER is not the same as the
824 number of words in INNER, then INNER will need reloading. */
825 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
827 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
828 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
829 != (int) hard_regno_nregs[REGNO (inner)][GET_MODE (inner)]));
832 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
833 requiring an extra reload register. The caller has already found that
834 IN contains some reference to REGNO, so check that we can produce the
835 new value in a single step. E.g. if we have
836 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
837 instruction that adds one to a register, this should succeed.
838 However, if we have something like
839 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
840 needs to be loaded into a register first, we need a separate reload
842 Such PLUS reloads are generated by find_reload_address_part.
843 The out-of-range PLUS expressions are usually introduced in the instruction
844 patterns by register elimination and substituting pseudos without a home
845 by their function-invariant equivalences. */
847 can_reload_into (rtx in, int regno, enum machine_mode mode)
851 struct recog_data save_recog_data;
853 /* For matching constraints, we often get notional input reloads where
854 we want to use the original register as the reload register. I.e.
855 technically this is a non-optional input-output reload, but IN is
856 already a valid register, and has been chosen as the reload register.
857 Speed this up, since it trivially works. */
861 /* To test MEMs properly, we'd have to take into account all the reloads
862 that are already scheduled, which can become quite complicated.
863 And since we've already handled address reloads for this MEM, it
864 should always succeed anyway. */
868 /* If we can make a simple SET insn that does the job, everything should
870 dst = gen_rtx_REG (mode, regno);
871 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
872 save_recog_data = recog_data;
873 if (recog_memoized (test_insn) >= 0)
875 extract_insn (test_insn);
876 r = constrain_operands (1);
878 recog_data = save_recog_data;
882 /* Record one reload that needs to be performed.
883 IN is an rtx saying where the data are to be found before this instruction.
884 OUT says where they must be stored after the instruction.
885 (IN is zero for data not read, and OUT is zero for data not written.)
886 INLOC and OUTLOC point to the places in the instructions where
887 IN and OUT were found.
888 If IN and OUT are both nonzero, it means the same register must be used
889 to reload both IN and OUT.
891 CLASS is a register class required for the reloaded data.
892 INMODE is the machine mode that the instruction requires
893 for the reg that replaces IN and OUTMODE is likewise for OUT.
895 If IN is zero, then OUT's location and mode should be passed as
898 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
900 OPTIONAL nonzero means this reload does not need to be performed:
901 it can be discarded if that is more convenient.
903 OPNUM and TYPE say what the purpose of this reload is.
905 The return value is the reload-number for this reload.
907 If both IN and OUT are nonzero, in some rare cases we might
908 want to make two separate reloads. (Actually we never do this now.)
909 Therefore, the reload-number for OUT is stored in
910 output_reloadnum when we return; the return value applies to IN.
911 Usually (presently always), when IN and OUT are nonzero,
912 the two reload-numbers are equal, but the caller should be careful to
916 push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
917 enum reg_class class, enum machine_mode inmode,
918 enum machine_mode outmode, int strict_low, int optional,
919 int opnum, enum reload_type type)
923 int dont_remove_subreg = 0;
924 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
925 int secondary_in_reload = -1, secondary_out_reload = -1;
926 enum insn_code secondary_in_icode = CODE_FOR_nothing;
927 enum insn_code secondary_out_icode = CODE_FOR_nothing;
929 /* INMODE and/or OUTMODE could be VOIDmode if no mode
930 has been specified for the operand. In that case,
931 use the operand's mode as the mode to reload. */
932 if (inmode == VOIDmode && in != 0)
933 inmode = GET_MODE (in);
934 if (outmode == VOIDmode && out != 0)
935 outmode = GET_MODE (out);
937 /* If IN is a pseudo register everywhere-equivalent to a constant, and
938 it is not in a hard register, reload straight from the constant,
939 since we want to get rid of such pseudo registers.
940 Often this is done earlier, but not always in find_reloads_address. */
941 if (in != 0 && REG_P (in))
943 int regno = REGNO (in);
945 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
946 && reg_equiv_constant[regno] != 0)
947 in = reg_equiv_constant[regno];
950 /* Likewise for OUT. Of course, OUT will never be equivalent to
951 an actual constant, but it might be equivalent to a memory location
952 (in the case of a parameter). */
953 if (out != 0 && REG_P (out))
955 int regno = REGNO (out);
957 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
958 && reg_equiv_constant[regno] != 0)
959 out = reg_equiv_constant[regno];
962 /* If we have a read-write operand with an address side-effect,
963 change either IN or OUT so the side-effect happens only once. */
964 if (in != 0 && out != 0 && MEM_P (in) && rtx_equal_p (in, out))
965 switch (GET_CODE (XEXP (in, 0)))
967 case POST_INC: case POST_DEC: case POST_MODIFY:
968 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
971 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
972 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
979 /* If we are reloading a (SUBREG constant ...), really reload just the
980 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
981 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
982 a pseudo and hence will become a MEM) with M1 wider than M2 and the
983 register is a pseudo, also reload the inside expression.
984 For machines that extend byte loads, do this for any SUBREG of a pseudo
985 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
986 M2 is an integral mode that gets extended when loaded.
987 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
988 either M1 is not valid for R or M2 is wider than a word but we only
989 need one word to store an M2-sized quantity in R.
990 (However, if OUT is nonzero, we need to reload the reg *and*
991 the subreg, so do nothing here, and let following statement handle it.)
993 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
994 we can't handle it here because CONST_INT does not indicate a mode.
996 Similarly, we must reload the inside expression if we have a
997 STRICT_LOW_PART (presumably, in == out in the cas).
999 Also reload the inner expression if it does not require a secondary
1000 reload but the SUBREG does.
1002 Finally, reload the inner expression if it is a register that is in
1003 the class whose registers cannot be referenced in a different size
1004 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
1005 cannot reload just the inside since we might end up with the wrong
1006 register class. But if it is inside a STRICT_LOW_PART, we have
1007 no choice, so we hope we do get the right register class there. */
1009 if (in != 0 && GET_CODE (in) == SUBREG
1010 && (subreg_lowpart_p (in) || strict_low)
1011 #ifdef CANNOT_CHANGE_MODE_CLASS
1012 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
1014 && (CONSTANT_P (SUBREG_REG (in))
1015 || GET_CODE (SUBREG_REG (in)) == PLUS
1017 || (((REG_P (SUBREG_REG (in))
1018 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1019 || MEM_P (SUBREG_REG (in)))
1020 && ((GET_MODE_SIZE (inmode)
1021 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1022 #ifdef LOAD_EXTEND_OP
1023 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1024 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1026 && (GET_MODE_SIZE (inmode)
1027 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1028 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
1029 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != UNKNOWN)
1031 #ifdef WORD_REGISTER_OPERATIONS
1032 || ((GET_MODE_SIZE (inmode)
1033 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1034 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1035 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1039 || (REG_P (SUBREG_REG (in))
1040 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1041 /* The case where out is nonzero
1042 is handled differently in the following statement. */
1043 && (out == 0 || subreg_lowpart_p (in))
1044 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1045 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1047 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1049 != (int) hard_regno_nregs[REGNO (SUBREG_REG (in))]
1050 [GET_MODE (SUBREG_REG (in))]))
1051 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1052 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1053 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1054 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1055 GET_MODE (SUBREG_REG (in)),
1059 #ifdef CANNOT_CHANGE_MODE_CLASS
1060 || (REG_P (SUBREG_REG (in))
1061 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1062 && REG_CANNOT_CHANGE_MODE_P
1063 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1067 in_subreg_loc = inloc;
1068 inloc = &SUBREG_REG (in);
1070 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1072 /* This is supposed to happen only for paradoxical subregs made by
1073 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1074 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
1077 inmode = GET_MODE (in);
1080 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1081 either M1 is not valid for R or M2 is wider than a word but we only
1082 need one word to store an M2-sized quantity in R.
1084 However, we must reload the inner reg *as well as* the subreg in
1087 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1088 code above. This can happen if SUBREG_BYTE != 0. */
1090 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1092 enum reg_class in_class = class;
1094 if (REG_P (SUBREG_REG (in)))
1096 = find_valid_class (inmode,
1097 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1098 GET_MODE (SUBREG_REG (in)),
1101 REGNO (SUBREG_REG (in)));
1103 /* This relies on the fact that emit_reload_insns outputs the
1104 instructions for input reloads of type RELOAD_OTHER in the same
1105 order as the reloads. Thus if the outer reload is also of type
1106 RELOAD_OTHER, we are guaranteed that this inner reload will be
1107 output before the outer reload. */
1108 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1109 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1110 dont_remove_subreg = 1;
1113 /* Similarly for paradoxical and problematical SUBREGs on the output.
1114 Note that there is no reason we need worry about the previous value
1115 of SUBREG_REG (out); even if wider than out,
1116 storing in a subreg is entitled to clobber it all
1117 (except in the case of STRICT_LOW_PART,
1118 and in that case the constraint should label it input-output.) */
1119 if (out != 0 && GET_CODE (out) == SUBREG
1120 && (subreg_lowpart_p (out) || strict_low)
1121 #ifdef CANNOT_CHANGE_MODE_CLASS
1122 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
1124 && (CONSTANT_P (SUBREG_REG (out))
1126 || (((REG_P (SUBREG_REG (out))
1127 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1128 || MEM_P (SUBREG_REG (out)))
1129 && ((GET_MODE_SIZE (outmode)
1130 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1131 #ifdef WORD_REGISTER_OPERATIONS
1132 || ((GET_MODE_SIZE (outmode)
1133 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1134 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1135 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1139 || (REG_P (SUBREG_REG (out))
1140 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1141 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1142 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1144 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1146 != (int) hard_regno_nregs[REGNO (SUBREG_REG (out))]
1147 [GET_MODE (SUBREG_REG (out))]))
1148 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1149 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1150 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1151 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1152 GET_MODE (SUBREG_REG (out)),
1156 #ifdef CANNOT_CHANGE_MODE_CLASS
1157 || (REG_P (SUBREG_REG (out))
1158 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1159 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1160 GET_MODE (SUBREG_REG (out)),
1165 out_subreg_loc = outloc;
1166 outloc = &SUBREG_REG (out);
1168 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1170 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1173 outmode = GET_MODE (out);
1176 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1177 either M1 is not valid for R or M2 is wider than a word but we only
1178 need one word to store an M2-sized quantity in R.
1180 However, we must reload the inner reg *as well as* the subreg in
1181 that case. In this case, the inner reg is an in-out reload. */
1183 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1185 /* This relies on the fact that emit_reload_insns outputs the
1186 instructions for output reloads of type RELOAD_OTHER in reverse
1187 order of the reloads. Thus if the outer reload is also of type
1188 RELOAD_OTHER, we are guaranteed that this inner reload will be
1189 output after the outer reload. */
1190 dont_remove_subreg = 1;
1191 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1193 find_valid_class (outmode,
1194 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1195 GET_MODE (SUBREG_REG (out)),
1198 REGNO (SUBREG_REG (out))),
1199 VOIDmode, VOIDmode, 0, 0,
1200 opnum, RELOAD_OTHER);
1203 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1204 if (in != 0 && out != 0 && MEM_P (out)
1205 && (REG_P (in) || MEM_P (in))
1206 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1209 /* If IN is a SUBREG of a hard register, make a new REG. This
1210 simplifies some of the cases below. */
1212 if (in != 0 && GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))
1213 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1214 && ! dont_remove_subreg)
1215 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1217 /* Similarly for OUT. */
1218 if (out != 0 && GET_CODE (out) == SUBREG
1219 && REG_P (SUBREG_REG (out))
1220 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1221 && ! dont_remove_subreg)
1222 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1224 /* Narrow down the class of register wanted if that is
1225 desirable on this machine for efficiency. */
1227 class = PREFERRED_RELOAD_CLASS (in, class);
1229 /* Output reloads may need analogous treatment, different in detail. */
1230 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1232 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1235 /* Make sure we use a class that can handle the actual pseudo
1236 inside any subreg. For example, on the 386, QImode regs
1237 can appear within SImode subregs. Although GENERAL_REGS
1238 can handle SImode, QImode needs a smaller class. */
1239 #ifdef LIMIT_RELOAD_CLASS
1241 class = LIMIT_RELOAD_CLASS (inmode, class);
1242 else if (in != 0 && GET_CODE (in) == SUBREG)
1243 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1246 class = LIMIT_RELOAD_CLASS (outmode, class);
1247 if (out != 0 && GET_CODE (out) == SUBREG)
1248 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1251 /* Verify that this class is at least possible for the mode that
1253 if (this_insn_is_asm)
1255 enum machine_mode mode;
1256 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1260 if (mode == VOIDmode)
1262 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1267 outmode = word_mode;
1269 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1270 if (HARD_REGNO_MODE_OK (i, mode)
1271 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1273 int nregs = hard_regno_nregs[i][mode];
1276 for (j = 1; j < nregs; j++)
1277 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1282 if (i == FIRST_PSEUDO_REGISTER)
1284 error_for_asm (this_insn, "impossible register constraint in `asm'");
1289 /* Optional output reloads are always OK even if we have no register class,
1290 since the function of these reloads is only to have spill_reg_store etc.
1291 set, so that the storing insn can be deleted later. */
1292 if (class == NO_REGS
1293 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1296 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1300 /* See if we need a secondary reload register to move between CLASS
1301 and IN or CLASS and OUT. Get the icode and push any required reloads
1302 needed for each of them if so. */
1304 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1307 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1308 &secondary_in_icode);
1311 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1312 if (out != 0 && GET_CODE (out) != SCRATCH)
1313 secondary_out_reload
1314 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1315 type, &secondary_out_icode);
1318 /* We found no existing reload suitable for re-use.
1319 So add an additional reload. */
1321 #ifdef SECONDARY_MEMORY_NEEDED
1322 /* If a memory location is needed for the copy, make one. */
1323 if (in != 0 && (REG_P (in) || GET_CODE (in) == SUBREG)
1324 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1325 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1327 get_secondary_mem (in, inmode, opnum, type);
1333 rld[i].class = class;
1334 rld[i].inmode = inmode;
1335 rld[i].outmode = outmode;
1337 rld[i].optional = optional;
1339 rld[i].nocombine = 0;
1340 rld[i].in_reg = inloc ? *inloc : 0;
1341 rld[i].out_reg = outloc ? *outloc : 0;
1342 rld[i].opnum = opnum;
1343 rld[i].when_needed = type;
1344 rld[i].secondary_in_reload = secondary_in_reload;
1345 rld[i].secondary_out_reload = secondary_out_reload;
1346 rld[i].secondary_in_icode = secondary_in_icode;
1347 rld[i].secondary_out_icode = secondary_out_icode;
1348 rld[i].secondary_p = 0;
1352 #ifdef SECONDARY_MEMORY_NEEDED
1353 if (out != 0 && (REG_P (out) || GET_CODE (out) == SUBREG)
1354 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1355 && SECONDARY_MEMORY_NEEDED (class,
1356 REGNO_REG_CLASS (reg_or_subregno (out)),
1358 get_secondary_mem (out, outmode, opnum, type);
1363 /* We are reusing an existing reload,
1364 but we may have additional information for it.
1365 For example, we may now have both IN and OUT
1366 while the old one may have just one of them. */
1368 /* The modes can be different. If they are, we want to reload in
1369 the larger mode, so that the value is valid for both modes. */
1370 if (inmode != VOIDmode
1371 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1372 rld[i].inmode = inmode;
1373 if (outmode != VOIDmode
1374 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1375 rld[i].outmode = outmode;
1378 rtx in_reg = inloc ? *inloc : 0;
1379 /* If we merge reloads for two distinct rtl expressions that
1380 are identical in content, there might be duplicate address
1381 reloads. Remove the extra set now, so that if we later find
1382 that we can inherit this reload, we can get rid of the
1383 address reloads altogether.
1385 Do not do this if both reloads are optional since the result
1386 would be an optional reload which could potentially leave
1387 unresolved address replacements.
1389 It is not sufficient to call transfer_replacements since
1390 choose_reload_regs will remove the replacements for address
1391 reloads of inherited reloads which results in the same
1393 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1394 && ! (rld[i].optional && optional))
1396 /* We must keep the address reload with the lower operand
1398 if (opnum > rld[i].opnum)
1400 remove_address_replacements (in);
1402 in_reg = rld[i].in_reg;
1405 remove_address_replacements (rld[i].in);
1408 rld[i].in_reg = in_reg;
1413 rld[i].out_reg = outloc ? *outloc : 0;
1415 if (reg_class_subset_p (class, rld[i].class))
1416 rld[i].class = class;
1417 rld[i].optional &= optional;
1418 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1419 opnum, rld[i].opnum))
1420 rld[i].when_needed = RELOAD_OTHER;
1421 rld[i].opnum = MIN (rld[i].opnum, opnum);
1424 /* If the ostensible rtx being reloaded differs from the rtx found
1425 in the location to substitute, this reload is not safe to combine
1426 because we cannot reliably tell whether it appears in the insn. */
1428 if (in != 0 && in != *inloc)
1429 rld[i].nocombine = 1;
1432 /* This was replaced by changes in find_reloads_address_1 and the new
1433 function inc_for_reload, which go with a new meaning of reload_inc. */
1435 /* If this is an IN/OUT reload in an insn that sets the CC,
1436 it must be for an autoincrement. It doesn't work to store
1437 the incremented value after the insn because that would clobber the CC.
1438 So we must do the increment of the value reloaded from,
1439 increment it, store it back, then decrement again. */
1440 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1444 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1445 /* If we did not find a nonzero amount-to-increment-by,
1446 that contradicts the belief that IN is being incremented
1447 in an address in this insn. */
1448 if (rld[i].inc == 0)
1453 /* If we will replace IN and OUT with the reload-reg,
1454 record where they are located so that substitution need
1455 not do a tree walk. */
1457 if (replace_reloads)
1461 struct replacement *r = &replacements[n_replacements++];
1463 r->subreg_loc = in_subreg_loc;
1467 if (outloc != 0 && outloc != inloc)
1469 struct replacement *r = &replacements[n_replacements++];
1472 r->subreg_loc = out_subreg_loc;
1477 /* If this reload is just being introduced and it has both
1478 an incoming quantity and an outgoing quantity that are
1479 supposed to be made to match, see if either one of the two
1480 can serve as the place to reload into.
1482 If one of them is acceptable, set rld[i].reg_rtx
1485 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1487 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1490 earlyclobber_operand_p (out));
1492 /* If the outgoing register already contains the same value
1493 as the incoming one, we can dispense with loading it.
1494 The easiest way to tell the caller that is to give a phony
1495 value for the incoming operand (same as outgoing one). */
1496 if (rld[i].reg_rtx == out
1497 && (REG_P (in) || CONSTANT_P (in))
1498 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1499 static_reload_reg_p, i, inmode))
1503 /* If this is an input reload and the operand contains a register that
1504 dies in this insn and is used nowhere else, see if it is the right class
1505 to be used for this reload. Use it if so. (This occurs most commonly
1506 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1507 this if it is also an output reload that mentions the register unless
1508 the output is a SUBREG that clobbers an entire register.
1510 Note that the operand might be one of the spill regs, if it is a
1511 pseudo reg and we are in a block where spilling has not taken place.
1512 But if there is no spilling in this block, that is OK.
1513 An explicitly used hard reg cannot be a spill reg. */
1515 if (rld[i].reg_rtx == 0 && in != 0)
1519 enum machine_mode rel_mode = inmode;
1521 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1524 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1525 if (REG_NOTE_KIND (note) == REG_DEAD
1526 && REG_P (XEXP (note, 0))
1527 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1528 && reg_mentioned_p (XEXP (note, 0), in)
1529 && ! refers_to_regno_for_reload_p (regno,
1531 + hard_regno_nregs[regno]
1533 PATTERN (this_insn), inloc)
1534 /* If this is also an output reload, IN cannot be used as
1535 the reload register if it is set in this insn unless IN
1537 && (out == 0 || in == out
1538 || ! hard_reg_set_here_p (regno,
1540 + hard_regno_nregs[regno]
1542 PATTERN (this_insn)))
1543 /* ??? Why is this code so different from the previous?
1544 Is there any simple coherent way to describe the two together?
1545 What's going on here. */
1547 || (GET_CODE (in) == SUBREG
1548 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1550 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1551 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1552 /* Make sure the operand fits in the reg that dies. */
1553 && (GET_MODE_SIZE (rel_mode)
1554 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1555 && HARD_REGNO_MODE_OK (regno, inmode)
1556 && HARD_REGNO_MODE_OK (regno, outmode))
1559 unsigned int nregs = MAX (hard_regno_nregs[regno][inmode],
1560 hard_regno_nregs[regno][outmode]);
1562 for (offs = 0; offs < nregs; offs++)
1563 if (fixed_regs[regno + offs]
1564 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1569 && (! (refers_to_regno_for_reload_p
1570 (regno, (regno + hard_regno_nregs[regno][inmode]),
1572 || can_reload_into (in, regno, inmode)))
1574 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1581 output_reloadnum = i;
1586 /* Record an additional place we must replace a value
1587 for which we have already recorded a reload.
1588 RELOADNUM is the value returned by push_reload
1589 when the reload was recorded.
1590 This is used in insn patterns that use match_dup. */
1593 push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1595 if (replace_reloads)
1597 struct replacement *r = &replacements[n_replacements++];
1598 r->what = reloadnum;
1605 /* Duplicate any replacement we have recorded to apply at
1606 location ORIG_LOC to also be performed at DUP_LOC.
1607 This is used in insn patterns that use match_dup. */
1610 dup_replacements (rtx *dup_loc, rtx *orig_loc)
1612 int i, n = n_replacements;
1614 for (i = 0; i < n; i++)
1616 struct replacement *r = &replacements[i];
1617 if (r->where == orig_loc)
1618 push_replacement (dup_loc, r->what, r->mode);
1622 /* Transfer all replacements that used to be in reload FROM to be in
1626 transfer_replacements (int to, int from)
1630 for (i = 0; i < n_replacements; i++)
1631 if (replacements[i].what == from)
1632 replacements[i].what = to;
1635 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1636 or a subpart of it. If we have any replacements registered for IN_RTX,
1637 cancel the reloads that were supposed to load them.
1638 Return nonzero if we canceled any reloads. */
1640 remove_address_replacements (rtx in_rtx)
1643 char reload_flags[MAX_RELOADS];
1644 int something_changed = 0;
1646 memset (reload_flags, 0, sizeof reload_flags);
1647 for (i = 0, j = 0; i < n_replacements; i++)
1649 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1650 reload_flags[replacements[i].what] |= 1;
1653 replacements[j++] = replacements[i];
1654 reload_flags[replacements[i].what] |= 2;
1657 /* Note that the following store must be done before the recursive calls. */
1660 for (i = n_reloads - 1; i >= 0; i--)
1662 if (reload_flags[i] == 1)
1664 deallocate_reload_reg (i);
1665 remove_address_replacements (rld[i].in);
1667 something_changed = 1;
1670 return something_changed;
1673 /* If there is only one output reload, and it is not for an earlyclobber
1674 operand, try to combine it with a (logically unrelated) input reload
1675 to reduce the number of reload registers needed.
1677 This is safe if the input reload does not appear in
1678 the value being output-reloaded, because this implies
1679 it is not needed any more once the original insn completes.
1681 If that doesn't work, see we can use any of the registers that
1682 die in this insn as a reload register. We can if it is of the right
1683 class and does not appear in the value being output-reloaded. */
1686 combine_reloads (void)
1689 int output_reload = -1;
1690 int secondary_out = -1;
1693 /* Find the output reload; return unless there is exactly one
1694 and that one is mandatory. */
1696 for (i = 0; i < n_reloads; i++)
1697 if (rld[i].out != 0)
1699 if (output_reload >= 0)
1704 if (output_reload < 0 || rld[output_reload].optional)
1707 /* An input-output reload isn't combinable. */
1709 if (rld[output_reload].in != 0)
1712 /* If this reload is for an earlyclobber operand, we can't do anything. */
1713 if (earlyclobber_operand_p (rld[output_reload].out))
1716 /* If there is a reload for part of the address of this operand, we would
1717 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1718 its life to the point where doing this combine would not lower the
1719 number of spill registers needed. */
1720 for (i = 0; i < n_reloads; i++)
1721 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1722 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1723 && rld[i].opnum == rld[output_reload].opnum)
1726 /* Check each input reload; can we combine it? */
1728 for (i = 0; i < n_reloads; i++)
1729 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1730 /* Life span of this reload must not extend past main insn. */
1731 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1732 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1733 && rld[i].when_needed != RELOAD_OTHER
1734 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1735 == CLASS_MAX_NREGS (rld[output_reload].class,
1736 rld[output_reload].outmode))
1738 && rld[i].reg_rtx == 0
1739 #ifdef SECONDARY_MEMORY_NEEDED
1740 /* Don't combine two reloads with different secondary
1741 memory locations. */
1742 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1743 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1744 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1745 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1747 && (SMALL_REGISTER_CLASSES
1748 ? (rld[i].class == rld[output_reload].class)
1749 : (reg_class_subset_p (rld[i].class,
1750 rld[output_reload].class)
1751 || reg_class_subset_p (rld[output_reload].class,
1753 && (MATCHES (rld[i].in, rld[output_reload].out)
1754 /* Args reversed because the first arg seems to be
1755 the one that we imagine being modified
1756 while the second is the one that might be affected. */
1757 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1759 /* However, if the input is a register that appears inside
1760 the output, then we also can't share.
1761 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1762 If the same reload reg is used for both reg 69 and the
1763 result to be stored in memory, then that result
1764 will clobber the address of the memory ref. */
1765 && ! (REG_P (rld[i].in)
1766 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1767 rld[output_reload].out))))
1768 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1769 rld[i].when_needed != RELOAD_FOR_INPUT)
1770 && (reg_class_size[(int) rld[i].class]
1771 || SMALL_REGISTER_CLASSES)
1772 /* We will allow making things slightly worse by combining an
1773 input and an output, but no worse than that. */
1774 && (rld[i].when_needed == RELOAD_FOR_INPUT
1775 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1779 /* We have found a reload to combine with! */
1780 rld[i].out = rld[output_reload].out;
1781 rld[i].out_reg = rld[output_reload].out_reg;
1782 rld[i].outmode = rld[output_reload].outmode;
1783 /* Mark the old output reload as inoperative. */
1784 rld[output_reload].out = 0;
1785 /* The combined reload is needed for the entire insn. */
1786 rld[i].when_needed = RELOAD_OTHER;
1787 /* If the output reload had a secondary reload, copy it. */
1788 if (rld[output_reload].secondary_out_reload != -1)
1790 rld[i].secondary_out_reload
1791 = rld[output_reload].secondary_out_reload;
1792 rld[i].secondary_out_icode
1793 = rld[output_reload].secondary_out_icode;
1796 #ifdef SECONDARY_MEMORY_NEEDED
1797 /* Copy any secondary MEM. */
1798 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1799 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1800 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1802 /* If required, minimize the register class. */
1803 if (reg_class_subset_p (rld[output_reload].class,
1805 rld[i].class = rld[output_reload].class;
1807 /* Transfer all replacements from the old reload to the combined. */
1808 for (j = 0; j < n_replacements; j++)
1809 if (replacements[j].what == output_reload)
1810 replacements[j].what = i;
1815 /* If this insn has only one operand that is modified or written (assumed
1816 to be the first), it must be the one corresponding to this reload. It
1817 is safe to use anything that dies in this insn for that output provided
1818 that it does not occur in the output (we already know it isn't an
1819 earlyclobber. If this is an asm insn, give up. */
1821 if (INSN_CODE (this_insn) == -1)
1824 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1825 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1826 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1829 /* See if some hard register that dies in this insn and is not used in
1830 the output is the right class. Only works if the register we pick
1831 up can fully hold our output reload. */
1832 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1833 if (REG_NOTE_KIND (note) == REG_DEAD
1834 && REG_P (XEXP (note, 0))
1835 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1836 rld[output_reload].out)
1837 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1838 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1839 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1840 REGNO (XEXP (note, 0)))
1841 && (hard_regno_nregs[REGNO (XEXP (note, 0))][rld[output_reload].outmode]
1842 <= hard_regno_nregs[REGNO (XEXP (note, 0))][GET_MODE (XEXP (note, 0))])
1843 /* Ensure that a secondary or tertiary reload for this output
1844 won't want this register. */
1845 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1846 || (! (TEST_HARD_REG_BIT
1847 (reg_class_contents[(int) rld[secondary_out].class],
1848 REGNO (XEXP (note, 0))))
1849 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1850 || ! (TEST_HARD_REG_BIT
1851 (reg_class_contents[(int) rld[secondary_out].class],
1852 REGNO (XEXP (note, 0)))))))
1853 && ! fixed_regs[REGNO (XEXP (note, 0))])
1855 rld[output_reload].reg_rtx
1856 = gen_rtx_REG (rld[output_reload].outmode,
1857 REGNO (XEXP (note, 0)));
1862 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1863 See if one of IN and OUT is a register that may be used;
1864 this is desirable since a spill-register won't be needed.
1865 If so, return the register rtx that proves acceptable.
1867 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1868 CLASS is the register class required for the reload.
1870 If FOR_REAL is >= 0, it is the number of the reload,
1871 and in some cases when it can be discovered that OUT doesn't need
1872 to be computed, clear out rld[FOR_REAL].out.
1874 If FOR_REAL is -1, this should not be done, because this call
1875 is just to see if a register can be found, not to find and install it.
1877 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1878 puts an additional constraint on being able to use IN for OUT since
1879 IN must not appear elsewhere in the insn (it is assumed that IN itself
1880 is safe from the earlyclobber). */
1883 find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1884 enum machine_mode inmode, enum machine_mode outmode,
1885 enum reg_class class, int for_real, int earlyclobber)
1893 /* If operands exceed a word, we can't use either of them
1894 unless they have the same size. */
1895 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1896 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1897 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1900 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1901 respectively refers to a hard register. */
1903 /* Find the inside of any subregs. */
1904 while (GET_CODE (out) == SUBREG)
1906 if (REG_P (SUBREG_REG (out))
1907 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1908 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1909 GET_MODE (SUBREG_REG (out)),
1912 out = SUBREG_REG (out);
1914 while (GET_CODE (in) == SUBREG)
1916 if (REG_P (SUBREG_REG (in))
1917 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1918 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1919 GET_MODE (SUBREG_REG (in)),
1922 in = SUBREG_REG (in);
1925 /* Narrow down the reg class, the same way push_reload will;
1926 otherwise we might find a dummy now, but push_reload won't. */
1927 class = PREFERRED_RELOAD_CLASS (in, class);
1929 /* See if OUT will do. */
1931 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1933 unsigned int regno = REGNO (out) + out_offset;
1934 unsigned int nwords = hard_regno_nregs[regno][outmode];
1937 /* When we consider whether the insn uses OUT,
1938 ignore references within IN. They don't prevent us
1939 from copying IN into OUT, because those refs would
1940 move into the insn that reloads IN.
1942 However, we only ignore IN in its role as this reload.
1943 If the insn uses IN elsewhere and it contains OUT,
1944 that counts. We can't be sure it's the "same" operand
1945 so it might not go through this reload. */
1947 *inloc = const0_rtx;
1949 if (regno < FIRST_PSEUDO_REGISTER
1950 && HARD_REGNO_MODE_OK (regno, outmode)
1951 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1952 PATTERN (this_insn), outloc))
1956 for (i = 0; i < nwords; i++)
1957 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1963 if (REG_P (real_out))
1966 value = gen_rtx_REG (outmode, regno);
1973 /* Consider using IN if OUT was not acceptable
1974 or if OUT dies in this insn (like the quotient in a divmod insn).
1975 We can't use IN unless it is dies in this insn,
1976 which means we must know accurately which hard regs are live.
1977 Also, the result can't go in IN if IN is used within OUT,
1978 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1979 if (hard_regs_live_known
1981 && REGNO (in) < FIRST_PSEUDO_REGISTER
1983 || find_reg_note (this_insn, REG_UNUSED, real_out))
1984 && find_reg_note (this_insn, REG_DEAD, real_in)
1985 && !fixed_regs[REGNO (in)]
1986 && HARD_REGNO_MODE_OK (REGNO (in),
1987 /* The only case where out and real_out might
1988 have different modes is where real_out
1989 is a subreg, and in that case, out
1991 (GET_MODE (out) != VOIDmode
1992 ? GET_MODE (out) : outmode)))
1994 unsigned int regno = REGNO (in) + in_offset;
1995 unsigned int nwords = hard_regno_nregs[regno][inmode];
1997 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
1998 && ! hard_reg_set_here_p (regno, regno + nwords,
1999 PATTERN (this_insn))
2001 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
2002 PATTERN (this_insn), inloc)))
2006 for (i = 0; i < nwords; i++)
2007 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
2013 /* If we were going to use OUT as the reload reg
2014 and changed our mind, it means OUT is a dummy that
2015 dies here. So don't bother copying value to it. */
2016 if (for_real >= 0 && value == real_out)
2017 rld[for_real].out = 0;
2018 if (REG_P (real_in))
2021 value = gen_rtx_REG (inmode, regno);
2029 /* This page contains subroutines used mainly for determining
2030 whether the IN or an OUT of a reload can serve as the
2033 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2036 earlyclobber_operand_p (rtx x)
2040 for (i = 0; i < n_earlyclobbers; i++)
2041 if (reload_earlyclobbers[i] == x)
2047 /* Return 1 if expression X alters a hard reg in the range
2048 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2049 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2050 X should be the body of an instruction. */
2053 hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2055 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2057 rtx op0 = SET_DEST (x);
2059 while (GET_CODE (op0) == SUBREG)
2060 op0 = SUBREG_REG (op0);
2063 unsigned int r = REGNO (op0);
2065 /* See if this reg overlaps range under consideration. */
2067 && r + hard_regno_nregs[r][GET_MODE (op0)] > beg_regno)
2071 else if (GET_CODE (x) == PARALLEL)
2073 int i = XVECLEN (x, 0) - 1;
2076 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2083 /* Return 1 if ADDR is a valid memory address for mode MODE,
2084 and check that each pseudo reg has the proper kind of
2088 strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx addr)
2090 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2097 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2098 if they are the same hard reg, and has special hacks for
2099 autoincrement and autodecrement.
2100 This is specifically intended for find_reloads to use
2101 in determining whether two operands match.
2102 X is the operand whose number is the lower of the two.
2104 The value is 2 if Y contains a pre-increment that matches
2105 a non-incrementing address in X. */
2107 /* ??? To be completely correct, we should arrange to pass
2108 for X the output operand and for Y the input operand.
2109 For now, we assume that the output operand has the lower number
2110 because that is natural in (SET output (... input ...)). */
2113 operands_match_p (rtx x, rtx y)
2116 RTX_CODE code = GET_CODE (x);
2122 if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x))))
2123 && (REG_P (y) || (GET_CODE (y) == SUBREG
2124 && REG_P (SUBREG_REG (y)))))
2130 i = REGNO (SUBREG_REG (x));
2131 if (i >= FIRST_PSEUDO_REGISTER)
2133 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2134 GET_MODE (SUBREG_REG (x)),
2141 if (GET_CODE (y) == SUBREG)
2143 j = REGNO (SUBREG_REG (y));
2144 if (j >= FIRST_PSEUDO_REGISTER)
2146 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2147 GET_MODE (SUBREG_REG (y)),
2154 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2155 multiple hard register group, so that for example (reg:DI 0) and
2156 (reg:SI 1) will be considered the same register. */
2157 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2158 && i < FIRST_PSEUDO_REGISTER)
2159 i += hard_regno_nregs[i][GET_MODE (x)] - 1;
2160 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2161 && j < FIRST_PSEUDO_REGISTER)
2162 j += hard_regno_nregs[j][GET_MODE (y)] - 1;
2166 /* If two operands must match, because they are really a single
2167 operand of an assembler insn, then two postincrements are invalid
2168 because the assembler insn would increment only once.
2169 On the other hand, a postincrement matches ordinary indexing
2170 if the postincrement is the output operand. */
2171 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2172 return operands_match_p (XEXP (x, 0), y);
2173 /* Two preincrements are invalid
2174 because the assembler insn would increment only once.
2175 On the other hand, a preincrement matches ordinary indexing
2176 if the preincrement is the input operand.
2177 In this case, return 2, since some callers need to do special
2178 things when this happens. */
2179 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2180 || GET_CODE (y) == PRE_MODIFY)
2181 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2185 /* Now we have disposed of all the cases
2186 in which different rtx codes can match. */
2187 if (code != GET_CODE (y))
2189 if (code == LABEL_REF)
2190 return XEXP (x, 0) == XEXP (y, 0);
2191 if (code == SYMBOL_REF)
2192 return XSTR (x, 0) == XSTR (y, 0);
2194 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2196 if (GET_MODE (x) != GET_MODE (y))
2199 /* Compare the elements. If any pair of corresponding elements
2200 fail to match, return 0 for the whole things. */
2203 fmt = GET_RTX_FORMAT (code);
2204 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2210 if (XWINT (x, i) != XWINT (y, i))
2215 if (XINT (x, i) != XINT (y, i))
2220 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2223 /* If any subexpression returns 2,
2224 we should return 2 if we are successful. */
2233 if (XVECLEN (x, i) != XVECLEN (y, i))
2235 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2237 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2245 /* It is believed that rtx's at this level will never
2246 contain anything but integers and other rtx's,
2247 except for within LABEL_REFs and SYMBOL_REFs. */
2252 return 1 + success_2;
2255 /* Describe the range of registers or memory referenced by X.
2256 If X is a register, set REG_FLAG and put the first register
2257 number into START and the last plus one into END.
2258 If X is a memory reference, put a base address into BASE
2259 and a range of integer offsets into START and END.
2260 If X is pushing on the stack, we can assume it causes no trouble,
2261 so we set the SAFE field. */
2263 static struct decomposition
2266 struct decomposition val;
2269 memset (&val, 0, sizeof (val));
2273 rtx base = NULL_RTX, offset = 0;
2274 rtx addr = XEXP (x, 0);
2276 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2277 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2279 val.base = XEXP (addr, 0);
2280 val.start = -GET_MODE_SIZE (GET_MODE (x));
2281 val.end = GET_MODE_SIZE (GET_MODE (x));
2282 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2286 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2288 if (GET_CODE (XEXP (addr, 1)) == PLUS
2289 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2290 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2292 val.base = XEXP (addr, 0);
2293 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2294 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2295 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2300 if (GET_CODE (addr) == CONST)
2302 addr = XEXP (addr, 0);
2305 if (GET_CODE (addr) == PLUS)
2307 if (CONSTANT_P (XEXP (addr, 0)))
2309 base = XEXP (addr, 1);
2310 offset = XEXP (addr, 0);
2312 else if (CONSTANT_P (XEXP (addr, 1)))
2314 base = XEXP (addr, 0);
2315 offset = XEXP (addr, 1);
2322 offset = const0_rtx;
2324 if (GET_CODE (offset) == CONST)
2325 offset = XEXP (offset, 0);
2326 if (GET_CODE (offset) == PLUS)
2328 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2330 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2331 offset = XEXP (offset, 0);
2333 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2335 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2336 offset = XEXP (offset, 1);
2340 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2341 offset = const0_rtx;
2344 else if (GET_CODE (offset) != CONST_INT)
2346 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2347 offset = const0_rtx;
2350 if (all_const && GET_CODE (base) == PLUS)
2351 base = gen_rtx_CONST (GET_MODE (base), base);
2353 if (GET_CODE (offset) != CONST_INT)
2356 val.start = INTVAL (offset);
2357 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2364 val.start = true_regnum (x);
2367 /* A pseudo with no hard reg. */
2368 val.start = REGNO (x);
2369 val.end = val.start + 1;
2373 val.end = val.start + hard_regno_nregs[val.start][GET_MODE (x)];
2375 else if (GET_CODE (x) == SUBREG)
2377 if (!REG_P (SUBREG_REG (x)))
2378 /* This could be more precise, but it's good enough. */
2379 return decompose (SUBREG_REG (x));
2381 val.start = true_regnum (x);
2383 return decompose (SUBREG_REG (x));
2386 val.end = val.start + hard_regno_nregs[val.start][GET_MODE (x)];
2388 else if (CONSTANT_P (x)
2389 /* This hasn't been assigned yet, so it can't conflict yet. */
2390 || GET_CODE (x) == SCRATCH)
2397 /* Return 1 if altering Y will not modify the value of X.
2398 Y is also described by YDATA, which should be decompose (Y). */
2401 immune_p (rtx x, rtx y, struct decomposition ydata)
2403 struct decomposition xdata;
2406 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2412 /* If Y is memory and X is not, Y can't affect X. */
2416 xdata = decompose (x);
2418 if (! rtx_equal_p (xdata.base, ydata.base))
2420 /* If bases are distinct symbolic constants, there is no overlap. */
2421 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2423 /* Constants and stack slots never overlap. */
2424 if (CONSTANT_P (xdata.base)
2425 && (ydata.base == frame_pointer_rtx
2426 || ydata.base == hard_frame_pointer_rtx
2427 || ydata.base == stack_pointer_rtx))
2429 if (CONSTANT_P (ydata.base)
2430 && (xdata.base == frame_pointer_rtx
2431 || xdata.base == hard_frame_pointer_rtx
2432 || xdata.base == stack_pointer_rtx))
2434 /* If either base is variable, we don't know anything. */
2438 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2441 /* Similar, but calls decompose. */
2444 safe_from_earlyclobber (rtx op, rtx clobber)
2446 struct decomposition early_data;
2448 early_data = decompose (clobber);
2449 return immune_p (op, clobber, early_data);
2452 /* Main entry point of this file: search the body of INSN
2453 for values that need reloading and record them with push_reload.
2454 REPLACE nonzero means record also where the values occur
2455 so that subst_reloads can be used.
2457 IND_LEVELS says how many levels of indirection are supported by this
2458 machine; a value of zero means that a memory reference is not a valid
2461 LIVE_KNOWN says we have valid information about which hard
2462 regs are live at each point in the program; this is true when
2463 we are called from global_alloc but false when stupid register
2464 allocation has been done.
2466 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2467 which is nonnegative if the reg has been commandeered for reloading into.
2468 It is copied into STATIC_RELOAD_REG_P and referenced from there
2469 by various subroutines.
2471 Return TRUE if some operands need to be changed, because of swapping
2472 commutative operands, reg_equiv_address substitution, or whatever. */
2475 find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2476 short *reload_reg_p)
2478 int insn_code_number;
2481 /* These start out as the constraints for the insn
2482 and they are chewed up as we consider alternatives. */
2483 char *constraints[MAX_RECOG_OPERANDS];
2484 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2486 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2487 char pref_or_nothing[MAX_RECOG_OPERANDS];
2488 /* Nonzero for a MEM operand whose entire address needs a reload. */
2489 int address_reloaded[MAX_RECOG_OPERANDS];
2490 /* Nonzero for an address operand that needs to be completely reloaded. */
2491 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2492 /* Value of enum reload_type to use for operand. */
2493 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2494 /* Value of enum reload_type to use within address of operand. */
2495 enum reload_type address_type[MAX_RECOG_OPERANDS];
2496 /* Save the usage of each operand. */
2497 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2498 int no_input_reloads = 0, no_output_reloads = 0;
2500 int this_alternative[MAX_RECOG_OPERANDS];
2501 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2502 char this_alternative_win[MAX_RECOG_OPERANDS];
2503 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2504 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2505 int this_alternative_matches[MAX_RECOG_OPERANDS];
2507 int goal_alternative[MAX_RECOG_OPERANDS];
2508 int this_alternative_number;
2509 int goal_alternative_number = 0;
2510 int operand_reloadnum[MAX_RECOG_OPERANDS];
2511 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2512 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2513 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2514 char goal_alternative_win[MAX_RECOG_OPERANDS];
2515 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2516 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2517 int goal_alternative_swapped;
2520 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2521 rtx substed_operand[MAX_RECOG_OPERANDS];
2522 rtx body = PATTERN (insn);
2523 rtx set = single_set (insn);
2524 int goal_earlyclobber = 0, this_earlyclobber;
2525 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2531 n_earlyclobbers = 0;
2532 replace_reloads = replace;
2533 hard_regs_live_known = live_known;
2534 static_reload_reg_p = reload_reg_p;
2536 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2537 neither are insns that SET cc0. Insns that use CC0 are not allowed
2538 to have any input reloads. */
2539 if (JUMP_P (insn) || CALL_P (insn))
2540 no_output_reloads = 1;
2543 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2544 no_input_reloads = 1;
2545 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2546 no_output_reloads = 1;
2549 #ifdef SECONDARY_MEMORY_NEEDED
2550 /* The eliminated forms of any secondary memory locations are per-insn, so
2551 clear them out here. */
2553 if (secondary_memlocs_elim_used)
2555 memset (secondary_memlocs_elim, 0,
2556 sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2557 secondary_memlocs_elim_used = 0;
2561 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2562 is cheap to move between them. If it is not, there may not be an insn
2563 to do the copy, so we may need a reload. */
2564 if (GET_CODE (body) == SET
2565 && REG_P (SET_DEST (body))
2566 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2567 && REG_P (SET_SRC (body))
2568 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2569 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2570 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2571 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2574 extract_insn (insn);
2576 noperands = reload_n_operands = recog_data.n_operands;
2577 n_alternatives = recog_data.n_alternatives;
2579 /* Just return "no reloads" if insn has no operands with constraints. */
2580 if (noperands == 0 || n_alternatives == 0)
2583 insn_code_number = INSN_CODE (insn);
2584 this_insn_is_asm = insn_code_number < 0;
2586 memcpy (operand_mode, recog_data.operand_mode,
2587 noperands * sizeof (enum machine_mode));
2588 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2592 /* If we will need to know, later, whether some pair of operands
2593 are the same, we must compare them now and save the result.
2594 Reloading the base and index registers will clobber them
2595 and afterward they will fail to match. */
2597 for (i = 0; i < noperands; i++)
2602 substed_operand[i] = recog_data.operand[i];
2605 modified[i] = RELOAD_READ;
2607 /* Scan this operand's constraint to see if it is an output operand,
2608 an in-out operand, is commutative, or should match another. */
2612 p += CONSTRAINT_LEN (c, p);
2616 modified[i] = RELOAD_WRITE;
2619 modified[i] = RELOAD_READ_WRITE;
2623 /* The last operand should not be marked commutative. */
2624 if (i == noperands - 1)
2627 /* We currently only support one commutative pair of
2628 operands. Some existing asm code currently uses more
2629 than one pair. Previously, that would usually work,
2630 but sometimes it would crash the compiler. We
2631 continue supporting that case as well as we can by
2632 silently ignoring all but the first pair. In the
2633 future we may handle it correctly. */
2634 if (commutative < 0)
2636 else if (!this_insn_is_asm)
2640 /* Use of ISDIGIT is tempting here, but it may get expensive because
2641 of locale support we don't want. */
2642 case '0': case '1': case '2': case '3': case '4':
2643 case '5': case '6': case '7': case '8': case '9':
2645 c = strtoul (p - 1, &p, 10);
2647 operands_match[c][i]
2648 = operands_match_p (recog_data.operand[c],
2649 recog_data.operand[i]);
2651 /* An operand may not match itself. */
2655 /* If C can be commuted with C+1, and C might need to match I,
2656 then C+1 might also need to match I. */
2657 if (commutative >= 0)
2659 if (c == commutative || c == commutative + 1)
2661 int other = c + (c == commutative ? 1 : -1);
2662 operands_match[other][i]
2663 = operands_match_p (recog_data.operand[other],
2664 recog_data.operand[i]);
2666 if (i == commutative || i == commutative + 1)
2668 int other = i + (i == commutative ? 1 : -1);
2669 operands_match[c][other]
2670 = operands_match_p (recog_data.operand[c],
2671 recog_data.operand[other]);
2673 /* Note that C is supposed to be less than I.
2674 No need to consider altering both C and I because in
2675 that case we would alter one into the other. */
2682 /* Examine each operand that is a memory reference or memory address
2683 and reload parts of the addresses into index registers.
2684 Also here any references to pseudo regs that didn't get hard regs
2685 but are equivalent to constants get replaced in the insn itself
2686 with those constants. Nobody will ever see them again.
2688 Finally, set up the preferred classes of each operand. */
2690 for (i = 0; i < noperands; i++)
2692 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2694 address_reloaded[i] = 0;
2695 address_operand_reloaded[i] = 0;
2696 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2697 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2700 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2701 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2704 if (*constraints[i] == 0)
2705 /* Ignore things like match_operator operands. */
2707 else if (constraints[i][0] == 'p'
2708 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2710 address_operand_reloaded[i]
2711 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2712 recog_data.operand[i],
2713 recog_data.operand_loc[i],
2714 i, operand_type[i], ind_levels, insn);
2716 /* If we now have a simple operand where we used to have a
2717 PLUS or MULT, re-recognize and try again. */
2718 if ((OBJECT_P (*recog_data.operand_loc[i])
2719 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2720 && (GET_CODE (recog_data.operand[i]) == MULT
2721 || GET_CODE (recog_data.operand[i]) == PLUS))
2723 INSN_CODE (insn) = -1;
2724 retval = find_reloads (insn, replace, ind_levels, live_known,
2729 recog_data.operand[i] = *recog_data.operand_loc[i];
2730 substed_operand[i] = recog_data.operand[i];
2732 /* Address operands are reloaded in their existing mode,
2733 no matter what is specified in the machine description. */
2734 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2736 else if (code == MEM)
2739 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2740 recog_data.operand_loc[i],
2741 XEXP (recog_data.operand[i], 0),
2742 &XEXP (recog_data.operand[i], 0),
2743 i, address_type[i], ind_levels, insn);
2744 recog_data.operand[i] = *recog_data.operand_loc[i];
2745 substed_operand[i] = recog_data.operand[i];
2747 else if (code == SUBREG)
2749 rtx reg = SUBREG_REG (recog_data.operand[i]);
2751 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2754 && &SET_DEST (set) == recog_data.operand_loc[i],
2756 &address_reloaded[i]);
2758 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2759 that didn't get a hard register, emit a USE with a REG_EQUAL
2760 note in front so that we might inherit a previous, possibly
2766 && (GET_MODE_SIZE (GET_MODE (reg))
2767 >= GET_MODE_SIZE (GET_MODE (op))))
2768 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2770 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2772 substed_operand[i] = recog_data.operand[i] = op;
2774 else if (code == PLUS || GET_RTX_CLASS (code) == RTX_UNARY)
2775 /* We can get a PLUS as an "operand" as a result of register
2776 elimination. See eliminate_regs and gen_reload. We handle
2777 a unary operator by reloading the operand. */
2778 substed_operand[i] = recog_data.operand[i]
2779 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2780 ind_levels, 0, insn,
2781 &address_reloaded[i]);
2782 else if (code == REG)
2784 /* This is equivalent to calling find_reloads_toplev.
2785 The code is duplicated for speed.
2786 When we find a pseudo always equivalent to a constant,
2787 we replace it by the constant. We must be sure, however,
2788 that we don't try to replace it in the insn in which it
2790 int regno = REGNO (recog_data.operand[i]);
2791 if (reg_equiv_constant[regno] != 0
2792 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2794 /* Record the existing mode so that the check if constants are
2795 allowed will work when operand_mode isn't specified. */
2797 if (operand_mode[i] == VOIDmode)
2798 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2800 substed_operand[i] = recog_data.operand[i]
2801 = reg_equiv_constant[regno];
2803 if (reg_equiv_memory_loc[regno] != 0
2804 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2805 /* We need not give a valid is_set_dest argument since the case
2806 of a constant equivalence was checked above. */
2807 substed_operand[i] = recog_data.operand[i]
2808 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2809 ind_levels, 0, insn,
2810 &address_reloaded[i]);
2812 /* If the operand is still a register (we didn't replace it with an
2813 equivalent), get the preferred class to reload it into. */
2814 code = GET_CODE (recog_data.operand[i]);
2816 = ((code == REG && REGNO (recog_data.operand[i])
2817 >= FIRST_PSEUDO_REGISTER)
2818 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2822 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2823 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2826 /* If this is simply a copy from operand 1 to operand 0, merge the
2827 preferred classes for the operands. */
2828 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2829 && recog_data.operand[1] == SET_SRC (set))
2831 preferred_class[0] = preferred_class[1]
2832 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2833 pref_or_nothing[0] |= pref_or_nothing[1];
2834 pref_or_nothing[1] |= pref_or_nothing[0];
2837 /* Now see what we need for pseudo-regs that didn't get hard regs
2838 or got the wrong kind of hard reg. For this, we must consider
2839 all the operands together against the register constraints. */
2841 best = MAX_RECOG_OPERANDS * 2 + 600;
2844 goal_alternative_swapped = 0;
2847 /* The constraints are made of several alternatives.
2848 Each operand's constraint looks like foo,bar,... with commas
2849 separating the alternatives. The first alternatives for all
2850 operands go together, the second alternatives go together, etc.
2852 First loop over alternatives. */
2854 for (this_alternative_number = 0;
2855 this_alternative_number < n_alternatives;
2856 this_alternative_number++)
2858 /* Loop over operands for one constraint alternative. */
2859 /* LOSERS counts those that don't fit this alternative
2860 and would require loading. */
2862 /* BAD is set to 1 if it some operand can't fit this alternative
2863 even after reloading. */
2865 /* REJECT is a count of how undesirable this alternative says it is
2866 if any reloading is required. If the alternative matches exactly
2867 then REJECT is ignored, but otherwise it gets this much
2868 counted against it in addition to the reloading needed. Each
2869 ? counts three times here since we want the disparaging caused by
2870 a bad register class to only count 1/3 as much. */
2873 this_earlyclobber = 0;
2875 for (i = 0; i < noperands; i++)
2877 char *p = constraints[i];
2882 /* 0 => this operand can be reloaded somehow for this alternative. */
2884 /* 0 => this operand can be reloaded if the alternative allows regs. */
2888 rtx operand = recog_data.operand[i];
2890 /* Nonzero means this is a MEM that must be reloaded into a reg
2891 regardless of what the constraint says. */
2892 int force_reload = 0;
2894 /* Nonzero if a constant forced into memory would be OK for this
2897 int earlyclobber = 0;
2899 /* If the predicate accepts a unary operator, it means that
2900 we need to reload the operand, but do not do this for
2901 match_operator and friends. */
2902 if (UNARY_P (operand) && *p != 0)
2903 operand = XEXP (operand, 0);
2905 /* If the operand is a SUBREG, extract
2906 the REG or MEM (or maybe even a constant) within.
2907 (Constants can occur as a result of reg_equiv_constant.) */
2909 while (GET_CODE (operand) == SUBREG)
2911 /* Offset only matters when operand is a REG and
2912 it is a hard reg. This is because it is passed
2913 to reg_fits_class_p if it is a REG and all pseudos
2914 return 0 from that function. */
2915 if (REG_P (SUBREG_REG (operand))
2916 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2918 if (!subreg_offset_representable_p
2919 (REGNO (SUBREG_REG (operand)),
2920 GET_MODE (SUBREG_REG (operand)),
2921 SUBREG_BYTE (operand),
2922 GET_MODE (operand)))
2924 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2925 GET_MODE (SUBREG_REG (operand)),
2926 SUBREG_BYTE (operand),
2927 GET_MODE (operand));
2929 operand = SUBREG_REG (operand);
2930 /* Force reload if this is a constant or PLUS or if there may
2931 be a problem accessing OPERAND in the outer mode. */
2932 if (CONSTANT_P (operand)
2933 || GET_CODE (operand) == PLUS
2934 /* We must force a reload of paradoxical SUBREGs
2935 of a MEM because the alignment of the inner value
2936 may not be enough to do the outer reference. On
2937 big-endian machines, it may also reference outside
2940 On machines that extend byte operations and we have a
2941 SUBREG where both the inner and outer modes are no wider
2942 than a word and the inner mode is narrower, is integral,
2943 and gets extended when loaded from memory, combine.c has
2944 made assumptions about the behavior of the machine in such
2945 register access. If the data is, in fact, in memory we
2946 must always load using the size assumed to be in the
2947 register and let the insn do the different-sized
2950 This is doubly true if WORD_REGISTER_OPERATIONS. In
2951 this case eliminate_regs has left non-paradoxical
2952 subregs for push_reload to see. Make sure it does
2953 by forcing the reload.
2955 ??? When is it right at this stage to have a subreg
2956 of a mem that is _not_ to be handled specially? IMO
2957 those should have been reduced to just a mem. */
2958 || ((MEM_P (operand)
2960 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2961 #ifndef WORD_REGISTER_OPERATIONS
2962 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2963 < BIGGEST_ALIGNMENT)
2964 && (GET_MODE_SIZE (operand_mode[i])
2965 > GET_MODE_SIZE (GET_MODE (operand))))
2967 #ifdef LOAD_EXTEND_OP
2968 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2969 && (GET_MODE_SIZE (GET_MODE (operand))
2971 && (GET_MODE_SIZE (operand_mode[i])
2972 > GET_MODE_SIZE (GET_MODE (operand)))
2973 && INTEGRAL_MODE_P (GET_MODE (operand))
2974 && LOAD_EXTEND_OP (GET_MODE (operand)) != UNKNOWN)
2983 this_alternative[i] = (int) NO_REGS;
2984 this_alternative_win[i] = 0;
2985 this_alternative_match_win[i] = 0;
2986 this_alternative_offmemok[i] = 0;
2987 this_alternative_earlyclobber[i] = 0;
2988 this_alternative_matches[i] = -1;
2990 /* An empty constraint or empty alternative
2991 allows anything which matched the pattern. */
2992 if (*p == 0 || *p == ',')
2995 /* Scan this alternative's specs for this operand;
2996 set WIN if the operand fits any letter in this alternative.
2997 Otherwise, clear BADOP if this operand could
2998 fit some letter after reloads,
2999 or set WINREG if this operand could fit after reloads
3000 provided the constraint allows some registers. */
3003 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
3012 case '=': case '+': case '*':
3016 /* We only support one commutative marker, the first
3017 one. We already set commutative above. */
3029 /* Ignore rest of this alternative as far as
3030 reloading is concerned. */
3033 while (*p && *p != ',');
3037 case '0': case '1': case '2': case '3': case '4':
3038 case '5': case '6': case '7': case '8': case '9':
3039 m = strtoul (p, &end, 10);
3043 this_alternative_matches[i] = m;
3044 /* We are supposed to match a previous operand.
3045 If we do, we win if that one did.
3046 If we do not, count both of the operands as losers.
3047 (This is too conservative, since most of the time
3048 only a single reload insn will be needed to make
3049 the two operands win. As a result, this alternative
3050 may be rejected when it is actually desirable.) */
3051 if ((swapped && (m != commutative || i != commutative + 1))
3052 /* If we are matching as if two operands were swapped,
3053 also pretend that operands_match had been computed
3055 But if I is the second of those and C is the first,
3056 don't exchange them, because operands_match is valid
3057 only on one side of its diagonal. */
3059 [(m == commutative || m == commutative + 1)
3060 ? 2 * commutative + 1 - m : m]
3061 [(i == commutative || i == commutative + 1)
3062 ? 2 * commutative + 1 - i : i])
3063 : operands_match[m][i])
3065 /* If we are matching a non-offsettable address where an
3066 offsettable address was expected, then we must reject
3067 this combination, because we can't reload it. */
3068 if (this_alternative_offmemok[m]
3069 && MEM_P (recog_data.operand[m])
3070 && this_alternative[m] == (int) NO_REGS
3071 && ! this_alternative_win[m])
3074 did_match = this_alternative_win[m];
3078 /* Operands don't match. */
3080 /* Retroactively mark the operand we had to match
3081 as a loser, if it wasn't already. */
3082 if (this_alternative_win[m])
3084 this_alternative_win[m] = 0;
3085 if (this_alternative[m] == (int) NO_REGS)
3087 /* But count the pair only once in the total badness of
3088 this alternative, if the pair can be a dummy reload. */
3090 = find_dummy_reload (recog_data.operand[i],
3091 recog_data.operand[m],
3092 recog_data.operand_loc[i],
3093 recog_data.operand_loc[m],
3094 operand_mode[i], operand_mode[m],
3095 this_alternative[m], -1,
3096 this_alternative_earlyclobber[m]);
3101 /* This can be fixed with reloads if the operand
3102 we are supposed to match can be fixed with reloads. */
3104 this_alternative[i] = this_alternative[m];
3106 /* If we have to reload this operand and some previous
3107 operand also had to match the same thing as this
3108 operand, we don't know how to do that. So reject this
3110 if (! did_match || force_reload)
3111 for (j = 0; j < i; j++)
3112 if (this_alternative_matches[j]
3113 == this_alternative_matches[i])
3118 /* All necessary reloads for an address_operand
3119 were handled in find_reloads_address. */
3120 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3130 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3131 && reg_renumber[REGNO (operand)] < 0))
3133 if (CONST_POOL_OK_P (operand))
3140 && ! address_reloaded[i]
3141 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3142 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3148 && ! address_reloaded[i]
3149 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3150 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3154 /* Memory operand whose address is not offsettable. */
3159 && ! (ind_levels ? offsettable_memref_p (operand)
3160 : offsettable_nonstrict_memref_p (operand))
3161 /* Certain mem addresses will become offsettable
3162 after they themselves are reloaded. This is important;
3163 we don't want our own handling of unoffsettables
3164 to override the handling of reg_equiv_address. */
3165 && !(REG_P (XEXP (operand, 0))
3167 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3171 /* Memory operand whose address is offsettable. */
3175 if ((MEM_P (operand)
3176 /* If IND_LEVELS, find_reloads_address won't reload a
3177 pseudo that didn't get a hard reg, so we have to
3178 reject that case. */
3179 && ((ind_levels ? offsettable_memref_p (operand)
3180 : offsettable_nonstrict_memref_p (operand))
3181 /* A reloaded address is offsettable because it is now
3182 just a simple register indirect. */
3183 || address_reloaded[i]))
3185 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3186 && reg_renumber[REGNO (operand)] < 0
3187 /* If reg_equiv_address is nonzero, we will be
3188 loading it into a register; hence it will be
3189 offsettable, but we cannot say that reg_equiv_mem
3190 is offsettable without checking. */
3191 && ((reg_equiv_mem[REGNO (operand)] != 0
3192 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3193 || (reg_equiv_address[REGNO (operand)] != 0))))
3195 if (CONST_POOL_OK_P (operand)
3203 /* Output operand that is stored before the need for the
3204 input operands (and their index registers) is over. */
3205 earlyclobber = 1, this_earlyclobber = 1;
3210 if (GET_CODE (operand) == CONST_DOUBLE
3211 || (GET_CODE (operand) == CONST_VECTOR
3212 && (GET_MODE_CLASS (GET_MODE (operand))
3213 == MODE_VECTOR_FLOAT)))
3219 if (GET_CODE (operand) == CONST_DOUBLE
3220 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3225 if (GET_CODE (operand) == CONST_INT
3226 || (GET_CODE (operand) == CONST_DOUBLE
3227 && GET_MODE (operand) == VOIDmode))
3230 if (CONSTANT_P (operand)
3231 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)))
3236 if (GET_CODE (operand) == CONST_INT
3237 || (GET_CODE (operand) == CONST_DOUBLE
3238 && GET_MODE (operand) == VOIDmode))
3250 if (GET_CODE (operand) == CONST_INT
3251 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3261 /* A PLUS is never a valid operand, but reload can make
3262 it from a register when eliminating registers. */
3263 && GET_CODE (operand) != PLUS
3264 /* A SCRATCH is not a valid operand. */
3265 && GET_CODE (operand) != SCRATCH
3266 && (! CONSTANT_P (operand)
3268 || LEGITIMATE_PIC_OPERAND_P (operand))
3269 && (GENERAL_REGS == ALL_REGS
3271 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3272 && reg_renumber[REGNO (operand)] < 0)))
3274 /* Drop through into 'r' case. */
3278 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3282 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3284 #ifdef EXTRA_CONSTRAINT_STR
3285 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3289 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3291 /* If the address was already reloaded,
3293 else if (MEM_P (operand)
3294 && address_reloaded[i])
3296 /* Likewise if the address will be reloaded because
3297 reg_equiv_address is nonzero. For reg_equiv_mem
3298 we have to check. */
3299 else if (REG_P (operand)
3300 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3301 && reg_renumber[REGNO (operand)] < 0
3302 && ((reg_equiv_mem[REGNO (operand)] != 0
3303 && EXTRA_CONSTRAINT_STR (reg_equiv_mem[REGNO (operand)], c, p))
3304 || (reg_equiv_address[REGNO (operand)] != 0)))
3307 /* If we didn't already win, we can reload
3308 constants via force_const_mem, and other
3309 MEMs by reloading the address like for 'o'. */
3310 if (CONST_POOL_OK_P (operand)
3317 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3319 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3322 /* If we didn't already win, we can reload
3323 the address into a base register. */
3324 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3329 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3336 = (int) (reg_class_subunion
3337 [this_alternative[i]]
3338 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3340 if (GET_MODE (operand) == BLKmode)
3344 && reg_fits_class_p (operand, this_alternative[i],
3345 offset, GET_MODE (recog_data.operand[i])))
3349 while ((p += len), c);
3353 /* If this operand could be handled with a reg,
3354 and some reg is allowed, then this operand can be handled. */
3355 if (winreg && this_alternative[i] != (int) NO_REGS)
3358 /* Record which operands fit this alternative. */
3359 this_alternative_earlyclobber[i] = earlyclobber;
3360 if (win && ! force_reload)
3361 this_alternative_win[i] = 1;
3362 else if (did_match && ! force_reload)
3363 this_alternative_match_win[i] = 1;
3366 int const_to_mem = 0;
3368 this_alternative_offmemok[i] = offmemok;
3372 /* Alternative loses if it has no regs for a reg operand. */
3374 && this_alternative[i] == (int) NO_REGS
3375 && this_alternative_matches[i] < 0)
3378 /* If this is a constant that is reloaded into the desired
3379 class by copying it to memory first, count that as another
3380 reload. This is consistent with other code and is
3381 required to avoid choosing another alternative when
3382 the constant is moved into memory by this function on
3383 an early reload pass. Note that the test here is
3384 precisely the same as in the code below that calls
3386 if (CONST_POOL_OK_P (operand)
3387 && ((PREFERRED_RELOAD_CLASS (operand,
3388 (enum reg_class) this_alternative[i])
3390 || no_input_reloads)
3391 && operand_mode[i] != VOIDmode)
3394 if (this_alternative[i] != (int) NO_REGS)
3398 /* If we can't reload this value at all, reject this
3399 alternative. Note that we could also lose due to
3400 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3403 if (! CONSTANT_P (operand)
3404 && (enum reg_class) this_alternative[i] != NO_REGS
3405 && (PREFERRED_RELOAD_CLASS (operand,
3406 (enum reg_class) this_alternative[i])
3410 /* Alternative loses if it requires a type of reload not
3411 permitted for this insn. We can always reload SCRATCH
3412 and objects with a REG_UNUSED note. */
3413 else if (GET_CODE (operand) != SCRATCH
3414 && modified[i] != RELOAD_READ && no_output_reloads
3415 && ! find_reg_note (insn, REG_UNUSED, operand))
3417 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3421 /* We prefer to reload pseudos over reloading other things,
3422 since such reloads may be able to be eliminated later.
3423 If we are reloading a SCRATCH, we won't be generating any
3424 insns, just using a register, so it is also preferred.
3425 So bump REJECT in other cases. Don't do this in the
3426 case where we are forcing a constant into memory and
3427 it will then win since we don't want to have a different
3428 alternative match then. */
3429 if (! (REG_P (operand)
3430 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3431 && GET_CODE (operand) != SCRATCH
3432 && ! (const_to_mem && constmemok))
3435 /* Input reloads can be inherited more often than output
3436 reloads can be removed, so penalize output reloads. */
3437 if (operand_type[i] != RELOAD_FOR_INPUT
3438 && GET_CODE (operand) != SCRATCH)
3442 /* If this operand is a pseudo register that didn't get a hard
3443 reg and this alternative accepts some register, see if the
3444 class that we want is a subset of the preferred class for this
3445 register. If not, but it intersects that class, use the
3446 preferred class instead. If it does not intersect the preferred
3447 class, show that usage of this alternative should be discouraged;
3448 it will be discouraged more still if the register is `preferred
3449 or nothing'. We do this because it increases the chance of
3450 reusing our spill register in a later insn and avoiding a pair
3451 of memory stores and loads.
3453 Don't bother with this if this alternative will accept this
3456 Don't do this for a multiword operand, since it is only a
3457 small win and has the risk of requiring more spill registers,
3458 which could cause a large loss.
3460 Don't do this if the preferred class has only one register
3461 because we might otherwise exhaust the class. */
3463 if (! win && ! did_match
3464 && this_alternative[i] != (int) NO_REGS
3465 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3466 && reg_class_size[(int) preferred_class[i]] > 1)
3468 if (! reg_class_subset_p (this_alternative[i],
3469 preferred_class[i]))
3471 /* Since we don't have a way of forming the intersection,
3472 we just do something special if the preferred class
3473 is a subset of the class we have; that's the most
3474 common case anyway. */
3475 if (reg_class_subset_p (preferred_class[i],
3476 this_alternative[i]))
3477 this_alternative[i] = (int) preferred_class[i];
3479 reject += (2 + 2 * pref_or_nothing[i]);
3484 /* Now see if any output operands that are marked "earlyclobber"
3485 in this alternative conflict with any input operands
3486 or any memory addresses. */
3488 for (i = 0; i < noperands; i++)
3489 if (this_alternative_earlyclobber[i]
3490 && (this_alternative_win[i] || this_alternative_match_win[i]))
3492 struct decomposition early_data;
3494 early_data = decompose (recog_data.operand[i]);
3496 if (modified[i] == RELOAD_READ)
3499 if (this_alternative[i] == NO_REGS)
3501 this_alternative_earlyclobber[i] = 0;
3502 if (this_insn_is_asm)
3503 error_for_asm (this_insn,
3504 "`&' constraint used with no register class");
3509 for (j = 0; j < noperands; j++)
3510 /* Is this an input operand or a memory ref? */
3511 if ((MEM_P (recog_data.operand[j])
3512 || modified[j] != RELOAD_WRITE)
3514 /* Ignore things like match_operator operands. */
3515 && *recog_data.constraints[j] != 0
3516 /* Don't count an input operand that is constrained to match
3517 the early clobber operand. */
3518 && ! (this_alternative_matches[j] == i
3519 && rtx_equal_p (recog_data.operand[i],
3520 recog_data.operand[j]))
3521 /* Is it altered by storing the earlyclobber operand? */
3522 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3525 /* If the output is in a single-reg class,
3526 it's costly to reload it, so reload the input instead. */
3527 if (reg_class_size[this_alternative[i]] == 1
3528 && (REG_P (recog_data.operand[j])
3529 || GET_CODE (recog_data.operand[j]) == SUBREG))
3532 this_alternative_win[j] = 0;
3533 this_alternative_match_win[j] = 0;
3538 /* If an earlyclobber operand conflicts with something,
3539 it must be reloaded, so request this and count the cost. */
3543 this_alternative_win[i] = 0;
3544 this_alternative_match_win[j] = 0;
3545 for (j = 0; j < noperands; j++)
3546 if (this_alternative_matches[j] == i
3547 && this_alternative_match_win[j])
3549 this_alternative_win[j] = 0;
3550 this_alternative_match_win[j] = 0;
3556 /* If one alternative accepts all the operands, no reload required,
3557 choose that alternative; don't consider the remaining ones. */
3560 /* Unswap these so that they are never swapped at `finish'. */
3561 if (commutative >= 0)
3563 recog_data.operand[commutative] = substed_operand[commutative];
3564 recog_data.operand[commutative + 1]
3565 = substed_operand[commutative + 1];
3567 for (i = 0; i < noperands; i++)
3569 goal_alternative_win[i] = this_alternative_win[i];
3570 goal_alternative_match_win[i] = this_alternative_match_win[i];
3571 goal_alternative[i] = this_alternative[i];
3572 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3573 goal_alternative_matches[i] = this_alternative_matches[i];
3574 goal_alternative_earlyclobber[i]
3575 = this_alternative_earlyclobber[i];
3577 goal_alternative_number = this_alternative_number;
3578 goal_alternative_swapped = swapped;
3579 goal_earlyclobber = this_earlyclobber;
3583 /* REJECT, set by the ! and ? constraint characters and when a register
3584 would be reloaded into a non-preferred class, discourages the use of
3585 this alternative for a reload goal. REJECT is incremented by six
3586 for each ? and two for each non-preferred class. */
3587 losers = losers * 6 + reject;
3589 /* If this alternative can be made to work by reloading,
3590 and it needs less reloading than the others checked so far,
3591 record it as the chosen goal for reloading. */
3592 if (! bad && best > losers)
3594 for (i = 0; i < noperands; i++)
3596 goal_alternative[i] = this_alternative[i];
3597 goal_alternative_win[i] = this_alternative_win[i];
3598 goal_alternative_match_win[i] = this_alternative_match_win[i];
3599 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3600 goal_alternative_matches[i] = this_alternative_matches[i];
3601 goal_alternative_earlyclobber[i]
3602 = this_alternative_earlyclobber[i];
3604 goal_alternative_swapped = swapped;
3606 goal_alternative_number = this_alternative_number;
3607 goal_earlyclobber = this_earlyclobber;
3611 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3612 then we need to try each alternative twice,
3613 the second time matching those two operands
3614 as if we had exchanged them.
3615 To do this, really exchange them in operands.
3617 If we have just tried the alternatives the second time,
3618 return operands to normal and drop through. */
3620 if (commutative >= 0)
3625 enum reg_class tclass;
3628 recog_data.operand[commutative] = substed_operand[commutative + 1];
3629 recog_data.operand[commutative + 1] = substed_operand[commutative];
3630 /* Swap the duplicates too. */
3631 for (i = 0; i < recog_data.n_dups; i++)
3632 if (recog_data.dup_num[i] == commutative
3633 || recog_data.dup_num[i] == commutative + 1)
3634 *recog_data.dup_loc[i]
3635 = recog_data.operand[(int) recog_data.dup_num[i]];
3637 tclass = preferred_class[commutative];
3638 preferred_class[commutative] = preferred_class[commutative + 1];
3639 preferred_class[commutative + 1] = tclass;
3641 t = pref_or_nothing[commutative];
3642 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3643 pref_or_nothing[commutative + 1] = t;
3645 memcpy (constraints, recog_data.constraints,
3646 noperands * sizeof (char *));
3651 recog_data.operand[commutative] = substed_operand[commutative];
3652 recog_data.operand[commutative + 1]
3653 = substed_operand[commutative + 1];
3654 /* Unswap the duplicates too. */
3655 for (i = 0; i < recog_data.n_dups; i++)
3656 if (recog_data.dup_num[i] == commutative
3657 || recog_data.dup_num[i] == commutative + 1)
3658 *recog_data.dup_loc[i]
3659 = recog_data.operand[(int) recog_data.dup_num[i]];
3663 /* The operands don't meet the constraints.
3664 goal_alternative describes the alternative
3665 that we could reach by reloading the fewest operands.
3666 Reload so as to fit it. */
3668 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3670 /* No alternative works with reloads?? */
3671 if (insn_code_number >= 0)
3672 fatal_insn ("unable to generate reloads for:", insn);
3673 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3674 /* Avoid further trouble with this insn. */
3675 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3680 /* Jump to `finish' from above if all operands are valid already.
3681 In that case, goal_alternative_win is all 1. */
3684 /* Right now, for any pair of operands I and J that are required to match,
3686 goal_alternative_matches[J] is I.
3687 Set up goal_alternative_matched as the inverse function:
3688 goal_alternative_matched[I] = J. */
3690 for (i = 0; i < noperands; i++)
3691 goal_alternative_matched[i] = -1;
3693 for (i = 0; i < noperands; i++)
3694 if (! goal_alternative_win[i]
3695 && goal_alternative_matches[i] >= 0)
3696 goal_alternative_matched[goal_alternative_matches[i]] = i;
3698 for (i = 0; i < noperands; i++)
3699 goal_alternative_win[i] |= goal_alternative_match_win[i];
3701 /* If the best alternative is with operands 1 and 2 swapped,
3702 consider them swapped before reporting the reloads. Update the
3703 operand numbers of any reloads already pushed. */
3705 if (goal_alternative_swapped)
3709 tem = substed_operand[commutative];
3710 substed_operand[commutative] = substed_operand[commutative + 1];
3711 substed_operand[commutative + 1] = tem;
3712 tem = recog_data.operand[commutative];
3713 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3714 recog_data.operand[commutative + 1] = tem;
3715 tem = *recog_data.operand_loc[commutative];
3716 *recog_data.operand_loc[commutative]
3717 = *recog_data.operand_loc[commutative + 1];
3718 *recog_data.operand_loc[commutative + 1] = tem;
3720 for (i = 0; i < n_reloads; i++)
3722 if (rld[i].opnum == commutative)
3723 rld[i].opnum = commutative + 1;
3724 else if (rld[i].opnum == commutative + 1)
3725 rld[i].opnum = commutative;
3729 for (i = 0; i < noperands; i++)
3731 operand_reloadnum[i] = -1;
3733 /* If this is an earlyclobber operand, we need to widen the scope.
3734 The reload must remain valid from the start of the insn being
3735 reloaded until after the operand is stored into its destination.
3736 We approximate this with RELOAD_OTHER even though we know that we
3737 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3739 One special case that is worth checking is when we have an
3740 output that is earlyclobber but isn't used past the insn (typically
3741 a SCRATCH). In this case, we only need have the reload live
3742 through the insn itself, but not for any of our input or output
3744 But we must not accidentally narrow the scope of an existing
3745 RELOAD_OTHER reload - leave these alone.
3747 In any case, anything needed to address this operand can remain
3748 however they were previously categorized. */
3750 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3752 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3753 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3756 /* Any constants that aren't allowed and can't be reloaded
3757 into registers are here changed into memory references. */
3758 for (i = 0; i < noperands; i++)
3759 if (! goal_alternative_win[i]
3760 && CONST_POOL_OK_P (recog_data.operand[i])
3761 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3762 (enum reg_class) goal_alternative[i])
3764 || no_input_reloads)
3765 && operand_mode[i] != VOIDmode)
3767 substed_operand[i] = recog_data.operand[i]
3768 = find_reloads_toplev (force_const_mem (operand_mode[i],
3769 recog_data.operand[i]),
3770 i, address_type[i], ind_levels, 0, insn,
3772 if (alternative_allows_memconst (recog_data.constraints[i],
3773 goal_alternative_number))
3774 goal_alternative_win[i] = 1;
3777 /* Record the values of the earlyclobber operands for the caller. */
3778 if (goal_earlyclobber)
3779 for (i = 0; i < noperands; i++)
3780 if (goal_alternative_earlyclobber[i])
3781 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3783 /* Now record reloads for all the operands that need them. */
3784 for (i = 0; i < noperands; i++)
3785 if (! goal_alternative_win[i])
3787 /* Operands that match previous ones have already been handled. */
3788 if (goal_alternative_matches[i] >= 0)
3790 /* Handle an operand with a nonoffsettable address
3791 appearing where an offsettable address will do
3792 by reloading the address into a base register.
3794 ??? We can also do this when the operand is a register and
3795 reg_equiv_mem is not offsettable, but this is a bit tricky,
3796 so we don't bother with it. It may not be worth doing. */
3797 else if (goal_alternative_matched[i] == -1
3798 && goal_alternative_offmemok[i]
3799 && MEM_P (recog_data.operand[i]))
3801 operand_reloadnum[i]
3802 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3803 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3804 MODE_BASE_REG_CLASS (VOIDmode),
3805 GET_MODE (XEXP (recog_data.operand[i], 0)),
3806 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3807 rld[operand_reloadnum[i]].inc
3808 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3810 /* If this operand is an output, we will have made any
3811 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3812 now we are treating part of the operand as an input, so
3813 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3815 if (modified[i] == RELOAD_WRITE)
3817 for (j = 0; j < n_reloads; j++)
3819 if (rld[j].opnum == i)
3821 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3822 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3823 else if (rld[j].when_needed
3824 == RELOAD_FOR_OUTADDR_ADDRESS)
3825 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3830 else if (goal_alternative_matched[i] == -1)
3832 operand_reloadnum[i]
3833 = push_reload ((modified[i] != RELOAD_WRITE
3834 ? recog_data.operand[i] : 0),
3835 (modified[i] != RELOAD_READ
3836 ? recog_data.operand[i] : 0),
3837 (modified[i] != RELOAD_WRITE
3838 ? recog_data.operand_loc[i] : 0),
3839 (modified[i] != RELOAD_READ
3840 ? recog_data.operand_loc[i] : 0),
3841 (enum reg_class) goal_alternative[i],
3842 (modified[i] == RELOAD_WRITE
3843 ? VOIDmode : operand_mode[i]),
3844 (modified[i] == RELOAD_READ
3845 ? VOIDmode : operand_mode[i]),
3846 (insn_code_number < 0 ? 0
3847 : insn_data[insn_code_number].operand[i].strict_low),
3848 0, i, operand_type[i]);
3850 /* In a matching pair of operands, one must be input only
3851 and the other must be output only.
3852 Pass the input operand as IN and the other as OUT. */
3853 else if (modified[i] == RELOAD_READ
3854 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3856 operand_reloadnum[i]
3857 = push_reload (recog_data.operand[i],
3858 recog_data.operand[goal_alternative_matched[i]],
3859 recog_data.operand_loc[i],
3860 recog_data.operand_loc[goal_alternative_matched[i]],
3861 (enum reg_class) goal_alternative[i],
3863 operand_mode[goal_alternative_matched[i]],
3864 0, 0, i, RELOAD_OTHER);
3865 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3867 else if (modified[i] == RELOAD_WRITE
3868 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3870 operand_reloadnum[goal_alternative_matched[i]]
3871 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3872 recog_data.operand[i],
3873 recog_data.operand_loc[goal_alternative_matched[i]],
3874 recog_data.operand_loc[i],
3875 (enum reg_class) goal_alternative[i],
3876 operand_mode[goal_alternative_matched[i]],
3878 0, 0, i, RELOAD_OTHER);
3879 operand_reloadnum[i] = output_reloadnum;
3881 else if (insn_code_number >= 0)
3885 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3886 /* Avoid further trouble with this insn. */
3887 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3892 else if (goal_alternative_matched[i] < 0
3893 && goal_alternative_matches[i] < 0
3894 && !address_operand_reloaded[i]
3897 /* For each non-matching operand that's a MEM or a pseudo-register
3898 that didn't get a hard register, make an optional reload.
3899 This may get done even if the insn needs no reloads otherwise. */
3901 rtx operand = recog_data.operand[i];
3903 while (GET_CODE (operand) == SUBREG)
3904 operand = SUBREG_REG (operand);
3905 if ((MEM_P (operand)
3907 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3908 /* If this is only for an output, the optional reload would not
3909 actually cause us to use a register now, just note that
3910 something is stored here. */
3911 && ((enum reg_class) goal_alternative[i] != NO_REGS
3912 || modified[i] == RELOAD_WRITE)
3913 && ! no_input_reloads
3914 /* An optional output reload might allow to delete INSN later.
3915 We mustn't make in-out reloads on insns that are not permitted
3917 If this is an asm, we can't delete it; we must not even call
3918 push_reload for an optional output reload in this case,
3919 because we can't be sure that the constraint allows a register,
3920 and push_reload verifies the constraints for asms. */
3921 && (modified[i] == RELOAD_READ
3922 || (! no_output_reloads && ! this_insn_is_asm)))
3923 operand_reloadnum[i]
3924 = push_reload ((modified[i] != RELOAD_WRITE
3925 ? recog_data.operand[i] : 0),
3926 (modified[i] != RELOAD_READ
3927 ? recog_data.operand[i] : 0),
3928 (modified[i] != RELOAD_WRITE
3929 ? recog_data.operand_loc[i] : 0),
3930 (modified[i] != RELOAD_READ
3931 ? recog_data.operand_loc[i] : 0),
3932 (enum reg_class) goal_alternative[i],
3933 (modified[i] == RELOAD_WRITE
3934 ? VOIDmode : operand_mode[i]),
3935 (modified[i] == RELOAD_READ
3936 ? VOIDmode : operand_mode[i]),
3937 (insn_code_number < 0 ? 0
3938 : insn_data[insn_code_number].operand[i].strict_low),
3939 1, i, operand_type[i]);
3940 /* If a memory reference remains (either as a MEM or a pseudo that
3941 did not get a hard register), yet we can't make an optional
3942 reload, check if this is actually a pseudo register reference;
3943 we then need to emit a USE and/or a CLOBBER so that reload
3944 inheritance will do the right thing. */
3948 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3949 && reg_renumber [REGNO (operand)] < 0)))
3951 operand = *recog_data.operand_loc[i];
3953 while (GET_CODE (operand) == SUBREG)
3954 operand = SUBREG_REG (operand);
3955 if (REG_P (operand))
3957 if (modified[i] != RELOAD_WRITE)
3958 /* We mark the USE with QImode so that we recognize
3959 it as one that can be safely deleted at the end
3961 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
3963 if (modified[i] != RELOAD_READ)
3964 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3968 else if (goal_alternative_matches[i] >= 0
3969 && goal_alternative_win[goal_alternative_matches[i]]
3970 && modified[i] == RELOAD_READ
3971 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3972 && ! no_input_reloads && ! no_output_reloads
3975 /* Similarly, make an optional reload for a pair of matching
3976 objects that are in MEM or a pseudo that didn't get a hard reg. */
3978 rtx operand = recog_data.operand[i];
3980 while (GET_CODE (operand) == SUBREG)
3981 operand = SUBREG_REG (operand);
3982 if ((MEM_P (operand)
3984 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3985 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3987 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3988 = push_reload (recog_data.operand[goal_alternative_matches[i]],
3989 recog_data.operand[i],
3990 recog_data.operand_loc[goal_alternative_matches[i]],
3991 recog_data.operand_loc[i],
3992 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3993 operand_mode[goal_alternative_matches[i]],
3995 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3998 /* Perform whatever substitutions on the operands we are supposed
3999 to make due to commutativity or replacement of registers
4000 with equivalent constants or memory slots. */
4002 for (i = 0; i < noperands; i++)
4004 /* We only do this on the last pass through reload, because it is
4005 possible for some data (like reg_equiv_address) to be changed during
4006 later passes. Moreover, we loose the opportunity to get a useful
4007 reload_{in,out}_reg when we do these replacements. */
4011 rtx substitution = substed_operand[i];
4013 *recog_data.operand_loc[i] = substitution;
4015 /* If we're replacing an operand with a LABEL_REF, we need
4016 to make sure that there's a REG_LABEL note attached to
4017 this instruction. */
4019 && GET_CODE (substitution) == LABEL_REF
4020 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
4021 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
4022 XEXP (substitution, 0),
4026 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4029 /* If this insn pattern contains any MATCH_DUP's, make sure that
4030 they will be substituted if the operands they match are substituted.
4031 Also do now any substitutions we already did on the operands.
4033 Don't do this if we aren't making replacements because we might be
4034 propagating things allocated by frame pointer elimination into places
4035 it doesn't expect. */
4037 if (insn_code_number >= 0 && replace)
4038 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4040 int opno = recog_data.dup_num[i];
4041 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4042 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4046 /* This loses because reloading of prior insns can invalidate the equivalence
4047 (or at least find_equiv_reg isn't smart enough to find it any more),
4048 causing this insn to need more reload regs than it needed before.
4049 It may be too late to make the reload regs available.
4050 Now this optimization is done safely in choose_reload_regs. */
4052 /* For each reload of a reg into some other class of reg,
4053 search for an existing equivalent reg (same value now) in the right class.
4054 We can use it as long as we don't need to change its contents. */
4055 for (i = 0; i < n_reloads; i++)
4056 if (rld[i].reg_rtx == 0
4058 && REG_P (rld[i].in)
4062 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
4063 static_reload_reg_p, 0, rld[i].inmode);
4064 /* Prevent generation of insn to load the value
4065 because the one we found already has the value. */
4067 rld[i].in = rld[i].reg_rtx;
4071 /* Perhaps an output reload can be combined with another
4072 to reduce needs by one. */
4073 if (!goal_earlyclobber)
4076 /* If we have a pair of reloads for parts of an address, they are reloading
4077 the same object, the operands themselves were not reloaded, and they
4078 are for two operands that are supposed to match, merge the reloads and
4079 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4081 for (i = 0; i < n_reloads; i++)
4085 for (j = i + 1; j < n_reloads; j++)
4086 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4087 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4088 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4089 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4090 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4091 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4092 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4093 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4094 && rtx_equal_p (rld[i].in, rld[j].in)
4095 && (operand_reloadnum[rld[i].opnum] < 0
4096 || rld[operand_reloadnum[rld[i].opnum]].optional)
4097 && (operand_reloadnum[rld[j].opnum] < 0
4098 || rld[operand_reloadnum[rld[j].opnum]].optional)
4099 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4100 || (goal_alternative_matches[rld[j].opnum]
4103 for (k = 0; k < n_replacements; k++)
4104 if (replacements[k].what == j)
4105 replacements[k].what = i;
4107 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4108 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4109 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4111 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4116 /* Scan all the reloads and update their type.
4117 If a reload is for the address of an operand and we didn't reload
4118 that operand, change the type. Similarly, change the operand number
4119 of a reload when two operands match. If a reload is optional, treat it
4120 as though the operand isn't reloaded.
4122 ??? This latter case is somewhat odd because if we do the optional
4123 reload, it means the object is hanging around. Thus we need only
4124 do the address reload if the optional reload was NOT done.
4126 Change secondary reloads to be the address type of their operand, not
4129 If an operand's reload is now RELOAD_OTHER, change any
4130 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4131 RELOAD_FOR_OTHER_ADDRESS. */
4133 for (i = 0; i < n_reloads; i++)
4135 if (rld[i].secondary_p
4136 && rld[i].when_needed == operand_type[rld[i].opnum])
4137 rld[i].when_needed = address_type[rld[i].opnum];
4139 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4140 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4141 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4142 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4143 && (operand_reloadnum[rld[i].opnum] < 0
4144 || rld[operand_reloadnum[rld[i].opnum]].optional))
4146 /* If we have a secondary reload to go along with this reload,
4147 change its type to RELOAD_FOR_OPADDR_ADDR. */
4149 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4150 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4151 && rld[i].secondary_in_reload != -1)
4153 int secondary_in_reload = rld[i].secondary_in_reload;
4155 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4157 /* If there's a tertiary reload we have to change it also. */
4158 if (secondary_in_reload > 0
4159 && rld[secondary_in_reload].secondary_in_reload != -1)
4160 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4161 = RELOAD_FOR_OPADDR_ADDR;
4164 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4165 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4166 && rld[i].secondary_out_reload != -1)
4168 int secondary_out_reload = rld[i].secondary_out_reload;
4170 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4172 /* If there's a tertiary reload we have to change it also. */
4173 if (secondary_out_reload
4174 && rld[secondary_out_reload].secondary_out_reload != -1)
4175 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4176 = RELOAD_FOR_OPADDR_ADDR;
4179 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4180 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4181 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4183 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4186 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4187 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4188 && operand_reloadnum[rld[i].opnum] >= 0
4189 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4191 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4193 if (goal_alternative_matches[rld[i].opnum] >= 0)
4194 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4197 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4198 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4199 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4201 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4202 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4203 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4204 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4205 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4206 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4207 This is complicated by the fact that a single operand can have more
4208 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4209 choose_reload_regs without affecting code quality, and cases that
4210 actually fail are extremely rare, so it turns out to be better to fix
4211 the problem here by not generating cases that choose_reload_regs will
4213 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4214 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4216 We can reduce the register pressure by exploiting that a
4217 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4218 does not conflict with any of them, if it is only used for the first of
4219 the RELOAD_FOR_X_ADDRESS reloads. */
4221 int first_op_addr_num = -2;
4222 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4223 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4224 int need_change = 0;
4225 /* We use last_op_addr_reload and the contents of the above arrays
4226 first as flags - -2 means no instance encountered, -1 means exactly
4227 one instance encountered.
4228 If more than one instance has been encountered, we store the reload
4229 number of the first reload of the kind in question; reload numbers
4230 are known to be non-negative. */
4231 for (i = 0; i < noperands; i++)
4232 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4233 for (i = n_reloads - 1; i >= 0; i--)
4235 switch (rld[i].when_needed)
4237 case RELOAD_FOR_OPERAND_ADDRESS:
4238 if (++first_op_addr_num >= 0)
4240 first_op_addr_num = i;
4244 case RELOAD_FOR_INPUT_ADDRESS:
4245 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4247 first_inpaddr_num[rld[i].opnum] = i;
4251 case RELOAD_FOR_OUTPUT_ADDRESS:
4252 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4254 first_outpaddr_num[rld[i].opnum] = i;
4265 for (i = 0; i < n_reloads; i++)
4268 enum reload_type type;
4270 switch (rld[i].when_needed)
4272 case RELOAD_FOR_OPADDR_ADDR:
4273 first_num = first_op_addr_num;
4274 type = RELOAD_FOR_OPERAND_ADDRESS;
4276 case RELOAD_FOR_INPADDR_ADDRESS:
4277 first_num = first_inpaddr_num[rld[i].opnum];
4278 type = RELOAD_FOR_INPUT_ADDRESS;
4280 case RELOAD_FOR_OUTADDR_ADDRESS:
4281 first_num = first_outpaddr_num[rld[i].opnum];
4282 type = RELOAD_FOR_OUTPUT_ADDRESS;
4289 else if (i > first_num)
4290 rld[i].when_needed = type;
4293 /* Check if the only TYPE reload that uses reload I is
4294 reload FIRST_NUM. */
4295 for (j = n_reloads - 1; j > first_num; j--)
4297 if (rld[j].when_needed == type
4298 && (rld[i].secondary_p
4299 ? rld[j].secondary_in_reload == i
4300 : reg_mentioned_p (rld[i].in, rld[j].in)))
4302 rld[i].when_needed = type;
4311 /* See if we have any reloads that are now allowed to be merged
4312 because we've changed when the reload is needed to
4313 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4314 check for the most common cases. */
4316 for (i = 0; i < n_reloads; i++)
4317 if (rld[i].in != 0 && rld[i].out == 0
4318 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4319 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4320 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4321 for (j = 0; j < n_reloads; j++)
4322 if (i != j && rld[j].in != 0 && rld[j].out == 0
4323 && rld[j].when_needed == rld[i].when_needed
4324 && MATCHES (rld[i].in, rld[j].in)
4325 && rld[i].class == rld[j].class
4326 && !rld[i].nocombine && !rld[j].nocombine
4327 && rld[i].reg_rtx == rld[j].reg_rtx)
4329 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4330 transfer_replacements (i, j);
4335 /* If we made any reloads for addresses, see if they violate a
4336 "no input reloads" requirement for this insn. But loads that we
4337 do after the insn (such as for output addresses) are fine. */
4338 if (no_input_reloads)
4339 for (i = 0; i < n_reloads; i++)
4341 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
4342 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS)
4346 /* Compute reload_mode and reload_nregs. */
4347 for (i = 0; i < n_reloads; i++)
4350 = (rld[i].inmode == VOIDmode
4351 || (GET_MODE_SIZE (rld[i].outmode)
4352 > GET_MODE_SIZE (rld[i].inmode)))
4353 ? rld[i].outmode : rld[i].inmode;
4355 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4358 /* Special case a simple move with an input reload and a
4359 destination of a hard reg, if the hard reg is ok, use it. */
4360 for (i = 0; i < n_reloads; i++)
4361 if (rld[i].when_needed == RELOAD_FOR_INPUT
4362 && GET_CODE (PATTERN (insn)) == SET
4363 && REG_P (SET_DEST (PATTERN (insn)))
4364 && SET_SRC (PATTERN (insn)) == rld[i].in)
4366 rtx dest = SET_DEST (PATTERN (insn));
4367 unsigned int regno = REGNO (dest);
4369 if (regno < FIRST_PSEUDO_REGISTER
4370 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4371 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4373 int nr = hard_regno_nregs[regno][rld[i].mode];
4376 for (nri = 1; nri < nr; nri ++)
4377 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno + nri))
4381 rld[i].reg_rtx = dest;
4388 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4389 accepts a memory operand with constant address. */
4392 alternative_allows_memconst (const char *constraint, int altnum)
4395 /* Skip alternatives before the one requested. */
4398 while (*constraint++ != ',');
4401 /* Scan the requested alternative for 'm' or 'o'.
4402 If one of them is present, this alternative accepts memory constants. */
4403 for (; (c = *constraint) && c != ',' && c != '#';
4404 constraint += CONSTRAINT_LEN (c, constraint))
4405 if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c, constraint))
4410 /* Scan X for memory references and scan the addresses for reloading.
4411 Also checks for references to "constant" regs that we want to eliminate
4412 and replaces them with the values they stand for.
4413 We may alter X destructively if it contains a reference to such.
4414 If X is just a constant reg, we return the equivalent value
4417 IND_LEVELS says how many levels of indirect addressing this machine
4420 OPNUM and TYPE identify the purpose of the reload.
4422 IS_SET_DEST is true if X is the destination of a SET, which is not
4423 appropriate to be replaced by a constant.
4425 INSN, if nonzero, is the insn in which we do the reload. It is used
4426 to determine if we may generate output reloads, and where to put USEs
4427 for pseudos that we have to replace with stack slots.
4429 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4430 result of find_reloads_address. */
4433 find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4434 int ind_levels, int is_set_dest, rtx insn,
4435 int *address_reloaded)
4437 RTX_CODE code = GET_CODE (x);
4439 const char *fmt = GET_RTX_FORMAT (code);
4445 /* This code is duplicated for speed in find_reloads. */
4446 int regno = REGNO (x);
4447 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4448 x = reg_equiv_constant[regno];
4450 /* This creates (subreg (mem...)) which would cause an unnecessary
4451 reload of the mem. */
4452 else if (reg_equiv_mem[regno] != 0)
4453 x = reg_equiv_mem[regno];
4455 else if (reg_equiv_memory_loc[regno]
4456 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4458 rtx mem = make_memloc (x, regno);
4459 if (reg_equiv_address[regno]
4460 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4462 /* If this is not a toplevel operand, find_reloads doesn't see
4463 this substitution. We have to emit a USE of the pseudo so
4464 that delete_output_reload can see it. */
4465 if (replace_reloads && recog_data.operand[opnum] != x)
4466 /* We mark the USE with QImode so that we recognize it
4467 as one that can be safely deleted at the end of
4469 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4472 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4473 opnum, type, ind_levels, insn);
4474 if (address_reloaded)
4475 *address_reloaded = i;
4484 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4485 opnum, type, ind_levels, insn);
4486 if (address_reloaded)
4487 *address_reloaded = i;
4492 if (code == SUBREG && REG_P (SUBREG_REG (x)))
4494 /* Check for SUBREG containing a REG that's equivalent to a constant.
4495 If the constant has a known value, truncate it right now.
4496 Similarly if we are extracting a single-word of a multi-word
4497 constant. If the constant is symbolic, allow it to be substituted
4498 normally. push_reload will strip the subreg later. If the
4499 constant is VOIDmode, abort because we will lose the mode of
4500 the register (this should never happen because one of the cases
4501 above should handle it). */
4503 int regno = REGNO (SUBREG_REG (x));
4506 if (subreg_lowpart_p (x)
4507 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4508 && reg_equiv_constant[regno] != 0
4509 && (tem = gen_lowpart_common (GET_MODE (x),
4510 reg_equiv_constant[regno])) != 0)
4513 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4514 && reg_equiv_constant[regno] != 0)
4517 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4518 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4524 /* If the subreg contains a reg that will be converted to a mem,
4525 convert the subreg to a narrower memref now.
4526 Otherwise, we would get (subreg (mem ...) ...),
4527 which would force reload of the mem.
4529 We also need to do this if there is an equivalent MEM that is
4530 not offsettable. In that case, alter_subreg would produce an
4531 invalid address on big-endian machines.
4533 For machines that extend byte loads, we must not reload using
4534 a wider mode if we have a paradoxical SUBREG. find_reloads will
4535 force a reload in that case. So we should not do anything here. */
4537 else if (regno >= FIRST_PSEUDO_REGISTER
4538 #ifdef LOAD_EXTEND_OP
4539 && (GET_MODE_SIZE (GET_MODE (x))
4540 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4542 && (reg_equiv_address[regno] != 0
4543 || (reg_equiv_mem[regno] != 0
4544 && (! strict_memory_address_p (GET_MODE (x),
4545 XEXP (reg_equiv_mem[regno], 0))
4546 || ! offsettable_memref_p (reg_equiv_mem[regno])
4547 || num_not_at_initial_offset))))
4548 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4552 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4556 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4557 ind_levels, is_set_dest, insn,
4559 /* If we have replaced a reg with it's equivalent memory loc -
4560 that can still be handled here e.g. if it's in a paradoxical
4561 subreg - we must make the change in a copy, rather than using
4562 a destructive change. This way, find_reloads can still elect
4563 not to do the change. */
4564 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4566 x = shallow_copy_rtx (x);
4569 XEXP (x, i) = new_part;
4575 /* Return a mem ref for the memory equivalent of reg REGNO.
4576 This mem ref is not shared with anything. */
4579 make_memloc (rtx ad, int regno)
4581 /* We must rerun eliminate_regs, in case the elimination
4582 offsets have changed. */
4584 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4586 /* If TEM might contain a pseudo, we must copy it to avoid
4587 modifying it when we do the substitution for the reload. */
4588 if (rtx_varies_p (tem, 0))
4589 tem = copy_rtx (tem);
4591 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4592 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4594 /* Copy the result if it's still the same as the equivalence, to avoid
4595 modifying it when we do the substitution for the reload. */
4596 if (tem == reg_equiv_memory_loc[regno])
4597 tem = copy_rtx (tem);
4601 /* Returns true if AD could be turned into a valid memory reference
4602 to mode MODE by reloading the part pointed to by PART into a
4606 maybe_memory_address_p (enum machine_mode mode, rtx ad, rtx *part)
4610 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4613 retv = memory_address_p (mode, ad);
4619 /* Record all reloads needed for handling memory address AD
4620 which appears in *LOC in a memory reference to mode MODE
4621 which itself is found in location *MEMREFLOC.
4622 Note that we take shortcuts assuming that no multi-reg machine mode
4623 occurs as part of an address.
4625 OPNUM and TYPE specify the purpose of this reload.
4627 IND_LEVELS says how many levels of indirect addressing this machine
4630 INSN, if nonzero, is the insn in which we do the reload. It is used
4631 to determine if we may generate output reloads, and where to put USEs
4632 for pseudos that we have to replace with stack slots.
4634 Value is nonzero if this address is reloaded or replaced as a whole.
4635 This is interesting to the caller if the address is an autoincrement.
4637 Note that there is no verification that the address will be valid after
4638 this routine does its work. Instead, we rely on the fact that the address
4639 was valid when reload started. So we need only undo things that reload
4640 could have broken. These are wrong register types, pseudos not allocated
4641 to a hard register, and frame pointer elimination. */
4644 find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4645 rtx *loc, int opnum, enum reload_type type,
4646 int ind_levels, rtx insn)
4649 int removed_and = 0;
4653 /* If the address is a register, see if it is a legitimate address and
4654 reload if not. We first handle the cases where we need not reload
4655 or where we must reload in a non-standard way. */
4661 /* If the register is equivalent to an invariant expression, substitute
4662 the invariant, and eliminate any eliminable register references. */
4663 tem = reg_equiv_constant[regno];
4665 && (tem = eliminate_regs (tem, mode, insn))
4666 && strict_memory_address_p (mode, tem))
4672 tem = reg_equiv_memory_loc[regno];
4675 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4677 tem = make_memloc (ad, regno);
4678 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4680 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4681 &XEXP (tem, 0), opnum,
4682 ADDR_TYPE (type), ind_levels, insn);
4684 /* We can avoid a reload if the register's equivalent memory
4685 expression is valid as an indirect memory address.
4686 But not all addresses are valid in a mem used as an indirect
4687 address: only reg or reg+constant. */
4690 && strict_memory_address_p (mode, tem)
4691 && (REG_P (XEXP (tem, 0))
4692 || (GET_CODE (XEXP (tem, 0)) == PLUS
4693 && REG_P (XEXP (XEXP (tem, 0), 0))
4694 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4696 /* TEM is not the same as what we'll be replacing the
4697 pseudo with after reload, put a USE in front of INSN
4698 in the final reload pass. */
4700 && num_not_at_initial_offset
4701 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4704 /* We mark the USE with QImode so that we
4705 recognize it as one that can be safely
4706 deleted at the end of reload. */
4707 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4710 /* This doesn't really count as replacing the address
4711 as a whole, since it is still a memory access. */
4719 /* The only remaining case where we can avoid a reload is if this is a
4720 hard register that is valid as a base register and which is not the
4721 subject of a CLOBBER in this insn. */
4723 else if (regno < FIRST_PSEUDO_REGISTER
4724 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4725 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4728 /* If we do not have one of the cases above, we must do the reload. */
4729 push_reload (ad, NULL_RTX, loc, (rtx*) 0, MODE_BASE_REG_CLASS (mode),
4730 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4734 if (strict_memory_address_p (mode, ad))
4736 /* The address appears valid, so reloads are not needed.
4737 But the address may contain an eliminable register.
4738 This can happen because a machine with indirect addressing
4739 may consider a pseudo register by itself a valid address even when
4740 it has failed to get a hard reg.
4741 So do a tree-walk to find and eliminate all such regs. */
4743 /* But first quickly dispose of a common case. */
4744 if (GET_CODE (ad) == PLUS
4745 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4746 && REG_P (XEXP (ad, 0))
4747 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4750 subst_reg_equivs_changed = 0;
4751 *loc = subst_reg_equivs (ad, insn);
4753 if (! subst_reg_equivs_changed)
4756 /* Check result for validity after substitution. */
4757 if (strict_memory_address_p (mode, ad))
4761 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4766 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4771 *memrefloc = copy_rtx (*memrefloc);
4772 XEXP (*memrefloc, 0) = ad;
4773 move_replacements (&ad, &XEXP (*memrefloc, 0));
4779 /* The address is not valid. We have to figure out why. First see if
4780 we have an outer AND and remove it if so. Then analyze what's inside. */
4782 if (GET_CODE (ad) == AND)
4785 loc = &XEXP (ad, 0);
4789 /* One possibility for why the address is invalid is that it is itself
4790 a MEM. This can happen when the frame pointer is being eliminated, a
4791 pseudo is not allocated to a hard register, and the offset between the
4792 frame and stack pointers is not its initial value. In that case the
4793 pseudo will have been replaced by a MEM referring to the
4797 /* First ensure that the address in this MEM is valid. Then, unless
4798 indirect addresses are valid, reload the MEM into a register. */
4800 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4801 opnum, ADDR_TYPE (type),
4802 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4804 /* If tem was changed, then we must create a new memory reference to
4805 hold it and store it back into memrefloc. */
4806 if (tem != ad && memrefloc)
4808 *memrefloc = copy_rtx (*memrefloc);
4809 copy_replacements (tem, XEXP (*memrefloc, 0));
4810 loc = &XEXP (*memrefloc, 0);
4812 loc = &XEXP (*loc, 0);
4815 /* Check similar cases as for indirect addresses as above except
4816 that we can allow pseudos and a MEM since they should have been
4817 taken care of above. */
4820 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4821 || MEM_P (XEXP (tem, 0))
4822 || ! (REG_P (XEXP (tem, 0))
4823 || (GET_CODE (XEXP (tem, 0)) == PLUS
4824 && REG_P (XEXP (XEXP (tem, 0), 0))
4825 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4827 /* Must use TEM here, not AD, since it is the one that will
4828 have any subexpressions reloaded, if needed. */
4829 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
4830 MODE_BASE_REG_CLASS (mode), GET_MODE (tem),
4833 return ! removed_and;
4839 /* If we have address of a stack slot but it's not valid because the
4840 displacement is too large, compute the sum in a register.
4841 Handle all base registers here, not just fp/ap/sp, because on some
4842 targets (namely SH) we can also get too large displacements from
4843 big-endian corrections. */
4844 else if (GET_CODE (ad) == PLUS
4845 && REG_P (XEXP (ad, 0))
4846 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4847 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4848 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4850 /* Unshare the MEM rtx so we can safely alter it. */
4853 *memrefloc = copy_rtx (*memrefloc);
4854 loc = &XEXP (*memrefloc, 0);
4856 loc = &XEXP (*loc, 0);
4859 if (double_reg_address_ok)
4861 /* Unshare the sum as well. */
4862 *loc = ad = copy_rtx (ad);
4864 /* Reload the displacement into an index reg.
4865 We assume the frame pointer or arg pointer is a base reg. */
4866 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4867 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4873 /* If the sum of two regs is not necessarily valid,
4874 reload the sum into a base reg.
4875 That will at least work. */
4876 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4877 Pmode, opnum, type, ind_levels);
4879 return ! removed_and;
4882 /* If we have an indexed stack slot, there are three possible reasons why
4883 it might be invalid: The index might need to be reloaded, the address
4884 might have been made by frame pointer elimination and hence have a
4885 constant out of range, or both reasons might apply.
4887 We can easily check for an index needing reload, but even if that is the
4888 case, we might also have an invalid constant. To avoid making the
4889 conservative assumption and requiring two reloads, we see if this address
4890 is valid when not interpreted strictly. If it is, the only problem is
4891 that the index needs a reload and find_reloads_address_1 will take care
4894 Handle all base registers here, not just fp/ap/sp, because on some
4895 targets (namely SPARC) we can also get invalid addresses from preventive
4896 subreg big-endian corrections made by find_reloads_toplev. We
4897 can also get expressions involving LO_SUM (rather than PLUS) from
4898 find_reloads_subreg_address.
4900 If we decide to do something, it must be that `double_reg_address_ok'
4901 is true. We generate a reload of the base register + constant and
4902 rework the sum so that the reload register will be added to the index.
4903 This is safe because we know the address isn't shared.
4905 We check for the base register as both the first and second operand of
4906 the innermost PLUS and/or LO_SUM. */
4908 for (op_index = 0; op_index < 2; ++op_index)
4912 if (!(GET_CODE (ad) == PLUS
4913 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4914 && (GET_CODE (XEXP (ad, 0)) == PLUS
4915 || GET_CODE (XEXP (ad, 0)) == LO_SUM)))
4918 operand = XEXP (XEXP (ad, 0), op_index);
4919 if (!(REG_P (operand)
4920 || REGNO (operand) < FIRST_PSEUDO_REGISTER))
4923 if ((REG_MODE_OK_FOR_BASE_P (operand, mode)
4924 || operand == frame_pointer_rtx
4925 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4926 || operand == hard_frame_pointer_rtx
4928 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4929 || operand == arg_pointer_rtx
4931 || operand == stack_pointer_rtx)
4932 && ! maybe_memory_address_p (mode, ad,
4933 &XEXP (XEXP (ad, 0), op_index)))
4938 offset_reg = plus_constant (operand, INTVAL (XEXP (ad, 1)));
4939 addend = XEXP (XEXP (ad, 0), 1 - op_index);
4941 /* Form the adjusted address. */
4942 if (GET_CODE (XEXP (ad, 0)) == PLUS)
4943 ad = gen_rtx_PLUS (GET_MODE (ad),
4944 op_index == 0 ? offset_reg : addend,
4945 op_index == 0 ? addend : offset_reg);
4947 ad = gen_rtx_LO_SUM (GET_MODE (ad),
4948 op_index == 0 ? offset_reg : addend,
4949 op_index == 0 ? addend : offset_reg);
4952 find_reloads_address_part (XEXP (ad, op_index),
4953 &XEXP (ad, op_index),
4954 MODE_BASE_REG_CLASS (mode),
4955 GET_MODE (ad), opnum, type, ind_levels);
4956 find_reloads_address_1 (mode,
4957 XEXP (ad, 1 - op_index), 1,
4958 &XEXP (ad, 1 - op_index), opnum,
4965 /* See if address becomes valid when an eliminable register
4966 in a sum is replaced. */
4969 if (GET_CODE (ad) == PLUS)
4970 tem = subst_indexed_address (ad);
4971 if (tem != ad && strict_memory_address_p (mode, tem))
4973 /* Ok, we win that way. Replace any additional eliminable
4976 subst_reg_equivs_changed = 0;
4977 tem = subst_reg_equivs (tem, insn);
4979 /* Make sure that didn't make the address invalid again. */
4981 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4988 /* If constants aren't valid addresses, reload the constant address
4990 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4992 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4993 Unshare it so we can safely alter it. */
4994 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4995 && CONSTANT_POOL_ADDRESS_P (ad))
4997 *memrefloc = copy_rtx (*memrefloc);
4998 loc = &XEXP (*memrefloc, 0);
5000 loc = &XEXP (*loc, 0);
5003 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
5004 Pmode, opnum, type, ind_levels);
5005 return ! removed_and;
5008 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
5012 /* Find all pseudo regs appearing in AD
5013 that are eliminable in favor of equivalent values
5014 and do not have hard regs; replace them by their equivalents.
5015 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5016 front of it for pseudos that we have to replace with stack slots. */
5019 subst_reg_equivs (rtx ad, rtx insn)
5021 RTX_CODE code = GET_CODE (ad);
5040 int regno = REGNO (ad);
5042 if (reg_equiv_constant[regno] != 0)
5044 subst_reg_equivs_changed = 1;
5045 return reg_equiv_constant[regno];
5047 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5049 rtx mem = make_memloc (ad, regno);
5050 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5052 subst_reg_equivs_changed = 1;
5053 /* We mark the USE with QImode so that we recognize it
5054 as one that can be safely deleted at the end of
5056 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5065 /* Quickly dispose of a common case. */
5066 if (XEXP (ad, 0) == frame_pointer_rtx
5067 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5075 fmt = GET_RTX_FORMAT (code);
5076 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5078 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5082 /* Compute the sum of X and Y, making canonicalizations assumed in an
5083 address, namely: sum constant integers, surround the sum of two
5084 constants with a CONST, put the constant as the second operand, and
5085 group the constant on the outermost sum.
5087 This routine assumes both inputs are already in canonical form. */
5090 form_sum (rtx x, rtx y)
5093 enum machine_mode mode = GET_MODE (x);
5095 if (mode == VOIDmode)
5096 mode = GET_MODE (y);
5098 if (mode == VOIDmode)
5101 if (GET_CODE (x) == CONST_INT)
5102 return plus_constant (y, INTVAL (x));
5103 else if (GET_CODE (y) == CONST_INT)
5104 return plus_constant (x, INTVAL (y));
5105 else if (CONSTANT_P (x))
5106 tem = x, x = y, y = tem;
5108 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5109 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5111 /* Note that if the operands of Y are specified in the opposite
5112 order in the recursive calls below, infinite recursion will occur. */
5113 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5114 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5116 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5117 constant will have been placed second. */
5118 if (CONSTANT_P (x) && CONSTANT_P (y))
5120 if (GET_CODE (x) == CONST)
5122 if (GET_CODE (y) == CONST)
5125 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5128 return gen_rtx_PLUS (mode, x, y);
5131 /* If ADDR is a sum containing a pseudo register that should be
5132 replaced with a constant (from reg_equiv_constant),
5133 return the result of doing so, and also apply the associative
5134 law so that the result is more likely to be a valid address.
5135 (But it is not guaranteed to be one.)
5137 Note that at most one register is replaced, even if more are
5138 replaceable. Also, we try to put the result into a canonical form
5139 so it is more likely to be a valid address.
5141 In all other cases, return ADDR. */
5144 subst_indexed_address (rtx addr)
5146 rtx op0 = 0, op1 = 0, op2 = 0;
5150 if (GET_CODE (addr) == PLUS)
5152 /* Try to find a register to replace. */
5153 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5155 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5156 && reg_renumber[regno] < 0
5157 && reg_equiv_constant[regno] != 0)
5158 op0 = reg_equiv_constant[regno];
5159 else if (REG_P (op1)
5160 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5161 && reg_renumber[regno] < 0
5162 && reg_equiv_constant[regno] != 0)
5163 op1 = reg_equiv_constant[regno];
5164 else if (GET_CODE (op0) == PLUS
5165 && (tem = subst_indexed_address (op0)) != op0)
5167 else if (GET_CODE (op1) == PLUS
5168 && (tem = subst_indexed_address (op1)) != op1)
5173 /* Pick out up to three things to add. */
5174 if (GET_CODE (op1) == PLUS)
5175 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5176 else if (GET_CODE (op0) == PLUS)
5177 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5179 /* Compute the sum. */
5181 op1 = form_sum (op1, op2);
5183 op0 = form_sum (op0, op1);
5190 /* Update the REG_INC notes for an insn. It updates all REG_INC
5191 notes for the instruction which refer to REGNO the to refer
5192 to the reload number.
5194 INSN is the insn for which any REG_INC notes need updating.
5196 REGNO is the register number which has been reloaded.
5198 RELOADNUM is the reload number. */
5201 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5202 int reloadnum ATTRIBUTE_UNUSED)
5207 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5208 if (REG_NOTE_KIND (link) == REG_INC
5209 && (int) REGNO (XEXP (link, 0)) == regno)
5210 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5214 /* Record the pseudo registers we must reload into hard registers in a
5215 subexpression of a would-be memory address, X referring to a value
5216 in mode MODE. (This function is not called if the address we find
5219 CONTEXT = 1 means we are considering regs as index regs,
5220 = 0 means we are considering them as base regs.
5222 OPNUM and TYPE specify the purpose of any reloads made.
5224 IND_LEVELS says how many levels of indirect addressing are
5225 supported at this point in the address.
5227 INSN, if nonzero, is the insn in which we do the reload. It is used
5228 to determine if we may generate output reloads.
5230 We return nonzero if X, as a whole, is reloaded or replaced. */
5232 /* Note that we take shortcuts assuming that no multi-reg machine mode
5233 occurs as part of an address.
5234 Also, this is not fully machine-customizable; it works for machines
5235 such as VAXen and 68000's and 32000's, but other possible machines
5236 could have addressing modes that this does not handle right. */
5239 find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
5240 rtx *loc, int opnum, enum reload_type type,
5241 int ind_levels, rtx insn)
5243 RTX_CODE code = GET_CODE (x);
5249 rtx orig_op0 = XEXP (x, 0);
5250 rtx orig_op1 = XEXP (x, 1);
5251 RTX_CODE code0 = GET_CODE (orig_op0);
5252 RTX_CODE code1 = GET_CODE (orig_op1);
5256 if (GET_CODE (op0) == SUBREG)
5258 op0 = SUBREG_REG (op0);
5259 code0 = GET_CODE (op0);
5260 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5261 op0 = gen_rtx_REG (word_mode,
5263 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5264 GET_MODE (SUBREG_REG (orig_op0)),
5265 SUBREG_BYTE (orig_op0),
5266 GET_MODE (orig_op0))));
5269 if (GET_CODE (op1) == SUBREG)
5271 op1 = SUBREG_REG (op1);
5272 code1 = GET_CODE (op1);
5273 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5274 /* ??? Why is this given op1's mode and above for
5275 ??? op0 SUBREGs we use word_mode? */
5276 op1 = gen_rtx_REG (GET_MODE (op1),
5278 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5279 GET_MODE (SUBREG_REG (orig_op1)),
5280 SUBREG_BYTE (orig_op1),
5281 GET_MODE (orig_op1))));
5283 /* Plus in the index register may be created only as a result of
5284 register remateralization for expression like &localvar*4. Reload it.
5285 It may be possible to combine the displacement on the outer level,
5286 but it is probably not worthwhile to do so. */
5289 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5290 opnum, ADDR_TYPE (type), ind_levels, insn);
5291 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5292 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5293 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5297 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5298 || code0 == ZERO_EXTEND || code1 == MEM)
5300 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5301 type, ind_levels, insn);
5302 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5303 type, ind_levels, insn);
5306 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5307 || code1 == ZERO_EXTEND || code0 == MEM)
5309 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5310 type, ind_levels, insn);
5311 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5312 type, ind_levels, insn);
5315 else if (code0 == CONST_INT || code0 == CONST
5316 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5317 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5318 type, ind_levels, insn);
5320 else if (code1 == CONST_INT || code1 == CONST
5321 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5322 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5323 type, ind_levels, insn);
5325 else if (code0 == REG && code1 == REG)
5327 if (REG_OK_FOR_INDEX_P (op0)
5328 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5330 else if (REG_OK_FOR_INDEX_P (op1)
5331 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5333 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5334 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5335 type, ind_levels, insn);
5336 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5337 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5338 type, ind_levels, insn);
5339 else if (REG_OK_FOR_INDEX_P (op1))
5340 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5341 type, ind_levels, insn);
5342 else if (REG_OK_FOR_INDEX_P (op0))
5343 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5344 type, ind_levels, insn);
5347 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5348 type, ind_levels, insn);
5349 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5350 type, ind_levels, insn);
5354 else if (code0 == REG)
5356 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5357 type, ind_levels, insn);
5358 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5359 type, ind_levels, insn);
5362 else if (code1 == REG)
5364 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5365 type, ind_levels, insn);
5366 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5367 type, ind_levels, insn);
5376 rtx op0 = XEXP (x, 0);
5377 rtx op1 = XEXP (x, 1);
5379 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5382 /* Currently, we only support {PRE,POST}_MODIFY constructs
5383 where a base register is {inc,dec}remented by the contents
5384 of another register or by a constant value. Thus, these
5385 operands must match. */
5386 if (op0 != XEXP (op1, 0))
5389 /* Require index register (or constant). Let's just handle the
5390 register case in the meantime... If the target allows
5391 auto-modify by a constant then we could try replacing a pseudo
5392 register with its equivalent constant where applicable. */
5393 if (REG_P (XEXP (op1, 1)))
5394 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5395 find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1),
5396 opnum, type, ind_levels, insn);
5398 if (REG_P (XEXP (op1, 0)))
5400 int regno = REGNO (XEXP (op1, 0));
5403 /* A register that is incremented cannot be constant! */
5404 if (regno >= FIRST_PSEUDO_REGISTER
5405 && reg_equiv_constant[regno] != 0)
5408 /* Handle a register that is equivalent to a memory location
5409 which cannot be addressed directly. */
5410 if (reg_equiv_memory_loc[regno] != 0
5411 && (reg_equiv_address[regno] != 0
5412 || num_not_at_initial_offset))
5414 rtx tem = make_memloc (XEXP (x, 0), regno);
5416 if (reg_equiv_address[regno]
5417 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5419 /* First reload the memory location's address.
5420 We can't use ADDR_TYPE (type) here, because we need to
5421 write back the value after reading it, hence we actually
5422 need two registers. */
5423 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5424 &XEXP (tem, 0), opnum,
5428 /* Then reload the memory location into a base
5430 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5432 MODE_BASE_REG_CLASS (mode),
5433 GET_MODE (x), GET_MODE (x), 0,
5434 0, opnum, RELOAD_OTHER);
5436 update_auto_inc_notes (this_insn, regno, reloadnum);
5441 if (reg_renumber[regno] >= 0)
5442 regno = reg_renumber[regno];
5444 /* We require a base register here... */
5445 if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x)))
5447 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5448 &XEXP (op1, 0), &XEXP (x, 0),
5449 MODE_BASE_REG_CLASS (mode),
5450 GET_MODE (x), GET_MODE (x), 0, 0,
5451 opnum, RELOAD_OTHER);
5453 update_auto_inc_notes (this_insn, regno, reloadnum);
5466 if (REG_P (XEXP (x, 0)))
5468 int regno = REGNO (XEXP (x, 0));
5472 /* A register that is incremented cannot be constant! */
5473 if (regno >= FIRST_PSEUDO_REGISTER
5474 && reg_equiv_constant[regno] != 0)
5477 /* Handle a register that is equivalent to a memory location
5478 which cannot be addressed directly. */
5479 if (reg_equiv_memory_loc[regno] != 0
5480 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5482 rtx tem = make_memloc (XEXP (x, 0), regno);
5483 if (reg_equiv_address[regno]
5484 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5486 /* First reload the memory location's address.
5487 We can't use ADDR_TYPE (type) here, because we need to
5488 write back the value after reading it, hence we actually
5489 need two registers. */
5490 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5491 &XEXP (tem, 0), opnum, type,
5493 /* Put this inside a new increment-expression. */
5494 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5495 /* Proceed to reload that, as if it contained a register. */
5499 /* If we have a hard register that is ok as an index,
5500 don't make a reload. If an autoincrement of a nice register
5501 isn't "valid", it must be that no autoincrement is "valid".
5502 If that is true and something made an autoincrement anyway,
5503 this must be a special context where one is allowed.
5504 (For example, a "push" instruction.)
5505 We can't improve this address, so leave it alone. */
5507 /* Otherwise, reload the autoincrement into a suitable hard reg
5508 and record how much to increment by. */
5510 if (reg_renumber[regno] >= 0)
5511 regno = reg_renumber[regno];
5512 if ((regno >= FIRST_PSEUDO_REGISTER
5513 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5514 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5518 /* If we can output the register afterwards, do so, this
5519 saves the extra update.
5520 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5521 CALL_INSN - and it does not set CC0.
5522 But don't do this if we cannot directly address the
5523 memory location, since this will make it harder to
5524 reuse address reloads, and increases register pressure.
5525 Also don't do this if we can probably update x directly. */
5526 rtx equiv = (MEM_P (XEXP (x, 0))
5528 : reg_equiv_mem[regno]);
5529 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5530 if (insn && NONJUMP_INSN_P (insn) && equiv
5531 && memory_operand (equiv, GET_MODE (equiv))
5533 && ! sets_cc0_p (PATTERN (insn))
5535 && ! (icode != CODE_FOR_nothing
5536 && ((*insn_data[icode].operand[0].predicate)
5538 && ((*insn_data[icode].operand[1].predicate)
5541 /* We use the original pseudo for loc, so that
5542 emit_reload_insns() knows which pseudo this
5543 reload refers to and updates the pseudo rtx, not
5544 its equivalent memory location, as well as the
5545 corresponding entry in reg_last_reload_reg. */
5546 loc = &XEXP (x_orig, 0);
5549 = push_reload (x, x, loc, loc,
5550 (context ? INDEX_REG_CLASS :
5551 MODE_BASE_REG_CLASS (mode)),
5552 GET_MODE (x), GET_MODE (x), 0, 0,
5553 opnum, RELOAD_OTHER);
5558 = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5559 (context ? INDEX_REG_CLASS :
5560 MODE_BASE_REG_CLASS (mode)),
5561 GET_MODE (x), GET_MODE (x), 0, 0,
5564 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5569 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5575 else if (MEM_P (XEXP (x, 0)))
5577 /* This is probably the result of a substitution, by eliminate_regs,
5578 of an equivalent address for a pseudo that was not allocated to a
5579 hard register. Verify that the specified address is valid and
5580 reload it into a register. */
5581 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5582 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5586 /* Since we know we are going to reload this item, don't decrement
5587 for the indirection level.
5589 Note that this is actually conservative: it would be slightly
5590 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5592 /* We can't use ADDR_TYPE (type) here, because we need to
5593 write back the value after reading it, hence we actually
5594 need two registers. */
5595 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5596 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5597 opnum, type, ind_levels, insn);
5599 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5600 (context ? INDEX_REG_CLASS :
5601 MODE_BASE_REG_CLASS (mode)),
5602 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5604 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5606 link = FIND_REG_INC_NOTE (this_insn, tem);
5608 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5615 /* This is probably the result of a substitution, by eliminate_regs, of
5616 an equivalent address for a pseudo that was not allocated to a hard
5617 register. Verify that the specified address is valid and reload it
5620 Since we know we are going to reload this item, don't decrement for
5621 the indirection level.
5623 Note that this is actually conservative: it would be slightly more
5624 efficient to use the value of SPILL_INDIRECT_LEVELS from
5627 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5628 opnum, ADDR_TYPE (type), ind_levels, insn);
5629 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5630 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5631 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5636 int regno = REGNO (x);
5638 if (reg_equiv_constant[regno] != 0)
5640 find_reloads_address_part (reg_equiv_constant[regno], loc,
5641 (context ? INDEX_REG_CLASS :
5642 MODE_BASE_REG_CLASS (mode)),
5643 GET_MODE (x), opnum, type, ind_levels);
5647 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5648 that feeds this insn. */
5649 if (reg_equiv_mem[regno] != 0)
5651 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5652 (context ? INDEX_REG_CLASS :
5653 MODE_BASE_REG_CLASS (mode)),
5654 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5659 if (reg_equiv_memory_loc[regno]
5660 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5662 rtx tem = make_memloc (x, regno);
5663 if (reg_equiv_address[regno] != 0
5664 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5667 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5668 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5673 if (reg_renumber[regno] >= 0)
5674 regno = reg_renumber[regno];
5676 if ((regno >= FIRST_PSEUDO_REGISTER
5677 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5678 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5680 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5681 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5682 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5686 /* If a register appearing in an address is the subject of a CLOBBER
5687 in this insn, reload it into some other register to be safe.
5688 The CLOBBER is supposed to make the register unavailable
5689 from before this insn to after it. */
5690 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5692 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5693 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5694 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5701 if (REG_P (SUBREG_REG (x)))
5703 /* If this is a SUBREG of a hard register and the resulting register
5704 is of the wrong class, reload the whole SUBREG. This avoids
5705 needless copies if SUBREG_REG is multi-word. */
5706 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5708 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5710 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5711 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5713 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5714 (context ? INDEX_REG_CLASS :
5715 MODE_BASE_REG_CLASS (mode)),
5716 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5720 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5721 is larger than the class size, then reload the whole SUBREG. */
5724 enum reg_class class = (context ? INDEX_REG_CLASS
5725 : MODE_BASE_REG_CLASS (mode));
5726 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5727 > reg_class_size[class])
5729 x = find_reloads_subreg_address (x, 0, opnum, type,
5731 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5732 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5744 const char *fmt = GET_RTX_FORMAT (code);
5747 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5750 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5751 opnum, type, ind_levels, insn);
5758 /* X, which is found at *LOC, is a part of an address that needs to be
5759 reloaded into a register of class CLASS. If X is a constant, or if
5760 X is a PLUS that contains a constant, check that the constant is a
5761 legitimate operand and that we are supposed to be able to load
5762 it into the register.
5764 If not, force the constant into memory and reload the MEM instead.
5766 MODE is the mode to use, in case X is an integer constant.
5768 OPNUM and TYPE describe the purpose of any reloads made.
5770 IND_LEVELS says how many levels of indirect addressing this machine
5774 find_reloads_address_part (rtx x, rtx *loc, enum reg_class class,
5775 enum machine_mode mode, int opnum,
5776 enum reload_type type, int ind_levels)
5779 && (! LEGITIMATE_CONSTANT_P (x)
5780 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5784 tem = x = force_const_mem (mode, x);
5785 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5786 opnum, type, ind_levels, 0);
5789 else if (GET_CODE (x) == PLUS
5790 && CONSTANT_P (XEXP (x, 1))
5791 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5792 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5796 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5797 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5798 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5799 opnum, type, ind_levels, 0);
5802 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5803 mode, VOIDmode, 0, 0, opnum, type);
5806 /* X, a subreg of a pseudo, is a part of an address that needs to be
5809 If the pseudo is equivalent to a memory location that cannot be directly
5810 addressed, make the necessary address reloads.
5812 If address reloads have been necessary, or if the address is changed
5813 by register elimination, return the rtx of the memory location;
5814 otherwise, return X.
5816 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5819 OPNUM and TYPE identify the purpose of the reload.
5821 IND_LEVELS says how many levels of indirect addressing are
5822 supported at this point in the address.
5824 INSN, if nonzero, is the insn in which we do the reload. It is used
5825 to determine where to put USEs for pseudos that we have to replace with
5829 find_reloads_subreg_address (rtx x, int force_replace, int opnum,
5830 enum reload_type type, int ind_levels, rtx insn)
5832 int regno = REGNO (SUBREG_REG (x));
5834 if (reg_equiv_memory_loc[regno])
5836 /* If the address is not directly addressable, or if the address is not
5837 offsettable, then it must be replaced. */
5839 && (reg_equiv_address[regno]
5840 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5843 if (force_replace || num_not_at_initial_offset)
5845 rtx tem = make_memloc (SUBREG_REG (x), regno);
5847 /* If the address changes because of register elimination, then
5848 it must be replaced. */
5850 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5852 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
5853 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5856 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
5857 hold the correct (negative) byte offset. */
5858 if (BYTES_BIG_ENDIAN && outer_size > inner_size)
5859 offset = inner_size - outer_size;
5861 offset = SUBREG_BYTE (x);
5863 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5864 PUT_MODE (tem, GET_MODE (x));
5866 /* If this was a paradoxical subreg that we replaced, the
5867 resulting memory must be sufficiently aligned to allow
5868 us to widen the mode of the memory. */
5869 if (outer_size > inner_size && STRICT_ALIGNMENT)
5873 base = XEXP (tem, 0);
5874 if (GET_CODE (base) == PLUS)
5876 if (GET_CODE (XEXP (base, 1)) == CONST_INT
5877 && INTVAL (XEXP (base, 1)) % outer_size != 0)
5879 base = XEXP (base, 0);
5882 || (REGNO_POINTER_ALIGN (REGNO (base))
5883 < outer_size * BITS_PER_UNIT))
5887 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5888 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5891 /* If this is not a toplevel operand, find_reloads doesn't see
5892 this substitution. We have to emit a USE of the pseudo so
5893 that delete_output_reload can see it. */
5894 if (replace_reloads && recog_data.operand[opnum] != x)
5895 /* We mark the USE with QImode so that we recognize it
5896 as one that can be safely deleted at the end of
5898 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
5908 /* Substitute into the current INSN the registers into which we have reloaded
5909 the things that need reloading. The array `replacements'
5910 contains the locations of all pointers that must be changed
5911 and says what to replace them with.
5913 Return the rtx that X translates into; usually X, but modified. */
5916 subst_reloads (rtx insn)
5920 for (i = 0; i < n_replacements; i++)
5922 struct replacement *r = &replacements[i];
5923 rtx reloadreg = rld[r->what].reg_rtx;
5926 #ifdef ENABLE_CHECKING
5927 /* Internal consistency test. Check that we don't modify
5928 anything in the equivalence arrays. Whenever something from
5929 those arrays needs to be reloaded, it must be unshared before
5930 being substituted into; the equivalence must not be modified.
5931 Otherwise, if the equivalence is used after that, it will
5932 have been modified, and the thing substituted (probably a
5933 register) is likely overwritten and not a usable equivalence. */
5936 for (check_regno = 0; check_regno < max_regno; check_regno++)
5938 #define CHECK_MODF(ARRAY) \
5939 if (ARRAY[check_regno] \
5940 && loc_mentioned_in_p (r->where, \
5941 ARRAY[check_regno])) \
5944 CHECK_MODF (reg_equiv_constant);
5945 CHECK_MODF (reg_equiv_memory_loc);
5946 CHECK_MODF (reg_equiv_address);
5947 CHECK_MODF (reg_equiv_mem);
5950 #endif /* ENABLE_CHECKING */
5952 /* If we're replacing a LABEL_REF with a register, add a
5953 REG_LABEL note to indicate to flow which label this
5954 register refers to. */
5955 if (GET_CODE (*r->where) == LABEL_REF
5957 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
5958 XEXP (*r->where, 0),
5961 /* Encapsulate RELOADREG so its machine mode matches what
5962 used to be there. Note that gen_lowpart_common will
5963 do the wrong thing if RELOADREG is multi-word. RELOADREG
5964 will always be a REG here. */
5965 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5966 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
5968 /* If we are putting this into a SUBREG and RELOADREG is a
5969 SUBREG, we would be making nested SUBREGs, so we have to fix
5970 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5972 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5974 if (GET_MODE (*r->subreg_loc)
5975 == GET_MODE (SUBREG_REG (reloadreg)))
5976 *r->subreg_loc = SUBREG_REG (reloadreg);
5980 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
5982 /* When working with SUBREGs the rule is that the byte
5983 offset must be a multiple of the SUBREG's mode. */
5984 final_offset = (final_offset /
5985 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5986 final_offset = (final_offset *
5987 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5989 *r->where = SUBREG_REG (reloadreg);
5990 SUBREG_BYTE (*r->subreg_loc) = final_offset;
5994 *r->where = reloadreg;
5996 /* If reload got no reg and isn't optional, something's wrong. */
5997 else if (! rld[r->what].optional)
6002 /* Make a copy of any replacements being done into X and move those
6003 copies to locations in Y, a copy of X. */
6006 copy_replacements (rtx x, rtx y)
6008 /* We can't support X being a SUBREG because we might then need to know its
6009 location if something inside it was replaced. */
6010 if (GET_CODE (x) == SUBREG)
6013 copy_replacements_1 (&x, &y, n_replacements);
6017 copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6021 struct replacement *r;
6025 for (j = 0; j < orig_replacements; j++)
6027 if (replacements[j].subreg_loc == px)
6029 r = &replacements[n_replacements++];
6030 r->where = replacements[j].where;
6032 r->what = replacements[j].what;
6033 r->mode = replacements[j].mode;
6035 else if (replacements[j].where == px)
6037 r = &replacements[n_replacements++];
6040 r->what = replacements[j].what;
6041 r->mode = replacements[j].mode;
6047 code = GET_CODE (x);
6048 fmt = GET_RTX_FORMAT (code);
6050 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6053 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6054 else if (fmt[i] == 'E')
6055 for (j = XVECLEN (x, i); --j >= 0; )
6056 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6061 /* Change any replacements being done to *X to be done to *Y. */
6064 move_replacements (rtx *x, rtx *y)
6068 for (i = 0; i < n_replacements; i++)
6069 if (replacements[i].subreg_loc == x)
6070 replacements[i].subreg_loc = y;
6071 else if (replacements[i].where == x)
6073 replacements[i].where = y;
6074 replacements[i].subreg_loc = 0;
6078 /* If LOC was scheduled to be replaced by something, return the replacement.
6079 Otherwise, return *LOC. */
6082 find_replacement (rtx *loc)
6084 struct replacement *r;
6086 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6088 rtx reloadreg = rld[r->what].reg_rtx;
6090 if (reloadreg && r->where == loc)
6092 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6093 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6097 else if (reloadreg && r->subreg_loc == loc)
6099 /* RELOADREG must be either a REG or a SUBREG.
6101 ??? Is it actually still ever a SUBREG? If so, why? */
6103 if (REG_P (reloadreg))
6104 return gen_rtx_REG (GET_MODE (*loc),
6105 (REGNO (reloadreg) +
6106 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6107 GET_MODE (SUBREG_REG (*loc)),
6110 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6114 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6116 /* When working with SUBREGs the rule is that the byte
6117 offset must be a multiple of the SUBREG's mode. */
6118 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6119 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6120 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6126 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6127 what's inside and make a new rtl if so. */
6128 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6129 || GET_CODE (*loc) == MULT)
6131 rtx x = find_replacement (&XEXP (*loc, 0));
6132 rtx y = find_replacement (&XEXP (*loc, 1));
6134 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6135 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6141 /* Return nonzero if register in range [REGNO, ENDREGNO)
6142 appears either explicitly or implicitly in X
6143 other than being stored into (except for earlyclobber operands).
6145 References contained within the substructure at LOC do not count.
6146 LOC may be zero, meaning don't ignore anything.
6148 This is similar to refers_to_regno_p in rtlanal.c except that we
6149 look at equivalences for pseudos that didn't get hard registers. */
6152 refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6164 code = GET_CODE (x);
6171 /* If this is a pseudo, a hard register must not have been allocated.
6172 X must therefore either be a constant or be in memory. */
6173 if (r >= FIRST_PSEUDO_REGISTER)
6175 if (reg_equiv_memory_loc[r])
6176 return refers_to_regno_for_reload_p (regno, endregno,
6177 reg_equiv_memory_loc[r],
6180 if (reg_equiv_constant[r])
6186 return (endregno > r
6187 && regno < r + (r < FIRST_PSEUDO_REGISTER
6188 ? hard_regno_nregs[r][GET_MODE (x)]
6192 /* If this is a SUBREG of a hard reg, we can see exactly which
6193 registers are being modified. Otherwise, handle normally. */
6194 if (REG_P (SUBREG_REG (x))
6195 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6197 unsigned int inner_regno = subreg_regno (x);
6198 unsigned int inner_endregno
6199 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6200 ? hard_regno_nregs[inner_regno][GET_MODE (x)] : 1);
6202 return endregno > inner_regno && regno < inner_endregno;
6208 if (&SET_DEST (x) != loc
6209 /* Note setting a SUBREG counts as referring to the REG it is in for
6210 a pseudo but not for hard registers since we can
6211 treat each word individually. */
6212 && ((GET_CODE (SET_DEST (x)) == SUBREG
6213 && loc != &SUBREG_REG (SET_DEST (x))
6214 && REG_P (SUBREG_REG (SET_DEST (x)))
6215 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6216 && refers_to_regno_for_reload_p (regno, endregno,
6217 SUBREG_REG (SET_DEST (x)),
6219 /* If the output is an earlyclobber operand, this is
6221 || ((!REG_P (SET_DEST (x))
6222 || earlyclobber_operand_p (SET_DEST (x)))
6223 && refers_to_regno_for_reload_p (regno, endregno,
6224 SET_DEST (x), loc))))
6227 if (code == CLOBBER || loc == &SET_SRC (x))
6236 /* X does not match, so try its subexpressions. */
6238 fmt = GET_RTX_FORMAT (code);
6239 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6241 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6249 if (refers_to_regno_for_reload_p (regno, endregno,
6253 else if (fmt[i] == 'E')
6256 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6257 if (loc != &XVECEXP (x, i, j)
6258 && refers_to_regno_for_reload_p (regno, endregno,
6259 XVECEXP (x, i, j), loc))
6266 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6267 we check if any register number in X conflicts with the relevant register
6268 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6269 contains a MEM (we don't bother checking for memory addresses that can't
6270 conflict because we expect this to be a rare case.
6272 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6273 that we look at equivalences for pseudos that didn't get hard registers. */
6276 reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6278 int regno, endregno;
6280 /* Overly conservative. */
6281 if (GET_CODE (x) == STRICT_LOW_PART
6282 || GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
6285 /* If either argument is a constant, then modifying X can not affect IN. */
6286 if (CONSTANT_P (x) || CONSTANT_P (in))
6288 else if (GET_CODE (x) == SUBREG)
6290 regno = REGNO (SUBREG_REG (x));
6291 if (regno < FIRST_PSEUDO_REGISTER)
6292 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6293 GET_MODE (SUBREG_REG (x)),
6301 /* If this is a pseudo, it must not have been assigned a hard register.
6302 Therefore, it must either be in memory or be a constant. */
6304 if (regno >= FIRST_PSEUDO_REGISTER)
6306 if (reg_equiv_memory_loc[regno])
6307 return refers_to_mem_for_reload_p (in);
6308 else if (reg_equiv_constant[regno])
6314 return refers_to_mem_for_reload_p (in);
6315 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6316 || GET_CODE (x) == CC0)
6317 return reg_mentioned_p (x, in);
6318 else if (GET_CODE (x) == PLUS)
6320 /* We actually want to know if X is mentioned somewhere inside IN.
6321 We must not say that (plus (sp) (const_int 124)) is in
6322 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6323 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6324 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6329 else if (GET_CODE (in) == PLUS)
6330 return (reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6331 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6332 else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6333 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6338 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6339 ? hard_regno_nregs[regno][GET_MODE (x)] : 1);
6341 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6344 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6348 refers_to_mem_for_reload_p (rtx x)
6357 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6358 && reg_equiv_memory_loc[REGNO (x)]);
6360 fmt = GET_RTX_FORMAT (GET_CODE (x));
6361 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6363 && (MEM_P (XEXP (x, i))
6364 || refers_to_mem_for_reload_p (XEXP (x, i))))
6370 /* Check the insns before INSN to see if there is a suitable register
6371 containing the same value as GOAL.
6372 If OTHER is -1, look for a register in class CLASS.
6373 Otherwise, just see if register number OTHER shares GOAL's value.
6375 Return an rtx for the register found, or zero if none is found.
6377 If RELOAD_REG_P is (short *)1,
6378 we reject any hard reg that appears in reload_reg_rtx
6379 because such a hard reg is also needed coming into this insn.
6381 If RELOAD_REG_P is any other nonzero value,
6382 it is a vector indexed by hard reg number
6383 and we reject any hard reg whose element in the vector is nonnegative
6384 as well as any that appears in reload_reg_rtx.
6386 If GOAL is zero, then GOALREG is a register number; we look
6387 for an equivalent for that register.
6389 MODE is the machine mode of the value we want an equivalence for.
6390 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6392 This function is used by jump.c as well as in the reload pass.
6394 If GOAL is the sum of the stack pointer and a constant, we treat it
6395 as if it were a constant except that sp is required to be unchanging. */
6398 find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other,
6399 short *reload_reg_p, int goalreg, enum machine_mode mode)
6402 rtx goaltry, valtry, value, where;
6408 int goal_mem_addr_varies = 0;
6409 int need_stable_sp = 0;
6416 else if (REG_P (goal))
6417 regno = REGNO (goal);
6418 else if (MEM_P (goal))
6420 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6421 if (MEM_VOLATILE_P (goal))
6423 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6425 /* An address with side effects must be reexecuted. */
6440 else if (CONSTANT_P (goal))
6442 else if (GET_CODE (goal) == PLUS
6443 && XEXP (goal, 0) == stack_pointer_rtx
6444 && CONSTANT_P (XEXP (goal, 1)))
6445 goal_const = need_stable_sp = 1;
6446 else if (GET_CODE (goal) == PLUS
6447 && XEXP (goal, 0) == frame_pointer_rtx
6448 && CONSTANT_P (XEXP (goal, 1)))
6454 /* Scan insns back from INSN, looking for one that copies
6455 a value into or out of GOAL.
6456 Stop and give up if we reach a label. */
6462 if (p == 0 || LABEL_P (p)
6463 || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6466 if (NONJUMP_INSN_P (p)
6467 /* If we don't want spill regs ... */
6468 && (! (reload_reg_p != 0
6469 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6470 /* ... then ignore insns introduced by reload; they aren't
6471 useful and can cause results in reload_as_needed to be
6472 different from what they were when calculating the need for
6473 spills. If we notice an input-reload insn here, we will
6474 reject it below, but it might hide a usable equivalent.
6475 That makes bad code. It may even abort: perhaps no reg was
6476 spilled for this insn because it was assumed we would find
6478 || INSN_UID (p) < reload_first_uid))
6481 pat = single_set (p);
6483 /* First check for something that sets some reg equal to GOAL. */
6486 && true_regnum (SET_SRC (pat)) == regno
6487 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6490 && true_regnum (SET_DEST (pat)) == regno
6491 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6493 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6494 /* When looking for stack pointer + const,
6495 make sure we don't use a stack adjust. */
6496 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6497 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6499 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6500 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6502 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6503 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6504 /* If we are looking for a constant,
6505 and something equivalent to that constant was copied
6506 into a reg, we can use that reg. */
6507 || (goal_const && REG_NOTES (p) != 0
6508 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6509 && ((rtx_equal_p (XEXP (tem, 0), goal)
6511 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6512 || (REG_P (SET_DEST (pat))
6513 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6514 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6516 && GET_CODE (goal) == CONST_INT
6518 = operand_subword (XEXP (tem, 0), 0, 0,
6520 && rtx_equal_p (goal, goaltry)
6522 = operand_subword (SET_DEST (pat), 0, 0,
6524 && (valueno = true_regnum (valtry)) >= 0)))
6525 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6527 && REG_P (SET_DEST (pat))
6528 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6529 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6531 && GET_CODE (goal) == CONST_INT
6532 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6534 && rtx_equal_p (goal, goaltry)
6536 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6537 && (valueno = true_regnum (valtry)) >= 0)))
6541 if (valueno != other)
6544 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6550 for (i = hard_regno_nregs[valueno][mode] - 1; i >= 0; i--)
6551 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6564 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6565 (or copying VALUE into GOAL, if GOAL is also a register).
6566 Now verify that VALUE is really valid. */
6568 /* VALUENO is the register number of VALUE; a hard register. */
6570 /* Don't try to re-use something that is killed in this insn. We want
6571 to be able to trust REG_UNUSED notes. */
6572 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6575 /* If we propose to get the value from the stack pointer or if GOAL is
6576 a MEM based on the stack pointer, we need a stable SP. */
6577 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6578 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6582 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6583 if (GET_MODE (value) != mode)
6586 /* Reject VALUE if it was loaded from GOAL
6587 and is also a register that appears in the address of GOAL. */
6589 if (goal_mem && value == SET_DEST (single_set (where))
6590 && refers_to_regno_for_reload_p (valueno,
6592 + hard_regno_nregs[valueno][mode]),
6596 /* Reject registers that overlap GOAL. */
6598 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6599 nregs = hard_regno_nregs[regno][mode];
6602 valuenregs = hard_regno_nregs[valueno][mode];
6604 if (!goal_mem && !goal_const
6605 && regno + nregs > valueno && regno < valueno + valuenregs)
6608 /* Reject VALUE if it is one of the regs reserved for reloads.
6609 Reload1 knows how to reuse them anyway, and it would get
6610 confused if we allocated one without its knowledge.
6611 (Now that insns introduced by reload are ignored above,
6612 this case shouldn't happen, but I'm not positive.) */
6614 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6617 for (i = 0; i < valuenregs; ++i)
6618 if (reload_reg_p[valueno + i] >= 0)
6622 /* Reject VALUE if it is a register being used for an input reload
6623 even if it is not one of those reserved. */
6625 if (reload_reg_p != 0)
6628 for (i = 0; i < n_reloads; i++)
6629 if (rld[i].reg_rtx != 0 && rld[i].in)
6631 int regno1 = REGNO (rld[i].reg_rtx);
6632 int nregs1 = hard_regno_nregs[regno1]
6633 [GET_MODE (rld[i].reg_rtx)];
6634 if (regno1 < valueno + valuenregs
6635 && regno1 + nregs1 > valueno)
6641 /* We must treat frame pointer as varying here,
6642 since it can vary--in a nonlocal goto as generated by expand_goto. */
6643 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6645 /* Now verify that the values of GOAL and VALUE remain unaltered
6646 until INSN is reached. */
6655 /* Don't trust the conversion past a function call
6656 if either of the two is in a call-clobbered register, or memory. */
6661 if (goal_mem || need_stable_sp)
6664 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6665 for (i = 0; i < nregs; ++i)
6666 if (call_used_regs[regno + i])
6669 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6670 for (i = 0; i < valuenregs; ++i)
6671 if (call_used_regs[valueno + i])
6673 #ifdef NON_SAVING_SETJMP
6674 if (NON_SAVING_SETJMP && find_reg_note (p, REG_SETJMP, NULL))
6683 /* Watch out for unspec_volatile, and volatile asms. */
6684 if (volatile_insn_p (pat))
6687 /* If this insn P stores in either GOAL or VALUE, return 0.
6688 If GOAL is a memory ref and this insn writes memory, return 0.
6689 If GOAL is a memory ref and its address is not constant,
6690 and this insn P changes a register used in GOAL, return 0. */
6692 if (GET_CODE (pat) == COND_EXEC)
6693 pat = COND_EXEC_CODE (pat);
6694 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6696 rtx dest = SET_DEST (pat);
6697 while (GET_CODE (dest) == SUBREG
6698 || GET_CODE (dest) == ZERO_EXTRACT
6699 || GET_CODE (dest) == SIGN_EXTRACT
6700 || GET_CODE (dest) == STRICT_LOW_PART)
6701 dest = XEXP (dest, 0);
6704 int xregno = REGNO (dest);
6706 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6707 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6710 if (xregno < regno + nregs && xregno + xnregs > regno)
6712 if (xregno < valueno + valuenregs
6713 && xregno + xnregs > valueno)
6715 if (goal_mem_addr_varies
6716 && reg_overlap_mentioned_for_reload_p (dest, goal))
6718 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6721 else if (goal_mem && MEM_P (dest)
6722 && ! push_operand (dest, GET_MODE (dest)))
6724 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6725 && reg_equiv_memory_loc[regno] != 0)
6727 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6730 else if (GET_CODE (pat) == PARALLEL)
6733 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6735 rtx v1 = XVECEXP (pat, 0, i);
6736 if (GET_CODE (v1) == COND_EXEC)
6737 v1 = COND_EXEC_CODE (v1);
6738 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6740 rtx dest = SET_DEST (v1);
6741 while (GET_CODE (dest) == SUBREG
6742 || GET_CODE (dest) == ZERO_EXTRACT
6743 || GET_CODE (dest) == SIGN_EXTRACT
6744 || GET_CODE (dest) == STRICT_LOW_PART)
6745 dest = XEXP (dest, 0);
6748 int xregno = REGNO (dest);
6750 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6751 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6754 if (xregno < regno + nregs
6755 && xregno + xnregs > regno)
6757 if (xregno < valueno + valuenregs
6758 && xregno + xnregs > valueno)
6760 if (goal_mem_addr_varies
6761 && reg_overlap_mentioned_for_reload_p (dest,
6764 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6767 else if (goal_mem && MEM_P (dest)
6768 && ! push_operand (dest, GET_MODE (dest)))
6770 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6771 && reg_equiv_memory_loc[regno] != 0)
6773 else if (need_stable_sp
6774 && push_operand (dest, GET_MODE (dest)))
6780 if (CALL_P (p) && CALL_INSN_FUNCTION_USAGE (p))
6784 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6785 link = XEXP (link, 1))
6787 pat = XEXP (link, 0);
6788 if (GET_CODE (pat) == CLOBBER)
6790 rtx dest = SET_DEST (pat);
6794 int xregno = REGNO (dest);
6796 = hard_regno_nregs[xregno][GET_MODE (dest)];
6798 if (xregno < regno + nregs
6799 && xregno + xnregs > regno)
6801 else if (xregno < valueno + valuenregs
6802 && xregno + xnregs > valueno)
6804 else if (goal_mem_addr_varies
6805 && reg_overlap_mentioned_for_reload_p (dest,
6810 else if (goal_mem && MEM_P (dest)
6811 && ! push_operand (dest, GET_MODE (dest)))
6813 else if (need_stable_sp
6814 && push_operand (dest, GET_MODE (dest)))
6821 /* If this insn auto-increments or auto-decrements
6822 either regno or valueno, return 0 now.
6823 If GOAL is a memory ref and its address is not constant,
6824 and this insn P increments a register used in GOAL, return 0. */
6828 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6829 if (REG_NOTE_KIND (link) == REG_INC
6830 && REG_P (XEXP (link, 0)))
6832 int incno = REGNO (XEXP (link, 0));
6833 if (incno < regno + nregs && incno >= regno)
6835 if (incno < valueno + valuenregs && incno >= valueno)
6837 if (goal_mem_addr_varies
6838 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6848 /* Find a place where INCED appears in an increment or decrement operator
6849 within X, and return the amount INCED is incremented or decremented by.
6850 The value is always positive. */
6853 find_inc_amount (rtx x, rtx inced)
6855 enum rtx_code code = GET_CODE (x);
6861 rtx addr = XEXP (x, 0);
6862 if ((GET_CODE (addr) == PRE_DEC
6863 || GET_CODE (addr) == POST_DEC
6864 || GET_CODE (addr) == PRE_INC
6865 || GET_CODE (addr) == POST_INC)
6866 && XEXP (addr, 0) == inced)
6867 return GET_MODE_SIZE (GET_MODE (x));
6868 else if ((GET_CODE (addr) == PRE_MODIFY
6869 || GET_CODE (addr) == POST_MODIFY)
6870 && GET_CODE (XEXP (addr, 1)) == PLUS
6871 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
6872 && XEXP (addr, 0) == inced
6873 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
6875 i = INTVAL (XEXP (XEXP (addr, 1), 1));
6876 return i < 0 ? -i : i;
6880 fmt = GET_RTX_FORMAT (code);
6881 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6885 int tem = find_inc_amount (XEXP (x, i), inced);
6892 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6894 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6904 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6905 If SETS is nonzero, also consider SETs. */
6908 regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
6911 unsigned int nregs = hard_regno_nregs[regno][mode];
6912 unsigned int endregno = regno + nregs;
6914 if ((GET_CODE (PATTERN (insn)) == CLOBBER
6915 || (sets && GET_CODE (PATTERN (insn)) == SET))
6916 && REG_P (XEXP (PATTERN (insn), 0)))
6918 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
6920 return test >= regno && test < endregno;
6923 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6925 int i = XVECLEN (PATTERN (insn), 0) - 1;
6929 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6930 if ((GET_CODE (elt) == CLOBBER
6931 || (sets && GET_CODE (PATTERN (insn)) == SET))
6932 && REG_P (XEXP (elt, 0)))
6934 unsigned int test = REGNO (XEXP (elt, 0));
6936 if (test >= regno && test < endregno)
6945 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
6947 reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
6951 if (GET_MODE (reloadreg) == mode)
6954 regno = REGNO (reloadreg);
6956 if (WORDS_BIG_ENDIAN)
6957 regno += (int) hard_regno_nregs[regno][GET_MODE (reloadreg)]
6958 - (int) hard_regno_nregs[regno][mode];
6960 return gen_rtx_REG (mode, regno);
6963 static const char *const reload_when_needed_name[] =
6966 "RELOAD_FOR_OUTPUT",
6968 "RELOAD_FOR_INPUT_ADDRESS",
6969 "RELOAD_FOR_INPADDR_ADDRESS",
6970 "RELOAD_FOR_OUTPUT_ADDRESS",
6971 "RELOAD_FOR_OUTADDR_ADDRESS",
6972 "RELOAD_FOR_OPERAND_ADDRESS",
6973 "RELOAD_FOR_OPADDR_ADDR",
6975 "RELOAD_FOR_OTHER_ADDRESS"
6978 static const char * const reg_class_names[] = REG_CLASS_NAMES;
6980 /* These functions are used to print the variables set by 'find_reloads' */
6983 debug_reload_to_stream (FILE *f)
6990 for (r = 0; r < n_reloads; r++)
6992 fprintf (f, "Reload %d: ", r);
6996 fprintf (f, "reload_in (%s) = ",
6997 GET_MODE_NAME (rld[r].inmode));
6998 print_inline_rtx (f, rld[r].in, 24);
6999 fprintf (f, "\n\t");
7002 if (rld[r].out != 0)
7004 fprintf (f, "reload_out (%s) = ",
7005 GET_MODE_NAME (rld[r].outmode));
7006 print_inline_rtx (f, rld[r].out, 24);
7007 fprintf (f, "\n\t");
7010 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
7012 fprintf (f, "%s (opnum = %d)",
7013 reload_when_needed_name[(int) rld[r].when_needed],
7016 if (rld[r].optional)
7017 fprintf (f, ", optional");
7019 if (rld[r].nongroup)
7020 fprintf (f, ", nongroup");
7022 if (rld[r].inc != 0)
7023 fprintf (f, ", inc by %d", rld[r].inc);
7025 if (rld[r].nocombine)
7026 fprintf (f, ", can't combine");
7028 if (rld[r].secondary_p)
7029 fprintf (f, ", secondary_reload_p");
7031 if (rld[r].in_reg != 0)
7033 fprintf (f, "\n\treload_in_reg: ");
7034 print_inline_rtx (f, rld[r].in_reg, 24);
7037 if (rld[r].out_reg != 0)
7039 fprintf (f, "\n\treload_out_reg: ");
7040 print_inline_rtx (f, rld[r].out_reg, 24);
7043 if (rld[r].reg_rtx != 0)
7045 fprintf (f, "\n\treload_reg_rtx: ");
7046 print_inline_rtx (f, rld[r].reg_rtx, 24);
7050 if (rld[r].secondary_in_reload != -1)
7052 fprintf (f, "%ssecondary_in_reload = %d",
7053 prefix, rld[r].secondary_in_reload);
7057 if (rld[r].secondary_out_reload != -1)
7058 fprintf (f, "%ssecondary_out_reload = %d\n",
7059 prefix, rld[r].secondary_out_reload);
7062 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7064 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7065 insn_data[rld[r].secondary_in_icode].name);
7069 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7070 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7071 insn_data[rld[r].secondary_out_icode].name);
7080 debug_reload_to_stream (stderr);