1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
93 #include "insn-config.h"
94 #include "insn-codes.h"
98 #include "hard-reg-set.h"
105 #ifndef REGISTER_MOVE_COST
106 #define REGISTER_MOVE_COST(x, y) 2
109 #ifndef REGNO_MODE_OK_FOR_BASE_P
110 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
113 #ifndef REG_MODE_OK_FOR_BASE_P
114 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
117 /* The variables set up by `find_reloads' are:
119 n_reloads number of distinct reloads needed; max reload # + 1
120 tables indexed by reload number
121 reload_in rtx for value to reload from
122 reload_out rtx for where to store reload-reg afterward if nec
123 (often the same as reload_in)
124 reload_reg_class enum reg_class, saying what regs to reload into
125 reload_inmode enum machine_mode; mode this operand should have
126 when reloaded, on input.
127 reload_outmode enum machine_mode; mode this operand should have
128 when reloaded, on output.
129 reload_optional char, nonzero for an optional reload.
130 Optional reloads are ignored unless the
131 value is already sitting in a register.
132 reload_nongroup char, nonzero when a reload must use a register
133 not already allocated to a group.
134 reload_inc int, positive amount to increment or decrement by if
135 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
136 Ignored otherwise (don't assume it is zero).
137 reload_in_reg rtx. A reg for which reload_in is the equivalent.
138 If reload_in is a symbol_ref which came from
139 reg_equiv_constant, then this is the pseudo
140 which has that symbol_ref as equivalent.
141 reload_reg_rtx rtx. This is the register to reload into.
142 If it is zero when `find_reloads' returns,
143 you must find a suitable register in the class
144 specified by reload_reg_class, and store here
145 an rtx for that register with mode from
146 reload_inmode or reload_outmode.
147 reload_nocombine char, nonzero if this reload shouldn't be
148 combined with another reload.
149 reload_opnum int, operand number being reloaded. This is
150 used to group related reloads and need not always
151 be equal to the actual operand number in the insn,
152 though it current will be; for in-out operands, it
153 is one of the two operand numbers.
154 reload_when_needed enum, classifies reload as needed either for
155 addressing an input reload, addressing an output,
156 for addressing a non-reloaded mem ref,
157 or for unspecified purposes (i.e., more than one
159 reload_secondary_p int, 1 if this is a secondary register for one
161 reload_secondary_in_reload
162 reload_secondary_out_reload
163 int, gives the reload number of a secondary
164 reload, when needed; otherwise -1
165 reload_secondary_in_icode
166 reload_secondary_out_icode
167 enum insn_code, if a secondary reload is required,
168 gives the INSN_CODE that uses the secondary
169 reload as a scratch register, or CODE_FOR_nothing
170 if the secondary reload register is to be an
171 intermediate register. */
174 rtx reload_in[MAX_RELOADS];
175 rtx reload_out[MAX_RELOADS];
176 enum reg_class reload_reg_class[MAX_RELOADS];
177 enum machine_mode reload_inmode[MAX_RELOADS];
178 enum machine_mode reload_outmode[MAX_RELOADS];
179 rtx reload_reg_rtx[MAX_RELOADS];
180 char reload_optional[MAX_RELOADS];
181 char reload_nongroup[MAX_RELOADS];
182 int reload_inc[MAX_RELOADS];
183 rtx reload_in_reg[MAX_RELOADS];
184 rtx reload_out_reg[MAX_RELOADS];
185 char reload_nocombine[MAX_RELOADS];
186 int reload_opnum[MAX_RELOADS];
187 enum reload_type reload_when_needed[MAX_RELOADS];
188 int reload_secondary_p[MAX_RELOADS];
189 int reload_secondary_in_reload[MAX_RELOADS];
190 int reload_secondary_out_reload[MAX_RELOADS];
191 enum insn_code reload_secondary_in_icode[MAX_RELOADS];
192 enum insn_code reload_secondary_out_icode[MAX_RELOADS];
194 /* All the "earlyclobber" operands of the current insn
195 are recorded here. */
197 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
199 int reload_n_operands;
201 /* Replacing reloads.
203 If `replace_reloads' is nonzero, then as each reload is recorded
204 an entry is made for it in the table `replacements'.
205 Then later `subst_reloads' can look through that table and
206 perform all the replacements needed. */
208 /* Nonzero means record the places to replace. */
209 static int replace_reloads;
211 /* Each replacement is recorded with a structure like this. */
214 rtx *where; /* Location to store in */
215 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
216 a SUBREG; 0 otherwise. */
217 int what; /* which reload this is for */
218 enum machine_mode mode; /* mode it must have */
221 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
223 /* Number of replacements currently recorded. */
224 static int n_replacements;
226 /* Used to track what is modified by an operand. */
229 int reg_flag; /* Nonzero if referencing a register. */
230 int safe; /* Nonzero if this can't conflict with anything. */
231 rtx base; /* Base address for MEM. */
232 HOST_WIDE_INT start; /* Starting offset or register number. */
233 HOST_WIDE_INT end; /* Ending offset or register number. */
236 #ifdef SECONDARY_MEMORY_NEEDED
238 /* Save MEMs needed to copy from one class of registers to another. One MEM
239 is used per mode, but normally only one or two modes are ever used.
241 We keep two versions, before and after register elimination. The one
242 after register elimination is record separately for each operand. This
243 is done in case the address is not valid to be sure that we separately
246 static rtx secondary_memlocs[NUM_MACHINE_MODES];
247 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
250 /* The instruction we are doing reloads for;
251 so we can test whether a register dies in it. */
252 static rtx this_insn;
254 /* Nonzero if this instruction is a user-specified asm with operands. */
255 static int this_insn_is_asm;
257 /* If hard_regs_live_known is nonzero,
258 we can tell which hard regs are currently live,
259 at least enough to succeed in choosing dummy reloads. */
260 static int hard_regs_live_known;
262 /* Indexed by hard reg number,
263 element is nonnegative if hard reg has been spilled.
264 This vector is passed to `find_reloads' as an argument
265 and is not changed here. */
266 static short *static_reload_reg_p;
268 /* Set to 1 in subst_reg_equivs if it changes anything. */
269 static int subst_reg_equivs_changed;
271 /* On return from push_reload, holds the reload-number for the OUT
272 operand, which can be different for that from the input operand. */
273 static int output_reloadnum;
275 /* Compare two RTX's. */
276 #define MATCHES(x, y) \
277 (x == y || (x != 0 && (GET_CODE (x) == REG \
278 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
279 : rtx_equal_p (x, y) && ! side_effects_p (x))))
281 /* Indicates if two reloads purposes are for similar enough things that we
282 can merge their reloads. */
283 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
284 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
285 || ((when1) == (when2) && (op1) == (op2)) \
286 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
287 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
288 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
289 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
290 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
292 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
293 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
294 ((when1) != (when2) \
295 || ! ((op1) == (op2) \
296 || (when1) == RELOAD_FOR_INPUT \
297 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
298 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
300 /* If we are going to reload an address, compute the reload type to
302 #define ADDR_TYPE(type) \
303 ((type) == RELOAD_FOR_INPUT_ADDRESS \
304 ? RELOAD_FOR_INPADDR_ADDRESS \
305 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
306 ? RELOAD_FOR_OUTADDR_ADDRESS \
309 #ifdef HAVE_SECONDARY_RELOADS
310 static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
311 enum machine_mode, enum reload_type,
314 static enum reg_class find_valid_class PROTO((enum machine_mode, int));
315 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
316 enum machine_mode, enum machine_mode,
317 int, int, int, enum reload_type));
318 static void push_replacement PROTO((rtx *, int, enum machine_mode));
319 static void combine_reloads PROTO((void));
320 static int find_reusable_reload PROTO((rtx *, rtx, enum reg_class,
321 enum reload_type, int, int));
322 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
323 enum machine_mode, enum machine_mode,
324 enum reg_class, int, int));
325 static int earlyclobber_operand_p PROTO((rtx));
326 static int hard_reg_set_here_p PROTO((int, int, rtx));
327 static struct decomposition decompose PROTO((rtx));
328 static int immune_p PROTO((rtx, rtx, struct decomposition));
329 static int alternative_allows_memconst PROTO((const char *, int));
330 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int, rtx));
331 static rtx make_memloc PROTO((rtx, int));
332 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
333 int, enum reload_type, int, rtx));
334 static rtx subst_reg_equivs PROTO((rtx, rtx));
335 static rtx subst_indexed_address PROTO((rtx));
336 static int find_reloads_address_1 PROTO((enum machine_mode, rtx, int, rtx *,
337 int, enum reload_type,int, rtx));
338 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
339 enum machine_mode, int,
340 enum reload_type, int));
341 static int find_inc_amount PROTO((rtx, rtx));
342 static int loc_mentioned_in_p PROTO((rtx *, rtx));
344 #ifdef HAVE_SECONDARY_RELOADS
346 /* Determine if any secondary reloads are needed for loading (if IN_P is
347 non-zero) or storing (if IN_P is zero) X to or from a reload register of
348 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
349 are needed, push them.
351 Return the reload number of the secondary reload we made, or -1 if
352 we didn't need one. *PICODE is set to the insn_code to use if we do
353 need a secondary reload. */
356 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
362 enum reg_class reload_class;
363 enum machine_mode reload_mode;
364 enum reload_type type;
365 enum insn_code *picode;
367 enum reg_class class = NO_REGS;
368 enum machine_mode mode = reload_mode;
369 enum insn_code icode = CODE_FOR_nothing;
370 enum reg_class t_class = NO_REGS;
371 enum machine_mode t_mode = VOIDmode;
372 enum insn_code t_icode = CODE_FOR_nothing;
373 enum reload_type secondary_type;
374 int s_reload, t_reload = -1;
376 if (type == RELOAD_FOR_INPUT_ADDRESS
377 || type == RELOAD_FOR_OUTPUT_ADDRESS
378 || type == RELOAD_FOR_INPADDR_ADDRESS
379 || type == RELOAD_FOR_OUTADDR_ADDRESS)
380 secondary_type = type;
382 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
384 *picode = CODE_FOR_nothing;
386 /* If X is a paradoxical SUBREG, use the inner value to determine both the
387 mode and object being reloaded. */
388 if (GET_CODE (x) == SUBREG
389 && (GET_MODE_SIZE (GET_MODE (x))
390 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
393 reload_mode = GET_MODE (x);
396 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
397 is still a pseudo-register by now, it *must* have an equivalent MEM
398 but we don't want to assume that), use that equivalent when seeing if
399 a secondary reload is needed since whether or not a reload is needed
400 might be sensitive to the form of the MEM. */
402 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
403 && reg_equiv_mem[REGNO (x)] != 0)
404 x = reg_equiv_mem[REGNO (x)];
406 #ifdef SECONDARY_INPUT_RELOAD_CLASS
408 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
411 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
413 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
416 /* If we don't need any secondary registers, done. */
417 if (class == NO_REGS)
420 /* Get a possible insn to use. If the predicate doesn't accept X, don't
423 icode = (in_p ? reload_in_optab[(int) reload_mode]
424 : reload_out_optab[(int) reload_mode]);
426 if (icode != CODE_FOR_nothing
427 && insn_operand_predicate[(int) icode][in_p]
428 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
429 icode = CODE_FOR_nothing;
431 /* If we will be using an insn, see if it can directly handle the reload
432 register we will be using. If it can, the secondary reload is for a
433 scratch register. If it can't, we will use the secondary reload for
434 an intermediate register and require a tertiary reload for the scratch
437 if (icode != CODE_FOR_nothing)
439 /* If IN_P is non-zero, the reload register will be the output in
440 operand 0. If IN_P is zero, the reload register will be the input
441 in operand 1. Outputs should have an initial "=", which we must
444 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
445 enum reg_class insn_class
446 = (insn_letter == 'r' ? GENERAL_REGS
447 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
449 if (insn_class == NO_REGS
450 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
451 /* The scratch register's constraint must start with "=&". */
452 || insn_operand_constraint[(int) icode][2][0] != '='
453 || insn_operand_constraint[(int) icode][2][1] != '&')
456 if (reg_class_subset_p (reload_class, insn_class))
457 mode = insn_operand_mode[(int) icode][2];
460 char t_letter = insn_operand_constraint[(int) icode][2][2];
462 t_mode = insn_operand_mode[(int) icode][2];
463 t_class = (t_letter == 'r' ? GENERAL_REGS
464 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter));
466 icode = CODE_FOR_nothing;
470 /* This case isn't valid, so fail. Reload is allowed to use the same
471 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
472 in the case of a secondary register, we actually need two different
473 registers for correct code. We fail here to prevent the possibility of
474 silently generating incorrect code later.
476 The convention is that secondary input reloads are valid only if the
477 secondary_class is different from class. If you have such a case, you
478 can not use secondary reloads, you must work around the problem some
481 Allow this when MODE is not reload_mode and assume that the generated
482 code handles this case (it does on the Alpha, which is the only place
483 this currently happens). */
485 if (in_p && class == reload_class && mode == reload_mode)
488 /* If we need a tertiary reload, see if we have one we can reuse or else
491 if (t_class != NO_REGS)
493 for (t_reload = 0; t_reload < n_reloads; t_reload++)
494 if (reload_secondary_p[t_reload]
495 && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
496 || reg_class_subset_p (reload_reg_class[t_reload], t_class))
497 && ((in_p && reload_inmode[t_reload] == t_mode)
498 || (! in_p && reload_outmode[t_reload] == t_mode))
499 && ((in_p && (reload_secondary_in_icode[t_reload]
500 == CODE_FOR_nothing))
501 || (! in_p &&(reload_secondary_out_icode[t_reload]
502 == CODE_FOR_nothing)))
503 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
504 && MERGABLE_RELOADS (secondary_type,
505 reload_when_needed[t_reload],
506 opnum, reload_opnum[t_reload]))
509 reload_inmode[t_reload] = t_mode;
511 reload_outmode[t_reload] = t_mode;
513 if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
514 reload_reg_class[t_reload] = t_class;
516 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
517 reload_optional[t_reload] &= optional;
518 reload_secondary_p[t_reload] = 1;
519 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
520 opnum, reload_opnum[t_reload]))
521 reload_when_needed[t_reload] = RELOAD_OTHER;
524 if (t_reload == n_reloads)
526 /* We need to make a new tertiary reload for this register class. */
527 reload_in[t_reload] = reload_out[t_reload] = 0;
528 reload_reg_class[t_reload] = t_class;
529 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
530 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
531 reload_reg_rtx[t_reload] = 0;
532 reload_optional[t_reload] = optional;
533 reload_nongroup[t_reload] = 0;
534 reload_inc[t_reload] = 0;
535 /* Maybe we could combine these, but it seems too tricky. */
536 reload_nocombine[t_reload] = 1;
537 reload_in_reg[t_reload] = 0;
538 reload_out_reg[t_reload] = 0;
539 reload_opnum[t_reload] = opnum;
540 reload_when_needed[t_reload] = secondary_type;
541 reload_secondary_in_reload[t_reload] = -1;
542 reload_secondary_out_reload[t_reload] = -1;
543 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
544 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
545 reload_secondary_p[t_reload] = 1;
551 /* See if we can reuse an existing secondary reload. */
552 for (s_reload = 0; s_reload < n_reloads; s_reload++)
553 if (reload_secondary_p[s_reload]
554 && (reg_class_subset_p (class, reload_reg_class[s_reload])
555 || reg_class_subset_p (reload_reg_class[s_reload], class))
556 && ((in_p && reload_inmode[s_reload] == mode)
557 || (! in_p && reload_outmode[s_reload] == mode))
558 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
559 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
560 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
561 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
562 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
563 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
564 opnum, reload_opnum[s_reload]))
567 reload_inmode[s_reload] = mode;
569 reload_outmode[s_reload] = mode;
571 if (reg_class_subset_p (class, reload_reg_class[s_reload]))
572 reload_reg_class[s_reload] = class;
574 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
575 reload_optional[s_reload] &= optional;
576 reload_secondary_p[s_reload] = 1;
577 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
578 opnum, reload_opnum[s_reload]))
579 reload_when_needed[s_reload] = RELOAD_OTHER;
582 if (s_reload == n_reloads)
584 #ifdef SECONDARY_MEMORY_NEEDED
585 /* If we need a memory location to copy between the two reload regs,
586 set it up now. Note that we do the input case before making
587 the reload and the output case after. This is due to the
588 way reloads are output. */
590 if (in_p && icode == CODE_FOR_nothing
591 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
592 get_secondary_mem (x, reload_mode, opnum, type);
595 /* We need to make a new secondary reload for this register class. */
596 reload_in[s_reload] = reload_out[s_reload] = 0;
597 reload_reg_class[s_reload] = class;
599 reload_inmode[s_reload] = in_p ? mode : VOIDmode;
600 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
601 reload_reg_rtx[s_reload] = 0;
602 reload_optional[s_reload] = optional;
603 reload_nongroup[s_reload] = 0;
604 reload_inc[s_reload] = 0;
605 /* Maybe we could combine these, but it seems too tricky. */
606 reload_nocombine[s_reload] = 1;
607 reload_in_reg[s_reload] = 0;
608 reload_out_reg[s_reload] = 0;
609 reload_opnum[s_reload] = opnum;
610 reload_when_needed[s_reload] = secondary_type;
611 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
612 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
613 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
614 reload_secondary_out_icode[s_reload]
615 = ! in_p ? t_icode : CODE_FOR_nothing;
616 reload_secondary_p[s_reload] = 1;
620 #ifdef SECONDARY_MEMORY_NEEDED
621 if (! in_p && icode == CODE_FOR_nothing
622 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
623 get_secondary_mem (x, mode, opnum, type);
630 #endif /* HAVE_SECONDARY_RELOADS */
632 #ifdef SECONDARY_MEMORY_NEEDED
634 /* Return a memory location that will be used to copy X in mode MODE.
635 If we haven't already made a location for this mode in this insn,
636 call find_reloads_address on the location being returned. */
639 get_secondary_mem (x, mode, opnum, type)
641 enum machine_mode mode;
643 enum reload_type type;
648 /* By default, if MODE is narrower than a word, widen it to a word.
649 This is required because most machines that require these memory
650 locations do not support short load and stores from all registers
651 (e.g., FP registers). */
653 #ifdef SECONDARY_MEMORY_NEEDED_MODE
654 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
656 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
657 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
660 /* If we already have made a MEM for this operand in MODE, return it. */
661 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
662 return secondary_memlocs_elim[(int) mode][opnum];
664 /* If this is the first time we've tried to get a MEM for this mode,
665 allocate a new one. `something_changed' in reload will get set
666 by noticing that the frame size has changed. */
668 if (secondary_memlocs[(int) mode] == 0)
670 #ifdef SECONDARY_MEMORY_NEEDED_RTX
671 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
673 secondary_memlocs[(int) mode]
674 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
678 /* Get a version of the address doing any eliminations needed. If that
679 didn't give us a new MEM, make a new one if it isn't valid. */
681 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
682 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
684 if (! mem_valid && loc == secondary_memlocs[(int) mode])
685 loc = copy_rtx (loc);
687 /* The only time the call below will do anything is if the stack
688 offset is too large. In that case IND_LEVELS doesn't matter, so we
689 can just pass a zero. Adjust the type to be the address of the
690 corresponding object. If the address was valid, save the eliminated
691 address. If it wasn't valid, we need to make a reload each time, so
696 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
697 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
700 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
704 secondary_memlocs_elim[(int) mode][opnum] = loc;
708 /* Clear any secondary memory locations we've made. */
711 clear_secondary_mem ()
713 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
715 #endif /* SECONDARY_MEMORY_NEEDED */
717 /* Find the largest class for which every register number plus N is valid in
718 M1 (if in range). Abort if no such class exists. */
720 static enum reg_class
721 find_valid_class (m1, n)
722 enum machine_mode m1;
727 enum reg_class best_class;
730 for (class = 1; class < N_REG_CLASSES; class++)
733 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
734 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
735 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
736 && ! HARD_REGNO_MODE_OK (regno + n, m1))
739 if (! bad && reg_class_size[class] > best_size)
740 best_class = class, best_size = reg_class_size[class];
749 /* Return the number of a previously made reload that can be combined with
750 a new one, or n_reloads if none of the existing reloads can be used.
751 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
752 push_reload, they determine the kind of the new reload that we try to
753 combine. P_IN points to the corresponding value of IN, which can be
754 modified by this function.
755 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
757 find_reusable_reload (p_in, out, class, type, opnum, dont_share)
759 enum reg_class class;
760 enum reload_type type;
761 int opnum, dont_share;
765 /* We can't merge two reloads if the output of either one is
768 if (earlyclobber_operand_p (out))
771 /* We can use an existing reload if the class is right
772 and at least one of IN and OUT is a match
773 and the other is at worst neutral.
774 (A zero compared against anything is neutral.)
776 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
777 for the same thing since that can cause us to need more reload registers
778 than we otherwise would. */
780 for (i = 0; i < n_reloads; i++)
781 if ((reg_class_subset_p (class, reload_reg_class[i])
782 || reg_class_subset_p (reload_reg_class[i], class))
783 /* If the existing reload has a register, it must fit our class. */
784 && (reload_reg_rtx[i] == 0
785 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
786 true_regnum (reload_reg_rtx[i])))
787 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
788 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
790 (out != 0 && MATCHES (reload_out[i], out)
791 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
792 && (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i]))
793 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
794 && MERGABLE_RELOADS (type, reload_when_needed[i],
795 opnum, reload_opnum[i]))
798 /* Reloading a plain reg for input can match a reload to postincrement
799 that reg, since the postincrement's value is the right value.
800 Likewise, it can match a preincrement reload, since we regard
801 the preincrementation as happening before any ref in this insn
803 for (i = 0; i < n_reloads; i++)
804 if ((reg_class_subset_p (class, reload_reg_class[i])
805 || reg_class_subset_p (reload_reg_class[i], class))
806 /* If the existing reload has a register, it must fit our
808 && (reload_reg_rtx[i] == 0
809 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
810 true_regnum (reload_reg_rtx[i])))
811 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
812 && ((GET_CODE (in) == REG
813 && (GET_CODE (reload_in[i]) == POST_INC
814 || GET_CODE (reload_in[i]) == POST_DEC
815 || GET_CODE (reload_in[i]) == PRE_INC
816 || GET_CODE (reload_in[i]) == PRE_DEC)
817 && MATCHES (XEXP (reload_in[i], 0), in))
819 (GET_CODE (reload_in[i]) == REG
820 && (GET_CODE (in) == POST_INC
821 || GET_CODE (in) == POST_DEC
822 || GET_CODE (in) == PRE_INC
823 || GET_CODE (in) == PRE_DEC)
824 && MATCHES (XEXP (in, 0), reload_in[i])))
825 && (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i]))
826 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
827 && MERGABLE_RELOADS (type, reload_when_needed[i],
828 opnum, reload_opnum[i]))
830 /* Make sure reload_in ultimately has the increment,
831 not the plain register. */
832 if (GET_CODE (in) == REG)
833 *p_in = reload_in[i];
839 /* Record one reload that needs to be performed.
840 IN is an rtx saying where the data are to be found before this instruction.
841 OUT says where they must be stored after the instruction.
842 (IN is zero for data not read, and OUT is zero for data not written.)
843 INLOC and OUTLOC point to the places in the instructions where
844 IN and OUT were found.
845 If IN and OUT are both non-zero, it means the same register must be used
846 to reload both IN and OUT.
848 CLASS is a register class required for the reloaded data.
849 INMODE is the machine mode that the instruction requires
850 for the reg that replaces IN and OUTMODE is likewise for OUT.
852 If IN is zero, then OUT's location and mode should be passed as
855 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
857 OPTIONAL nonzero means this reload does not need to be performed:
858 it can be discarded if that is more convenient.
860 OPNUM and TYPE say what the purpose of this reload is.
862 The return value is the reload-number for this reload.
864 If both IN and OUT are nonzero, in some rare cases we might
865 want to make two separate reloads. (Actually we never do this now.)
866 Therefore, the reload-number for OUT is stored in
867 output_reloadnum when we return; the return value applies to IN.
868 Usually (presently always), when IN and OUT are nonzero,
869 the two reload-numbers are equal, but the caller should be careful to
873 push_reload (in, out, inloc, outloc, class,
874 inmode, outmode, strict_low, optional, opnum, type)
877 enum reg_class class;
878 enum machine_mode inmode, outmode;
882 enum reload_type type;
886 int dont_remove_subreg = 0;
887 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
888 int secondary_in_reload = -1, secondary_out_reload = -1;
889 enum insn_code secondary_in_icode = CODE_FOR_nothing;
890 enum insn_code secondary_out_icode = CODE_FOR_nothing;
892 /* INMODE and/or OUTMODE could be VOIDmode if no mode
893 has been specified for the operand. In that case,
894 use the operand's mode as the mode to reload. */
895 if (inmode == VOIDmode && in != 0)
896 inmode = GET_MODE (in);
897 if (outmode == VOIDmode && out != 0)
898 outmode = GET_MODE (out);
900 /* If IN is a pseudo register everywhere-equivalent to a constant, and
901 it is not in a hard register, reload straight from the constant,
902 since we want to get rid of such pseudo registers.
903 Often this is done earlier, but not always in find_reloads_address. */
904 if (in != 0 && GET_CODE (in) == REG)
906 register int regno = REGNO (in);
908 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
909 && reg_equiv_constant[regno] != 0)
910 in = reg_equiv_constant[regno];
913 /* Likewise for OUT. Of course, OUT will never be equivalent to
914 an actual constant, but it might be equivalent to a memory location
915 (in the case of a parameter). */
916 if (out != 0 && GET_CODE (out) == REG)
918 register int regno = REGNO (out);
920 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
921 && reg_equiv_constant[regno] != 0)
922 out = reg_equiv_constant[regno];
925 /* If we have a read-write operand with an address side-effect,
926 change either IN or OUT so the side-effect happens only once. */
927 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
929 if (GET_CODE (XEXP (in, 0)) == POST_INC
930 || GET_CODE (XEXP (in, 0)) == POST_DEC)
931 in = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0));
932 if (GET_CODE (XEXP (in, 0)) == PRE_INC
933 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
934 out = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0));
937 /* If we are reloading a (SUBREG constant ...), really reload just the
938 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
939 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
940 a pseudo and hence will become a MEM) with M1 wider than M2 and the
941 register is a pseudo, also reload the inside expression.
942 For machines that extend byte loads, do this for any SUBREG of a pseudo
943 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
944 M2 is an integral mode that gets extended when loaded.
945 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
946 either M1 is not valid for R or M2 is wider than a word but we only
947 need one word to store an M2-sized quantity in R.
948 (However, if OUT is nonzero, we need to reload the reg *and*
949 the subreg, so do nothing here, and let following statement handle it.)
951 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
952 we can't handle it here because CONST_INT does not indicate a mode.
954 Similarly, we must reload the inside expression if we have a
955 STRICT_LOW_PART (presumably, in == out in the cas).
957 Also reload the inner expression if it does not require a secondary
958 reload but the SUBREG does.
960 Finally, reload the inner expression if it is a register that is in
961 the class whose registers cannot be referenced in a different size
962 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
963 cannot reload just the inside since we might end up with the wrong
964 register class. But if it is inside a STRICT_LOW_PART, we have
965 no choice, so we hope we do get the right register class there. */
967 if (in != 0 && GET_CODE (in) == SUBREG
968 && (SUBREG_WORD (in) == 0 || strict_low)
969 #ifdef CLASS_CANNOT_CHANGE_SIZE
970 && class != CLASS_CANNOT_CHANGE_SIZE
972 && (CONSTANT_P (SUBREG_REG (in))
973 || GET_CODE (SUBREG_REG (in)) == PLUS
975 || (((GET_CODE (SUBREG_REG (in)) == REG
976 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
977 || GET_CODE (SUBREG_REG (in)) == MEM)
978 && ((GET_MODE_SIZE (inmode)
979 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
980 #ifdef LOAD_EXTEND_OP
981 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
982 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
984 && (GET_MODE_SIZE (inmode)
985 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
986 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
987 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
989 #ifdef WORD_REGISTER_OPERATIONS
990 || ((GET_MODE_SIZE (inmode)
991 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
992 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
993 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
997 || (GET_CODE (SUBREG_REG (in)) == REG
998 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
999 /* The case where out is nonzero
1000 is handled differently in the following statement. */
1001 && (out == 0 || SUBREG_WORD (in) == 0)
1002 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1003 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1005 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1007 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1008 GET_MODE (SUBREG_REG (in)))))
1009 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
1010 + SUBREG_WORD (in)),
1012 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1013 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1014 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1015 GET_MODE (SUBREG_REG (in)),
1019 #ifdef CLASS_CANNOT_CHANGE_SIZE
1020 || (GET_CODE (SUBREG_REG (in)) == REG
1021 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1022 && (TEST_HARD_REG_BIT
1023 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1024 REGNO (SUBREG_REG (in))))
1025 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1026 != GET_MODE_SIZE (inmode)))
1030 in_subreg_loc = inloc;
1031 inloc = &SUBREG_REG (in);
1033 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1034 if (GET_CODE (in) == MEM)
1035 /* This is supposed to happen only for paradoxical subregs made by
1036 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1037 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
1040 inmode = GET_MODE (in);
1043 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1044 either M1 is not valid for R or M2 is wider than a word but we only
1045 need one word to store an M2-sized quantity in R.
1047 However, we must reload the inner reg *as well as* the subreg in
1050 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1051 code above. This can happen if SUBREG_WORD != 0. */
1053 if (in != 0 && GET_CODE (in) == SUBREG
1054 && (CONSTANT_P (SUBREG_REG (in))
1055 || (GET_CODE (SUBREG_REG (in)) == REG
1056 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1057 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in))
1060 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1061 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1063 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1065 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1066 GET_MODE (SUBREG_REG (in)))))))))
1068 /* This relies on the fact that emit_reload_insns outputs the
1069 instructions for input reloads of type RELOAD_OTHER in the same
1070 order as the reloads. Thus if the outer reload is also of type
1071 RELOAD_OTHER, we are guaranteed that this inner reload will be
1072 output before the outer reload. */
1073 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
1074 find_valid_class (inmode, SUBREG_WORD (in)),
1075 VOIDmode, VOIDmode, 0, 0, opnum, type);
1076 dont_remove_subreg = 1;
1079 /* Similarly for paradoxical and problematical SUBREGs on the output.
1080 Note that there is no reason we need worry about the previous value
1081 of SUBREG_REG (out); even if wider than out,
1082 storing in a subreg is entitled to clobber it all
1083 (except in the case of STRICT_LOW_PART,
1084 and in that case the constraint should label it input-output.) */
1085 if (out != 0 && GET_CODE (out) == SUBREG
1086 && (SUBREG_WORD (out) == 0 || strict_low)
1087 #ifdef CLASS_CANNOT_CHANGE_SIZE
1088 && class != CLASS_CANNOT_CHANGE_SIZE
1090 && (CONSTANT_P (SUBREG_REG (out))
1092 || (((GET_CODE (SUBREG_REG (out)) == REG
1093 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1094 || GET_CODE (SUBREG_REG (out)) == MEM)
1095 && ((GET_MODE_SIZE (outmode)
1096 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1097 #ifdef WORD_REGISTER_OPERATIONS
1098 || ((GET_MODE_SIZE (outmode)
1099 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1100 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1101 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1105 || (GET_CODE (SUBREG_REG (out)) == REG
1106 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1107 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1108 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1110 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1112 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1113 GET_MODE (SUBREG_REG (out)))))
1114 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
1115 + SUBREG_WORD (out)),
1117 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1118 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1119 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1120 GET_MODE (SUBREG_REG (out)),
1124 #ifdef CLASS_CANNOT_CHANGE_SIZE
1125 || (GET_CODE (SUBREG_REG (out)) == REG
1126 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1127 && (TEST_HARD_REG_BIT
1128 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1129 REGNO (SUBREG_REG (out))))
1130 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1131 != GET_MODE_SIZE (outmode)))
1135 out_subreg_loc = outloc;
1136 outloc = &SUBREG_REG (out);
1138 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1139 if (GET_CODE (out) == MEM
1140 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1143 outmode = GET_MODE (out);
1146 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1147 either M1 is not valid for R or M2 is wider than a word but we only
1148 need one word to store an M2-sized quantity in R.
1150 However, we must reload the inner reg *as well as* the subreg in
1151 that case. In this case, the inner reg is an in-out reload. */
1153 if (out != 0 && GET_CODE (out) == SUBREG
1154 && GET_CODE (SUBREG_REG (out)) == REG
1155 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1156 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out),
1158 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1159 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1161 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1163 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1164 GET_MODE (SUBREG_REG (out)))))))
1166 /* This relies on the fact that emit_reload_insns outputs the
1167 instructions for output reloads of type RELOAD_OTHER in reverse
1168 order of the reloads. Thus if the outer reload is also of type
1169 RELOAD_OTHER, we are guaranteed that this inner reload will be
1170 output after the outer reload. */
1171 dont_remove_subreg = 1;
1172 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1174 find_valid_class (outmode, SUBREG_WORD (out)),
1175 VOIDmode, VOIDmode, 0, 0,
1176 opnum, RELOAD_OTHER);
1179 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1180 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1181 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1182 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1185 /* If IN is a SUBREG of a hard register, make a new REG. This
1186 simplifies some of the cases below. */
1188 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1189 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1190 && ! dont_remove_subreg)
1191 in = gen_rtx_REG (GET_MODE (in),
1192 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
1194 /* Similarly for OUT. */
1195 if (out != 0 && GET_CODE (out) == SUBREG
1196 && GET_CODE (SUBREG_REG (out)) == REG
1197 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1198 && ! dont_remove_subreg)
1199 out = gen_rtx_REG (GET_MODE (out),
1200 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
1202 /* Narrow down the class of register wanted if that is
1203 desirable on this machine for efficiency. */
1205 class = PREFERRED_RELOAD_CLASS (in, class);
1207 /* Output reloads may need analogous treatment, different in detail. */
1208 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1210 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1213 /* Make sure we use a class that can handle the actual pseudo
1214 inside any subreg. For example, on the 386, QImode regs
1215 can appear within SImode subregs. Although GENERAL_REGS
1216 can handle SImode, QImode needs a smaller class. */
1217 #ifdef LIMIT_RELOAD_CLASS
1219 class = LIMIT_RELOAD_CLASS (inmode, class);
1220 else if (in != 0 && GET_CODE (in) == SUBREG)
1221 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1224 class = LIMIT_RELOAD_CLASS (outmode, class);
1225 if (out != 0 && GET_CODE (out) == SUBREG)
1226 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1229 /* Verify that this class is at least possible for the mode that
1231 if (this_insn_is_asm)
1233 enum machine_mode mode;
1234 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1238 if (mode == VOIDmode)
1240 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1245 outmode = word_mode;
1247 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1248 if (HARD_REGNO_MODE_OK (i, mode)
1249 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1251 int nregs = HARD_REGNO_NREGS (i, mode);
1254 for (j = 1; j < nregs; j++)
1255 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1260 if (i == FIRST_PSEUDO_REGISTER)
1262 error_for_asm (this_insn, "impossible register constraint in `asm'");
1267 /* Optional output reloads are always OK even if we have no register class,
1268 since the function of these reloads is only to have spill_reg_store etc.
1269 set, so that the storing insn can be deleted later. */
1270 if (class == NO_REGS
1271 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1274 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1278 /* See if we need a secondary reload register to move between CLASS
1279 and IN or CLASS and OUT. Get the icode and push any required reloads
1280 needed for each of them if so. */
1282 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1285 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1286 &secondary_in_icode);
1289 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1290 if (out != 0 && GET_CODE (out) != SCRATCH)
1291 secondary_out_reload
1292 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1293 type, &secondary_out_icode);
1296 /* We found no existing reload suitable for re-use.
1297 So add an additional reload. */
1299 #ifdef SECONDARY_MEMORY_NEEDED
1300 /* If a memory location is needed for the copy, make one. */
1301 if (in != 0 && GET_CODE (in) == REG
1302 && REGNO (in) < FIRST_PSEUDO_REGISTER
1303 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1305 get_secondary_mem (in, inmode, opnum, type);
1310 reload_out[i] = out;
1311 reload_reg_class[i] = class;
1312 reload_inmode[i] = inmode;
1313 reload_outmode[i] = outmode;
1314 reload_reg_rtx[i] = 0;
1315 reload_optional[i] = optional;
1316 reload_nongroup[i] = 0;
1318 reload_nocombine[i] = 0;
1319 reload_in_reg[i] = inloc ? *inloc : 0;
1320 reload_out_reg[i] = outloc ? *outloc : 0;
1321 reload_opnum[i] = opnum;
1322 reload_when_needed[i] = type;
1323 reload_secondary_in_reload[i] = secondary_in_reload;
1324 reload_secondary_out_reload[i] = secondary_out_reload;
1325 reload_secondary_in_icode[i] = secondary_in_icode;
1326 reload_secondary_out_icode[i] = secondary_out_icode;
1327 reload_secondary_p[i] = 0;
1331 #ifdef SECONDARY_MEMORY_NEEDED
1332 if (out != 0 && GET_CODE (out) == REG
1333 && REGNO (out) < FIRST_PSEUDO_REGISTER
1334 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1336 get_secondary_mem (out, outmode, opnum, type);
1341 /* We are reusing an existing reload,
1342 but we may have additional information for it.
1343 For example, we may now have both IN and OUT
1344 while the old one may have just one of them. */
1346 /* The modes can be different. If they are, we want to reload in
1347 the larger mode, so that the value is valid for both modes. */
1348 if (inmode != VOIDmode
1349 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (reload_inmode[i]))
1350 reload_inmode[i] = inmode;
1351 if (outmode != VOIDmode
1352 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (reload_outmode[i]))
1353 reload_outmode[i] = outmode;
1356 rtx in_reg = inloc ? *inloc : 0;
1357 /* If we merge reloads for two distinct rtl expressions that
1358 are identical in content, there might be duplicate address
1359 reloads. Remove the extra set now, so that if we later find
1360 that we can inherit this reload, we can get rid of the
1361 address reloads altogether. */
1362 if (reload_in[i] != in && rtx_equal_p (in, reload_in[i]))
1364 /* We must keep the address reload with the lower operand
1366 if (opnum > reload_opnum[i])
1368 remove_address_replacements (in);
1370 in_reg = reload_in_reg[i];
1373 remove_address_replacements (reload_in[i]);
1376 reload_in_reg[i] = in_reg;
1380 reload_out[i] = out;
1381 reload_out_reg[i] = outloc ? *outloc : 0;
1383 if (reg_class_subset_p (class, reload_reg_class[i]))
1384 reload_reg_class[i] = class;
1385 reload_optional[i] &= optional;
1386 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1387 opnum, reload_opnum[i]))
1388 reload_when_needed[i] = RELOAD_OTHER;
1389 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1392 /* If the ostensible rtx being reload differs from the rtx found
1393 in the location to substitute, this reload is not safe to combine
1394 because we cannot reliably tell whether it appears in the insn. */
1396 if (in != 0 && in != *inloc)
1397 reload_nocombine[i] = 1;
1400 /* This was replaced by changes in find_reloads_address_1 and the new
1401 function inc_for_reload, which go with a new meaning of reload_inc. */
1403 /* If this is an IN/OUT reload in an insn that sets the CC,
1404 it must be for an autoincrement. It doesn't work to store
1405 the incremented value after the insn because that would clobber the CC.
1406 So we must do the increment of the value reloaded from,
1407 increment it, store it back, then decrement again. */
1408 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1412 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1413 /* If we did not find a nonzero amount-to-increment-by,
1414 that contradicts the belief that IN is being incremented
1415 in an address in this insn. */
1416 if (reload_inc[i] == 0)
1421 /* If we will replace IN and OUT with the reload-reg,
1422 record where they are located so that substitution need
1423 not do a tree walk. */
1425 if (replace_reloads)
1429 register struct replacement *r = &replacements[n_replacements++];
1431 r->subreg_loc = in_subreg_loc;
1435 if (outloc != 0 && outloc != inloc)
1437 register struct replacement *r = &replacements[n_replacements++];
1440 r->subreg_loc = out_subreg_loc;
1445 /* If this reload is just being introduced and it has both
1446 an incoming quantity and an outgoing quantity that are
1447 supposed to be made to match, see if either one of the two
1448 can serve as the place to reload into.
1450 If one of them is acceptable, set reload_reg_rtx[i]
1453 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1455 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1457 reload_reg_class[i], i,
1458 earlyclobber_operand_p (out));
1460 /* If the outgoing register already contains the same value
1461 as the incoming one, we can dispense with loading it.
1462 The easiest way to tell the caller that is to give a phony
1463 value for the incoming operand (same as outgoing one). */
1464 if (reload_reg_rtx[i] == out
1465 && (GET_CODE (in) == REG || CONSTANT_P (in))
1466 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1467 static_reload_reg_p, i, inmode))
1471 /* If this is an input reload and the operand contains a register that
1472 dies in this insn and is used nowhere else, see if it is the right class
1473 to be used for this reload. Use it if so. (This occurs most commonly
1474 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1475 this if it is also an output reload that mentions the register unless
1476 the output is a SUBREG that clobbers an entire register.
1478 Note that the operand might be one of the spill regs, if it is a
1479 pseudo reg and we are in a block where spilling has not taken place.
1480 But if there is no spilling in this block, that is OK.
1481 An explicitly used hard reg cannot be a spill reg. */
1483 if (reload_reg_rtx[i] == 0 && in != 0)
1488 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1489 if (REG_NOTE_KIND (note) == REG_DEAD
1490 && GET_CODE (XEXP (note, 0)) == REG
1491 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1492 && reg_mentioned_p (XEXP (note, 0), in)
1493 && ! refers_to_regno_for_reload_p (regno,
1495 + HARD_REGNO_NREGS (regno,
1497 PATTERN (this_insn), inloc)
1498 /* If this is also an output reload, IN cannot be used as
1499 the reload register if it is set in this insn unless IN
1501 && (out == 0 || in == out
1502 || ! hard_reg_set_here_p (regno,
1504 + HARD_REGNO_NREGS (regno,
1506 PATTERN (this_insn)))
1507 /* ??? Why is this code so different from the previous?
1508 Is there any simple coherent way to describe the two together?
1509 What's going on here. */
1511 || (GET_CODE (in) == SUBREG
1512 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1514 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1515 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1516 /* Make sure the operand fits in the reg that dies. */
1517 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1518 && HARD_REGNO_MODE_OK (regno, inmode)
1519 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1520 && HARD_REGNO_MODE_OK (regno, outmode)
1521 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1522 && !fixed_regs[regno])
1524 reload_reg_rtx[i] = gen_rtx_REG (inmode, regno);
1530 output_reloadnum = i;
1535 /* Record an additional place we must replace a value
1536 for which we have already recorded a reload.
1537 RELOADNUM is the value returned by push_reload
1538 when the reload was recorded.
1539 This is used in insn patterns that use match_dup. */
1542 push_replacement (loc, reloadnum, mode)
1545 enum machine_mode mode;
1547 if (replace_reloads)
1549 register struct replacement *r = &replacements[n_replacements++];
1550 r->what = reloadnum;
1557 /* Transfer all replacements that used to be in reload FROM to be in
1561 transfer_replacements (to, from)
1566 for (i = 0; i < n_replacements; i++)
1567 if (replacements[i].what == from)
1568 replacements[i].what = to;
1571 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1572 or a subpart of it. If we have any replacements registered for IN_RTX,
1573 cancel the reloads that were supposed to load them.
1574 Return non-zero if we canceled any reloads. */
1576 remove_address_replacements (in_rtx)
1580 char reload_flags[MAX_RELOADS];
1581 int something_changed = 0;
1583 bzero (reload_flags, sizeof reload_flags);
1584 for (i = 0, j = 0; i < n_replacements; i++)
1586 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1587 reload_flags[replacements[i].what] |= 1;
1590 replacements[j++] = replacements[i];
1591 reload_flags[replacements[i].what] |= 2;
1594 /* Note that the following store must be done before the recursive calls. */
1597 for (i = n_reloads - 1; i >= 0; i--)
1599 if (reload_flags[i] == 1)
1601 deallocate_reload_reg (i);
1602 remove_address_replacements (reload_in[i]);
1604 something_changed = 1;
1607 return something_changed;
1610 /* Return non-zero if IN contains a piece of rtl that has the address LOC */
1612 loc_mentioned_in_p (loc, in)
1615 enum rtx_code code = GET_CODE (in);
1616 char *fmt = GET_RTX_FORMAT (code);
1619 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1621 if (loc == &XEXP (in, i))
1625 if (loc_mentioned_in_p (loc, XEXP (in, i)))
1628 else if (fmt[i] == 'E')
1629 for (j = XVECLEN (in, i) - 1; i >= 0; i--)
1630 if (loc_mentioned_in_p (loc, XVECEXP (in, i, j)))
1636 /* If there is only one output reload, and it is not for an earlyclobber
1637 operand, try to combine it with a (logically unrelated) input reload
1638 to reduce the number of reload registers needed.
1640 This is safe if the input reload does not appear in
1641 the value being output-reloaded, because this implies
1642 it is not needed any more once the original insn completes.
1644 If that doesn't work, see we can use any of the registers that
1645 die in this insn as a reload register. We can if it is of the right
1646 class and does not appear in the value being output-reloaded. */
1652 int output_reload = -1;
1653 int secondary_out = -1;
1656 /* Find the output reload; return unless there is exactly one
1657 and that one is mandatory. */
1659 for (i = 0; i < n_reloads; i++)
1660 if (reload_out[i] != 0)
1662 if (output_reload >= 0)
1667 if (output_reload < 0 || reload_optional[output_reload])
1670 /* An input-output reload isn't combinable. */
1672 if (reload_in[output_reload] != 0)
1675 /* If this reload is for an earlyclobber operand, we can't do anything. */
1676 if (earlyclobber_operand_p (reload_out[output_reload]))
1679 /* Check each input reload; can we combine it? */
1681 for (i = 0; i < n_reloads; i++)
1682 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1683 /* Life span of this reload must not extend past main insn. */
1684 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1685 && reload_when_needed[i] != RELOAD_FOR_OUTADDR_ADDRESS
1686 && reload_when_needed[i] != RELOAD_OTHER
1687 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1688 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1689 reload_outmode[output_reload]))
1690 && reload_inc[i] == 0
1691 && reload_reg_rtx[i] == 0
1692 #ifdef SECONDARY_MEMORY_NEEDED
1693 /* Don't combine two reloads with different secondary
1694 memory locations. */
1695 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1696 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1697 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1698 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1700 && (SMALL_REGISTER_CLASSES
1701 ? (reload_reg_class[i] == reload_reg_class[output_reload])
1702 : (reg_class_subset_p (reload_reg_class[i],
1703 reload_reg_class[output_reload])
1704 || reg_class_subset_p (reload_reg_class[output_reload],
1705 reload_reg_class[i])))
1706 && (MATCHES (reload_in[i], reload_out[output_reload])
1707 /* Args reversed because the first arg seems to be
1708 the one that we imagine being modified
1709 while the second is the one that might be affected. */
1710 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1712 /* However, if the input is a register that appears inside
1713 the output, then we also can't share.
1714 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1715 If the same reload reg is used for both reg 69 and the
1716 result to be stored in memory, then that result
1717 will clobber the address of the memory ref. */
1718 && ! (GET_CODE (reload_in[i]) == REG
1719 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1720 reload_out[output_reload]))))
1721 && (reg_class_size[(int) reload_reg_class[i]]
1722 || SMALL_REGISTER_CLASSES)
1723 /* We will allow making things slightly worse by combining an
1724 input and an output, but no worse than that. */
1725 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1726 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1730 /* We have found a reload to combine with! */
1731 reload_out[i] = reload_out[output_reload];
1732 reload_out_reg[i] = reload_out_reg[output_reload];
1733 reload_outmode[i] = reload_outmode[output_reload];
1734 /* Mark the old output reload as inoperative. */
1735 reload_out[output_reload] = 0;
1736 /* The combined reload is needed for the entire insn. */
1737 reload_when_needed[i] = RELOAD_OTHER;
1738 /* If the output reload had a secondary reload, copy it. */
1739 if (reload_secondary_out_reload[output_reload] != -1)
1741 reload_secondary_out_reload[i]
1742 = reload_secondary_out_reload[output_reload];
1743 reload_secondary_out_icode[i]
1744 = reload_secondary_out_icode[output_reload];
1747 #ifdef SECONDARY_MEMORY_NEEDED
1748 /* Copy any secondary MEM. */
1749 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1750 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1751 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1753 /* If required, minimize the register class. */
1754 if (reg_class_subset_p (reload_reg_class[output_reload],
1755 reload_reg_class[i]))
1756 reload_reg_class[i] = reload_reg_class[output_reload];
1758 /* Transfer all replacements from the old reload to the combined. */
1759 for (j = 0; j < n_replacements; j++)
1760 if (replacements[j].what == output_reload)
1761 replacements[j].what = i;
1766 /* If this insn has only one operand that is modified or written (assumed
1767 to be the first), it must be the one corresponding to this reload. It
1768 is safe to use anything that dies in this insn for that output provided
1769 that it does not occur in the output (we already know it isn't an
1770 earlyclobber. If this is an asm insn, give up. */
1772 if (INSN_CODE (this_insn) == -1)
1775 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1776 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1777 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1780 /* See if some hard register that dies in this insn and is not used in
1781 the output is the right class. Only works if the register we pick
1782 up can fully hold our output reload. */
1783 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1784 if (REG_NOTE_KIND (note) == REG_DEAD
1785 && GET_CODE (XEXP (note, 0)) == REG
1786 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1787 reload_out[output_reload])
1788 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1789 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1790 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1791 REGNO (XEXP (note, 0)))
1792 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1793 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1794 /* Ensure that a secondary or tertiary reload for this output
1795 won't want this register. */
1796 && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1
1797 || (! (TEST_HARD_REG_BIT
1798 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1799 REGNO (XEXP (note, 0))))
1800 && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1
1801 || ! (TEST_HARD_REG_BIT
1802 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1803 REGNO (XEXP (note, 0)))))))
1804 && ! fixed_regs[REGNO (XEXP (note, 0))])
1806 reload_reg_rtx[output_reload]
1807 = gen_rtx_REG (reload_outmode[output_reload],
1808 REGNO (XEXP (note, 0)));
1813 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1814 See if one of IN and OUT is a register that may be used;
1815 this is desirable since a spill-register won't be needed.
1816 If so, return the register rtx that proves acceptable.
1818 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1819 CLASS is the register class required for the reload.
1821 If FOR_REAL is >= 0, it is the number of the reload,
1822 and in some cases when it can be discovered that OUT doesn't need
1823 to be computed, clear out reload_out[FOR_REAL].
1825 If FOR_REAL is -1, this should not be done, because this call
1826 is just to see if a register can be found, not to find and install it.
1828 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1829 puts an additional constraint on being able to use IN for OUT since
1830 IN must not appear elsewhere in the insn (it is assumed that IN itself
1831 is safe from the earlyclobber). */
1834 find_dummy_reload (real_in, real_out, inloc, outloc,
1835 inmode, outmode, class, for_real, earlyclobber)
1836 rtx real_in, real_out;
1837 rtx *inloc, *outloc;
1838 enum machine_mode inmode, outmode;
1839 enum reg_class class;
1849 /* If operands exceed a word, we can't use either of them
1850 unless they have the same size. */
1851 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1852 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1853 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1856 /* Find the inside of any subregs. */
1857 while (GET_CODE (out) == SUBREG)
1859 out_offset = SUBREG_WORD (out);
1860 out = SUBREG_REG (out);
1862 while (GET_CODE (in) == SUBREG)
1864 in_offset = SUBREG_WORD (in);
1865 in = SUBREG_REG (in);
1868 /* Narrow down the reg class, the same way push_reload will;
1869 otherwise we might find a dummy now, but push_reload won't. */
1870 class = PREFERRED_RELOAD_CLASS (in, class);
1872 /* See if OUT will do. */
1873 if (GET_CODE (out) == REG
1874 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1876 register int regno = REGNO (out) + out_offset;
1877 int nwords = HARD_REGNO_NREGS (regno, outmode);
1880 /* When we consider whether the insn uses OUT,
1881 ignore references within IN. They don't prevent us
1882 from copying IN into OUT, because those refs would
1883 move into the insn that reloads IN.
1885 However, we only ignore IN in its role as this reload.
1886 If the insn uses IN elsewhere and it contains OUT,
1887 that counts. We can't be sure it's the "same" operand
1888 so it might not go through this reload. */
1890 *inloc = const0_rtx;
1892 if (regno < FIRST_PSEUDO_REGISTER
1893 /* A fixed reg that can overlap other regs better not be used
1894 for reloading in any way. */
1895 #ifdef OVERLAPPING_REGNO_P
1896 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1898 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1899 PATTERN (this_insn), outloc))
1902 for (i = 0; i < nwords; i++)
1903 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1909 if (GET_CODE (real_out) == REG)
1912 value = gen_rtx_REG (outmode, regno);
1919 /* Consider using IN if OUT was not acceptable
1920 or if OUT dies in this insn (like the quotient in a divmod insn).
1921 We can't use IN unless it is dies in this insn,
1922 which means we must know accurately which hard regs are live.
1923 Also, the result can't go in IN if IN is used within OUT,
1924 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1925 if (hard_regs_live_known
1926 && GET_CODE (in) == REG
1927 && REGNO (in) < FIRST_PSEUDO_REGISTER
1929 || find_reg_note (this_insn, REG_UNUSED, real_out))
1930 && find_reg_note (this_insn, REG_DEAD, real_in)
1931 && !fixed_regs[REGNO (in)]
1932 && HARD_REGNO_MODE_OK (REGNO (in),
1933 /* The only case where out and real_out might
1934 have different modes is where real_out
1935 is a subreg, and in that case, out
1937 (GET_MODE (out) != VOIDmode
1938 ? GET_MODE (out) : outmode)))
1940 register int regno = REGNO (in) + in_offset;
1941 int nwords = HARD_REGNO_NREGS (regno, inmode);
1943 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1944 && ! hard_reg_set_here_p (regno, regno + nwords,
1945 PATTERN (this_insn))
1947 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1948 PATTERN (this_insn), inloc)))
1951 for (i = 0; i < nwords; i++)
1952 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1958 /* If we were going to use OUT as the reload reg
1959 and changed our mind, it means OUT is a dummy that
1960 dies here. So don't bother copying value to it. */
1961 if (for_real >= 0 && value == real_out)
1962 reload_out[for_real] = 0;
1963 if (GET_CODE (real_in) == REG)
1966 value = gen_rtx_REG (inmode, regno);
1974 /* This page contains subroutines used mainly for determining
1975 whether the IN or an OUT of a reload can serve as the
1978 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1981 earlyclobber_operand_p (x)
1986 for (i = 0; i < n_earlyclobbers; i++)
1987 if (reload_earlyclobbers[i] == x)
1993 /* Return 1 if expression X alters a hard reg in the range
1994 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1995 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1996 X should be the body of an instruction. */
1999 hard_reg_set_here_p (beg_regno, end_regno, x)
2000 register int beg_regno, end_regno;
2003 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2005 register rtx op0 = SET_DEST (x);
2006 while (GET_CODE (op0) == SUBREG)
2007 op0 = SUBREG_REG (op0);
2008 if (GET_CODE (op0) == REG)
2010 register int r = REGNO (op0);
2011 /* See if this reg overlaps range under consideration. */
2013 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
2017 else if (GET_CODE (x) == PARALLEL)
2019 register int i = XVECLEN (x, 0) - 1;
2021 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2028 /* Return 1 if ADDR is a valid memory address for mode MODE,
2029 and check that each pseudo reg has the proper kind of
2033 strict_memory_address_p (mode, addr)
2034 enum machine_mode mode;
2037 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2044 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2045 if they are the same hard reg, and has special hacks for
2046 autoincrement and autodecrement.
2047 This is specifically intended for find_reloads to use
2048 in determining whether two operands match.
2049 X is the operand whose number is the lower of the two.
2051 The value is 2 if Y contains a pre-increment that matches
2052 a non-incrementing address in X. */
2054 /* ??? To be completely correct, we should arrange to pass
2055 for X the output operand and for Y the input operand.
2056 For now, we assume that the output operand has the lower number
2057 because that is natural in (SET output (... input ...)). */
2060 operands_match_p (x, y)
2064 register RTX_CODE code = GET_CODE (x);
2070 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2071 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2072 && GET_CODE (SUBREG_REG (y)) == REG)))
2078 i = REGNO (SUBREG_REG (x));
2079 if (i >= FIRST_PSEUDO_REGISTER)
2081 i += SUBREG_WORD (x);
2086 if (GET_CODE (y) == SUBREG)
2088 j = REGNO (SUBREG_REG (y));
2089 if (j >= FIRST_PSEUDO_REGISTER)
2091 j += SUBREG_WORD (y);
2096 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2097 multiple hard register group, so that for example (reg:DI 0) and
2098 (reg:SI 1) will be considered the same register. */
2099 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2100 && i < FIRST_PSEUDO_REGISTER)
2101 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
2102 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2103 && j < FIRST_PSEUDO_REGISTER)
2104 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
2108 /* If two operands must match, because they are really a single
2109 operand of an assembler insn, then two postincrements are invalid
2110 because the assembler insn would increment only once.
2111 On the other hand, an postincrement matches ordinary indexing
2112 if the postincrement is the output operand. */
2113 if (code == POST_DEC || code == POST_INC)
2114 return operands_match_p (XEXP (x, 0), y);
2115 /* Two preincrements are invalid
2116 because the assembler insn would increment only once.
2117 On the other hand, an preincrement matches ordinary indexing
2118 if the preincrement is the input operand.
2119 In this case, return 2, since some callers need to do special
2120 things when this happens. */
2121 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
2122 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2126 /* Now we have disposed of all the cases
2127 in which different rtx codes can match. */
2128 if (code != GET_CODE (y))
2130 if (code == LABEL_REF)
2131 return XEXP (x, 0) == XEXP (y, 0);
2132 if (code == SYMBOL_REF)
2133 return XSTR (x, 0) == XSTR (y, 0);
2135 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2137 if (GET_MODE (x) != GET_MODE (y))
2140 /* Compare the elements. If any pair of corresponding elements
2141 fail to match, return 0 for the whole things. */
2144 fmt = GET_RTX_FORMAT (code);
2145 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2151 if (XWINT (x, i) != XWINT (y, i))
2156 if (XINT (x, i) != XINT (y, i))
2161 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2164 /* If any subexpression returns 2,
2165 we should return 2 if we are successful. */
2174 if (XVECLEN (x, i) != XVECLEN (y, i))
2176 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2178 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2186 /* It is believed that rtx's at this level will never
2187 contain anything but integers and other rtx's,
2188 except for within LABEL_REFs and SYMBOL_REFs. */
2193 return 1 + success_2;
2196 /* Describe the range of registers or memory referenced by X.
2197 If X is a register, set REG_FLAG and put the first register
2198 number into START and the last plus one into END.
2199 If X is a memory reference, put a base address into BASE
2200 and a range of integer offsets into START and END.
2201 If X is pushing on the stack, we can assume it causes no trouble,
2202 so we set the SAFE field. */
2204 static struct decomposition
2208 struct decomposition val;
2214 if (GET_CODE (x) == MEM)
2216 rtx base, offset = 0;
2217 rtx addr = XEXP (x, 0);
2219 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2220 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2222 val.base = XEXP (addr, 0);
2223 val.start = - GET_MODE_SIZE (GET_MODE (x));
2224 val.end = GET_MODE_SIZE (GET_MODE (x));
2225 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2229 if (GET_CODE (addr) == CONST)
2231 addr = XEXP (addr, 0);
2234 if (GET_CODE (addr) == PLUS)
2236 if (CONSTANT_P (XEXP (addr, 0)))
2238 base = XEXP (addr, 1);
2239 offset = XEXP (addr, 0);
2241 else if (CONSTANT_P (XEXP (addr, 1)))
2243 base = XEXP (addr, 0);
2244 offset = XEXP (addr, 1);
2251 offset = const0_rtx;
2253 if (GET_CODE (offset) == CONST)
2254 offset = XEXP (offset, 0);
2255 if (GET_CODE (offset) == PLUS)
2257 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2259 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2260 offset = XEXP (offset, 0);
2262 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2264 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2265 offset = XEXP (offset, 1);
2269 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2270 offset = const0_rtx;
2273 else if (GET_CODE (offset) != CONST_INT)
2275 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2276 offset = const0_rtx;
2279 if (all_const && GET_CODE (base) == PLUS)
2280 base = gen_rtx_CONST (GET_MODE (base), base);
2282 if (GET_CODE (offset) != CONST_INT)
2285 val.start = INTVAL (offset);
2286 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2290 else if (GET_CODE (x) == REG)
2293 val.start = true_regnum (x);
2296 /* A pseudo with no hard reg. */
2297 val.start = REGNO (x);
2298 val.end = val.start + 1;
2302 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2304 else if (GET_CODE (x) == SUBREG)
2306 if (GET_CODE (SUBREG_REG (x)) != REG)
2307 /* This could be more precise, but it's good enough. */
2308 return decompose (SUBREG_REG (x));
2310 val.start = true_regnum (x);
2312 return decompose (SUBREG_REG (x));
2315 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2317 else if (CONSTANT_P (x)
2318 /* This hasn't been assigned yet, so it can't conflict yet. */
2319 || GET_CODE (x) == SCRATCH)
2326 /* Return 1 if altering Y will not modify the value of X.
2327 Y is also described by YDATA, which should be decompose (Y). */
2330 immune_p (x, y, ydata)
2332 struct decomposition ydata;
2334 struct decomposition xdata;
2337 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2341 if (GET_CODE (y) != MEM)
2343 /* If Y is memory and X is not, Y can't affect X. */
2344 if (GET_CODE (x) != MEM)
2347 xdata = decompose (x);
2349 if (! rtx_equal_p (xdata.base, ydata.base))
2351 /* If bases are distinct symbolic constants, there is no overlap. */
2352 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2354 /* Constants and stack slots never overlap. */
2355 if (CONSTANT_P (xdata.base)
2356 && (ydata.base == frame_pointer_rtx
2357 || ydata.base == hard_frame_pointer_rtx
2358 || ydata.base == stack_pointer_rtx))
2360 if (CONSTANT_P (ydata.base)
2361 && (xdata.base == frame_pointer_rtx
2362 || xdata.base == hard_frame_pointer_rtx
2363 || xdata.base == stack_pointer_rtx))
2365 /* If either base is variable, we don't know anything. */
2370 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2373 /* Similar, but calls decompose. */
2376 safe_from_earlyclobber (op, clobber)
2379 struct decomposition early_data;
2381 early_data = decompose (clobber);
2382 return immune_p (op, clobber, early_data);
2385 /* Main entry point of this file: search the body of INSN
2386 for values that need reloading and record them with push_reload.
2387 REPLACE nonzero means record also where the values occur
2388 so that subst_reloads can be used.
2390 IND_LEVELS says how many levels of indirection are supported by this
2391 machine; a value of zero means that a memory reference is not a valid
2394 LIVE_KNOWN says we have valid information about which hard
2395 regs are live at each point in the program; this is true when
2396 we are called from global_alloc but false when stupid register
2397 allocation has been done.
2399 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2400 which is nonnegative if the reg has been commandeered for reloading into.
2401 It is copied into STATIC_RELOAD_REG_P and referenced from there
2402 by various subroutines.
2404 Return TRUE if some operands need to be changed, because of swapping
2405 commutative operands, reg_equiv_address substitution, or whatever. */
2408 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2410 int replace, ind_levels;
2412 short *reload_reg_p;
2414 #ifdef REGISTER_CONSTRAINTS
2416 register int insn_code_number;
2419 /* These start out as the constraints for the insn
2420 and they are chewed up as we consider alternatives. */
2421 char *constraints[MAX_RECOG_OPERANDS];
2422 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2424 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2425 char pref_or_nothing[MAX_RECOG_OPERANDS];
2426 /* Nonzero for a MEM operand whose entire address needs a reload. */
2427 int address_reloaded[MAX_RECOG_OPERANDS];
2428 /* Value of enum reload_type to use for operand. */
2429 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2430 /* Value of enum reload_type to use within address of operand. */
2431 enum reload_type address_type[MAX_RECOG_OPERANDS];
2432 /* Save the usage of each operand. */
2433 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2434 int no_input_reloads = 0, no_output_reloads = 0;
2436 int this_alternative[MAX_RECOG_OPERANDS];
2437 char this_alternative_win[MAX_RECOG_OPERANDS];
2438 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2439 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2440 int this_alternative_matches[MAX_RECOG_OPERANDS];
2442 int goal_alternative[MAX_RECOG_OPERANDS];
2443 int this_alternative_number;
2444 int goal_alternative_number;
2445 int operand_reloadnum[MAX_RECOG_OPERANDS];
2446 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2447 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2448 char goal_alternative_win[MAX_RECOG_OPERANDS];
2449 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2450 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2451 int goal_alternative_swapped;
2455 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2456 rtx substed_operand[MAX_RECOG_OPERANDS];
2457 rtx body = PATTERN (insn);
2458 rtx set = single_set (insn);
2459 int goal_earlyclobber, this_earlyclobber;
2460 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2462 /* Cache the last regno for the last pseudo we did an output reload
2463 for in case the next insn uses it. */
2464 static int last_output_reload_regno = -1;
2469 n_earlyclobbers = 0;
2470 replace_reloads = replace;
2471 hard_regs_live_known = live_known;
2472 static_reload_reg_p = reload_reg_p;
2474 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2475 neither are insns that SET cc0. Insns that use CC0 are not allowed
2476 to have any input reloads. */
2477 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2478 no_output_reloads = 1;
2481 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2482 no_input_reloads = 1;
2483 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2484 no_output_reloads = 1;
2487 #ifdef SECONDARY_MEMORY_NEEDED
2488 /* The eliminated forms of any secondary memory locations are per-insn, so
2489 clear them out here. */
2491 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2494 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2495 is cheap to move between them. If it is not, there may not be an insn
2496 to do the copy, so we may need a reload. */
2497 if (GET_CODE (body) == SET
2498 && GET_CODE (SET_DEST (body)) == REG
2499 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2500 && GET_CODE (SET_SRC (body)) == REG
2501 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2502 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2503 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2506 extract_insn (insn);
2508 noperands = reload_n_operands = recog_n_operands;
2509 n_alternatives = recog_n_alternatives;
2511 /* Just return "no reloads" if insn has no operands with constraints. */
2512 if (noperands == 0 || n_alternatives == 0)
2515 insn_code_number = INSN_CODE (insn);
2516 this_insn_is_asm = insn_code_number < 0;
2518 bcopy ((char *) recog_operand_mode, (char *) operand_mode,
2519 noperands * sizeof (enum machine_mode));
2520 bcopy ((char *) recog_constraints, (char *) constraints,
2521 noperands * sizeof (char *));
2525 /* If we will need to know, later, whether some pair of operands
2526 are the same, we must compare them now and save the result.
2527 Reloading the base and index registers will clobber them
2528 and afterward they will fail to match. */
2530 for (i = 0; i < noperands; i++)
2535 substed_operand[i] = recog_operand[i];
2538 modified[i] = RELOAD_READ;
2540 /* Scan this operand's constraint to see if it is an output operand,
2541 an in-out operand, is commutative, or should match another. */
2546 modified[i] = RELOAD_WRITE;
2548 modified[i] = RELOAD_READ_WRITE;
2551 /* The last operand should not be marked commutative. */
2552 if (i == noperands - 1)
2557 else if (c >= '0' && c <= '9')
2560 operands_match[c][i]
2561 = operands_match_p (recog_operand[c], recog_operand[i]);
2563 /* An operand may not match itself. */
2567 /* If C can be commuted with C+1, and C might need to match I,
2568 then C+1 might also need to match I. */
2569 if (commutative >= 0)
2571 if (c == commutative || c == commutative + 1)
2573 int other = c + (c == commutative ? 1 : -1);
2574 operands_match[other][i]
2575 = operands_match_p (recog_operand[other], recog_operand[i]);
2577 if (i == commutative || i == commutative + 1)
2579 int other = i + (i == commutative ? 1 : -1);
2580 operands_match[c][other]
2581 = operands_match_p (recog_operand[c], recog_operand[other]);
2583 /* Note that C is supposed to be less than I.
2584 No need to consider altering both C and I because in
2585 that case we would alter one into the other. */
2591 /* Examine each operand that is a memory reference or memory address
2592 and reload parts of the addresses into index registers.
2593 Also here any references to pseudo regs that didn't get hard regs
2594 but are equivalent to constants get replaced in the insn itself
2595 with those constants. Nobody will ever see them again.
2597 Finally, set up the preferred classes of each operand. */
2599 for (i = 0; i < noperands; i++)
2601 register RTX_CODE code = GET_CODE (recog_operand[i]);
2603 address_reloaded[i] = 0;
2604 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2605 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2608 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2609 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2612 if (*constraints[i] == 0)
2613 /* Ignore things like match_operator operands. */
2615 else if (constraints[i][0] == 'p')
2617 find_reloads_address (VOIDmode, NULL_PTR,
2618 recog_operand[i], recog_operand_loc[i],
2619 i, operand_type[i], ind_levels, insn);
2621 /* If we now have a simple operand where we used to have a
2622 PLUS or MULT, re-recognize and try again. */
2623 if ((GET_RTX_CLASS (GET_CODE (*recog_operand_loc[i])) == 'o'
2624 || GET_CODE (*recog_operand_loc[i]) == SUBREG)
2625 && (GET_CODE (recog_operand[i]) == MULT
2626 || GET_CODE (recog_operand[i]) == PLUS))
2628 INSN_CODE (insn) = -1;
2629 retval = find_reloads (insn, replace, ind_levels, live_known,
2634 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2636 else if (code == MEM)
2639 = find_reloads_address (GET_MODE (recog_operand[i]),
2640 recog_operand_loc[i],
2641 XEXP (recog_operand[i], 0),
2642 &XEXP (recog_operand[i], 0),
2643 i, address_type[i], ind_levels, insn);
2644 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2646 else if (code == SUBREG)
2648 rtx reg = SUBREG_REG (recog_operand[i]);
2650 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2653 && &SET_DEST (set) == recog_operand_loc[i],
2656 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2657 that didn't get a hard register, emit a USE with a REG_EQUAL
2658 note in front so that we might inherit a previous, possibly
2662 && GET_CODE (op) == MEM
2663 && GET_CODE (reg) == REG
2664 && (GET_MODE_SIZE (GET_MODE (reg))
2665 >= GET_MODE_SIZE (GET_MODE (op))))
2666 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode, reg), insn))
2667 = gen_rtx_EXPR_LIST (REG_EQUAL,
2668 reg_equiv_memory_loc[REGNO (reg)], NULL_RTX);
2670 substed_operand[i] = recog_operand[i] = op;
2672 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2673 /* We can get a PLUS as an "operand" as a result of register
2674 elimination. See eliminate_regs and gen_reload. We handle
2675 a unary operator by reloading the operand. */
2676 substed_operand[i] = recog_operand[i]
2677 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2678 ind_levels, 0, insn);
2679 else if (code == REG)
2681 /* This is equivalent to calling find_reloads_toplev.
2682 The code is duplicated for speed.
2683 When we find a pseudo always equivalent to a constant,
2684 we replace it by the constant. We must be sure, however,
2685 that we don't try to replace it in the insn in which it
2687 register int regno = REGNO (recog_operand[i]);
2688 if (reg_equiv_constant[regno] != 0
2689 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2691 /* Record the existing mode so that the check if constants are
2692 allowed will work when operand_mode isn't specified. */
2694 if (operand_mode[i] == VOIDmode)
2695 operand_mode[i] = GET_MODE (recog_operand[i]);
2697 substed_operand[i] = recog_operand[i]
2698 = reg_equiv_constant[regno];
2700 if (reg_equiv_memory_loc[regno] != 0
2701 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2702 /* We need not give a valid is_set_dest argument since the case
2703 of a constant equivalence was checked above. */
2704 substed_operand[i] = recog_operand[i]
2705 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2706 ind_levels, 0, insn);
2708 /* If the operand is still a register (we didn't replace it with an
2709 equivalent), get the preferred class to reload it into. */
2710 code = GET_CODE (recog_operand[i]);
2712 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2713 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2715 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2716 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2720 /* If we made any reloads for addresses, see if they violate a
2721 "no input reloads" requirement for this insn. */
2722 if (no_input_reloads)
2723 for (i = 0; i < n_reloads; i++)
2724 if (reload_in[i] != 0)
2728 /* If this is simply a copy from operand 1 to operand 0, merge the
2729 preferred classes for the operands. */
2730 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2731 && recog_operand[1] == SET_SRC (set))
2733 preferred_class[0] = preferred_class[1]
2734 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2735 pref_or_nothing[0] |= pref_or_nothing[1];
2736 pref_or_nothing[1] |= pref_or_nothing[0];
2739 /* Now see what we need for pseudo-regs that didn't get hard regs
2740 or got the wrong kind of hard reg. For this, we must consider
2741 all the operands together against the register constraints. */
2743 best = MAX_RECOG_OPERANDS * 2 + 600;
2746 goal_alternative_swapped = 0;
2749 /* The constraints are made of several alternatives.
2750 Each operand's constraint looks like foo,bar,... with commas
2751 separating the alternatives. The first alternatives for all
2752 operands go together, the second alternatives go together, etc.
2754 First loop over alternatives. */
2756 for (this_alternative_number = 0;
2757 this_alternative_number < n_alternatives;
2758 this_alternative_number++)
2760 /* Loop over operands for one constraint alternative. */
2761 /* LOSERS counts those that don't fit this alternative
2762 and would require loading. */
2764 /* BAD is set to 1 if it some operand can't fit this alternative
2765 even after reloading. */
2767 /* REJECT is a count of how undesirable this alternative says it is
2768 if any reloading is required. If the alternative matches exactly
2769 then REJECT is ignored, but otherwise it gets this much
2770 counted against it in addition to the reloading needed. Each
2771 ? counts three times here since we want the disparaging caused by
2772 a bad register class to only count 1/3 as much. */
2775 this_earlyclobber = 0;
2777 for (i = 0; i < noperands; i++)
2779 register char *p = constraints[i];
2780 register int win = 0;
2781 /* 0 => this operand can be reloaded somehow for this alternative */
2783 /* 0 => this operand can be reloaded if the alternative allows regs. */
2786 register rtx operand = recog_operand[i];
2788 /* Nonzero means this is a MEM that must be reloaded into a reg
2789 regardless of what the constraint says. */
2790 int force_reload = 0;
2792 /* Nonzero if a constant forced into memory would be OK for this
2795 int earlyclobber = 0;
2797 /* If the predicate accepts a unary operator, it means that
2798 we need to reload the operand, but do not do this for
2799 match_operator and friends. */
2800 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2801 operand = XEXP (operand, 0);
2803 /* If the operand is a SUBREG, extract
2804 the REG or MEM (or maybe even a constant) within.
2805 (Constants can occur as a result of reg_equiv_constant.) */
2807 while (GET_CODE (operand) == SUBREG)
2809 offset += SUBREG_WORD (operand);
2810 operand = SUBREG_REG (operand);
2811 /* Force reload if this is a constant or PLUS or if there may
2812 be a problem accessing OPERAND in the outer mode. */
2813 if (CONSTANT_P (operand)
2814 || GET_CODE (operand) == PLUS
2815 /* We must force a reload of paradoxical SUBREGs
2816 of a MEM because the alignment of the inner value
2817 may not be enough to do the outer reference. On
2818 big-endian machines, it may also reference outside
2821 On machines that extend byte operations and we have a
2822 SUBREG where both the inner and outer modes are no wider
2823 than a word and the inner mode is narrower, is integral,
2824 and gets extended when loaded from memory, combine.c has
2825 made assumptions about the behavior of the machine in such
2826 register access. If the data is, in fact, in memory we
2827 must always load using the size assumed to be in the
2828 register and let the insn do the different-sized
2831 This is doubly true if WORD_REGISTER_OPERATIONS. In
2832 this case eliminate_regs has left non-paradoxical
2833 subregs for push_reloads to see. Make sure it does
2834 by forcing the reload.
2836 ??? When is it right at this stage to have a subreg
2837 of a mem that is _not_ to be handled specialy? IMO
2838 those should have been reduced to just a mem. */
2839 || ((GET_CODE (operand) == MEM
2840 || (GET_CODE (operand)== REG
2841 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2842 #ifndef WORD_REGISTER_OPERATIONS
2843 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2844 < BIGGEST_ALIGNMENT)
2845 && (GET_MODE_SIZE (operand_mode[i])
2846 > GET_MODE_SIZE (GET_MODE (operand))))
2847 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2848 #ifdef LOAD_EXTEND_OP
2849 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2850 && (GET_MODE_SIZE (GET_MODE (operand))
2852 && (GET_MODE_SIZE (operand_mode[i])
2853 > GET_MODE_SIZE (GET_MODE (operand)))
2854 && INTEGRAL_MODE_P (GET_MODE (operand))
2855 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2860 /* Subreg of a hard reg which can't handle the subreg's mode
2861 or which would handle that mode in the wrong number of
2862 registers for subregging to work. */
2863 || (GET_CODE (operand) == REG
2864 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2865 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2866 && (GET_MODE_SIZE (GET_MODE (operand))
2868 && ((GET_MODE_SIZE (GET_MODE (operand))
2870 != HARD_REGNO_NREGS (REGNO (operand),
2871 GET_MODE (operand))))
2872 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2877 this_alternative[i] = (int) NO_REGS;
2878 this_alternative_win[i] = 0;
2879 this_alternative_offmemok[i] = 0;
2880 this_alternative_earlyclobber[i] = 0;
2881 this_alternative_matches[i] = -1;
2883 /* An empty constraint or empty alternative
2884 allows anything which matched the pattern. */
2885 if (*p == 0 || *p == ',')
2888 /* Scan this alternative's specs for this operand;
2889 set WIN if the operand fits any letter in this alternative.
2890 Otherwise, clear BADOP if this operand could
2891 fit some letter after reloads,
2892 or set WINREG if this operand could fit after reloads
2893 provided the constraint allows some registers. */
2895 while (*p && (c = *p++) != ',')
2904 /* The last operand should not be marked commutative. */
2905 if (i != noperands - 1)
2918 /* Ignore rest of this alternative as far as
2919 reloading is concerned. */
2920 while (*p && *p != ',') p++;
2929 this_alternative_matches[i] = c;
2930 /* We are supposed to match a previous operand.
2931 If we do, we win if that one did.
2932 If we do not, count both of the operands as losers.
2933 (This is too conservative, since most of the time
2934 only a single reload insn will be needed to make
2935 the two operands win. As a result, this alternative
2936 may be rejected when it is actually desirable.) */
2937 if ((swapped && (c != commutative || i != commutative + 1))
2938 /* If we are matching as if two operands were swapped,
2939 also pretend that operands_match had been computed
2941 But if I is the second of those and C is the first,
2942 don't exchange them, because operands_match is valid
2943 only on one side of its diagonal. */
2945 [(c == commutative || c == commutative + 1)
2946 ? 2*commutative + 1 - c : c]
2947 [(i == commutative || i == commutative + 1)
2948 ? 2*commutative + 1 - i : i])
2949 : operands_match[c][i])
2951 /* If we are matching a non-offsettable address where an
2952 offsettable address was expected, then we must reject
2953 this combination, because we can't reload it. */
2954 if (this_alternative_offmemok[c]
2955 && GET_CODE (recog_operand[c]) == MEM
2956 && this_alternative[c] == (int) NO_REGS
2957 && ! this_alternative_win[c])
2960 win = this_alternative_win[c];
2964 /* Operands don't match. */
2966 /* Retroactively mark the operand we had to match
2967 as a loser, if it wasn't already. */
2968 if (this_alternative_win[c])
2970 this_alternative_win[c] = 0;
2971 if (this_alternative[c] == (int) NO_REGS)
2973 /* But count the pair only once in the total badness of
2974 this alternative, if the pair can be a dummy reload. */
2976 = find_dummy_reload (recog_operand[i], recog_operand[c],
2977 recog_operand_loc[i], recog_operand_loc[c],
2978 operand_mode[i], operand_mode[c],
2979 this_alternative[c], -1,
2980 this_alternative_earlyclobber[c]);
2985 /* This can be fixed with reloads if the operand
2986 we are supposed to match can be fixed with reloads. */
2988 this_alternative[i] = this_alternative[c];
2990 /* If we have to reload this operand and some previous
2991 operand also had to match the same thing as this
2992 operand, we don't know how to do that. So reject this
2994 if (! win || force_reload)
2995 for (j = 0; j < i; j++)
2996 if (this_alternative_matches[j]
2997 == this_alternative_matches[i])
3003 /* All necessary reloads for an address_operand
3004 were handled in find_reloads_address. */
3005 this_alternative[i] = (int) BASE_REG_CLASS;
3012 if (GET_CODE (operand) == MEM
3013 || (GET_CODE (operand) == REG
3014 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3015 && reg_renumber[REGNO (operand)] < 0))
3017 if (CONSTANT_P (operand)
3018 /* force_const_mem does not accept HIGH. */
3019 && GET_CODE (operand) != HIGH)
3025 if (GET_CODE (operand) == MEM
3026 && ! address_reloaded[i]
3027 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3028 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3033 if (GET_CODE (operand) == MEM
3034 && ! address_reloaded[i]
3035 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3036 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3040 /* Memory operand whose address is not offsettable. */
3044 if (GET_CODE (operand) == MEM
3045 && ! (ind_levels ? offsettable_memref_p (operand)
3046 : offsettable_nonstrict_memref_p (operand))
3047 /* Certain mem addresses will become offsettable
3048 after they themselves are reloaded. This is important;
3049 we don't want our own handling of unoffsettables
3050 to override the handling of reg_equiv_address. */
3051 && !(GET_CODE (XEXP (operand, 0)) == REG
3053 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3057 /* Memory operand whose address is offsettable. */
3061 if ((GET_CODE (operand) == MEM
3062 /* If IND_LEVELS, find_reloads_address won't reload a
3063 pseudo that didn't get a hard reg, so we have to
3064 reject that case. */
3065 && ((ind_levels ? offsettable_memref_p (operand)
3066 : offsettable_nonstrict_memref_p (operand))
3067 /* A reloaded address is offsettable because it is now
3068 just a simple register indirect. */
3069 || address_reloaded[i]))
3070 || (GET_CODE (operand) == REG
3071 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3072 && reg_renumber[REGNO (operand)] < 0
3073 /* If reg_equiv_address is nonzero, we will be
3074 loading it into a register; hence it will be
3075 offsettable, but we cannot say that reg_equiv_mem
3076 is offsettable without checking. */
3077 && ((reg_equiv_mem[REGNO (operand)] != 0
3078 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3079 || (reg_equiv_address[REGNO (operand)] != 0))))
3081 /* force_const_mem does not accept HIGH. */
3082 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3083 || GET_CODE (operand) == MEM)
3090 /* Output operand that is stored before the need for the
3091 input operands (and their index registers) is over. */
3092 earlyclobber = 1, this_earlyclobber = 1;
3096 #ifndef REAL_ARITHMETIC
3097 /* Match any floating double constant, but only if
3098 we can examine the bits of it reliably. */
3099 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3100 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3101 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
3104 if (GET_CODE (operand) == CONST_DOUBLE)
3109 if (GET_CODE (operand) == CONST_DOUBLE)
3115 if (GET_CODE (operand) == CONST_DOUBLE
3116 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3121 if (GET_CODE (operand) == CONST_INT
3122 || (GET_CODE (operand) == CONST_DOUBLE
3123 && GET_MODE (operand) == VOIDmode))
3126 if (CONSTANT_P (operand)
3127 #ifdef LEGITIMATE_PIC_OPERAND_P
3128 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3135 if (GET_CODE (operand) == CONST_INT
3136 || (GET_CODE (operand) == CONST_DOUBLE
3137 && GET_MODE (operand) == VOIDmode))
3149 if (GET_CODE (operand) == CONST_INT
3150 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3160 /* A PLUS is never a valid operand, but reload can make
3161 it from a register when eliminating registers. */
3162 && GET_CODE (operand) != PLUS
3163 /* A SCRATCH is not a valid operand. */
3164 && GET_CODE (operand) != SCRATCH
3165 #ifdef LEGITIMATE_PIC_OPERAND_P
3166 && (! CONSTANT_P (operand)
3168 || LEGITIMATE_PIC_OPERAND_P (operand))
3170 && (GENERAL_REGS == ALL_REGS
3171 || GET_CODE (operand) != REG
3172 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3173 && reg_renumber[REGNO (operand)] < 0)))
3175 /* Drop through into 'r' case */
3179 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3182 #ifdef EXTRA_CONSTRAINT
3188 if (EXTRA_CONSTRAINT (operand, c))
3195 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3198 if (GET_MODE (operand) == BLKmode)
3201 if (GET_CODE (operand) == REG
3202 && reg_fits_class_p (operand, this_alternative[i],
3203 offset, GET_MODE (recog_operand[i])))
3210 /* If this operand could be handled with a reg,
3211 and some reg is allowed, then this operand can be handled. */
3212 if (winreg && this_alternative[i] != (int) NO_REGS)
3215 /* Record which operands fit this alternative. */
3216 this_alternative_earlyclobber[i] = earlyclobber;
3217 if (win && ! force_reload)
3218 this_alternative_win[i] = 1;
3221 int const_to_mem = 0;
3223 this_alternative_offmemok[i] = offmemok;
3227 /* Alternative loses if it has no regs for a reg operand. */
3228 if (GET_CODE (operand) == REG
3229 && this_alternative[i] == (int) NO_REGS
3230 && this_alternative_matches[i] < 0)
3234 /* If this is a pseudo-register that is set in the previous
3235 insns, there's a good chance that it will already be in a
3236 spill register and we can use that spill register. So
3237 make this case cheaper.
3239 Disabled for egcs. egcs has better inheritance code and
3240 this change causes problems with the improved reload
3241 inheritance code. */
3242 if (GET_CODE (operand) == REG
3243 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3244 && REGNO (operand) == last_output_reload_regno)
3248 /* If this is a constant that is reloaded into the desired
3249 class by copying it to memory first, count that as another
3250 reload. This is consistent with other code and is
3251 required to avoid choosing another alternative when
3252 the constant is moved into memory by this function on
3253 an early reload pass. Note that the test here is
3254 precisely the same as in the code below that calls
3256 if (CONSTANT_P (operand)
3257 /* force_const_mem does not accept HIGH. */
3258 && GET_CODE (operand) != HIGH
3259 && ((PREFERRED_RELOAD_CLASS (operand,
3260 (enum reg_class) this_alternative[i])
3262 || no_input_reloads)
3263 && operand_mode[i] != VOIDmode)
3266 if (this_alternative[i] != (int) NO_REGS)
3270 /* If we can't reload this value at all, reject this
3271 alternative. Note that we could also lose due to
3272 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3275 if (! CONSTANT_P (operand)
3276 && (enum reg_class) this_alternative[i] != NO_REGS
3277 && (PREFERRED_RELOAD_CLASS (operand,
3278 (enum reg_class) this_alternative[i])
3282 /* Alternative loses if it requires a type of reload not
3283 permitted for this insn. We can always reload SCRATCH
3284 and objects with a REG_UNUSED note. */
3285 else if (GET_CODE (operand) != SCRATCH
3286 && modified[i] != RELOAD_READ && no_output_reloads
3287 && ! find_reg_note (insn, REG_UNUSED, operand))
3289 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3294 /* We prefer to reload pseudos over reloading other things,
3295 since such reloads may be able to be eliminated later.
3296 If we are reloading a SCRATCH, we won't be generating any
3297 insns, just using a register, so it is also preferred.
3298 So bump REJECT in other cases. Don't do this in the
3299 case where we are forcing a constant into memory and
3300 it will then win since we don't want to have a different
3301 alternative match then. */
3302 if (! (GET_CODE (operand) == REG
3303 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3304 && GET_CODE (operand) != SCRATCH
3305 && ! (const_to_mem && constmemok))
3308 /* Input reloads can be inherited more often than output
3309 reloads can be removed, so penalize output reloads. */
3310 if (operand_type[i] != RELOAD_FOR_INPUT
3311 && GET_CODE (operand) != SCRATCH)
3315 /* If this operand is a pseudo register that didn't get a hard
3316 reg and this alternative accepts some register, see if the
3317 class that we want is a subset of the preferred class for this
3318 register. If not, but it intersects that class, use the
3319 preferred class instead. If it does not intersect the preferred
3320 class, show that usage of this alternative should be discouraged;
3321 it will be discouraged more still if the register is `preferred
3322 or nothing'. We do this because it increases the chance of
3323 reusing our spill register in a later insn and avoiding a pair
3324 of memory stores and loads.
3326 Don't bother with this if this alternative will accept this
3329 Don't do this for a multiword operand, since it is only a
3330 small win and has the risk of requiring more spill registers,
3331 which could cause a large loss.
3333 Don't do this if the preferred class has only one register
3334 because we might otherwise exhaust the class. */
3337 if (! win && this_alternative[i] != (int) NO_REGS
3338 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3339 && reg_class_size[(int) preferred_class[i]] > 1)
3341 if (! reg_class_subset_p (this_alternative[i],
3342 preferred_class[i]))
3344 /* Since we don't have a way of forming the intersection,
3345 we just do something special if the preferred class
3346 is a subset of the class we have; that's the most
3347 common case anyway. */
3348 if (reg_class_subset_p (preferred_class[i],
3349 this_alternative[i]))
3350 this_alternative[i] = (int) preferred_class[i];
3352 reject += (2 + 2 * pref_or_nothing[i]);
3357 /* Now see if any output operands that are marked "earlyclobber"
3358 in this alternative conflict with any input operands
3359 or any memory addresses. */
3361 for (i = 0; i < noperands; i++)
3362 if (this_alternative_earlyclobber[i]
3363 && this_alternative_win[i])
3365 struct decomposition early_data;
3367 early_data = decompose (recog_operand[i]);
3369 if (modified[i] == RELOAD_READ)
3372 if (this_alternative[i] == NO_REGS)
3374 this_alternative_earlyclobber[i] = 0;
3375 if (this_insn_is_asm)
3376 error_for_asm (this_insn,
3377 "`&' constraint used with no register class");
3382 for (j = 0; j < noperands; j++)
3383 /* Is this an input operand or a memory ref? */
3384 if ((GET_CODE (recog_operand[j]) == MEM
3385 || modified[j] != RELOAD_WRITE)
3387 /* Ignore things like match_operator operands. */
3388 && *recog_constraints[j] != 0
3389 /* Don't count an input operand that is constrained to match
3390 the early clobber operand. */
3391 && ! (this_alternative_matches[j] == i
3392 && rtx_equal_p (recog_operand[i], recog_operand[j]))
3393 /* Is it altered by storing the earlyclobber operand? */
3394 && !immune_p (recog_operand[j], recog_operand[i], early_data))
3396 /* If the output is in a single-reg class,
3397 it's costly to reload it, so reload the input instead. */
3398 if (reg_class_size[this_alternative[i]] == 1
3399 && (GET_CODE (recog_operand[j]) == REG
3400 || GET_CODE (recog_operand[j]) == SUBREG))
3403 this_alternative_win[j] = 0;
3408 /* If an earlyclobber operand conflicts with something,
3409 it must be reloaded, so request this and count the cost. */
3413 this_alternative_win[i] = 0;
3414 for (j = 0; j < noperands; j++)
3415 if (this_alternative_matches[j] == i
3416 && this_alternative_win[j])
3418 this_alternative_win[j] = 0;
3424 /* If one alternative accepts all the operands, no reload required,
3425 choose that alternative; don't consider the remaining ones. */
3428 /* Unswap these so that they are never swapped at `finish'. */
3429 if (commutative >= 0)
3431 recog_operand[commutative] = substed_operand[commutative];
3432 recog_operand[commutative + 1]
3433 = substed_operand[commutative + 1];
3435 for (i = 0; i < noperands; i++)
3437 goal_alternative_win[i] = 1;
3438 goal_alternative[i] = this_alternative[i];
3439 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3440 goal_alternative_matches[i] = this_alternative_matches[i];
3441 goal_alternative_earlyclobber[i]
3442 = this_alternative_earlyclobber[i];
3444 goal_alternative_number = this_alternative_number;
3445 goal_alternative_swapped = swapped;
3446 goal_earlyclobber = this_earlyclobber;
3450 /* REJECT, set by the ! and ? constraint characters and when a register
3451 would be reloaded into a non-preferred class, discourages the use of
3452 this alternative for a reload goal. REJECT is incremented by six
3453 for each ? and two for each non-preferred class. */
3454 losers = losers * 6 + reject;
3456 /* If this alternative can be made to work by reloading,
3457 and it needs less reloading than the others checked so far,
3458 record it as the chosen goal for reloading. */
3459 if (! bad && best > losers)
3461 for (i = 0; i < noperands; i++)
3463 goal_alternative[i] = this_alternative[i];
3464 goal_alternative_win[i] = this_alternative_win[i];
3465 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3466 goal_alternative_matches[i] = this_alternative_matches[i];
3467 goal_alternative_earlyclobber[i]
3468 = this_alternative_earlyclobber[i];
3470 goal_alternative_swapped = swapped;
3472 goal_alternative_number = this_alternative_number;
3473 goal_earlyclobber = this_earlyclobber;
3477 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3478 then we need to try each alternative twice,
3479 the second time matching those two operands
3480 as if we had exchanged them.
3481 To do this, really exchange them in operands.
3483 If we have just tried the alternatives the second time,
3484 return operands to normal and drop through. */
3486 if (commutative >= 0)
3491 register enum reg_class tclass;
3494 recog_operand[commutative] = substed_operand[commutative + 1];
3495 recog_operand[commutative + 1] = substed_operand[commutative];
3497 tclass = preferred_class[commutative];
3498 preferred_class[commutative] = preferred_class[commutative + 1];
3499 preferred_class[commutative + 1] = tclass;
3501 t = pref_or_nothing[commutative];
3502 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3503 pref_or_nothing[commutative + 1] = t;
3505 bcopy ((char *) recog_constraints, (char *) constraints,
3506 noperands * sizeof (char *));
3511 recog_operand[commutative] = substed_operand[commutative];
3512 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3516 /* The operands don't meet the constraints.
3517 goal_alternative describes the alternative
3518 that we could reach by reloading the fewest operands.
3519 Reload so as to fit it. */
3521 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3523 /* No alternative works with reloads?? */
3524 if (insn_code_number >= 0)
3525 fatal_insn ("Unable to generate reloads for:", insn);
3526 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3527 /* Avoid further trouble with this insn. */
3528 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3533 /* Jump to `finish' from above if all operands are valid already.
3534 In that case, goal_alternative_win is all 1. */
3537 /* Right now, for any pair of operands I and J that are required to match,
3539 goal_alternative_matches[J] is I.
3540 Set up goal_alternative_matched as the inverse function:
3541 goal_alternative_matched[I] = J. */
3543 for (i = 0; i < noperands; i++)
3544 goal_alternative_matched[i] = -1;
3546 for (i = 0; i < noperands; i++)
3547 if (! goal_alternative_win[i]
3548 && goal_alternative_matches[i] >= 0)
3549 goal_alternative_matched[goal_alternative_matches[i]] = i;
3551 /* If the best alternative is with operands 1 and 2 swapped,
3552 consider them swapped before reporting the reloads. Update the
3553 operand numbers of any reloads already pushed. */
3555 if (goal_alternative_swapped)
3559 tem = substed_operand[commutative];
3560 substed_operand[commutative] = substed_operand[commutative + 1];
3561 substed_operand[commutative + 1] = tem;
3562 tem = recog_operand[commutative];
3563 recog_operand[commutative] = recog_operand[commutative + 1];
3564 recog_operand[commutative + 1] = tem;
3565 tem = *recog_operand_loc[commutative];
3566 *recog_operand_loc[commutative] = *recog_operand_loc[commutative+1];
3567 *recog_operand_loc[commutative+1] = tem;
3569 for (i = 0; i < n_reloads; i++)
3571 if (reload_opnum[i] == commutative)
3572 reload_opnum[i] = commutative + 1;
3573 else if (reload_opnum[i] == commutative + 1)
3574 reload_opnum[i] = commutative;
3578 for (i = 0; i < noperands; i++)
3580 operand_reloadnum[i] = -1;
3582 /* If this is an earlyclobber operand, we need to widen the scope.
3583 The reload must remain valid from the start of the insn being
3584 reloaded until after the operand is stored into its destination.
3585 We approximate this with RELOAD_OTHER even though we know that we
3586 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3588 One special case that is worth checking is when we have an
3589 output that is earlyclobber but isn't used past the insn (typically
3590 a SCRATCH). In this case, we only need have the reload live
3591 through the insn itself, but not for any of our input or output
3593 But we must not accidentally narrow the scope of an existing
3594 RELOAD_OTHER reload - leave these alone.
3596 In any case, anything needed to address this operand can remain
3597 however they were previously categorized. */
3599 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3601 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3602 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3605 /* Any constants that aren't allowed and can't be reloaded
3606 into registers are here changed into memory references. */
3607 for (i = 0; i < noperands; i++)
3608 if (! goal_alternative_win[i]
3609 && CONSTANT_P (recog_operand[i])
3610 /* force_const_mem does not accept HIGH. */
3611 && GET_CODE (recog_operand[i]) != HIGH
3612 && ((PREFERRED_RELOAD_CLASS (recog_operand[i],
3613 (enum reg_class) goal_alternative[i])
3615 || no_input_reloads)
3616 && operand_mode[i] != VOIDmode)
3618 substed_operand[i] = recog_operand[i]
3619 = find_reloads_toplev (force_const_mem (operand_mode[i],
3621 i, address_type[i], ind_levels, 0, insn);
3622 if (alternative_allows_memconst (recog_constraints[i],
3623 goal_alternative_number))
3624 goal_alternative_win[i] = 1;
3627 /* Record the values of the earlyclobber operands for the caller. */
3628 if (goal_earlyclobber)
3629 for (i = 0; i < noperands; i++)
3630 if (goal_alternative_earlyclobber[i])
3631 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3633 /* Now record reloads for all the operands that need them. */
3634 last_output_reload_regno = -1;
3635 for (i = 0; i < noperands; i++)
3636 if (! goal_alternative_win[i])
3638 /* Operands that match previous ones have already been handled. */
3639 if (goal_alternative_matches[i] >= 0)
3641 /* Handle an operand with a nonoffsettable address
3642 appearing where an offsettable address will do
3643 by reloading the address into a base register.
3645 ??? We can also do this when the operand is a register and
3646 reg_equiv_mem is not offsettable, but this is a bit tricky,
3647 so we don't bother with it. It may not be worth doing. */
3648 else if (goal_alternative_matched[i] == -1
3649 && goal_alternative_offmemok[i]
3650 && GET_CODE (recog_operand[i]) == MEM)
3652 operand_reloadnum[i]
3653 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3654 &XEXP (recog_operand[i], 0), NULL_PTR,
3655 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3656 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3657 reload_inc[operand_reloadnum[i]]
3658 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3660 /* If this operand is an output, we will have made any
3661 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3662 now we are treating part of the operand as an input, so
3663 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3665 if (modified[i] == RELOAD_WRITE)
3667 for (j = 0; j < n_reloads; j++)
3669 if (reload_opnum[j] == i)
3671 if (reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3672 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3673 else if (reload_when_needed[j]
3674 == RELOAD_FOR_OUTADDR_ADDRESS)
3675 reload_when_needed[j] = RELOAD_FOR_INPADDR_ADDRESS;
3680 else if (goal_alternative_matched[i] == -1)
3682 operand_reloadnum[i]
3683 = push_reload ((modified[i] != RELOAD_WRITE
3684 ? recog_operand[i] : 0),
3685 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3686 (modified[i] != RELOAD_WRITE
3687 ? recog_operand_loc[i] : 0),
3688 (modified[i] != RELOAD_READ
3689 ? recog_operand_loc[i] : 0),
3690 (enum reg_class) goal_alternative[i],
3691 (modified[i] == RELOAD_WRITE
3692 ? VOIDmode : operand_mode[i]),
3693 (modified[i] == RELOAD_READ
3694 ? VOIDmode : operand_mode[i]),
3695 (insn_code_number < 0 ? 0
3696 : insn_operand_strict_low[insn_code_number][i]),
3697 0, i, operand_type[i]);
3698 if (modified[i] != RELOAD_READ
3699 && GET_CODE (recog_operand[i]) == REG)
3700 last_output_reload_regno = REGNO (recog_operand[i]);
3702 /* In a matching pair of operands, one must be input only
3703 and the other must be output only.
3704 Pass the input operand as IN and the other as OUT. */
3705 else if (modified[i] == RELOAD_READ
3706 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3708 operand_reloadnum[i]
3709 = push_reload (recog_operand[i],
3710 recog_operand[goal_alternative_matched[i]],
3711 recog_operand_loc[i],
3712 recog_operand_loc[goal_alternative_matched[i]],
3713 (enum reg_class) goal_alternative[i],
3715 operand_mode[goal_alternative_matched[i]],
3716 0, 0, i, RELOAD_OTHER);
3717 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3718 if (GET_CODE (recog_operand[goal_alternative_matched[i]]) == REG)
3719 last_output_reload_regno
3720 = REGNO (recog_operand[goal_alternative_matched[i]]);
3722 else if (modified[i] == RELOAD_WRITE
3723 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3725 operand_reloadnum[goal_alternative_matched[i]]
3726 = push_reload (recog_operand[goal_alternative_matched[i]],
3728 recog_operand_loc[goal_alternative_matched[i]],
3729 recog_operand_loc[i],
3730 (enum reg_class) goal_alternative[i],
3731 operand_mode[goal_alternative_matched[i]],
3733 0, 0, i, RELOAD_OTHER);
3734 operand_reloadnum[i] = output_reloadnum;
3735 if (GET_CODE (recog_operand[i]) == REG)
3736 last_output_reload_regno = REGNO (recog_operand[i]);
3738 else if (insn_code_number >= 0)
3742 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3743 /* Avoid further trouble with this insn. */
3744 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3749 else if (goal_alternative_matched[i] < 0
3750 && goal_alternative_matches[i] < 0
3753 /* For each non-matching operand that's a MEM or a pseudo-register
3754 that didn't get a hard register, make an optional reload.
3755 This may get done even if the insn needs no reloads otherwise. */
3757 rtx operand = recog_operand[i];
3759 while (GET_CODE (operand) == SUBREG)
3760 operand = XEXP (operand, 0);
3761 if ((GET_CODE (operand) == MEM
3762 || (GET_CODE (operand) == REG
3763 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3764 /* If this is only for an output, the optional reload would not
3765 actually cause us to use a register now, just note that
3766 something is stored here. */
3767 && ((enum reg_class) goal_alternative[i] != NO_REGS
3768 || modified[i] == RELOAD_WRITE)
3769 && ! no_input_reloads
3770 /* An optional output reload might allow to delete INSN later.
3771 We mustn't make in-out reloads on insns that are not permitted
3773 If this is an asm, we can't delete it; we must not even call
3774 push_reload for an optional output reload in this case,
3775 because we can't be sure that the constraint allows a register,
3776 and push_reload verifies the constraints for asms. */
3777 && (modified[i] == RELOAD_READ
3778 || (! no_output_reloads && ! this_insn_is_asm)))
3779 operand_reloadnum[i]
3780 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3781 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3782 (modified[i] != RELOAD_WRITE
3783 ? recog_operand_loc[i] : 0),
3784 (modified[i] != RELOAD_READ
3785 ? recog_operand_loc[i] : 0),
3786 (enum reg_class) goal_alternative[i],
3787 (modified[i] == RELOAD_WRITE
3788 ? VOIDmode : operand_mode[i]),
3789 (modified[i] == RELOAD_READ
3790 ? VOIDmode : operand_mode[i]),
3791 (insn_code_number < 0 ? 0
3792 : insn_operand_strict_low[insn_code_number][i]),
3793 1, i, operand_type[i]);
3794 /* If a memory reference remains, yet we can't make an optional
3795 reload, check if this is actually a pseudo register reference;
3796 we then need to emit a USE and/or a CLOBBER so that reload
3797 inheritance will do the right thing. */
3798 else if (replace && GET_CODE (operand) == MEM)
3800 operand = *recog_operand_loc[i];
3802 while (GET_CODE (operand) == SUBREG)
3803 operand = XEXP (operand, 0);
3804 if (GET_CODE (operand) == REG)
3806 if (modified[i] != RELOAD_WRITE)
3807 emit_insn_before (gen_rtx_USE (VOIDmode, operand), insn);
3808 if (modified[i] != RELOAD_READ)
3809 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3813 else if (goal_alternative_matches[i] >= 0
3814 && goal_alternative_win[goal_alternative_matches[i]]
3815 && modified[i] == RELOAD_READ
3816 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3817 && ! no_input_reloads && ! no_output_reloads
3820 /* Similarly, make an optional reload for a pair of matching
3821 objects that are in MEM or a pseudo that didn't get a hard reg. */
3823 rtx operand = recog_operand[i];
3825 while (GET_CODE (operand) == SUBREG)
3826 operand = XEXP (operand, 0);
3827 if ((GET_CODE (operand) == MEM
3828 || (GET_CODE (operand) == REG
3829 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3830 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3832 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3833 = push_reload (recog_operand[goal_alternative_matches[i]],
3835 recog_operand_loc[goal_alternative_matches[i]],
3836 recog_operand_loc[i],
3837 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3838 operand_mode[goal_alternative_matches[i]],
3840 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3843 /* Perform whatever substitutions on the operands we are supposed
3844 to make due to commutativity or replacement of registers
3845 with equivalent constants or memory slots. */
3847 for (i = 0; i < noperands; i++)
3849 /* We only do this on the last pass through reload, because it is
3850 possible for some data (like reg_equiv_address) to be changed during
3851 later passes. Moreover, we loose the opportunity to get a useful
3852 reload_{in,out}_reg when we do these replacements. */
3855 *recog_operand_loc[i] = substed_operand[i];
3857 retval |= (substed_operand[i] != *recog_operand_loc[i]);
3860 /* If this insn pattern contains any MATCH_DUP's, make sure that
3861 they will be substituted if the operands they match are substituted.
3862 Also do now any substitutions we already did on the operands.
3864 Don't do this if we aren't making replacements because we might be
3865 propagating things allocated by frame pointer elimination into places
3866 it doesn't expect. */
3868 if (insn_code_number >= 0 && replace)
3869 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3871 int opno = recog_dup_num[i];
3872 *recog_dup_loc[i] = *recog_operand_loc[opno];
3873 if (operand_reloadnum[opno] >= 0)
3874 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3875 insn_operand_mode[insn_code_number][opno]);
3879 /* This loses because reloading of prior insns can invalidate the equivalence
3880 (or at least find_equiv_reg isn't smart enough to find it any more),
3881 causing this insn to need more reload regs than it needed before.
3882 It may be too late to make the reload regs available.
3883 Now this optimization is done safely in choose_reload_regs. */
3885 /* For each reload of a reg into some other class of reg,
3886 search for an existing equivalent reg (same value now) in the right class.
3887 We can use it as long as we don't need to change its contents. */
3888 for (i = 0; i < n_reloads; i++)
3889 if (reload_reg_rtx[i] == 0
3890 && reload_in[i] != 0
3891 && GET_CODE (reload_in[i]) == REG
3892 && reload_out[i] == 0)
3895 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3896 static_reload_reg_p, 0, reload_inmode[i]);
3897 /* Prevent generation of insn to load the value
3898 because the one we found already has the value. */
3899 if (reload_reg_rtx[i])
3900 reload_in[i] = reload_reg_rtx[i];
3904 /* Perhaps an output reload can be combined with another
3905 to reduce needs by one. */
3906 if (!goal_earlyclobber)
3909 /* If we have a pair of reloads for parts of an address, they are reloading
3910 the same object, the operands themselves were not reloaded, and they
3911 are for two operands that are supposed to match, merge the reloads and
3912 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3914 for (i = 0; i < n_reloads; i++)
3918 for (j = i + 1; j < n_reloads; j++)
3919 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3920 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3921 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3922 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3923 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3924 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS
3925 || reload_when_needed[j] == RELOAD_FOR_INPADDR_ADDRESS
3926 || reload_when_needed[j] == RELOAD_FOR_OUTADDR_ADDRESS)
3927 && rtx_equal_p (reload_in[i], reload_in[j])
3928 && (operand_reloadnum[reload_opnum[i]] < 0
3929 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3930 && (operand_reloadnum[reload_opnum[j]] < 0
3931 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3932 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3933 || (goal_alternative_matches[reload_opnum[j]]
3934 == reload_opnum[i])))
3936 for (k = 0; k < n_replacements; k++)
3937 if (replacements[k].what == j)
3938 replacements[k].what = i;
3940 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3941 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3942 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
3944 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3949 /* Scan all the reloads and update their type.
3950 If a reload is for the address of an operand and we didn't reload
3951 that operand, change the type. Similarly, change the operand number
3952 of a reload when two operands match. If a reload is optional, treat it
3953 as though the operand isn't reloaded.
3955 ??? This latter case is somewhat odd because if we do the optional
3956 reload, it means the object is hanging around. Thus we need only
3957 do the address reload if the optional reload was NOT done.
3959 Change secondary reloads to be the address type of their operand, not
3962 If an operand's reload is now RELOAD_OTHER, change any
3963 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3964 RELOAD_FOR_OTHER_ADDRESS. */
3966 for (i = 0; i < n_reloads; i++)
3968 if (reload_secondary_p[i]
3969 && reload_when_needed[i] == operand_type[reload_opnum[i]])
3970 reload_when_needed[i] = address_type[reload_opnum[i]];
3972 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3973 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3974 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3975 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3976 && (operand_reloadnum[reload_opnum[i]] < 0
3977 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
3979 /* If we have a secondary reload to go along with this reload,
3980 change its type to RELOAD_FOR_OPADDR_ADDR. */
3982 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3983 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
3984 && reload_secondary_in_reload[i] != -1)
3986 int secondary_in_reload = reload_secondary_in_reload[i];
3988 reload_when_needed[secondary_in_reload]
3989 = RELOAD_FOR_OPADDR_ADDR;
3991 /* If there's a tertiary reload we have to change it also. */
3992 if (secondary_in_reload > 0
3993 && reload_secondary_in_reload[secondary_in_reload] != -1)
3994 reload_when_needed[reload_secondary_in_reload[secondary_in_reload]]
3995 = RELOAD_FOR_OPADDR_ADDR;
3998 if ((reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3999 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
4000 && reload_secondary_out_reload[i] != -1)
4002 int secondary_out_reload = reload_secondary_out_reload[i];
4004 reload_when_needed[secondary_out_reload]
4005 = RELOAD_FOR_OPADDR_ADDR;
4007 /* If there's a tertiary reload we have to change it also. */
4008 if (secondary_out_reload
4009 && reload_secondary_out_reload[secondary_out_reload] != -1)
4010 reload_when_needed[reload_secondary_out_reload[secondary_out_reload]]
4011 = RELOAD_FOR_OPADDR_ADDR;
4014 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
4015 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
4016 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
4018 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
4021 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
4022 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
4023 && operand_reloadnum[reload_opnum[i]] >= 0
4024 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
4026 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
4028 if (goal_alternative_matches[reload_opnum[i]] >= 0)
4029 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
4032 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4033 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4034 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4036 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4037 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4038 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4039 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4040 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4041 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4042 This is complicated by the fact that a single operand can have more
4043 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4044 choose_reload_regs without affecting code quality, and cases that
4045 actually fail are extremely rare, so it turns out to be better to fix
4046 the problem here by not generating cases that choose_reload_regs will
4048 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4049 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4051 We can reduce the register pressure by exploiting that a
4052 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4053 does not conflict with any of them, if it is only used for the first of
4054 the RELOAD_FOR_X_ADDRESS reloads. */
4056 int first_op_addr_num = -2;
4057 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4058 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4060 /* We use last_op_addr_reload and the contents of the above arrays
4061 first as flags - -2 means no instance encountered, -1 means exactly
4062 one instance encountered.
4063 If more than one instance has been encountered, we store the reload
4064 number of the first reload of the kind in question; reload numbers
4065 are known to be non-negative. */
4066 for (i = 0; i < noperands; i++)
4067 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4068 for (i = n_reloads - 1; i >= 0; i--)
4070 switch (reload_when_needed[i])
4072 case RELOAD_FOR_OPERAND_ADDRESS:
4073 if (++first_op_addr_num >= 0)
4075 first_op_addr_num = i;
4079 case RELOAD_FOR_INPUT_ADDRESS:
4080 if (++first_inpaddr_num[reload_opnum[i]] >= 0)
4082 first_inpaddr_num[reload_opnum[i]] = i;
4086 case RELOAD_FOR_OUTPUT_ADDRESS:
4087 if (++first_outpaddr_num[reload_opnum[i]] >= 0)
4089 first_outpaddr_num[reload_opnum[i]] = i;
4100 for (i = 0; i < n_reloads; i++)
4102 int first_num, type;
4104 switch (reload_when_needed[i])
4106 case RELOAD_FOR_OPADDR_ADDR:
4107 first_num = first_op_addr_num;
4108 type = RELOAD_FOR_OPERAND_ADDRESS;
4110 case RELOAD_FOR_INPADDR_ADDRESS:
4111 first_num = first_inpaddr_num[reload_opnum[i]];
4112 type = RELOAD_FOR_INPUT_ADDRESS;
4114 case RELOAD_FOR_OUTADDR_ADDRESS:
4115 first_num = first_outpaddr_num[reload_opnum[i]];
4116 type = RELOAD_FOR_OUTPUT_ADDRESS;
4123 else if (i > first_num)
4124 reload_when_needed[i] = type;
4127 /* Check if the only TYPE reload that uses reload I is
4128 reload FIRST_NUM. */
4129 for (j = n_reloads - 1; j > first_num; j--)
4131 if (reload_when_needed[j] == type
4132 && (reload_secondary_p[i]
4133 ? reload_secondary_in_reload[j] == i
4134 : reg_mentioned_p (reload_in[i], reload_in[j])))
4136 reload_when_needed[i] = type;
4145 /* See if we have any reloads that are now allowed to be merged
4146 because we've changed when the reload is needed to
4147 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4148 check for the most common cases. */
4150 for (i = 0; i < n_reloads; i++)
4151 if (reload_in[i] != 0 && reload_out[i] == 0
4152 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
4153 || reload_when_needed[i] == RELOAD_FOR_OPADDR_ADDR
4154 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
4155 for (j = 0; j < n_reloads; j++)
4156 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
4157 && reload_when_needed[j] == reload_when_needed[i]
4158 && MATCHES (reload_in[i], reload_in[j])
4159 && reload_reg_class[i] == reload_reg_class[j]
4160 && !reload_nocombine[i] && !reload_nocombine[j]
4161 && reload_reg_rtx[i] == reload_reg_rtx[j])
4163 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
4164 transfer_replacements (i, j);
4168 /* Set which reloads must use registers not used in any group. Start
4169 with those that conflict with a group and then include ones that
4170 conflict with ones that are already known to conflict with a group. */
4173 for (i = 0; i < n_reloads; i++)
4175 enum machine_mode mode = reload_inmode[i];
4176 enum reg_class class = reload_reg_class[i];
4179 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
4180 mode = reload_outmode[i];
4181 size = CLASS_MAX_NREGS (class, mode);
4184 for (j = 0; j < n_reloads; j++)
4185 if ((CLASS_MAX_NREGS (reload_reg_class[j],
4186 (GET_MODE_SIZE (reload_outmode[j])
4187 > GET_MODE_SIZE (reload_inmode[j]))
4188 ? reload_outmode[j] : reload_inmode[j])
4190 && !reload_optional[j]
4191 && (reload_in[j] != 0 || reload_out[j] != 0
4192 || reload_secondary_p[j])
4193 && reloads_conflict (i, j)
4194 && reg_classes_intersect_p (class, reload_reg_class[j]))
4196 reload_nongroup[i] = 1;
4206 for (i = 0; i < n_reloads; i++)
4208 enum machine_mode mode = reload_inmode[i];
4209 enum reg_class class = reload_reg_class[i];
4212 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
4213 mode = reload_outmode[i];
4214 size = CLASS_MAX_NREGS (class, mode);
4216 if (! reload_nongroup[i] && size == 1)
4217 for (j = 0; j < n_reloads; j++)
4218 if (reload_nongroup[j]
4219 && reloads_conflict (i, j)
4220 && reg_classes_intersect_p (class, reload_reg_class[j]))
4222 reload_nongroup[i] = 1;
4229 #else /* no REGISTER_CONSTRAINTS */
4231 int insn_code_number;
4232 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
4234 rtx body = PATTERN (insn);
4239 n_earlyclobbers = 0;
4240 replace_reloads = replace;
4243 extract_insn (insn);
4245 noperands = reload_n_operands = recog_n_operands;
4247 /* Return if the insn needs no reload processing. */
4251 for (i = 0; i < noperands; i++)
4253 register RTX_CODE code = GET_CODE (recog_operand[i]);
4254 int is_set_dest = GET_CODE (body) == SET && (i == 0);
4256 if (insn_code_number >= 0)
4257 if (insn_operand_address_p[insn_code_number][i])
4258 find_reloads_address (VOIDmode, NULL_PTR,
4259 recog_operand[i], recog_operand_loc[i],
4260 i, RELOAD_FOR_INPUT, ind_levels, insn);
4262 /* In these cases, we can't tell if the operand is an input
4263 or an output, so be conservative. In practice it won't be
4267 find_reloads_address (GET_MODE (recog_operand[i]),
4268 recog_operand_loc[i],
4269 XEXP (recog_operand[i], 0),
4270 &XEXP (recog_operand[i], 0),
4271 i, RELOAD_OTHER, ind_levels, insn);
4273 recog_operand[i] = *recog_operand_loc[i]
4274 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
4275 ind_levels, is_set_dest);
4278 register int regno = REGNO (recog_operand[i]);
4279 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4280 recog_operand[i] = *recog_operand_loc[i]
4281 = reg_equiv_constant[regno];
4282 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4283 that feeds this insn. */
4284 if (reg_equiv_mem[regno] != 0)
4285 recog_operand[i] = *recog_operand_loc[i]
4286 = reg_equiv_mem[regno];
4291 /* Perhaps an output reload can be combined with another
4292 to reduce needs by one. */
4293 if (!goal_earlyclobber)
4295 #endif /* no REGISTER_CONSTRAINTS */
4299 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4300 accepts a memory operand with constant address. */
4303 alternative_allows_memconst (constraint, altnum)
4304 const char *constraint;
4308 /* Skip alternatives before the one requested. */
4311 while (*constraint++ != ',');
4314 /* Scan the requested alternative for 'm' or 'o'.
4315 If one of them is present, this alternative accepts memory constants. */
4316 while ((c = *constraint++) && c != ',' && c != '#')
4317 if (c == 'm' || c == 'o')
4322 /* Scan X for memory references and scan the addresses for reloading.
4323 Also checks for references to "constant" regs that we want to eliminate
4324 and replaces them with the values they stand for.
4325 We may alter X destructively if it contains a reference to such.
4326 If X is just a constant reg, we return the equivalent value
4329 IND_LEVELS says how many levels of indirect addressing this machine
4332 OPNUM and TYPE identify the purpose of the reload.
4334 IS_SET_DEST is true if X is the destination of a SET, which is not
4335 appropriate to be replaced by a constant.
4337 INSN, if nonzero, is the insn in which we do the reload. It is used
4338 to determine if we may generate output reloads, and where to put USEs
4339 for pseudos that we have to replace with stack slots. */
4342 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn)
4345 enum reload_type type;
4350 register RTX_CODE code = GET_CODE (x);
4352 register char *fmt = GET_RTX_FORMAT (code);
4357 /* This code is duplicated for speed in find_reloads. */
4358 register int regno = REGNO (x);
4359 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4360 x = reg_equiv_constant[regno];
4362 /* This creates (subreg (mem...)) which would cause an unnecessary
4363 reload of the mem. */
4364 else if (reg_equiv_mem[regno] != 0)
4365 x = reg_equiv_mem[regno];
4367 else if (reg_equiv_memory_loc[regno]
4368 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4370 rtx mem = make_memloc (x, regno);
4371 if (reg_equiv_address[regno]
4372 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4374 /* If this is not a toplevel operand, find_reloads doesn't see
4375 this substitution. We have to emit a USE of the pseudo so
4376 that delete_output_reload can see it. */
4377 if (replace_reloads && recog_operand[opnum] != x)
4378 emit_insn_before (gen_rtx_USE (VOIDmode, x), insn);
4380 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4381 opnum, type, ind_levels, insn);
4389 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4390 opnum, type, ind_levels, insn);
4394 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4396 /* Check for SUBREG containing a REG that's equivalent to a constant.
4397 If the constant has a known value, truncate it right now.
4398 Similarly if we are extracting a single-word of a multi-word
4399 constant. If the constant is symbolic, allow it to be substituted
4400 normally. push_reload will strip the subreg later. If the
4401 constant is VOIDmode, abort because we will lose the mode of
4402 the register (this should never happen because one of the cases
4403 above should handle it). */
4405 register int regno = REGNO (SUBREG_REG (x));
4408 if (subreg_lowpart_p (x)
4409 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4410 && reg_equiv_constant[regno] != 0
4411 && (tem = gen_lowpart_common (GET_MODE (x),
4412 reg_equiv_constant[regno])) != 0)
4415 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4416 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4417 && reg_equiv_constant[regno] != 0
4418 && (tem = operand_subword (reg_equiv_constant[regno],
4420 GET_MODE (SUBREG_REG (x)))) != 0)
4422 /* TEM is now a word sized constant for the bits from X that
4423 we wanted. However, TEM may be the wrong representation.
4425 Use gen_lowpart_common to convert a CONST_INT into a
4426 CONST_DOUBLE and vice versa as needed according to by the mode
4428 tem = gen_lowpart_common (GET_MODE (x), tem);
4434 /* If the SUBREG is wider than a word, the above test will fail.
4435 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4436 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4437 a 32 bit target. We still can - and have to - handle this
4438 for non-paradoxical subregs of CONST_INTs. */
4439 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4440 && reg_equiv_constant[regno] != 0
4441 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT
4442 && (GET_MODE_SIZE (GET_MODE (x))
4443 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
4445 int shift = SUBREG_WORD (x) * BITS_PER_WORD;
4446 if (WORDS_BIG_ENDIAN)
4447 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4448 - GET_MODE_BITSIZE (GET_MODE (x))
4450 /* Here we use the knowledge that CONST_INTs have a
4451 HOST_WIDE_INT field. */
4452 if (shift >= HOST_BITS_PER_WIDE_INT)
4453 shift = HOST_BITS_PER_WIDE_INT - 1;
4454 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
4457 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4458 && reg_equiv_constant[regno] != 0
4459 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4462 /* If the subreg contains a reg that will be converted to a mem,
4463 convert the subreg to a narrower memref now.
4464 Otherwise, we would get (subreg (mem ...) ...),
4465 which would force reload of the mem.
4467 We also need to do this if there is an equivalent MEM that is
4468 not offsettable. In that case, alter_subreg would produce an
4469 invalid address on big-endian machines.
4471 For machines that extend byte loads, we must not reload using
4472 a wider mode if we have a paradoxical SUBREG. find_reloads will
4473 force a reload in that case. So we should not do anything here. */
4475 else if (regno >= FIRST_PSEUDO_REGISTER
4476 #ifdef LOAD_EXTEND_OP
4477 && (GET_MODE_SIZE (GET_MODE (x))
4478 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4480 && (reg_equiv_address[regno] != 0
4481 || (reg_equiv_mem[regno] != 0
4482 && (! strict_memory_address_p (GET_MODE (x),
4483 XEXP (reg_equiv_mem[regno], 0))
4484 || ! offsettable_memref_p (reg_equiv_mem[regno])
4485 || num_not_at_initial_offset))))
4487 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
4488 /* We must rerun eliminate_regs, in case the elimination
4489 offsets have changed. */
4490 rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
4493 if (BYTES_BIG_ENDIAN)
4496 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
4497 offset += MIN (size, UNITS_PER_WORD);
4498 size = GET_MODE_SIZE (GET_MODE (x));
4499 offset -= MIN (size, UNITS_PER_WORD);
4501 addr = plus_constant (addr, offset);
4502 x = gen_rtx_MEM (GET_MODE (x), addr);
4503 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4504 find_reloads_address (GET_MODE (x), &x,
4506 &XEXP (x, 0), opnum, type, ind_levels, insn);
4507 /* If this is not a toplevel operand, find_reloads doesn't see this
4508 substitution. We have to emit a USE of the pseudo so that
4509 delete_output_reload can see it. */
4510 if (replace_reloads && recog_operand[opnum] != x)
4511 emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn);
4516 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4519 XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
4520 ind_levels, is_set_dest, insn);
4525 /* Return a mem ref for the memory equivalent of reg REGNO.
4526 This mem ref is not shared with anything. */
4529 make_memloc (ad, regno)
4533 /* We must rerun eliminate_regs, in case the elimination
4534 offsets have changed. */
4536 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4538 /* If TEM might contain a pseudo, we must copy it to avoid
4539 modifying it when we do the substitution for the reload. */
4540 if (rtx_varies_p (tem))
4541 tem = copy_rtx (tem);
4543 tem = gen_rtx_MEM (GET_MODE (ad), tem);
4544 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4548 /* Record all reloads needed for handling memory address AD
4549 which appears in *LOC in a memory reference to mode MODE
4550 which itself is found in location *MEMREFLOC.
4551 Note that we take shortcuts assuming that no multi-reg machine mode
4552 occurs as part of an address.
4554 OPNUM and TYPE specify the purpose of this reload.
4556 IND_LEVELS says how many levels of indirect addressing this machine
4559 INSN, if nonzero, is the insn in which we do the reload. It is used
4560 to determine if we may generate output reloads, and where to put USEs
4561 for pseudos that we have to replace with stack slots.
4563 Value is nonzero if this address is reloaded or replaced as a whole.
4564 This is interesting to the caller if the address is an autoincrement.
4566 Note that there is no verification that the address will be valid after
4567 this routine does its work. Instead, we rely on the fact that the address
4568 was valid when reload started. So we need only undo things that reload
4569 could have broken. These are wrong register types, pseudos not allocated
4570 to a hard register, and frame pointer elimination. */
4573 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4574 enum machine_mode mode;
4579 enum reload_type type;
4584 int removed_and = 0;
4587 /* If the address is a register, see if it is a legitimate address and
4588 reload if not. We first handle the cases where we need not reload
4589 or where we must reload in a non-standard way. */
4591 if (GET_CODE (ad) == REG)
4595 if (reg_equiv_constant[regno] != 0
4596 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4598 *loc = ad = reg_equiv_constant[regno];
4602 tem = reg_equiv_memory_loc[regno];
4605 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4607 tem = make_memloc (ad, regno);
4608 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4610 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4611 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
4614 /* We can avoid a reload if the register's equivalent memory
4615 expression is valid as an indirect memory address.
4616 But not all addresses are valid in a mem used as an indirect
4617 address: only reg or reg+constant. */
4620 && strict_memory_address_p (mode, tem)
4621 && (GET_CODE (XEXP (tem, 0)) == REG
4622 || (GET_CODE (XEXP (tem, 0)) == PLUS
4623 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4624 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4626 /* TEM is not the same as what we'll be replacing the
4627 pseudo with after reload, put a USE in front of INSN
4628 in the final reload pass. */
4630 && num_not_at_initial_offset
4631 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4634 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
4635 /* This doesn't really count as replacing the address
4636 as a whole, since it is still a memory access. */
4644 /* The only remaining case where we can avoid a reload is if this is a
4645 hard register that is valid as a base register and which is not the
4646 subject of a CLOBBER in this insn. */
4648 else if (regno < FIRST_PSEUDO_REGISTER
4649 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4650 && ! regno_clobbered_p (regno, this_insn))
4653 /* If we do not have one of the cases above, we must do the reload. */
4654 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4655 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4659 if (strict_memory_address_p (mode, ad))
4661 /* The address appears valid, so reloads are not needed.
4662 But the address may contain an eliminable register.
4663 This can happen because a machine with indirect addressing
4664 may consider a pseudo register by itself a valid address even when
4665 it has failed to get a hard reg.
4666 So do a tree-walk to find and eliminate all such regs. */
4668 /* But first quickly dispose of a common case. */
4669 if (GET_CODE (ad) == PLUS
4670 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4671 && GET_CODE (XEXP (ad, 0)) == REG
4672 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4675 subst_reg_equivs_changed = 0;
4676 *loc = subst_reg_equivs (ad, insn);
4678 if (! subst_reg_equivs_changed)
4681 /* Check result for validity after substitution. */
4682 if (strict_memory_address_p (mode, ad))
4686 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4691 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4696 *memrefloc = copy_rtx (*memrefloc);
4697 XEXP (*memrefloc, 0) = ad;
4698 move_replacements (&ad, &XEXP (*memrefloc, 0));
4704 /* The address is not valid. We have to figure out why. First see if
4705 we have an outer AND and remove it if so. Then analyze what's inside. */
4707 if (GET_CODE (ad) == AND)
4710 loc = &XEXP (ad, 0);
4714 /* One possibility for why the address is invalid is that it is itself
4715 a MEM. This can happen when the frame pointer is being eliminated, a
4716 pseudo is not allocated to a hard register, and the offset between the
4717 frame and stack pointers is not its initial value. In that case the
4718 pseudo will have been replaced by a MEM referring to the
4720 if (GET_CODE (ad) == MEM)
4722 /* First ensure that the address in this MEM is valid. Then, unless
4723 indirect addresses are valid, reload the MEM into a register. */
4725 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4726 opnum, ADDR_TYPE (type),
4727 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4729 /* If tem was changed, then we must create a new memory reference to
4730 hold it and store it back into memrefloc. */
4731 if (tem != ad && memrefloc)
4733 *memrefloc = copy_rtx (*memrefloc);
4734 copy_replacements (tem, XEXP (*memrefloc, 0));
4735 loc = &XEXP (*memrefloc, 0);
4737 loc = &XEXP (*loc, 0);
4740 /* Check similar cases as for indirect addresses as above except
4741 that we can allow pseudos and a MEM since they should have been
4742 taken care of above. */
4745 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4746 || GET_CODE (XEXP (tem, 0)) == MEM
4747 || ! (GET_CODE (XEXP (tem, 0)) == REG
4748 || (GET_CODE (XEXP (tem, 0)) == PLUS
4749 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4750 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4752 /* Must use TEM here, not AD, since it is the one that will
4753 have any subexpressions reloaded, if needed. */
4754 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4755 BASE_REG_CLASS, GET_MODE (tem),
4758 return ! removed_and;
4764 /* If we have address of a stack slot but it's not valid because the
4765 displacement is too large, compute the sum in a register.
4766 Handle all base registers here, not just fp/ap/sp, because on some
4767 targets (namely SH) we can also get too large displacements from
4768 big-endian corrections. */
4769 else if (GET_CODE (ad) == PLUS
4770 && GET_CODE (XEXP (ad, 0)) == REG
4771 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4772 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4773 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4775 /* Unshare the MEM rtx so we can safely alter it. */
4778 *memrefloc = copy_rtx (*memrefloc);
4779 loc = &XEXP (*memrefloc, 0);
4781 loc = &XEXP (*loc, 0);
4784 if (double_reg_address_ok)
4786 /* Unshare the sum as well. */
4787 *loc = ad = copy_rtx (ad);
4789 /* Reload the displacement into an index reg.
4790 We assume the frame pointer or arg pointer is a base reg. */
4791 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4792 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4798 /* If the sum of two regs is not necessarily valid,
4799 reload the sum into a base reg.
4800 That will at least work. */
4801 find_reloads_address_part (ad, loc, BASE_REG_CLASS,
4802 Pmode, opnum, type, ind_levels);
4804 return ! removed_and;
4807 /* If we have an indexed stack slot, there are three possible reasons why
4808 it might be invalid: The index might need to be reloaded, the address
4809 might have been made by frame pointer elimination and hence have a
4810 constant out of range, or both reasons might apply.
4812 We can easily check for an index needing reload, but even if that is the
4813 case, we might also have an invalid constant. To avoid making the
4814 conservative assumption and requiring two reloads, we see if this address
4815 is valid when not interpreted strictly. If it is, the only problem is
4816 that the index needs a reload and find_reloads_address_1 will take care
4819 There is still a case when we might generate an extra reload,
4820 however. In certain cases eliminate_regs will return a MEM for a REG
4821 (see the code there for details). In those cases, memory_address_p
4822 applied to our address will return 0 so we will think that our offset
4823 must be too large. But it might indeed be valid and the only problem
4824 is that a MEM is present where a REG should be. This case should be
4825 very rare and there doesn't seem to be any way to avoid it.
4827 If we decide to do something here, it must be that
4828 `double_reg_address_ok' is true and that this address rtl was made by
4829 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4830 rework the sum so that the reload register will be added to the index.
4831 This is safe because we know the address isn't shared.
4833 We check for fp/ap/sp as both the first and second operand of the
4836 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4837 && GET_CODE (XEXP (ad, 0)) == PLUS
4838 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4839 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4840 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4842 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4843 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4845 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4846 && ! memory_address_p (mode, ad))
4848 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4849 plus_constant (XEXP (XEXP (ad, 0), 0),
4850 INTVAL (XEXP (ad, 1))),
4851 XEXP (XEXP (ad, 0), 1));
4852 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4853 GET_MODE (ad), opnum, type, ind_levels);
4854 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4860 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4861 && GET_CODE (XEXP (ad, 0)) == PLUS
4862 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4863 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4864 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4866 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4867 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4869 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4870 && ! memory_address_p (mode, ad))
4872 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4873 XEXP (XEXP (ad, 0), 0),
4874 plus_constant (XEXP (XEXP (ad, 0), 1),
4875 INTVAL (XEXP (ad, 1))));
4876 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS,
4877 GET_MODE (ad), opnum, type, ind_levels);
4878 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4884 /* See if address becomes valid when an eliminable register
4885 in a sum is replaced. */
4888 if (GET_CODE (ad) == PLUS)
4889 tem = subst_indexed_address (ad);
4890 if (tem != ad && strict_memory_address_p (mode, tem))
4892 /* Ok, we win that way. Replace any additional eliminable
4895 subst_reg_equivs_changed = 0;
4896 tem = subst_reg_equivs (tem, insn);
4898 /* Make sure that didn't make the address invalid again. */
4900 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4907 /* If constants aren't valid addresses, reload the constant address
4909 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4911 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4912 Unshare it so we can safely alter it. */
4913 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4914 && CONSTANT_POOL_ADDRESS_P (ad))
4916 *memrefloc = copy_rtx (*memrefloc);
4917 loc = &XEXP (*memrefloc, 0);
4919 loc = &XEXP (*loc, 0);
4922 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4924 return ! removed_and;
4927 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4931 /* Find all pseudo regs appearing in AD
4932 that are eliminable in favor of equivalent values
4933 and do not have hard regs; replace them by their equivalents.
4934 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4935 front of it for pseudos that we have to replace with stack slots. */
4938 subst_reg_equivs (ad, insn)
4942 register RTX_CODE code = GET_CODE (ad);
4960 register int regno = REGNO (ad);
4962 if (reg_equiv_constant[regno] != 0)
4964 subst_reg_equivs_changed = 1;
4965 return reg_equiv_constant[regno];
4967 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
4969 rtx mem = make_memloc (ad, regno);
4970 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
4972 subst_reg_equivs_changed = 1;
4973 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
4981 /* Quickly dispose of a common case. */
4982 if (XEXP (ad, 0) == frame_pointer_rtx
4983 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4991 fmt = GET_RTX_FORMAT (code);
4992 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4994 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
4998 /* Compute the sum of X and Y, making canonicalizations assumed in an
4999 address, namely: sum constant integers, surround the sum of two
5000 constants with a CONST, put the constant as the second operand, and
5001 group the constant on the outermost sum.
5003 This routine assumes both inputs are already in canonical form. */
5010 enum machine_mode mode = GET_MODE (x);
5012 if (mode == VOIDmode)
5013 mode = GET_MODE (y);
5015 if (mode == VOIDmode)
5018 if (GET_CODE (x) == CONST_INT)
5019 return plus_constant (y, INTVAL (x));
5020 else if (GET_CODE (y) == CONST_INT)
5021 return plus_constant (x, INTVAL (y));
5022 else if (CONSTANT_P (x))
5023 tem = x, x = y, y = tem;
5025 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5026 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5028 /* Note that if the operands of Y are specified in the opposite
5029 order in the recursive calls below, infinite recursion will occur. */
5030 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5031 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5033 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5034 constant will have been placed second. */
5035 if (CONSTANT_P (x) && CONSTANT_P (y))
5037 if (GET_CODE (x) == CONST)
5039 if (GET_CODE (y) == CONST)
5042 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5045 return gen_rtx_PLUS (mode, x, y);
5048 /* If ADDR is a sum containing a pseudo register that should be
5049 replaced with a constant (from reg_equiv_constant),
5050 return the result of doing so, and also apply the associative
5051 law so that the result is more likely to be a valid address.
5052 (But it is not guaranteed to be one.)
5054 Note that at most one register is replaced, even if more are
5055 replaceable. Also, we try to put the result into a canonical form
5056 so it is more likely to be a valid address.
5058 In all other cases, return ADDR. */
5061 subst_indexed_address (addr)
5064 rtx op0 = 0, op1 = 0, op2 = 0;
5068 if (GET_CODE (addr) == PLUS)
5070 /* Try to find a register to replace. */
5071 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5072 if (GET_CODE (op0) == REG
5073 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5074 && reg_renumber[regno] < 0
5075 && reg_equiv_constant[regno] != 0)
5076 op0 = reg_equiv_constant[regno];
5077 else if (GET_CODE (op1) == REG
5078 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5079 && reg_renumber[regno] < 0
5080 && reg_equiv_constant[regno] != 0)
5081 op1 = reg_equiv_constant[regno];
5082 else if (GET_CODE (op0) == PLUS
5083 && (tem = subst_indexed_address (op0)) != op0)
5085 else if (GET_CODE (op1) == PLUS
5086 && (tem = subst_indexed_address (op1)) != op1)
5091 /* Pick out up to three things to add. */
5092 if (GET_CODE (op1) == PLUS)
5093 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5094 else if (GET_CODE (op0) == PLUS)
5095 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5097 /* Compute the sum. */
5099 op1 = form_sum (op1, op2);
5101 op0 = form_sum (op0, op1);
5108 /* Record the pseudo registers we must reload into hard registers in a
5109 subexpression of a would-be memory address, X referring to a value
5110 in mode MODE. (This function is not called if the address we find
5113 CONTEXT = 1 means we are considering regs as index regs,
5114 = 0 means we are considering them as base regs.
5116 OPNUM and TYPE specify the purpose of any reloads made.
5118 IND_LEVELS says how many levels of indirect addressing are
5119 supported at this point in the address.
5121 INSN, if nonzero, is the insn in which we do the reload. It is used
5122 to determine if we may generate output reloads.
5124 We return nonzero if X, as a whole, is reloaded or replaced. */
5126 /* Note that we take shortcuts assuming that no multi-reg machine mode
5127 occurs as part of an address.
5128 Also, this is not fully machine-customizable; it works for machines
5129 such as vaxes and 68000's and 32000's, but other possible machines
5130 could have addressing modes that this does not handle right. */
5133 find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
5134 enum machine_mode mode;
5139 enum reload_type type;
5143 register RTX_CODE code = GET_CODE (x);
5149 register rtx orig_op0 = XEXP (x, 0);
5150 register rtx orig_op1 = XEXP (x, 1);
5151 register RTX_CODE code0 = GET_CODE (orig_op0);
5152 register RTX_CODE code1 = GET_CODE (orig_op1);
5153 register rtx op0 = orig_op0;
5154 register rtx op1 = orig_op1;
5156 if (GET_CODE (op0) == SUBREG)
5158 op0 = SUBREG_REG (op0);
5159 code0 = GET_CODE (op0);
5160 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5161 op0 = gen_rtx_REG (word_mode,
5162 REGNO (op0) + SUBREG_WORD (orig_op0));
5165 if (GET_CODE (op1) == SUBREG)
5167 op1 = SUBREG_REG (op1);
5168 code1 = GET_CODE (op1);
5169 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5170 op1 = gen_rtx_REG (GET_MODE (op1),
5171 REGNO (op1) + SUBREG_WORD (orig_op1));
5174 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5175 || code0 == ZERO_EXTEND || code1 == MEM)
5177 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5178 type, ind_levels, insn);
5179 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5180 type, ind_levels, insn);
5183 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5184 || code1 == ZERO_EXTEND || code0 == MEM)
5186 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5187 type, ind_levels, insn);
5188 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5189 type, ind_levels, insn);
5192 else if (code0 == CONST_INT || code0 == CONST
5193 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5194 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5195 type, ind_levels, insn);
5197 else if (code1 == CONST_INT || code1 == CONST
5198 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5199 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5200 type, ind_levels, insn);
5202 else if (code0 == REG && code1 == REG)
5204 if (REG_OK_FOR_INDEX_P (op0)
5205 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5207 else if (REG_OK_FOR_INDEX_P (op1)
5208 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5210 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5211 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5212 type, ind_levels, insn);
5213 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5214 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5215 type, ind_levels, insn);
5216 else if (REG_OK_FOR_INDEX_P (op1))
5217 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5218 type, ind_levels, insn);
5219 else if (REG_OK_FOR_INDEX_P (op0))
5220 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5221 type, ind_levels, insn);
5224 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5225 type, ind_levels, insn);
5226 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5227 type, ind_levels, insn);
5231 else if (code0 == REG)
5233 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5234 type, ind_levels, insn);
5235 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5236 type, ind_levels, insn);
5239 else if (code1 == REG)
5241 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5242 type, ind_levels, insn);
5243 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5244 type, ind_levels, insn);
5254 if (GET_CODE (XEXP (x, 0)) == REG)
5256 register int regno = REGNO (XEXP (x, 0));
5260 /* A register that is incremented cannot be constant! */
5261 if (regno >= FIRST_PSEUDO_REGISTER
5262 && reg_equiv_constant[regno] != 0)
5265 /* Handle a register that is equivalent to a memory location
5266 which cannot be addressed directly. */
5267 if (reg_equiv_memory_loc[regno] != 0
5268 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5270 rtx tem = make_memloc (XEXP (x, 0), regno);
5271 if (reg_equiv_address[regno]
5272 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5274 /* First reload the memory location's address.
5275 We can't use ADDR_TYPE (type) here, because we need to
5276 write back the value after reading it, hence we actually
5277 need two registers. */
5278 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5279 &XEXP (tem, 0), opnum, type,
5281 /* Put this inside a new increment-expression. */
5282 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5283 /* Proceed to reload that, as if it contained a register. */
5287 /* If we have a hard register that is ok as an index,
5288 don't make a reload. If an autoincrement of a nice register
5289 isn't "valid", it must be that no autoincrement is "valid".
5290 If that is true and something made an autoincrement anyway,
5291 this must be a special context where one is allowed.
5292 (For example, a "push" instruction.)
5293 We can't improve this address, so leave it alone. */
5295 /* Otherwise, reload the autoincrement into a suitable hard reg
5296 and record how much to increment by. */
5298 if (reg_renumber[regno] >= 0)
5299 regno = reg_renumber[regno];
5300 if ((regno >= FIRST_PSEUDO_REGISTER
5301 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5302 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5309 /* If we can output the register afterwards, do so, this
5310 saves the extra update.
5311 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5312 CALL_INSN - and it does not set CC0.
5313 But don't do this if we cannot directly address the
5314 memory location, since this will make it harder to
5315 reuse address reloads, and increases register pressure.
5316 Also don't do this if we can probably update x directly. */
5317 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5319 : reg_equiv_mem[regno]);
5320 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5321 if (insn && GET_CODE (insn) == INSN && equiv
5322 && memory_operand (equiv, GET_MODE (equiv))
5324 && ! sets_cc0_p (PATTERN (insn))
5326 && ! (icode != CODE_FOR_nothing
5327 && (*insn_operand_predicate[icode][0]) (equiv, Pmode)
5328 && (*insn_operand_predicate[icode][1]) (equiv, Pmode)))
5333 = push_reload (x, x, loc, loc,
5334 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5335 GET_MODE (x), GET_MODE (x), 0, 0,
5336 opnum, RELOAD_OTHER);
5338 /* If we created a new MEM based on reg_equiv_mem[REGNO], then
5339 LOC above is part of the new MEM, not the MEM in INSN.
5341 We must also replace the address of the MEM in INSN. */
5342 if (&XEXP (x_orig, 0) != loc)
5343 push_replacement (&XEXP (x_orig, 0), reloadnum, VOIDmode);
5349 = push_reload (x, NULL_RTX, loc, NULL_PTR,
5350 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5351 GET_MODE (x), GET_MODE (x), 0, 0,
5353 reload_inc[reloadnum]
5354 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5360 /* Update the REG_INC notes. */
5362 for (link = REG_NOTES (this_insn);
5363 link; link = XEXP (link, 1))
5364 if (REG_NOTE_KIND (link) == REG_INC
5365 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
5366 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5372 else if (GET_CODE (XEXP (x, 0)) == MEM)
5374 /* This is probably the result of a substitution, by eliminate_regs,
5375 of an equivalent address for a pseudo that was not allocated to a
5376 hard register. Verify that the specified address is valid and
5377 reload it into a register. */
5378 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5379 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5383 /* Since we know we are going to reload this item, don't decrement
5384 for the indirection level.
5386 Note that this is actually conservative: it would be slightly
5387 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5389 /* We can't use ADDR_TYPE (type) here, because we need to
5390 write back the value after reading it, hence we actually
5391 need two registers. */
5392 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5393 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5394 opnum, type, ind_levels, insn);
5396 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
5397 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5398 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5399 reload_inc[reloadnum]
5400 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5402 link = FIND_REG_INC_NOTE (this_insn, tem);
5404 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5411 /* This is probably the result of a substitution, by eliminate_regs, of
5412 an equivalent address for a pseudo that was not allocated to a hard
5413 register. Verify that the specified address is valid and reload it
5416 Since we know we are going to reload this item, don't decrement for
5417 the indirection level.
5419 Note that this is actually conservative: it would be slightly more
5420 efficient to use the value of SPILL_INDIRECT_LEVELS from
5423 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5424 opnum, ADDR_TYPE (type), ind_levels, insn);
5425 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
5426 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5427 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5432 register int regno = REGNO (x);
5434 if (reg_equiv_constant[regno] != 0)
5436 find_reloads_address_part (reg_equiv_constant[regno], loc,
5437 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5438 GET_MODE (x), opnum, type, ind_levels);
5442 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5443 that feeds this insn. */
5444 if (reg_equiv_mem[regno] != 0)
5446 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
5447 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5448 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5453 if (reg_equiv_memory_loc[regno]
5454 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5456 rtx tem = make_memloc (x, regno);
5457 if (reg_equiv_address[regno] != 0
5458 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5461 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5462 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5467 if (reg_renumber[regno] >= 0)
5468 regno = reg_renumber[regno];
5470 if ((regno >= FIRST_PSEUDO_REGISTER
5471 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5472 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5474 push_reload (x, NULL_RTX, loc, NULL_PTR,
5475 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5476 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5480 /* If a register appearing in an address is the subject of a CLOBBER
5481 in this insn, reload it into some other register to be safe.
5482 The CLOBBER is supposed to make the register unavailable
5483 from before this insn to after it. */
5484 if (regno_clobbered_p (regno, this_insn))
5486 push_reload (x, NULL_RTX, loc, NULL_PTR,
5487 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5488 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5495 if (GET_CODE (SUBREG_REG (x)) == REG)
5497 /* If this is a SUBREG of a hard register and the resulting register
5498 is of the wrong class, reload the whole SUBREG. This avoids
5499 needless copies if SUBREG_REG is multi-word. */
5500 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5502 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5504 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5505 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5507 push_reload (x, NULL_RTX, loc, NULL_PTR,
5508 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5509 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5513 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5514 is larger than the class size, then reload the whole SUBREG. */
5517 enum reg_class class = (context ? INDEX_REG_CLASS
5519 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5520 > reg_class_size[class])
5522 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5523 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5535 register char *fmt = GET_RTX_FORMAT (code);
5538 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5541 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5542 opnum, type, ind_levels, insn);
5549 /* X, which is found at *LOC, is a part of an address that needs to be
5550 reloaded into a register of class CLASS. If X is a constant, or if
5551 X is a PLUS that contains a constant, check that the constant is a
5552 legitimate operand and that we are supposed to be able to load
5553 it into the register.
5555 If not, force the constant into memory and reload the MEM instead.
5557 MODE is the mode to use, in case X is an integer constant.
5559 OPNUM and TYPE describe the purpose of any reloads made.
5561 IND_LEVELS says how many levels of indirect addressing this machine
5565 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5568 enum reg_class class;
5569 enum machine_mode mode;
5571 enum reload_type type;
5575 && (! LEGITIMATE_CONSTANT_P (x)
5576 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5580 /* If this is a CONST_INT, it could have been created by a
5581 plus_constant call in eliminate_regs, which means it may be
5582 on the reload_obstack. reload_obstack will be freed later, so
5583 we can't allow such RTL to be put in the constant pool. There
5584 is code in force_const_mem to check for this case, but it doesn't
5585 work because we have already popped off the reload_obstack, so
5586 rtl_obstack == saveable_obstack is true at this point. */
5587 if (GET_CODE (x) == CONST_INT)
5588 tem = x = force_const_mem (mode, GEN_INT (INTVAL (x)));
5590 tem = x = force_const_mem (mode, x);
5592 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5593 opnum, type, ind_levels, 0);
5596 else if (GET_CODE (x) == PLUS
5597 && CONSTANT_P (XEXP (x, 1))
5598 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5599 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5603 /* See comment above. */
5604 if (GET_CODE (XEXP (x, 1)) == CONST_INT)
5605 tem = force_const_mem (GET_MODE (x), GEN_INT (INTVAL (XEXP (x, 1))));
5607 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5609 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5610 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5611 opnum, type, ind_levels, 0);
5614 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5615 mode, VOIDmode, 0, 0, opnum, type);
5618 /* Substitute into the current INSN the registers into which we have reloaded
5619 the things that need reloading. The array `replacements'
5620 says contains the locations of all pointers that must be changed
5621 and says what to replace them with.
5623 Return the rtx that X translates into; usually X, but modified. */
5630 for (i = 0; i < n_replacements; i++)
5632 register struct replacement *r = &replacements[i];
5633 register rtx reloadreg = reload_reg_rtx[r->what];
5636 /* Encapsulate RELOADREG so its machine mode matches what
5637 used to be there. Note that gen_lowpart_common will
5638 do the wrong thing if RELOADREG is multi-word. RELOADREG
5639 will always be a REG here. */
5640 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5641 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5643 /* If we are putting this into a SUBREG and RELOADREG is a
5644 SUBREG, we would be making nested SUBREGs, so we have to fix
5645 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5647 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5649 if (GET_MODE (*r->subreg_loc)
5650 == GET_MODE (SUBREG_REG (reloadreg)))
5651 *r->subreg_loc = SUBREG_REG (reloadreg);
5654 *r->where = SUBREG_REG (reloadreg);
5655 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
5659 *r->where = reloadreg;
5661 /* If reload got no reg and isn't optional, something's wrong. */
5662 else if (! reload_optional[r->what])
5667 /* Make a copy of any replacements being done into X and move those copies
5668 to locations in Y, a copy of X. We only look at the highest level of
5672 copy_replacements (x, y)
5677 enum rtx_code code = GET_CODE (x);
5678 char *fmt = GET_RTX_FORMAT (code);
5679 struct replacement *r;
5681 /* We can't support X being a SUBREG because we might then need to know its
5682 location if something inside it was replaced. */
5686 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5688 for (j = 0; j < n_replacements; j++)
5690 if (replacements[j].subreg_loc == &XEXP (x, i))
5692 r = &replacements[n_replacements++];
5693 r->where = replacements[j].where;
5694 r->subreg_loc = &XEXP (y, i);
5695 r->what = replacements[j].what;
5696 r->mode = replacements[j].mode;
5698 else if (replacements[j].where == &XEXP (x, i))
5700 r = &replacements[n_replacements++];
5701 r->where = &XEXP (y, i);
5703 r->what = replacements[j].what;
5704 r->mode = replacements[j].mode;
5709 /* Change any replacements being done to *X to be done to *Y */
5712 move_replacements (x, y)
5718 for (i = 0; i < n_replacements; i++)
5719 if (replacements[i].subreg_loc == x)
5720 replacements[i].subreg_loc = y;
5721 else if (replacements[i].where == x)
5723 replacements[i].where = y;
5724 replacements[i].subreg_loc = 0;
5728 /* If LOC was scheduled to be replaced by something, return the replacement.
5729 Otherwise, return *LOC. */
5732 find_replacement (loc)
5735 struct replacement *r;
5737 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5739 rtx reloadreg = reload_reg_rtx[r->what];
5741 if (reloadreg && r->where == loc)
5743 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5744 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5748 else if (reloadreg && r->subreg_loc == loc)
5750 /* RELOADREG must be either a REG or a SUBREG.
5752 ??? Is it actually still ever a SUBREG? If so, why? */
5754 if (GET_CODE (reloadreg) == REG)
5755 return gen_rtx_REG (GET_MODE (*loc),
5756 REGNO (reloadreg) + SUBREG_WORD (*loc));
5757 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5760 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
5761 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5765 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5766 what's inside and make a new rtl if so. */
5767 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
5768 || GET_CODE (*loc) == MULT)
5770 rtx x = find_replacement (&XEXP (*loc, 0));
5771 rtx y = find_replacement (&XEXP (*loc, 1));
5773 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
5774 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
5780 /* Return nonzero if register in range [REGNO, ENDREGNO)
5781 appears either explicitly or implicitly in X
5782 other than being stored into (except for earlyclobber operands).
5784 References contained within the substructure at LOC do not count.
5785 LOC may be zero, meaning don't ignore anything.
5787 This is similar to refers_to_regno_p in rtlanal.c except that we
5788 look at equivalences for pseudos that didn't get hard registers. */
5791 refers_to_regno_for_reload_p (regno, endregno, x, loc)
5792 int regno, endregno;
5797 register RTX_CODE code;
5804 code = GET_CODE (x);
5811 /* If this is a pseudo, a hard register must not have been allocated.
5812 X must therefore either be a constant or be in memory. */
5813 if (i >= FIRST_PSEUDO_REGISTER)
5815 if (reg_equiv_memory_loc[i])
5816 return refers_to_regno_for_reload_p (regno, endregno,
5817 reg_equiv_memory_loc[i],
5820 if (reg_equiv_constant[i])
5826 return (endregno > i
5827 && regno < i + (i < FIRST_PSEUDO_REGISTER
5828 ? HARD_REGNO_NREGS (i, GET_MODE (x))
5832 /* If this is a SUBREG of a hard reg, we can see exactly which
5833 registers are being modified. Otherwise, handle normally. */
5834 if (GET_CODE (SUBREG_REG (x)) == REG
5835 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5837 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5839 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5840 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5842 return endregno > inner_regno && regno < inner_endregno;
5848 if (&SET_DEST (x) != loc
5849 /* Note setting a SUBREG counts as referring to the REG it is in for
5850 a pseudo but not for hard registers since we can
5851 treat each word individually. */
5852 && ((GET_CODE (SET_DEST (x)) == SUBREG
5853 && loc != &SUBREG_REG (SET_DEST (x))
5854 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5855 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5856 && refers_to_regno_for_reload_p (regno, endregno,
5857 SUBREG_REG (SET_DEST (x)),
5859 /* If the output is an earlyclobber operand, this is
5861 || ((GET_CODE (SET_DEST (x)) != REG
5862 || earlyclobber_operand_p (SET_DEST (x)))
5863 && refers_to_regno_for_reload_p (regno, endregno,
5864 SET_DEST (x), loc))))
5867 if (code == CLOBBER || loc == &SET_SRC (x))
5876 /* X does not match, so try its subexpressions. */
5878 fmt = GET_RTX_FORMAT (code);
5879 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5881 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5889 if (refers_to_regno_for_reload_p (regno, endregno,
5893 else if (fmt[i] == 'E')
5896 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5897 if (loc != &XVECEXP (x, i, j)
5898 && refers_to_regno_for_reload_p (regno, endregno,
5899 XVECEXP (x, i, j), loc))
5906 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5907 we check if any register number in X conflicts with the relevant register
5908 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5909 contains a MEM (we don't bother checking for memory addresses that can't
5910 conflict because we expect this to be a rare case.
5912 This function is similar to reg_overlap_mention_p in rtlanal.c except
5913 that we look at equivalences for pseudos that didn't get hard registers. */
5916 reg_overlap_mentioned_for_reload_p (x, in)
5919 int regno, endregno;
5921 /* Overly conservative. */
5922 if (GET_CODE (x) == STRICT_LOW_PART)
5925 /* If either argument is a constant, then modifying X can not affect IN. */
5926 if (CONSTANT_P (x) || CONSTANT_P (in))
5928 else if (GET_CODE (x) == SUBREG)
5930 regno = REGNO (SUBREG_REG (x));
5931 if (regno < FIRST_PSEUDO_REGISTER)
5932 regno += SUBREG_WORD (x);
5934 else if (GET_CODE (x) == REG)
5938 /* If this is a pseudo, it must not have been assigned a hard register.
5939 Therefore, it must either be in memory or be a constant. */
5941 if (regno >= FIRST_PSEUDO_REGISTER)
5943 if (reg_equiv_memory_loc[regno])
5944 return refers_to_mem_for_reload_p (in);
5945 else if (reg_equiv_constant[regno])
5950 else if (GET_CODE (x) == MEM)
5951 return refers_to_mem_for_reload_p (in);
5952 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
5953 || GET_CODE (x) == CC0)
5954 return reg_mentioned_p (x, in);
5958 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
5959 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5961 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
5964 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5968 refers_to_mem_for_reload_p (x)
5974 if (GET_CODE (x) == MEM)
5977 if (GET_CODE (x) == REG)
5978 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
5979 && reg_equiv_memory_loc[REGNO (x)]);
5981 fmt = GET_RTX_FORMAT (GET_CODE (x));
5982 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
5984 && (GET_CODE (XEXP (x, i)) == MEM
5985 || refers_to_mem_for_reload_p (XEXP (x, i))))
5991 /* Check the insns before INSN to see if there is a suitable register
5992 containing the same value as GOAL.
5993 If OTHER is -1, look for a register in class CLASS.
5994 Otherwise, just see if register number OTHER shares GOAL's value.
5996 Return an rtx for the register found, or zero if none is found.
5998 If RELOAD_REG_P is (short *)1,
5999 we reject any hard reg that appears in reload_reg_rtx
6000 because such a hard reg is also needed coming into this insn.
6002 If RELOAD_REG_P is any other nonzero value,
6003 it is a vector indexed by hard reg number
6004 and we reject any hard reg whose element in the vector is nonnegative
6005 as well as any that appears in reload_reg_rtx.
6007 If GOAL is zero, then GOALREG is a register number; we look
6008 for an equivalent for that register.
6010 MODE is the machine mode of the value we want an equivalence for.
6011 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6013 This function is used by jump.c as well as in the reload pass.
6015 If GOAL is the sum of the stack pointer and a constant, we treat it
6016 as if it were a constant except that sp is required to be unchanging. */
6019 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
6022 enum reg_class class;
6024 short *reload_reg_p;
6026 enum machine_mode mode;
6028 register rtx p = insn;
6029 rtx goaltry, valtry, value, where;
6031 register int regno = -1;
6035 int goal_mem_addr_varies = 0;
6036 int need_stable_sp = 0;
6042 else if (GET_CODE (goal) == REG)
6043 regno = REGNO (goal);
6044 else if (GET_CODE (goal) == MEM)
6046 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6047 if (MEM_VOLATILE_P (goal))
6049 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6051 /* An address with side effects must be reexecuted. */
6064 else if (CONSTANT_P (goal))
6066 else if (GET_CODE (goal) == PLUS
6067 && XEXP (goal, 0) == stack_pointer_rtx
6068 && CONSTANT_P (XEXP (goal, 1)))
6069 goal_const = need_stable_sp = 1;
6070 else if (GET_CODE (goal) == PLUS
6071 && XEXP (goal, 0) == frame_pointer_rtx
6072 && CONSTANT_P (XEXP (goal, 1)))
6077 /* On some machines, certain regs must always be rejected
6078 because they don't behave the way ordinary registers do. */
6080 #ifdef OVERLAPPING_REGNO_P
6081 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6082 && OVERLAPPING_REGNO_P (regno))
6086 /* Scan insns back from INSN, looking for one that copies
6087 a value into or out of GOAL.
6088 Stop and give up if we reach a label. */
6093 if (p == 0 || GET_CODE (p) == CODE_LABEL)
6095 if (GET_CODE (p) == INSN
6096 /* If we don't want spill regs ... */
6097 && (! (reload_reg_p != 0
6098 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6099 /* ... then ignore insns introduced by reload; they aren't useful
6100 and can cause results in reload_as_needed to be different
6101 from what they were when calculating the need for spills.
6102 If we notice an input-reload insn here, we will reject it below,
6103 but it might hide a usable equivalent. That makes bad code.
6104 It may even abort: perhaps no reg was spilled for this insn
6105 because it was assumed we would find that equivalent. */
6106 || INSN_UID (p) < reload_first_uid))
6109 pat = single_set (p);
6110 /* First check for something that sets some reg equal to GOAL. */
6113 && true_regnum (SET_SRC (pat)) == regno
6114 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6117 && true_regnum (SET_DEST (pat)) == regno
6118 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6120 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6121 /* When looking for stack pointer + const,
6122 make sure we don't use a stack adjust. */
6123 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6124 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6126 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6127 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6129 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6130 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6131 /* If we are looking for a constant,
6132 and something equivalent to that constant was copied
6133 into a reg, we can use that reg. */
6134 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6136 && rtx_equal_p (XEXP (tem, 0), goal)
6137 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6138 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6140 && GET_CODE (SET_DEST (pat)) == REG
6141 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6142 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
6143 && GET_CODE (goal) == CONST_INT
6144 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
6146 && rtx_equal_p (goal, goaltry)
6147 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
6149 && (valueno = true_regnum (valtry)) >= 0)
6150 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6152 && GET_CODE (SET_DEST (pat)) == REG
6153 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6154 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
6155 && GET_CODE (goal) == CONST_INT
6156 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6158 && rtx_equal_p (goal, goaltry)
6160 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6161 && (valueno = true_regnum (valtry)) >= 0)))
6164 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
6165 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6175 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6176 (or copying VALUE into GOAL, if GOAL is also a register).
6177 Now verify that VALUE is really valid. */
6179 /* VALUENO is the register number of VALUE; a hard register. */
6181 /* Don't try to re-use something that is killed in this insn. We want
6182 to be able to trust REG_UNUSED notes. */
6183 if (find_reg_note (where, REG_UNUSED, value))
6186 /* If we propose to get the value from the stack pointer or if GOAL is
6187 a MEM based on the stack pointer, we need a stable SP. */
6188 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6189 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6193 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6194 if (GET_MODE (value) != mode)
6197 /* Reject VALUE if it was loaded from GOAL
6198 and is also a register that appears in the address of GOAL. */
6200 if (goal_mem && value == SET_DEST (single_set (where))
6201 && refers_to_regno_for_reload_p (valueno,
6203 + HARD_REGNO_NREGS (valueno, mode)),
6207 /* Reject registers that overlap GOAL. */
6209 if (!goal_mem && !goal_const
6210 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
6211 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
6214 /* Reject VALUE if it is one of the regs reserved for reloads.
6215 Reload1 knows how to reuse them anyway, and it would get
6216 confused if we allocated one without its knowledge.
6217 (Now that insns introduced by reload are ignored above,
6218 this case shouldn't happen, but I'm not positive.) */
6220 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
6221 && reload_reg_p[valueno] >= 0)
6224 /* On some machines, certain regs must always be rejected
6225 because they don't behave the way ordinary registers do. */
6227 #ifdef OVERLAPPING_REGNO_P
6228 if (OVERLAPPING_REGNO_P (valueno))
6232 nregs = HARD_REGNO_NREGS (regno, mode);
6233 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6235 /* Reject VALUE if it is a register being used for an input reload
6236 even if it is not one of those reserved. */
6238 if (reload_reg_p != 0)
6241 for (i = 0; i < n_reloads; i++)
6242 if (reload_reg_rtx[i] != 0 && reload_in[i])
6244 int regno1 = REGNO (reload_reg_rtx[i]);
6245 int nregs1 = HARD_REGNO_NREGS (regno1,
6246 GET_MODE (reload_reg_rtx[i]));
6247 if (regno1 < valueno + valuenregs
6248 && regno1 + nregs1 > valueno)
6254 /* We must treat frame pointer as varying here,
6255 since it can vary--in a nonlocal goto as generated by expand_goto. */
6256 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6258 /* Now verify that the values of GOAL and VALUE remain unaltered
6259 until INSN is reached. */
6268 /* Don't trust the conversion past a function call
6269 if either of the two is in a call-clobbered register, or memory. */
6270 if (GET_CODE (p) == CALL_INSN
6271 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6272 && call_used_regs[regno])
6274 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
6275 && call_used_regs[valueno])
6281 #ifdef NON_SAVING_SETJMP
6282 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
6283 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6287 #ifdef INSN_CLOBBERS_REGNO_P
6288 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
6289 && INSN_CLOBBERS_REGNO_P (p, valueno))
6290 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6291 && INSN_CLOBBERS_REGNO_P (p, regno)))
6295 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6299 /* Watch out for unspec_volatile, and volatile asms. */
6300 if (volatile_insn_p (pat))
6303 /* If this insn P stores in either GOAL or VALUE, return 0.
6304 If GOAL is a memory ref and this insn writes memory, return 0.
6305 If GOAL is a memory ref and its address is not constant,
6306 and this insn P changes a register used in GOAL, return 0. */
6308 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6310 register rtx dest = SET_DEST (pat);
6311 while (GET_CODE (dest) == SUBREG
6312 || GET_CODE (dest) == ZERO_EXTRACT
6313 || GET_CODE (dest) == SIGN_EXTRACT
6314 || GET_CODE (dest) == STRICT_LOW_PART)
6315 dest = XEXP (dest, 0);
6316 if (GET_CODE (dest) == REG)
6318 register int xregno = REGNO (dest);
6320 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6321 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6324 if (xregno < regno + nregs && xregno + xnregs > regno)
6326 if (xregno < valueno + valuenregs
6327 && xregno + xnregs > valueno)
6329 if (goal_mem_addr_varies
6330 && reg_overlap_mentioned_for_reload_p (dest, goal))
6332 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6335 else if (goal_mem && GET_CODE (dest) == MEM
6336 && ! push_operand (dest, GET_MODE (dest)))
6338 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6339 && reg_equiv_memory_loc[regno] != 0)
6341 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6344 else if (GET_CODE (pat) == PARALLEL)
6347 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6349 register rtx v1 = XVECEXP (pat, 0, i);
6350 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6352 register rtx dest = SET_DEST (v1);
6353 while (GET_CODE (dest) == SUBREG
6354 || GET_CODE (dest) == ZERO_EXTRACT
6355 || GET_CODE (dest) == SIGN_EXTRACT
6356 || GET_CODE (dest) == STRICT_LOW_PART)
6357 dest = XEXP (dest, 0);
6358 if (GET_CODE (dest) == REG)
6360 register int xregno = REGNO (dest);
6362 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6363 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6366 if (xregno < regno + nregs
6367 && xregno + xnregs > regno)
6369 if (xregno < valueno + valuenregs
6370 && xregno + xnregs > valueno)
6372 if (goal_mem_addr_varies
6373 && reg_overlap_mentioned_for_reload_p (dest,
6376 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6379 else if (goal_mem && GET_CODE (dest) == MEM
6380 && ! push_operand (dest, GET_MODE (dest)))
6382 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6383 && reg_equiv_memory_loc[regno] != 0)
6385 else if (need_stable_sp
6386 && push_operand (dest, GET_MODE (dest)))
6392 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6396 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6397 link = XEXP (link, 1))
6399 pat = XEXP (link, 0);
6400 if (GET_CODE (pat) == CLOBBER)
6402 register rtx dest = SET_DEST (pat);
6403 while (GET_CODE (dest) == SUBREG
6404 || GET_CODE (dest) == ZERO_EXTRACT
6405 || GET_CODE (dest) == SIGN_EXTRACT
6406 || GET_CODE (dest) == STRICT_LOW_PART)
6407 dest = XEXP (dest, 0);
6408 if (GET_CODE (dest) == REG)
6410 register int xregno = REGNO (dest);
6412 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6413 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6416 if (xregno < regno + nregs
6417 && xregno + xnregs > regno)
6419 if (xregno < valueno + valuenregs
6420 && xregno + xnregs > valueno)
6422 if (goal_mem_addr_varies
6423 && reg_overlap_mentioned_for_reload_p (dest,
6427 else if (goal_mem && GET_CODE (dest) == MEM
6428 && ! push_operand (dest, GET_MODE (dest)))
6430 else if (need_stable_sp
6431 && push_operand (dest, GET_MODE (dest)))
6438 /* If this insn auto-increments or auto-decrements
6439 either regno or valueno, return 0 now.
6440 If GOAL is a memory ref and its address is not constant,
6441 and this insn P increments a register used in GOAL, return 0. */
6445 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6446 if (REG_NOTE_KIND (link) == REG_INC
6447 && GET_CODE (XEXP (link, 0)) == REG)
6449 register int incno = REGNO (XEXP (link, 0));
6450 if (incno < regno + nregs && incno >= regno)
6452 if (incno < valueno + valuenregs && incno >= valueno)
6454 if (goal_mem_addr_varies
6455 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6465 /* Find a place where INCED appears in an increment or decrement operator
6466 within X, and return the amount INCED is incremented or decremented by.
6467 The value is always positive. */
6470 find_inc_amount (x, inced)
6473 register enum rtx_code code = GET_CODE (x);
6479 register rtx addr = XEXP (x, 0);
6480 if ((GET_CODE (addr) == PRE_DEC
6481 || GET_CODE (addr) == POST_DEC
6482 || GET_CODE (addr) == PRE_INC
6483 || GET_CODE (addr) == POST_INC)
6484 && XEXP (addr, 0) == inced)
6485 return GET_MODE_SIZE (GET_MODE (x));
6488 fmt = GET_RTX_FORMAT (code);
6489 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6493 register int tem = find_inc_amount (XEXP (x, i), inced);
6500 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6502 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6512 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6515 regno_clobbered_p (regno, insn)
6519 if (GET_CODE (PATTERN (insn)) == CLOBBER
6520 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6521 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
6523 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6525 int i = XVECLEN (PATTERN (insn), 0) - 1;
6529 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6530 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
6531 && REGNO (XEXP (elt, 0)) == regno)
6539 static char *reload_when_needed_name[] =
6542 "RELOAD_FOR_OUTPUT",
6544 "RELOAD_FOR_INPUT_ADDRESS",
6545 "RELOAD_FOR_INPADDR_ADDRESS",
6546 "RELOAD_FOR_OUTPUT_ADDRESS",
6547 "RELOAD_FOR_OUTADDR_ADDRESS",
6548 "RELOAD_FOR_OPERAND_ADDRESS",
6549 "RELOAD_FOR_OPADDR_ADDR",
6551 "RELOAD_FOR_OTHER_ADDRESS"
6554 static char *reg_class_names[] = REG_CLASS_NAMES;
6556 /* These functions are used to print the variables set by 'find_reloads' */
6559 debug_reload_to_stream (f)
6567 for (r = 0; r < n_reloads; r++)
6569 fprintf (f, "Reload %d: ", r);
6571 if (reload_in[r] != 0)
6573 fprintf (f, "reload_in (%s) = ",
6574 GET_MODE_NAME (reload_inmode[r]));
6575 print_inline_rtx (f, reload_in[r], 24);
6576 fprintf (f, "\n\t");
6579 if (reload_out[r] != 0)
6581 fprintf (f, "reload_out (%s) = ",
6582 GET_MODE_NAME (reload_outmode[r]));
6583 print_inline_rtx (f, reload_out[r], 24);
6584 fprintf (f, "\n\t");
6587 fprintf (f, "%s, ", reg_class_names[(int) reload_reg_class[r]]);
6589 fprintf (f, "%s (opnum = %d)",
6590 reload_when_needed_name[(int) reload_when_needed[r]],
6593 if (reload_optional[r])
6594 fprintf (f, ", optional");
6596 if (reload_nongroup[r])
6597 fprintf (stderr, ", nongroup");
6599 if (reload_inc[r] != 0)
6600 fprintf (f, ", inc by %d", reload_inc[r]);
6602 if (reload_nocombine[r])
6603 fprintf (f, ", can't combine");
6605 if (reload_secondary_p[r])
6606 fprintf (f, ", secondary_reload_p");
6608 if (reload_in_reg[r] != 0)
6610 fprintf (f, "\n\treload_in_reg: ");
6611 print_inline_rtx (f, reload_in_reg[r], 24);
6614 if (reload_out_reg[r] != 0)
6616 fprintf (f, "\n\treload_out_reg: ");
6617 print_inline_rtx (f, reload_out_reg[r], 24);
6620 if (reload_reg_rtx[r] != 0)
6622 fprintf (f, "\n\treload_reg_rtx: ");
6623 print_inline_rtx (f, reload_reg_rtx[r], 24);
6627 if (reload_secondary_in_reload[r] != -1)
6629 fprintf (f, "%ssecondary_in_reload = %d",
6630 prefix, reload_secondary_in_reload[r]);
6634 if (reload_secondary_out_reload[r] != -1)
6635 fprintf (f, "%ssecondary_out_reload = %d\n",
6636 prefix, reload_secondary_out_reload[r]);
6639 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
6641 fprintf (stderr, "%ssecondary_in_icode = %s", prefix,
6642 insn_name[reload_secondary_in_icode[r]]);
6646 if (reload_secondary_out_icode[r] != CODE_FOR_nothing)
6647 fprintf (stderr, "%ssecondary_out_icode = %s", prefix,
6648 insn_name[reload_secondary_out_icode[r]]);
6657 debug_reload_to_stream (stderr);