1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
30 init_reload actually has to be called earlier anyway.
32 To scan an insn, call `find_reloads'. This does two things:
33 1. sets up tables describing which values must be reloaded
34 for this insn, and what kind of hard regs they must be reloaded into;
35 2. optionally record the locations where those values appear in
36 the data, so they can be replaced properly later.
37 This is done only if the second arg to `find_reloads' is nonzero.
39 The third arg to `find_reloads' specifies the number of levels
40 of indirect addressing supported by the machine. If it is zero,
41 indirect addressing is not valid. If it is one, (MEM (REG n))
42 is valid even if (REG n) did not get a hard register; if it is two,
43 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44 hard register, and similarly for higher values.
46 Then you must choose the hard regs to reload those pseudo regs into,
47 and generate appropriate load insns before this insn and perhaps
48 also store insns after this insn. Set up the array `reload_reg_rtx'
49 to contain the REG rtx's for the registers you used. In some
50 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51 for certain reloads. Then that tells you which register to use,
52 so you do not need to allocate one. But you still do need to add extra
53 instructions to copy the value into and out of that register.
55 Finally you must call `subst_reloads' to substitute the reload reg rtx's
56 into the locations already recorded.
60 find_reloads can alter the operands of the instruction it is called on.
62 1. Two operands of any sort may be interchanged, if they are in a
63 commutative instruction.
64 This happens only if find_reloads thinks the instruction will compile
67 2. Pseudo-registers that are equivalent to constants are replaced
68 with those constants if they are not in hard registers.
70 1 happens every time find_reloads is called.
71 2 happens only when REPLACE is 1, which is only when
72 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
90 /* We do not enable this with ENABLE_CHECKING, since it is awfully slow. */
95 #include "coretypes.h"
97 #include "rtl-error.h"
99 #include "insn-config.h"
106 #include "addresses.h"
107 #include "hard-reg-set.h"
110 #include "function.h"
114 #include "toplev.h" /* exact_log2 may be used by targets */
116 /* True if X is a constant that can be forced into the constant pool. */
117 #define CONST_POOL_OK_P(X) \
119 && GET_CODE (X) != HIGH \
120 && !targetm.cannot_force_const_mem (X))
122 /* True if C is a non-empty register class that has too few registers
123 to be safely used as a reload target class. */
124 #define SMALL_REGISTER_CLASS_P(C) \
125 (reg_class_size [(C)] == 1 \
126 || (reg_class_size [(C)] >= 1 && CLASS_LIKELY_SPILLED_P (C)))
129 /* All reloads of the current insn are recorded here. See reload.h for
132 struct reload rld[MAX_RELOADS];
134 /* All the "earlyclobber" operands of the current insn
135 are recorded here. */
137 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
139 int reload_n_operands;
141 /* Replacing reloads.
143 If `replace_reloads' is nonzero, then as each reload is recorded
144 an entry is made for it in the table `replacements'.
145 Then later `subst_reloads' can look through that table and
146 perform all the replacements needed. */
148 /* Nonzero means record the places to replace. */
149 static int replace_reloads;
151 /* Each replacement is recorded with a structure like this. */
154 rtx *where; /* Location to store in */
155 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
156 a SUBREG; 0 otherwise. */
157 int what; /* which reload this is for */
158 enum machine_mode mode; /* mode it must have */
161 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
163 /* Number of replacements currently recorded. */
164 static int n_replacements;
166 /* Used to track what is modified by an operand. */
169 int reg_flag; /* Nonzero if referencing a register. */
170 int safe; /* Nonzero if this can't conflict with anything. */
171 rtx base; /* Base address for MEM. */
172 HOST_WIDE_INT start; /* Starting offset or register number. */
173 HOST_WIDE_INT end; /* Ending offset or register number. */
176 #ifdef SECONDARY_MEMORY_NEEDED
178 /* Save MEMs needed to copy from one class of registers to another. One MEM
179 is used per mode, but normally only one or two modes are ever used.
181 We keep two versions, before and after register elimination. The one
182 after register elimination is record separately for each operand. This
183 is done in case the address is not valid to be sure that we separately
186 static rtx secondary_memlocs[NUM_MACHINE_MODES];
187 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
188 static int secondary_memlocs_elim_used = 0;
191 /* The instruction we are doing reloads for;
192 so we can test whether a register dies in it. */
193 static rtx this_insn;
195 /* Nonzero if this instruction is a user-specified asm with operands. */
196 static int this_insn_is_asm;
198 /* If hard_regs_live_known is nonzero,
199 we can tell which hard regs are currently live,
200 at least enough to succeed in choosing dummy reloads. */
201 static int hard_regs_live_known;
203 /* Indexed by hard reg number,
204 element is nonnegative if hard reg has been spilled.
205 This vector is passed to `find_reloads' as an argument
206 and is not changed here. */
207 static short *static_reload_reg_p;
209 /* Set to 1 in subst_reg_equivs if it changes anything. */
210 static int subst_reg_equivs_changed;
212 /* On return from push_reload, holds the reload-number for the OUT
213 operand, which can be different for that from the input operand. */
214 static int output_reloadnum;
216 /* Compare two RTX's. */
217 #define MATCHES(x, y) \
218 (x == y || (x != 0 && (REG_P (x) \
219 ? REG_P (y) && REGNO (x) == REGNO (y) \
220 : rtx_equal_p (x, y) && ! side_effects_p (x))))
222 /* Indicates if two reloads purposes are for similar enough things that we
223 can merge their reloads. */
224 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
225 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
226 || ((when1) == (when2) && (op1) == (op2)) \
227 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
228 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
229 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
230 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
231 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
233 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
234 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
235 ((when1) != (when2) \
236 || ! ((op1) == (op2) \
237 || (when1) == RELOAD_FOR_INPUT \
238 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
239 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
241 /* If we are going to reload an address, compute the reload type to
243 #define ADDR_TYPE(type) \
244 ((type) == RELOAD_FOR_INPUT_ADDRESS \
245 ? RELOAD_FOR_INPADDR_ADDRESS \
246 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
247 ? RELOAD_FOR_OUTADDR_ADDRESS \
250 static int push_secondary_reload (int, rtx, int, int, enum reg_class,
251 enum machine_mode, enum reload_type,
252 enum insn_code *, secondary_reload_info *);
253 static enum reg_class find_valid_class (enum machine_mode, enum machine_mode,
255 static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
256 static void push_replacement (rtx *, int, enum machine_mode);
257 static void dup_replacements (rtx *, rtx *);
258 static void combine_reloads (void);
259 static int find_reusable_reload (rtx *, rtx, enum reg_class,
260 enum reload_type, int, int);
261 static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
262 enum machine_mode, enum reg_class, int, int);
263 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
264 static struct decomposition decompose (rtx);
265 static int immune_p (rtx, rtx, struct decomposition);
266 static bool alternative_allows_const_pool_ref (rtx, const char *, int);
267 static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
269 static rtx make_memloc (rtx, int);
270 static int maybe_memory_address_addr_space_p (enum machine_mode, rtx,
271 addr_space_t, rtx *);
272 static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
273 int, enum reload_type, int, rtx);
274 static rtx subst_reg_equivs (rtx, rtx);
275 static rtx subst_indexed_address (rtx);
276 static void update_auto_inc_notes (rtx, int, int);
277 static int find_reloads_address_1 (enum machine_mode, rtx, int,
278 enum rtx_code, enum rtx_code, rtx *,
279 int, enum reload_type,int, rtx);
280 static void find_reloads_address_part (rtx, rtx *, enum reg_class,
281 enum machine_mode, int,
282 enum reload_type, int);
283 static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
285 static void copy_replacements_1 (rtx *, rtx *, int);
286 static int find_inc_amount (rtx, rtx);
287 static int refers_to_mem_for_reload_p (rtx);
288 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
291 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
295 push_reg_equiv_alt_mem (int regno, rtx mem)
299 for (it = reg_equiv_alt_mem_list [regno]; it; it = XEXP (it, 1))
300 if (rtx_equal_p (XEXP (it, 0), mem))
303 reg_equiv_alt_mem_list [regno]
304 = alloc_EXPR_LIST (REG_EQUIV, mem,
305 reg_equiv_alt_mem_list [regno]);
308 /* Determine if any secondary reloads are needed for loading (if IN_P is
309 nonzero) or storing (if IN_P is zero) X to or from a reload register of
310 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
311 are needed, push them.
313 Return the reload number of the secondary reload we made, or -1 if
314 we didn't need one. *PICODE is set to the insn_code to use if we do
315 need a secondary reload. */
318 push_secondary_reload (int in_p, rtx x, int opnum, int optional,
319 enum reg_class reload_class,
320 enum machine_mode reload_mode, enum reload_type type,
321 enum insn_code *picode, secondary_reload_info *prev_sri)
323 enum reg_class rclass = NO_REGS;
324 enum reg_class scratch_class;
325 enum machine_mode mode = reload_mode;
326 enum insn_code icode = CODE_FOR_nothing;
327 enum insn_code t_icode = CODE_FOR_nothing;
328 enum reload_type secondary_type;
329 int s_reload, t_reload = -1;
330 const char *scratch_constraint;
332 secondary_reload_info sri;
334 if (type == RELOAD_FOR_INPUT_ADDRESS
335 || type == RELOAD_FOR_OUTPUT_ADDRESS
336 || type == RELOAD_FOR_INPADDR_ADDRESS
337 || type == RELOAD_FOR_OUTADDR_ADDRESS)
338 secondary_type = type;
340 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
342 *picode = CODE_FOR_nothing;
344 /* If X is a paradoxical SUBREG, use the inner value to determine both the
345 mode and object being reloaded. */
346 if (GET_CODE (x) == SUBREG
347 && (GET_MODE_SIZE (GET_MODE (x))
348 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
351 reload_mode = GET_MODE (x);
354 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
355 is still a pseudo-register by now, it *must* have an equivalent MEM
356 but we don't want to assume that), use that equivalent when seeing if
357 a secondary reload is needed since whether or not a reload is needed
358 might be sensitive to the form of the MEM. */
360 if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
361 && reg_equiv_mem[REGNO (x)] != 0)
362 x = reg_equiv_mem[REGNO (x)];
364 sri.icode = CODE_FOR_nothing;
365 sri.prev_sri = prev_sri;
366 rclass = (enum reg_class) targetm.secondary_reload (in_p, x, reload_class,
368 icode = (enum insn_code) sri.icode;
370 /* If we don't need any secondary registers, done. */
371 if (rclass == NO_REGS && icode == CODE_FOR_nothing)
374 if (rclass != NO_REGS)
375 t_reload = push_secondary_reload (in_p, x, opnum, optional, rclass,
376 reload_mode, type, &t_icode, &sri);
378 /* If we will be using an insn, the secondary reload is for a
381 if (icode != CODE_FOR_nothing)
383 /* If IN_P is nonzero, the reload register will be the output in
384 operand 0. If IN_P is zero, the reload register will be the input
385 in operand 1. Outputs should have an initial "=", which we must
388 /* ??? It would be useful to be able to handle only two, or more than
389 three, operands, but for now we can only handle the case of having
390 exactly three: output, input and one temp/scratch. */
391 gcc_assert (insn_data[(int) icode].n_operands == 3);
393 /* ??? We currently have no way to represent a reload that needs
394 an icode to reload from an intermediate tertiary reload register.
395 We should probably have a new field in struct reload to tag a
396 chain of scratch operand reloads onto. */
397 gcc_assert (rclass == NO_REGS);
399 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
400 gcc_assert (*scratch_constraint == '=');
401 scratch_constraint++;
402 if (*scratch_constraint == '&')
403 scratch_constraint++;
404 letter = *scratch_constraint;
405 scratch_class = (letter == 'r' ? GENERAL_REGS
406 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) letter,
407 scratch_constraint));
409 rclass = scratch_class;
410 mode = insn_data[(int) icode].operand[2].mode;
413 /* This case isn't valid, so fail. Reload is allowed to use the same
414 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
415 in the case of a secondary register, we actually need two different
416 registers for correct code. We fail here to prevent the possibility of
417 silently generating incorrect code later.
419 The convention is that secondary input reloads are valid only if the
420 secondary_class is different from class. If you have such a case, you
421 can not use secondary reloads, you must work around the problem some
424 Allow this when a reload_in/out pattern is being used. I.e. assume
425 that the generated code handles this case. */
427 gcc_assert (!in_p || rclass != reload_class || icode != CODE_FOR_nothing
428 || t_icode != CODE_FOR_nothing);
430 /* See if we can reuse an existing secondary reload. */
431 for (s_reload = 0; s_reload < n_reloads; s_reload++)
432 if (rld[s_reload].secondary_p
433 && (reg_class_subset_p (rclass, rld[s_reload].rclass)
434 || reg_class_subset_p (rld[s_reload].rclass, rclass))
435 && ((in_p && rld[s_reload].inmode == mode)
436 || (! in_p && rld[s_reload].outmode == mode))
437 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
438 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
439 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
440 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
441 && (SMALL_REGISTER_CLASS_P (rclass)
442 || targetm.small_register_classes_for_mode_p (VOIDmode))
443 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
444 opnum, rld[s_reload].opnum))
447 rld[s_reload].inmode = mode;
449 rld[s_reload].outmode = mode;
451 if (reg_class_subset_p (rclass, rld[s_reload].rclass))
452 rld[s_reload].rclass = rclass;
454 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
455 rld[s_reload].optional &= optional;
456 rld[s_reload].secondary_p = 1;
457 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
458 opnum, rld[s_reload].opnum))
459 rld[s_reload].when_needed = RELOAD_OTHER;
464 if (s_reload == n_reloads)
466 #ifdef SECONDARY_MEMORY_NEEDED
467 /* If we need a memory location to copy between the two reload regs,
468 set it up now. Note that we do the input case before making
469 the reload and the output case after. This is due to the
470 way reloads are output. */
472 if (in_p && icode == CODE_FOR_nothing
473 && SECONDARY_MEMORY_NEEDED (rclass, reload_class, mode))
475 get_secondary_mem (x, reload_mode, opnum, type);
477 /* We may have just added new reloads. Make sure we add
478 the new reload at the end. */
479 s_reload = n_reloads;
483 /* We need to make a new secondary reload for this register class. */
484 rld[s_reload].in = rld[s_reload].out = 0;
485 rld[s_reload].rclass = rclass;
487 rld[s_reload].inmode = in_p ? mode : VOIDmode;
488 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
489 rld[s_reload].reg_rtx = 0;
490 rld[s_reload].optional = optional;
491 rld[s_reload].inc = 0;
492 /* Maybe we could combine these, but it seems too tricky. */
493 rld[s_reload].nocombine = 1;
494 rld[s_reload].in_reg = 0;
495 rld[s_reload].out_reg = 0;
496 rld[s_reload].opnum = opnum;
497 rld[s_reload].when_needed = secondary_type;
498 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
499 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
500 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
501 rld[s_reload].secondary_out_icode
502 = ! in_p ? t_icode : CODE_FOR_nothing;
503 rld[s_reload].secondary_p = 1;
507 #ifdef SECONDARY_MEMORY_NEEDED
508 if (! in_p && icode == CODE_FOR_nothing
509 && SECONDARY_MEMORY_NEEDED (reload_class, rclass, mode))
510 get_secondary_mem (x, mode, opnum, type);
518 /* If a secondary reload is needed, return its class. If both an intermediate
519 register and a scratch register is needed, we return the class of the
520 intermediate register. */
522 secondary_reload_class (bool in_p, enum reg_class rclass,
523 enum machine_mode mode, rtx x)
525 enum insn_code icode;
526 secondary_reload_info sri;
528 sri.icode = CODE_FOR_nothing;
531 = (enum reg_class) targetm.secondary_reload (in_p, x, rclass, mode, &sri);
532 icode = (enum insn_code) sri.icode;
534 /* If there are no secondary reloads at all, we return NO_REGS.
535 If an intermediate register is needed, we return its class. */
536 if (icode == CODE_FOR_nothing || rclass != NO_REGS)
539 /* No intermediate register is needed, but we have a special reload
540 pattern, which we assume for now needs a scratch register. */
541 return scratch_reload_class (icode);
544 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
545 three operands, verify that operand 2 is an output operand, and return
547 ??? We'd like to be able to handle any pattern with at least 2 operands,
548 for zero or more scratch registers, but that needs more infrastructure. */
550 scratch_reload_class (enum insn_code icode)
552 const char *scratch_constraint;
554 enum reg_class rclass;
556 gcc_assert (insn_data[(int) icode].n_operands == 3);
557 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
558 gcc_assert (*scratch_constraint == '=');
559 scratch_constraint++;
560 if (*scratch_constraint == '&')
561 scratch_constraint++;
562 scratch_letter = *scratch_constraint;
563 if (scratch_letter == 'r')
565 rclass = REG_CLASS_FROM_CONSTRAINT ((unsigned char) scratch_letter,
567 gcc_assert (rclass != NO_REGS);
571 #ifdef SECONDARY_MEMORY_NEEDED
573 /* Return a memory location that will be used to copy X in mode MODE.
574 If we haven't already made a location for this mode in this insn,
575 call find_reloads_address on the location being returned. */
578 get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
579 int opnum, enum reload_type type)
584 /* By default, if MODE is narrower than a word, widen it to a word.
585 This is required because most machines that require these memory
586 locations do not support short load and stores from all registers
587 (e.g., FP registers). */
589 #ifdef SECONDARY_MEMORY_NEEDED_MODE
590 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
592 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
593 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
596 /* If we already have made a MEM for this operand in MODE, return it. */
597 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
598 return secondary_memlocs_elim[(int) mode][opnum];
600 /* If this is the first time we've tried to get a MEM for this mode,
601 allocate a new one. `something_changed' in reload will get set
602 by noticing that the frame size has changed. */
604 if (secondary_memlocs[(int) mode] == 0)
606 #ifdef SECONDARY_MEMORY_NEEDED_RTX
607 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
609 secondary_memlocs[(int) mode]
610 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
614 /* Get a version of the address doing any eliminations needed. If that
615 didn't give us a new MEM, make a new one if it isn't valid. */
617 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
618 mem_valid = strict_memory_address_addr_space_p (mode, XEXP (loc, 0),
619 MEM_ADDR_SPACE (loc));
621 if (! mem_valid && loc == secondary_memlocs[(int) mode])
622 loc = copy_rtx (loc);
624 /* The only time the call below will do anything is if the stack
625 offset is too large. In that case IND_LEVELS doesn't matter, so we
626 can just pass a zero. Adjust the type to be the address of the
627 corresponding object. If the address was valid, save the eliminated
628 address. If it wasn't valid, we need to make a reload each time, so
633 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
634 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
637 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
641 secondary_memlocs_elim[(int) mode][opnum] = loc;
642 if (secondary_memlocs_elim_used <= (int)mode)
643 secondary_memlocs_elim_used = (int)mode + 1;
647 /* Clear any secondary memory locations we've made. */
650 clear_secondary_mem (void)
652 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
654 #endif /* SECONDARY_MEMORY_NEEDED */
657 /* Find the largest class which has at least one register valid in
658 mode INNER, and which for every such register, that register number
659 plus N is also valid in OUTER (if in range) and is cheap to move
660 into REGNO. Such a class must exist. */
662 static enum reg_class
663 find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED,
664 enum machine_mode inner ATTRIBUTE_UNUSED, int n,
665 unsigned int dest_regno ATTRIBUTE_UNUSED)
670 enum reg_class best_class = NO_REGS;
671 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
672 unsigned int best_size = 0;
675 for (rclass = 1; rclass < N_REG_CLASSES; rclass++)
679 for (regno = 0; regno < FIRST_PSEUDO_REGISTER - n && ! bad; regno++)
680 if (TEST_HARD_REG_BIT (reg_class_contents[rclass], regno))
682 if (HARD_REGNO_MODE_OK (regno, inner))
685 if (! TEST_HARD_REG_BIT (reg_class_contents[rclass], regno + n)
686 || ! HARD_REGNO_MODE_OK (regno + n, outer))
693 cost = register_move_cost (outer, (enum reg_class) rclass, dest_class);
695 if ((reg_class_size[rclass] > best_size
696 && (best_cost < 0 || best_cost >= cost))
699 best_class = (enum reg_class) rclass;
700 best_size = reg_class_size[rclass];
701 best_cost = register_move_cost (outer, (enum reg_class) rclass,
706 gcc_assert (best_size != 0);
711 /* Return the number of a previously made reload that can be combined with
712 a new one, or n_reloads if none of the existing reloads can be used.
713 OUT, RCLASS, TYPE and OPNUM are the same arguments as passed to
714 push_reload, they determine the kind of the new reload that we try to
715 combine. P_IN points to the corresponding value of IN, which can be
716 modified by this function.
717 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
720 find_reusable_reload (rtx *p_in, rtx out, enum reg_class rclass,
721 enum reload_type type, int opnum, int dont_share)
725 /* We can't merge two reloads if the output of either one is
728 if (earlyclobber_operand_p (out))
731 /* We can use an existing reload if the class is right
732 and at least one of IN and OUT is a match
733 and the other is at worst neutral.
734 (A zero compared against anything is neutral.)
736 For targets with small register classes, don't use existing reloads
737 unless they are for the same thing since that can cause us to need
738 more reload registers than we otherwise would. */
740 for (i = 0; i < n_reloads; i++)
741 if ((reg_class_subset_p (rclass, rld[i].rclass)
742 || reg_class_subset_p (rld[i].rclass, rclass))
743 /* If the existing reload has a register, it must fit our class. */
744 && (rld[i].reg_rtx == 0
745 || TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
746 true_regnum (rld[i].reg_rtx)))
747 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
748 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
749 || (out != 0 && MATCHES (rld[i].out, out)
750 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
751 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
752 && (SMALL_REGISTER_CLASS_P (rclass)
753 || targetm.small_register_classes_for_mode_p (VOIDmode))
754 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
757 /* Reloading a plain reg for input can match a reload to postincrement
758 that reg, since the postincrement's value is the right value.
759 Likewise, it can match a preincrement reload, since we regard
760 the preincrementation as happening before any ref in this insn
762 for (i = 0; i < n_reloads; i++)
763 if ((reg_class_subset_p (rclass, rld[i].rclass)
764 || reg_class_subset_p (rld[i].rclass, rclass))
765 /* If the existing reload has a register, it must fit our
767 && (rld[i].reg_rtx == 0
768 || TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
769 true_regnum (rld[i].reg_rtx)))
770 && out == 0 && rld[i].out == 0 && rld[i].in != 0
772 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC
773 && MATCHES (XEXP (rld[i].in, 0), in))
774 || (REG_P (rld[i].in)
775 && GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC
776 && MATCHES (XEXP (in, 0), rld[i].in)))
777 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
778 && (SMALL_REGISTER_CLASS_P (rclass)
779 || targetm.small_register_classes_for_mode_p (VOIDmode))
780 && MERGABLE_RELOADS (type, rld[i].when_needed,
781 opnum, rld[i].opnum))
783 /* Make sure reload_in ultimately has the increment,
784 not the plain register. */
792 /* Return nonzero if X is a SUBREG which will require reloading of its
793 SUBREG_REG expression. */
796 reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
800 /* Only SUBREGs are problematical. */
801 if (GET_CODE (x) != SUBREG)
804 inner = SUBREG_REG (x);
806 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
807 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
810 /* If INNER is not a hard register, then INNER will not need to
813 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
816 /* If INNER is not ok for MODE, then INNER will need reloading. */
817 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
820 /* If the outer part is a word or smaller, INNER larger than a
821 word and the number of regs for INNER is not the same as the
822 number of words in INNER, then INNER will need reloading. */
823 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
825 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
826 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
827 != (int) hard_regno_nregs[REGNO (inner)][GET_MODE (inner)]));
830 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
831 requiring an extra reload register. The caller has already found that
832 IN contains some reference to REGNO, so check that we can produce the
833 new value in a single step. E.g. if we have
834 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
835 instruction that adds one to a register, this should succeed.
836 However, if we have something like
837 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
838 needs to be loaded into a register first, we need a separate reload
840 Such PLUS reloads are generated by find_reload_address_part.
841 The out-of-range PLUS expressions are usually introduced in the instruction
842 patterns by register elimination and substituting pseudos without a home
843 by their function-invariant equivalences. */
845 can_reload_into (rtx in, int regno, enum machine_mode mode)
849 struct recog_data save_recog_data;
851 /* For matching constraints, we often get notional input reloads where
852 we want to use the original register as the reload register. I.e.
853 technically this is a non-optional input-output reload, but IN is
854 already a valid register, and has been chosen as the reload register.
855 Speed this up, since it trivially works. */
859 /* To test MEMs properly, we'd have to take into account all the reloads
860 that are already scheduled, which can become quite complicated.
861 And since we've already handled address reloads for this MEM, it
862 should always succeed anyway. */
866 /* If we can make a simple SET insn that does the job, everything should
868 dst = gen_rtx_REG (mode, regno);
869 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
870 save_recog_data = recog_data;
871 if (recog_memoized (test_insn) >= 0)
873 extract_insn (test_insn);
874 r = constrain_operands (1);
876 recog_data = save_recog_data;
880 /* Record one reload that needs to be performed.
881 IN is an rtx saying where the data are to be found before this instruction.
882 OUT says where they must be stored after the instruction.
883 (IN is zero for data not read, and OUT is zero for data not written.)
884 INLOC and OUTLOC point to the places in the instructions where
885 IN and OUT were found.
886 If IN and OUT are both nonzero, it means the same register must be used
887 to reload both IN and OUT.
889 RCLASS is a register class required for the reloaded data.
890 INMODE is the machine mode that the instruction requires
891 for the reg that replaces IN and OUTMODE is likewise for OUT.
893 If IN is zero, then OUT's location and mode should be passed as
896 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
898 OPTIONAL nonzero means this reload does not need to be performed:
899 it can be discarded if that is more convenient.
901 OPNUM and TYPE say what the purpose of this reload is.
903 The return value is the reload-number for this reload.
905 If both IN and OUT are nonzero, in some rare cases we might
906 want to make two separate reloads. (Actually we never do this now.)
907 Therefore, the reload-number for OUT is stored in
908 output_reloadnum when we return; the return value applies to IN.
909 Usually (presently always), when IN and OUT are nonzero,
910 the two reload-numbers are equal, but the caller should be careful to
914 push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
915 enum reg_class rclass, enum machine_mode inmode,
916 enum machine_mode outmode, int strict_low, int optional,
917 int opnum, enum reload_type type)
921 int dont_remove_subreg = 0;
922 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
923 int secondary_in_reload = -1, secondary_out_reload = -1;
924 enum insn_code secondary_in_icode = CODE_FOR_nothing;
925 enum insn_code secondary_out_icode = CODE_FOR_nothing;
927 /* INMODE and/or OUTMODE could be VOIDmode if no mode
928 has been specified for the operand. In that case,
929 use the operand's mode as the mode to reload. */
930 if (inmode == VOIDmode && in != 0)
931 inmode = GET_MODE (in);
932 if (outmode == VOIDmode && out != 0)
933 outmode = GET_MODE (out);
935 /* If find_reloads and friends until now missed to replace a pseudo
936 with a constant of reg_equiv_constant something went wrong
938 Note that it can't simply be done here if we missed it earlier
939 since the constant might need to be pushed into the literal pool
940 and the resulting memref would probably need further
942 if (in != 0 && REG_P (in))
944 int regno = REGNO (in);
946 gcc_assert (regno < FIRST_PSEUDO_REGISTER
947 || reg_renumber[regno] >= 0
948 || reg_equiv_constant[regno] == NULL_RTX);
951 /* reg_equiv_constant only contains constants which are obviously
952 not appropriate as destination. So if we would need to replace
953 the destination pseudo with a constant we are in real
955 if (out != 0 && REG_P (out))
957 int regno = REGNO (out);
959 gcc_assert (regno < FIRST_PSEUDO_REGISTER
960 || reg_renumber[regno] >= 0
961 || reg_equiv_constant[regno] == NULL_RTX);
964 /* If we have a read-write operand with an address side-effect,
965 change either IN or OUT so the side-effect happens only once. */
966 if (in != 0 && out != 0 && MEM_P (in) && rtx_equal_p (in, out))
967 switch (GET_CODE (XEXP (in, 0)))
969 case POST_INC: case POST_DEC: case POST_MODIFY:
970 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
973 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
974 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
981 /* If we are reloading a (SUBREG constant ...), really reload just the
982 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
983 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
984 a pseudo and hence will become a MEM) with M1 wider than M2 and the
985 register is a pseudo, also reload the inside expression.
986 For machines that extend byte loads, do this for any SUBREG of a pseudo
987 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
988 M2 is an integral mode that gets extended when loaded.
989 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
990 either M1 is not valid for R or M2 is wider than a word but we only
991 need one word to store an M2-sized quantity in R.
992 (However, if OUT is nonzero, we need to reload the reg *and*
993 the subreg, so do nothing here, and let following statement handle it.)
995 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
996 we can't handle it here because CONST_INT does not indicate a mode.
998 Similarly, we must reload the inside expression if we have a
999 STRICT_LOW_PART (presumably, in == out in this case).
1001 Also reload the inner expression if it does not require a secondary
1002 reload but the SUBREG does.
1004 Finally, reload the inner expression if it is a register that is in
1005 the class whose registers cannot be referenced in a different size
1006 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
1007 cannot reload just the inside since we might end up with the wrong
1008 register class. But if it is inside a STRICT_LOW_PART, we have
1009 no choice, so we hope we do get the right register class there. */
1011 if (in != 0 && GET_CODE (in) == SUBREG
1012 && (subreg_lowpart_p (in) || strict_low)
1013 #ifdef CANNOT_CHANGE_MODE_CLASS
1014 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, rclass)
1016 && (CONSTANT_P (SUBREG_REG (in))
1017 || GET_CODE (SUBREG_REG (in)) == PLUS
1019 || (((REG_P (SUBREG_REG (in))
1020 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1021 || MEM_P (SUBREG_REG (in)))
1022 && ((GET_MODE_SIZE (inmode)
1023 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1024 #ifdef LOAD_EXTEND_OP
1025 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1026 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1028 && (GET_MODE_SIZE (inmode)
1029 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1030 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
1031 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != UNKNOWN)
1033 #ifdef WORD_REGISTER_OPERATIONS
1034 || ((GET_MODE_SIZE (inmode)
1035 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1036 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1037 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1041 || (REG_P (SUBREG_REG (in))
1042 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1043 /* The case where out is nonzero
1044 is handled differently in the following statement. */
1045 && (out == 0 || subreg_lowpart_p (in))
1046 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1047 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1049 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1051 != (int) hard_regno_nregs[REGNO (SUBREG_REG (in))]
1052 [GET_MODE (SUBREG_REG (in))]))
1053 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1054 || (secondary_reload_class (1, rclass, inmode, in) != NO_REGS
1055 && (secondary_reload_class (1, rclass, GET_MODE (SUBREG_REG (in)),
1058 #ifdef CANNOT_CHANGE_MODE_CLASS
1059 || (REG_P (SUBREG_REG (in))
1060 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1061 && REG_CANNOT_CHANGE_MODE_P
1062 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1066 in_subreg_loc = inloc;
1067 inloc = &SUBREG_REG (in);
1069 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1071 /* This is supposed to happen only for paradoxical subregs made by
1072 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1073 gcc_assert (GET_MODE_SIZE (GET_MODE (in)) <= GET_MODE_SIZE (inmode));
1075 inmode = GET_MODE (in);
1078 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1079 either M1 is not valid for R or M2 is wider than a word but we only
1080 need one word to store an M2-sized quantity in R.
1082 However, we must reload the inner reg *as well as* the subreg in
1085 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1086 code above. This can happen if SUBREG_BYTE != 0. */
1088 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1090 enum reg_class in_class = rclass;
1092 if (REG_P (SUBREG_REG (in)))
1094 = find_valid_class (inmode, GET_MODE (SUBREG_REG (in)),
1095 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1096 GET_MODE (SUBREG_REG (in)),
1099 REGNO (SUBREG_REG (in)));
1101 /* This relies on the fact that emit_reload_insns outputs the
1102 instructions for input reloads of type RELOAD_OTHER in the same
1103 order as the reloads. Thus if the outer reload is also of type
1104 RELOAD_OTHER, we are guaranteed that this inner reload will be
1105 output before the outer reload. */
1106 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1107 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1108 dont_remove_subreg = 1;
1111 /* Similarly for paradoxical and problematical SUBREGs on the output.
1112 Note that there is no reason we need worry about the previous value
1113 of SUBREG_REG (out); even if wider than out,
1114 storing in a subreg is entitled to clobber it all
1115 (except in the case of STRICT_LOW_PART,
1116 and in that case the constraint should label it input-output.) */
1117 if (out != 0 && GET_CODE (out) == SUBREG
1118 && (subreg_lowpart_p (out) || strict_low)
1119 #ifdef CANNOT_CHANGE_MODE_CLASS
1120 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, rclass)
1122 && (CONSTANT_P (SUBREG_REG (out))
1124 || (((REG_P (SUBREG_REG (out))
1125 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1126 || MEM_P (SUBREG_REG (out)))
1127 && ((GET_MODE_SIZE (outmode)
1128 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1129 #ifdef WORD_REGISTER_OPERATIONS
1130 || ((GET_MODE_SIZE (outmode)
1131 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1132 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1133 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1137 || (REG_P (SUBREG_REG (out))
1138 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1139 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1140 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1142 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1144 != (int) hard_regno_nregs[REGNO (SUBREG_REG (out))]
1145 [GET_MODE (SUBREG_REG (out))]))
1146 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1147 || (secondary_reload_class (0, rclass, outmode, out) != NO_REGS
1148 && (secondary_reload_class (0, rclass, GET_MODE (SUBREG_REG (out)),
1151 #ifdef CANNOT_CHANGE_MODE_CLASS
1152 || (REG_P (SUBREG_REG (out))
1153 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1154 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1155 GET_MODE (SUBREG_REG (out)),
1160 out_subreg_loc = outloc;
1161 outloc = &SUBREG_REG (out);
1163 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1164 gcc_assert (!MEM_P (out)
1165 || GET_MODE_SIZE (GET_MODE (out))
1166 <= GET_MODE_SIZE (outmode));
1168 outmode = GET_MODE (out);
1171 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1172 either M1 is not valid for R or M2 is wider than a word but we only
1173 need one word to store an M2-sized quantity in R.
1175 However, we must reload the inner reg *as well as* the subreg in
1176 that case. In this case, the inner reg is an in-out reload. */
1178 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1180 /* This relies on the fact that emit_reload_insns outputs the
1181 instructions for output reloads of type RELOAD_OTHER in reverse
1182 order of the reloads. Thus if the outer reload is also of type
1183 RELOAD_OTHER, we are guaranteed that this inner reload will be
1184 output after the outer reload. */
1185 dont_remove_subreg = 1;
1186 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1188 find_valid_class (outmode, GET_MODE (SUBREG_REG (out)),
1189 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1190 GET_MODE (SUBREG_REG (out)),
1193 REGNO (SUBREG_REG (out))),
1194 VOIDmode, VOIDmode, 0, 0,
1195 opnum, RELOAD_OTHER);
1198 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1199 if (in != 0 && out != 0 && MEM_P (out)
1200 && (REG_P (in) || MEM_P (in) || GET_CODE (in) == PLUS)
1201 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1204 /* If IN is a SUBREG of a hard register, make a new REG. This
1205 simplifies some of the cases below. */
1207 if (in != 0 && GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))
1208 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1209 && ! dont_remove_subreg)
1210 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1212 /* Similarly for OUT. */
1213 if (out != 0 && GET_CODE (out) == SUBREG
1214 && REG_P (SUBREG_REG (out))
1215 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1216 && ! dont_remove_subreg)
1217 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1219 /* Narrow down the class of register wanted if that is
1220 desirable on this machine for efficiency. */
1222 enum reg_class preferred_class = rclass;
1225 preferred_class = PREFERRED_RELOAD_CLASS (in, rclass);
1227 /* Output reloads may need analogous treatment, different in detail. */
1228 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1230 preferred_class = PREFERRED_OUTPUT_RELOAD_CLASS (out, preferred_class);
1233 /* Discard what the target said if we cannot do it. */
1234 if (preferred_class != NO_REGS
1235 || (optional && type == RELOAD_FOR_OUTPUT))
1236 rclass = preferred_class;
1239 /* Make sure we use a class that can handle the actual pseudo
1240 inside any subreg. For example, on the 386, QImode regs
1241 can appear within SImode subregs. Although GENERAL_REGS
1242 can handle SImode, QImode needs a smaller class. */
1243 #ifdef LIMIT_RELOAD_CLASS
1245 rclass = LIMIT_RELOAD_CLASS (inmode, rclass);
1246 else if (in != 0 && GET_CODE (in) == SUBREG)
1247 rclass = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), rclass);
1250 rclass = LIMIT_RELOAD_CLASS (outmode, rclass);
1251 if (out != 0 && GET_CODE (out) == SUBREG)
1252 rclass = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), rclass);
1255 /* Verify that this class is at least possible for the mode that
1257 if (this_insn_is_asm)
1259 enum machine_mode mode;
1260 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1264 if (mode == VOIDmode)
1266 error_for_asm (this_insn, "cannot reload integer constant "
1267 "operand in %<asm%>");
1272 outmode = word_mode;
1274 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1275 if (HARD_REGNO_MODE_OK (i, mode)
1276 && in_hard_reg_set_p (reg_class_contents[(int) rclass], mode, i))
1278 if (i == FIRST_PSEUDO_REGISTER)
1280 error_for_asm (this_insn, "impossible register constraint "
1282 /* Avoid further trouble with this insn. */
1283 PATTERN (this_insn) = gen_rtx_USE (VOIDmode, const0_rtx);
1284 /* We used to continue here setting class to ALL_REGS, but it triggers
1285 sanity check on i386 for:
1286 void foo(long double d)
1290 Returning zero here ought to be safe as we take care in
1291 find_reloads to not process the reloads when instruction was
1298 /* Optional output reloads are always OK even if we have no register class,
1299 since the function of these reloads is only to have spill_reg_store etc.
1300 set, so that the storing insn can be deleted later. */
1301 gcc_assert (rclass != NO_REGS
1302 || (optional != 0 && type == RELOAD_FOR_OUTPUT));
1304 i = find_reusable_reload (&in, out, rclass, type, opnum, dont_share);
1308 /* See if we need a secondary reload register to move between CLASS
1309 and IN or CLASS and OUT. Get the icode and push any required reloads
1310 needed for each of them if so. */
1314 = push_secondary_reload (1, in, opnum, optional, rclass, inmode, type,
1315 &secondary_in_icode, NULL);
1316 if (out != 0 && GET_CODE (out) != SCRATCH)
1317 secondary_out_reload
1318 = push_secondary_reload (0, out, opnum, optional, rclass, outmode,
1319 type, &secondary_out_icode, NULL);
1321 /* We found no existing reload suitable for re-use.
1322 So add an additional reload. */
1324 #ifdef SECONDARY_MEMORY_NEEDED
1325 /* If a memory location is needed for the copy, make one. */
1328 || (GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))))
1329 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1330 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1332 get_secondary_mem (in, inmode, opnum, type);
1338 rld[i].rclass = rclass;
1339 rld[i].inmode = inmode;
1340 rld[i].outmode = outmode;
1342 rld[i].optional = optional;
1344 rld[i].nocombine = 0;
1345 rld[i].in_reg = inloc ? *inloc : 0;
1346 rld[i].out_reg = outloc ? *outloc : 0;
1347 rld[i].opnum = opnum;
1348 rld[i].when_needed = type;
1349 rld[i].secondary_in_reload = secondary_in_reload;
1350 rld[i].secondary_out_reload = secondary_out_reload;
1351 rld[i].secondary_in_icode = secondary_in_icode;
1352 rld[i].secondary_out_icode = secondary_out_icode;
1353 rld[i].secondary_p = 0;
1357 #ifdef SECONDARY_MEMORY_NEEDED
1360 || (GET_CODE (out) == SUBREG && REG_P (SUBREG_REG (out))))
1361 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1362 && SECONDARY_MEMORY_NEEDED (rclass,
1363 REGNO_REG_CLASS (reg_or_subregno (out)),
1365 get_secondary_mem (out, outmode, opnum, type);
1370 /* We are reusing an existing reload,
1371 but we may have additional information for it.
1372 For example, we may now have both IN and OUT
1373 while the old one may have just one of them. */
1375 /* The modes can be different. If they are, we want to reload in
1376 the larger mode, so that the value is valid for both modes. */
1377 if (inmode != VOIDmode
1378 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1379 rld[i].inmode = inmode;
1380 if (outmode != VOIDmode
1381 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1382 rld[i].outmode = outmode;
1385 rtx in_reg = inloc ? *inloc : 0;
1386 /* If we merge reloads for two distinct rtl expressions that
1387 are identical in content, there might be duplicate address
1388 reloads. Remove the extra set now, so that if we later find
1389 that we can inherit this reload, we can get rid of the
1390 address reloads altogether.
1392 Do not do this if both reloads are optional since the result
1393 would be an optional reload which could potentially leave
1394 unresolved address replacements.
1396 It is not sufficient to call transfer_replacements since
1397 choose_reload_regs will remove the replacements for address
1398 reloads of inherited reloads which results in the same
1400 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1401 && ! (rld[i].optional && optional))
1403 /* We must keep the address reload with the lower operand
1405 if (opnum > rld[i].opnum)
1407 remove_address_replacements (in);
1409 in_reg = rld[i].in_reg;
1412 remove_address_replacements (rld[i].in);
1414 /* When emitting reloads we don't necessarily look at the in-
1415 and outmode, but also directly at the operands (in and out).
1416 So we can't simply overwrite them with whatever we have found
1417 for this (to-be-merged) reload, we have to "merge" that too.
1418 Reusing another reload already verified that we deal with the
1419 same operands, just possibly in different modes. So we
1420 overwrite the operands only when the new mode is larger.
1421 See also PR33613. */
1423 || GET_MODE_SIZE (GET_MODE (in))
1424 > GET_MODE_SIZE (GET_MODE (rld[i].in)))
1428 && GET_MODE_SIZE (GET_MODE (in_reg))
1429 > GET_MODE_SIZE (GET_MODE (rld[i].in_reg))))
1430 rld[i].in_reg = in_reg;
1436 && GET_MODE_SIZE (GET_MODE (out))
1437 > GET_MODE_SIZE (GET_MODE (rld[i].out))))
1441 || GET_MODE_SIZE (GET_MODE (*outloc))
1442 > GET_MODE_SIZE (GET_MODE (rld[i].out_reg))))
1443 rld[i].out_reg = *outloc;
1445 if (reg_class_subset_p (rclass, rld[i].rclass))
1446 rld[i].rclass = rclass;
1447 rld[i].optional &= optional;
1448 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1449 opnum, rld[i].opnum))
1450 rld[i].when_needed = RELOAD_OTHER;
1451 rld[i].opnum = MIN (rld[i].opnum, opnum);
1454 /* If the ostensible rtx being reloaded differs from the rtx found
1455 in the location to substitute, this reload is not safe to combine
1456 because we cannot reliably tell whether it appears in the insn. */
1458 if (in != 0 && in != *inloc)
1459 rld[i].nocombine = 1;
1462 /* This was replaced by changes in find_reloads_address_1 and the new
1463 function inc_for_reload, which go with a new meaning of reload_inc. */
1465 /* If this is an IN/OUT reload in an insn that sets the CC,
1466 it must be for an autoincrement. It doesn't work to store
1467 the incremented value after the insn because that would clobber the CC.
1468 So we must do the increment of the value reloaded from,
1469 increment it, store it back, then decrement again. */
1470 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1474 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1475 /* If we did not find a nonzero amount-to-increment-by,
1476 that contradicts the belief that IN is being incremented
1477 in an address in this insn. */
1478 gcc_assert (rld[i].inc != 0);
1482 /* If we will replace IN and OUT with the reload-reg,
1483 record where they are located so that substitution need
1484 not do a tree walk. */
1486 if (replace_reloads)
1490 struct replacement *r = &replacements[n_replacements++];
1492 r->subreg_loc = in_subreg_loc;
1496 if (outloc != 0 && outloc != inloc)
1498 struct replacement *r = &replacements[n_replacements++];
1501 r->subreg_loc = out_subreg_loc;
1506 /* If this reload is just being introduced and it has both
1507 an incoming quantity and an outgoing quantity that are
1508 supposed to be made to match, see if either one of the two
1509 can serve as the place to reload into.
1511 If one of them is acceptable, set rld[i].reg_rtx
1514 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1516 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1519 earlyclobber_operand_p (out));
1521 /* If the outgoing register already contains the same value
1522 as the incoming one, we can dispense with loading it.
1523 The easiest way to tell the caller that is to give a phony
1524 value for the incoming operand (same as outgoing one). */
1525 if (rld[i].reg_rtx == out
1526 && (REG_P (in) || CONSTANT_P (in))
1527 && 0 != find_equiv_reg (in, this_insn, NO_REGS, REGNO (out),
1528 static_reload_reg_p, i, inmode))
1532 /* If this is an input reload and the operand contains a register that
1533 dies in this insn and is used nowhere else, see if it is the right class
1534 to be used for this reload. Use it if so. (This occurs most commonly
1535 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1536 this if it is also an output reload that mentions the register unless
1537 the output is a SUBREG that clobbers an entire register.
1539 Note that the operand might be one of the spill regs, if it is a
1540 pseudo reg and we are in a block where spilling has not taken place.
1541 But if there is no spilling in this block, that is OK.
1542 An explicitly used hard reg cannot be a spill reg. */
1544 if (rld[i].reg_rtx == 0 && in != 0 && hard_regs_live_known)
1548 enum machine_mode rel_mode = inmode;
1550 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1553 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1554 if (REG_NOTE_KIND (note) == REG_DEAD
1555 && REG_P (XEXP (note, 0))
1556 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1557 && reg_mentioned_p (XEXP (note, 0), in)
1558 /* Check that a former pseudo is valid; see find_dummy_reload. */
1559 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1560 || (! bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR),
1561 ORIGINAL_REGNO (XEXP (note, 0)))
1562 && hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))] == 1))
1563 && ! refers_to_regno_for_reload_p (regno,
1564 end_hard_regno (rel_mode,
1566 PATTERN (this_insn), inloc)
1567 /* If this is also an output reload, IN cannot be used as
1568 the reload register if it is set in this insn unless IN
1570 && (out == 0 || in == out
1571 || ! hard_reg_set_here_p (regno,
1572 end_hard_regno (rel_mode, regno),
1573 PATTERN (this_insn)))
1574 /* ??? Why is this code so different from the previous?
1575 Is there any simple coherent way to describe the two together?
1576 What's going on here. */
1578 || (GET_CODE (in) == SUBREG
1579 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1581 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1582 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1583 /* Make sure the operand fits in the reg that dies. */
1584 && (GET_MODE_SIZE (rel_mode)
1585 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1586 && HARD_REGNO_MODE_OK (regno, inmode)
1587 && HARD_REGNO_MODE_OK (regno, outmode))
1590 unsigned int nregs = MAX (hard_regno_nregs[regno][inmode],
1591 hard_regno_nregs[regno][outmode]);
1593 for (offs = 0; offs < nregs; offs++)
1594 if (fixed_regs[regno + offs]
1595 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
1600 && (! (refers_to_regno_for_reload_p
1601 (regno, end_hard_regno (inmode, regno), in, (rtx *) 0))
1602 || can_reload_into (in, regno, inmode)))
1604 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1611 output_reloadnum = i;
1616 /* Record an additional place we must replace a value
1617 for which we have already recorded a reload.
1618 RELOADNUM is the value returned by push_reload
1619 when the reload was recorded.
1620 This is used in insn patterns that use match_dup. */
1623 push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1625 if (replace_reloads)
1627 struct replacement *r = &replacements[n_replacements++];
1628 r->what = reloadnum;
1635 /* Duplicate any replacement we have recorded to apply at
1636 location ORIG_LOC to also be performed at DUP_LOC.
1637 This is used in insn patterns that use match_dup. */
1640 dup_replacements (rtx *dup_loc, rtx *orig_loc)
1642 int i, n = n_replacements;
1644 for (i = 0; i < n; i++)
1646 struct replacement *r = &replacements[i];
1647 if (r->where == orig_loc)
1648 push_replacement (dup_loc, r->what, r->mode);
1652 /* Transfer all replacements that used to be in reload FROM to be in
1656 transfer_replacements (int to, int from)
1660 for (i = 0; i < n_replacements; i++)
1661 if (replacements[i].what == from)
1662 replacements[i].what = to;
1665 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1666 or a subpart of it. If we have any replacements registered for IN_RTX,
1667 cancel the reloads that were supposed to load them.
1668 Return nonzero if we canceled any reloads. */
1670 remove_address_replacements (rtx in_rtx)
1673 char reload_flags[MAX_RELOADS];
1674 int something_changed = 0;
1676 memset (reload_flags, 0, sizeof reload_flags);
1677 for (i = 0, j = 0; i < n_replacements; i++)
1679 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1680 reload_flags[replacements[i].what] |= 1;
1683 replacements[j++] = replacements[i];
1684 reload_flags[replacements[i].what] |= 2;
1687 /* Note that the following store must be done before the recursive calls. */
1690 for (i = n_reloads - 1; i >= 0; i--)
1692 if (reload_flags[i] == 1)
1694 deallocate_reload_reg (i);
1695 remove_address_replacements (rld[i].in);
1697 something_changed = 1;
1700 return something_changed;
1703 /* If there is only one output reload, and it is not for an earlyclobber
1704 operand, try to combine it with a (logically unrelated) input reload
1705 to reduce the number of reload registers needed.
1707 This is safe if the input reload does not appear in
1708 the value being output-reloaded, because this implies
1709 it is not needed any more once the original insn completes.
1711 If that doesn't work, see we can use any of the registers that
1712 die in this insn as a reload register. We can if it is of the right
1713 class and does not appear in the value being output-reloaded. */
1716 combine_reloads (void)
1719 int output_reload = -1;
1720 int secondary_out = -1;
1723 /* Find the output reload; return unless there is exactly one
1724 and that one is mandatory. */
1726 for (i = 0; i < n_reloads; i++)
1727 if (rld[i].out != 0)
1729 if (output_reload >= 0)
1734 if (output_reload < 0 || rld[output_reload].optional)
1737 /* An input-output reload isn't combinable. */
1739 if (rld[output_reload].in != 0)
1742 /* If this reload is for an earlyclobber operand, we can't do anything. */
1743 if (earlyclobber_operand_p (rld[output_reload].out))
1746 /* If there is a reload for part of the address of this operand, we would
1747 need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1748 its life to the point where doing this combine would not lower the
1749 number of spill registers needed. */
1750 for (i = 0; i < n_reloads; i++)
1751 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1752 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1753 && rld[i].opnum == rld[output_reload].opnum)
1756 /* Check each input reload; can we combine it? */
1758 for (i = 0; i < n_reloads; i++)
1759 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1760 /* Life span of this reload must not extend past main insn. */
1761 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1762 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1763 && rld[i].when_needed != RELOAD_OTHER
1764 && (CLASS_MAX_NREGS (rld[i].rclass, rld[i].inmode)
1765 == CLASS_MAX_NREGS (rld[output_reload].rclass,
1766 rld[output_reload].outmode))
1768 && rld[i].reg_rtx == 0
1769 #ifdef SECONDARY_MEMORY_NEEDED
1770 /* Don't combine two reloads with different secondary
1771 memory locations. */
1772 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1773 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1774 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1775 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1777 && (targetm.small_register_classes_for_mode_p (VOIDmode)
1778 ? (rld[i].rclass == rld[output_reload].rclass)
1779 : (reg_class_subset_p (rld[i].rclass,
1780 rld[output_reload].rclass)
1781 || reg_class_subset_p (rld[output_reload].rclass,
1783 && (MATCHES (rld[i].in, rld[output_reload].out)
1784 /* Args reversed because the first arg seems to be
1785 the one that we imagine being modified
1786 while the second is the one that might be affected. */
1787 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1789 /* However, if the input is a register that appears inside
1790 the output, then we also can't share.
1791 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1792 If the same reload reg is used for both reg 69 and the
1793 result to be stored in memory, then that result
1794 will clobber the address of the memory ref. */
1795 && ! (REG_P (rld[i].in)
1796 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1797 rld[output_reload].out))))
1798 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1799 rld[i].when_needed != RELOAD_FOR_INPUT)
1800 && (reg_class_size[(int) rld[i].rclass]
1801 || targetm.small_register_classes_for_mode_p (VOIDmode))
1802 /* We will allow making things slightly worse by combining an
1803 input and an output, but no worse than that. */
1804 && (rld[i].when_needed == RELOAD_FOR_INPUT
1805 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1809 /* We have found a reload to combine with! */
1810 rld[i].out = rld[output_reload].out;
1811 rld[i].out_reg = rld[output_reload].out_reg;
1812 rld[i].outmode = rld[output_reload].outmode;
1813 /* Mark the old output reload as inoperative. */
1814 rld[output_reload].out = 0;
1815 /* The combined reload is needed for the entire insn. */
1816 rld[i].when_needed = RELOAD_OTHER;
1817 /* If the output reload had a secondary reload, copy it. */
1818 if (rld[output_reload].secondary_out_reload != -1)
1820 rld[i].secondary_out_reload
1821 = rld[output_reload].secondary_out_reload;
1822 rld[i].secondary_out_icode
1823 = rld[output_reload].secondary_out_icode;
1826 #ifdef SECONDARY_MEMORY_NEEDED
1827 /* Copy any secondary MEM. */
1828 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1829 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1830 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1832 /* If required, minimize the register class. */
1833 if (reg_class_subset_p (rld[output_reload].rclass,
1835 rld[i].rclass = rld[output_reload].rclass;
1837 /* Transfer all replacements from the old reload to the combined. */
1838 for (j = 0; j < n_replacements; j++)
1839 if (replacements[j].what == output_reload)
1840 replacements[j].what = i;
1845 /* If this insn has only one operand that is modified or written (assumed
1846 to be the first), it must be the one corresponding to this reload. It
1847 is safe to use anything that dies in this insn for that output provided
1848 that it does not occur in the output (we already know it isn't an
1849 earlyclobber. If this is an asm insn, give up. */
1851 if (INSN_CODE (this_insn) == -1)
1854 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1855 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1856 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1859 /* See if some hard register that dies in this insn and is not used in
1860 the output is the right class. Only works if the register we pick
1861 up can fully hold our output reload. */
1862 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1863 if (REG_NOTE_KIND (note) == REG_DEAD
1864 && REG_P (XEXP (note, 0))
1865 && !reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1866 rld[output_reload].out)
1867 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1868 && HARD_REGNO_MODE_OK (regno, rld[output_reload].outmode)
1869 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].rclass],
1871 && (hard_regno_nregs[regno][rld[output_reload].outmode]
1872 <= hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))])
1873 /* Ensure that a secondary or tertiary reload for this output
1874 won't want this register. */
1875 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1876 || (!(TEST_HARD_REG_BIT
1877 (reg_class_contents[(int) rld[secondary_out].rclass], regno))
1878 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1879 || !(TEST_HARD_REG_BIT
1880 (reg_class_contents[(int) rld[secondary_out].rclass],
1882 && !fixed_regs[regno]
1883 /* Check that a former pseudo is valid; see find_dummy_reload. */
1884 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1885 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR),
1886 ORIGINAL_REGNO (XEXP (note, 0)))
1887 && hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))] == 1)))
1889 rld[output_reload].reg_rtx
1890 = gen_rtx_REG (rld[output_reload].outmode, regno);
1895 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1896 See if one of IN and OUT is a register that may be used;
1897 this is desirable since a spill-register won't be needed.
1898 If so, return the register rtx that proves acceptable.
1900 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1901 RCLASS is the register class required for the reload.
1903 If FOR_REAL is >= 0, it is the number of the reload,
1904 and in some cases when it can be discovered that OUT doesn't need
1905 to be computed, clear out rld[FOR_REAL].out.
1907 If FOR_REAL is -1, this should not be done, because this call
1908 is just to see if a register can be found, not to find and install it.
1910 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1911 puts an additional constraint on being able to use IN for OUT since
1912 IN must not appear elsewhere in the insn (it is assumed that IN itself
1913 is safe from the earlyclobber). */
1916 find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1917 enum machine_mode inmode, enum machine_mode outmode,
1918 enum reg_class rclass, int for_real, int earlyclobber)
1926 /* If operands exceed a word, we can't use either of them
1927 unless they have the same size. */
1928 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1929 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1930 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1933 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1934 respectively refers to a hard register. */
1936 /* Find the inside of any subregs. */
1937 while (GET_CODE (out) == SUBREG)
1939 if (REG_P (SUBREG_REG (out))
1940 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1941 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1942 GET_MODE (SUBREG_REG (out)),
1945 out = SUBREG_REG (out);
1947 while (GET_CODE (in) == SUBREG)
1949 if (REG_P (SUBREG_REG (in))
1950 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1951 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1952 GET_MODE (SUBREG_REG (in)),
1955 in = SUBREG_REG (in);
1958 /* Narrow down the reg class, the same way push_reload will;
1959 otherwise we might find a dummy now, but push_reload won't. */
1961 enum reg_class preferred_class = PREFERRED_RELOAD_CLASS (in, rclass);
1962 if (preferred_class != NO_REGS)
1963 rclass = preferred_class;
1966 /* See if OUT will do. */
1968 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1970 unsigned int regno = REGNO (out) + out_offset;
1971 unsigned int nwords = hard_regno_nregs[regno][outmode];
1974 /* When we consider whether the insn uses OUT,
1975 ignore references within IN. They don't prevent us
1976 from copying IN into OUT, because those refs would
1977 move into the insn that reloads IN.
1979 However, we only ignore IN in its role as this reload.
1980 If the insn uses IN elsewhere and it contains OUT,
1981 that counts. We can't be sure it's the "same" operand
1982 so it might not go through this reload. */
1984 *inloc = const0_rtx;
1986 if (regno < FIRST_PSEUDO_REGISTER
1987 && HARD_REGNO_MODE_OK (regno, outmode)
1988 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1989 PATTERN (this_insn), outloc))
1993 for (i = 0; i < nwords; i++)
1994 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
2000 if (REG_P (real_out))
2003 value = gen_rtx_REG (outmode, regno);
2010 /* Consider using IN if OUT was not acceptable
2011 or if OUT dies in this insn (like the quotient in a divmod insn).
2012 We can't use IN unless it is dies in this insn,
2013 which means we must know accurately which hard regs are live.
2014 Also, the result can't go in IN if IN is used within OUT,
2015 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
2016 if (hard_regs_live_known
2018 && REGNO (in) < FIRST_PSEUDO_REGISTER
2020 || find_reg_note (this_insn, REG_UNUSED, real_out))
2021 && find_reg_note (this_insn, REG_DEAD, real_in)
2022 && !fixed_regs[REGNO (in)]
2023 && HARD_REGNO_MODE_OK (REGNO (in),
2024 /* The only case where out and real_out might
2025 have different modes is where real_out
2026 is a subreg, and in that case, out
2028 (GET_MODE (out) != VOIDmode
2029 ? GET_MODE (out) : outmode))
2030 && (ORIGINAL_REGNO (in) < FIRST_PSEUDO_REGISTER
2031 /* However only do this if we can be sure that this input
2032 operand doesn't correspond with an uninitialized pseudo.
2033 global can assign some hardreg to it that is the same as
2034 the one assigned to a different, also live pseudo (as it
2035 can ignore the conflict). We must never introduce writes
2036 to such hardregs, as they would clobber the other live
2037 pseudo. See PR 20973. */
2038 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR),
2039 ORIGINAL_REGNO (in))
2040 /* Similarly, only do this if we can be sure that the death
2041 note is still valid. global can assign some hardreg to
2042 the pseudo referenced in the note and simultaneously a
2043 subword of this hardreg to a different, also live pseudo,
2044 because only another subword of the hardreg is actually
2045 used in the insn. This cannot happen if the pseudo has
2046 been assigned exactly one hardreg. See PR 33732. */
2047 && hard_regno_nregs[REGNO (in)][GET_MODE (in)] == 1)))
2049 unsigned int regno = REGNO (in) + in_offset;
2050 unsigned int nwords = hard_regno_nregs[regno][inmode];
2052 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
2053 && ! hard_reg_set_here_p (regno, regno + nwords,
2054 PATTERN (this_insn))
2056 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
2057 PATTERN (this_insn), inloc)))
2061 for (i = 0; i < nwords; i++)
2062 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
2068 /* If we were going to use OUT as the reload reg
2069 and changed our mind, it means OUT is a dummy that
2070 dies here. So don't bother copying value to it. */
2071 if (for_real >= 0 && value == real_out)
2072 rld[for_real].out = 0;
2073 if (REG_P (real_in))
2076 value = gen_rtx_REG (inmode, regno);
2084 /* This page contains subroutines used mainly for determining
2085 whether the IN or an OUT of a reload can serve as the
2088 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2091 earlyclobber_operand_p (rtx x)
2095 for (i = 0; i < n_earlyclobbers; i++)
2096 if (reload_earlyclobbers[i] == x)
2102 /* Return 1 if expression X alters a hard reg in the range
2103 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2104 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2105 X should be the body of an instruction. */
2108 hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2110 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2112 rtx op0 = SET_DEST (x);
2114 while (GET_CODE (op0) == SUBREG)
2115 op0 = SUBREG_REG (op0);
2118 unsigned int r = REGNO (op0);
2120 /* See if this reg overlaps range under consideration. */
2122 && end_hard_regno (GET_MODE (op0), r) > beg_regno)
2126 else if (GET_CODE (x) == PARALLEL)
2128 int i = XVECLEN (x, 0) - 1;
2131 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2138 /* Return 1 if ADDR is a valid memory address for mode MODE
2139 in address space AS, and check that each pseudo reg has the
2140 proper kind of hard reg. */
2143 strict_memory_address_addr_space_p (enum machine_mode mode ATTRIBUTE_UNUSED,
2144 rtx addr, addr_space_t as)
2146 #ifdef GO_IF_LEGITIMATE_ADDRESS
2147 gcc_assert (ADDR_SPACE_GENERIC_P (as));
2148 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2154 return targetm.addr_space.legitimate_address_p (mode, addr, 1, as);
2158 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2159 if they are the same hard reg, and has special hacks for
2160 autoincrement and autodecrement.
2161 This is specifically intended for find_reloads to use
2162 in determining whether two operands match.
2163 X is the operand whose number is the lower of the two.
2165 The value is 2 if Y contains a pre-increment that matches
2166 a non-incrementing address in X. */
2168 /* ??? To be completely correct, we should arrange to pass
2169 for X the output operand and for Y the input operand.
2170 For now, we assume that the output operand has the lower number
2171 because that is natural in (SET output (... input ...)). */
2174 operands_match_p (rtx x, rtx y)
2177 RTX_CODE code = GET_CODE (x);
2183 if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x))))
2184 && (REG_P (y) || (GET_CODE (y) == SUBREG
2185 && REG_P (SUBREG_REG (y)))))
2191 i = REGNO (SUBREG_REG (x));
2192 if (i >= FIRST_PSEUDO_REGISTER)
2194 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2195 GET_MODE (SUBREG_REG (x)),
2202 if (GET_CODE (y) == SUBREG)
2204 j = REGNO (SUBREG_REG (y));
2205 if (j >= FIRST_PSEUDO_REGISTER)
2207 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2208 GET_MODE (SUBREG_REG (y)),
2215 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2216 multiple hard register group of scalar integer registers, so that
2217 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2219 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2220 && SCALAR_INT_MODE_P (GET_MODE (x))
2221 && i < FIRST_PSEUDO_REGISTER)
2222 i += hard_regno_nregs[i][GET_MODE (x)] - 1;
2223 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2224 && SCALAR_INT_MODE_P (GET_MODE (y))
2225 && j < FIRST_PSEUDO_REGISTER)
2226 j += hard_regno_nregs[j][GET_MODE (y)] - 1;
2230 /* If two operands must match, because they are really a single
2231 operand of an assembler insn, then two postincrements are invalid
2232 because the assembler insn would increment only once.
2233 On the other hand, a postincrement matches ordinary indexing
2234 if the postincrement is the output operand. */
2235 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2236 return operands_match_p (XEXP (x, 0), y);
2237 /* Two preincrements are invalid
2238 because the assembler insn would increment only once.
2239 On the other hand, a preincrement matches ordinary indexing
2240 if the preincrement is the input operand.
2241 In this case, return 2, since some callers need to do special
2242 things when this happens. */
2243 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2244 || GET_CODE (y) == PRE_MODIFY)
2245 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2249 /* Now we have disposed of all the cases in which different rtx codes
2251 if (code != GET_CODE (y))
2254 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2255 if (GET_MODE (x) != GET_MODE (y))
2258 /* MEMs refering to different address space are not equivalent. */
2259 if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y))
2270 return XEXP (x, 0) == XEXP (y, 0);
2272 return XSTR (x, 0) == XSTR (y, 0);
2278 /* Compare the elements. If any pair of corresponding elements
2279 fail to match, return 0 for the whole things. */
2282 fmt = GET_RTX_FORMAT (code);
2283 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2289 if (XWINT (x, i) != XWINT (y, i))
2294 if (XINT (x, i) != XINT (y, i))
2299 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2302 /* If any subexpression returns 2,
2303 we should return 2 if we are successful. */
2312 if (XVECLEN (x, i) != XVECLEN (y, i))
2314 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2316 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2324 /* It is believed that rtx's at this level will never
2325 contain anything but integers and other rtx's,
2326 except for within LABEL_REFs and SYMBOL_REFs. */
2331 return 1 + success_2;
2334 /* Describe the range of registers or memory referenced by X.
2335 If X is a register, set REG_FLAG and put the first register
2336 number into START and the last plus one into END.
2337 If X is a memory reference, put a base address into BASE
2338 and a range of integer offsets into START and END.
2339 If X is pushing on the stack, we can assume it causes no trouble,
2340 so we set the SAFE field. */
2342 static struct decomposition
2345 struct decomposition val;
2348 memset (&val, 0, sizeof (val));
2350 switch (GET_CODE (x))
2354 rtx base = NULL_RTX, offset = 0;
2355 rtx addr = XEXP (x, 0);
2357 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2358 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2360 val.base = XEXP (addr, 0);
2361 val.start = -GET_MODE_SIZE (GET_MODE (x));
2362 val.end = GET_MODE_SIZE (GET_MODE (x));
2363 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2367 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2369 if (GET_CODE (XEXP (addr, 1)) == PLUS
2370 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2371 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2373 val.base = XEXP (addr, 0);
2374 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2375 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2376 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2381 if (GET_CODE (addr) == CONST)
2383 addr = XEXP (addr, 0);
2386 if (GET_CODE (addr) == PLUS)
2388 if (CONSTANT_P (XEXP (addr, 0)))
2390 base = XEXP (addr, 1);
2391 offset = XEXP (addr, 0);
2393 else if (CONSTANT_P (XEXP (addr, 1)))
2395 base = XEXP (addr, 0);
2396 offset = XEXP (addr, 1);
2403 offset = const0_rtx;
2405 if (GET_CODE (offset) == CONST)
2406 offset = XEXP (offset, 0);
2407 if (GET_CODE (offset) == PLUS)
2409 if (CONST_INT_P (XEXP (offset, 0)))
2411 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2412 offset = XEXP (offset, 0);
2414 else if (CONST_INT_P (XEXP (offset, 1)))
2416 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2417 offset = XEXP (offset, 1);
2421 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2422 offset = const0_rtx;
2425 else if (!CONST_INT_P (offset))
2427 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2428 offset = const0_rtx;
2431 if (all_const && GET_CODE (base) == PLUS)
2432 base = gen_rtx_CONST (GET_MODE (base), base);
2434 gcc_assert (CONST_INT_P (offset));
2436 val.start = INTVAL (offset);
2437 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2444 val.start = true_regnum (x);
2445 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2447 /* A pseudo with no hard reg. */
2448 val.start = REGNO (x);
2449 val.end = val.start + 1;
2453 val.end = end_hard_regno (GET_MODE (x), val.start);
2457 if (!REG_P (SUBREG_REG (x)))
2458 /* This could be more precise, but it's good enough. */
2459 return decompose (SUBREG_REG (x));
2461 val.start = true_regnum (x);
2462 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2463 return decompose (SUBREG_REG (x));
2466 val.end = val.start + subreg_nregs (x);
2470 /* This hasn't been assigned yet, so it can't conflict yet. */
2475 gcc_assert (CONSTANT_P (x));
2482 /* Return 1 if altering Y will not modify the value of X.
2483 Y is also described by YDATA, which should be decompose (Y). */
2486 immune_p (rtx x, rtx y, struct decomposition ydata)
2488 struct decomposition xdata;
2491 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2495 gcc_assert (MEM_P (y));
2496 /* If Y is memory and X is not, Y can't affect X. */
2500 xdata = decompose (x);
2502 if (! rtx_equal_p (xdata.base, ydata.base))
2504 /* If bases are distinct symbolic constants, there is no overlap. */
2505 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2507 /* Constants and stack slots never overlap. */
2508 if (CONSTANT_P (xdata.base)
2509 && (ydata.base == frame_pointer_rtx
2510 || ydata.base == hard_frame_pointer_rtx
2511 || ydata.base == stack_pointer_rtx))
2513 if (CONSTANT_P (ydata.base)
2514 && (xdata.base == frame_pointer_rtx
2515 || xdata.base == hard_frame_pointer_rtx
2516 || xdata.base == stack_pointer_rtx))
2518 /* If either base is variable, we don't know anything. */
2522 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2525 /* Similar, but calls decompose. */
2528 safe_from_earlyclobber (rtx op, rtx clobber)
2530 struct decomposition early_data;
2532 early_data = decompose (clobber);
2533 return immune_p (op, clobber, early_data);
2536 /* Main entry point of this file: search the body of INSN
2537 for values that need reloading and record them with push_reload.
2538 REPLACE nonzero means record also where the values occur
2539 so that subst_reloads can be used.
2541 IND_LEVELS says how many levels of indirection are supported by this
2542 machine; a value of zero means that a memory reference is not a valid
2545 LIVE_KNOWN says we have valid information about which hard
2546 regs are live at each point in the program; this is true when
2547 we are called from global_alloc but false when stupid register
2548 allocation has been done.
2550 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2551 which is nonnegative if the reg has been commandeered for reloading into.
2552 It is copied into STATIC_RELOAD_REG_P and referenced from there
2553 by various subroutines.
2555 Return TRUE if some operands need to be changed, because of swapping
2556 commutative operands, reg_equiv_address substitution, or whatever. */
2559 find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2560 short *reload_reg_p)
2562 int insn_code_number;
2565 /* These start out as the constraints for the insn
2566 and they are chewed up as we consider alternatives. */
2567 const char *constraints[MAX_RECOG_OPERANDS];
2568 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2570 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2571 char pref_or_nothing[MAX_RECOG_OPERANDS];
2572 /* Nonzero for a MEM operand whose entire address needs a reload.
2573 May be -1 to indicate the entire address may or may not need a reload. */
2574 int address_reloaded[MAX_RECOG_OPERANDS];
2575 /* Nonzero for an address operand that needs to be completely reloaded.
2576 May be -1 to indicate the entire operand may or may not need a reload. */
2577 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2578 /* Value of enum reload_type to use for operand. */
2579 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2580 /* Value of enum reload_type to use within address of operand. */
2581 enum reload_type address_type[MAX_RECOG_OPERANDS];
2582 /* Save the usage of each operand. */
2583 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2584 int no_input_reloads = 0, no_output_reloads = 0;
2586 enum reg_class this_alternative[MAX_RECOG_OPERANDS];
2587 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2588 char this_alternative_win[MAX_RECOG_OPERANDS];
2589 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2590 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2591 int this_alternative_matches[MAX_RECOG_OPERANDS];
2593 int goal_alternative[MAX_RECOG_OPERANDS];
2594 int this_alternative_number;
2595 int goal_alternative_number = 0;
2596 int operand_reloadnum[MAX_RECOG_OPERANDS];
2597 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2598 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2599 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2600 char goal_alternative_win[MAX_RECOG_OPERANDS];
2601 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2602 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2603 int goal_alternative_swapped;
2605 int best_small_class_operands_num;
2607 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2608 rtx substed_operand[MAX_RECOG_OPERANDS];
2609 rtx body = PATTERN (insn);
2610 rtx set = single_set (insn);
2611 int goal_earlyclobber = 0, this_earlyclobber;
2612 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2618 n_earlyclobbers = 0;
2619 replace_reloads = replace;
2620 hard_regs_live_known = live_known;
2621 static_reload_reg_p = reload_reg_p;
2623 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2624 neither are insns that SET cc0. Insns that use CC0 are not allowed
2625 to have any input reloads. */
2626 if (JUMP_P (insn) || CALL_P (insn))
2627 no_output_reloads = 1;
2630 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2631 no_input_reloads = 1;
2632 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2633 no_output_reloads = 1;
2636 #ifdef SECONDARY_MEMORY_NEEDED
2637 /* The eliminated forms of any secondary memory locations are per-insn, so
2638 clear them out here. */
2640 if (secondary_memlocs_elim_used)
2642 memset (secondary_memlocs_elim, 0,
2643 sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2644 secondary_memlocs_elim_used = 0;
2648 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2649 is cheap to move between them. If it is not, there may not be an insn
2650 to do the copy, so we may need a reload. */
2651 if (GET_CODE (body) == SET
2652 && REG_P (SET_DEST (body))
2653 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2654 && REG_P (SET_SRC (body))
2655 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2656 && register_move_cost (GET_MODE (SET_SRC (body)),
2657 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2658 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2661 extract_insn (insn);
2663 noperands = reload_n_operands = recog_data.n_operands;
2664 n_alternatives = recog_data.n_alternatives;
2666 /* Just return "no reloads" if insn has no operands with constraints. */
2667 if (noperands == 0 || n_alternatives == 0)
2670 insn_code_number = INSN_CODE (insn);
2671 this_insn_is_asm = insn_code_number < 0;
2673 memcpy (operand_mode, recog_data.operand_mode,
2674 noperands * sizeof (enum machine_mode));
2675 memcpy (constraints, recog_data.constraints,
2676 noperands * sizeof (const char *));
2680 /* If we will need to know, later, whether some pair of operands
2681 are the same, we must compare them now and save the result.
2682 Reloading the base and index registers will clobber them
2683 and afterward they will fail to match. */
2685 for (i = 0; i < noperands; i++)
2691 substed_operand[i] = recog_data.operand[i];
2694 modified[i] = RELOAD_READ;
2696 /* Scan this operand's constraint to see if it is an output operand,
2697 an in-out operand, is commutative, or should match another. */
2701 p += CONSTRAINT_LEN (c, p);
2705 modified[i] = RELOAD_WRITE;
2708 modified[i] = RELOAD_READ_WRITE;
2712 /* The last operand should not be marked commutative. */
2713 gcc_assert (i != noperands - 1);
2715 /* We currently only support one commutative pair of
2716 operands. Some existing asm code currently uses more
2717 than one pair. Previously, that would usually work,
2718 but sometimes it would crash the compiler. We
2719 continue supporting that case as well as we can by
2720 silently ignoring all but the first pair. In the
2721 future we may handle it correctly. */
2722 if (commutative < 0)
2725 gcc_assert (this_insn_is_asm);
2728 /* Use of ISDIGIT is tempting here, but it may get expensive because
2729 of locale support we don't want. */
2730 case '0': case '1': case '2': case '3': case '4':
2731 case '5': case '6': case '7': case '8': case '9':
2733 c = strtoul (p - 1, &end, 10);
2736 operands_match[c][i]
2737 = operands_match_p (recog_data.operand[c],
2738 recog_data.operand[i]);
2740 /* An operand may not match itself. */
2741 gcc_assert (c != i);
2743 /* If C can be commuted with C+1, and C might need to match I,
2744 then C+1 might also need to match I. */
2745 if (commutative >= 0)
2747 if (c == commutative || c == commutative + 1)
2749 int other = c + (c == commutative ? 1 : -1);
2750 operands_match[other][i]
2751 = operands_match_p (recog_data.operand[other],
2752 recog_data.operand[i]);
2754 if (i == commutative || i == commutative + 1)
2756 int other = i + (i == commutative ? 1 : -1);
2757 operands_match[c][other]
2758 = operands_match_p (recog_data.operand[c],
2759 recog_data.operand[other]);
2761 /* Note that C is supposed to be less than I.
2762 No need to consider altering both C and I because in
2763 that case we would alter one into the other. */
2770 /* Examine each operand that is a memory reference or memory address
2771 and reload parts of the addresses into index registers.
2772 Also here any references to pseudo regs that didn't get hard regs
2773 but are equivalent to constants get replaced in the insn itself
2774 with those constants. Nobody will ever see them again.
2776 Finally, set up the preferred classes of each operand. */
2778 for (i = 0; i < noperands; i++)
2780 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2782 address_reloaded[i] = 0;
2783 address_operand_reloaded[i] = 0;
2784 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2785 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2788 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2789 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2792 if (*constraints[i] == 0)
2793 /* Ignore things like match_operator operands. */
2795 else if (constraints[i][0] == 'p'
2796 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2798 address_operand_reloaded[i]
2799 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2800 recog_data.operand[i],
2801 recog_data.operand_loc[i],
2802 i, operand_type[i], ind_levels, insn);
2804 /* If we now have a simple operand where we used to have a
2805 PLUS or MULT, re-recognize and try again. */
2806 if ((OBJECT_P (*recog_data.operand_loc[i])
2807 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2808 && (GET_CODE (recog_data.operand[i]) == MULT
2809 || GET_CODE (recog_data.operand[i]) == PLUS))
2811 INSN_CODE (insn) = -1;
2812 retval = find_reloads (insn, replace, ind_levels, live_known,
2817 recog_data.operand[i] = *recog_data.operand_loc[i];
2818 substed_operand[i] = recog_data.operand[i];
2820 /* Address operands are reloaded in their existing mode,
2821 no matter what is specified in the machine description. */
2822 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2824 else if (code == MEM)
2827 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2828 recog_data.operand_loc[i],
2829 XEXP (recog_data.operand[i], 0),
2830 &XEXP (recog_data.operand[i], 0),
2831 i, address_type[i], ind_levels, insn);
2832 recog_data.operand[i] = *recog_data.operand_loc[i];
2833 substed_operand[i] = recog_data.operand[i];
2835 else if (code == SUBREG)
2837 rtx reg = SUBREG_REG (recog_data.operand[i]);
2839 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2842 && &SET_DEST (set) == recog_data.operand_loc[i],
2844 &address_reloaded[i]);
2846 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2847 that didn't get a hard register, emit a USE with a REG_EQUAL
2848 note in front so that we might inherit a previous, possibly
2854 && (GET_MODE_SIZE (GET_MODE (reg))
2855 >= GET_MODE_SIZE (GET_MODE (op)))
2856 && reg_equiv_constant[REGNO (reg)] == 0)
2857 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2859 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2861 substed_operand[i] = recog_data.operand[i] = op;
2863 else if (code == PLUS || GET_RTX_CLASS (code) == RTX_UNARY)
2864 /* We can get a PLUS as an "operand" as a result of register
2865 elimination. See eliminate_regs and gen_reload. We handle
2866 a unary operator by reloading the operand. */
2867 substed_operand[i] = recog_data.operand[i]
2868 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2869 ind_levels, 0, insn,
2870 &address_reloaded[i]);
2871 else if (code == REG)
2873 /* This is equivalent to calling find_reloads_toplev.
2874 The code is duplicated for speed.
2875 When we find a pseudo always equivalent to a constant,
2876 we replace it by the constant. We must be sure, however,
2877 that we don't try to replace it in the insn in which it
2879 int regno = REGNO (recog_data.operand[i]);
2880 if (reg_equiv_constant[regno] != 0
2881 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2883 /* Record the existing mode so that the check if constants are
2884 allowed will work when operand_mode isn't specified. */
2886 if (operand_mode[i] == VOIDmode)
2887 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2889 substed_operand[i] = recog_data.operand[i]
2890 = reg_equiv_constant[regno];
2892 if (reg_equiv_memory_loc[regno] != 0
2893 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2894 /* We need not give a valid is_set_dest argument since the case
2895 of a constant equivalence was checked above. */
2896 substed_operand[i] = recog_data.operand[i]
2897 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2898 ind_levels, 0, insn,
2899 &address_reloaded[i]);
2901 /* If the operand is still a register (we didn't replace it with an
2902 equivalent), get the preferred class to reload it into. */
2903 code = GET_CODE (recog_data.operand[i]);
2905 = ((code == REG && REGNO (recog_data.operand[i])
2906 >= FIRST_PSEUDO_REGISTER)
2907 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2911 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2912 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2915 /* If this is simply a copy from operand 1 to operand 0, merge the
2916 preferred classes for the operands. */
2917 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2918 && recog_data.operand[1] == SET_SRC (set))
2920 preferred_class[0] = preferred_class[1]
2921 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2922 pref_or_nothing[0] |= pref_or_nothing[1];
2923 pref_or_nothing[1] |= pref_or_nothing[0];
2926 /* Now see what we need for pseudo-regs that didn't get hard regs
2927 or got the wrong kind of hard reg. For this, we must consider
2928 all the operands together against the register constraints. */
2930 best = MAX_RECOG_OPERANDS * 2 + 600;
2931 best_small_class_operands_num = 0;
2934 goal_alternative_swapped = 0;
2937 /* The constraints are made of several alternatives.
2938 Each operand's constraint looks like foo,bar,... with commas
2939 separating the alternatives. The first alternatives for all
2940 operands go together, the second alternatives go together, etc.
2942 First loop over alternatives. */
2944 for (this_alternative_number = 0;
2945 this_alternative_number < n_alternatives;
2946 this_alternative_number++)
2948 /* Loop over operands for one constraint alternative. */
2949 /* LOSERS counts those that don't fit this alternative
2950 and would require loading. */
2952 /* BAD is set to 1 if it some operand can't fit this alternative
2953 even after reloading. */
2955 /* REJECT is a count of how undesirable this alternative says it is
2956 if any reloading is required. If the alternative matches exactly
2957 then REJECT is ignored, but otherwise it gets this much
2958 counted against it in addition to the reloading needed. Each
2959 ? counts three times here since we want the disparaging caused by
2960 a bad register class to only count 1/3 as much. */
2963 if (!recog_data.alternative_enabled_p[this_alternative_number])
2967 for (i = 0; i < recog_data.n_operands; i++)
2968 constraints[i] = skip_alternative (constraints[i]);
2973 this_earlyclobber = 0;
2975 for (i = 0; i < noperands; i++)
2977 const char *p = constraints[i];
2982 /* 0 => this operand can be reloaded somehow for this alternative. */
2984 /* 0 => this operand can be reloaded if the alternative allows regs. */
2988 rtx operand = recog_data.operand[i];
2990 /* Nonzero means this is a MEM that must be reloaded into a reg
2991 regardless of what the constraint says. */
2992 int force_reload = 0;
2994 /* Nonzero if a constant forced into memory would be OK for this
2997 int earlyclobber = 0;
2999 /* If the predicate accepts a unary operator, it means that
3000 we need to reload the operand, but do not do this for
3001 match_operator and friends. */
3002 if (UNARY_P (operand) && *p != 0)
3003 operand = XEXP (operand, 0);
3005 /* If the operand is a SUBREG, extract
3006 the REG or MEM (or maybe even a constant) within.
3007 (Constants can occur as a result of reg_equiv_constant.) */
3009 while (GET_CODE (operand) == SUBREG)
3011 /* Offset only matters when operand is a REG and
3012 it is a hard reg. This is because it is passed
3013 to reg_fits_class_p if it is a REG and all pseudos
3014 return 0 from that function. */
3015 if (REG_P (SUBREG_REG (operand))
3016 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
3018 if (simplify_subreg_regno (REGNO (SUBREG_REG (operand)),
3019 GET_MODE (SUBREG_REG (operand)),
3020 SUBREG_BYTE (operand),
3021 GET_MODE (operand)) < 0)
3023 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
3024 GET_MODE (SUBREG_REG (operand)),
3025 SUBREG_BYTE (operand),
3026 GET_MODE (operand));
3028 operand = SUBREG_REG (operand);
3029 /* Force reload if this is a constant or PLUS or if there may
3030 be a problem accessing OPERAND in the outer mode. */
3031 if (CONSTANT_P (operand)
3032 || GET_CODE (operand) == PLUS
3033 /* We must force a reload of paradoxical SUBREGs
3034 of a MEM because the alignment of the inner value
3035 may not be enough to do the outer reference. On
3036 big-endian machines, it may also reference outside
3039 On machines that extend byte operations and we have a
3040 SUBREG where both the inner and outer modes are no wider
3041 than a word and the inner mode is narrower, is integral,
3042 and gets extended when loaded from memory, combine.c has
3043 made assumptions about the behavior of the machine in such
3044 register access. If the data is, in fact, in memory we
3045 must always load using the size assumed to be in the
3046 register and let the insn do the different-sized
3049 This is doubly true if WORD_REGISTER_OPERATIONS. In
3050 this case eliminate_regs has left non-paradoxical
3051 subregs for push_reload to see. Make sure it does
3052 by forcing the reload.
3054 ??? When is it right at this stage to have a subreg
3055 of a mem that is _not_ to be handled specially? IMO
3056 those should have been reduced to just a mem. */
3057 || ((MEM_P (operand)
3059 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3060 #ifndef WORD_REGISTER_OPERATIONS
3061 && (((GET_MODE_BITSIZE (GET_MODE (operand))
3062 < BIGGEST_ALIGNMENT)
3063 && (GET_MODE_SIZE (operand_mode[i])
3064 > GET_MODE_SIZE (GET_MODE (operand))))
3066 #ifdef LOAD_EXTEND_OP
3067 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3068 && (GET_MODE_SIZE (GET_MODE (operand))
3070 && (GET_MODE_SIZE (operand_mode[i])
3071 > GET_MODE_SIZE (GET_MODE (operand)))
3072 && INTEGRAL_MODE_P (GET_MODE (operand))
3073 && LOAD_EXTEND_OP (GET_MODE (operand)) != UNKNOWN)
3082 this_alternative[i] = NO_REGS;
3083 this_alternative_win[i] = 0;
3084 this_alternative_match_win[i] = 0;
3085 this_alternative_offmemok[i] = 0;
3086 this_alternative_earlyclobber[i] = 0;
3087 this_alternative_matches[i] = -1;
3089 /* An empty constraint or empty alternative
3090 allows anything which matched the pattern. */
3091 if (*p == 0 || *p == ',')
3094 /* Scan this alternative's specs for this operand;
3095 set WIN if the operand fits any letter in this alternative.
3096 Otherwise, clear BADOP if this operand could
3097 fit some letter after reloads,
3098 or set WINREG if this operand could fit after reloads
3099 provided the constraint allows some registers. */
3102 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
3111 case '=': case '+': case '*':
3115 /* We only support one commutative marker, the first
3116 one. We already set commutative above. */
3128 /* Ignore rest of this alternative as far as
3129 reloading is concerned. */
3132 while (*p && *p != ',');
3136 case '0': case '1': case '2': case '3': case '4':
3137 case '5': case '6': case '7': case '8': case '9':
3138 m = strtoul (p, &end, 10);
3142 this_alternative_matches[i] = m;
3143 /* We are supposed to match a previous operand.
3144 If we do, we win if that one did.
3145 If we do not, count both of the operands as losers.
3146 (This is too conservative, since most of the time
3147 only a single reload insn will be needed to make
3148 the two operands win. As a result, this alternative
3149 may be rejected when it is actually desirable.) */
3150 if ((swapped && (m != commutative || i != commutative + 1))
3151 /* If we are matching as if two operands were swapped,
3152 also pretend that operands_match had been computed
3154 But if I is the second of those and C is the first,
3155 don't exchange them, because operands_match is valid
3156 only on one side of its diagonal. */
3158 [(m == commutative || m == commutative + 1)
3159 ? 2 * commutative + 1 - m : m]
3160 [(i == commutative || i == commutative + 1)
3161 ? 2 * commutative + 1 - i : i])
3162 : operands_match[m][i])
3164 /* If we are matching a non-offsettable address where an
3165 offsettable address was expected, then we must reject
3166 this combination, because we can't reload it. */
3167 if (this_alternative_offmemok[m]
3168 && MEM_P (recog_data.operand[m])
3169 && this_alternative[m] == NO_REGS
3170 && ! this_alternative_win[m])
3173 did_match = this_alternative_win[m];
3177 /* Operands don't match. */
3180 /* Retroactively mark the operand we had to match
3181 as a loser, if it wasn't already. */
3182 if (this_alternative_win[m])
3184 this_alternative_win[m] = 0;
3185 if (this_alternative[m] == NO_REGS)
3187 /* But count the pair only once in the total badness of
3188 this alternative, if the pair can be a dummy reload.
3189 The pointers in operand_loc are not swapped; swap
3190 them by hand if necessary. */
3191 if (swapped && i == commutative)
3192 loc1 = commutative + 1;
3193 else if (swapped && i == commutative + 1)
3197 if (swapped && m == commutative)
3198 loc2 = commutative + 1;
3199 else if (swapped && m == commutative + 1)
3204 = find_dummy_reload (recog_data.operand[i],
3205 recog_data.operand[m],
3206 recog_data.operand_loc[loc1],
3207 recog_data.operand_loc[loc2],
3208 operand_mode[i], operand_mode[m],
3209 this_alternative[m], -1,
3210 this_alternative_earlyclobber[m]);
3215 /* This can be fixed with reloads if the operand
3216 we are supposed to match can be fixed with reloads. */
3218 this_alternative[i] = this_alternative[m];
3220 /* If we have to reload this operand and some previous
3221 operand also had to match the same thing as this
3222 operand, we don't know how to do that. So reject this
3224 if (! did_match || force_reload)
3225 for (j = 0; j < i; j++)
3226 if (this_alternative_matches[j]
3227 == this_alternative_matches[i])
3232 /* All necessary reloads for an address_operand
3233 were handled in find_reloads_address. */
3234 this_alternative[i] = base_reg_class (VOIDmode, ADDRESS,
3240 case TARGET_MEM_CONSTRAINT:
3245 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3246 && reg_renumber[REGNO (operand)] < 0))
3248 if (CONST_POOL_OK_P (operand))
3255 && ! address_reloaded[i]
3256 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3257 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3263 && ! address_reloaded[i]
3264 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3265 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3269 /* Memory operand whose address is not offsettable. */
3274 && ! (ind_levels ? offsettable_memref_p (operand)
3275 : offsettable_nonstrict_memref_p (operand))
3276 /* Certain mem addresses will become offsettable
3277 after they themselves are reloaded. This is important;
3278 we don't want our own handling of unoffsettables
3279 to override the handling of reg_equiv_address. */
3280 && !(REG_P (XEXP (operand, 0))
3282 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3286 /* Memory operand whose address is offsettable. */
3290 if ((MEM_P (operand)
3291 /* If IND_LEVELS, find_reloads_address won't reload a
3292 pseudo that didn't get a hard reg, so we have to
3293 reject that case. */
3294 && ((ind_levels ? offsettable_memref_p (operand)
3295 : offsettable_nonstrict_memref_p (operand))
3296 /* A reloaded address is offsettable because it is now
3297 just a simple register indirect. */
3298 || address_reloaded[i] == 1))
3300 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3301 && reg_renumber[REGNO (operand)] < 0
3302 /* If reg_equiv_address is nonzero, we will be
3303 loading it into a register; hence it will be
3304 offsettable, but we cannot say that reg_equiv_mem
3305 is offsettable without checking. */
3306 && ((reg_equiv_mem[REGNO (operand)] != 0
3307 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3308 || (reg_equiv_address[REGNO (operand)] != 0))))
3310 if (CONST_POOL_OK_P (operand)
3318 /* Output operand that is stored before the need for the
3319 input operands (and their index registers) is over. */
3320 earlyclobber = 1, this_earlyclobber = 1;
3325 if (GET_CODE (operand) == CONST_DOUBLE
3326 || (GET_CODE (operand) == CONST_VECTOR
3327 && (GET_MODE_CLASS (GET_MODE (operand))
3328 == MODE_VECTOR_FLOAT)))
3334 if (GET_CODE (operand) == CONST_DOUBLE
3335 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3340 if (CONST_INT_P (operand)
3341 || (GET_CODE (operand) == CONST_DOUBLE
3342 && GET_MODE (operand) == VOIDmode))
3345 if (CONSTANT_P (operand)
3346 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)))
3351 if (CONST_INT_P (operand)
3352 || (GET_CODE (operand) == CONST_DOUBLE
3353 && GET_MODE (operand) == VOIDmode))
3365 if (CONST_INT_P (operand)
3366 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3377 /* A PLUS is never a valid operand, but reload can make
3378 it from a register when eliminating registers. */
3379 && GET_CODE (operand) != PLUS
3380 /* A SCRATCH is not a valid operand. */
3381 && GET_CODE (operand) != SCRATCH
3382 && (! CONSTANT_P (operand)
3384 || LEGITIMATE_PIC_OPERAND_P (operand))
3385 && (GENERAL_REGS == ALL_REGS
3387 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3388 && reg_renumber[REGNO (operand)] < 0)))
3390 /* Drop through into 'r' case. */
3394 = reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3398 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3400 #ifdef EXTRA_CONSTRAINT_STR
3401 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3405 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3407 /* If the address was already reloaded,
3409 else if (MEM_P (operand)
3410 && address_reloaded[i] == 1)
3412 /* Likewise if the address will be reloaded because
3413 reg_equiv_address is nonzero. For reg_equiv_mem
3414 we have to check. */
3415 else if (REG_P (operand)
3416 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3417 && reg_renumber[REGNO (operand)] < 0
3418 && ((reg_equiv_mem[REGNO (operand)] != 0
3419 && EXTRA_CONSTRAINT_STR (reg_equiv_mem[REGNO (operand)], c, p))
3420 || (reg_equiv_address[REGNO (operand)] != 0)))
3423 /* If we didn't already win, we can reload
3424 constants via force_const_mem, and other
3425 MEMs by reloading the address like for 'o'. */
3426 if (CONST_POOL_OK_P (operand)
3433 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3435 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3438 /* If we didn't already win, we can reload
3439 the address into a base register. */
3440 this_alternative[i] = base_reg_class (VOIDmode,
3447 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3454 = (reg_class_subunion
3455 [this_alternative[i]]
3456 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3458 if (GET_MODE (operand) == BLKmode)
3462 && reg_fits_class_p (operand, this_alternative[i],
3463 offset, GET_MODE (recog_data.operand[i])))
3467 while ((p += len), c);
3471 /* If this operand could be handled with a reg,
3472 and some reg is allowed, then this operand can be handled. */
3473 if (winreg && this_alternative[i] != NO_REGS
3474 && (win || !class_only_fixed_regs[this_alternative[i]]))
3477 /* Record which operands fit this alternative. */
3478 this_alternative_earlyclobber[i] = earlyclobber;
3479 if (win && ! force_reload)
3480 this_alternative_win[i] = 1;
3481 else if (did_match && ! force_reload)
3482 this_alternative_match_win[i] = 1;
3485 int const_to_mem = 0;
3487 this_alternative_offmemok[i] = offmemok;
3491 /* Alternative loses if it has no regs for a reg operand. */
3493 && this_alternative[i] == NO_REGS
3494 && this_alternative_matches[i] < 0)
3497 /* If this is a constant that is reloaded into the desired
3498 class by copying it to memory first, count that as another
3499 reload. This is consistent with other code and is
3500 required to avoid choosing another alternative when
3501 the constant is moved into memory by this function on
3502 an early reload pass. Note that the test here is
3503 precisely the same as in the code below that calls
3505 if (CONST_POOL_OK_P (operand)
3506 && ((PREFERRED_RELOAD_CLASS (operand, this_alternative[i])
3508 || no_input_reloads)
3509 && operand_mode[i] != VOIDmode)
3512 if (this_alternative[i] != NO_REGS)
3516 /* Alternative loses if it requires a type of reload not
3517 permitted for this insn. We can always reload SCRATCH
3518 and objects with a REG_UNUSED note. */
3519 if (GET_CODE (operand) != SCRATCH
3520 && modified[i] != RELOAD_READ && no_output_reloads
3521 && ! find_reg_note (insn, REG_UNUSED, operand))
3523 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3527 /* If we can't reload this value at all, reject this
3528 alternative. Note that we could also lose due to
3529 LIMIT_RELOAD_CLASS, but we don't check that
3532 if (! CONSTANT_P (operand) && this_alternative[i] != NO_REGS)
3534 if (PREFERRED_RELOAD_CLASS (operand, this_alternative[i])
3538 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
3539 if (operand_type[i] == RELOAD_FOR_OUTPUT
3540 && (PREFERRED_OUTPUT_RELOAD_CLASS (operand,
3541 this_alternative[i])
3547 /* We prefer to reload pseudos over reloading other things,
3548 since such reloads may be able to be eliminated later.
3549 If we are reloading a SCRATCH, we won't be generating any
3550 insns, just using a register, so it is also preferred.
3551 So bump REJECT in other cases. Don't do this in the
3552 case where we are forcing a constant into memory and
3553 it will then win since we don't want to have a different
3554 alternative match then. */
3555 if (! (REG_P (operand)
3556 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3557 && GET_CODE (operand) != SCRATCH
3558 && ! (const_to_mem && constmemok))
3561 /* Input reloads can be inherited more often than output
3562 reloads can be removed, so penalize output reloads. */
3563 if (operand_type[i] != RELOAD_FOR_INPUT
3564 && GET_CODE (operand) != SCRATCH)
3568 /* If this operand is a pseudo register that didn't get a hard
3569 reg and this alternative accepts some register, see if the
3570 class that we want is a subset of the preferred class for this
3571 register. If not, but it intersects that class, use the
3572 preferred class instead. If it does not intersect the preferred
3573 class, show that usage of this alternative should be discouraged;
3574 it will be discouraged more still if the register is `preferred
3575 or nothing'. We do this because it increases the chance of
3576 reusing our spill register in a later insn and avoiding a pair
3577 of memory stores and loads.
3579 Don't bother with this if this alternative will accept this
3582 Don't do this for a multiword operand, since it is only a
3583 small win and has the risk of requiring more spill registers,
3584 which could cause a large loss.
3586 Don't do this if the preferred class has only one register
3587 because we might otherwise exhaust the class. */
3589 if (! win && ! did_match
3590 && this_alternative[i] != NO_REGS
3591 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3592 && reg_class_size [(int) preferred_class[i]] > 0
3593 && ! SMALL_REGISTER_CLASS_P (preferred_class[i]))
3595 if (! reg_class_subset_p (this_alternative[i],
3596 preferred_class[i]))
3598 /* Since we don't have a way of forming the intersection,
3599 we just do something special if the preferred class
3600 is a subset of the class we have; that's the most
3601 common case anyway. */
3602 if (reg_class_subset_p (preferred_class[i],
3603 this_alternative[i]))
3604 this_alternative[i] = preferred_class[i];
3606 reject += (2 + 2 * pref_or_nothing[i]);
3611 /* Now see if any output operands that are marked "earlyclobber"
3612 in this alternative conflict with any input operands
3613 or any memory addresses. */
3615 for (i = 0; i < noperands; i++)
3616 if (this_alternative_earlyclobber[i]
3617 && (this_alternative_win[i] || this_alternative_match_win[i]))
3619 struct decomposition early_data;
3621 early_data = decompose (recog_data.operand[i]);
3623 gcc_assert (modified[i] != RELOAD_READ);
3625 if (this_alternative[i] == NO_REGS)
3627 this_alternative_earlyclobber[i] = 0;
3628 gcc_assert (this_insn_is_asm);
3629 error_for_asm (this_insn,
3630 "%<&%> constraint used with no register class");
3633 for (j = 0; j < noperands; j++)
3634 /* Is this an input operand or a memory ref? */
3635 if ((MEM_P (recog_data.operand[j])
3636 || modified[j] != RELOAD_WRITE)
3638 /* Ignore things like match_operator operands. */
3639 && !recog_data.is_operator[j]
3640 /* Don't count an input operand that is constrained to match
3641 the early clobber operand. */
3642 && ! (this_alternative_matches[j] == i
3643 && rtx_equal_p (recog_data.operand[i],
3644 recog_data.operand[j]))
3645 /* Is it altered by storing the earlyclobber operand? */
3646 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3649 /* If the output is in a non-empty few-regs class,
3650 it's costly to reload it, so reload the input instead. */
3651 if (SMALL_REGISTER_CLASS_P (this_alternative[i])
3652 && (REG_P (recog_data.operand[j])
3653 || GET_CODE (recog_data.operand[j]) == SUBREG))
3656 this_alternative_win[j] = 0;
3657 this_alternative_match_win[j] = 0;
3662 /* If an earlyclobber operand conflicts with something,
3663 it must be reloaded, so request this and count the cost. */
3667 this_alternative_win[i] = 0;
3668 this_alternative_match_win[j] = 0;
3669 for (j = 0; j < noperands; j++)
3670 if (this_alternative_matches[j] == i
3671 && this_alternative_match_win[j])
3673 this_alternative_win[j] = 0;
3674 this_alternative_match_win[j] = 0;
3680 /* If one alternative accepts all the operands, no reload required,
3681 choose that alternative; don't consider the remaining ones. */
3684 /* Unswap these so that they are never swapped at `finish'. */
3685 if (commutative >= 0)
3687 recog_data.operand[commutative] = substed_operand[commutative];
3688 recog_data.operand[commutative + 1]
3689 = substed_operand[commutative + 1];
3691 for (i = 0; i < noperands; i++)
3693 goal_alternative_win[i] = this_alternative_win[i];
3694 goal_alternative_match_win[i] = this_alternative_match_win[i];
3695 goal_alternative[i] = this_alternative[i];
3696 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3697 goal_alternative_matches[i] = this_alternative_matches[i];
3698 goal_alternative_earlyclobber[i]
3699 = this_alternative_earlyclobber[i];
3701 goal_alternative_number = this_alternative_number;
3702 goal_alternative_swapped = swapped;
3703 goal_earlyclobber = this_earlyclobber;
3707 /* REJECT, set by the ! and ? constraint characters and when a register
3708 would be reloaded into a non-preferred class, discourages the use of
3709 this alternative for a reload goal. REJECT is incremented by six
3710 for each ? and two for each non-preferred class. */
3711 losers = losers * 6 + reject;
3713 /* If this alternative can be made to work by reloading,
3714 and it needs less reloading than the others checked so far,
3715 record it as the chosen goal for reloading. */
3718 bool change_p = false;
3719 int small_class_operands_num = 0;
3723 for (i = 0; i < noperands; i++)
3724 small_class_operands_num
3725 += SMALL_REGISTER_CLASS_P (this_alternative[i]) ? 1 : 0;
3728 /* If the cost of the reloads is the same,
3729 prefer alternative which requires minimal
3730 number of small register classes for the
3731 operands. This improves chances of reloads
3732 for insn requiring small register
3734 && (small_class_operands_num
3735 < best_small_class_operands_num)))
3740 for (i = 0; i < noperands; i++)
3742 goal_alternative[i] = this_alternative[i];
3743 goal_alternative_win[i] = this_alternative_win[i];
3744 goal_alternative_match_win[i]
3745 = this_alternative_match_win[i];
3746 goal_alternative_offmemok[i]
3747 = this_alternative_offmemok[i];
3748 goal_alternative_matches[i] = this_alternative_matches[i];
3749 goal_alternative_earlyclobber[i]
3750 = this_alternative_earlyclobber[i];
3752 goal_alternative_swapped = swapped;
3754 best_small_class_operands_num = small_class_operands_num;
3755 goal_alternative_number = this_alternative_number;
3756 goal_earlyclobber = this_earlyclobber;
3761 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3762 then we need to try each alternative twice,
3763 the second time matching those two operands
3764 as if we had exchanged them.
3765 To do this, really exchange them in operands.
3767 If we have just tried the alternatives the second time,
3768 return operands to normal and drop through. */
3770 if (commutative >= 0)
3775 enum reg_class tclass;
3778 recog_data.operand[commutative] = substed_operand[commutative + 1];
3779 recog_data.operand[commutative + 1] = substed_operand[commutative];
3780 /* Swap the duplicates too. */
3781 for (i = 0; i < recog_data.n_dups; i++)
3782 if (recog_data.dup_num[i] == commutative
3783 || recog_data.dup_num[i] == commutative + 1)
3784 *recog_data.dup_loc[i]
3785 = recog_data.operand[(int) recog_data.dup_num[i]];
3787 tclass = preferred_class[commutative];
3788 preferred_class[commutative] = preferred_class[commutative + 1];
3789 preferred_class[commutative + 1] = tclass;
3791 t = pref_or_nothing[commutative];
3792 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3793 pref_or_nothing[commutative + 1] = t;
3795 t = address_reloaded[commutative];
3796 address_reloaded[commutative] = address_reloaded[commutative + 1];
3797 address_reloaded[commutative + 1] = t;
3799 memcpy (constraints, recog_data.constraints,
3800 noperands * sizeof (const char *));
3805 recog_data.operand[commutative] = substed_operand[commutative];
3806 recog_data.operand[commutative + 1]
3807 = substed_operand[commutative + 1];
3808 /* Unswap the duplicates too. */
3809 for (i = 0; i < recog_data.n_dups; i++)
3810 if (recog_data.dup_num[i] == commutative
3811 || recog_data.dup_num[i] == commutative + 1)
3812 *recog_data.dup_loc[i]
3813 = recog_data.operand[(int) recog_data.dup_num[i]];
3817 /* The operands don't meet the constraints.
3818 goal_alternative describes the alternative
3819 that we could reach by reloading the fewest operands.
3820 Reload so as to fit it. */
3822 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3824 /* No alternative works with reloads?? */
3825 if (insn_code_number >= 0)
3826 fatal_insn ("unable to generate reloads for:", insn);
3827 error_for_asm (insn, "inconsistent operand constraints in an %<asm%>");
3828 /* Avoid further trouble with this insn. */
3829 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3834 /* Jump to `finish' from above if all operands are valid already.
3835 In that case, goal_alternative_win is all 1. */
3838 /* Right now, for any pair of operands I and J that are required to match,
3840 goal_alternative_matches[J] is I.
3841 Set up goal_alternative_matched as the inverse function:
3842 goal_alternative_matched[I] = J. */
3844 for (i = 0; i < noperands; i++)
3845 goal_alternative_matched[i] = -1;
3847 for (i = 0; i < noperands; i++)
3848 if (! goal_alternative_win[i]
3849 && goal_alternative_matches[i] >= 0)
3850 goal_alternative_matched[goal_alternative_matches[i]] = i;
3852 for (i = 0; i < noperands; i++)
3853 goal_alternative_win[i] |= goal_alternative_match_win[i];
3855 /* If the best alternative is with operands 1 and 2 swapped,
3856 consider them swapped before reporting the reloads. Update the
3857 operand numbers of any reloads already pushed. */
3859 if (goal_alternative_swapped)
3863 tem = substed_operand[commutative];
3864 substed_operand[commutative] = substed_operand[commutative + 1];
3865 substed_operand[commutative + 1] = tem;
3866 tem = recog_data.operand[commutative];
3867 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3868 recog_data.operand[commutative + 1] = tem;
3869 tem = *recog_data.operand_loc[commutative];
3870 *recog_data.operand_loc[commutative]
3871 = *recog_data.operand_loc[commutative + 1];
3872 *recog_data.operand_loc[commutative + 1] = tem;
3874 for (i = 0; i < n_reloads; i++)
3876 if (rld[i].opnum == commutative)
3877 rld[i].opnum = commutative + 1;
3878 else if (rld[i].opnum == commutative + 1)
3879 rld[i].opnum = commutative;
3883 for (i = 0; i < noperands; i++)
3885 operand_reloadnum[i] = -1;
3887 /* If this is an earlyclobber operand, we need to widen the scope.
3888 The reload must remain valid from the start of the insn being
3889 reloaded until after the operand is stored into its destination.
3890 We approximate this with RELOAD_OTHER even though we know that we
3891 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3893 One special case that is worth checking is when we have an
3894 output that is earlyclobber but isn't used past the insn (typically
3895 a SCRATCH). In this case, we only need have the reload live
3896 through the insn itself, but not for any of our input or output
3898 But we must not accidentally narrow the scope of an existing
3899 RELOAD_OTHER reload - leave these alone.
3901 In any case, anything needed to address this operand can remain
3902 however they were previously categorized. */
3904 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3906 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3907 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3910 /* Any constants that aren't allowed and can't be reloaded
3911 into registers are here changed into memory references. */
3912 for (i = 0; i < noperands; i++)
3913 if (! goal_alternative_win[i])
3915 rtx op = recog_data.operand[i];
3916 rtx subreg = NULL_RTX;
3917 rtx plus = NULL_RTX;
3918 enum machine_mode mode = operand_mode[i];
3920 /* Reloads of SUBREGs of CONSTANT RTXs are handled later in
3921 push_reload so we have to let them pass here. */
3922 if (GET_CODE (op) == SUBREG)
3925 op = SUBREG_REG (op);
3926 mode = GET_MODE (op);
3929 if (GET_CODE (op) == PLUS)
3935 if (CONST_POOL_OK_P (op)
3936 && ((PREFERRED_RELOAD_CLASS (op,
3937 (enum reg_class) goal_alternative[i])
3939 || no_input_reloads)
3940 && mode != VOIDmode)
3942 int this_address_reloaded;
3943 rtx tem = force_const_mem (mode, op);
3945 /* If we stripped a SUBREG or a PLUS above add it back. */
3946 if (plus != NULL_RTX)
3947 tem = gen_rtx_PLUS (mode, XEXP (plus, 0), tem);
3949 if (subreg != NULL_RTX)
3950 tem = gen_rtx_SUBREG (operand_mode[i], tem, SUBREG_BYTE (subreg));
3952 this_address_reloaded = 0;
3953 substed_operand[i] = recog_data.operand[i]
3954 = find_reloads_toplev (tem, i, address_type[i], ind_levels,
3955 0, insn, &this_address_reloaded);
3957 /* If the alternative accepts constant pool refs directly
3958 there will be no reload needed at all. */
3959 if (plus == NULL_RTX
3960 && subreg == NULL_RTX
3961 && alternative_allows_const_pool_ref (this_address_reloaded == 0
3962 ? substed_operand[i]
3964 recog_data.constraints[i],
3965 goal_alternative_number))
3966 goal_alternative_win[i] = 1;
3970 /* Record the values of the earlyclobber operands for the caller. */
3971 if (goal_earlyclobber)
3972 for (i = 0; i < noperands; i++)
3973 if (goal_alternative_earlyclobber[i])
3974 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3976 /* Now record reloads for all the operands that need them. */
3977 for (i = 0; i < noperands; i++)
3978 if (! goal_alternative_win[i])
3980 /* Operands that match previous ones have already been handled. */
3981 if (goal_alternative_matches[i] >= 0)
3983 /* Handle an operand with a nonoffsettable address
3984 appearing where an offsettable address will do
3985 by reloading the address into a base register.
3987 ??? We can also do this when the operand is a register and
3988 reg_equiv_mem is not offsettable, but this is a bit tricky,
3989 so we don't bother with it. It may not be worth doing. */
3990 else if (goal_alternative_matched[i] == -1
3991 && goal_alternative_offmemok[i]
3992 && MEM_P (recog_data.operand[i]))
3994 /* If the address to be reloaded is a VOIDmode constant,
3995 use the default address mode as mode of the reload register,
3996 as would have been done by find_reloads_address. */
3997 enum machine_mode address_mode;
3998 address_mode = GET_MODE (XEXP (recog_data.operand[i], 0));
3999 if (address_mode == VOIDmode)
4001 addr_space_t as = MEM_ADDR_SPACE (recog_data.operand[i]);
4002 address_mode = targetm.addr_space.address_mode (as);
4005 operand_reloadnum[i]
4006 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
4007 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
4008 base_reg_class (VOIDmode, MEM, SCRATCH),
4010 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
4011 rld[operand_reloadnum[i]].inc
4012 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
4014 /* If this operand is an output, we will have made any
4015 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
4016 now we are treating part of the operand as an input, so
4017 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
4019 if (modified[i] == RELOAD_WRITE)
4021 for (j = 0; j < n_reloads; j++)
4023 if (rld[j].opnum == i)
4025 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
4026 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
4027 else if (rld[j].when_needed
4028 == RELOAD_FOR_OUTADDR_ADDRESS)
4029 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
4034 else if (goal_alternative_matched[i] == -1)
4036 operand_reloadnum[i]
4037 = push_reload ((modified[i] != RELOAD_WRITE
4038 ? recog_data.operand[i] : 0),
4039 (modified[i] != RELOAD_READ
4040 ? recog_data.operand[i] : 0),
4041 (modified[i] != RELOAD_WRITE
4042 ? recog_data.operand_loc[i] : 0),
4043 (modified[i] != RELOAD_READ
4044 ? recog_data.operand_loc[i] : 0),
4045 (enum reg_class) goal_alternative[i],
4046 (modified[i] == RELOAD_WRITE
4047 ? VOIDmode : operand_mode[i]),
4048 (modified[i] == RELOAD_READ
4049 ? VOIDmode : operand_mode[i]),
4050 (insn_code_number < 0 ? 0
4051 : insn_data[insn_code_number].operand[i].strict_low),
4052 0, i, operand_type[i]);
4054 /* In a matching pair of operands, one must be input only
4055 and the other must be output only.
4056 Pass the input operand as IN and the other as OUT. */
4057 else if (modified[i] == RELOAD_READ
4058 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
4060 operand_reloadnum[i]
4061 = push_reload (recog_data.operand[i],
4062 recog_data.operand[goal_alternative_matched[i]],
4063 recog_data.operand_loc[i],
4064 recog_data.operand_loc[goal_alternative_matched[i]],
4065 (enum reg_class) goal_alternative[i],
4067 operand_mode[goal_alternative_matched[i]],
4068 0, 0, i, RELOAD_OTHER);
4069 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
4071 else if (modified[i] == RELOAD_WRITE
4072 && modified[goal_alternative_matched[i]] == RELOAD_READ)
4074 operand_reloadnum[goal_alternative_matched[i]]
4075 = push_reload (recog_data.operand[goal_alternative_matched[i]],
4076 recog_data.operand[i],
4077 recog_data.operand_loc[goal_alternative_matched[i]],
4078 recog_data.operand_loc[i],
4079 (enum reg_class) goal_alternative[i],
4080 operand_mode[goal_alternative_matched[i]],
4082 0, 0, i, RELOAD_OTHER);
4083 operand_reloadnum[i] = output_reloadnum;
4087 gcc_assert (insn_code_number < 0);
4088 error_for_asm (insn, "inconsistent operand constraints "
4090 /* Avoid further trouble with this insn. */
4091 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
4096 else if (goal_alternative_matched[i] < 0
4097 && goal_alternative_matches[i] < 0
4098 && address_operand_reloaded[i] != 1
4101 /* For each non-matching operand that's a MEM or a pseudo-register
4102 that didn't get a hard register, make an optional reload.
4103 This may get done even if the insn needs no reloads otherwise. */
4105 rtx operand = recog_data.operand[i];
4107 while (GET_CODE (operand) == SUBREG)
4108 operand = SUBREG_REG (operand);
4109 if ((MEM_P (operand)
4111 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4112 /* If this is only for an output, the optional reload would not
4113 actually cause us to use a register now, just note that
4114 something is stored here. */
4115 && ((enum reg_class) goal_alternative[i] != NO_REGS
4116 || modified[i] == RELOAD_WRITE)
4117 && ! no_input_reloads
4118 /* An optional output reload might allow to delete INSN later.
4119 We mustn't make in-out reloads on insns that are not permitted
4121 If this is an asm, we can't delete it; we must not even call
4122 push_reload for an optional output reload in this case,
4123 because we can't be sure that the constraint allows a register,
4124 and push_reload verifies the constraints for asms. */
4125 && (modified[i] == RELOAD_READ
4126 || (! no_output_reloads && ! this_insn_is_asm)))
4127 operand_reloadnum[i]
4128 = push_reload ((modified[i] != RELOAD_WRITE
4129 ? recog_data.operand[i] : 0),
4130 (modified[i] != RELOAD_READ
4131 ? recog_data.operand[i] : 0),
4132 (modified[i] != RELOAD_WRITE
4133 ? recog_data.operand_loc[i] : 0),
4134 (modified[i] != RELOAD_READ
4135 ? recog_data.operand_loc[i] : 0),
4136 (enum reg_class) goal_alternative[i],
4137 (modified[i] == RELOAD_WRITE
4138 ? VOIDmode : operand_mode[i]),
4139 (modified[i] == RELOAD_READ
4140 ? VOIDmode : operand_mode[i]),
4141 (insn_code_number < 0 ? 0
4142 : insn_data[insn_code_number].operand[i].strict_low),
4143 1, i, operand_type[i]);
4144 /* If a memory reference remains (either as a MEM or a pseudo that
4145 did not get a hard register), yet we can't make an optional
4146 reload, check if this is actually a pseudo register reference;
4147 we then need to emit a USE and/or a CLOBBER so that reload
4148 inheritance will do the right thing. */
4152 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
4153 && reg_renumber [REGNO (operand)] < 0)))
4155 operand = *recog_data.operand_loc[i];
4157 while (GET_CODE (operand) == SUBREG)
4158 operand = SUBREG_REG (operand);
4159 if (REG_P (operand))
4161 if (modified[i] != RELOAD_WRITE)
4162 /* We mark the USE with QImode so that we recognize
4163 it as one that can be safely deleted at the end
4165 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
4167 if (modified[i] != RELOAD_READ)
4168 emit_insn_after (gen_clobber (operand), insn);
4172 else if (goal_alternative_matches[i] >= 0
4173 && goal_alternative_win[goal_alternative_matches[i]]
4174 && modified[i] == RELOAD_READ
4175 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
4176 && ! no_input_reloads && ! no_output_reloads
4179 /* Similarly, make an optional reload for a pair of matching
4180 objects that are in MEM or a pseudo that didn't get a hard reg. */
4182 rtx operand = recog_data.operand[i];
4184 while (GET_CODE (operand) == SUBREG)
4185 operand = SUBREG_REG (operand);
4186 if ((MEM_P (operand)
4188 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4189 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
4191 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
4192 = push_reload (recog_data.operand[goal_alternative_matches[i]],
4193 recog_data.operand[i],
4194 recog_data.operand_loc[goal_alternative_matches[i]],
4195 recog_data.operand_loc[i],
4196 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
4197 operand_mode[goal_alternative_matches[i]],
4199 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
4202 /* Perform whatever substitutions on the operands we are supposed
4203 to make due to commutativity or replacement of registers
4204 with equivalent constants or memory slots. */
4206 for (i = 0; i < noperands; i++)
4208 /* We only do this on the last pass through reload, because it is
4209 possible for some data (like reg_equiv_address) to be changed during
4210 later passes. Moreover, we lose the opportunity to get a useful
4211 reload_{in,out}_reg when we do these replacements. */
4215 rtx substitution = substed_operand[i];
4217 *recog_data.operand_loc[i] = substitution;
4219 /* If we're replacing an operand with a LABEL_REF, we need to
4220 make sure that there's a REG_LABEL_OPERAND note attached to
4221 this instruction. */
4222 if (GET_CODE (substitution) == LABEL_REF
4223 && !find_reg_note (insn, REG_LABEL_OPERAND,
4224 XEXP (substitution, 0))
4225 /* For a JUMP_P, if it was a branch target it must have
4226 already been recorded as such. */
4228 || !label_is_jump_target_p (XEXP (substitution, 0),
4230 add_reg_note (insn, REG_LABEL_OPERAND, XEXP (substitution, 0));
4233 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4236 /* If this insn pattern contains any MATCH_DUP's, make sure that
4237 they will be substituted if the operands they match are substituted.
4238 Also do now any substitutions we already did on the operands.
4240 Don't do this if we aren't making replacements because we might be
4241 propagating things allocated by frame pointer elimination into places
4242 it doesn't expect. */
4244 if (insn_code_number >= 0 && replace)
4245 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4247 int opno = recog_data.dup_num[i];
4248 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4249 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4253 /* This loses because reloading of prior insns can invalidate the equivalence
4254 (or at least find_equiv_reg isn't smart enough to find it any more),
4255 causing this insn to need more reload regs than it needed before.
4256 It may be too late to make the reload regs available.
4257 Now this optimization is done safely in choose_reload_regs. */
4259 /* For each reload of a reg into some other class of reg,
4260 search for an existing equivalent reg (same value now) in the right class.
4261 We can use it as long as we don't need to change its contents. */
4262 for (i = 0; i < n_reloads; i++)
4263 if (rld[i].reg_rtx == 0
4265 && REG_P (rld[i].in)
4269 = find_equiv_reg (rld[i].in, insn, rld[i].rclass, -1,
4270 static_reload_reg_p, 0, rld[i].inmode);
4271 /* Prevent generation of insn to load the value
4272 because the one we found already has the value. */
4274 rld[i].in = rld[i].reg_rtx;
4278 /* If we detected error and replaced asm instruction by USE, forget about the
4280 if (GET_CODE (PATTERN (insn)) == USE
4281 && CONST_INT_P (XEXP (PATTERN (insn), 0)))
4284 /* Perhaps an output reload can be combined with another
4285 to reduce needs by one. */
4286 if (!goal_earlyclobber)
4289 /* If we have a pair of reloads for parts of an address, they are reloading
4290 the same object, the operands themselves were not reloaded, and they
4291 are for two operands that are supposed to match, merge the reloads and
4292 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4294 for (i = 0; i < n_reloads; i++)
4298 for (j = i + 1; j < n_reloads; j++)
4299 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4300 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4301 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4302 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4303 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4304 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4305 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4306 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4307 && rtx_equal_p (rld[i].in, rld[j].in)
4308 && (operand_reloadnum[rld[i].opnum] < 0
4309 || rld[operand_reloadnum[rld[i].opnum]].optional)
4310 && (operand_reloadnum[rld[j].opnum] < 0
4311 || rld[operand_reloadnum[rld[j].opnum]].optional)
4312 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4313 || (goal_alternative_matches[rld[j].opnum]
4316 for (k = 0; k < n_replacements; k++)
4317 if (replacements[k].what == j)
4318 replacements[k].what = i;
4320 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4321 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4322 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4324 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4329 /* Scan all the reloads and update their type.
4330 If a reload is for the address of an operand and we didn't reload
4331 that operand, change the type. Similarly, change the operand number
4332 of a reload when two operands match. If a reload is optional, treat it
4333 as though the operand isn't reloaded.
4335 ??? This latter case is somewhat odd because if we do the optional
4336 reload, it means the object is hanging around. Thus we need only
4337 do the address reload if the optional reload was NOT done.
4339 Change secondary reloads to be the address type of their operand, not
4342 If an operand's reload is now RELOAD_OTHER, change any
4343 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4344 RELOAD_FOR_OTHER_ADDRESS. */
4346 for (i = 0; i < n_reloads; i++)
4348 if (rld[i].secondary_p
4349 && rld[i].when_needed == operand_type[rld[i].opnum])
4350 rld[i].when_needed = address_type[rld[i].opnum];
4352 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4353 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4354 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4355 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4356 && (operand_reloadnum[rld[i].opnum] < 0
4357 || rld[operand_reloadnum[rld[i].opnum]].optional))
4359 /* If we have a secondary reload to go along with this reload,
4360 change its type to RELOAD_FOR_OPADDR_ADDR. */
4362 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4363 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4364 && rld[i].secondary_in_reload != -1)
4366 int secondary_in_reload = rld[i].secondary_in_reload;
4368 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4370 /* If there's a tertiary reload we have to change it also. */
4371 if (secondary_in_reload > 0
4372 && rld[secondary_in_reload].secondary_in_reload != -1)
4373 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4374 = RELOAD_FOR_OPADDR_ADDR;
4377 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4378 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4379 && rld[i].secondary_out_reload != -1)
4381 int secondary_out_reload = rld[i].secondary_out_reload;
4383 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4385 /* If there's a tertiary reload we have to change it also. */
4386 if (secondary_out_reload
4387 && rld[secondary_out_reload].secondary_out_reload != -1)
4388 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4389 = RELOAD_FOR_OPADDR_ADDR;
4392 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4393 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4394 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4396 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4399 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4400 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4401 && operand_reloadnum[rld[i].opnum] >= 0
4402 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4404 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4406 if (goal_alternative_matches[rld[i].opnum] >= 0)
4407 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4410 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4411 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4412 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4414 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4415 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4416 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4417 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4418 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4419 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4420 This is complicated by the fact that a single operand can have more
4421 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4422 choose_reload_regs without affecting code quality, and cases that
4423 actually fail are extremely rare, so it turns out to be better to fix
4424 the problem here by not generating cases that choose_reload_regs will
4426 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4427 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4429 We can reduce the register pressure by exploiting that a
4430 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4431 does not conflict with any of them, if it is only used for the first of
4432 the RELOAD_FOR_X_ADDRESS reloads. */
4434 int first_op_addr_num = -2;
4435 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4436 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4437 int need_change = 0;
4438 /* We use last_op_addr_reload and the contents of the above arrays
4439 first as flags - -2 means no instance encountered, -1 means exactly
4440 one instance encountered.
4441 If more than one instance has been encountered, we store the reload
4442 number of the first reload of the kind in question; reload numbers
4443 are known to be non-negative. */
4444 for (i = 0; i < noperands; i++)
4445 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4446 for (i = n_reloads - 1; i >= 0; i--)
4448 switch (rld[i].when_needed)
4450 case RELOAD_FOR_OPERAND_ADDRESS:
4451 if (++first_op_addr_num >= 0)
4453 first_op_addr_num = i;
4457 case RELOAD_FOR_INPUT_ADDRESS:
4458 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4460 first_inpaddr_num[rld[i].opnum] = i;
4464 case RELOAD_FOR_OUTPUT_ADDRESS:
4465 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4467 first_outpaddr_num[rld[i].opnum] = i;
4478 for (i = 0; i < n_reloads; i++)
4481 enum reload_type type;
4483 switch (rld[i].when_needed)
4485 case RELOAD_FOR_OPADDR_ADDR:
4486 first_num = first_op_addr_num;
4487 type = RELOAD_FOR_OPERAND_ADDRESS;
4489 case RELOAD_FOR_INPADDR_ADDRESS:
4490 first_num = first_inpaddr_num[rld[i].opnum];
4491 type = RELOAD_FOR_INPUT_ADDRESS;
4493 case RELOAD_FOR_OUTADDR_ADDRESS:
4494 first_num = first_outpaddr_num[rld[i].opnum];
4495 type = RELOAD_FOR_OUTPUT_ADDRESS;
4502 else if (i > first_num)
4503 rld[i].when_needed = type;
4506 /* Check if the only TYPE reload that uses reload I is
4507 reload FIRST_NUM. */
4508 for (j = n_reloads - 1; j > first_num; j--)
4510 if (rld[j].when_needed == type
4511 && (rld[i].secondary_p
4512 ? rld[j].secondary_in_reload == i
4513 : reg_mentioned_p (rld[i].in, rld[j].in)))
4515 rld[i].when_needed = type;
4524 /* See if we have any reloads that are now allowed to be merged
4525 because we've changed when the reload is needed to
4526 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4527 check for the most common cases. */
4529 for (i = 0; i < n_reloads; i++)
4530 if (rld[i].in != 0 && rld[i].out == 0
4531 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4532 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4533 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4534 for (j = 0; j < n_reloads; j++)
4535 if (i != j && rld[j].in != 0 && rld[j].out == 0
4536 && rld[j].when_needed == rld[i].when_needed
4537 && MATCHES (rld[i].in, rld[j].in)
4538 && rld[i].rclass == rld[j].rclass
4539 && !rld[i].nocombine && !rld[j].nocombine
4540 && rld[i].reg_rtx == rld[j].reg_rtx)
4542 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4543 transfer_replacements (i, j);
4548 /* If we made any reloads for addresses, see if they violate a
4549 "no input reloads" requirement for this insn. But loads that we
4550 do after the insn (such as for output addresses) are fine. */
4551 if (no_input_reloads)
4552 for (i = 0; i < n_reloads; i++)
4553 gcc_assert (rld[i].in == 0
4554 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS
4555 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS);
4558 /* Compute reload_mode and reload_nregs. */
4559 for (i = 0; i < n_reloads; i++)
4562 = (rld[i].inmode == VOIDmode
4563 || (GET_MODE_SIZE (rld[i].outmode)
4564 > GET_MODE_SIZE (rld[i].inmode)))
4565 ? rld[i].outmode : rld[i].inmode;
4567 rld[i].nregs = CLASS_MAX_NREGS (rld[i].rclass, rld[i].mode);
4570 /* Special case a simple move with an input reload and a
4571 destination of a hard reg, if the hard reg is ok, use it. */
4572 for (i = 0; i < n_reloads; i++)
4573 if (rld[i].when_needed == RELOAD_FOR_INPUT
4574 && GET_CODE (PATTERN (insn)) == SET
4575 && REG_P (SET_DEST (PATTERN (insn)))
4576 && (SET_SRC (PATTERN (insn)) == rld[i].in
4577 || SET_SRC (PATTERN (insn)) == rld[i].in_reg)
4578 && !elimination_target_reg_p (SET_DEST (PATTERN (insn))))
4580 rtx dest = SET_DEST (PATTERN (insn));
4581 unsigned int regno = REGNO (dest);
4583 if (regno < FIRST_PSEUDO_REGISTER
4584 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno)
4585 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4587 int nr = hard_regno_nregs[regno][rld[i].mode];
4590 for (nri = 1; nri < nr; nri ++)
4591 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno + nri))
4595 rld[i].reg_rtx = dest;
4602 /* Return true if alternative number ALTNUM in constraint-string
4603 CONSTRAINT is guaranteed to accept a reloaded constant-pool reference.
4604 MEM gives the reference if it didn't need any reloads, otherwise it
4608 alternative_allows_const_pool_ref (rtx mem ATTRIBUTE_UNUSED,
4609 const char *constraint, int altnum)
4613 /* Skip alternatives before the one requested. */
4616 while (*constraint++ != ',');
4619 /* Scan the requested alternative for TARGET_MEM_CONSTRAINT or 'o'.
4620 If one of them is present, this alternative accepts the result of
4621 passing a constant-pool reference through find_reloads_toplev.
4623 The same is true of extra memory constraints if the address
4624 was reloaded into a register. However, the target may elect
4625 to disallow the original constant address, forcing it to be
4626 reloaded into a register instead. */
4627 for (; (c = *constraint) && c != ',' && c != '#';
4628 constraint += CONSTRAINT_LEN (c, constraint))
4630 if (c == TARGET_MEM_CONSTRAINT || c == 'o')
4632 #ifdef EXTRA_CONSTRAINT_STR
4633 if (EXTRA_MEMORY_CONSTRAINT (c, constraint)
4634 && (mem == NULL || EXTRA_CONSTRAINT_STR (mem, c, constraint)))
4641 /* Scan X for memory references and scan the addresses for reloading.
4642 Also checks for references to "constant" regs that we want to eliminate
4643 and replaces them with the values they stand for.
4644 We may alter X destructively if it contains a reference to such.
4645 If X is just a constant reg, we return the equivalent value
4648 IND_LEVELS says how many levels of indirect addressing this machine
4651 OPNUM and TYPE identify the purpose of the reload.
4653 IS_SET_DEST is true if X is the destination of a SET, which is not
4654 appropriate to be replaced by a constant.
4656 INSN, if nonzero, is the insn in which we do the reload. It is used
4657 to determine if we may generate output reloads, and where to put USEs
4658 for pseudos that we have to replace with stack slots.
4660 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4661 result of find_reloads_address. */
4664 find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4665 int ind_levels, int is_set_dest, rtx insn,
4666 int *address_reloaded)
4668 RTX_CODE code = GET_CODE (x);
4670 const char *fmt = GET_RTX_FORMAT (code);
4676 /* This code is duplicated for speed in find_reloads. */
4677 int regno = REGNO (x);
4678 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4679 x = reg_equiv_constant[regno];
4681 /* This creates (subreg (mem...)) which would cause an unnecessary
4682 reload of the mem. */
4683 else if (reg_equiv_mem[regno] != 0)
4684 x = reg_equiv_mem[regno];
4686 else if (reg_equiv_memory_loc[regno]
4687 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4689 rtx mem = make_memloc (x, regno);
4690 if (reg_equiv_address[regno]
4691 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4693 /* If this is not a toplevel operand, find_reloads doesn't see
4694 this substitution. We have to emit a USE of the pseudo so
4695 that delete_output_reload can see it. */
4696 if (replace_reloads && recog_data.operand[opnum] != x)
4697 /* We mark the USE with QImode so that we recognize it
4698 as one that can be safely deleted at the end of
4700 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4703 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4704 opnum, type, ind_levels, insn);
4705 if (!rtx_equal_p (x, mem))
4706 push_reg_equiv_alt_mem (regno, x);
4707 if (address_reloaded)
4708 *address_reloaded = i;
4717 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4718 opnum, type, ind_levels, insn);
4719 if (address_reloaded)
4720 *address_reloaded = i;
4725 if (code == SUBREG && REG_P (SUBREG_REG (x)))
4727 /* Check for SUBREG containing a REG that's equivalent to a
4728 constant. If the constant has a known value, truncate it
4729 right now. Similarly if we are extracting a single-word of a
4730 multi-word constant. If the constant is symbolic, allow it
4731 to be substituted normally. push_reload will strip the
4732 subreg later. The constant must not be VOIDmode, because we
4733 will lose the mode of the register (this should never happen
4734 because one of the cases above should handle it). */
4736 int regno = REGNO (SUBREG_REG (x));
4739 if (regno >= FIRST_PSEUDO_REGISTER
4740 && reg_renumber[regno] < 0
4741 && reg_equiv_constant[regno] != 0)
4744 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4745 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4747 if (CONSTANT_P (tem) && !LEGITIMATE_CONSTANT_P (tem))
4749 tem = force_const_mem (GET_MODE (x), tem);
4750 i = find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4751 &XEXP (tem, 0), opnum, type,
4753 if (address_reloaded)
4754 *address_reloaded = i;
4759 /* If the subreg contains a reg that will be converted to a mem,
4760 convert the subreg to a narrower memref now.
4761 Otherwise, we would get (subreg (mem ...) ...),
4762 which would force reload of the mem.
4764 We also need to do this if there is an equivalent MEM that is
4765 not offsettable. In that case, alter_subreg would produce an
4766 invalid address on big-endian machines.
4768 For machines that extend byte loads, we must not reload using
4769 a wider mode if we have a paradoxical SUBREG. find_reloads will
4770 force a reload in that case. So we should not do anything here. */
4772 if (regno >= FIRST_PSEUDO_REGISTER
4773 #ifdef LOAD_EXTEND_OP
4774 && (GET_MODE_SIZE (GET_MODE (x))
4775 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4777 && (reg_equiv_address[regno] != 0
4778 || (reg_equiv_mem[regno] != 0
4779 && (! strict_memory_address_addr_space_p
4780 (GET_MODE (x), XEXP (reg_equiv_mem[regno], 0),
4781 MEM_ADDR_SPACE (reg_equiv_mem[regno]))
4782 || ! offsettable_memref_p (reg_equiv_mem[regno])
4783 || num_not_at_initial_offset))))
4784 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4788 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4792 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4793 ind_levels, is_set_dest, insn,
4795 /* If we have replaced a reg with it's equivalent memory loc -
4796 that can still be handled here e.g. if it's in a paradoxical
4797 subreg - we must make the change in a copy, rather than using
4798 a destructive change. This way, find_reloads can still elect
4799 not to do the change. */
4800 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4802 x = shallow_copy_rtx (x);
4805 XEXP (x, i) = new_part;
4811 /* Return a mem ref for the memory equivalent of reg REGNO.
4812 This mem ref is not shared with anything. */
4815 make_memloc (rtx ad, int regno)
4817 /* We must rerun eliminate_regs, in case the elimination
4818 offsets have changed. */
4820 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], VOIDmode, NULL_RTX),
4823 /* If TEM might contain a pseudo, we must copy it to avoid
4824 modifying it when we do the substitution for the reload. */
4825 if (rtx_varies_p (tem, 0))
4826 tem = copy_rtx (tem);
4828 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4829 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4831 /* Copy the result if it's still the same as the equivalence, to avoid
4832 modifying it when we do the substitution for the reload. */
4833 if (tem == reg_equiv_memory_loc[regno])
4834 tem = copy_rtx (tem);
4838 /* Returns true if AD could be turned into a valid memory reference
4839 to mode MODE in address space AS by reloading the part pointed to
4840 by PART into a register. */
4843 maybe_memory_address_addr_space_p (enum machine_mode mode, rtx ad,
4844 addr_space_t as, rtx *part)
4848 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4851 retv = memory_address_addr_space_p (mode, ad, as);
4857 /* Record all reloads needed for handling memory address AD
4858 which appears in *LOC in a memory reference to mode MODE
4859 which itself is found in location *MEMREFLOC.
4860 Note that we take shortcuts assuming that no multi-reg machine mode
4861 occurs as part of an address.
4863 OPNUM and TYPE specify the purpose of this reload.
4865 IND_LEVELS says how many levels of indirect addressing this machine
4868 INSN, if nonzero, is the insn in which we do the reload. It is used
4869 to determine if we may generate output reloads, and where to put USEs
4870 for pseudos that we have to replace with stack slots.
4872 Value is one if this address is reloaded or replaced as a whole; it is
4873 zero if the top level of this address was not reloaded or replaced, and
4874 it is -1 if it may or may not have been reloaded or replaced.
4876 Note that there is no verification that the address will be valid after
4877 this routine does its work. Instead, we rely on the fact that the address
4878 was valid when reload started. So we need only undo things that reload
4879 could have broken. These are wrong register types, pseudos not allocated
4880 to a hard register, and frame pointer elimination. */
4883 find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4884 rtx *loc, int opnum, enum reload_type type,
4885 int ind_levels, rtx insn)
4887 addr_space_t as = memrefloc? MEM_ADDR_SPACE (*memrefloc)
4888 : ADDR_SPACE_GENERIC;
4890 int removed_and = 0;
4894 /* If the address is a register, see if it is a legitimate address and
4895 reload if not. We first handle the cases where we need not reload
4896 or where we must reload in a non-standard way. */
4902 if (reg_equiv_constant[regno] != 0)
4904 find_reloads_address_part (reg_equiv_constant[regno], loc,
4905 base_reg_class (mode, MEM, SCRATCH),
4906 GET_MODE (ad), opnum, type, ind_levels);
4910 tem = reg_equiv_memory_loc[regno];
4913 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4915 tem = make_memloc (ad, regno);
4916 if (! strict_memory_address_addr_space_p (GET_MODE (tem),
4918 MEM_ADDR_SPACE (tem)))
4922 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4923 &XEXP (tem, 0), opnum,
4924 ADDR_TYPE (type), ind_levels, insn);
4925 if (!rtx_equal_p (tem, orig))
4926 push_reg_equiv_alt_mem (regno, tem);
4928 /* We can avoid a reload if the register's equivalent memory
4929 expression is valid as an indirect memory address.
4930 But not all addresses are valid in a mem used as an indirect
4931 address: only reg or reg+constant. */
4934 && strict_memory_address_addr_space_p (mode, tem, as)
4935 && (REG_P (XEXP (tem, 0))
4936 || (GET_CODE (XEXP (tem, 0)) == PLUS
4937 && REG_P (XEXP (XEXP (tem, 0), 0))
4938 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4940 /* TEM is not the same as what we'll be replacing the
4941 pseudo with after reload, put a USE in front of INSN
4942 in the final reload pass. */
4944 && num_not_at_initial_offset
4945 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4948 /* We mark the USE with QImode so that we
4949 recognize it as one that can be safely
4950 deleted at the end of reload. */
4951 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4954 /* This doesn't really count as replacing the address
4955 as a whole, since it is still a memory access. */
4963 /* The only remaining case where we can avoid a reload is if this is a
4964 hard register that is valid as a base register and which is not the
4965 subject of a CLOBBER in this insn. */
4967 else if (regno < FIRST_PSEUDO_REGISTER
4968 && regno_ok_for_base_p (regno, mode, MEM, SCRATCH)
4969 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4972 /* If we do not have one of the cases above, we must do the reload. */
4973 push_reload (ad, NULL_RTX, loc, (rtx*) 0, base_reg_class (mode, MEM, SCRATCH),
4974 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4978 if (strict_memory_address_addr_space_p (mode, ad, as))
4980 /* The address appears valid, so reloads are not needed.
4981 But the address may contain an eliminable register.
4982 This can happen because a machine with indirect addressing
4983 may consider a pseudo register by itself a valid address even when
4984 it has failed to get a hard reg.
4985 So do a tree-walk to find and eliminate all such regs. */
4987 /* But first quickly dispose of a common case. */
4988 if (GET_CODE (ad) == PLUS
4989 && CONST_INT_P (XEXP (ad, 1))
4990 && REG_P (XEXP (ad, 0))
4991 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4994 subst_reg_equivs_changed = 0;
4995 *loc = subst_reg_equivs (ad, insn);
4997 if (! subst_reg_equivs_changed)
5000 /* Check result for validity after substitution. */
5001 if (strict_memory_address_addr_space_p (mode, ad, as))
5005 #ifdef LEGITIMIZE_RELOAD_ADDRESS
5008 if (memrefloc && ADDR_SPACE_GENERIC_P (as))
5010 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
5015 *memrefloc = copy_rtx (*memrefloc);
5016 XEXP (*memrefloc, 0) = ad;
5017 move_replacements (&ad, &XEXP (*memrefloc, 0));
5023 /* The address is not valid. We have to figure out why. First see if
5024 we have an outer AND and remove it if so. Then analyze what's inside. */
5026 if (GET_CODE (ad) == AND)
5029 loc = &XEXP (ad, 0);
5033 /* One possibility for why the address is invalid is that it is itself
5034 a MEM. This can happen when the frame pointer is being eliminated, a
5035 pseudo is not allocated to a hard register, and the offset between the
5036 frame and stack pointers is not its initial value. In that case the
5037 pseudo will have been replaced by a MEM referring to the
5041 /* First ensure that the address in this MEM is valid. Then, unless
5042 indirect addresses are valid, reload the MEM into a register. */
5044 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
5045 opnum, ADDR_TYPE (type),
5046 ind_levels == 0 ? 0 : ind_levels - 1, insn);
5048 /* If tem was changed, then we must create a new memory reference to
5049 hold it and store it back into memrefloc. */
5050 if (tem != ad && memrefloc)
5052 *memrefloc = copy_rtx (*memrefloc);
5053 copy_replacements (tem, XEXP (*memrefloc, 0));
5054 loc = &XEXP (*memrefloc, 0);
5056 loc = &XEXP (*loc, 0);
5059 /* Check similar cases as for indirect addresses as above except
5060 that we can allow pseudos and a MEM since they should have been
5061 taken care of above. */
5064 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
5065 || MEM_P (XEXP (tem, 0))
5066 || ! (REG_P (XEXP (tem, 0))
5067 || (GET_CODE (XEXP (tem, 0)) == PLUS
5068 && REG_P (XEXP (XEXP (tem, 0), 0))
5069 && CONST_INT_P (XEXP (XEXP (tem, 0), 1)))))
5071 /* Must use TEM here, not AD, since it is the one that will
5072 have any subexpressions reloaded, if needed. */
5073 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
5074 base_reg_class (mode, MEM, SCRATCH), GET_MODE (tem),
5077 return ! removed_and;
5083 /* If we have address of a stack slot but it's not valid because the
5084 displacement is too large, compute the sum in a register.
5085 Handle all base registers here, not just fp/ap/sp, because on some
5086 targets (namely SH) we can also get too large displacements from
5087 big-endian corrections. */
5088 else if (GET_CODE (ad) == PLUS
5089 && REG_P (XEXP (ad, 0))
5090 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
5091 && CONST_INT_P (XEXP (ad, 1))
5092 && regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode, PLUS,
5096 /* Unshare the MEM rtx so we can safely alter it. */
5099 *memrefloc = copy_rtx (*memrefloc);
5100 loc = &XEXP (*memrefloc, 0);
5102 loc = &XEXP (*loc, 0);
5105 if (double_reg_address_ok)
5107 /* Unshare the sum as well. */
5108 *loc = ad = copy_rtx (ad);
5110 /* Reload the displacement into an index reg.
5111 We assume the frame pointer or arg pointer is a base reg. */
5112 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
5113 INDEX_REG_CLASS, GET_MODE (ad), opnum,
5119 /* If the sum of two regs is not necessarily valid,
5120 reload the sum into a base reg.
5121 That will at least work. */
5122 find_reloads_address_part (ad, loc,
5123 base_reg_class (mode, MEM, SCRATCH),
5124 GET_MODE (ad), opnum, type, ind_levels);
5126 return ! removed_and;
5129 /* If we have an indexed stack slot, there are three possible reasons why
5130 it might be invalid: The index might need to be reloaded, the address
5131 might have been made by frame pointer elimination and hence have a
5132 constant out of range, or both reasons might apply.
5134 We can easily check for an index needing reload, but even if that is the
5135 case, we might also have an invalid constant. To avoid making the
5136 conservative assumption and requiring two reloads, we see if this address
5137 is valid when not interpreted strictly. If it is, the only problem is
5138 that the index needs a reload and find_reloads_address_1 will take care
5141 Handle all base registers here, not just fp/ap/sp, because on some
5142 targets (namely SPARC) we can also get invalid addresses from preventive
5143 subreg big-endian corrections made by find_reloads_toplev. We
5144 can also get expressions involving LO_SUM (rather than PLUS) from
5145 find_reloads_subreg_address.
5147 If we decide to do something, it must be that `double_reg_address_ok'
5148 is true. We generate a reload of the base register + constant and
5149 rework the sum so that the reload register will be added to the index.
5150 This is safe because we know the address isn't shared.
5152 We check for the base register as both the first and second operand of
5153 the innermost PLUS and/or LO_SUM. */
5155 for (op_index = 0; op_index < 2; ++op_index)
5157 rtx operand, addend;
5158 enum rtx_code inner_code;
5160 if (GET_CODE (ad) != PLUS)
5163 inner_code = GET_CODE (XEXP (ad, 0));
5164 if (!(GET_CODE (ad) == PLUS
5165 && CONST_INT_P (XEXP (ad, 1))
5166 && (inner_code == PLUS || inner_code == LO_SUM)))
5169 operand = XEXP (XEXP (ad, 0), op_index);
5170 if (!REG_P (operand) || REGNO (operand) >= FIRST_PSEUDO_REGISTER)
5173 addend = XEXP (XEXP (ad, 0), 1 - op_index);
5175 if ((regno_ok_for_base_p (REGNO (operand), mode, inner_code,
5177 || operand == frame_pointer_rtx
5178 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
5179 || operand == hard_frame_pointer_rtx
5181 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5182 || operand == arg_pointer_rtx
5184 || operand == stack_pointer_rtx)
5185 && ! maybe_memory_address_addr_space_p
5186 (mode, ad, as, &XEXP (XEXP (ad, 0), 1 - op_index)))
5191 offset_reg = plus_constant (operand, INTVAL (XEXP (ad, 1)));
5193 /* Form the adjusted address. */
5194 if (GET_CODE (XEXP (ad, 0)) == PLUS)
5195 ad = gen_rtx_PLUS (GET_MODE (ad),
5196 op_index == 0 ? offset_reg : addend,
5197 op_index == 0 ? addend : offset_reg);
5199 ad = gen_rtx_LO_SUM (GET_MODE (ad),
5200 op_index == 0 ? offset_reg : addend,
5201 op_index == 0 ? addend : offset_reg);
5204 cls = base_reg_class (mode, MEM, GET_CODE (addend));
5205 find_reloads_address_part (XEXP (ad, op_index),
5206 &XEXP (ad, op_index), cls,
5207 GET_MODE (ad), opnum, type, ind_levels);
5208 find_reloads_address_1 (mode,
5209 XEXP (ad, 1 - op_index), 1, GET_CODE (ad),
5210 GET_CODE (XEXP (ad, op_index)),
5211 &XEXP (ad, 1 - op_index), opnum,
5218 /* See if address becomes valid when an eliminable register
5219 in a sum is replaced. */
5222 if (GET_CODE (ad) == PLUS)
5223 tem = subst_indexed_address (ad);
5224 if (tem != ad && strict_memory_address_addr_space_p (mode, tem, as))
5226 /* Ok, we win that way. Replace any additional eliminable
5229 subst_reg_equivs_changed = 0;
5230 tem = subst_reg_equivs (tem, insn);
5232 /* Make sure that didn't make the address invalid again. */
5234 if (! subst_reg_equivs_changed
5235 || strict_memory_address_addr_space_p (mode, tem, as))
5242 /* If constants aren't valid addresses, reload the constant address
5244 if (CONSTANT_P (ad) && ! strict_memory_address_addr_space_p (mode, ad, as))
5246 enum machine_mode address_mode = GET_MODE (ad);
5247 if (address_mode == VOIDmode)
5248 address_mode = targetm.addr_space.address_mode (as);
5250 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5251 Unshare it so we can safely alter it. */
5252 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
5253 && CONSTANT_POOL_ADDRESS_P (ad))
5255 *memrefloc = copy_rtx (*memrefloc);
5256 loc = &XEXP (*memrefloc, 0);
5258 loc = &XEXP (*loc, 0);
5261 find_reloads_address_part (ad, loc, base_reg_class (mode, MEM, SCRATCH),
5262 address_mode, opnum, type, ind_levels);
5263 return ! removed_and;
5266 return find_reloads_address_1 (mode, ad, 0, MEM, SCRATCH, loc, opnum, type,
5270 /* Find all pseudo regs appearing in AD
5271 that are eliminable in favor of equivalent values
5272 and do not have hard regs; replace them by their equivalents.
5273 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5274 front of it for pseudos that we have to replace with stack slots. */
5277 subst_reg_equivs (rtx ad, rtx insn)
5279 RTX_CODE code = GET_CODE (ad);
5299 int regno = REGNO (ad);
5301 if (reg_equiv_constant[regno] != 0)
5303 subst_reg_equivs_changed = 1;
5304 return reg_equiv_constant[regno];
5306 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5308 rtx mem = make_memloc (ad, regno);
5309 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5311 subst_reg_equivs_changed = 1;
5312 /* We mark the USE with QImode so that we recognize it
5313 as one that can be safely deleted at the end of
5315 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5324 /* Quickly dispose of a common case. */
5325 if (XEXP (ad, 0) == frame_pointer_rtx
5326 && CONST_INT_P (XEXP (ad, 1)))
5334 fmt = GET_RTX_FORMAT (code);
5335 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5337 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5341 /* Compute the sum of X and Y, making canonicalizations assumed in an
5342 address, namely: sum constant integers, surround the sum of two
5343 constants with a CONST, put the constant as the second operand, and
5344 group the constant on the outermost sum.
5346 This routine assumes both inputs are already in canonical form. */
5349 form_sum (enum machine_mode mode, rtx x, rtx y)
5353 gcc_assert (GET_MODE (x) == mode || GET_MODE (x) == VOIDmode);
5354 gcc_assert (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode);
5356 if (CONST_INT_P (x))
5357 return plus_constant (y, INTVAL (x));
5358 else if (CONST_INT_P (y))
5359 return plus_constant (x, INTVAL (y));
5360 else if (CONSTANT_P (x))
5361 tem = x, x = y, y = tem;
5363 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5364 return form_sum (mode, XEXP (x, 0), form_sum (mode, XEXP (x, 1), y));
5366 /* Note that if the operands of Y are specified in the opposite
5367 order in the recursive calls below, infinite recursion will occur. */
5368 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5369 return form_sum (mode, form_sum (mode, x, XEXP (y, 0)), XEXP (y, 1));
5371 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5372 constant will have been placed second. */
5373 if (CONSTANT_P (x) && CONSTANT_P (y))
5375 if (GET_CODE (x) == CONST)
5377 if (GET_CODE (y) == CONST)
5380 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5383 return gen_rtx_PLUS (mode, x, y);
5386 /* If ADDR is a sum containing a pseudo register that should be
5387 replaced with a constant (from reg_equiv_constant),
5388 return the result of doing so, and also apply the associative
5389 law so that the result is more likely to be a valid address.
5390 (But it is not guaranteed to be one.)
5392 Note that at most one register is replaced, even if more are
5393 replaceable. Also, we try to put the result into a canonical form
5394 so it is more likely to be a valid address.
5396 In all other cases, return ADDR. */
5399 subst_indexed_address (rtx addr)
5401 rtx op0 = 0, op1 = 0, op2 = 0;
5405 if (GET_CODE (addr) == PLUS)
5407 /* Try to find a register to replace. */
5408 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5410 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5411 && reg_renumber[regno] < 0
5412 && reg_equiv_constant[regno] != 0)
5413 op0 = reg_equiv_constant[regno];
5414 else if (REG_P (op1)
5415 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5416 && reg_renumber[regno] < 0
5417 && reg_equiv_constant[regno] != 0)
5418 op1 = reg_equiv_constant[regno];
5419 else if (GET_CODE (op0) == PLUS
5420 && (tem = subst_indexed_address (op0)) != op0)
5422 else if (GET_CODE (op1) == PLUS
5423 && (tem = subst_indexed_address (op1)) != op1)
5428 /* Pick out up to three things to add. */
5429 if (GET_CODE (op1) == PLUS)
5430 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5431 else if (GET_CODE (op0) == PLUS)
5432 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5434 /* Compute the sum. */
5436 op1 = form_sum (GET_MODE (addr), op1, op2);
5438 op0 = form_sum (GET_MODE (addr), op0, op1);
5445 /* Update the REG_INC notes for an insn. It updates all REG_INC
5446 notes for the instruction which refer to REGNO the to refer
5447 to the reload number.
5449 INSN is the insn for which any REG_INC notes need updating.
5451 REGNO is the register number which has been reloaded.
5453 RELOADNUM is the reload number. */
5456 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5457 int reloadnum ATTRIBUTE_UNUSED)
5462 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5463 if (REG_NOTE_KIND (link) == REG_INC
5464 && (int) REGNO (XEXP (link, 0)) == regno)
5465 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5469 /* Record the pseudo registers we must reload into hard registers in a
5470 subexpression of a would-be memory address, X referring to a value
5471 in mode MODE. (This function is not called if the address we find
5474 CONTEXT = 1 means we are considering regs as index regs,
5475 = 0 means we are considering them as base regs.
5476 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5478 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5479 is the code of the index part of the address. Otherwise, pass SCRATCH
5481 OPNUM and TYPE specify the purpose of any reloads made.
5483 IND_LEVELS says how many levels of indirect addressing are
5484 supported at this point in the address.
5486 INSN, if nonzero, is the insn in which we do the reload. It is used
5487 to determine if we may generate output reloads.
5489 We return nonzero if X, as a whole, is reloaded or replaced. */
5491 /* Note that we take shortcuts assuming that no multi-reg machine mode
5492 occurs as part of an address.
5493 Also, this is not fully machine-customizable; it works for machines
5494 such as VAXen and 68000's and 32000's, but other possible machines
5495 could have addressing modes that this does not handle right.
5496 If you add push_reload calls here, you need to make sure gen_reload
5497 handles those cases gracefully. */
5500 find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
5501 enum rtx_code outer_code, enum rtx_code index_code,
5502 rtx *loc, int opnum, enum reload_type type,
5503 int ind_levels, rtx insn)
5505 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, OUTER, INDEX) \
5507 ? regno_ok_for_base_p (REGNO, MODE, OUTER, INDEX) \
5508 : REGNO_OK_FOR_INDEX_P (REGNO))
5510 enum reg_class context_reg_class;
5511 RTX_CODE code = GET_CODE (x);
5514 context_reg_class = INDEX_REG_CLASS;
5516 context_reg_class = base_reg_class (mode, outer_code, index_code);
5522 rtx orig_op0 = XEXP (x, 0);
5523 rtx orig_op1 = XEXP (x, 1);
5524 RTX_CODE code0 = GET_CODE (orig_op0);
5525 RTX_CODE code1 = GET_CODE (orig_op1);
5529 if (GET_CODE (op0) == SUBREG)
5531 op0 = SUBREG_REG (op0);
5532 code0 = GET_CODE (op0);
5533 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5534 op0 = gen_rtx_REG (word_mode,
5536 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5537 GET_MODE (SUBREG_REG (orig_op0)),
5538 SUBREG_BYTE (orig_op0),
5539 GET_MODE (orig_op0))));
5542 if (GET_CODE (op1) == SUBREG)
5544 op1 = SUBREG_REG (op1);
5545 code1 = GET_CODE (op1);
5546 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5547 /* ??? Why is this given op1's mode and above for
5548 ??? op0 SUBREGs we use word_mode? */
5549 op1 = gen_rtx_REG (GET_MODE (op1),
5551 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5552 GET_MODE (SUBREG_REG (orig_op1)),
5553 SUBREG_BYTE (orig_op1),
5554 GET_MODE (orig_op1))));
5556 /* Plus in the index register may be created only as a result of
5557 register rematerialization for expression like &localvar*4. Reload it.
5558 It may be possible to combine the displacement on the outer level,
5559 but it is probably not worthwhile to do so. */
5562 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5563 opnum, ADDR_TYPE (type), ind_levels, insn);
5564 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5566 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5570 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5571 || code0 == ZERO_EXTEND || code1 == MEM)
5573 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5574 &XEXP (x, 0), opnum, type, ind_levels,
5576 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5577 &XEXP (x, 1), opnum, type, ind_levels,
5581 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5582 || code1 == ZERO_EXTEND || code0 == MEM)
5584 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5585 &XEXP (x, 0), opnum, type, ind_levels,
5587 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5588 &XEXP (x, 1), opnum, type, ind_levels,
5592 else if (code0 == CONST_INT || code0 == CONST
5593 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5594 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5595 &XEXP (x, 1), opnum, type, ind_levels,
5598 else if (code1 == CONST_INT || code1 == CONST
5599 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5600 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5601 &XEXP (x, 0), opnum, type, ind_levels,
5604 else if (code0 == REG && code1 == REG)
5606 if (REGNO_OK_FOR_INDEX_P (REGNO (op1))
5607 && regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5609 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0))
5610 && regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5612 else if (regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5613 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5614 &XEXP (x, 1), opnum, type, ind_levels,
5616 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1)))
5617 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5618 &XEXP (x, 0), opnum, type, ind_levels,
5620 else if (regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5621 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5622 &XEXP (x, 0), opnum, type, ind_levels,
5624 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0)))
5625 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5626 &XEXP (x, 1), opnum, type, ind_levels,
5630 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5631 &XEXP (x, 0), opnum, type, ind_levels,
5633 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5634 &XEXP (x, 1), opnum, type, ind_levels,
5639 else if (code0 == REG)
5641 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5642 &XEXP (x, 0), opnum, type, ind_levels,
5644 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5645 &XEXP (x, 1), opnum, type, ind_levels,
5649 else if (code1 == REG)
5651 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5652 &XEXP (x, 1), opnum, type, ind_levels,
5654 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5655 &XEXP (x, 0), opnum, type, ind_levels,
5665 rtx op0 = XEXP (x, 0);
5666 rtx op1 = XEXP (x, 1);
5667 enum rtx_code index_code;
5671 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5674 /* Currently, we only support {PRE,POST}_MODIFY constructs
5675 where a base register is {inc,dec}remented by the contents
5676 of another register or by a constant value. Thus, these
5677 operands must match. */
5678 gcc_assert (op0 == XEXP (op1, 0));
5680 /* Require index register (or constant). Let's just handle the
5681 register case in the meantime... If the target allows
5682 auto-modify by a constant then we could try replacing a pseudo
5683 register with its equivalent constant where applicable.
5685 We also handle the case where the register was eliminated
5686 resulting in a PLUS subexpression.
5688 If we later decide to reload the whole PRE_MODIFY or
5689 POST_MODIFY, inc_for_reload might clobber the reload register
5690 before reading the index. The index register might therefore
5691 need to live longer than a TYPE reload normally would, so be
5692 conservative and class it as RELOAD_OTHER. */
5693 if ((REG_P (XEXP (op1, 1))
5694 && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5695 || GET_CODE (XEXP (op1, 1)) == PLUS)
5696 find_reloads_address_1 (mode, XEXP (op1, 1), 1, code, SCRATCH,
5697 &XEXP (op1, 1), opnum, RELOAD_OTHER,
5700 gcc_assert (REG_P (XEXP (op1, 0)));
5702 regno = REGNO (XEXP (op1, 0));
5703 index_code = GET_CODE (XEXP (op1, 1));
5705 /* A register that is incremented cannot be constant! */
5706 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5707 || reg_equiv_constant[regno] == 0);
5709 /* Handle a register that is equivalent to a memory location
5710 which cannot be addressed directly. */
5711 if (reg_equiv_memory_loc[regno] != 0
5712 && (reg_equiv_address[regno] != 0
5713 || num_not_at_initial_offset))
5715 rtx tem = make_memloc (XEXP (x, 0), regno);
5717 if (reg_equiv_address[regno]
5718 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5722 /* First reload the memory location's address.
5723 We can't use ADDR_TYPE (type) here, because we need to
5724 write back the value after reading it, hence we actually
5725 need two registers. */
5726 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5727 &XEXP (tem, 0), opnum,
5731 if (!rtx_equal_p (tem, orig))
5732 push_reg_equiv_alt_mem (regno, tem);
5734 /* Then reload the memory location into a base
5736 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5738 base_reg_class (mode, code,
5740 GET_MODE (x), GET_MODE (x), 0,
5741 0, opnum, RELOAD_OTHER);
5743 update_auto_inc_notes (this_insn, regno, reloadnum);
5748 if (reg_renumber[regno] >= 0)
5749 regno = reg_renumber[regno];
5751 /* We require a base register here... */
5752 if (!regno_ok_for_base_p (regno, GET_MODE (x), code, index_code))
5754 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5755 &XEXP (op1, 0), &XEXP (x, 0),
5756 base_reg_class (mode, code, index_code),
5757 GET_MODE (x), GET_MODE (x), 0, 0,
5758 opnum, RELOAD_OTHER);
5760 update_auto_inc_notes (this_insn, regno, reloadnum);
5770 if (REG_P (XEXP (x, 0)))
5772 int regno = REGNO (XEXP (x, 0));
5776 /* A register that is incremented cannot be constant! */
5777 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5778 || reg_equiv_constant[regno] == 0);
5780 /* Handle a register that is equivalent to a memory location
5781 which cannot be addressed directly. */
5782 if (reg_equiv_memory_loc[regno] != 0
5783 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5785 rtx tem = make_memloc (XEXP (x, 0), regno);
5786 if (reg_equiv_address[regno]
5787 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5791 /* First reload the memory location's address.
5792 We can't use ADDR_TYPE (type) here, because we need to
5793 write back the value after reading it, hence we actually
5794 need two registers. */
5795 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5796 &XEXP (tem, 0), opnum, type,
5798 if (!rtx_equal_p (tem, orig))
5799 push_reg_equiv_alt_mem (regno, tem);
5800 /* Put this inside a new increment-expression. */
5801 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5802 /* Proceed to reload that, as if it contained a register. */
5806 /* If we have a hard register that is ok in this incdec context,
5807 don't make a reload. If the register isn't nice enough for
5808 autoincdec, we can reload it. But, if an autoincrement of a
5809 register that we here verified as playing nice, still outside
5810 isn't "valid", it must be that no autoincrement is "valid".
5811 If that is true and something made an autoincrement anyway,
5812 this must be a special context where one is allowed.
5813 (For example, a "push" instruction.)
5814 We can't improve this address, so leave it alone. */
5816 /* Otherwise, reload the autoincrement into a suitable hard reg
5817 and record how much to increment by. */
5819 if (reg_renumber[regno] >= 0)
5820 regno = reg_renumber[regno];
5821 if (regno >= FIRST_PSEUDO_REGISTER
5822 || !REG_OK_FOR_CONTEXT (context, regno, mode, code,
5827 /* If we can output the register afterwards, do so, this
5828 saves the extra update.
5829 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5830 CALL_INSN - and it does not set CC0.
5831 But don't do this if we cannot directly address the
5832 memory location, since this will make it harder to
5833 reuse address reloads, and increases register pressure.
5834 Also don't do this if we can probably update x directly. */
5835 rtx equiv = (MEM_P (XEXP (x, 0))
5837 : reg_equiv_mem[regno]);
5838 int icode = (int) optab_handler (add_optab, GET_MODE (x));
5839 if (insn && NONJUMP_INSN_P (insn) && equiv
5840 && memory_operand (equiv, GET_MODE (equiv))
5842 && ! sets_cc0_p (PATTERN (insn))
5844 && ! (icode != CODE_FOR_nothing
5845 && ((*insn_data[icode].operand[0].predicate)
5846 (equiv, GET_MODE (x)))
5847 && ((*insn_data[icode].operand[1].predicate)
5848 (equiv, GET_MODE (x)))))
5850 /* We use the original pseudo for loc, so that
5851 emit_reload_insns() knows which pseudo this
5852 reload refers to and updates the pseudo rtx, not
5853 its equivalent memory location, as well as the
5854 corresponding entry in reg_last_reload_reg. */
5855 loc = &XEXP (x_orig, 0);
5858 = push_reload (x, x, loc, loc,
5860 GET_MODE (x), GET_MODE (x), 0, 0,
5861 opnum, RELOAD_OTHER);
5866 = push_reload (x, x, loc, (rtx*) 0,
5868 GET_MODE (x), GET_MODE (x), 0, 0,
5871 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5876 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5886 /* Look for parts to reload in the inner expression and reload them
5887 too, in addition to this operation. Reloading all inner parts in
5888 addition to this one shouldn't be necessary, but at this point,
5889 we don't know if we can possibly omit any part that *can* be
5890 reloaded. Targets that are better off reloading just either part
5891 (or perhaps even a different part of an outer expression), should
5892 define LEGITIMIZE_RELOAD_ADDRESS. */
5893 find_reloads_address_1 (GET_MODE (XEXP (x, 0)), XEXP (x, 0),
5894 context, code, SCRATCH, &XEXP (x, 0), opnum,
5895 type, ind_levels, insn);
5896 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5898 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5902 /* This is probably the result of a substitution, by eliminate_regs, of
5903 an equivalent address for a pseudo that was not allocated to a hard
5904 register. Verify that the specified address is valid and reload it
5907 Since we know we are going to reload this item, don't decrement for
5908 the indirection level.
5910 Note that this is actually conservative: it would be slightly more
5911 efficient to use the value of SPILL_INDIRECT_LEVELS from
5914 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5915 opnum, ADDR_TYPE (type), ind_levels, insn);
5916 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5918 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5923 int regno = REGNO (x);
5925 if (reg_equiv_constant[regno] != 0)
5927 find_reloads_address_part (reg_equiv_constant[regno], loc,
5929 GET_MODE (x), opnum, type, ind_levels);
5933 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5934 that feeds this insn. */
5935 if (reg_equiv_mem[regno] != 0)
5937 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5939 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5944 if (reg_equiv_memory_loc[regno]
5945 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5947 rtx tem = make_memloc (x, regno);
5948 if (reg_equiv_address[regno] != 0
5949 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5952 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5953 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5955 if (!rtx_equal_p (x, tem))
5956 push_reg_equiv_alt_mem (regno, x);
5960 if (reg_renumber[regno] >= 0)
5961 regno = reg_renumber[regno];
5963 if (regno >= FIRST_PSEUDO_REGISTER
5964 || !REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5967 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5969 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5973 /* If a register appearing in an address is the subject of a CLOBBER
5974 in this insn, reload it into some other register to be safe.
5975 The CLOBBER is supposed to make the register unavailable
5976 from before this insn to after it. */
5977 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5979 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5981 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5988 if (REG_P (SUBREG_REG (x)))
5990 /* If this is a SUBREG of a hard register and the resulting register
5991 is of the wrong class, reload the whole SUBREG. This avoids
5992 needless copies if SUBREG_REG is multi-word. */
5993 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5995 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5997 if (!REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
6000 push_reload (x, NULL_RTX, loc, (rtx*) 0,
6002 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
6006 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
6007 is larger than the class size, then reload the whole SUBREG. */
6010 enum reg_class rclass = context_reg_class;
6011 if ((unsigned) CLASS_MAX_NREGS (rclass, GET_MODE (SUBREG_REG (x)))
6012 > reg_class_size[rclass])
6014 x = find_reloads_subreg_address (x, 0, opnum,
6017 push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass,
6018 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
6030 const char *fmt = GET_RTX_FORMAT (code);
6033 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6036 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
6038 find_reloads_address_1 (mode, XEXP (x, i), context, code, SCRATCH,
6039 &XEXP (x, i), opnum, type, ind_levels, insn);
6043 #undef REG_OK_FOR_CONTEXT
6047 /* X, which is found at *LOC, is a part of an address that needs to be
6048 reloaded into a register of class RCLASS. If X is a constant, or if
6049 X is a PLUS that contains a constant, check that the constant is a
6050 legitimate operand and that we are supposed to be able to load
6051 it into the register.
6053 If not, force the constant into memory and reload the MEM instead.
6055 MODE is the mode to use, in case X is an integer constant.
6057 OPNUM and TYPE describe the purpose of any reloads made.
6059 IND_LEVELS says how many levels of indirect addressing this machine
6063 find_reloads_address_part (rtx x, rtx *loc, enum reg_class rclass,
6064 enum machine_mode mode, int opnum,
6065 enum reload_type type, int ind_levels)
6068 && (! LEGITIMATE_CONSTANT_P (x)
6069 || PREFERRED_RELOAD_CLASS (x, rclass) == NO_REGS))
6071 x = force_const_mem (mode, x);
6072 find_reloads_address (mode, &x, XEXP (x, 0), &XEXP (x, 0),
6073 opnum, type, ind_levels, 0);
6076 else if (GET_CODE (x) == PLUS
6077 && CONSTANT_P (XEXP (x, 1))
6078 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
6079 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), rclass) == NO_REGS))
6083 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
6084 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
6085 find_reloads_address (mode, &XEXP (x, 1), XEXP (tem, 0), &XEXP (tem, 0),
6086 opnum, type, ind_levels, 0);
6089 push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass,
6090 mode, VOIDmode, 0, 0, opnum, type);
6093 /* X, a subreg of a pseudo, is a part of an address that needs to be
6096 If the pseudo is equivalent to a memory location that cannot be directly
6097 addressed, make the necessary address reloads.
6099 If address reloads have been necessary, or if the address is changed
6100 by register elimination, return the rtx of the memory location;
6101 otherwise, return X.
6103 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
6106 OPNUM and TYPE identify the purpose of the reload.
6108 IND_LEVELS says how many levels of indirect addressing are
6109 supported at this point in the address.
6111 INSN, if nonzero, is the insn in which we do the reload. It is used
6112 to determine where to put USEs for pseudos that we have to replace with
6116 find_reloads_subreg_address (rtx x, int force_replace, int opnum,
6117 enum reload_type type, int ind_levels, rtx insn)
6119 int regno = REGNO (SUBREG_REG (x));
6121 if (reg_equiv_memory_loc[regno])
6123 /* If the address is not directly addressable, or if the address is not
6124 offsettable, then it must be replaced. */
6126 && (reg_equiv_address[regno]
6127 || ! offsettable_memref_p (reg_equiv_mem[regno])))
6130 if (force_replace || num_not_at_initial_offset)
6132 rtx tem = make_memloc (SUBREG_REG (x), regno);
6134 /* If the address changes because of register elimination, then
6135 it must be replaced. */
6137 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
6139 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
6140 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
6145 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
6146 hold the correct (negative) byte offset. */
6147 if (BYTES_BIG_ENDIAN && outer_size > inner_size)
6148 offset = inner_size - outer_size;
6150 offset = SUBREG_BYTE (x);
6152 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
6153 PUT_MODE (tem, GET_MODE (x));
6154 if (MEM_OFFSET (tem))
6155 set_mem_offset (tem, plus_constant (MEM_OFFSET (tem), offset));
6157 && INTVAL (MEM_SIZE (tem)) != (HOST_WIDE_INT) outer_size)
6158 set_mem_size (tem, GEN_INT (outer_size));
6160 /* If this was a paradoxical subreg that we replaced, the
6161 resulting memory must be sufficiently aligned to allow
6162 us to widen the mode of the memory. */
6163 if (outer_size > inner_size)
6167 base = XEXP (tem, 0);
6168 if (GET_CODE (base) == PLUS)
6170 if (CONST_INT_P (XEXP (base, 1))
6171 && INTVAL (XEXP (base, 1)) % outer_size != 0)
6173 base = XEXP (base, 0);
6176 || (REGNO_POINTER_ALIGN (REGNO (base))
6177 < outer_size * BITS_PER_UNIT))
6181 reloaded = find_reloads_address (GET_MODE (tem), &tem,
6182 XEXP (tem, 0), &XEXP (tem, 0),
6183 opnum, type, ind_levels, insn);
6184 /* ??? Do we need to handle nonzero offsets somehow? */
6185 if (!offset && !rtx_equal_p (tem, orig))
6186 push_reg_equiv_alt_mem (regno, tem);
6188 /* For some processors an address may be valid in the
6189 original mode but not in a smaller mode. For
6190 example, ARM accepts a scaled index register in
6191 SImode but not in HImode. Note that this is only
6192 a problem if the address in reg_equiv_mem is already
6193 invalid in the new mode; other cases would be fixed
6194 by find_reloads_address as usual.
6196 ??? We attempt to handle such cases here by doing an
6197 additional reload of the full address after the
6198 usual processing by find_reloads_address. Note that
6199 this may not work in the general case, but it seems
6200 to cover the cases where this situation currently
6201 occurs. A more general fix might be to reload the
6202 *value* instead of the address, but this would not
6203 be expected by the callers of this routine as-is.
6205 If find_reloads_address already completed replaced
6206 the address, there is nothing further to do. */
6208 && reg_equiv_mem[regno] != 0
6209 && !strict_memory_address_addr_space_p
6210 (GET_MODE (x), XEXP (reg_equiv_mem[regno], 0),
6211 MEM_ADDR_SPACE (reg_equiv_mem[regno])))
6212 push_reload (XEXP (tem, 0), NULL_RTX, &XEXP (tem, 0), (rtx*) 0,
6213 base_reg_class (GET_MODE (tem), MEM, SCRATCH),
6214 GET_MODE (XEXP (tem, 0)), VOIDmode, 0, 0,
6217 /* If this is not a toplevel operand, find_reloads doesn't see
6218 this substitution. We have to emit a USE of the pseudo so
6219 that delete_output_reload can see it. */
6220 if (replace_reloads && recog_data.operand[opnum] != x)
6221 /* We mark the USE with QImode so that we recognize it
6222 as one that can be safely deleted at the end of
6224 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
6234 /* Substitute into the current INSN the registers into which we have reloaded
6235 the things that need reloading. The array `replacements'
6236 contains the locations of all pointers that must be changed
6237 and says what to replace them with.
6239 Return the rtx that X translates into; usually X, but modified. */
6242 subst_reloads (rtx insn)
6246 for (i = 0; i < n_replacements; i++)
6248 struct replacement *r = &replacements[i];
6249 rtx reloadreg = rld[r->what].reg_rtx;
6253 /* This checking takes a very long time on some platforms
6254 causing the gcc.c-torture/compile/limits-fnargs.c test
6255 to time out during testing. See PR 31850.
6257 Internal consistency test. Check that we don't modify
6258 anything in the equivalence arrays. Whenever something from
6259 those arrays needs to be reloaded, it must be unshared before
6260 being substituted into; the equivalence must not be modified.
6261 Otherwise, if the equivalence is used after that, it will
6262 have been modified, and the thing substituted (probably a
6263 register) is likely overwritten and not a usable equivalence. */
6266 for (check_regno = 0; check_regno < max_regno; check_regno++)
6268 #define CHECK_MODF(ARRAY) \
6269 gcc_assert (!ARRAY[check_regno] \
6270 || !loc_mentioned_in_p (r->where, \
6271 ARRAY[check_regno]))
6273 CHECK_MODF (reg_equiv_constant);
6274 CHECK_MODF (reg_equiv_memory_loc);
6275 CHECK_MODF (reg_equiv_address);
6276 CHECK_MODF (reg_equiv_mem);
6279 #endif /* DEBUG_RELOAD */
6281 /* If we're replacing a LABEL_REF with a register, there must
6282 already be an indication (to e.g. flow) which label this
6283 register refers to. */
6284 gcc_assert (GET_CODE (*r->where) != LABEL_REF
6286 || find_reg_note (insn,
6288 XEXP (*r->where, 0))
6289 || label_is_jump_target_p (XEXP (*r->where, 0), insn));
6291 /* Encapsulate RELOADREG so its machine mode matches what
6292 used to be there. Note that gen_lowpart_common will
6293 do the wrong thing if RELOADREG is multi-word. RELOADREG
6294 will always be a REG here. */
6295 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
6296 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6298 /* If we are putting this into a SUBREG and RELOADREG is a
6299 SUBREG, we would be making nested SUBREGs, so we have to fix
6300 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
6302 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
6304 if (GET_MODE (*r->subreg_loc)
6305 == GET_MODE (SUBREG_REG (reloadreg)))
6306 *r->subreg_loc = SUBREG_REG (reloadreg);
6310 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
6312 /* When working with SUBREGs the rule is that the byte
6313 offset must be a multiple of the SUBREG's mode. */
6314 final_offset = (final_offset /
6315 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6316 final_offset = (final_offset *
6317 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6319 *r->where = SUBREG_REG (reloadreg);
6320 SUBREG_BYTE (*r->subreg_loc) = final_offset;
6324 *r->where = reloadreg;
6326 /* If reload got no reg and isn't optional, something's wrong. */
6328 gcc_assert (rld[r->what].optional);
6332 /* Make a copy of any replacements being done into X and move those
6333 copies to locations in Y, a copy of X. */
6336 copy_replacements (rtx x, rtx y)
6338 /* We can't support X being a SUBREG because we might then need to know its
6339 location if something inside it was replaced. */
6340 gcc_assert (GET_CODE (x) != SUBREG);
6342 copy_replacements_1 (&x, &y, n_replacements);
6346 copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6350 struct replacement *r;
6354 for (j = 0; j < orig_replacements; j++)
6356 if (replacements[j].subreg_loc == px)
6358 r = &replacements[n_replacements++];
6359 r->where = replacements[j].where;
6361 r->what = replacements[j].what;
6362 r->mode = replacements[j].mode;
6364 else if (replacements[j].where == px)
6366 r = &replacements[n_replacements++];
6369 r->what = replacements[j].what;
6370 r->mode = replacements[j].mode;
6376 code = GET_CODE (x);
6377 fmt = GET_RTX_FORMAT (code);
6379 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6382 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6383 else if (fmt[i] == 'E')
6384 for (j = XVECLEN (x, i); --j >= 0; )
6385 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6390 /* Change any replacements being done to *X to be done to *Y. */
6393 move_replacements (rtx *x, rtx *y)
6397 for (i = 0; i < n_replacements; i++)
6398 if (replacements[i].subreg_loc == x)
6399 replacements[i].subreg_loc = y;
6400 else if (replacements[i].where == x)
6402 replacements[i].where = y;
6403 replacements[i].subreg_loc = 0;
6407 /* If LOC was scheduled to be replaced by something, return the replacement.
6408 Otherwise, return *LOC. */
6411 find_replacement (rtx *loc)
6413 struct replacement *r;
6415 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6417 rtx reloadreg = rld[r->what].reg_rtx;
6419 if (reloadreg && r->where == loc)
6421 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6422 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6426 else if (reloadreg && r->subreg_loc == loc)
6428 /* RELOADREG must be either a REG or a SUBREG.
6430 ??? Is it actually still ever a SUBREG? If so, why? */
6432 if (REG_P (reloadreg))
6433 return gen_rtx_REG (GET_MODE (*loc),
6434 (REGNO (reloadreg) +
6435 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6436 GET_MODE (SUBREG_REG (*loc)),
6439 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6443 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6445 /* When working with SUBREGs the rule is that the byte
6446 offset must be a multiple of the SUBREG's mode. */
6447 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6448 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6449 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6455 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6456 what's inside and make a new rtl if so. */
6457 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6458 || GET_CODE (*loc) == MULT)
6460 rtx x = find_replacement (&XEXP (*loc, 0));
6461 rtx y = find_replacement (&XEXP (*loc, 1));
6463 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6464 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6470 /* Return nonzero if register in range [REGNO, ENDREGNO)
6471 appears either explicitly or implicitly in X
6472 other than being stored into (except for earlyclobber operands).
6474 References contained within the substructure at LOC do not count.
6475 LOC may be zero, meaning don't ignore anything.
6477 This is similar to refers_to_regno_p in rtlanal.c except that we
6478 look at equivalences for pseudos that didn't get hard registers. */
6481 refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6493 code = GET_CODE (x);
6500 /* If this is a pseudo, a hard register must not have been allocated.
6501 X must therefore either be a constant or be in memory. */
6502 if (r >= FIRST_PSEUDO_REGISTER)
6504 if (reg_equiv_memory_loc[r])
6505 return refers_to_regno_for_reload_p (regno, endregno,
6506 reg_equiv_memory_loc[r],
6509 gcc_assert (reg_equiv_constant[r] || reg_equiv_invariant[r]);
6513 return (endregno > r
6514 && regno < r + (r < FIRST_PSEUDO_REGISTER
6515 ? hard_regno_nregs[r][GET_MODE (x)]
6519 /* If this is a SUBREG of a hard reg, we can see exactly which
6520 registers are being modified. Otherwise, handle normally. */
6521 if (REG_P (SUBREG_REG (x))
6522 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6524 unsigned int inner_regno = subreg_regno (x);
6525 unsigned int inner_endregno
6526 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6527 ? subreg_nregs (x) : 1);
6529 return endregno > inner_regno && regno < inner_endregno;
6535 if (&SET_DEST (x) != loc
6536 /* Note setting a SUBREG counts as referring to the REG it is in for
6537 a pseudo but not for hard registers since we can
6538 treat each word individually. */
6539 && ((GET_CODE (SET_DEST (x)) == SUBREG
6540 && loc != &SUBREG_REG (SET_DEST (x))
6541 && REG_P (SUBREG_REG (SET_DEST (x)))
6542 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6543 && refers_to_regno_for_reload_p (regno, endregno,
6544 SUBREG_REG (SET_DEST (x)),
6546 /* If the output is an earlyclobber operand, this is
6548 || ((!REG_P (SET_DEST (x))
6549 || earlyclobber_operand_p (SET_DEST (x)))
6550 && refers_to_regno_for_reload_p (regno, endregno,
6551 SET_DEST (x), loc))))
6554 if (code == CLOBBER || loc == &SET_SRC (x))
6563 /* X does not match, so try its subexpressions. */
6565 fmt = GET_RTX_FORMAT (code);
6566 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6568 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6576 if (refers_to_regno_for_reload_p (regno, endregno,
6580 else if (fmt[i] == 'E')
6583 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6584 if (loc != &XVECEXP (x, i, j)
6585 && refers_to_regno_for_reload_p (regno, endregno,
6586 XVECEXP (x, i, j), loc))
6593 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6594 we check if any register number in X conflicts with the relevant register
6595 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6596 contains a MEM (we don't bother checking for memory addresses that can't
6597 conflict because we expect this to be a rare case.
6599 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6600 that we look at equivalences for pseudos that didn't get hard registers. */
6603 reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6605 int regno, endregno;
6607 /* Overly conservative. */
6608 if (GET_CODE (x) == STRICT_LOW_PART
6609 || GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
6612 /* If either argument is a constant, then modifying X can not affect IN. */
6613 if (CONSTANT_P (x) || CONSTANT_P (in))
6615 else if (GET_CODE (x) == SUBREG && MEM_P (SUBREG_REG (x)))
6616 return refers_to_mem_for_reload_p (in);
6617 else if (GET_CODE (x) == SUBREG)
6619 regno = REGNO (SUBREG_REG (x));
6620 if (regno < FIRST_PSEUDO_REGISTER)
6621 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6622 GET_MODE (SUBREG_REG (x)),
6625 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6626 ? subreg_nregs (x) : 1);
6628 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6634 /* If this is a pseudo, it must not have been assigned a hard register.
6635 Therefore, it must either be in memory or be a constant. */
6637 if (regno >= FIRST_PSEUDO_REGISTER)
6639 if (reg_equiv_memory_loc[regno])
6640 return refers_to_mem_for_reload_p (in);
6641 gcc_assert (reg_equiv_constant[regno]);
6645 endregno = END_HARD_REGNO (x);
6647 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6650 return refers_to_mem_for_reload_p (in);
6651 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6652 || GET_CODE (x) == CC0)
6653 return reg_mentioned_p (x, in);
6656 gcc_assert (GET_CODE (x) == PLUS);
6658 /* We actually want to know if X is mentioned somewhere inside IN.
6659 We must not say that (plus (sp) (const_int 124)) is in
6660 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6661 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6662 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6667 else if (GET_CODE (in) == PLUS)
6668 return (rtx_equal_p (x, in)
6669 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6670 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6671 else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6672 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6678 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6682 refers_to_mem_for_reload_p (rtx x)
6691 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6692 && reg_equiv_memory_loc[REGNO (x)]);
6694 fmt = GET_RTX_FORMAT (GET_CODE (x));
6695 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6697 && (MEM_P (XEXP (x, i))
6698 || refers_to_mem_for_reload_p (XEXP (x, i))))
6704 /* Check the insns before INSN to see if there is a suitable register
6705 containing the same value as GOAL.
6706 If OTHER is -1, look for a register in class RCLASS.
6707 Otherwise, just see if register number OTHER shares GOAL's value.
6709 Return an rtx for the register found, or zero if none is found.
6711 If RELOAD_REG_P is (short *)1,
6712 we reject any hard reg that appears in reload_reg_rtx
6713 because such a hard reg is also needed coming into this insn.
6715 If RELOAD_REG_P is any other nonzero value,
6716 it is a vector indexed by hard reg number
6717 and we reject any hard reg whose element in the vector is nonnegative
6718 as well as any that appears in reload_reg_rtx.
6720 If GOAL is zero, then GOALREG is a register number; we look
6721 for an equivalent for that register.
6723 MODE is the machine mode of the value we want an equivalence for.
6724 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6726 This function is used by jump.c as well as in the reload pass.
6728 If GOAL is the sum of the stack pointer and a constant, we treat it
6729 as if it were a constant except that sp is required to be unchanging. */
6732 find_equiv_reg (rtx goal, rtx insn, enum reg_class rclass, int other,
6733 short *reload_reg_p, int goalreg, enum machine_mode mode)
6736 rtx goaltry, valtry, value, where;
6742 int goal_mem_addr_varies = 0;
6743 int need_stable_sp = 0;
6750 else if (REG_P (goal))
6751 regno = REGNO (goal);
6752 else if (MEM_P (goal))
6754 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6755 if (MEM_VOLATILE_P (goal))
6757 if (flag_float_store && SCALAR_FLOAT_MODE_P (GET_MODE (goal)))
6759 /* An address with side effects must be reexecuted. */
6774 else if (CONSTANT_P (goal))
6776 else if (GET_CODE (goal) == PLUS
6777 && XEXP (goal, 0) == stack_pointer_rtx
6778 && CONSTANT_P (XEXP (goal, 1)))
6779 goal_const = need_stable_sp = 1;
6780 else if (GET_CODE (goal) == PLUS
6781 && XEXP (goal, 0) == frame_pointer_rtx
6782 && CONSTANT_P (XEXP (goal, 1)))
6788 /* Scan insns back from INSN, looking for one that copies
6789 a value into or out of GOAL.
6790 Stop and give up if we reach a label. */
6795 if (p && DEBUG_INSN_P (p))
6798 if (p == 0 || LABEL_P (p)
6799 || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6802 if (NONJUMP_INSN_P (p)
6803 /* If we don't want spill regs ... */
6804 && (! (reload_reg_p != 0
6805 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6806 /* ... then ignore insns introduced by reload; they aren't
6807 useful and can cause results in reload_as_needed to be
6808 different from what they were when calculating the need for
6809 spills. If we notice an input-reload insn here, we will
6810 reject it below, but it might hide a usable equivalent.
6811 That makes bad code. It may even fail: perhaps no reg was
6812 spilled for this insn because it was assumed we would find
6814 || INSN_UID (p) < reload_first_uid))
6817 pat = single_set (p);
6819 /* First check for something that sets some reg equal to GOAL. */
6822 && true_regnum (SET_SRC (pat)) == regno
6823 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6826 && true_regnum (SET_DEST (pat)) == regno
6827 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6829 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6830 /* When looking for stack pointer + const,
6831 make sure we don't use a stack adjust. */
6832 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6833 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6835 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6836 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6838 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6839 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6840 /* If we are looking for a constant,
6841 and something equivalent to that constant was copied
6842 into a reg, we can use that reg. */
6843 || (goal_const && REG_NOTES (p) != 0
6844 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6845 && ((rtx_equal_p (XEXP (tem, 0), goal)
6847 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6848 || (REG_P (SET_DEST (pat))
6849 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6850 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6851 && CONST_INT_P (goal)
6853 = operand_subword (XEXP (tem, 0), 0, 0,
6855 && rtx_equal_p (goal, goaltry)
6857 = operand_subword (SET_DEST (pat), 0, 0,
6859 && (valueno = true_regnum (valtry)) >= 0)))
6860 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6862 && REG_P (SET_DEST (pat))
6863 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6864 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6865 && CONST_INT_P (goal)
6866 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6868 && rtx_equal_p (goal, goaltry)
6870 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6871 && (valueno = true_regnum (valtry)) >= 0)))
6875 if (valueno != other)
6878 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6880 else if (!in_hard_reg_set_p (reg_class_contents[(int) rclass],
6890 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6891 (or copying VALUE into GOAL, if GOAL is also a register).
6892 Now verify that VALUE is really valid. */
6894 /* VALUENO is the register number of VALUE; a hard register. */
6896 /* Don't try to re-use something that is killed in this insn. We want
6897 to be able to trust REG_UNUSED notes. */
6898 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6901 /* If we propose to get the value from the stack pointer or if GOAL is
6902 a MEM based on the stack pointer, we need a stable SP. */
6903 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6904 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6908 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6909 if (GET_MODE (value) != mode)
6912 /* Reject VALUE if it was loaded from GOAL
6913 and is also a register that appears in the address of GOAL. */
6915 if (goal_mem && value == SET_DEST (single_set (where))
6916 && refers_to_regno_for_reload_p (valueno, end_hard_regno (mode, valueno),
6920 /* Reject registers that overlap GOAL. */
6922 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6923 nregs = hard_regno_nregs[regno][mode];
6926 valuenregs = hard_regno_nregs[valueno][mode];
6928 if (!goal_mem && !goal_const
6929 && regno + nregs > valueno && regno < valueno + valuenregs)
6932 /* Reject VALUE if it is one of the regs reserved for reloads.
6933 Reload1 knows how to reuse them anyway, and it would get
6934 confused if we allocated one without its knowledge.
6935 (Now that insns introduced by reload are ignored above,
6936 this case shouldn't happen, but I'm not positive.) */
6938 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6941 for (i = 0; i < valuenregs; ++i)
6942 if (reload_reg_p[valueno + i] >= 0)
6946 /* Reject VALUE if it is a register being used for an input reload
6947 even if it is not one of those reserved. */
6949 if (reload_reg_p != 0)
6952 for (i = 0; i < n_reloads; i++)
6953 if (rld[i].reg_rtx != 0 && rld[i].in)
6955 int regno1 = REGNO (rld[i].reg_rtx);
6956 int nregs1 = hard_regno_nregs[regno1]
6957 [GET_MODE (rld[i].reg_rtx)];
6958 if (regno1 < valueno + valuenregs
6959 && regno1 + nregs1 > valueno)
6965 /* We must treat frame pointer as varying here,
6966 since it can vary--in a nonlocal goto as generated by expand_goto. */
6967 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6969 /* Now verify that the values of GOAL and VALUE remain unaltered
6970 until INSN is reached. */
6979 /* Don't trust the conversion past a function call
6980 if either of the two is in a call-clobbered register, or memory. */
6985 if (goal_mem || need_stable_sp)
6988 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6989 for (i = 0; i < nregs; ++i)
6990 if (call_used_regs[regno + i]
6991 || HARD_REGNO_CALL_PART_CLOBBERED (regno + i, mode))
6994 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6995 for (i = 0; i < valuenregs; ++i)
6996 if (call_used_regs[valueno + i]
6997 || HARD_REGNO_CALL_PART_CLOBBERED (valueno + i, mode))
7005 /* Watch out for unspec_volatile, and volatile asms. */
7006 if (volatile_insn_p (pat))
7009 /* If this insn P stores in either GOAL or VALUE, return 0.
7010 If GOAL is a memory ref and this insn writes memory, return 0.
7011 If GOAL is a memory ref and its address is not constant,
7012 and this insn P changes a register used in GOAL, return 0. */
7014 if (GET_CODE (pat) == COND_EXEC)
7015 pat = COND_EXEC_CODE (pat);
7016 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
7018 rtx dest = SET_DEST (pat);
7019 while (GET_CODE (dest) == SUBREG
7020 || GET_CODE (dest) == ZERO_EXTRACT
7021 || GET_CODE (dest) == STRICT_LOW_PART)
7022 dest = XEXP (dest, 0);
7025 int xregno = REGNO (dest);
7027 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
7028 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
7031 if (xregno < regno + nregs && xregno + xnregs > regno)
7033 if (xregno < valueno + valuenregs
7034 && xregno + xnregs > valueno)
7036 if (goal_mem_addr_varies
7037 && reg_overlap_mentioned_for_reload_p (dest, goal))
7039 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
7042 else if (goal_mem && MEM_P (dest)
7043 && ! push_operand (dest, GET_MODE (dest)))
7045 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
7046 && reg_equiv_memory_loc[regno] != 0)
7048 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
7051 else if (GET_CODE (pat) == PARALLEL)
7054 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
7056 rtx v1 = XVECEXP (pat, 0, i);
7057 if (GET_CODE (v1) == COND_EXEC)
7058 v1 = COND_EXEC_CODE (v1);
7059 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
7061 rtx dest = SET_DEST (v1);
7062 while (GET_CODE (dest) == SUBREG
7063 || GET_CODE (dest) == ZERO_EXTRACT
7064 || GET_CODE (dest) == STRICT_LOW_PART)
7065 dest = XEXP (dest, 0);
7068 int xregno = REGNO (dest);
7070 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
7071 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
7074 if (xregno < regno + nregs
7075 && xregno + xnregs > regno)
7077 if (xregno < valueno + valuenregs
7078 && xregno + xnregs > valueno)
7080 if (goal_mem_addr_varies
7081 && reg_overlap_mentioned_for_reload_p (dest,
7084 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
7087 else if (goal_mem && MEM_P (dest)
7088 && ! push_operand (dest, GET_MODE (dest)))
7090 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
7091 && reg_equiv_memory_loc[regno] != 0)
7093 else if (need_stable_sp
7094 && push_operand (dest, GET_MODE (dest)))
7100 if (CALL_P (p) && CALL_INSN_FUNCTION_USAGE (p))
7104 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
7105 link = XEXP (link, 1))
7107 pat = XEXP (link, 0);
7108 if (GET_CODE (pat) == CLOBBER)
7110 rtx dest = SET_DEST (pat);
7114 int xregno = REGNO (dest);
7116 = hard_regno_nregs[xregno][GET_MODE (dest)];
7118 if (xregno < regno + nregs
7119 && xregno + xnregs > regno)
7121 else if (xregno < valueno + valuenregs
7122 && xregno + xnregs > valueno)
7124 else if (goal_mem_addr_varies
7125 && reg_overlap_mentioned_for_reload_p (dest,
7130 else if (goal_mem && MEM_P (dest)
7131 && ! push_operand (dest, GET_MODE (dest)))
7133 else if (need_stable_sp
7134 && push_operand (dest, GET_MODE (dest)))
7141 /* If this insn auto-increments or auto-decrements
7142 either regno or valueno, return 0 now.
7143 If GOAL is a memory ref and its address is not constant,
7144 and this insn P increments a register used in GOAL, return 0. */
7148 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
7149 if (REG_NOTE_KIND (link) == REG_INC
7150 && REG_P (XEXP (link, 0)))
7152 int incno = REGNO (XEXP (link, 0));
7153 if (incno < regno + nregs && incno >= regno)
7155 if (incno < valueno + valuenregs && incno >= valueno)
7157 if (goal_mem_addr_varies
7158 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
7168 /* Find a place where INCED appears in an increment or decrement operator
7169 within X, and return the amount INCED is incremented or decremented by.
7170 The value is always positive. */
7173 find_inc_amount (rtx x, rtx inced)
7175 enum rtx_code code = GET_CODE (x);
7181 rtx addr = XEXP (x, 0);
7182 if ((GET_CODE (addr) == PRE_DEC
7183 || GET_CODE (addr) == POST_DEC
7184 || GET_CODE (addr) == PRE_INC
7185 || GET_CODE (addr) == POST_INC)
7186 && XEXP (addr, 0) == inced)
7187 return GET_MODE_SIZE (GET_MODE (x));
7188 else if ((GET_CODE (addr) == PRE_MODIFY
7189 || GET_CODE (addr) == POST_MODIFY)
7190 && GET_CODE (XEXP (addr, 1)) == PLUS
7191 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
7192 && XEXP (addr, 0) == inced
7193 && CONST_INT_P (XEXP (XEXP (addr, 1), 1)))
7195 i = INTVAL (XEXP (XEXP (addr, 1), 1));
7196 return i < 0 ? -i : i;
7200 fmt = GET_RTX_FORMAT (code);
7201 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7205 int tem = find_inc_amount (XEXP (x, i), inced);
7212 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7214 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
7224 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7225 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7229 reg_inc_found_and_valid_p (unsigned int regno, unsigned int endregno,
7236 if (! INSN_P (insn))
7239 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
7240 if (REG_NOTE_KIND (link) == REG_INC)
7242 unsigned int test = (int) REGNO (XEXP (link, 0));
7243 if (test >= regno && test < endregno)
7250 #define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7254 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7255 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7256 REG_INC. REGNO must refer to a hard register. */
7259 regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
7262 unsigned int nregs, endregno;
7264 /* regno must be a hard register. */
7265 gcc_assert (regno < FIRST_PSEUDO_REGISTER);
7267 nregs = hard_regno_nregs[regno][mode];
7268 endregno = regno + nregs;
7270 if ((GET_CODE (PATTERN (insn)) == CLOBBER
7271 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7272 && REG_P (XEXP (PATTERN (insn), 0)))
7274 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
7276 return test >= regno && test < endregno;
7279 if (sets == 2 && reg_inc_found_and_valid_p (regno, endregno, insn))
7282 if (GET_CODE (PATTERN (insn)) == PARALLEL)
7284 int i = XVECLEN (PATTERN (insn), 0) - 1;
7288 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7289 if ((GET_CODE (elt) == CLOBBER
7290 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7291 && REG_P (XEXP (elt, 0)))
7293 unsigned int test = REGNO (XEXP (elt, 0));
7295 if (test >= regno && test < endregno)
7299 && reg_inc_found_and_valid_p (regno, endregno, elt))
7307 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7309 reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
7313 if (GET_MODE (reloadreg) == mode)
7316 regno = REGNO (reloadreg);
7318 if (WORDS_BIG_ENDIAN)
7319 regno += (int) hard_regno_nregs[regno][GET_MODE (reloadreg)]
7320 - (int) hard_regno_nregs[regno][mode];
7322 return gen_rtx_REG (mode, regno);
7325 static const char *const reload_when_needed_name[] =
7328 "RELOAD_FOR_OUTPUT",
7330 "RELOAD_FOR_INPUT_ADDRESS",
7331 "RELOAD_FOR_INPADDR_ADDRESS",
7332 "RELOAD_FOR_OUTPUT_ADDRESS",
7333 "RELOAD_FOR_OUTADDR_ADDRESS",
7334 "RELOAD_FOR_OPERAND_ADDRESS",
7335 "RELOAD_FOR_OPADDR_ADDR",
7337 "RELOAD_FOR_OTHER_ADDRESS"
7340 /* These functions are used to print the variables set by 'find_reloads' */
7343 debug_reload_to_stream (FILE *f)
7350 for (r = 0; r < n_reloads; r++)
7352 fprintf (f, "Reload %d: ", r);
7356 fprintf (f, "reload_in (%s) = ",
7357 GET_MODE_NAME (rld[r].inmode));
7358 print_inline_rtx (f, rld[r].in, 24);
7359 fprintf (f, "\n\t");
7362 if (rld[r].out != 0)
7364 fprintf (f, "reload_out (%s) = ",
7365 GET_MODE_NAME (rld[r].outmode));
7366 print_inline_rtx (f, rld[r].out, 24);
7367 fprintf (f, "\n\t");
7370 fprintf (f, "%s, ", reg_class_names[(int) rld[r].rclass]);
7372 fprintf (f, "%s (opnum = %d)",
7373 reload_when_needed_name[(int) rld[r].when_needed],
7376 if (rld[r].optional)
7377 fprintf (f, ", optional");
7379 if (rld[r].nongroup)
7380 fprintf (f, ", nongroup");
7382 if (rld[r].inc != 0)
7383 fprintf (f, ", inc by %d", rld[r].inc);
7385 if (rld[r].nocombine)
7386 fprintf (f, ", can't combine");
7388 if (rld[r].secondary_p)
7389 fprintf (f, ", secondary_reload_p");
7391 if (rld[r].in_reg != 0)
7393 fprintf (f, "\n\treload_in_reg: ");
7394 print_inline_rtx (f, rld[r].in_reg, 24);
7397 if (rld[r].out_reg != 0)
7399 fprintf (f, "\n\treload_out_reg: ");
7400 print_inline_rtx (f, rld[r].out_reg, 24);
7403 if (rld[r].reg_rtx != 0)
7405 fprintf (f, "\n\treload_reg_rtx: ");
7406 print_inline_rtx (f, rld[r].reg_rtx, 24);
7410 if (rld[r].secondary_in_reload != -1)
7412 fprintf (f, "%ssecondary_in_reload = %d",
7413 prefix, rld[r].secondary_in_reload);
7417 if (rld[r].secondary_out_reload != -1)
7418 fprintf (f, "%ssecondary_out_reload = %d\n",
7419 prefix, rld[r].secondary_out_reload);
7422 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7424 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7425 insn_data[rld[r].secondary_in_icode].name);
7429 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7430 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7431 insn_data[rld[r].secondary_out_icode].name);
7440 debug_reload_to_stream (stderr);