1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
93 #include "insn-config.h"
94 #include "insn-codes.h"
98 #include "hard-reg-set.h"
105 #ifndef REGISTER_MOVE_COST
106 #define REGISTER_MOVE_COST(x, y) 2
109 #ifndef REGNO_MODE_OK_FOR_BASE_P
110 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
113 #ifndef REG_MODE_OK_FOR_BASE_P
114 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
117 /* The variables set up by `find_reloads' are:
119 n_reloads number of distinct reloads needed; max reload # + 1
120 tables indexed by reload number
121 reload_in rtx for value to reload from
122 reload_out rtx for where to store reload-reg afterward if nec
123 (often the same as reload_in)
124 reload_reg_class enum reg_class, saying what regs to reload into
125 reload_inmode enum machine_mode; mode this operand should have
126 when reloaded, on input.
127 reload_outmode enum machine_mode; mode this operand should have
128 when reloaded, on output.
129 reload_optional char, nonzero for an optional reload.
130 Optional reloads are ignored unless the
131 value is already sitting in a register.
132 reload_nongroup char, nonzero when a reload must use a register
133 not already allocated to a group.
134 reload_inc int, positive amount to increment or decrement by if
135 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
136 Ignored otherwise (don't assume it is zero).
137 reload_in_reg rtx. A reg for which reload_in is the equivalent.
138 If reload_in is a symbol_ref which came from
139 reg_equiv_constant, then this is the pseudo
140 which has that symbol_ref as equivalent.
141 reload_reg_rtx rtx. This is the register to reload into.
142 If it is zero when `find_reloads' returns,
143 you must find a suitable register in the class
144 specified by reload_reg_class, and store here
145 an rtx for that register with mode from
146 reload_inmode or reload_outmode.
147 reload_nocombine char, nonzero if this reload shouldn't be
148 combined with another reload.
149 reload_opnum int, operand number being reloaded. This is
150 used to group related reloads and need not always
151 be equal to the actual operand number in the insn,
152 though it current will be; for in-out operands, it
153 is one of the two operand numbers.
154 reload_when_needed enum, classifies reload as needed either for
155 addressing an input reload, addressing an output,
156 for addressing a non-reloaded mem ref,
157 or for unspecified purposes (i.e., more than one
159 reload_secondary_p int, 1 if this is a secondary register for one
161 reload_secondary_in_reload
162 reload_secondary_out_reload
163 int, gives the reload number of a secondary
164 reload, when needed; otherwise -1
165 reload_secondary_in_icode
166 reload_secondary_out_icode
167 enum insn_code, if a secondary reload is required,
168 gives the INSN_CODE that uses the secondary
169 reload as a scratch register, or CODE_FOR_nothing
170 if the secondary reload register is to be an
171 intermediate register. */
174 rtx reload_in[MAX_RELOADS];
175 rtx reload_out[MAX_RELOADS];
176 enum reg_class reload_reg_class[MAX_RELOADS];
177 enum machine_mode reload_inmode[MAX_RELOADS];
178 enum machine_mode reload_outmode[MAX_RELOADS];
179 rtx reload_reg_rtx[MAX_RELOADS];
180 char reload_optional[MAX_RELOADS];
181 char reload_nongroup[MAX_RELOADS];
182 int reload_inc[MAX_RELOADS];
183 rtx reload_in_reg[MAX_RELOADS];
184 rtx reload_out_reg[MAX_RELOADS];
185 char reload_nocombine[MAX_RELOADS];
186 int reload_opnum[MAX_RELOADS];
187 enum reload_type reload_when_needed[MAX_RELOADS];
188 int reload_secondary_p[MAX_RELOADS];
189 int reload_secondary_in_reload[MAX_RELOADS];
190 int reload_secondary_out_reload[MAX_RELOADS];
191 enum insn_code reload_secondary_in_icode[MAX_RELOADS];
192 enum insn_code reload_secondary_out_icode[MAX_RELOADS];
194 /* All the "earlyclobber" operands of the current insn
195 are recorded here. */
197 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
199 int reload_n_operands;
201 /* Replacing reloads.
203 If `replace_reloads' is nonzero, then as each reload is recorded
204 an entry is made for it in the table `replacements'.
205 Then later `subst_reloads' can look through that table and
206 perform all the replacements needed. */
208 /* Nonzero means record the places to replace. */
209 static int replace_reloads;
211 /* Each replacement is recorded with a structure like this. */
214 rtx *where; /* Location to store in */
215 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
216 a SUBREG; 0 otherwise. */
217 int what; /* which reload this is for */
218 enum machine_mode mode; /* mode it must have */
221 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
223 /* Number of replacements currently recorded. */
224 static int n_replacements;
226 /* Used to track what is modified by an operand. */
229 int reg_flag; /* Nonzero if referencing a register. */
230 int safe; /* Nonzero if this can't conflict with anything. */
231 rtx base; /* Base address for MEM. */
232 HOST_WIDE_INT start; /* Starting offset or register number. */
233 HOST_WIDE_INT end; /* Ending offset or register number. */
236 #ifdef SECONDARY_MEMORY_NEEDED
238 /* Save MEMs needed to copy from one class of registers to another. One MEM
239 is used per mode, but normally only one or two modes are ever used.
241 We keep two versions, before and after register elimination. The one
242 after register elimination is record separately for each operand. This
243 is done in case the address is not valid to be sure that we separately
246 static rtx secondary_memlocs[NUM_MACHINE_MODES];
247 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
250 /* The instruction we are doing reloads for;
251 so we can test whether a register dies in it. */
252 static rtx this_insn;
254 /* Nonzero if this instruction is a user-specified asm with operands. */
255 static int this_insn_is_asm;
257 /* If hard_regs_live_known is nonzero,
258 we can tell which hard regs are currently live,
259 at least enough to succeed in choosing dummy reloads. */
260 static int hard_regs_live_known;
262 /* Indexed by hard reg number,
263 element is nonnegative if hard reg has been spilled.
264 This vector is passed to `find_reloads' as an argument
265 and is not changed here. */
266 static short *static_reload_reg_p;
268 /* Set to 1 in subst_reg_equivs if it changes anything. */
269 static int subst_reg_equivs_changed;
271 /* On return from push_reload, holds the reload-number for the OUT
272 operand, which can be different for that from the input operand. */
273 static int output_reloadnum;
275 /* Compare two RTX's. */
276 #define MATCHES(x, y) \
277 (x == y || (x != 0 && (GET_CODE (x) == REG \
278 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
279 : rtx_equal_p (x, y) && ! side_effects_p (x))))
281 /* Indicates if two reloads purposes are for similar enough things that we
282 can merge their reloads. */
283 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
284 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
285 || ((when1) == (when2) && (op1) == (op2)) \
286 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
287 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
288 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
289 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
290 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
292 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
293 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
294 ((when1) != (when2) \
295 || ! ((op1) == (op2) \
296 || (when1) == RELOAD_FOR_INPUT \
297 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
298 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
300 /* If we are going to reload an address, compute the reload type to
302 #define ADDR_TYPE(type) \
303 ((type) == RELOAD_FOR_INPUT_ADDRESS \
304 ? RELOAD_FOR_INPADDR_ADDRESS \
305 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
306 ? RELOAD_FOR_OUTADDR_ADDRESS \
309 #ifdef HAVE_SECONDARY_RELOADS
310 static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
311 enum machine_mode, enum reload_type,
314 static enum reg_class find_valid_class PROTO((enum machine_mode, int));
315 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
316 enum machine_mode, enum machine_mode,
317 int, int, int, enum reload_type));
318 static void push_replacement PROTO((rtx *, int, enum machine_mode));
319 static void combine_reloads PROTO((void));
320 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
321 enum machine_mode, enum machine_mode,
322 enum reg_class, int, int));
323 static int earlyclobber_operand_p PROTO((rtx));
324 static int hard_reg_set_here_p PROTO((int, int, rtx));
325 static struct decomposition decompose PROTO((rtx));
326 static int immune_p PROTO((rtx, rtx, struct decomposition));
327 static int alternative_allows_memconst PROTO((const char *, int));
328 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int, rtx));
329 static rtx make_memloc PROTO((rtx, int));
330 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
331 int, enum reload_type, int, rtx));
332 static rtx subst_reg_equivs PROTO((rtx, rtx));
333 static rtx subst_indexed_address PROTO((rtx));
334 static int find_reloads_address_1 PROTO((enum machine_mode, rtx, int, rtx *,
335 int, enum reload_type,int, rtx));
336 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
337 enum machine_mode, int,
338 enum reload_type, int));
339 static int find_inc_amount PROTO((rtx, rtx));
340 static int loc_mentioned_in_p PROTO((rtx *, rtx));
342 #ifdef HAVE_SECONDARY_RELOADS
344 /* Determine if any secondary reloads are needed for loading (if IN_P is
345 non-zero) or storing (if IN_P is zero) X to or from a reload register of
346 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
347 are needed, push them.
349 Return the reload number of the secondary reload we made, or -1 if
350 we didn't need one. *PICODE is set to the insn_code to use if we do
351 need a secondary reload. */
354 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
360 enum reg_class reload_class;
361 enum machine_mode reload_mode;
362 enum reload_type type;
363 enum insn_code *picode;
365 enum reg_class class = NO_REGS;
366 enum machine_mode mode = reload_mode;
367 enum insn_code icode = CODE_FOR_nothing;
368 enum reg_class t_class = NO_REGS;
369 enum machine_mode t_mode = VOIDmode;
370 enum insn_code t_icode = CODE_FOR_nothing;
371 enum reload_type secondary_type;
372 int s_reload, t_reload = -1;
374 if (type == RELOAD_FOR_INPUT_ADDRESS
375 || type == RELOAD_FOR_OUTPUT_ADDRESS
376 || type == RELOAD_FOR_INPADDR_ADDRESS
377 || type == RELOAD_FOR_OUTADDR_ADDRESS)
378 secondary_type = type;
380 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
382 *picode = CODE_FOR_nothing;
384 /* If X is a paradoxical SUBREG, use the inner value to determine both the
385 mode and object being reloaded. */
386 if (GET_CODE (x) == SUBREG
387 && (GET_MODE_SIZE (GET_MODE (x))
388 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
391 reload_mode = GET_MODE (x);
394 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
395 is still a pseudo-register by now, it *must* have an equivalent MEM
396 but we don't want to assume that), use that equivalent when seeing if
397 a secondary reload is needed since whether or not a reload is needed
398 might be sensitive to the form of the MEM. */
400 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
401 && reg_equiv_mem[REGNO (x)] != 0)
402 x = reg_equiv_mem[REGNO (x)];
404 #ifdef SECONDARY_INPUT_RELOAD_CLASS
406 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
409 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
411 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
414 /* If we don't need any secondary registers, done. */
415 if (class == NO_REGS)
418 /* Get a possible insn to use. If the predicate doesn't accept X, don't
421 icode = (in_p ? reload_in_optab[(int) reload_mode]
422 : reload_out_optab[(int) reload_mode]);
424 if (icode != CODE_FOR_nothing
425 && insn_operand_predicate[(int) icode][in_p]
426 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
427 icode = CODE_FOR_nothing;
429 /* If we will be using an insn, see if it can directly handle the reload
430 register we will be using. If it can, the secondary reload is for a
431 scratch register. If it can't, we will use the secondary reload for
432 an intermediate register and require a tertiary reload for the scratch
435 if (icode != CODE_FOR_nothing)
437 /* If IN_P is non-zero, the reload register will be the output in
438 operand 0. If IN_P is zero, the reload register will be the input
439 in operand 1. Outputs should have an initial "=", which we must
442 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
443 enum reg_class insn_class
444 = (insn_letter == 'r' ? GENERAL_REGS
445 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
447 if (insn_class == NO_REGS
448 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
449 /* The scratch register's constraint must start with "=&". */
450 || insn_operand_constraint[(int) icode][2][0] != '='
451 || insn_operand_constraint[(int) icode][2][1] != '&')
454 if (reg_class_subset_p (reload_class, insn_class))
455 mode = insn_operand_mode[(int) icode][2];
458 char t_letter = insn_operand_constraint[(int) icode][2][2];
460 t_mode = insn_operand_mode[(int) icode][2];
461 t_class = (t_letter == 'r' ? GENERAL_REGS
462 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter));
464 icode = CODE_FOR_nothing;
468 /* This case isn't valid, so fail. Reload is allowed to use the same
469 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
470 in the case of a secondary register, we actually need two different
471 registers for correct code. We fail here to prevent the possibility of
472 silently generating incorrect code later.
474 The convention is that secondary input reloads are valid only if the
475 secondary_class is different from class. If you have such a case, you
476 can not use secondary reloads, you must work around the problem some
479 Allow this when MODE is not reload_mode and assume that the generated
480 code handles this case (it does on the Alpha, which is the only place
481 this currently happens). */
483 if (in_p && class == reload_class && mode == reload_mode)
486 /* If we need a tertiary reload, see if we have one we can reuse or else
489 if (t_class != NO_REGS)
491 for (t_reload = 0; t_reload < n_reloads; t_reload++)
492 if (reload_secondary_p[t_reload]
493 && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
494 || reg_class_subset_p (reload_reg_class[t_reload], t_class))
495 && ((in_p && reload_inmode[t_reload] == t_mode)
496 || (! in_p && reload_outmode[t_reload] == t_mode))
497 && ((in_p && (reload_secondary_in_icode[t_reload]
498 == CODE_FOR_nothing))
499 || (! in_p &&(reload_secondary_out_icode[t_reload]
500 == CODE_FOR_nothing)))
501 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
502 && MERGABLE_RELOADS (secondary_type,
503 reload_when_needed[t_reload],
504 opnum, reload_opnum[t_reload]))
507 reload_inmode[t_reload] = t_mode;
509 reload_outmode[t_reload] = t_mode;
511 if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
512 reload_reg_class[t_reload] = t_class;
514 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
515 reload_optional[t_reload] &= optional;
516 reload_secondary_p[t_reload] = 1;
517 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
518 opnum, reload_opnum[t_reload]))
519 reload_when_needed[t_reload] = RELOAD_OTHER;
522 if (t_reload == n_reloads)
524 /* We need to make a new tertiary reload for this register class. */
525 reload_in[t_reload] = reload_out[t_reload] = 0;
526 reload_reg_class[t_reload] = t_class;
527 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
528 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
529 reload_reg_rtx[t_reload] = 0;
530 reload_optional[t_reload] = optional;
531 reload_nongroup[t_reload] = 0;
532 reload_inc[t_reload] = 0;
533 /* Maybe we could combine these, but it seems too tricky. */
534 reload_nocombine[t_reload] = 1;
535 reload_in_reg[t_reload] = 0;
536 reload_out_reg[t_reload] = 0;
537 reload_opnum[t_reload] = opnum;
538 reload_when_needed[t_reload] = secondary_type;
539 reload_secondary_in_reload[t_reload] = -1;
540 reload_secondary_out_reload[t_reload] = -1;
541 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
542 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
543 reload_secondary_p[t_reload] = 1;
549 /* See if we can reuse an existing secondary reload. */
550 for (s_reload = 0; s_reload < n_reloads; s_reload++)
551 if (reload_secondary_p[s_reload]
552 && (reg_class_subset_p (class, reload_reg_class[s_reload])
553 || reg_class_subset_p (reload_reg_class[s_reload], class))
554 && ((in_p && reload_inmode[s_reload] == mode)
555 || (! in_p && reload_outmode[s_reload] == mode))
556 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
557 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
558 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
559 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
560 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
561 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
562 opnum, reload_opnum[s_reload]))
565 reload_inmode[s_reload] = mode;
567 reload_outmode[s_reload] = mode;
569 if (reg_class_subset_p (class, reload_reg_class[s_reload]))
570 reload_reg_class[s_reload] = class;
572 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
573 reload_optional[s_reload] &= optional;
574 reload_secondary_p[s_reload] = 1;
575 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
576 opnum, reload_opnum[s_reload]))
577 reload_when_needed[s_reload] = RELOAD_OTHER;
580 if (s_reload == n_reloads)
582 #ifdef SECONDARY_MEMORY_NEEDED
583 /* If we need a memory location to copy between the two reload regs,
584 set it up now. Note that we do the input case before making
585 the reload and the output case after. This is due to the
586 way reloads are output. */
588 if (in_p && icode == CODE_FOR_nothing
589 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
590 get_secondary_mem (x, reload_mode, opnum, type);
593 /* We need to make a new secondary reload for this register class. */
594 reload_in[s_reload] = reload_out[s_reload] = 0;
595 reload_reg_class[s_reload] = class;
597 reload_inmode[s_reload] = in_p ? mode : VOIDmode;
598 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
599 reload_reg_rtx[s_reload] = 0;
600 reload_optional[s_reload] = optional;
601 reload_nongroup[s_reload] = 0;
602 reload_inc[s_reload] = 0;
603 /* Maybe we could combine these, but it seems too tricky. */
604 reload_nocombine[s_reload] = 1;
605 reload_in_reg[s_reload] = 0;
606 reload_out_reg[s_reload] = 0;
607 reload_opnum[s_reload] = opnum;
608 reload_when_needed[s_reload] = secondary_type;
609 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
610 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
611 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
612 reload_secondary_out_icode[s_reload]
613 = ! in_p ? t_icode : CODE_FOR_nothing;
614 reload_secondary_p[s_reload] = 1;
618 #ifdef SECONDARY_MEMORY_NEEDED
619 if (! in_p && icode == CODE_FOR_nothing
620 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
621 get_secondary_mem (x, mode, opnum, type);
628 #endif /* HAVE_SECONDARY_RELOADS */
630 #ifdef SECONDARY_MEMORY_NEEDED
632 /* Return a memory location that will be used to copy X in mode MODE.
633 If we haven't already made a location for this mode in this insn,
634 call find_reloads_address on the location being returned. */
637 get_secondary_mem (x, mode, opnum, type)
639 enum machine_mode mode;
641 enum reload_type type;
646 /* By default, if MODE is narrower than a word, widen it to a word.
647 This is required because most machines that require these memory
648 locations do not support short load and stores from all registers
649 (e.g., FP registers). */
651 #ifdef SECONDARY_MEMORY_NEEDED_MODE
652 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
654 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
655 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
658 /* If we already have made a MEM for this operand in MODE, return it. */
659 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
660 return secondary_memlocs_elim[(int) mode][opnum];
662 /* If this is the first time we've tried to get a MEM for this mode,
663 allocate a new one. `something_changed' in reload will get set
664 by noticing that the frame size has changed. */
666 if (secondary_memlocs[(int) mode] == 0)
668 #ifdef SECONDARY_MEMORY_NEEDED_RTX
669 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
671 secondary_memlocs[(int) mode]
672 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
676 /* Get a version of the address doing any eliminations needed. If that
677 didn't give us a new MEM, make a new one if it isn't valid. */
679 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
680 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
682 if (! mem_valid && loc == secondary_memlocs[(int) mode])
683 loc = copy_rtx (loc);
685 /* The only time the call below will do anything is if the stack
686 offset is too large. In that case IND_LEVELS doesn't matter, so we
687 can just pass a zero. Adjust the type to be the address of the
688 corresponding object. If the address was valid, save the eliminated
689 address. If it wasn't valid, we need to make a reload each time, so
694 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
695 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
698 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
702 secondary_memlocs_elim[(int) mode][opnum] = loc;
706 /* Clear any secondary memory locations we've made. */
709 clear_secondary_mem ()
711 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
713 #endif /* SECONDARY_MEMORY_NEEDED */
715 /* Find the largest class for which every register number plus N is valid in
716 M1 (if in range). Abort if no such class exists. */
718 static enum reg_class
719 find_valid_class (m1, n)
720 enum machine_mode m1;
725 enum reg_class best_class;
728 for (class = 1; class < N_REG_CLASSES; class++)
731 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
732 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
733 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
734 && ! HARD_REGNO_MODE_OK (regno + n, m1))
737 if (! bad && reg_class_size[class] > best_size)
738 best_class = class, best_size = reg_class_size[class];
747 /* Record one reload that needs to be performed.
748 IN is an rtx saying where the data are to be found before this instruction.
749 OUT says where they must be stored after the instruction.
750 (IN is zero for data not read, and OUT is zero for data not written.)
751 INLOC and OUTLOC point to the places in the instructions where
752 IN and OUT were found.
753 If IN and OUT are both non-zero, it means the same register must be used
754 to reload both IN and OUT.
756 CLASS is a register class required for the reloaded data.
757 INMODE is the machine mode that the instruction requires
758 for the reg that replaces IN and OUTMODE is likewise for OUT.
760 If IN is zero, then OUT's location and mode should be passed as
763 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
765 OPTIONAL nonzero means this reload does not need to be performed:
766 it can be discarded if that is more convenient.
768 OPNUM and TYPE say what the purpose of this reload is.
770 The return value is the reload-number for this reload.
772 If both IN and OUT are nonzero, in some rare cases we might
773 want to make two separate reloads. (Actually we never do this now.)
774 Therefore, the reload-number for OUT is stored in
775 output_reloadnum when we return; the return value applies to IN.
776 Usually (presently always), when IN and OUT are nonzero,
777 the two reload-numbers are equal, but the caller should be careful to
781 push_reload (in, out, inloc, outloc, class,
782 inmode, outmode, strict_low, optional, opnum, type)
783 register rtx in, out;
785 enum reg_class class;
786 enum machine_mode inmode, outmode;
790 enum reload_type type;
794 int dont_remove_subreg = 0;
795 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
796 int secondary_in_reload = -1, secondary_out_reload = -1;
797 enum insn_code secondary_in_icode = CODE_FOR_nothing;
798 enum insn_code secondary_out_icode = CODE_FOR_nothing;
800 /* INMODE and/or OUTMODE could be VOIDmode if no mode
801 has been specified for the operand. In that case,
802 use the operand's mode as the mode to reload. */
803 if (inmode == VOIDmode && in != 0)
804 inmode = GET_MODE (in);
805 if (outmode == VOIDmode && out != 0)
806 outmode = GET_MODE (out);
808 /* If IN is a pseudo register everywhere-equivalent to a constant, and
809 it is not in a hard register, reload straight from the constant,
810 since we want to get rid of such pseudo registers.
811 Often this is done earlier, but not always in find_reloads_address. */
812 if (in != 0 && GET_CODE (in) == REG)
814 register int regno = REGNO (in);
816 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
817 && reg_equiv_constant[regno] != 0)
818 in = reg_equiv_constant[regno];
821 /* Likewise for OUT. Of course, OUT will never be equivalent to
822 an actual constant, but it might be equivalent to a memory location
823 (in the case of a parameter). */
824 if (out != 0 && GET_CODE (out) == REG)
826 register int regno = REGNO (out);
828 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
829 && reg_equiv_constant[regno] != 0)
830 out = reg_equiv_constant[regno];
833 /* If we have a read-write operand with an address side-effect,
834 change either IN or OUT so the side-effect happens only once. */
835 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
837 if (GET_CODE (XEXP (in, 0)) == POST_INC
838 || GET_CODE (XEXP (in, 0)) == POST_DEC)
839 in = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0));
840 if (GET_CODE (XEXP (in, 0)) == PRE_INC
841 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
842 out = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0));
845 /* If we are reloading a (SUBREG constant ...), really reload just the
846 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
847 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
848 a pseudo and hence will become a MEM) with M1 wider than M2 and the
849 register is a pseudo, also reload the inside expression.
850 For machines that extend byte loads, do this for any SUBREG of a pseudo
851 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
852 M2 is an integral mode that gets extended when loaded.
853 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
854 either M1 is not valid for R or M2 is wider than a word but we only
855 need one word to store an M2-sized quantity in R.
856 (However, if OUT is nonzero, we need to reload the reg *and*
857 the subreg, so do nothing here, and let following statement handle it.)
859 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
860 we can't handle it here because CONST_INT does not indicate a mode.
862 Similarly, we must reload the inside expression if we have a
863 STRICT_LOW_PART (presumably, in == out in the cas).
865 Also reload the inner expression if it does not require a secondary
866 reload but the SUBREG does.
868 Finally, reload the inner expression if it is a register that is in
869 the class whose registers cannot be referenced in a different size
870 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
871 cannot reload just the inside since we might end up with the wrong
874 if (in != 0 && GET_CODE (in) == SUBREG && SUBREG_WORD (in) == 0
875 #ifdef CLASS_CANNOT_CHANGE_SIZE
876 && class != CLASS_CANNOT_CHANGE_SIZE
878 && (CONSTANT_P (SUBREG_REG (in))
879 || GET_CODE (SUBREG_REG (in)) == PLUS
881 || (((GET_CODE (SUBREG_REG (in)) == REG
882 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
883 || GET_CODE (SUBREG_REG (in)) == MEM)
884 && ((GET_MODE_SIZE (inmode)
885 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
886 #ifdef LOAD_EXTEND_OP
887 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
888 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
890 && (GET_MODE_SIZE (inmode)
891 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
892 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
893 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
895 #ifdef WORD_REGISTER_OPERATIONS
896 || ((GET_MODE_SIZE (inmode)
897 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
898 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
899 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
903 || (GET_CODE (SUBREG_REG (in)) == REG
904 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
905 /* The case where out is nonzero
906 is handled differently in the following statement. */
907 && (out == 0 || SUBREG_WORD (in) == 0)
908 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
909 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
911 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
913 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
914 GET_MODE (SUBREG_REG (in)))))
915 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
918 #ifdef SECONDARY_INPUT_RELOAD_CLASS
919 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
920 && (SECONDARY_INPUT_RELOAD_CLASS (class,
921 GET_MODE (SUBREG_REG (in)),
925 #ifdef CLASS_CANNOT_CHANGE_SIZE
926 || (GET_CODE (SUBREG_REG (in)) == REG
927 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
928 && (TEST_HARD_REG_BIT
929 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
930 REGNO (SUBREG_REG (in))))
931 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
932 != GET_MODE_SIZE (inmode)))
936 in_subreg_loc = inloc;
937 inloc = &SUBREG_REG (in);
939 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
940 if (GET_CODE (in) == MEM)
941 /* This is supposed to happen only for paradoxical subregs made by
942 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
943 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
946 inmode = GET_MODE (in);
949 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
950 either M1 is not valid for R or M2 is wider than a word but we only
951 need one word to store an M2-sized quantity in R.
953 However, we must reload the inner reg *as well as* the subreg in
956 /* Similar issue for (SUBREG constant ...) if it was not handled by the
957 code above. This can happen if SUBREG_WORD != 0. */
959 if (in != 0 && GET_CODE (in) == SUBREG
960 && (CONSTANT_P (SUBREG_REG (in))
961 || (GET_CODE (SUBREG_REG (in)) == REG
962 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
963 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in))
966 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
967 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
969 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
971 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
972 GET_MODE (SUBREG_REG (in)))))))))
974 /* This relies on the fact that emit_reload_insns outputs the
975 instructions for input reloads of type RELOAD_OTHER in the same
976 order as the reloads. Thus if the outer reload is also of type
977 RELOAD_OTHER, we are guaranteed that this inner reload will be
978 output before the outer reload. */
979 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
980 find_valid_class (inmode, SUBREG_WORD (in)),
981 VOIDmode, VOIDmode, 0, 0, opnum, type);
982 dont_remove_subreg = 1;
985 /* Similarly for paradoxical and problematical SUBREGs on the output.
986 Note that there is no reason we need worry about the previous value
987 of SUBREG_REG (out); even if wider than out,
988 storing in a subreg is entitled to clobber it all
989 (except in the case of STRICT_LOW_PART,
990 and in that case the constraint should label it input-output.) */
991 if (out != 0 && GET_CODE (out) == SUBREG && SUBREG_WORD (out) == 0
992 #ifdef CLASS_CANNOT_CHANGE_SIZE
993 && class != CLASS_CANNOT_CHANGE_SIZE
995 && (CONSTANT_P (SUBREG_REG (out))
997 || (((GET_CODE (SUBREG_REG (out)) == REG
998 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
999 || GET_CODE (SUBREG_REG (out)) == MEM)
1000 && ((GET_MODE_SIZE (outmode)
1001 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1002 #ifdef WORD_REGISTER_OPERATIONS
1003 || ((GET_MODE_SIZE (outmode)
1004 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1005 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1006 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1010 || (GET_CODE (SUBREG_REG (out)) == REG
1011 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1012 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1013 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1015 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1017 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1018 GET_MODE (SUBREG_REG (out)))))
1019 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
1020 + SUBREG_WORD (out)),
1022 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1023 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1024 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1025 GET_MODE (SUBREG_REG (out)),
1029 #ifdef CLASS_CANNOT_CHANGE_SIZE
1030 || (GET_CODE (SUBREG_REG (out)) == REG
1031 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1032 && (TEST_HARD_REG_BIT
1033 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1034 REGNO (SUBREG_REG (out))))
1035 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1036 != GET_MODE_SIZE (outmode)))
1040 out_subreg_loc = outloc;
1041 outloc = &SUBREG_REG (out);
1043 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1044 if (GET_CODE (out) == MEM
1045 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1048 outmode = GET_MODE (out);
1051 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1052 either M1 is not valid for R or M2 is wider than a word but we only
1053 need one word to store an M2-sized quantity in R.
1055 However, we must reload the inner reg *as well as* the subreg in
1056 that case. In this case, the inner reg is an in-out reload. */
1058 if (out != 0 && GET_CODE (out) == SUBREG
1059 && GET_CODE (SUBREG_REG (out)) == REG
1060 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1061 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out),
1063 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1064 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1066 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1068 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1069 GET_MODE (SUBREG_REG (out)))))))
1071 /* This relies on the fact that emit_reload_insns outputs the
1072 instructions for output reloads of type RELOAD_OTHER in reverse
1073 order of the reloads. Thus if the outer reload is also of type
1074 RELOAD_OTHER, we are guaranteed that this inner reload will be
1075 output after the outer reload. */
1076 dont_remove_subreg = 1;
1077 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1079 find_valid_class (outmode, SUBREG_WORD (out)),
1080 VOIDmode, VOIDmode, 0, 0,
1081 opnum, RELOAD_OTHER);
1084 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1085 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1086 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1087 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1090 /* If IN is a SUBREG of a hard register, make a new REG. This
1091 simplifies some of the cases below. */
1093 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1094 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1095 && ! dont_remove_subreg)
1096 in = gen_rtx_REG (GET_MODE (in),
1097 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
1099 /* Similarly for OUT. */
1100 if (out != 0 && GET_CODE (out) == SUBREG
1101 && GET_CODE (SUBREG_REG (out)) == REG
1102 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1103 && ! dont_remove_subreg)
1104 out = gen_rtx_REG (GET_MODE (out),
1105 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
1107 /* Narrow down the class of register wanted if that is
1108 desirable on this machine for efficiency. */
1110 class = PREFERRED_RELOAD_CLASS (in, class);
1112 /* Output reloads may need analogous treatment, different in detail. */
1113 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1115 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1118 /* Make sure we use a class that can handle the actual pseudo
1119 inside any subreg. For example, on the 386, QImode regs
1120 can appear within SImode subregs. Although GENERAL_REGS
1121 can handle SImode, QImode needs a smaller class. */
1122 #ifdef LIMIT_RELOAD_CLASS
1124 class = LIMIT_RELOAD_CLASS (inmode, class);
1125 else if (in != 0 && GET_CODE (in) == SUBREG)
1126 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1129 class = LIMIT_RELOAD_CLASS (outmode, class);
1130 if (out != 0 && GET_CODE (out) == SUBREG)
1131 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1134 /* Verify that this class is at least possible for the mode that
1136 if (this_insn_is_asm)
1138 enum machine_mode mode;
1139 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1143 if (mode == VOIDmode)
1145 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1150 outmode = word_mode;
1152 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1153 if (HARD_REGNO_MODE_OK (i, mode)
1154 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1156 int nregs = HARD_REGNO_NREGS (i, mode);
1159 for (j = 1; j < nregs; j++)
1160 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1165 if (i == FIRST_PSEUDO_REGISTER)
1167 error_for_asm (this_insn, "impossible register constraint in `asm'");
1172 /* Optional output reloads are always OK even if we have no register class,
1173 since the function of these reloads is only to have spill_reg_store etc.
1174 set, so that the storing insn can be deleted later. */
1175 if (class == NO_REGS
1176 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1179 /* We can use an existing reload if the class is right
1180 and at least one of IN and OUT is a match
1181 and the other is at worst neutral.
1182 (A zero compared against anything is neutral.)
1184 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
1185 for the same thing since that can cause us to need more reload registers
1186 than we otherwise would. */
1188 for (i = 0; i < n_reloads; i++)
1189 if ((reg_class_subset_p (class, reload_reg_class[i])
1190 || reg_class_subset_p (reload_reg_class[i], class))
1191 /* If the existing reload has a register, it must fit our class. */
1192 && (reload_reg_rtx[i] == 0
1193 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1194 true_regnum (reload_reg_rtx[i])))
1195 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
1196 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
1198 (out != 0 && MATCHES (reload_out[i], out)
1199 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
1200 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
1201 && MERGABLE_RELOADS (type, reload_when_needed[i],
1202 opnum, reload_opnum[i]))
1205 /* Reloading a plain reg for input can match a reload to postincrement
1206 that reg, since the postincrement's value is the right value.
1207 Likewise, it can match a preincrement reload, since we regard
1208 the preincrementation as happening before any ref in this insn
1209 to that register. */
1211 for (i = 0; i < n_reloads; i++)
1212 if ((reg_class_subset_p (class, reload_reg_class[i])
1213 || reg_class_subset_p (reload_reg_class[i], class))
1214 /* If the existing reload has a register, it must fit our class. */
1215 && (reload_reg_rtx[i] == 0
1216 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1217 true_regnum (reload_reg_rtx[i])))
1218 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
1219 && ((GET_CODE (in) == REG
1220 && (GET_CODE (reload_in[i]) == POST_INC
1221 || GET_CODE (reload_in[i]) == POST_DEC
1222 || GET_CODE (reload_in[i]) == PRE_INC
1223 || GET_CODE (reload_in[i]) == PRE_DEC)
1224 && MATCHES (XEXP (reload_in[i], 0), in))
1226 (GET_CODE (reload_in[i]) == REG
1227 && (GET_CODE (in) == POST_INC
1228 || GET_CODE (in) == POST_DEC
1229 || GET_CODE (in) == PRE_INC
1230 || GET_CODE (in) == PRE_DEC)
1231 && MATCHES (XEXP (in, 0), reload_in[i])))
1232 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
1233 && MERGABLE_RELOADS (type, reload_when_needed[i],
1234 opnum, reload_opnum[i]))
1236 /* Make sure reload_in ultimately has the increment,
1237 not the plain register. */
1238 if (GET_CODE (in) == REG)
1245 /* See if we need a secondary reload register to move between CLASS
1246 and IN or CLASS and OUT. Get the icode and push any required reloads
1247 needed for each of them if so. */
1249 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1252 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1253 &secondary_in_icode);
1256 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1257 if (out != 0 && GET_CODE (out) != SCRATCH)
1258 secondary_out_reload
1259 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1260 type, &secondary_out_icode);
1263 /* We found no existing reload suitable for re-use.
1264 So add an additional reload. */
1266 #ifdef SECONDARY_MEMORY_NEEDED
1267 /* If a memory location is needed for the copy, make one. */
1268 if (in != 0 && GET_CODE (in) == REG
1269 && REGNO (in) < FIRST_PSEUDO_REGISTER
1270 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1272 get_secondary_mem (in, inmode, opnum, type);
1277 reload_out[i] = out;
1278 reload_reg_class[i] = class;
1279 reload_inmode[i] = inmode;
1280 reload_outmode[i] = outmode;
1281 reload_reg_rtx[i] = 0;
1282 reload_optional[i] = optional;
1283 reload_nongroup[i] = 0;
1285 reload_nocombine[i] = 0;
1286 reload_in_reg[i] = inloc ? *inloc : 0;
1287 reload_out_reg[i] = outloc ? *outloc : 0;
1288 reload_opnum[i] = opnum;
1289 reload_when_needed[i] = type;
1290 reload_secondary_in_reload[i] = secondary_in_reload;
1291 reload_secondary_out_reload[i] = secondary_out_reload;
1292 reload_secondary_in_icode[i] = secondary_in_icode;
1293 reload_secondary_out_icode[i] = secondary_out_icode;
1294 reload_secondary_p[i] = 0;
1298 #ifdef SECONDARY_MEMORY_NEEDED
1299 if (out != 0 && GET_CODE (out) == REG
1300 && REGNO (out) < FIRST_PSEUDO_REGISTER
1301 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1303 get_secondary_mem (out, outmode, opnum, type);
1308 /* We are reusing an existing reload,
1309 but we may have additional information for it.
1310 For example, we may now have both IN and OUT
1311 while the old one may have just one of them. */
1313 /* The modes can be different. If they are, we want to reload in
1314 the larger mode, so that the value is valid for both modes. */
1315 if (inmode != VOIDmode
1316 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (reload_inmode[i]))
1317 reload_inmode[i] = inmode;
1318 if (outmode != VOIDmode
1319 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (reload_outmode[i]))
1320 reload_outmode[i] = outmode;
1323 rtx in_reg = inloc ? *inloc : 0;
1324 /* If we merge reloads for two distinct rtl expressions that
1325 are identical in content, there might be duplicate address
1326 reloads. Remove the extra set now, so that if we later find
1327 that we can inherit this reload, we can get rid of the
1328 address reloads altogether. */
1329 if (reload_in[i] != in && rtx_equal_p (in, reload_in[i]))
1331 /* We must keep the address reload with the lower operand
1333 if (opnum > reload_opnum[i])
1335 remove_address_replacements (in);
1337 in_reg = reload_in_reg[i];
1340 remove_address_replacements (reload_in[i]);
1343 reload_in_reg[i] = in_reg;
1347 reload_out[i] = out;
1348 reload_out_reg[i] = outloc ? *outloc : 0;
1350 if (reg_class_subset_p (class, reload_reg_class[i]))
1351 reload_reg_class[i] = class;
1352 reload_optional[i] &= optional;
1353 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1354 opnum, reload_opnum[i]))
1355 reload_when_needed[i] = RELOAD_OTHER;
1356 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1359 /* If the ostensible rtx being reload differs from the rtx found
1360 in the location to substitute, this reload is not safe to combine
1361 because we cannot reliably tell whether it appears in the insn. */
1363 if (in != 0 && in != *inloc)
1364 reload_nocombine[i] = 1;
1367 /* This was replaced by changes in find_reloads_address_1 and the new
1368 function inc_for_reload, which go with a new meaning of reload_inc. */
1370 /* If this is an IN/OUT reload in an insn that sets the CC,
1371 it must be for an autoincrement. It doesn't work to store
1372 the incremented value after the insn because that would clobber the CC.
1373 So we must do the increment of the value reloaded from,
1374 increment it, store it back, then decrement again. */
1375 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1379 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1380 /* If we did not find a nonzero amount-to-increment-by,
1381 that contradicts the belief that IN is being incremented
1382 in an address in this insn. */
1383 if (reload_inc[i] == 0)
1388 /* If we will replace IN and OUT with the reload-reg,
1389 record where they are located so that substitution need
1390 not do a tree walk. */
1392 if (replace_reloads)
1396 register struct replacement *r = &replacements[n_replacements++];
1398 r->subreg_loc = in_subreg_loc;
1402 if (outloc != 0 && outloc != inloc)
1404 register struct replacement *r = &replacements[n_replacements++];
1407 r->subreg_loc = out_subreg_loc;
1412 /* If this reload is just being introduced and it has both
1413 an incoming quantity and an outgoing quantity that are
1414 supposed to be made to match, see if either one of the two
1415 can serve as the place to reload into.
1417 If one of them is acceptable, set reload_reg_rtx[i]
1420 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1422 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1424 reload_reg_class[i], i,
1425 earlyclobber_operand_p (out));
1427 /* If the outgoing register already contains the same value
1428 as the incoming one, we can dispense with loading it.
1429 The easiest way to tell the caller that is to give a phony
1430 value for the incoming operand (same as outgoing one). */
1431 if (reload_reg_rtx[i] == out
1432 && (GET_CODE (in) == REG || CONSTANT_P (in))
1433 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1434 static_reload_reg_p, i, inmode))
1438 /* If this is an input reload and the operand contains a register that
1439 dies in this insn and is used nowhere else, see if it is the right class
1440 to be used for this reload. Use it if so. (This occurs most commonly
1441 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1442 this if it is also an output reload that mentions the register unless
1443 the output is a SUBREG that clobbers an entire register.
1445 Note that the operand might be one of the spill regs, if it is a
1446 pseudo reg and we are in a block where spilling has not taken place.
1447 But if there is no spilling in this block, that is OK.
1448 An explicitly used hard reg cannot be a spill reg. */
1450 if (reload_reg_rtx[i] == 0 && in != 0)
1455 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1456 if (REG_NOTE_KIND (note) == REG_DEAD
1457 && GET_CODE (XEXP (note, 0)) == REG
1458 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1459 && reg_mentioned_p (XEXP (note, 0), in)
1460 && ! refers_to_regno_for_reload_p (regno,
1462 + HARD_REGNO_NREGS (regno,
1464 PATTERN (this_insn), inloc)
1465 /* If this is also an output reload, IN cannot be used as
1466 the reload register if it is set in this insn unless IN
1468 && (out == 0 || in == out
1469 || ! hard_reg_set_here_p (regno,
1471 + HARD_REGNO_NREGS (regno,
1473 PATTERN (this_insn)))
1474 /* ??? Why is this code so different from the previous?
1475 Is there any simple coherent way to describe the two together?
1476 What's going on here. */
1478 || (GET_CODE (in) == SUBREG
1479 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1481 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1482 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1483 /* Make sure the operand fits in the reg that dies. */
1484 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1485 && HARD_REGNO_MODE_OK (regno, inmode)
1486 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1487 && HARD_REGNO_MODE_OK (regno, outmode)
1488 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1489 && !fixed_regs[regno])
1491 reload_reg_rtx[i] = gen_rtx_REG (inmode, regno);
1497 output_reloadnum = i;
1502 /* Record an additional place we must replace a value
1503 for which we have already recorded a reload.
1504 RELOADNUM is the value returned by push_reload
1505 when the reload was recorded.
1506 This is used in insn patterns that use match_dup. */
1509 push_replacement (loc, reloadnum, mode)
1512 enum machine_mode mode;
1514 if (replace_reloads)
1516 register struct replacement *r = &replacements[n_replacements++];
1517 r->what = reloadnum;
1524 /* Transfer all replacements that used to be in reload FROM to be in
1528 transfer_replacements (to, from)
1533 for (i = 0; i < n_replacements; i++)
1534 if (replacements[i].what == from)
1535 replacements[i].what = to;
1538 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1539 or a subpart of it. If we have any replacements registered for IN_RTX,
1540 cancel the reloads that were supposed to load them.
1541 Return non-zero if we canceled any reloads. */
1543 remove_address_replacements (in_rtx)
1547 char reload_flags[MAX_RELOADS];
1548 int something_changed = 0;
1550 bzero (reload_flags, sizeof reload_flags);
1551 for (i = 0, j = 0; i < n_replacements; i++)
1553 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1554 reload_flags[replacements[i].what] |= 1;
1557 replacements[j++] = replacements[i];
1558 reload_flags[replacements[i].what] |= 2;
1561 /* Note that the following store must be done before the recursive calls. */
1564 for (i = n_reloads - 1; i >= 0; i--)
1566 if (reload_flags[i] == 1)
1568 deallocate_reload_reg (i);
1569 remove_address_replacements (reload_in[i]);
1571 something_changed = 1;
1574 return something_changed;
1577 /* Return non-zero if IN contains a piece of rtl that has the address LOC */
1579 loc_mentioned_in_p (loc, in)
1582 enum rtx_code code = GET_CODE (in);
1583 char *fmt = GET_RTX_FORMAT (code);
1586 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1588 if (loc == &XEXP (in, i))
1592 if (loc_mentioned_in_p (loc, XEXP (in, i)))
1595 else if (fmt[i] == 'E')
1596 for (j = XVECLEN (in, i) - 1; i >= 0; i--)
1597 if (loc_mentioned_in_p (loc, XVECEXP (in, i, j)))
1603 /* If there is only one output reload, and it is not for an earlyclobber
1604 operand, try to combine it with a (logically unrelated) input reload
1605 to reduce the number of reload registers needed.
1607 This is safe if the input reload does not appear in
1608 the value being output-reloaded, because this implies
1609 it is not needed any more once the original insn completes.
1611 If that doesn't work, see we can use any of the registers that
1612 die in this insn as a reload register. We can if it is of the right
1613 class and does not appear in the value being output-reloaded. */
1619 int output_reload = -1;
1620 int secondary_out = -1;
1623 /* Find the output reload; return unless there is exactly one
1624 and that one is mandatory. */
1626 for (i = 0; i < n_reloads; i++)
1627 if (reload_out[i] != 0)
1629 if (output_reload >= 0)
1634 if (output_reload < 0 || reload_optional[output_reload])
1637 /* An input-output reload isn't combinable. */
1639 if (reload_in[output_reload] != 0)
1642 /* If this reload is for an earlyclobber operand, we can't do anything. */
1643 if (earlyclobber_operand_p (reload_out[output_reload]))
1646 /* Check each input reload; can we combine it? */
1648 for (i = 0; i < n_reloads; i++)
1649 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1650 /* Life span of this reload must not extend past main insn. */
1651 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1652 && reload_when_needed[i] != RELOAD_FOR_OUTADDR_ADDRESS
1653 && reload_when_needed[i] != RELOAD_OTHER
1654 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1655 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1656 reload_outmode[output_reload]))
1657 && reload_inc[i] == 0
1658 && reload_reg_rtx[i] == 0
1659 #ifdef SECONDARY_MEMORY_NEEDED
1660 /* Don't combine two reloads with different secondary
1661 memory locations. */
1662 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1663 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1664 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1665 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1667 && (SMALL_REGISTER_CLASSES
1668 ? (reload_reg_class[i] == reload_reg_class[output_reload])
1669 : (reg_class_subset_p (reload_reg_class[i],
1670 reload_reg_class[output_reload])
1671 || reg_class_subset_p (reload_reg_class[output_reload],
1672 reload_reg_class[i])))
1673 && (MATCHES (reload_in[i], reload_out[output_reload])
1674 /* Args reversed because the first arg seems to be
1675 the one that we imagine being modified
1676 while the second is the one that might be affected. */
1677 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1679 /* However, if the input is a register that appears inside
1680 the output, then we also can't share.
1681 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1682 If the same reload reg is used for both reg 69 and the
1683 result to be stored in memory, then that result
1684 will clobber the address of the memory ref. */
1685 && ! (GET_CODE (reload_in[i]) == REG
1686 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1687 reload_out[output_reload]))))
1688 && (reg_class_size[(int) reload_reg_class[i]]
1689 || SMALL_REGISTER_CLASSES)
1690 /* We will allow making things slightly worse by combining an
1691 input and an output, but no worse than that. */
1692 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1693 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1697 /* We have found a reload to combine with! */
1698 reload_out[i] = reload_out[output_reload];
1699 reload_out_reg[i] = reload_out_reg[output_reload];
1700 reload_outmode[i] = reload_outmode[output_reload];
1701 /* Mark the old output reload as inoperative. */
1702 reload_out[output_reload] = 0;
1703 /* The combined reload is needed for the entire insn. */
1704 reload_when_needed[i] = RELOAD_OTHER;
1705 /* If the output reload had a secondary reload, copy it. */
1706 if (reload_secondary_out_reload[output_reload] != -1)
1708 reload_secondary_out_reload[i]
1709 = reload_secondary_out_reload[output_reload];
1710 reload_secondary_out_icode[i]
1711 = reload_secondary_out_icode[output_reload];
1714 #ifdef SECONDARY_MEMORY_NEEDED
1715 /* Copy any secondary MEM. */
1716 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1717 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1718 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1720 /* If required, minimize the register class. */
1721 if (reg_class_subset_p (reload_reg_class[output_reload],
1722 reload_reg_class[i]))
1723 reload_reg_class[i] = reload_reg_class[output_reload];
1725 /* Transfer all replacements from the old reload to the combined. */
1726 for (j = 0; j < n_replacements; j++)
1727 if (replacements[j].what == output_reload)
1728 replacements[j].what = i;
1733 /* If this insn has only one operand that is modified or written (assumed
1734 to be the first), it must be the one corresponding to this reload. It
1735 is safe to use anything that dies in this insn for that output provided
1736 that it does not occur in the output (we already know it isn't an
1737 earlyclobber. If this is an asm insn, give up. */
1739 if (INSN_CODE (this_insn) == -1)
1742 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1743 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1744 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1747 /* See if some hard register that dies in this insn and is not used in
1748 the output is the right class. Only works if the register we pick
1749 up can fully hold our output reload. */
1750 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1751 if (REG_NOTE_KIND (note) == REG_DEAD
1752 && GET_CODE (XEXP (note, 0)) == REG
1753 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1754 reload_out[output_reload])
1755 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1756 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1757 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1758 REGNO (XEXP (note, 0)))
1759 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1760 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1761 /* Ensure that a secondary or tertiary reload for this output
1762 won't want this register. */
1763 && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1
1764 || (! (TEST_HARD_REG_BIT
1765 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1766 REGNO (XEXP (note, 0))))
1767 && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1
1768 || ! (TEST_HARD_REG_BIT
1769 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1770 REGNO (XEXP (note, 0)))))))
1771 && ! fixed_regs[REGNO (XEXP (note, 0))])
1773 reload_reg_rtx[output_reload]
1774 = gen_rtx_REG (reload_outmode[output_reload],
1775 REGNO (XEXP (note, 0)));
1780 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1781 See if one of IN and OUT is a register that may be used;
1782 this is desirable since a spill-register won't be needed.
1783 If so, return the register rtx that proves acceptable.
1785 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1786 CLASS is the register class required for the reload.
1788 If FOR_REAL is >= 0, it is the number of the reload,
1789 and in some cases when it can be discovered that OUT doesn't need
1790 to be computed, clear out reload_out[FOR_REAL].
1792 If FOR_REAL is -1, this should not be done, because this call
1793 is just to see if a register can be found, not to find and install it.
1795 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1796 puts an additional constraint on being able to use IN for OUT since
1797 IN must not appear elsewhere in the insn (it is assumed that IN itself
1798 is safe from the earlyclobber). */
1801 find_dummy_reload (real_in, real_out, inloc, outloc,
1802 inmode, outmode, class, for_real, earlyclobber)
1803 rtx real_in, real_out;
1804 rtx *inloc, *outloc;
1805 enum machine_mode inmode, outmode;
1806 enum reg_class class;
1816 /* If operands exceed a word, we can't use either of them
1817 unless they have the same size. */
1818 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1819 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1820 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1823 /* Find the inside of any subregs. */
1824 while (GET_CODE (out) == SUBREG)
1826 out_offset = SUBREG_WORD (out);
1827 out = SUBREG_REG (out);
1829 while (GET_CODE (in) == SUBREG)
1831 in_offset = SUBREG_WORD (in);
1832 in = SUBREG_REG (in);
1835 /* Narrow down the reg class, the same way push_reload will;
1836 otherwise we might find a dummy now, but push_reload won't. */
1837 class = PREFERRED_RELOAD_CLASS (in, class);
1839 /* See if OUT will do. */
1840 if (GET_CODE (out) == REG
1841 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1843 register int regno = REGNO (out) + out_offset;
1844 int nwords = HARD_REGNO_NREGS (regno, outmode);
1847 /* When we consider whether the insn uses OUT,
1848 ignore references within IN. They don't prevent us
1849 from copying IN into OUT, because those refs would
1850 move into the insn that reloads IN.
1852 However, we only ignore IN in its role as this reload.
1853 If the insn uses IN elsewhere and it contains OUT,
1854 that counts. We can't be sure it's the "same" operand
1855 so it might not go through this reload. */
1857 *inloc = const0_rtx;
1859 if (regno < FIRST_PSEUDO_REGISTER
1860 /* A fixed reg that can overlap other regs better not be used
1861 for reloading in any way. */
1862 #ifdef OVERLAPPING_REGNO_P
1863 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1865 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1866 PATTERN (this_insn), outloc))
1869 for (i = 0; i < nwords; i++)
1870 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1876 if (GET_CODE (real_out) == REG)
1879 value = gen_rtx_REG (outmode, regno);
1886 /* Consider using IN if OUT was not acceptable
1887 or if OUT dies in this insn (like the quotient in a divmod insn).
1888 We can't use IN unless it is dies in this insn,
1889 which means we must know accurately which hard regs are live.
1890 Also, the result can't go in IN if IN is used within OUT,
1891 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1892 if (hard_regs_live_known
1893 && GET_CODE (in) == REG
1894 && REGNO (in) < FIRST_PSEUDO_REGISTER
1896 || find_reg_note (this_insn, REG_UNUSED, real_out))
1897 && find_reg_note (this_insn, REG_DEAD, real_in)
1898 && !fixed_regs[REGNO (in)]
1899 && HARD_REGNO_MODE_OK (REGNO (in),
1900 /* The only case where out and real_out might
1901 have different modes is where real_out
1902 is a subreg, and in that case, out
1904 (GET_MODE (out) != VOIDmode
1905 ? GET_MODE (out) : outmode)))
1907 register int regno = REGNO (in) + in_offset;
1908 int nwords = HARD_REGNO_NREGS (regno, inmode);
1910 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1911 && ! hard_reg_set_here_p (regno, regno + nwords,
1912 PATTERN (this_insn))
1914 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1915 PATTERN (this_insn), inloc)))
1918 for (i = 0; i < nwords; i++)
1919 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1925 /* If we were going to use OUT as the reload reg
1926 and changed our mind, it means OUT is a dummy that
1927 dies here. So don't bother copying value to it. */
1928 if (for_real >= 0 && value == real_out)
1929 reload_out[for_real] = 0;
1930 if (GET_CODE (real_in) == REG)
1933 value = gen_rtx_REG (inmode, regno);
1941 /* This page contains subroutines used mainly for determining
1942 whether the IN or an OUT of a reload can serve as the
1945 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1948 earlyclobber_operand_p (x)
1953 for (i = 0; i < n_earlyclobbers; i++)
1954 if (reload_earlyclobbers[i] == x)
1960 /* Return 1 if expression X alters a hard reg in the range
1961 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1962 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1963 X should be the body of an instruction. */
1966 hard_reg_set_here_p (beg_regno, end_regno, x)
1967 register int beg_regno, end_regno;
1970 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1972 register rtx op0 = SET_DEST (x);
1973 while (GET_CODE (op0) == SUBREG)
1974 op0 = SUBREG_REG (op0);
1975 if (GET_CODE (op0) == REG)
1977 register int r = REGNO (op0);
1978 /* See if this reg overlaps range under consideration. */
1980 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1984 else if (GET_CODE (x) == PARALLEL)
1986 register int i = XVECLEN (x, 0) - 1;
1988 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1995 /* Return 1 if ADDR is a valid memory address for mode MODE,
1996 and check that each pseudo reg has the proper kind of
2000 strict_memory_address_p (mode, addr)
2001 enum machine_mode mode;
2004 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2011 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2012 if they are the same hard reg, and has special hacks for
2013 autoincrement and autodecrement.
2014 This is specifically intended for find_reloads to use
2015 in determining whether two operands match.
2016 X is the operand whose number is the lower of the two.
2018 The value is 2 if Y contains a pre-increment that matches
2019 a non-incrementing address in X. */
2021 /* ??? To be completely correct, we should arrange to pass
2022 for X the output operand and for Y the input operand.
2023 For now, we assume that the output operand has the lower number
2024 because that is natural in (SET output (... input ...)). */
2027 operands_match_p (x, y)
2031 register RTX_CODE code = GET_CODE (x);
2037 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2038 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2039 && GET_CODE (SUBREG_REG (y)) == REG)))
2045 i = REGNO (SUBREG_REG (x));
2046 if (i >= FIRST_PSEUDO_REGISTER)
2048 i += SUBREG_WORD (x);
2053 if (GET_CODE (y) == SUBREG)
2055 j = REGNO (SUBREG_REG (y));
2056 if (j >= FIRST_PSEUDO_REGISTER)
2058 j += SUBREG_WORD (y);
2063 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2064 multiple hard register group, so that for example (reg:DI 0) and
2065 (reg:SI 1) will be considered the same register. */
2066 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2067 && i < FIRST_PSEUDO_REGISTER)
2068 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
2069 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2070 && j < FIRST_PSEUDO_REGISTER)
2071 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
2075 /* If two operands must match, because they are really a single
2076 operand of an assembler insn, then two postincrements are invalid
2077 because the assembler insn would increment only once.
2078 On the other hand, an postincrement matches ordinary indexing
2079 if the postincrement is the output operand. */
2080 if (code == POST_DEC || code == POST_INC)
2081 return operands_match_p (XEXP (x, 0), y);
2082 /* Two preincrements are invalid
2083 because the assembler insn would increment only once.
2084 On the other hand, an preincrement matches ordinary indexing
2085 if the preincrement is the input operand.
2086 In this case, return 2, since some callers need to do special
2087 things when this happens. */
2088 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
2089 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2093 /* Now we have disposed of all the cases
2094 in which different rtx codes can match. */
2095 if (code != GET_CODE (y))
2097 if (code == LABEL_REF)
2098 return XEXP (x, 0) == XEXP (y, 0);
2099 if (code == SYMBOL_REF)
2100 return XSTR (x, 0) == XSTR (y, 0);
2102 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2104 if (GET_MODE (x) != GET_MODE (y))
2107 /* Compare the elements. If any pair of corresponding elements
2108 fail to match, return 0 for the whole things. */
2111 fmt = GET_RTX_FORMAT (code);
2112 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2118 if (XWINT (x, i) != XWINT (y, i))
2123 if (XINT (x, i) != XINT (y, i))
2128 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2131 /* If any subexpression returns 2,
2132 we should return 2 if we are successful. */
2141 if (XVECLEN (x, i) != XVECLEN (y, i))
2143 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2145 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2153 /* It is believed that rtx's at this level will never
2154 contain anything but integers and other rtx's,
2155 except for within LABEL_REFs and SYMBOL_REFs. */
2160 return 1 + success_2;
2163 /* Describe the range of registers or memory referenced by X.
2164 If X is a register, set REG_FLAG and put the first register
2165 number into START and the last plus one into END.
2166 If X is a memory reference, put a base address into BASE
2167 and a range of integer offsets into START and END.
2168 If X is pushing on the stack, we can assume it causes no trouble,
2169 so we set the SAFE field. */
2171 static struct decomposition
2175 struct decomposition val;
2181 if (GET_CODE (x) == MEM)
2183 rtx base, offset = 0;
2184 rtx addr = XEXP (x, 0);
2186 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2187 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2189 val.base = XEXP (addr, 0);
2190 val.start = - GET_MODE_SIZE (GET_MODE (x));
2191 val.end = GET_MODE_SIZE (GET_MODE (x));
2192 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2196 if (GET_CODE (addr) == CONST)
2198 addr = XEXP (addr, 0);
2201 if (GET_CODE (addr) == PLUS)
2203 if (CONSTANT_P (XEXP (addr, 0)))
2205 base = XEXP (addr, 1);
2206 offset = XEXP (addr, 0);
2208 else if (CONSTANT_P (XEXP (addr, 1)))
2210 base = XEXP (addr, 0);
2211 offset = XEXP (addr, 1);
2218 offset = const0_rtx;
2220 if (GET_CODE (offset) == CONST)
2221 offset = XEXP (offset, 0);
2222 if (GET_CODE (offset) == PLUS)
2224 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2226 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2227 offset = XEXP (offset, 0);
2229 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2231 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2232 offset = XEXP (offset, 1);
2236 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2237 offset = const0_rtx;
2240 else if (GET_CODE (offset) != CONST_INT)
2242 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2243 offset = const0_rtx;
2246 if (all_const && GET_CODE (base) == PLUS)
2247 base = gen_rtx_CONST (GET_MODE (base), base);
2249 if (GET_CODE (offset) != CONST_INT)
2252 val.start = INTVAL (offset);
2253 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2257 else if (GET_CODE (x) == REG)
2260 val.start = true_regnum (x);
2263 /* A pseudo with no hard reg. */
2264 val.start = REGNO (x);
2265 val.end = val.start + 1;
2269 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2271 else if (GET_CODE (x) == SUBREG)
2273 if (GET_CODE (SUBREG_REG (x)) != REG)
2274 /* This could be more precise, but it's good enough. */
2275 return decompose (SUBREG_REG (x));
2277 val.start = true_regnum (x);
2279 return decompose (SUBREG_REG (x));
2282 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2284 else if (CONSTANT_P (x)
2285 /* This hasn't been assigned yet, so it can't conflict yet. */
2286 || GET_CODE (x) == SCRATCH)
2293 /* Return 1 if altering Y will not modify the value of X.
2294 Y is also described by YDATA, which should be decompose (Y). */
2297 immune_p (x, y, ydata)
2299 struct decomposition ydata;
2301 struct decomposition xdata;
2304 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2308 if (GET_CODE (y) != MEM)
2310 /* If Y is memory and X is not, Y can't affect X. */
2311 if (GET_CODE (x) != MEM)
2314 xdata = decompose (x);
2316 if (! rtx_equal_p (xdata.base, ydata.base))
2318 /* If bases are distinct symbolic constants, there is no overlap. */
2319 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2321 /* Constants and stack slots never overlap. */
2322 if (CONSTANT_P (xdata.base)
2323 && (ydata.base == frame_pointer_rtx
2324 || ydata.base == hard_frame_pointer_rtx
2325 || ydata.base == stack_pointer_rtx))
2327 if (CONSTANT_P (ydata.base)
2328 && (xdata.base == frame_pointer_rtx
2329 || xdata.base == hard_frame_pointer_rtx
2330 || xdata.base == stack_pointer_rtx))
2332 /* If either base is variable, we don't know anything. */
2337 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2340 /* Similar, but calls decompose. */
2343 safe_from_earlyclobber (op, clobber)
2346 struct decomposition early_data;
2348 early_data = decompose (clobber);
2349 return immune_p (op, clobber, early_data);
2352 /* Main entry point of this file: search the body of INSN
2353 for values that need reloading and record them with push_reload.
2354 REPLACE nonzero means record also where the values occur
2355 so that subst_reloads can be used.
2357 IND_LEVELS says how many levels of indirection are supported by this
2358 machine; a value of zero means that a memory reference is not a valid
2361 LIVE_KNOWN says we have valid information about which hard
2362 regs are live at each point in the program; this is true when
2363 we are called from global_alloc but false when stupid register
2364 allocation has been done.
2366 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2367 which is nonnegative if the reg has been commandeered for reloading into.
2368 It is copied into STATIC_RELOAD_REG_P and referenced from there
2369 by various subroutines.
2371 Return TRUE if some operands need to be changed, because of swapping
2372 commutative operands, reg_equiv_address substitution, or whatever. */
2375 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2377 int replace, ind_levels;
2379 short *reload_reg_p;
2381 #ifdef REGISTER_CONSTRAINTS
2383 register int insn_code_number;
2386 /* These start out as the constraints for the insn
2387 and they are chewed up as we consider alternatives. */
2388 char *constraints[MAX_RECOG_OPERANDS];
2389 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2391 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2392 char pref_or_nothing[MAX_RECOG_OPERANDS];
2393 /* Nonzero for a MEM operand whose entire address needs a reload. */
2394 int address_reloaded[MAX_RECOG_OPERANDS];
2395 /* Value of enum reload_type to use for operand. */
2396 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2397 /* Value of enum reload_type to use within address of operand. */
2398 enum reload_type address_type[MAX_RECOG_OPERANDS];
2399 /* Save the usage of each operand. */
2400 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2401 int no_input_reloads = 0, no_output_reloads = 0;
2403 int this_alternative[MAX_RECOG_OPERANDS];
2404 char this_alternative_win[MAX_RECOG_OPERANDS];
2405 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2406 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2407 int this_alternative_matches[MAX_RECOG_OPERANDS];
2409 int goal_alternative[MAX_RECOG_OPERANDS];
2410 int this_alternative_number;
2411 int goal_alternative_number;
2412 int operand_reloadnum[MAX_RECOG_OPERANDS];
2413 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2414 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2415 char goal_alternative_win[MAX_RECOG_OPERANDS];
2416 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2417 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2418 int goal_alternative_swapped;
2422 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2423 rtx substed_operand[MAX_RECOG_OPERANDS];
2424 rtx body = PATTERN (insn);
2425 rtx set = single_set (insn);
2426 int goal_earlyclobber, this_earlyclobber;
2427 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2429 /* Cache the last regno for the last pseudo we did an output reload
2430 for in case the next insn uses it. */
2431 static int last_output_reload_regno = -1;
2436 n_earlyclobbers = 0;
2437 replace_reloads = replace;
2438 hard_regs_live_known = live_known;
2439 static_reload_reg_p = reload_reg_p;
2441 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2442 neither are insns that SET cc0. Insns that use CC0 are not allowed
2443 to have any input reloads. */
2444 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2445 no_output_reloads = 1;
2448 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2449 no_input_reloads = 1;
2450 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2451 no_output_reloads = 1;
2454 #ifdef SECONDARY_MEMORY_NEEDED
2455 /* The eliminated forms of any secondary memory locations are per-insn, so
2456 clear them out here. */
2458 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2461 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2462 is cheap to move between them. If it is not, there may not be an insn
2463 to do the copy, so we may need a reload. */
2464 if (GET_CODE (body) == SET
2465 && GET_CODE (SET_DEST (body)) == REG
2466 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2467 && GET_CODE (SET_SRC (body)) == REG
2468 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2469 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2470 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2473 extract_insn (insn);
2475 noperands = reload_n_operands = recog_n_operands;
2476 n_alternatives = recog_n_alternatives;
2478 /* Just return "no reloads" if insn has no operands with constraints. */
2479 if (noperands == 0 || n_alternatives == 0)
2482 insn_code_number = INSN_CODE (insn);
2483 this_insn_is_asm = insn_code_number < 0;
2485 bcopy ((char *) recog_operand_mode, (char *) operand_mode,
2486 noperands * sizeof (enum machine_mode));
2487 bcopy ((char *) recog_constraints, (char *) constraints,
2488 noperands * sizeof (char *));
2492 /* If we will need to know, later, whether some pair of operands
2493 are the same, we must compare them now and save the result.
2494 Reloading the base and index registers will clobber them
2495 and afterward they will fail to match. */
2497 for (i = 0; i < noperands; i++)
2502 substed_operand[i] = recog_operand[i];
2505 modified[i] = RELOAD_READ;
2507 /* Scan this operand's constraint to see if it is an output operand,
2508 an in-out operand, is commutative, or should match another. */
2513 modified[i] = RELOAD_WRITE;
2515 modified[i] = RELOAD_READ_WRITE;
2518 /* The last operand should not be marked commutative. */
2519 if (i == noperands - 1)
2524 else if (c >= '0' && c <= '9')
2527 operands_match[c][i]
2528 = operands_match_p (recog_operand[c], recog_operand[i]);
2530 /* An operand may not match itself. */
2534 /* If C can be commuted with C+1, and C might need to match I,
2535 then C+1 might also need to match I. */
2536 if (commutative >= 0)
2538 if (c == commutative || c == commutative + 1)
2540 int other = c + (c == commutative ? 1 : -1);
2541 operands_match[other][i]
2542 = operands_match_p (recog_operand[other], recog_operand[i]);
2544 if (i == commutative || i == commutative + 1)
2546 int other = i + (i == commutative ? 1 : -1);
2547 operands_match[c][other]
2548 = operands_match_p (recog_operand[c], recog_operand[other]);
2550 /* Note that C is supposed to be less than I.
2551 No need to consider altering both C and I because in
2552 that case we would alter one into the other. */
2558 /* Examine each operand that is a memory reference or memory address
2559 and reload parts of the addresses into index registers.
2560 Also here any references to pseudo regs that didn't get hard regs
2561 but are equivalent to constants get replaced in the insn itself
2562 with those constants. Nobody will ever see them again.
2564 Finally, set up the preferred classes of each operand. */
2566 for (i = 0; i < noperands; i++)
2568 register RTX_CODE code = GET_CODE (recog_operand[i]);
2570 address_reloaded[i] = 0;
2571 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2572 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2575 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2576 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2579 if (*constraints[i] == 0)
2580 /* Ignore things like match_operator operands. */
2582 else if (constraints[i][0] == 'p')
2584 find_reloads_address (VOIDmode, NULL_PTR,
2585 recog_operand[i], recog_operand_loc[i],
2586 i, operand_type[i], ind_levels, insn);
2588 /* If we now have a simple operand where we used to have a
2589 PLUS or MULT, re-recognize and try again. */
2590 if ((GET_RTX_CLASS (GET_CODE (*recog_operand_loc[i])) == 'o'
2591 || GET_CODE (*recog_operand_loc[i]) == SUBREG)
2592 && (GET_CODE (recog_operand[i]) == MULT
2593 || GET_CODE (recog_operand[i]) == PLUS))
2595 INSN_CODE (insn) = -1;
2596 retval = find_reloads (insn, replace, ind_levels, live_known,
2601 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2603 else if (code == MEM)
2605 if (find_reloads_address (GET_MODE (recog_operand[i]),
2606 recog_operand_loc[i],
2607 XEXP (recog_operand[i], 0),
2608 &XEXP (recog_operand[i], 0),
2609 i, address_type[i], ind_levels, insn))
2610 address_reloaded[i] = 1;
2611 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2613 else if (code == SUBREG)
2615 rtx reg = SUBREG_REG (recog_operand[i]);
2617 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2620 && &SET_DEST (set) == recog_operand_loc[i],
2623 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2624 that didn't get a hard register, emit a USE with a REG_EQUAL
2625 note in front so that we might inherit a previous, possibly
2629 && GET_CODE (op) == MEM
2630 && GET_CODE (reg) == REG
2631 && (GET_MODE_SIZE (GET_MODE (reg))
2632 >= GET_MODE_SIZE (GET_MODE (op))))
2633 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode, reg), insn))
2634 = gen_rtx_EXPR_LIST (REG_EQUAL,
2635 reg_equiv_memory_loc[REGNO (reg)], NULL_RTX);
2637 substed_operand[i] = recog_operand[i] = op;
2639 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2640 /* We can get a PLUS as an "operand" as a result of register
2641 elimination. See eliminate_regs and gen_reload. We handle
2642 a unary operator by reloading the operand. */
2643 substed_operand[i] = recog_operand[i]
2644 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2645 ind_levels, 0, insn);
2646 else if (code == REG)
2648 /* This is equivalent to calling find_reloads_toplev.
2649 The code is duplicated for speed.
2650 When we find a pseudo always equivalent to a constant,
2651 we replace it by the constant. We must be sure, however,
2652 that we don't try to replace it in the insn in which it
2654 register int regno = REGNO (recog_operand[i]);
2655 if (reg_equiv_constant[regno] != 0
2656 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2658 /* Record the existing mode so that the check if constants are
2659 allowed will work when operand_mode isn't specified. */
2661 if (operand_mode[i] == VOIDmode)
2662 operand_mode[i] = GET_MODE (recog_operand[i]);
2664 substed_operand[i] = recog_operand[i]
2665 = reg_equiv_constant[regno];
2667 if (reg_equiv_memory_loc[regno] != 0
2668 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2669 /* We need not give a valid is_set_dest argument since the case
2670 of a constant equivalence was checked above. */
2671 substed_operand[i] = recog_operand[i]
2672 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2673 ind_levels, 0, insn);
2675 /* If the operand is still a register (we didn't replace it with an
2676 equivalent), get the preferred class to reload it into. */
2677 code = GET_CODE (recog_operand[i]);
2679 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2680 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2682 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2683 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2686 /* If this is simply a copy from operand 1 to operand 0, merge the
2687 preferred classes for the operands. */
2688 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2689 && recog_operand[1] == SET_SRC (set))
2691 preferred_class[0] = preferred_class[1]
2692 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2693 pref_or_nothing[0] |= pref_or_nothing[1];
2694 pref_or_nothing[1] |= pref_or_nothing[0];
2697 /* Now see what we need for pseudo-regs that didn't get hard regs
2698 or got the wrong kind of hard reg. For this, we must consider
2699 all the operands together against the register constraints. */
2701 best = MAX_RECOG_OPERANDS * 2 + 600;
2704 goal_alternative_swapped = 0;
2707 /* The constraints are made of several alternatives.
2708 Each operand's constraint looks like foo,bar,... with commas
2709 separating the alternatives. The first alternatives for all
2710 operands go together, the second alternatives go together, etc.
2712 First loop over alternatives. */
2714 for (this_alternative_number = 0;
2715 this_alternative_number < n_alternatives;
2716 this_alternative_number++)
2718 /* Loop over operands for one constraint alternative. */
2719 /* LOSERS counts those that don't fit this alternative
2720 and would require loading. */
2722 /* BAD is set to 1 if it some operand can't fit this alternative
2723 even after reloading. */
2725 /* REJECT is a count of how undesirable this alternative says it is
2726 if any reloading is required. If the alternative matches exactly
2727 then REJECT is ignored, but otherwise it gets this much
2728 counted against it in addition to the reloading needed. Each
2729 ? counts three times here since we want the disparaging caused by
2730 a bad register class to only count 1/3 as much. */
2733 this_earlyclobber = 0;
2735 for (i = 0; i < noperands; i++)
2737 register char *p = constraints[i];
2738 register int win = 0;
2739 /* 0 => this operand can be reloaded somehow for this alternative */
2741 /* 0 => this operand can be reloaded if the alternative allows regs. */
2744 register rtx operand = recog_operand[i];
2746 /* Nonzero means this is a MEM that must be reloaded into a reg
2747 regardless of what the constraint says. */
2748 int force_reload = 0;
2750 /* Nonzero if a constant forced into memory would be OK for this
2753 int earlyclobber = 0;
2755 /* If the predicate accepts a unary operator, it means that
2756 we need to reload the operand, but do not do this for
2757 match_operator and friends. */
2758 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2759 operand = XEXP (operand, 0);
2761 /* If the operand is a SUBREG, extract
2762 the REG or MEM (or maybe even a constant) within.
2763 (Constants can occur as a result of reg_equiv_constant.) */
2765 while (GET_CODE (operand) == SUBREG)
2767 offset += SUBREG_WORD (operand);
2768 operand = SUBREG_REG (operand);
2769 /* Force reload if this is a constant or PLUS or if there may
2770 be a problem accessing OPERAND in the outer mode. */
2771 if (CONSTANT_P (operand)
2772 || GET_CODE (operand) == PLUS
2773 /* We must force a reload of paradoxical SUBREGs
2774 of a MEM because the alignment of the inner value
2775 may not be enough to do the outer reference. On
2776 big-endian machines, it may also reference outside
2779 On machines that extend byte operations and we have a
2780 SUBREG where both the inner and outer modes are no wider
2781 than a word and the inner mode is narrower, is integral,
2782 and gets extended when loaded from memory, combine.c has
2783 made assumptions about the behavior of the machine in such
2784 register access. If the data is, in fact, in memory we
2785 must always load using the size assumed to be in the
2786 register and let the insn do the different-sized
2789 This is doubly true if WORD_REGISTER_OPERATIONS. In
2790 this case eliminate_regs has left non-paradoxical
2791 subregs for push_reloads to see. Make sure it does
2792 by forcing the reload.
2794 ??? When is it right at this stage to have a subreg
2795 of a mem that is _not_ to be handled specialy? IMO
2796 those should have been reduced to just a mem. */
2797 || ((GET_CODE (operand) == MEM
2798 || (GET_CODE (operand)== REG
2799 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2800 #ifndef WORD_REGISTER_OPERATIONS
2801 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2802 < BIGGEST_ALIGNMENT)
2803 && (GET_MODE_SIZE (operand_mode[i])
2804 > GET_MODE_SIZE (GET_MODE (operand))))
2805 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2806 #ifdef LOAD_EXTEND_OP
2807 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2808 && (GET_MODE_SIZE (GET_MODE (operand))
2810 && (GET_MODE_SIZE (operand_mode[i])
2811 > GET_MODE_SIZE (GET_MODE (operand)))
2812 && INTEGRAL_MODE_P (GET_MODE (operand))
2813 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2818 /* Subreg of a hard reg which can't handle the subreg's mode
2819 or which would handle that mode in the wrong number of
2820 registers for subregging to work. */
2821 || (GET_CODE (operand) == REG
2822 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2823 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2824 && (GET_MODE_SIZE (GET_MODE (operand))
2826 && ((GET_MODE_SIZE (GET_MODE (operand))
2828 != HARD_REGNO_NREGS (REGNO (operand),
2829 GET_MODE (operand))))
2830 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2835 this_alternative[i] = (int) NO_REGS;
2836 this_alternative_win[i] = 0;
2837 this_alternative_offmemok[i] = 0;
2838 this_alternative_earlyclobber[i] = 0;
2839 this_alternative_matches[i] = -1;
2841 /* An empty constraint or empty alternative
2842 allows anything which matched the pattern. */
2843 if (*p == 0 || *p == ',')
2846 /* Scan this alternative's specs for this operand;
2847 set WIN if the operand fits any letter in this alternative.
2848 Otherwise, clear BADOP if this operand could
2849 fit some letter after reloads,
2850 or set WINREG if this operand could fit after reloads
2851 provided the constraint allows some registers. */
2853 while (*p && (c = *p++) != ',')
2862 /* The last operand should not be marked commutative. */
2863 if (i != noperands - 1)
2876 /* Ignore rest of this alternative as far as
2877 reloading is concerned. */
2878 while (*p && *p != ',') p++;
2887 this_alternative_matches[i] = c;
2888 /* We are supposed to match a previous operand.
2889 If we do, we win if that one did.
2890 If we do not, count both of the operands as losers.
2891 (This is too conservative, since most of the time
2892 only a single reload insn will be needed to make
2893 the two operands win. As a result, this alternative
2894 may be rejected when it is actually desirable.) */
2895 if ((swapped && (c != commutative || i != commutative + 1))
2896 /* If we are matching as if two operands were swapped,
2897 also pretend that operands_match had been computed
2899 But if I is the second of those and C is the first,
2900 don't exchange them, because operands_match is valid
2901 only on one side of its diagonal. */
2903 [(c == commutative || c == commutative + 1)
2904 ? 2*commutative + 1 - c : c]
2905 [(i == commutative || i == commutative + 1)
2906 ? 2*commutative + 1 - i : i])
2907 : operands_match[c][i])
2909 /* If we are matching a non-offsettable address where an
2910 offsettable address was expected, then we must reject
2911 this combination, because we can't reload it. */
2912 if (this_alternative_offmemok[c]
2913 && GET_CODE (recog_operand[c]) == MEM
2914 && this_alternative[c] == (int) NO_REGS
2915 && ! this_alternative_win[c])
2918 win = this_alternative_win[c];
2922 /* Operands don't match. */
2924 /* Retroactively mark the operand we had to match
2925 as a loser, if it wasn't already. */
2926 if (this_alternative_win[c])
2928 this_alternative_win[c] = 0;
2929 if (this_alternative[c] == (int) NO_REGS)
2931 /* But count the pair only once in the total badness of
2932 this alternative, if the pair can be a dummy reload. */
2934 = find_dummy_reload (recog_operand[i], recog_operand[c],
2935 recog_operand_loc[i], recog_operand_loc[c],
2936 operand_mode[i], operand_mode[c],
2937 this_alternative[c], -1,
2938 this_alternative_earlyclobber[c]);
2943 /* This can be fixed with reloads if the operand
2944 we are supposed to match can be fixed with reloads. */
2946 this_alternative[i] = this_alternative[c];
2948 /* If we have to reload this operand and some previous
2949 operand also had to match the same thing as this
2950 operand, we don't know how to do that. So reject this
2952 if (! win || force_reload)
2953 for (j = 0; j < i; j++)
2954 if (this_alternative_matches[j]
2955 == this_alternative_matches[i])
2961 /* All necessary reloads for an address_operand
2962 were handled in find_reloads_address. */
2963 this_alternative[i] = (int) BASE_REG_CLASS;
2970 if (GET_CODE (operand) == MEM
2971 || (GET_CODE (operand) == REG
2972 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2973 && reg_renumber[REGNO (operand)] < 0))
2975 if (CONSTANT_P (operand)
2976 /* force_const_mem does not accept HIGH. */
2977 && GET_CODE (operand) != HIGH)
2983 if (GET_CODE (operand) == MEM
2984 && ! address_reloaded[i]
2985 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2986 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2991 if (GET_CODE (operand) == MEM
2992 && ! address_reloaded[i]
2993 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2994 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2998 /* Memory operand whose address is not offsettable. */
3002 if (GET_CODE (operand) == MEM
3003 && ! (ind_levels ? offsettable_memref_p (operand)
3004 : offsettable_nonstrict_memref_p (operand))
3005 /* Certain mem addresses will become offsettable
3006 after they themselves are reloaded. This is important;
3007 we don't want our own handling of unoffsettables
3008 to override the handling of reg_equiv_address. */
3009 && !(GET_CODE (XEXP (operand, 0)) == REG
3011 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3015 /* Memory operand whose address is offsettable. */
3019 if ((GET_CODE (operand) == MEM
3020 /* If IND_LEVELS, find_reloads_address won't reload a
3021 pseudo that didn't get a hard reg, so we have to
3022 reject that case. */
3023 && (ind_levels ? offsettable_memref_p (operand)
3024 : offsettable_nonstrict_memref_p (operand)))
3025 /* A reloaded auto-increment address is offsettable,
3026 because it is now just a simple register indirect. */
3027 || (GET_CODE (operand) == MEM
3028 && address_reloaded[i]
3029 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3030 || GET_CODE (XEXP (operand, 0)) == PRE_DEC
3031 || GET_CODE (XEXP (operand, 0)) == POST_INC
3032 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3033 /* Certain mem addresses will become offsettable
3034 after they themselves are reloaded. This is important;
3035 we don't want our own handling of unoffsettables
3036 to override the handling of reg_equiv_address. */
3037 || (GET_CODE (operand) == MEM
3038 && GET_CODE (XEXP (operand, 0)) == REG
3040 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
3041 || (GET_CODE (operand) == REG
3042 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3043 && reg_renumber[REGNO (operand)] < 0
3044 /* If reg_equiv_address is nonzero, we will be
3045 loading it into a register; hence it will be
3046 offsettable, but we cannot say that reg_equiv_mem
3047 is offsettable without checking. */
3048 && ((reg_equiv_mem[REGNO (operand)] != 0
3049 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3050 || (reg_equiv_address[REGNO (operand)] != 0))))
3052 /* force_const_mem does not accept HIGH. */
3053 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3054 || GET_CODE (operand) == MEM)
3061 /* Output operand that is stored before the need for the
3062 input operands (and their index registers) is over. */
3063 earlyclobber = 1, this_earlyclobber = 1;
3067 #ifndef REAL_ARITHMETIC
3068 /* Match any floating double constant, but only if
3069 we can examine the bits of it reliably. */
3070 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3071 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3072 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
3075 if (GET_CODE (operand) == CONST_DOUBLE)
3080 if (GET_CODE (operand) == CONST_DOUBLE)
3086 if (GET_CODE (operand) == CONST_DOUBLE
3087 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3092 if (GET_CODE (operand) == CONST_INT
3093 || (GET_CODE (operand) == CONST_DOUBLE
3094 && GET_MODE (operand) == VOIDmode))
3097 if (CONSTANT_P (operand)
3098 #ifdef LEGITIMATE_PIC_OPERAND_P
3099 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3106 if (GET_CODE (operand) == CONST_INT
3107 || (GET_CODE (operand) == CONST_DOUBLE
3108 && GET_MODE (operand) == VOIDmode))
3120 if (GET_CODE (operand) == CONST_INT
3121 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3131 /* A PLUS is never a valid operand, but reload can make
3132 it from a register when eliminating registers. */
3133 && GET_CODE (operand) != PLUS
3134 /* A SCRATCH is not a valid operand. */
3135 && GET_CODE (operand) != SCRATCH
3136 #ifdef LEGITIMATE_PIC_OPERAND_P
3137 && (! CONSTANT_P (operand)
3139 || LEGITIMATE_PIC_OPERAND_P (operand))
3141 && (GENERAL_REGS == ALL_REGS
3142 || GET_CODE (operand) != REG
3143 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3144 && reg_renumber[REGNO (operand)] < 0)))
3146 /* Drop through into 'r' case */
3150 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3153 #ifdef EXTRA_CONSTRAINT
3159 if (EXTRA_CONSTRAINT (operand, c))
3166 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3169 if (GET_MODE (operand) == BLKmode)
3172 if (GET_CODE (operand) == REG
3173 && reg_fits_class_p (operand, this_alternative[i],
3174 offset, GET_MODE (recog_operand[i])))
3181 /* If this operand could be handled with a reg,
3182 and some reg is allowed, then this operand can be handled. */
3183 if (winreg && this_alternative[i] != (int) NO_REGS)
3186 /* Record which operands fit this alternative. */
3187 this_alternative_earlyclobber[i] = earlyclobber;
3188 if (win && ! force_reload)
3189 this_alternative_win[i] = 1;
3192 int const_to_mem = 0;
3194 this_alternative_offmemok[i] = offmemok;
3198 /* Alternative loses if it has no regs for a reg operand. */
3199 if (GET_CODE (operand) == REG
3200 && this_alternative[i] == (int) NO_REGS
3201 && this_alternative_matches[i] < 0)
3205 /* If this is a pseudo-register that is set in the previous
3206 insns, there's a good chance that it will already be in a
3207 spill register and we can use that spill register. So
3208 make this case cheaper.
3210 Disabled for egcs. egcs has better inheritance code and
3211 this change causes problems with the improved reload
3212 inheritance code. */
3213 if (GET_CODE (operand) == REG
3214 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3215 && REGNO (operand) == last_output_reload_regno)
3219 /* If this is a constant that is reloaded into the desired
3220 class by copying it to memory first, count that as another
3221 reload. This is consistent with other code and is
3222 required to avoid choosing another alternative when
3223 the constant is moved into memory by this function on
3224 an early reload pass. Note that the test here is
3225 precisely the same as in the code below that calls
3227 if (CONSTANT_P (operand)
3228 /* force_const_mem does not accept HIGH. */
3229 && GET_CODE (operand) != HIGH
3230 && ((PREFERRED_RELOAD_CLASS (operand,
3231 (enum reg_class) this_alternative[i])
3233 || no_input_reloads)
3234 && operand_mode[i] != VOIDmode)
3237 if (this_alternative[i] != (int) NO_REGS)
3241 /* If we can't reload this value at all, reject this
3242 alternative. Note that we could also lose due to
3243 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3246 if (! CONSTANT_P (operand)
3247 && (enum reg_class) this_alternative[i] != NO_REGS
3248 && (PREFERRED_RELOAD_CLASS (operand,
3249 (enum reg_class) this_alternative[i])
3253 /* Alternative loses if it requires a type of reload not
3254 permitted for this insn. We can always reload SCRATCH
3255 and objects with a REG_UNUSED note. */
3256 else if (GET_CODE (operand) != SCRATCH
3257 && modified[i] != RELOAD_READ && no_output_reloads
3258 && ! find_reg_note (insn, REG_UNUSED, operand))
3260 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3265 /* We prefer to reload pseudos over reloading other things,
3266 since such reloads may be able to be eliminated later.
3267 If we are reloading a SCRATCH, we won't be generating any
3268 insns, just using a register, so it is also preferred.
3269 So bump REJECT in other cases. Don't do this in the
3270 case where we are forcing a constant into memory and
3271 it will then win since we don't want to have a different
3272 alternative match then. */
3273 if (! (GET_CODE (operand) == REG
3274 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3275 && GET_CODE (operand) != SCRATCH
3276 && ! (const_to_mem && constmemok))
3279 /* Input reloads can be inherited more often than output
3280 reloads can be removed, so penalize output reloads. */
3281 if (operand_type[i] != RELOAD_FOR_INPUT
3282 && GET_CODE (operand) != SCRATCH)
3286 /* If this operand is a pseudo register that didn't get a hard
3287 reg and this alternative accepts some register, see if the
3288 class that we want is a subset of the preferred class for this
3289 register. If not, but it intersects that class, use the
3290 preferred class instead. If it does not intersect the preferred
3291 class, show that usage of this alternative should be discouraged;
3292 it will be discouraged more still if the register is `preferred
3293 or nothing'. We do this because it increases the chance of
3294 reusing our spill register in a later insn and avoiding a pair
3295 of memory stores and loads.
3297 Don't bother with this if this alternative will accept this
3300 Don't do this for a multiword operand, since it is only a
3301 small win and has the risk of requiring more spill registers,
3302 which could cause a large loss.
3304 Don't do this if the preferred class has only one register
3305 because we might otherwise exhaust the class. */
3308 if (! win && this_alternative[i] != (int) NO_REGS
3309 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3310 && reg_class_size[(int) preferred_class[i]] > 1)
3312 if (! reg_class_subset_p (this_alternative[i],
3313 preferred_class[i]))
3315 /* Since we don't have a way of forming the intersection,
3316 we just do something special if the preferred class
3317 is a subset of the class we have; that's the most
3318 common case anyway. */
3319 if (reg_class_subset_p (preferred_class[i],
3320 this_alternative[i]))
3321 this_alternative[i] = (int) preferred_class[i];
3323 reject += (2 + 2 * pref_or_nothing[i]);
3328 /* Now see if any output operands that are marked "earlyclobber"
3329 in this alternative conflict with any input operands
3330 or any memory addresses. */
3332 for (i = 0; i < noperands; i++)
3333 if (this_alternative_earlyclobber[i]
3334 && this_alternative_win[i])
3336 struct decomposition early_data;
3338 early_data = decompose (recog_operand[i]);
3340 if (modified[i] == RELOAD_READ)
3343 if (this_alternative[i] == NO_REGS)
3345 this_alternative_earlyclobber[i] = 0;
3346 if (this_insn_is_asm)
3347 error_for_asm (this_insn,
3348 "`&' constraint used with no register class");
3353 for (j = 0; j < noperands; j++)
3354 /* Is this an input operand or a memory ref? */
3355 if ((GET_CODE (recog_operand[j]) == MEM
3356 || modified[j] != RELOAD_WRITE)
3358 /* Ignore things like match_operator operands. */
3359 && *recog_constraints[j] != 0
3360 /* Don't count an input operand that is constrained to match
3361 the early clobber operand. */
3362 && ! (this_alternative_matches[j] == i
3363 && rtx_equal_p (recog_operand[i], recog_operand[j]))
3364 /* Is it altered by storing the earlyclobber operand? */
3365 && !immune_p (recog_operand[j], recog_operand[i], early_data))
3367 /* If the output is in a single-reg class,
3368 it's costly to reload it, so reload the input instead. */
3369 if (reg_class_size[this_alternative[i]] == 1
3370 && (GET_CODE (recog_operand[j]) == REG
3371 || GET_CODE (recog_operand[j]) == SUBREG))
3374 this_alternative_win[j] = 0;
3379 /* If an earlyclobber operand conflicts with something,
3380 it must be reloaded, so request this and count the cost. */
3384 this_alternative_win[i] = 0;
3385 for (j = 0; j < noperands; j++)
3386 if (this_alternative_matches[j] == i
3387 && this_alternative_win[j])
3389 this_alternative_win[j] = 0;
3395 /* If one alternative accepts all the operands, no reload required,
3396 choose that alternative; don't consider the remaining ones. */
3399 /* Unswap these so that they are never swapped at `finish'. */
3400 if (commutative >= 0)
3402 recog_operand[commutative] = substed_operand[commutative];
3403 recog_operand[commutative + 1]
3404 = substed_operand[commutative + 1];
3406 for (i = 0; i < noperands; i++)
3408 goal_alternative_win[i] = 1;
3409 goal_alternative[i] = this_alternative[i];
3410 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3411 goal_alternative_matches[i] = this_alternative_matches[i];
3412 goal_alternative_earlyclobber[i]
3413 = this_alternative_earlyclobber[i];
3415 goal_alternative_number = this_alternative_number;
3416 goal_alternative_swapped = swapped;
3417 goal_earlyclobber = this_earlyclobber;
3421 /* REJECT, set by the ! and ? constraint characters and when a register
3422 would be reloaded into a non-preferred class, discourages the use of
3423 this alternative for a reload goal. REJECT is incremented by six
3424 for each ? and two for each non-preferred class. */
3425 losers = losers * 6 + reject;
3427 /* If this alternative can be made to work by reloading,
3428 and it needs less reloading than the others checked so far,
3429 record it as the chosen goal for reloading. */
3430 if (! bad && best > losers)
3432 for (i = 0; i < noperands; i++)
3434 goal_alternative[i] = this_alternative[i];
3435 goal_alternative_win[i] = this_alternative_win[i];
3436 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3437 goal_alternative_matches[i] = this_alternative_matches[i];
3438 goal_alternative_earlyclobber[i]
3439 = this_alternative_earlyclobber[i];
3441 goal_alternative_swapped = swapped;
3443 goal_alternative_number = this_alternative_number;
3444 goal_earlyclobber = this_earlyclobber;
3448 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3449 then we need to try each alternative twice,
3450 the second time matching those two operands
3451 as if we had exchanged them.
3452 To do this, really exchange them in operands.
3454 If we have just tried the alternatives the second time,
3455 return operands to normal and drop through. */
3457 if (commutative >= 0)
3462 register enum reg_class tclass;
3465 recog_operand[commutative] = substed_operand[commutative + 1];
3466 recog_operand[commutative + 1] = substed_operand[commutative];
3468 tclass = preferred_class[commutative];
3469 preferred_class[commutative] = preferred_class[commutative + 1];
3470 preferred_class[commutative + 1] = tclass;
3472 t = pref_or_nothing[commutative];
3473 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3474 pref_or_nothing[commutative + 1] = t;
3476 bcopy ((char *) recog_constraints, (char *) constraints,
3477 noperands * sizeof (char *));
3482 recog_operand[commutative] = substed_operand[commutative];
3483 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3487 /* The operands don't meet the constraints.
3488 goal_alternative describes the alternative
3489 that we could reach by reloading the fewest operands.
3490 Reload so as to fit it. */
3492 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3494 /* No alternative works with reloads?? */
3495 if (insn_code_number >= 0)
3496 fatal_insn ("Unable to generate reloads for:", insn);
3497 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3498 /* Avoid further trouble with this insn. */
3499 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3504 /* Jump to `finish' from above if all operands are valid already.
3505 In that case, goal_alternative_win is all 1. */
3508 /* Right now, for any pair of operands I and J that are required to match,
3510 goal_alternative_matches[J] is I.
3511 Set up goal_alternative_matched as the inverse function:
3512 goal_alternative_matched[I] = J. */
3514 for (i = 0; i < noperands; i++)
3515 goal_alternative_matched[i] = -1;
3517 for (i = 0; i < noperands; i++)
3518 if (! goal_alternative_win[i]
3519 && goal_alternative_matches[i] >= 0)
3520 goal_alternative_matched[goal_alternative_matches[i]] = i;
3522 /* If the best alternative is with operands 1 and 2 swapped,
3523 consider them swapped before reporting the reloads. Update the
3524 operand numbers of any reloads already pushed. */
3526 if (goal_alternative_swapped)
3530 tem = substed_operand[commutative];
3531 substed_operand[commutative] = substed_operand[commutative + 1];
3532 substed_operand[commutative + 1] = tem;
3533 tem = recog_operand[commutative];
3534 recog_operand[commutative] = recog_operand[commutative + 1];
3535 recog_operand[commutative + 1] = tem;
3536 tem = *recog_operand_loc[commutative];
3537 *recog_operand_loc[commutative] = *recog_operand_loc[commutative+1];
3538 *recog_operand_loc[commutative+1] = tem;
3540 for (i = 0; i < n_reloads; i++)
3542 if (reload_opnum[i] == commutative)
3543 reload_opnum[i] = commutative + 1;
3544 else if (reload_opnum[i] == commutative + 1)
3545 reload_opnum[i] = commutative;
3549 for (i = 0; i < noperands; i++)
3551 operand_reloadnum[i] = -1;
3553 /* If this is an earlyclobber operand, we need to widen the scope.
3554 The reload must remain valid from the start of the insn being
3555 reloaded until after the operand is stored into its destination.
3556 We approximate this with RELOAD_OTHER even though we know that we
3557 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3559 One special case that is worth checking is when we have an
3560 output that is earlyclobber but isn't used past the insn (typically
3561 a SCRATCH). In this case, we only need have the reload live
3562 through the insn itself, but not for any of our input or output
3564 But we must not accidentally narrow the scope of an existing
3565 RELOAD_OTHER reload - leave these alone.
3567 In any case, anything needed to address this operand can remain
3568 however they were previously categorized. */
3570 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3572 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3573 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3576 /* Any constants that aren't allowed and can't be reloaded
3577 into registers are here changed into memory references. */
3578 for (i = 0; i < noperands; i++)
3579 if (! goal_alternative_win[i]
3580 && CONSTANT_P (recog_operand[i])
3581 /* force_const_mem does not accept HIGH. */
3582 && GET_CODE (recog_operand[i]) != HIGH
3583 && ((PREFERRED_RELOAD_CLASS (recog_operand[i],
3584 (enum reg_class) goal_alternative[i])
3586 || no_input_reloads)
3587 && operand_mode[i] != VOIDmode)
3589 substed_operand[i] = recog_operand[i]
3590 = find_reloads_toplev (force_const_mem (operand_mode[i],
3592 i, address_type[i], ind_levels, 0, insn);
3593 if (alternative_allows_memconst (recog_constraints[i],
3594 goal_alternative_number))
3595 goal_alternative_win[i] = 1;
3598 /* Record the values of the earlyclobber operands for the caller. */
3599 if (goal_earlyclobber)
3600 for (i = 0; i < noperands; i++)
3601 if (goal_alternative_earlyclobber[i])
3602 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3604 /* Now record reloads for all the operands that need them. */
3605 last_output_reload_regno = -1;
3606 for (i = 0; i < noperands; i++)
3607 if (! goal_alternative_win[i])
3609 /* Operands that match previous ones have already been handled. */
3610 if (goal_alternative_matches[i] >= 0)
3612 /* Handle an operand with a nonoffsettable address
3613 appearing where an offsettable address will do
3614 by reloading the address into a base register.
3616 ??? We can also do this when the operand is a register and
3617 reg_equiv_mem is not offsettable, but this is a bit tricky,
3618 so we don't bother with it. It may not be worth doing. */
3619 else if (goal_alternative_matched[i] == -1
3620 && goal_alternative_offmemok[i]
3621 && GET_CODE (recog_operand[i]) == MEM)
3623 operand_reloadnum[i]
3624 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3625 &XEXP (recog_operand[i], 0), NULL_PTR,
3626 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3627 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3628 reload_inc[operand_reloadnum[i]]
3629 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3631 /* If this operand is an output, we will have made any
3632 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3633 now we are treating part of the operand as an input, so
3634 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3636 if (modified[i] == RELOAD_WRITE)
3638 for (j = 0; j < n_reloads; j++)
3640 if (reload_opnum[j] == i)
3642 if (reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3643 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3644 else if (reload_when_needed[j]
3645 == RELOAD_FOR_OUTADDR_ADDRESS)
3646 reload_when_needed[j] = RELOAD_FOR_INPADDR_ADDRESS;
3651 else if (goal_alternative_matched[i] == -1)
3653 operand_reloadnum[i]
3654 = push_reload ((modified[i] != RELOAD_WRITE
3655 ? recog_operand[i] : 0),
3656 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3657 (modified[i] != RELOAD_WRITE
3658 ? recog_operand_loc[i] : 0),
3659 (modified[i] != RELOAD_READ
3660 ? recog_operand_loc[i] : 0),
3661 (enum reg_class) goal_alternative[i],
3662 (modified[i] == RELOAD_WRITE
3663 ? VOIDmode : operand_mode[i]),
3664 (modified[i] == RELOAD_READ
3665 ? VOIDmode : operand_mode[i]),
3666 (insn_code_number < 0 ? 0
3667 : insn_operand_strict_low[insn_code_number][i]),
3668 0, i, operand_type[i]);
3669 if (modified[i] != RELOAD_READ
3670 && GET_CODE (recog_operand[i]) == REG)
3671 last_output_reload_regno = REGNO (recog_operand[i]);
3673 /* In a matching pair of operands, one must be input only
3674 and the other must be output only.
3675 Pass the input operand as IN and the other as OUT. */
3676 else if (modified[i] == RELOAD_READ
3677 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3679 operand_reloadnum[i]
3680 = push_reload (recog_operand[i],
3681 recog_operand[goal_alternative_matched[i]],
3682 recog_operand_loc[i],
3683 recog_operand_loc[goal_alternative_matched[i]],
3684 (enum reg_class) goal_alternative[i],
3686 operand_mode[goal_alternative_matched[i]],
3687 0, 0, i, RELOAD_OTHER);
3688 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3689 if (GET_CODE (recog_operand[goal_alternative_matched[i]]) == REG)
3690 last_output_reload_regno
3691 = REGNO (recog_operand[goal_alternative_matched[i]]);
3693 else if (modified[i] == RELOAD_WRITE
3694 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3696 operand_reloadnum[goal_alternative_matched[i]]
3697 = push_reload (recog_operand[goal_alternative_matched[i]],
3699 recog_operand_loc[goal_alternative_matched[i]],
3700 recog_operand_loc[i],
3701 (enum reg_class) goal_alternative[i],
3702 operand_mode[goal_alternative_matched[i]],
3704 0, 0, i, RELOAD_OTHER);
3705 operand_reloadnum[i] = output_reloadnum;
3706 if (GET_CODE (recog_operand[i]) == REG)
3707 last_output_reload_regno = REGNO (recog_operand[i]);
3709 else if (insn_code_number >= 0)
3713 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3714 /* Avoid further trouble with this insn. */
3715 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3720 else if (goal_alternative_matched[i] < 0
3721 && goal_alternative_matches[i] < 0
3724 /* For each non-matching operand that's a MEM or a pseudo-register
3725 that didn't get a hard register, make an optional reload.
3726 This may get done even if the insn needs no reloads otherwise. */
3728 rtx operand = recog_operand[i];
3730 while (GET_CODE (operand) == SUBREG)
3731 operand = XEXP (operand, 0);
3732 if ((GET_CODE (operand) == MEM
3733 || (GET_CODE (operand) == REG
3734 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3735 /* If this is only for an output, the optional reload would not
3736 actually cause us to use a register now, just note that
3737 something is stored here. */
3738 && ((enum reg_class) goal_alternative[i] != NO_REGS
3739 || modified[i] == RELOAD_WRITE)
3740 && ! no_input_reloads
3741 /* An optional output reload might allow to delete INSN later.
3742 We mustn't make in-out reloads on insns that are not permitted
3744 If this is an asm, we can't delete it; we must not even call
3745 push_reload for an optional output reload in this case,
3746 because we can't be sure that the constraint allows a register,
3747 and push_reload verifies the constraints for asms. */
3748 && (modified[i] == RELOAD_READ
3749 || (! no_output_reloads && ! this_insn_is_asm)))
3750 operand_reloadnum[i]
3751 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3752 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3753 (modified[i] != RELOAD_WRITE
3754 ? recog_operand_loc[i] : 0),
3755 (modified[i] != RELOAD_READ
3756 ? recog_operand_loc[i] : 0),
3757 (enum reg_class) goal_alternative[i],
3758 (modified[i] == RELOAD_WRITE
3759 ? VOIDmode : operand_mode[i]),
3760 (modified[i] == RELOAD_READ
3761 ? VOIDmode : operand_mode[i]),
3762 (insn_code_number < 0 ? 0
3763 : insn_operand_strict_low[insn_code_number][i]),
3764 1, i, operand_type[i]);
3765 /* If a memory reference remains, yet we can't make an optional
3766 reload, check if this is actually a pseudo register reference;
3767 we then need to emit a USE and/or a CLOBBER so that reload
3768 inheritance will do the right thing. */
3769 else if (replace && GET_CODE (operand) == MEM)
3771 operand = *recog_operand_loc[i];
3773 while (GET_CODE (operand) == SUBREG)
3774 operand = XEXP (operand, 0);
3775 if (GET_CODE (operand) == REG)
3777 if (modified[i] != RELOAD_WRITE)
3778 emit_insn_before (gen_rtx_USE (VOIDmode, operand), insn);
3779 if (modified[i] != RELOAD_READ)
3780 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3784 else if (goal_alternative_matches[i] >= 0
3785 && goal_alternative_win[goal_alternative_matches[i]]
3786 && modified[i] == RELOAD_READ
3787 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3788 && ! no_input_reloads && ! no_output_reloads
3791 /* Similarly, make an optional reload for a pair of matching
3792 objects that are in MEM or a pseudo that didn't get a hard reg. */
3794 rtx operand = recog_operand[i];
3796 while (GET_CODE (operand) == SUBREG)
3797 operand = XEXP (operand, 0);
3798 if ((GET_CODE (operand) == MEM
3799 || (GET_CODE (operand) == REG
3800 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3801 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3803 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3804 = push_reload (recog_operand[goal_alternative_matches[i]],
3806 recog_operand_loc[goal_alternative_matches[i]],
3807 recog_operand_loc[i],
3808 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3809 operand_mode[goal_alternative_matches[i]],
3811 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3814 /* Perform whatever substitutions on the operands we are supposed
3815 to make due to commutativity or replacement of registers
3816 with equivalent constants or memory slots. */
3818 for (i = 0; i < noperands; i++)
3820 /* We only do this on the last pass through reload, because it is
3821 possible for some data (like reg_equiv_address) to be changed during
3822 later passes. Moreover, we loose the opportunity to get a useful
3823 reload_{in,out}_reg when we do these replacements. */
3826 *recog_operand_loc[i] = substed_operand[i];
3828 retval |= (substed_operand[i] != *recog_operand_loc[i]);
3831 /* If this insn pattern contains any MATCH_DUP's, make sure that
3832 they will be substituted if the operands they match are substituted.
3833 Also do now any substitutions we already did on the operands.
3835 Don't do this if we aren't making replacements because we might be
3836 propagating things allocated by frame pointer elimination into places
3837 it doesn't expect. */
3839 if (insn_code_number >= 0 && replace)
3840 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3842 int opno = recog_dup_num[i];
3843 *recog_dup_loc[i] = *recog_operand_loc[opno];
3844 if (operand_reloadnum[opno] >= 0)
3845 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3846 insn_operand_mode[insn_code_number][opno]);
3850 /* This loses because reloading of prior insns can invalidate the equivalence
3851 (or at least find_equiv_reg isn't smart enough to find it any more),
3852 causing this insn to need more reload regs than it needed before.
3853 It may be too late to make the reload regs available.
3854 Now this optimization is done safely in choose_reload_regs. */
3856 /* For each reload of a reg into some other class of reg,
3857 search for an existing equivalent reg (same value now) in the right class.
3858 We can use it as long as we don't need to change its contents. */
3859 for (i = 0; i < n_reloads; i++)
3860 if (reload_reg_rtx[i] == 0
3861 && reload_in[i] != 0
3862 && GET_CODE (reload_in[i]) == REG
3863 && reload_out[i] == 0)
3866 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3867 static_reload_reg_p, 0, reload_inmode[i]);
3868 /* Prevent generation of insn to load the value
3869 because the one we found already has the value. */
3870 if (reload_reg_rtx[i])
3871 reload_in[i] = reload_reg_rtx[i];
3875 /* Perhaps an output reload can be combined with another
3876 to reduce needs by one. */
3877 if (!goal_earlyclobber)
3880 /* If we have a pair of reloads for parts of an address, they are reloading
3881 the same object, the operands themselves were not reloaded, and they
3882 are for two operands that are supposed to match, merge the reloads and
3883 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3885 for (i = 0; i < n_reloads; i++)
3889 for (j = i + 1; j < n_reloads; j++)
3890 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3891 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3892 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3893 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3894 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3895 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS
3896 || reload_when_needed[j] == RELOAD_FOR_INPADDR_ADDRESS
3897 || reload_when_needed[j] == RELOAD_FOR_OUTADDR_ADDRESS)
3898 && rtx_equal_p (reload_in[i], reload_in[j])
3899 && (operand_reloadnum[reload_opnum[i]] < 0
3900 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3901 && (operand_reloadnum[reload_opnum[j]] < 0
3902 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3903 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3904 || (goal_alternative_matches[reload_opnum[j]]
3905 == reload_opnum[i])))
3907 for (k = 0; k < n_replacements; k++)
3908 if (replacements[k].what == j)
3909 replacements[k].what = i;
3911 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3912 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3913 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
3915 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3920 /* Scan all the reloads and update their type.
3921 If a reload is for the address of an operand and we didn't reload
3922 that operand, change the type. Similarly, change the operand number
3923 of a reload when two operands match. If a reload is optional, treat it
3924 as though the operand isn't reloaded.
3926 ??? This latter case is somewhat odd because if we do the optional
3927 reload, it means the object is hanging around. Thus we need only
3928 do the address reload if the optional reload was NOT done.
3930 Change secondary reloads to be the address type of their operand, not
3933 If an operand's reload is now RELOAD_OTHER, change any
3934 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3935 RELOAD_FOR_OTHER_ADDRESS. */
3937 for (i = 0; i < n_reloads; i++)
3939 if (reload_secondary_p[i]
3940 && reload_when_needed[i] == operand_type[reload_opnum[i]])
3941 reload_when_needed[i] = address_type[reload_opnum[i]];
3943 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3944 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3945 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3946 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3947 && (operand_reloadnum[reload_opnum[i]] < 0
3948 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
3950 /* If we have a secondary reload to go along with this reload,
3951 change its type to RELOAD_FOR_OPADDR_ADDR. */
3953 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3954 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
3955 && reload_secondary_in_reload[i] != -1)
3957 int secondary_in_reload = reload_secondary_in_reload[i];
3959 reload_when_needed[secondary_in_reload]
3960 = RELOAD_FOR_OPADDR_ADDR;
3962 /* If there's a tertiary reload we have to change it also. */
3963 if (secondary_in_reload > 0
3964 && reload_secondary_in_reload[secondary_in_reload] != -1)
3965 reload_when_needed[reload_secondary_in_reload[secondary_in_reload]]
3966 = RELOAD_FOR_OPADDR_ADDR;
3969 if ((reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3970 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3971 && reload_secondary_out_reload[i] != -1)
3973 int secondary_out_reload = reload_secondary_out_reload[i];
3975 reload_when_needed[secondary_out_reload]
3976 = RELOAD_FOR_OPADDR_ADDR;
3978 /* If there's a tertiary reload we have to change it also. */
3979 if (secondary_out_reload
3980 && reload_secondary_out_reload[secondary_out_reload] != -1)
3981 reload_when_needed[reload_secondary_out_reload[secondary_out_reload]]
3982 = RELOAD_FOR_OPADDR_ADDR;
3985 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3986 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3987 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
3989 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3992 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3993 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
3994 && operand_reloadnum[reload_opnum[i]] >= 0
3995 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
3997 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
3999 if (goal_alternative_matches[reload_opnum[i]] >= 0)
4000 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
4003 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4004 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4005 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4007 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4008 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4009 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4010 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4011 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4012 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4013 This is complicated by the fact that a single operand can have more
4014 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4015 choose_reload_regs without affecting code quality, and cases that
4016 actually fail are extremely rare, so it turns out to be better to fix
4017 the problem here by not generating cases that choose_reload_regs will
4019 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4020 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4022 We can reduce the register pressure by exploiting that a
4023 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4024 does not conflict with any of them, if it is only used for the first of
4025 the RELOAD_FOR_X_ADDRESS reloads. */
4027 int first_op_addr_num = -2;
4028 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4029 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4031 /* We use last_op_addr_reload and the contents of the above arrays
4032 first as flags - -2 means no instance encountered, -1 means exactly
4033 one instance encountered.
4034 If more than one instance has been encountered, we store the reload
4035 number of the first reload of the kind in question; reload numbers
4036 are known to be non-negative. */
4037 for (i = 0; i < noperands; i++)
4038 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4039 for (i = n_reloads - 1; i >= 0; i--)
4041 switch (reload_when_needed[i])
4043 case RELOAD_FOR_OPERAND_ADDRESS:
4044 if (++first_op_addr_num >= 0)
4046 first_op_addr_num = i;
4050 case RELOAD_FOR_INPUT_ADDRESS:
4051 if (++first_inpaddr_num[reload_opnum[i]] >= 0)
4053 first_inpaddr_num[reload_opnum[i]] = i;
4057 case RELOAD_FOR_OUTPUT_ADDRESS:
4058 if (++first_outpaddr_num[reload_opnum[i]] >= 0)
4060 first_outpaddr_num[reload_opnum[i]] = i;
4071 for (i = 0; i < n_reloads; i++)
4073 int first_num, type;
4075 switch (reload_when_needed[i])
4077 case RELOAD_FOR_OPADDR_ADDR:
4078 first_num = first_op_addr_num;
4079 type = RELOAD_FOR_OPERAND_ADDRESS;
4081 case RELOAD_FOR_INPADDR_ADDRESS:
4082 first_num = first_inpaddr_num[reload_opnum[i]];
4083 type = RELOAD_FOR_INPUT_ADDRESS;
4085 case RELOAD_FOR_OUTADDR_ADDRESS:
4086 first_num = first_outpaddr_num[reload_opnum[i]];
4087 type = RELOAD_FOR_OUTPUT_ADDRESS;
4094 else if (i > first_num)
4095 reload_when_needed[i] = type;
4098 /* Check if the only TYPE reload that uses reload I is
4099 reload FIRST_NUM. */
4100 for (j = n_reloads - 1; j > first_num; j--)
4102 if (reload_when_needed[j] == type
4103 && (reload_secondary_p[i]
4104 ? reload_secondary_in_reload[j] == i
4105 : reg_mentioned_p (reload_in[i], reload_in[j])))
4107 reload_when_needed[i] = type;
4116 /* See if we have any reloads that are now allowed to be merged
4117 because we've changed when the reload is needed to
4118 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4119 check for the most common cases. */
4121 for (i = 0; i < n_reloads; i++)
4122 if (reload_in[i] != 0 && reload_out[i] == 0
4123 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
4124 || reload_when_needed[i] == RELOAD_FOR_OPADDR_ADDR
4125 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
4126 for (j = 0; j < n_reloads; j++)
4127 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
4128 && reload_when_needed[j] == reload_when_needed[i]
4129 && MATCHES (reload_in[i], reload_in[j])
4130 && reload_reg_class[i] == reload_reg_class[j]
4131 && !reload_nocombine[i] && !reload_nocombine[j]
4132 && reload_reg_rtx[i] == reload_reg_rtx[j])
4134 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
4135 transfer_replacements (i, j);
4139 /* Set which reloads must use registers not used in any group. Start
4140 with those that conflict with a group and then include ones that
4141 conflict with ones that are already known to conflict with a group. */
4144 for (i = 0; i < n_reloads; i++)
4146 enum machine_mode mode = reload_inmode[i];
4147 enum reg_class class = reload_reg_class[i];
4150 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
4151 mode = reload_outmode[i];
4152 size = CLASS_MAX_NREGS (class, mode);
4155 for (j = 0; j < n_reloads; j++)
4156 if ((CLASS_MAX_NREGS (reload_reg_class[j],
4157 (GET_MODE_SIZE (reload_outmode[j])
4158 > GET_MODE_SIZE (reload_inmode[j]))
4159 ? reload_outmode[j] : reload_inmode[j])
4161 && !reload_optional[j]
4162 && (reload_in[j] != 0 || reload_out[j] != 0
4163 || reload_secondary_p[j])
4164 && reloads_conflict (i, j)
4165 && reg_classes_intersect_p (class, reload_reg_class[j]))
4167 reload_nongroup[i] = 1;
4177 for (i = 0; i < n_reloads; i++)
4179 enum machine_mode mode = reload_inmode[i];
4180 enum reg_class class = reload_reg_class[i];
4183 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
4184 mode = reload_outmode[i];
4185 size = CLASS_MAX_NREGS (class, mode);
4187 if (! reload_nongroup[i] && size == 1)
4188 for (j = 0; j < n_reloads; j++)
4189 if (reload_nongroup[j]
4190 && reloads_conflict (i, j)
4191 && reg_classes_intersect_p (class, reload_reg_class[j]))
4193 reload_nongroup[i] = 1;
4200 #else /* no REGISTER_CONSTRAINTS */
4202 int insn_code_number;
4203 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
4205 rtx body = PATTERN (insn);
4210 n_earlyclobbers = 0;
4211 replace_reloads = replace;
4214 extract_insn (insn);
4216 noperands = reload_n_operands = recog_n_operands;
4218 /* Return if the insn needs no reload processing. */
4222 for (i = 0; i < noperands; i++)
4224 register RTX_CODE code = GET_CODE (recog_operand[i]);
4225 int is_set_dest = GET_CODE (body) == SET && (i == 0);
4227 if (insn_code_number >= 0)
4228 if (insn_operand_address_p[insn_code_number][i])
4229 find_reloads_address (VOIDmode, NULL_PTR,
4230 recog_operand[i], recog_operand_loc[i],
4231 i, RELOAD_FOR_INPUT, ind_levels, insn);
4233 /* In these cases, we can't tell if the operand is an input
4234 or an output, so be conservative. In practice it won't be
4238 find_reloads_address (GET_MODE (recog_operand[i]),
4239 recog_operand_loc[i],
4240 XEXP (recog_operand[i], 0),
4241 &XEXP (recog_operand[i], 0),
4242 i, RELOAD_OTHER, ind_levels, insn);
4244 recog_operand[i] = *recog_operand_loc[i]
4245 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
4246 ind_levels, is_set_dest);
4249 register int regno = REGNO (recog_operand[i]);
4250 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4251 recog_operand[i] = *recog_operand_loc[i]
4252 = reg_equiv_constant[regno];
4253 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4254 that feeds this insn. */
4255 if (reg_equiv_mem[regno] != 0)
4256 recog_operand[i] = *recog_operand_loc[i]
4257 = reg_equiv_mem[regno];
4262 /* Perhaps an output reload can be combined with another
4263 to reduce needs by one. */
4264 if (!goal_earlyclobber)
4266 #endif /* no REGISTER_CONSTRAINTS */
4270 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4271 accepts a memory operand with constant address. */
4274 alternative_allows_memconst (constraint, altnum)
4275 const char *constraint;
4279 /* Skip alternatives before the one requested. */
4282 while (*constraint++ != ',');
4285 /* Scan the requested alternative for 'm' or 'o'.
4286 If one of them is present, this alternative accepts memory constants. */
4287 while ((c = *constraint++) && c != ',' && c != '#')
4288 if (c == 'm' || c == 'o')
4293 /* Scan X for memory references and scan the addresses for reloading.
4294 Also checks for references to "constant" regs that we want to eliminate
4295 and replaces them with the values they stand for.
4296 We may alter X destructively if it contains a reference to such.
4297 If X is just a constant reg, we return the equivalent value
4300 IND_LEVELS says how many levels of indirect addressing this machine
4303 OPNUM and TYPE identify the purpose of the reload.
4305 IS_SET_DEST is true if X is the destination of a SET, which is not
4306 appropriate to be replaced by a constant.
4308 INSN, if nonzero, is the insn in which we do the reload. It is used
4309 to determine if we may generate output reloads, and where to put USEs
4310 for pseudos that we have to replace with stack slots. */
4313 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn)
4316 enum reload_type type;
4321 register RTX_CODE code = GET_CODE (x);
4323 register char *fmt = GET_RTX_FORMAT (code);
4328 /* This code is duplicated for speed in find_reloads. */
4329 register int regno = REGNO (x);
4330 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4331 x = reg_equiv_constant[regno];
4333 /* This creates (subreg (mem...)) which would cause an unnecessary
4334 reload of the mem. */
4335 else if (reg_equiv_mem[regno] != 0)
4336 x = reg_equiv_mem[regno];
4338 else if (reg_equiv_memory_loc[regno]
4339 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4341 rtx mem = make_memloc (x, regno);
4342 if (reg_equiv_address[regno]
4343 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4345 /* If this is not a toplevel operand, find_reloads doesn't see
4346 this substitution. We have to emit a USE of the pseudo so
4347 that delete_output_reload can see it. */
4348 if (replace_reloads && recog_operand[opnum] != x)
4349 emit_insn_before (gen_rtx_USE (VOIDmode, x), insn);
4351 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4352 opnum, type, ind_levels, insn);
4360 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4361 opnum, type, ind_levels, insn);
4365 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4367 /* Check for SUBREG containing a REG that's equivalent to a constant.
4368 If the constant has a known value, truncate it right now.
4369 Similarly if we are extracting a single-word of a multi-word
4370 constant. If the constant is symbolic, allow it to be substituted
4371 normally. push_reload will strip the subreg later. If the
4372 constant is VOIDmode, abort because we will lose the mode of
4373 the register (this should never happen because one of the cases
4374 above should handle it). */
4376 register int regno = REGNO (SUBREG_REG (x));
4379 if (subreg_lowpart_p (x)
4380 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4381 && reg_equiv_constant[regno] != 0
4382 && (tem = gen_lowpart_common (GET_MODE (x),
4383 reg_equiv_constant[regno])) != 0)
4386 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4387 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4388 && reg_equiv_constant[regno] != 0
4389 && (tem = operand_subword (reg_equiv_constant[regno],
4391 GET_MODE (SUBREG_REG (x)))) != 0)
4393 /* TEM is now a word sized constant for the bits from X that
4394 we wanted. However, TEM may be the wrong representation.
4396 Use gen_lowpart_common to convert a CONST_INT into a
4397 CONST_DOUBLE and vice versa as needed according to by the mode
4399 tem = gen_lowpart_common (GET_MODE (x), tem);
4405 /* If the SUBREG is wider than a word, the above test will fail.
4406 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4407 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4408 a 32 bit target. We still can - and have to - handle this
4409 for non-paradoxical subregs of CONST_INTs. */
4410 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4411 && reg_equiv_constant[regno] != 0
4412 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT
4413 && (GET_MODE_SIZE (GET_MODE (x))
4414 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
4416 int shift = SUBREG_WORD (x) * BITS_PER_WORD;
4417 if (WORDS_BIG_ENDIAN)
4418 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4419 - GET_MODE_BITSIZE (GET_MODE (x))
4421 /* Here we use the knowledge that CONST_INTs have a
4422 HOST_WIDE_INT field. */
4423 if (shift >= HOST_BITS_PER_WIDE_INT)
4424 shift = HOST_BITS_PER_WIDE_INT - 1;
4425 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
4428 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4429 && reg_equiv_constant[regno] != 0
4430 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4433 /* If the subreg contains a reg that will be converted to a mem,
4434 convert the subreg to a narrower memref now.
4435 Otherwise, we would get (subreg (mem ...) ...),
4436 which would force reload of the mem.
4438 We also need to do this if there is an equivalent MEM that is
4439 not offsettable. In that case, alter_subreg would produce an
4440 invalid address on big-endian machines.
4442 For machines that extend byte loads, we must not reload using
4443 a wider mode if we have a paradoxical SUBREG. find_reloads will
4444 force a reload in that case. So we should not do anything here. */
4446 else if (regno >= FIRST_PSEUDO_REGISTER
4447 #ifdef LOAD_EXTEND_OP
4448 && (GET_MODE_SIZE (GET_MODE (x))
4449 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4451 && (reg_equiv_address[regno] != 0
4452 || (reg_equiv_mem[regno] != 0
4453 && (! strict_memory_address_p (GET_MODE (x),
4454 XEXP (reg_equiv_mem[regno], 0))
4455 || ! offsettable_memref_p (reg_equiv_mem[regno])
4456 || num_not_at_initial_offset))))
4458 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
4459 /* We must rerun eliminate_regs, in case the elimination
4460 offsets have changed. */
4461 rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
4464 if (BYTES_BIG_ENDIAN)
4467 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
4468 offset += MIN (size, UNITS_PER_WORD);
4469 size = GET_MODE_SIZE (GET_MODE (x));
4470 offset -= MIN (size, UNITS_PER_WORD);
4472 addr = plus_constant (addr, offset);
4473 x = gen_rtx_MEM (GET_MODE (x), addr);
4474 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4475 find_reloads_address (GET_MODE (x), &x,
4477 &XEXP (x, 0), opnum, type, ind_levels, insn);
4478 /* If this is not a toplevel operand, find_reloads doesn't see this
4479 substitution. We have to emit a USE of the pseudo so that
4480 delete_output_reload can see it. */
4481 if (replace_reloads && recog_operand[opnum] != x)
4482 emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn);
4487 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4490 XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
4491 ind_levels, is_set_dest, insn);
4496 /* Return a mem ref for the memory equivalent of reg REGNO.
4497 This mem ref is not shared with anything. */
4500 make_memloc (ad, regno)
4504 /* We must rerun eliminate_regs, in case the elimination
4505 offsets have changed. */
4507 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4509 /* If TEM might contain a pseudo, we must copy it to avoid
4510 modifying it when we do the substitution for the reload. */
4511 if (rtx_varies_p (tem))
4512 tem = copy_rtx (tem);
4514 tem = gen_rtx_MEM (GET_MODE (ad), tem);
4515 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4519 /* Record all reloads needed for handling memory address AD
4520 which appears in *LOC in a memory reference to mode MODE
4521 which itself is found in location *MEMREFLOC.
4522 Note that we take shortcuts assuming that no multi-reg machine mode
4523 occurs as part of an address.
4525 OPNUM and TYPE specify the purpose of this reload.
4527 IND_LEVELS says how many levels of indirect addressing this machine
4530 INSN, if nonzero, is the insn in which we do the reload. It is used
4531 to determine if we may generate output reloads, and where to put USEs
4532 for pseudos that we have to replace with stack slots.
4534 Value is nonzero if this address is reloaded or replaced as a whole.
4535 This is interesting to the caller if the address is an autoincrement.
4537 Note that there is no verification that the address will be valid after
4538 this routine does its work. Instead, we rely on the fact that the address
4539 was valid when reload started. So we need only undo things that reload
4540 could have broken. These are wrong register types, pseudos not allocated
4541 to a hard register, and frame pointer elimination. */
4544 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4545 enum machine_mode mode;
4550 enum reload_type type;
4557 /* If the address is a register, see if it is a legitimate address and
4558 reload if not. We first handle the cases where we need not reload
4559 or where we must reload in a non-standard way. */
4561 if (GET_CODE (ad) == REG)
4565 if (reg_equiv_constant[regno] != 0
4566 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4568 *loc = ad = reg_equiv_constant[regno];
4572 tem = reg_equiv_memory_loc[regno];
4575 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4577 tem = make_memloc (ad, regno);
4578 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4580 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4581 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
4584 /* We can avoid a reload if the register's equivalent memory
4585 expression is valid as an indirect memory address.
4586 But not all addresses are valid in a mem used as an indirect
4587 address: only reg or reg+constant. */
4590 && strict_memory_address_p (mode, tem)
4591 && (GET_CODE (XEXP (tem, 0)) == REG
4592 || (GET_CODE (XEXP (tem, 0)) == PLUS
4593 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4594 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4596 /* TEM is not the same as what we'll be replacing the
4597 pseudo with after reload, put a USE in front of INSN
4598 in the final reload pass. */
4600 && num_not_at_initial_offset
4601 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4604 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
4605 /* This doesn't really count as replacing the address
4606 as a whole, since it is still a memory access. */
4614 /* The only remaining case where we can avoid a reload is if this is a
4615 hard register that is valid as a base register and which is not the
4616 subject of a CLOBBER in this insn. */
4618 else if (regno < FIRST_PSEUDO_REGISTER
4619 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4620 && ! regno_clobbered_p (regno, this_insn))
4623 /* If we do not have one of the cases above, we must do the reload. */
4624 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4625 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4629 if (strict_memory_address_p (mode, ad))
4631 /* The address appears valid, so reloads are not needed.
4632 But the address may contain an eliminable register.
4633 This can happen because a machine with indirect addressing
4634 may consider a pseudo register by itself a valid address even when
4635 it has failed to get a hard reg.
4636 So do a tree-walk to find and eliminate all such regs. */
4638 /* But first quickly dispose of a common case. */
4639 if (GET_CODE (ad) == PLUS
4640 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4641 && GET_CODE (XEXP (ad, 0)) == REG
4642 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4645 subst_reg_equivs_changed = 0;
4646 *loc = subst_reg_equivs (ad, insn);
4648 if (! subst_reg_equivs_changed)
4651 /* Check result for validity after substitution. */
4652 if (strict_memory_address_p (mode, ad))
4656 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4661 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4666 *memrefloc = copy_rtx (*memrefloc);
4667 XEXP (*memrefloc, 0) = ad;
4668 move_replacements (&ad, &XEXP (*memrefloc, 0));
4674 /* The address is not valid. We have to figure out why. One possibility
4675 is that it is itself a MEM. This can happen when the frame pointer is
4676 being eliminated, a pseudo is not allocated to a hard register, and the
4677 offset between the frame and stack pointers is not its initial value.
4678 In that case the pseudo will have been replaced by a MEM referring to
4679 the stack pointer. */
4680 if (GET_CODE (ad) == MEM)
4682 /* First ensure that the address in this MEM is valid. Then, unless
4683 indirect addresses are valid, reload the MEM into a register. */
4685 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4686 opnum, ADDR_TYPE (type),
4687 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4689 /* If tem was changed, then we must create a new memory reference to
4690 hold it and store it back into memrefloc. */
4691 if (tem != ad && memrefloc)
4693 *memrefloc = copy_rtx (*memrefloc);
4694 copy_replacements (tem, XEXP (*memrefloc, 0));
4695 loc = &XEXP (*memrefloc, 0);
4698 /* Check similar cases as for indirect addresses as above except
4699 that we can allow pseudos and a MEM since they should have been
4700 taken care of above. */
4703 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4704 || GET_CODE (XEXP (tem, 0)) == MEM
4705 || ! (GET_CODE (XEXP (tem, 0)) == REG
4706 || (GET_CODE (XEXP (tem, 0)) == PLUS
4707 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4708 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4710 /* Must use TEM here, not AD, since it is the one that will
4711 have any subexpressions reloaded, if needed. */
4712 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4713 BASE_REG_CLASS, GET_MODE (tem),
4722 /* If we have address of a stack slot but it's not valid because the
4723 displacement is too large, compute the sum in a register.
4724 Handle all base registers here, not just fp/ap/sp, because on some
4725 targets (namely SH) we can also get too large displacements from
4726 big-endian corrections. */
4727 else if (GET_CODE (ad) == PLUS
4728 && GET_CODE (XEXP (ad, 0)) == REG
4729 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4730 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4731 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4733 /* Unshare the MEM rtx so we can safely alter it. */
4736 *memrefloc = copy_rtx (*memrefloc);
4737 loc = &XEXP (*memrefloc, 0);
4739 if (double_reg_address_ok)
4741 /* Unshare the sum as well. */
4742 *loc = ad = copy_rtx (ad);
4743 /* Reload the displacement into an index reg.
4744 We assume the frame pointer or arg pointer is a base reg. */
4745 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4746 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4751 /* If the sum of two regs is not necessarily valid,
4752 reload the sum into a base reg.
4753 That will at least work. */
4754 find_reloads_address_part (ad, loc, BASE_REG_CLASS,
4755 Pmode, opnum, type, ind_levels);
4760 /* If we have an indexed stack slot, there are three possible reasons why
4761 it might be invalid: The index might need to be reloaded, the address
4762 might have been made by frame pointer elimination and hence have a
4763 constant out of range, or both reasons might apply.
4765 We can easily check for an index needing reload, but even if that is the
4766 case, we might also have an invalid constant. To avoid making the
4767 conservative assumption and requiring two reloads, we see if this address
4768 is valid when not interpreted strictly. If it is, the only problem is
4769 that the index needs a reload and find_reloads_address_1 will take care
4772 There is still a case when we might generate an extra reload,
4773 however. In certain cases eliminate_regs will return a MEM for a REG
4774 (see the code there for details). In those cases, memory_address_p
4775 applied to our address will return 0 so we will think that our offset
4776 must be too large. But it might indeed be valid and the only problem
4777 is that a MEM is present where a REG should be. This case should be
4778 very rare and there doesn't seem to be any way to avoid it.
4780 If we decide to do something here, it must be that
4781 `double_reg_address_ok' is true and that this address rtl was made by
4782 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4783 rework the sum so that the reload register will be added to the index.
4784 This is safe because we know the address isn't shared.
4786 We check for fp/ap/sp as both the first and second operand of the
4789 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4790 && GET_CODE (XEXP (ad, 0)) == PLUS
4791 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4792 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4793 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4795 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4796 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4798 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4799 && ! memory_address_p (mode, ad))
4801 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4802 plus_constant (XEXP (XEXP (ad, 0), 0),
4803 INTVAL (XEXP (ad, 1))),
4804 XEXP (XEXP (ad, 0), 1));
4805 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4806 GET_MODE (ad), opnum, type, ind_levels);
4807 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4813 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4814 && GET_CODE (XEXP (ad, 0)) == PLUS
4815 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4816 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4817 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4819 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4820 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4822 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4823 && ! memory_address_p (mode, ad))
4825 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4826 XEXP (XEXP (ad, 0), 0),
4827 plus_constant (XEXP (XEXP (ad, 0), 1),
4828 INTVAL (XEXP (ad, 1))));
4829 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS,
4830 GET_MODE (ad), opnum, type, ind_levels);
4831 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4837 /* See if address becomes valid when an eliminable register
4838 in a sum is replaced. */
4841 if (GET_CODE (ad) == PLUS)
4842 tem = subst_indexed_address (ad);
4843 if (tem != ad && strict_memory_address_p (mode, tem))
4845 /* Ok, we win that way. Replace any additional eliminable
4848 subst_reg_equivs_changed = 0;
4849 tem = subst_reg_equivs (tem, insn);
4851 /* Make sure that didn't make the address invalid again. */
4853 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4860 /* If constants aren't valid addresses, reload the constant address
4862 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4864 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4865 Unshare it so we can safely alter it. */
4866 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4867 && CONSTANT_POOL_ADDRESS_P (ad))
4869 *memrefloc = copy_rtx (*memrefloc);
4870 loc = &XEXP (*memrefloc, 0);
4873 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4878 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4882 /* Find all pseudo regs appearing in AD
4883 that are eliminable in favor of equivalent values
4884 and do not have hard regs; replace them by their equivalents.
4885 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4886 front of it for pseudos that we have to replace with stack slots. */
4889 subst_reg_equivs (ad, insn)
4893 register RTX_CODE code = GET_CODE (ad);
4911 register int regno = REGNO (ad);
4913 if (reg_equiv_constant[regno] != 0)
4915 subst_reg_equivs_changed = 1;
4916 return reg_equiv_constant[regno];
4918 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
4920 rtx mem = make_memloc (ad, regno);
4921 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
4923 subst_reg_equivs_changed = 1;
4924 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
4932 /* Quickly dispose of a common case. */
4933 if (XEXP (ad, 0) == frame_pointer_rtx
4934 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4942 fmt = GET_RTX_FORMAT (code);
4943 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4945 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
4949 /* Compute the sum of X and Y, making canonicalizations assumed in an
4950 address, namely: sum constant integers, surround the sum of two
4951 constants with a CONST, put the constant as the second operand, and
4952 group the constant on the outermost sum.
4954 This routine assumes both inputs are already in canonical form. */
4961 enum machine_mode mode = GET_MODE (x);
4963 if (mode == VOIDmode)
4964 mode = GET_MODE (y);
4966 if (mode == VOIDmode)
4969 if (GET_CODE (x) == CONST_INT)
4970 return plus_constant (y, INTVAL (x));
4971 else if (GET_CODE (y) == CONST_INT)
4972 return plus_constant (x, INTVAL (y));
4973 else if (CONSTANT_P (x))
4974 tem = x, x = y, y = tem;
4976 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
4977 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
4979 /* Note that if the operands of Y are specified in the opposite
4980 order in the recursive calls below, infinite recursion will occur. */
4981 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
4982 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
4984 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4985 constant will have been placed second. */
4986 if (CONSTANT_P (x) && CONSTANT_P (y))
4988 if (GET_CODE (x) == CONST)
4990 if (GET_CODE (y) == CONST)
4993 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
4996 return gen_rtx_PLUS (mode, x, y);
4999 /* If ADDR is a sum containing a pseudo register that should be
5000 replaced with a constant (from reg_equiv_constant),
5001 return the result of doing so, and also apply the associative
5002 law so that the result is more likely to be a valid address.
5003 (But it is not guaranteed to be one.)
5005 Note that at most one register is replaced, even if more are
5006 replaceable. Also, we try to put the result into a canonical form
5007 so it is more likely to be a valid address.
5009 In all other cases, return ADDR. */
5012 subst_indexed_address (addr)
5015 rtx op0 = 0, op1 = 0, op2 = 0;
5019 if (GET_CODE (addr) == PLUS)
5021 /* Try to find a register to replace. */
5022 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5023 if (GET_CODE (op0) == REG
5024 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5025 && reg_renumber[regno] < 0
5026 && reg_equiv_constant[regno] != 0)
5027 op0 = reg_equiv_constant[regno];
5028 else if (GET_CODE (op1) == REG
5029 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5030 && reg_renumber[regno] < 0
5031 && reg_equiv_constant[regno] != 0)
5032 op1 = reg_equiv_constant[regno];
5033 else if (GET_CODE (op0) == PLUS
5034 && (tem = subst_indexed_address (op0)) != op0)
5036 else if (GET_CODE (op1) == PLUS
5037 && (tem = subst_indexed_address (op1)) != op1)
5042 /* Pick out up to three things to add. */
5043 if (GET_CODE (op1) == PLUS)
5044 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5045 else if (GET_CODE (op0) == PLUS)
5046 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5048 /* Compute the sum. */
5050 op1 = form_sum (op1, op2);
5052 op0 = form_sum (op0, op1);
5059 /* Record the pseudo registers we must reload into hard registers in a
5060 subexpression of a would-be memory address, X referring to a value
5061 in mode MODE. (This function is not called if the address we find
5064 CONTEXT = 1 means we are considering regs as index regs,
5065 = 0 means we are considering them as base regs.
5067 OPNUM and TYPE specify the purpose of any reloads made.
5069 IND_LEVELS says how many levels of indirect addressing are
5070 supported at this point in the address.
5072 INSN, if nonzero, is the insn in which we do the reload. It is used
5073 to determine if we may generate output reloads.
5075 We return nonzero if X, as a whole, is reloaded or replaced. */
5077 /* Note that we take shortcuts assuming that no multi-reg machine mode
5078 occurs as part of an address.
5079 Also, this is not fully machine-customizable; it works for machines
5080 such as vaxes and 68000's and 32000's, but other possible machines
5081 could have addressing modes that this does not handle right. */
5084 find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
5085 enum machine_mode mode;
5090 enum reload_type type;
5094 register RTX_CODE code = GET_CODE (x);
5100 register rtx orig_op0 = XEXP (x, 0);
5101 register rtx orig_op1 = XEXP (x, 1);
5102 register RTX_CODE code0 = GET_CODE (orig_op0);
5103 register RTX_CODE code1 = GET_CODE (orig_op1);
5104 register rtx op0 = orig_op0;
5105 register rtx op1 = orig_op1;
5107 if (GET_CODE (op0) == SUBREG)
5109 op0 = SUBREG_REG (op0);
5110 code0 = GET_CODE (op0);
5111 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5112 op0 = gen_rtx_REG (word_mode,
5113 REGNO (op0) + SUBREG_WORD (orig_op0));
5116 if (GET_CODE (op1) == SUBREG)
5118 op1 = SUBREG_REG (op1);
5119 code1 = GET_CODE (op1);
5120 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5121 op1 = gen_rtx_REG (GET_MODE (op1),
5122 REGNO (op1) + SUBREG_WORD (orig_op1));
5125 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5126 || code0 == ZERO_EXTEND || code1 == MEM)
5128 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5129 type, ind_levels, insn);
5130 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5131 type, ind_levels, insn);
5134 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5135 || code1 == ZERO_EXTEND || code0 == MEM)
5137 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5138 type, ind_levels, insn);
5139 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5140 type, ind_levels, insn);
5143 else if (code0 == CONST_INT || code0 == CONST
5144 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5145 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5146 type, ind_levels, insn);
5148 else if (code1 == CONST_INT || code1 == CONST
5149 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5150 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5151 type, ind_levels, insn);
5153 else if (code0 == REG && code1 == REG)
5155 if (REG_OK_FOR_INDEX_P (op0)
5156 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5158 else if (REG_OK_FOR_INDEX_P (op1)
5159 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5161 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5162 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5163 type, ind_levels, insn);
5164 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5165 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5166 type, ind_levels, insn);
5167 else if (REG_OK_FOR_INDEX_P (op1))
5168 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5169 type, ind_levels, insn);
5170 else if (REG_OK_FOR_INDEX_P (op0))
5171 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5172 type, ind_levels, insn);
5175 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5176 type, ind_levels, insn);
5177 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5178 type, ind_levels, insn);
5182 else if (code0 == REG)
5184 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5185 type, ind_levels, insn);
5186 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5187 type, ind_levels, insn);
5190 else if (code1 == REG)
5192 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5193 type, ind_levels, insn);
5194 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5195 type, ind_levels, insn);
5205 if (GET_CODE (XEXP (x, 0)) == REG)
5207 register int regno = REGNO (XEXP (x, 0));
5211 /* A register that is incremented cannot be constant! */
5212 if (regno >= FIRST_PSEUDO_REGISTER
5213 && reg_equiv_constant[regno] != 0)
5216 /* Handle a register that is equivalent to a memory location
5217 which cannot be addressed directly. */
5218 if (reg_equiv_memory_loc[regno] != 0
5219 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5221 rtx tem = make_memloc (XEXP (x, 0), regno);
5222 if (reg_equiv_address[regno]
5223 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5225 /* First reload the memory location's address.
5226 We can't use ADDR_TYPE (type) here, because we need to
5227 write back the value after reading it, hence we actually
5228 need two registers. */
5229 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5230 &XEXP (tem, 0), opnum, type,
5232 /* Put this inside a new increment-expression. */
5233 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5234 /* Proceed to reload that, as if it contained a register. */
5238 /* If we have a hard register that is ok as an index,
5239 don't make a reload. If an autoincrement of a nice register
5240 isn't "valid", it must be that no autoincrement is "valid".
5241 If that is true and something made an autoincrement anyway,
5242 this must be a special context where one is allowed.
5243 (For example, a "push" instruction.)
5244 We can't improve this address, so leave it alone. */
5246 /* Otherwise, reload the autoincrement into a suitable hard reg
5247 and record how much to increment by. */
5249 if (reg_renumber[regno] >= 0)
5250 regno = reg_renumber[regno];
5251 if ((regno >= FIRST_PSEUDO_REGISTER
5252 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5253 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5260 /* If we can output the register afterwards, do so, this
5261 saves the extra update.
5262 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5263 CALL_INSN - and it does not set CC0.
5264 But don't do this if we cannot directly address the
5265 memory location, since this will make it harder to
5266 reuse address reloads, and increases register pressure.
5267 Also don't do this if we can probably update x directly. */
5268 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5270 : reg_equiv_mem[regno]);
5271 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5272 if (insn && GET_CODE (insn) == INSN && equiv
5273 && memory_operand (equiv, GET_MODE (equiv))
5275 && ! sets_cc0_p (PATTERN (insn))
5277 && ! (icode != CODE_FOR_nothing
5278 && (*insn_operand_predicate[icode][0]) (equiv, Pmode)
5279 && (*insn_operand_predicate[icode][1]) (equiv, Pmode)))
5284 = push_reload (x, x, loc, loc,
5285 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5286 GET_MODE (x), GET_MODE (x), 0, 0,
5287 opnum, RELOAD_OTHER);
5292 = push_reload (x, NULL_RTX, loc, NULL_PTR,
5293 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5294 GET_MODE (x), GET_MODE (x), 0, 0,
5296 reload_inc[reloadnum]
5297 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5303 /* Update the REG_INC notes. */
5305 for (link = REG_NOTES (this_insn);
5306 link; link = XEXP (link, 1))
5307 if (REG_NOTE_KIND (link) == REG_INC
5308 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
5309 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5315 else if (GET_CODE (XEXP (x, 0)) == MEM)
5317 /* This is probably the result of a substitution, by eliminate_regs,
5318 of an equivalent address for a pseudo that was not allocated to a
5319 hard register. Verify that the specified address is valid and
5320 reload it into a register. */
5321 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5322 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5326 /* Since we know we are going to reload this item, don't decrement
5327 for the indirection level.
5329 Note that this is actually conservative: it would be slightly
5330 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5332 /* We can't use ADDR_TYPE (type) here, because we need to
5333 write back the value after reading it, hence we actually
5334 need two registers. */
5335 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5336 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5337 opnum, type, ind_levels, insn);
5339 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
5340 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5341 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5342 reload_inc[reloadnum]
5343 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5345 link = FIND_REG_INC_NOTE (this_insn, tem);
5347 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5354 /* This is probably the result of a substitution, by eliminate_regs, of
5355 an equivalent address for a pseudo that was not allocated to a hard
5356 register. Verify that the specified address is valid and reload it
5359 Since we know we are going to reload this item, don't decrement for
5360 the indirection level.
5362 Note that this is actually conservative: it would be slightly more
5363 efficient to use the value of SPILL_INDIRECT_LEVELS from
5366 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5367 opnum, ADDR_TYPE (type), ind_levels, insn);
5368 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
5369 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5370 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5375 register int regno = REGNO (x);
5377 if (reg_equiv_constant[regno] != 0)
5379 find_reloads_address_part (reg_equiv_constant[regno], loc,
5380 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5381 GET_MODE (x), opnum, type, ind_levels);
5385 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5386 that feeds this insn. */
5387 if (reg_equiv_mem[regno] != 0)
5389 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
5390 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5391 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5396 if (reg_equiv_memory_loc[regno]
5397 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5399 rtx tem = make_memloc (x, regno);
5400 if (reg_equiv_address[regno] != 0
5401 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5404 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5405 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5410 if (reg_renumber[regno] >= 0)
5411 regno = reg_renumber[regno];
5413 if ((regno >= FIRST_PSEUDO_REGISTER
5414 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5415 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5417 push_reload (x, NULL_RTX, loc, NULL_PTR,
5418 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5419 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5423 /* If a register appearing in an address is the subject of a CLOBBER
5424 in this insn, reload it into some other register to be safe.
5425 The CLOBBER is supposed to make the register unavailable
5426 from before this insn to after it. */
5427 if (regno_clobbered_p (regno, this_insn))
5429 push_reload (x, NULL_RTX, loc, NULL_PTR,
5430 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5431 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5438 if (GET_CODE (SUBREG_REG (x)) == REG)
5440 /* If this is a SUBREG of a hard register and the resulting register
5441 is of the wrong class, reload the whole SUBREG. This avoids
5442 needless copies if SUBREG_REG is multi-word. */
5443 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5445 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5447 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5448 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5450 push_reload (x, NULL_RTX, loc, NULL_PTR,
5451 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5452 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5456 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5457 is larger than the class size, then reload the whole SUBREG. */
5460 enum reg_class class = (context ? INDEX_REG_CLASS
5462 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5463 > reg_class_size[class])
5465 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5466 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5478 register char *fmt = GET_RTX_FORMAT (code);
5481 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5484 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5485 opnum, type, ind_levels, insn);
5492 /* X, which is found at *LOC, is a part of an address that needs to be
5493 reloaded into a register of class CLASS. If X is a constant, or if
5494 X is a PLUS that contains a constant, check that the constant is a
5495 legitimate operand and that we are supposed to be able to load
5496 it into the register.
5498 If not, force the constant into memory and reload the MEM instead.
5500 MODE is the mode to use, in case X is an integer constant.
5502 OPNUM and TYPE describe the purpose of any reloads made.
5504 IND_LEVELS says how many levels of indirect addressing this machine
5508 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5511 enum reg_class class;
5512 enum machine_mode mode;
5514 enum reload_type type;
5518 && (! LEGITIMATE_CONSTANT_P (x)
5519 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5523 /* If this is a CONST_INT, it could have been created by a
5524 plus_constant call in eliminate_regs, which means it may be
5525 on the reload_obstack. reload_obstack will be freed later, so
5526 we can't allow such RTL to be put in the constant pool. There
5527 is code in force_const_mem to check for this case, but it doesn't
5528 work because we have already popped off the reload_obstack, so
5529 rtl_obstack == saveable_obstack is true at this point. */
5530 if (GET_CODE (x) == CONST_INT)
5531 tem = x = force_const_mem (mode, GEN_INT (INTVAL (x)));
5533 tem = x = force_const_mem (mode, x);
5535 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5536 opnum, type, ind_levels, 0);
5539 else if (GET_CODE (x) == PLUS
5540 && CONSTANT_P (XEXP (x, 1))
5541 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5542 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5546 /* See comment above. */
5547 if (GET_CODE (XEXP (x, 1)) == CONST_INT)
5548 tem = force_const_mem (GET_MODE (x), GEN_INT (INTVAL (XEXP (x, 1))));
5550 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5552 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5553 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5554 opnum, type, ind_levels, 0);
5557 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5558 mode, VOIDmode, 0, 0, opnum, type);
5561 /* Substitute into the current INSN the registers into which we have reloaded
5562 the things that need reloading. The array `replacements'
5563 says contains the locations of all pointers that must be changed
5564 and says what to replace them with.
5566 Return the rtx that X translates into; usually X, but modified. */
5573 for (i = 0; i < n_replacements; i++)
5575 register struct replacement *r = &replacements[i];
5576 register rtx reloadreg = reload_reg_rtx[r->what];
5579 /* Encapsulate RELOADREG so its machine mode matches what
5580 used to be there. Note that gen_lowpart_common will
5581 do the wrong thing if RELOADREG is multi-word. RELOADREG
5582 will always be a REG here. */
5583 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5584 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5586 /* If we are putting this into a SUBREG and RELOADREG is a
5587 SUBREG, we would be making nested SUBREGs, so we have to fix
5588 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5590 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5592 if (GET_MODE (*r->subreg_loc)
5593 == GET_MODE (SUBREG_REG (reloadreg)))
5594 *r->subreg_loc = SUBREG_REG (reloadreg);
5597 *r->where = SUBREG_REG (reloadreg);
5598 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
5602 *r->where = reloadreg;
5604 /* If reload got no reg and isn't optional, something's wrong. */
5605 else if (! reload_optional[r->what])
5610 /* Make a copy of any replacements being done into X and move those copies
5611 to locations in Y, a copy of X. We only look at the highest level of
5615 copy_replacements (x, y)
5620 enum rtx_code code = GET_CODE (x);
5621 char *fmt = GET_RTX_FORMAT (code);
5622 struct replacement *r;
5624 /* We can't support X being a SUBREG because we might then need to know its
5625 location if something inside it was replaced. */
5629 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5631 for (j = 0; j < n_replacements; j++)
5633 if (replacements[j].subreg_loc == &XEXP (x, i))
5635 r = &replacements[n_replacements++];
5636 r->where = replacements[j].where;
5637 r->subreg_loc = &XEXP (y, i);
5638 r->what = replacements[j].what;
5639 r->mode = replacements[j].mode;
5641 else if (replacements[j].where == &XEXP (x, i))
5643 r = &replacements[n_replacements++];
5644 r->where = &XEXP (y, i);
5646 r->what = replacements[j].what;
5647 r->mode = replacements[j].mode;
5652 /* Change any replacements being done to *X to be done to *Y */
5655 move_replacements (x, y)
5661 for (i = 0; i < n_replacements; i++)
5662 if (replacements[i].subreg_loc == x)
5663 replacements[i].subreg_loc = y;
5664 else if (replacements[i].where == x)
5666 replacements[i].where = y;
5667 replacements[i].subreg_loc = 0;
5671 /* If LOC was scheduled to be replaced by something, return the replacement.
5672 Otherwise, return *LOC. */
5675 find_replacement (loc)
5678 struct replacement *r;
5680 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5682 rtx reloadreg = reload_reg_rtx[r->what];
5684 if (reloadreg && r->where == loc)
5686 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5687 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5691 else if (reloadreg && r->subreg_loc == loc)
5693 /* RELOADREG must be either a REG or a SUBREG.
5695 ??? Is it actually still ever a SUBREG? If so, why? */
5697 if (GET_CODE (reloadreg) == REG)
5698 return gen_rtx_REG (GET_MODE (*loc),
5699 REGNO (reloadreg) + SUBREG_WORD (*loc));
5700 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5703 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
5704 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5708 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5709 what's inside and make a new rtl if so. */
5710 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
5711 || GET_CODE (*loc) == MULT)
5713 rtx x = find_replacement (&XEXP (*loc, 0));
5714 rtx y = find_replacement (&XEXP (*loc, 1));
5716 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
5717 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
5723 /* Return nonzero if register in range [REGNO, ENDREGNO)
5724 appears either explicitly or implicitly in X
5725 other than being stored into (except for earlyclobber operands).
5727 References contained within the substructure at LOC do not count.
5728 LOC may be zero, meaning don't ignore anything.
5730 This is similar to refers_to_regno_p in rtlanal.c except that we
5731 look at equivalences for pseudos that didn't get hard registers. */
5734 refers_to_regno_for_reload_p (regno, endregno, x, loc)
5735 int regno, endregno;
5740 register RTX_CODE code;
5747 code = GET_CODE (x);
5754 /* If this is a pseudo, a hard register must not have been allocated.
5755 X must therefore either be a constant or be in memory. */
5756 if (i >= FIRST_PSEUDO_REGISTER)
5758 if (reg_equiv_memory_loc[i])
5759 return refers_to_regno_for_reload_p (regno, endregno,
5760 reg_equiv_memory_loc[i],
5763 if (reg_equiv_constant[i])
5769 return (endregno > i
5770 && regno < i + (i < FIRST_PSEUDO_REGISTER
5771 ? HARD_REGNO_NREGS (i, GET_MODE (x))
5775 /* If this is a SUBREG of a hard reg, we can see exactly which
5776 registers are being modified. Otherwise, handle normally. */
5777 if (GET_CODE (SUBREG_REG (x)) == REG
5778 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5780 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5782 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5783 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5785 return endregno > inner_regno && regno < inner_endregno;
5791 if (&SET_DEST (x) != loc
5792 /* Note setting a SUBREG counts as referring to the REG it is in for
5793 a pseudo but not for hard registers since we can
5794 treat each word individually. */
5795 && ((GET_CODE (SET_DEST (x)) == SUBREG
5796 && loc != &SUBREG_REG (SET_DEST (x))
5797 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5798 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5799 && refers_to_regno_for_reload_p (regno, endregno,
5800 SUBREG_REG (SET_DEST (x)),
5802 /* If the output is an earlyclobber operand, this is
5804 || ((GET_CODE (SET_DEST (x)) != REG
5805 || earlyclobber_operand_p (SET_DEST (x)))
5806 && refers_to_regno_for_reload_p (regno, endregno,
5807 SET_DEST (x), loc))))
5810 if (code == CLOBBER || loc == &SET_SRC (x))
5819 /* X does not match, so try its subexpressions. */
5821 fmt = GET_RTX_FORMAT (code);
5822 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5824 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5832 if (refers_to_regno_for_reload_p (regno, endregno,
5836 else if (fmt[i] == 'E')
5839 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5840 if (loc != &XVECEXP (x, i, j)
5841 && refers_to_regno_for_reload_p (regno, endregno,
5842 XVECEXP (x, i, j), loc))
5849 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5850 we check if any register number in X conflicts with the relevant register
5851 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5852 contains a MEM (we don't bother checking for memory addresses that can't
5853 conflict because we expect this to be a rare case.
5855 This function is similar to reg_overlap_mention_p in rtlanal.c except
5856 that we look at equivalences for pseudos that didn't get hard registers. */
5859 reg_overlap_mentioned_for_reload_p (x, in)
5862 int regno, endregno;
5864 /* Overly conservative. */
5865 if (GET_CODE (x) == STRICT_LOW_PART)
5868 /* If either argument is a constant, then modifying X can not affect IN. */
5869 if (CONSTANT_P (x) || CONSTANT_P (in))
5871 else if (GET_CODE (x) == SUBREG)
5873 regno = REGNO (SUBREG_REG (x));
5874 if (regno < FIRST_PSEUDO_REGISTER)
5875 regno += SUBREG_WORD (x);
5877 else if (GET_CODE (x) == REG)
5881 /* If this is a pseudo, it must not have been assigned a hard register.
5882 Therefore, it must either be in memory or be a constant. */
5884 if (regno >= FIRST_PSEUDO_REGISTER)
5886 if (reg_equiv_memory_loc[regno])
5887 return refers_to_mem_for_reload_p (in);
5888 else if (reg_equiv_constant[regno])
5893 else if (GET_CODE (x) == MEM)
5894 return refers_to_mem_for_reload_p (in);
5895 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
5896 || GET_CODE (x) == CC0)
5897 return reg_mentioned_p (x, in);
5901 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
5902 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5904 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
5907 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5911 refers_to_mem_for_reload_p (x)
5917 if (GET_CODE (x) == MEM)
5920 if (GET_CODE (x) == REG)
5921 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
5922 && reg_equiv_memory_loc[REGNO (x)]);
5924 fmt = GET_RTX_FORMAT (GET_CODE (x));
5925 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
5927 && (GET_CODE (XEXP (x, i)) == MEM
5928 || refers_to_mem_for_reload_p (XEXP (x, i))))
5934 /* Check the insns before INSN to see if there is a suitable register
5935 containing the same value as GOAL.
5936 If OTHER is -1, look for a register in class CLASS.
5937 Otherwise, just see if register number OTHER shares GOAL's value.
5939 Return an rtx for the register found, or zero if none is found.
5941 If RELOAD_REG_P is (short *)1,
5942 we reject any hard reg that appears in reload_reg_rtx
5943 because such a hard reg is also needed coming into this insn.
5945 If RELOAD_REG_P is any other nonzero value,
5946 it is a vector indexed by hard reg number
5947 and we reject any hard reg whose element in the vector is nonnegative
5948 as well as any that appears in reload_reg_rtx.
5950 If GOAL is zero, then GOALREG is a register number; we look
5951 for an equivalent for that register.
5953 MODE is the machine mode of the value we want an equivalence for.
5954 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5956 This function is used by jump.c as well as in the reload pass.
5958 If GOAL is the sum of the stack pointer and a constant, we treat it
5959 as if it were a constant except that sp is required to be unchanging. */
5962 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
5965 enum reg_class class;
5967 short *reload_reg_p;
5969 enum machine_mode mode;
5971 register rtx p = insn;
5972 rtx goaltry, valtry, value, where;
5974 register int regno = -1;
5978 int goal_mem_addr_varies = 0;
5979 int need_stable_sp = 0;
5985 else if (GET_CODE (goal) == REG)
5986 regno = REGNO (goal);
5987 else if (GET_CODE (goal) == MEM)
5989 enum rtx_code code = GET_CODE (XEXP (goal, 0));
5990 if (MEM_VOLATILE_P (goal))
5992 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
5994 /* An address with side effects must be reexecuted. */
6007 else if (CONSTANT_P (goal))
6009 else if (GET_CODE (goal) == PLUS
6010 && XEXP (goal, 0) == stack_pointer_rtx
6011 && CONSTANT_P (XEXP (goal, 1)))
6012 goal_const = need_stable_sp = 1;
6013 else if (GET_CODE (goal) == PLUS
6014 && XEXP (goal, 0) == frame_pointer_rtx
6015 && CONSTANT_P (XEXP (goal, 1)))
6020 /* On some machines, certain regs must always be rejected
6021 because they don't behave the way ordinary registers do. */
6023 #ifdef OVERLAPPING_REGNO_P
6024 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6025 && OVERLAPPING_REGNO_P (regno))
6029 /* Scan insns back from INSN, looking for one that copies
6030 a value into or out of GOAL.
6031 Stop and give up if we reach a label. */
6036 if (p == 0 || GET_CODE (p) == CODE_LABEL)
6038 if (GET_CODE (p) == INSN
6039 /* If we don't want spill regs ... */
6040 && (! (reload_reg_p != 0
6041 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6042 /* ... then ignore insns introduced by reload; they aren't useful
6043 and can cause results in reload_as_needed to be different
6044 from what they were when calculating the need for spills.
6045 If we notice an input-reload insn here, we will reject it below,
6046 but it might hide a usable equivalent. That makes bad code.
6047 It may even abort: perhaps no reg was spilled for this insn
6048 because it was assumed we would find that equivalent. */
6049 || INSN_UID (p) < reload_first_uid))
6052 pat = single_set (p);
6053 /* First check for something that sets some reg equal to GOAL. */
6056 && true_regnum (SET_SRC (pat)) == regno
6057 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6060 && true_regnum (SET_DEST (pat)) == regno
6061 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6063 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6064 /* When looking for stack pointer + const,
6065 make sure we don't use a stack adjust. */
6066 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6067 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6069 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6070 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6072 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6073 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6074 /* If we are looking for a constant,
6075 and something equivalent to that constant was copied
6076 into a reg, we can use that reg. */
6077 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6079 && rtx_equal_p (XEXP (tem, 0), goal)
6080 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6081 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6083 && GET_CODE (SET_DEST (pat)) == REG
6084 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6085 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
6086 && GET_CODE (goal) == CONST_INT
6087 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
6089 && rtx_equal_p (goal, goaltry)
6090 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
6092 && (valueno = true_regnum (valtry)) >= 0)
6093 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6095 && GET_CODE (SET_DEST (pat)) == REG
6096 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6097 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
6098 && GET_CODE (goal) == CONST_INT
6099 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6101 && rtx_equal_p (goal, goaltry)
6103 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6104 && (valueno = true_regnum (valtry)) >= 0)))
6107 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
6108 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6118 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6119 (or copying VALUE into GOAL, if GOAL is also a register).
6120 Now verify that VALUE is really valid. */
6122 /* VALUENO is the register number of VALUE; a hard register. */
6124 /* Don't try to re-use something that is killed in this insn. We want
6125 to be able to trust REG_UNUSED notes. */
6126 if (find_reg_note (where, REG_UNUSED, value))
6129 /* If we propose to get the value from the stack pointer or if GOAL is
6130 a MEM based on the stack pointer, we need a stable SP. */
6131 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6132 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6136 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6137 if (GET_MODE (value) != mode)
6140 /* Reject VALUE if it was loaded from GOAL
6141 and is also a register that appears in the address of GOAL. */
6143 if (goal_mem && value == SET_DEST (single_set (where))
6144 && refers_to_regno_for_reload_p (valueno,
6146 + HARD_REGNO_NREGS (valueno, mode)),
6150 /* Reject registers that overlap GOAL. */
6152 if (!goal_mem && !goal_const
6153 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
6154 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
6157 /* Reject VALUE if it is one of the regs reserved for reloads.
6158 Reload1 knows how to reuse them anyway, and it would get
6159 confused if we allocated one without its knowledge.
6160 (Now that insns introduced by reload are ignored above,
6161 this case shouldn't happen, but I'm not positive.) */
6163 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
6164 && reload_reg_p[valueno] >= 0)
6167 /* On some machines, certain regs must always be rejected
6168 because they don't behave the way ordinary registers do. */
6170 #ifdef OVERLAPPING_REGNO_P
6171 if (OVERLAPPING_REGNO_P (valueno))
6175 nregs = HARD_REGNO_NREGS (regno, mode);
6176 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6178 /* Reject VALUE if it is a register being used for an input reload
6179 even if it is not one of those reserved. */
6181 if (reload_reg_p != 0)
6184 for (i = 0; i < n_reloads; i++)
6185 if (reload_reg_rtx[i] != 0 && reload_in[i])
6187 int regno1 = REGNO (reload_reg_rtx[i]);
6188 int nregs1 = HARD_REGNO_NREGS (regno1,
6189 GET_MODE (reload_reg_rtx[i]));
6190 if (regno1 < valueno + valuenregs
6191 && regno1 + nregs1 > valueno)
6197 /* We must treat frame pointer as varying here,
6198 since it can vary--in a nonlocal goto as generated by expand_goto. */
6199 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6201 /* Now verify that the values of GOAL and VALUE remain unaltered
6202 until INSN is reached. */
6211 /* Don't trust the conversion past a function call
6212 if either of the two is in a call-clobbered register, or memory. */
6213 if (GET_CODE (p) == CALL_INSN
6214 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6215 && call_used_regs[regno])
6217 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
6218 && call_used_regs[valueno])
6224 #ifdef NON_SAVING_SETJMP
6225 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
6226 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6230 #ifdef INSN_CLOBBERS_REGNO_P
6231 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
6232 && INSN_CLOBBERS_REGNO_P (p, valueno))
6233 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6234 && INSN_CLOBBERS_REGNO_P (p, regno)))
6238 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6242 /* Watch out for unspec_volatile, and volatile asms. */
6243 if (volatile_insn_p (pat))
6246 /* If this insn P stores in either GOAL or VALUE, return 0.
6247 If GOAL is a memory ref and this insn writes memory, return 0.
6248 If GOAL is a memory ref and its address is not constant,
6249 and this insn P changes a register used in GOAL, return 0. */
6251 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6253 register rtx dest = SET_DEST (pat);
6254 while (GET_CODE (dest) == SUBREG
6255 || GET_CODE (dest) == ZERO_EXTRACT
6256 || GET_CODE (dest) == SIGN_EXTRACT
6257 || GET_CODE (dest) == STRICT_LOW_PART)
6258 dest = XEXP (dest, 0);
6259 if (GET_CODE (dest) == REG)
6261 register int xregno = REGNO (dest);
6263 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6264 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6267 if (xregno < regno + nregs && xregno + xnregs > regno)
6269 if (xregno < valueno + valuenregs
6270 && xregno + xnregs > valueno)
6272 if (goal_mem_addr_varies
6273 && reg_overlap_mentioned_for_reload_p (dest, goal))
6275 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6278 else if (goal_mem && GET_CODE (dest) == MEM
6279 && ! push_operand (dest, GET_MODE (dest)))
6281 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6282 && reg_equiv_memory_loc[regno] != 0)
6284 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6287 else if (GET_CODE (pat) == PARALLEL)
6290 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6292 register rtx v1 = XVECEXP (pat, 0, i);
6293 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6295 register rtx dest = SET_DEST (v1);
6296 while (GET_CODE (dest) == SUBREG
6297 || GET_CODE (dest) == ZERO_EXTRACT
6298 || GET_CODE (dest) == SIGN_EXTRACT
6299 || GET_CODE (dest) == STRICT_LOW_PART)
6300 dest = XEXP (dest, 0);
6301 if (GET_CODE (dest) == REG)
6303 register int xregno = REGNO (dest);
6305 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6306 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6309 if (xregno < regno + nregs
6310 && xregno + xnregs > regno)
6312 if (xregno < valueno + valuenregs
6313 && xregno + xnregs > valueno)
6315 if (goal_mem_addr_varies
6316 && reg_overlap_mentioned_for_reload_p (dest,
6319 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6322 else if (goal_mem && GET_CODE (dest) == MEM
6323 && ! push_operand (dest, GET_MODE (dest)))
6325 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6326 && reg_equiv_memory_loc[regno] != 0)
6328 else if (need_stable_sp
6329 && push_operand (dest, GET_MODE (dest)))
6335 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6339 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6340 link = XEXP (link, 1))
6342 pat = XEXP (link, 0);
6343 if (GET_CODE (pat) == CLOBBER)
6345 register rtx dest = SET_DEST (pat);
6346 while (GET_CODE (dest) == SUBREG
6347 || GET_CODE (dest) == ZERO_EXTRACT
6348 || GET_CODE (dest) == SIGN_EXTRACT
6349 || GET_CODE (dest) == STRICT_LOW_PART)
6350 dest = XEXP (dest, 0);
6351 if (GET_CODE (dest) == REG)
6353 register int xregno = REGNO (dest);
6355 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6356 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6359 if (xregno < regno + nregs
6360 && xregno + xnregs > regno)
6362 if (xregno < valueno + valuenregs
6363 && xregno + xnregs > valueno)
6365 if (goal_mem_addr_varies
6366 && reg_overlap_mentioned_for_reload_p (dest,
6370 else if (goal_mem && GET_CODE (dest) == MEM
6371 && ! push_operand (dest, GET_MODE (dest)))
6373 else if (need_stable_sp
6374 && push_operand (dest, GET_MODE (dest)))
6381 /* If this insn auto-increments or auto-decrements
6382 either regno or valueno, return 0 now.
6383 If GOAL is a memory ref and its address is not constant,
6384 and this insn P increments a register used in GOAL, return 0. */
6388 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6389 if (REG_NOTE_KIND (link) == REG_INC
6390 && GET_CODE (XEXP (link, 0)) == REG)
6392 register int incno = REGNO (XEXP (link, 0));
6393 if (incno < regno + nregs && incno >= regno)
6395 if (incno < valueno + valuenregs && incno >= valueno)
6397 if (goal_mem_addr_varies
6398 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6408 /* Find a place where INCED appears in an increment or decrement operator
6409 within X, and return the amount INCED is incremented or decremented by.
6410 The value is always positive. */
6413 find_inc_amount (x, inced)
6416 register enum rtx_code code = GET_CODE (x);
6422 register rtx addr = XEXP (x, 0);
6423 if ((GET_CODE (addr) == PRE_DEC
6424 || GET_CODE (addr) == POST_DEC
6425 || GET_CODE (addr) == PRE_INC
6426 || GET_CODE (addr) == POST_INC)
6427 && XEXP (addr, 0) == inced)
6428 return GET_MODE_SIZE (GET_MODE (x));
6431 fmt = GET_RTX_FORMAT (code);
6432 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6436 register int tem = find_inc_amount (XEXP (x, i), inced);
6443 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6445 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6455 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6458 regno_clobbered_p (regno, insn)
6462 if (GET_CODE (PATTERN (insn)) == CLOBBER
6463 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6464 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
6466 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6468 int i = XVECLEN (PATTERN (insn), 0) - 1;
6472 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6473 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
6474 && REGNO (XEXP (elt, 0)) == regno)
6482 static char *reload_when_needed_name[] =
6485 "RELOAD_FOR_OUTPUT",
6487 "RELOAD_FOR_INPUT_ADDRESS",
6488 "RELOAD_FOR_INPADDR_ADDRESS",
6489 "RELOAD_FOR_OUTPUT_ADDRESS",
6490 "RELOAD_FOR_OUTADDR_ADDRESS",
6491 "RELOAD_FOR_OPERAND_ADDRESS",
6492 "RELOAD_FOR_OPADDR_ADDR",
6494 "RELOAD_FOR_OTHER_ADDRESS"
6497 static char *reg_class_names[] = REG_CLASS_NAMES;
6499 /* These functions are used to print the variables set by 'find_reloads' */
6502 debug_reload_to_stream (f)
6510 for (r = 0; r < n_reloads; r++)
6512 fprintf (f, "Reload %d: ", r);
6514 if (reload_in[r] != 0)
6516 fprintf (f, "reload_in (%s) = ",
6517 GET_MODE_NAME (reload_inmode[r]));
6518 print_inline_rtx (f, reload_in[r], 24);
6519 fprintf (f, "\n\t");
6522 if (reload_out[r] != 0)
6524 fprintf (f, "reload_out (%s) = ",
6525 GET_MODE_NAME (reload_outmode[r]));
6526 print_inline_rtx (f, reload_out[r], 24);
6527 fprintf (f, "\n\t");
6530 fprintf (f, "%s, ", reg_class_names[(int) reload_reg_class[r]]);
6532 fprintf (f, "%s (opnum = %d)",
6533 reload_when_needed_name[(int) reload_when_needed[r]],
6536 if (reload_optional[r])
6537 fprintf (f, ", optional");
6539 if (reload_nongroup[r])
6540 fprintf (stderr, ", nongroup");
6542 if (reload_inc[r] != 0)
6543 fprintf (f, ", inc by %d", reload_inc[r]);
6545 if (reload_nocombine[r])
6546 fprintf (f, ", can't combine");
6548 if (reload_secondary_p[r])
6549 fprintf (f, ", secondary_reload_p");
6551 if (reload_in_reg[r] != 0)
6553 fprintf (f, "\n\treload_in_reg: ");
6554 print_inline_rtx (f, reload_in_reg[r], 24);
6557 if (reload_out_reg[r] != 0)
6559 fprintf (f, "\n\treload_out_reg: ");
6560 print_inline_rtx (f, reload_out_reg[r], 24);
6563 if (reload_reg_rtx[r] != 0)
6565 fprintf (f, "\n\treload_reg_rtx: ");
6566 print_inline_rtx (f, reload_reg_rtx[r], 24);
6570 if (reload_secondary_in_reload[r] != -1)
6572 fprintf (f, "%ssecondary_in_reload = %d",
6573 prefix, reload_secondary_in_reload[r]);
6577 if (reload_secondary_out_reload[r] != -1)
6578 fprintf (f, "%ssecondary_out_reload = %d\n",
6579 prefix, reload_secondary_out_reload[r]);
6582 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
6584 fprintf (stderr, "%ssecondary_in_icode = %s", prefix,
6585 insn_name[reload_secondary_in_icode[r]]);
6589 if (reload_secondary_out_icode[r] != CODE_FOR_nothing)
6590 fprintf (stderr, "%ssecondary_out_icode = %s", prefix,
6591 insn_name[reload_secondary_out_icode[r]]);
6600 debug_reload_to_stream (stderr);