1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
93 #include "insn-config.h"
94 #include "insn-codes.h"
98 #include "hard-reg-set.h"
105 #ifndef REGISTER_MOVE_COST
106 #define REGISTER_MOVE_COST(x, y) 2
109 #ifndef REGNO_MODE_OK_FOR_BASE_P
110 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
113 #ifndef REG_MODE_OK_FOR_BASE_P
114 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
117 /* The variables set up by `find_reloads' are:
119 n_reloads number of distinct reloads needed; max reload # + 1
120 tables indexed by reload number
121 reload_in rtx for value to reload from
122 reload_out rtx for where to store reload-reg afterward if nec
123 (often the same as reload_in)
124 reload_reg_class enum reg_class, saying what regs to reload into
125 reload_inmode enum machine_mode; mode this operand should have
126 when reloaded, on input.
127 reload_outmode enum machine_mode; mode this operand should have
128 when reloaded, on output.
129 reload_optional char, nonzero for an optional reload.
130 Optional reloads are ignored unless the
131 value is already sitting in a register.
132 reload_nongroup char, nonzero when a reload must use a register
133 not already allocated to a group.
134 reload_inc int, positive amount to increment or decrement by if
135 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
136 Ignored otherwise (don't assume it is zero).
137 reload_in_reg rtx. A reg for which reload_in is the equivalent.
138 If reload_in is a symbol_ref which came from
139 reg_equiv_constant, then this is the pseudo
140 which has that symbol_ref as equivalent.
141 reload_reg_rtx rtx. This is the register to reload into.
142 If it is zero when `find_reloads' returns,
143 you must find a suitable register in the class
144 specified by reload_reg_class, and store here
145 an rtx for that register with mode from
146 reload_inmode or reload_outmode.
147 reload_nocombine char, nonzero if this reload shouldn't be
148 combined with another reload.
149 reload_opnum int, operand number being reloaded. This is
150 used to group related reloads and need not always
151 be equal to the actual operand number in the insn,
152 though it current will be; for in-out operands, it
153 is one of the two operand numbers.
154 reload_when_needed enum, classifies reload as needed either for
155 addressing an input reload, addressing an output,
156 for addressing a non-reloaded mem ref,
157 or for unspecified purposes (i.e., more than one
159 reload_secondary_p int, 1 if this is a secondary register for one
161 reload_secondary_in_reload
162 reload_secondary_out_reload
163 int, gives the reload number of a secondary
164 reload, when needed; otherwise -1
165 reload_secondary_in_icode
166 reload_secondary_out_icode
167 enum insn_code, if a secondary reload is required,
168 gives the INSN_CODE that uses the secondary
169 reload as a scratch register, or CODE_FOR_nothing
170 if the secondary reload register is to be an
171 intermediate register. */
174 rtx reload_in[MAX_RELOADS];
175 rtx reload_out[MAX_RELOADS];
176 enum reg_class reload_reg_class[MAX_RELOADS];
177 enum machine_mode reload_inmode[MAX_RELOADS];
178 enum machine_mode reload_outmode[MAX_RELOADS];
179 rtx reload_reg_rtx[MAX_RELOADS];
180 char reload_optional[MAX_RELOADS];
181 char reload_nongroup[MAX_RELOADS];
182 int reload_inc[MAX_RELOADS];
183 rtx reload_in_reg[MAX_RELOADS];
184 rtx reload_out_reg[MAX_RELOADS];
185 char reload_nocombine[MAX_RELOADS];
186 int reload_opnum[MAX_RELOADS];
187 enum reload_type reload_when_needed[MAX_RELOADS];
188 int reload_secondary_p[MAX_RELOADS];
189 int reload_secondary_in_reload[MAX_RELOADS];
190 int reload_secondary_out_reload[MAX_RELOADS];
191 enum insn_code reload_secondary_in_icode[MAX_RELOADS];
192 enum insn_code reload_secondary_out_icode[MAX_RELOADS];
194 /* All the "earlyclobber" operands of the current insn
195 are recorded here. */
197 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
199 int reload_n_operands;
201 /* Replacing reloads.
203 If `replace_reloads' is nonzero, then as each reload is recorded
204 an entry is made for it in the table `replacements'.
205 Then later `subst_reloads' can look through that table and
206 perform all the replacements needed. */
208 /* Nonzero means record the places to replace. */
209 static int replace_reloads;
211 /* Each replacement is recorded with a structure like this. */
214 rtx *where; /* Location to store in */
215 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
216 a SUBREG; 0 otherwise. */
217 int what; /* which reload this is for */
218 enum machine_mode mode; /* mode it must have */
221 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
223 /* Number of replacements currently recorded. */
224 static int n_replacements;
226 /* Used to track what is modified by an operand. */
229 int reg_flag; /* Nonzero if referencing a register. */
230 int safe; /* Nonzero if this can't conflict with anything. */
231 rtx base; /* Base address for MEM. */
232 HOST_WIDE_INT start; /* Starting offset or register number. */
233 HOST_WIDE_INT end; /* Ending offset or register number. */
236 #ifdef SECONDARY_MEMORY_NEEDED
238 /* Save MEMs needed to copy from one class of registers to another. One MEM
239 is used per mode, but normally only one or two modes are ever used.
241 We keep two versions, before and after register elimination. The one
242 after register elimination is record separately for each operand. This
243 is done in case the address is not valid to be sure that we separately
246 static rtx secondary_memlocs[NUM_MACHINE_MODES];
247 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
250 /* The instruction we are doing reloads for;
251 so we can test whether a register dies in it. */
252 static rtx this_insn;
254 /* Nonzero if this instruction is a user-specified asm with operands. */
255 static int this_insn_is_asm;
257 /* If hard_regs_live_known is nonzero,
258 we can tell which hard regs are currently live,
259 at least enough to succeed in choosing dummy reloads. */
260 static int hard_regs_live_known;
262 /* Indexed by hard reg number,
263 element is nonnegative if hard reg has been spilled.
264 This vector is passed to `find_reloads' as an argument
265 and is not changed here. */
266 static short *static_reload_reg_p;
268 /* Set to 1 in subst_reg_equivs if it changes anything. */
269 static int subst_reg_equivs_changed;
271 /* On return from push_reload, holds the reload-number for the OUT
272 operand, which can be different for that from the input operand. */
273 static int output_reloadnum;
275 /* Compare two RTX's. */
276 #define MATCHES(x, y) \
277 (x == y || (x != 0 && (GET_CODE (x) == REG \
278 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
279 : rtx_equal_p (x, y) && ! side_effects_p (x))))
281 /* Indicates if two reloads purposes are for similar enough things that we
282 can merge their reloads. */
283 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
284 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
285 || ((when1) == (when2) && (op1) == (op2)) \
286 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
287 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
288 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
289 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
290 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
292 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
293 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
294 ((when1) != (when2) \
295 || ! ((op1) == (op2) \
296 || (when1) == RELOAD_FOR_INPUT \
297 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
298 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
300 /* If we are going to reload an address, compute the reload type to
302 #define ADDR_TYPE(type) \
303 ((type) == RELOAD_FOR_INPUT_ADDRESS \
304 ? RELOAD_FOR_INPADDR_ADDRESS \
305 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
306 ? RELOAD_FOR_OUTADDR_ADDRESS \
309 #ifdef HAVE_SECONDARY_RELOADS
310 static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
311 enum machine_mode, enum reload_type,
314 static enum reg_class find_valid_class PROTO((enum machine_mode, int));
315 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
316 enum machine_mode, enum machine_mode,
317 int, int, int, enum reload_type));
318 static void push_replacement PROTO((rtx *, int, enum machine_mode));
319 static void combine_reloads PROTO((void));
320 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
321 enum machine_mode, enum machine_mode,
322 enum reg_class, int, int));
323 static int earlyclobber_operand_p PROTO((rtx));
324 static int hard_reg_set_here_p PROTO((int, int, rtx));
325 static struct decomposition decompose PROTO((rtx));
326 static int immune_p PROTO((rtx, rtx, struct decomposition));
327 static int alternative_allows_memconst PROTO((char *, int));
328 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int, rtx));
329 static rtx make_memloc PROTO((rtx, int));
330 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
331 int, enum reload_type, int, rtx));
332 static rtx subst_reg_equivs PROTO((rtx, rtx));
333 static rtx subst_indexed_address PROTO((rtx));
334 static int find_reloads_address_1 PROTO((enum machine_mode, rtx, int, rtx *,
335 int, enum reload_type,int, rtx));
336 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
337 enum machine_mode, int,
338 enum reload_type, int));
339 static int find_inc_amount PROTO((rtx, rtx));
340 static int loc_mentioned_in_p PROTO((rtx *, rtx));
342 #ifdef HAVE_SECONDARY_RELOADS
344 /* Determine if any secondary reloads are needed for loading (if IN_P is
345 non-zero) or storing (if IN_P is zero) X to or from a reload register of
346 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
347 are needed, push them.
349 Return the reload number of the secondary reload we made, or -1 if
350 we didn't need one. *PICODE is set to the insn_code to use if we do
351 need a secondary reload. */
354 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
360 enum reg_class reload_class;
361 enum machine_mode reload_mode;
362 enum reload_type type;
363 enum insn_code *picode;
365 enum reg_class class = NO_REGS;
366 enum machine_mode mode = reload_mode;
367 enum insn_code icode = CODE_FOR_nothing;
368 enum reg_class t_class = NO_REGS;
369 enum machine_mode t_mode = VOIDmode;
370 enum insn_code t_icode = CODE_FOR_nothing;
371 enum reload_type secondary_type;
372 int s_reload, t_reload = -1;
374 if (type == RELOAD_FOR_INPUT_ADDRESS
375 || type == RELOAD_FOR_OUTPUT_ADDRESS
376 || type == RELOAD_FOR_INPADDR_ADDRESS
377 || type == RELOAD_FOR_OUTADDR_ADDRESS)
378 secondary_type = type;
380 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
382 *picode = CODE_FOR_nothing;
384 /* If X is a paradoxical SUBREG, use the inner value to determine both the
385 mode and object being reloaded. */
386 if (GET_CODE (x) == SUBREG
387 && (GET_MODE_SIZE (GET_MODE (x))
388 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
391 reload_mode = GET_MODE (x);
394 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
395 is still a pseudo-register by now, it *must* have an equivalent MEM
396 but we don't want to assume that), use that equivalent when seeing if
397 a secondary reload is needed since whether or not a reload is needed
398 might be sensitive to the form of the MEM. */
400 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
401 && reg_equiv_mem[REGNO (x)] != 0)
402 x = reg_equiv_mem[REGNO (x)];
404 #ifdef SECONDARY_INPUT_RELOAD_CLASS
406 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
409 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
411 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
414 /* If we don't need any secondary registers, done. */
415 if (class == NO_REGS)
418 /* Get a possible insn to use. If the predicate doesn't accept X, don't
421 icode = (in_p ? reload_in_optab[(int) reload_mode]
422 : reload_out_optab[(int) reload_mode]);
424 if (icode != CODE_FOR_nothing
425 && insn_operand_predicate[(int) icode][in_p]
426 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
427 icode = CODE_FOR_nothing;
429 /* If we will be using an insn, see if it can directly handle the reload
430 register we will be using. If it can, the secondary reload is for a
431 scratch register. If it can't, we will use the secondary reload for
432 an intermediate register and require a tertiary reload for the scratch
435 if (icode != CODE_FOR_nothing)
437 /* If IN_P is non-zero, the reload register will be the output in
438 operand 0. If IN_P is zero, the reload register will be the input
439 in operand 1. Outputs should have an initial "=", which we must
442 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
443 enum reg_class insn_class
444 = (insn_letter == 'r' ? GENERAL_REGS
445 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
447 if (insn_class == NO_REGS
448 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
449 /* The scratch register's constraint must start with "=&". */
450 || insn_operand_constraint[(int) icode][2][0] != '='
451 || insn_operand_constraint[(int) icode][2][1] != '&')
454 if (reg_class_subset_p (reload_class, insn_class))
455 mode = insn_operand_mode[(int) icode][2];
458 char t_letter = insn_operand_constraint[(int) icode][2][2];
460 t_mode = insn_operand_mode[(int) icode][2];
461 t_class = (t_letter == 'r' ? GENERAL_REGS
462 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter));
464 icode = CODE_FOR_nothing;
468 /* This case isn't valid, so fail. Reload is allowed to use the same
469 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
470 in the case of a secondary register, we actually need two different
471 registers for correct code. We fail here to prevent the possibility of
472 silently generating incorrect code later.
474 The convention is that secondary input reloads are valid only if the
475 secondary_class is different from class. If you have such a case, you
476 can not use secondary reloads, you must work around the problem some
479 Allow this when MODE is not reload_mode and assume that the generated
480 code handles this case (it does on the Alpha, which is the only place
481 this currently happens). */
483 if (in_p && class == reload_class && mode == reload_mode)
486 /* If we need a tertiary reload, see if we have one we can reuse or else
489 if (t_class != NO_REGS)
491 for (t_reload = 0; t_reload < n_reloads; t_reload++)
492 if (reload_secondary_p[t_reload]
493 && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
494 || reg_class_subset_p (reload_reg_class[t_reload], t_class))
495 && ((in_p && reload_inmode[t_reload] == t_mode)
496 || (! in_p && reload_outmode[t_reload] == t_mode))
497 && ((in_p && (reload_secondary_in_icode[t_reload]
498 == CODE_FOR_nothing))
499 || (! in_p &&(reload_secondary_out_icode[t_reload]
500 == CODE_FOR_nothing)))
501 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
502 && MERGABLE_RELOADS (secondary_type,
503 reload_when_needed[t_reload],
504 opnum, reload_opnum[t_reload]))
507 reload_inmode[t_reload] = t_mode;
509 reload_outmode[t_reload] = t_mode;
511 if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
512 reload_reg_class[t_reload] = t_class;
514 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
515 reload_optional[t_reload] &= optional;
516 reload_secondary_p[t_reload] = 1;
517 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
518 opnum, reload_opnum[t_reload]))
519 reload_when_needed[t_reload] = RELOAD_OTHER;
522 if (t_reload == n_reloads)
524 /* We need to make a new tertiary reload for this register class. */
525 reload_in[t_reload] = reload_out[t_reload] = 0;
526 reload_reg_class[t_reload] = t_class;
527 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
528 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
529 reload_reg_rtx[t_reload] = 0;
530 reload_optional[t_reload] = optional;
531 reload_nongroup[t_reload] = 0;
532 reload_inc[t_reload] = 0;
533 /* Maybe we could combine these, but it seems too tricky. */
534 reload_nocombine[t_reload] = 1;
535 reload_in_reg[t_reload] = 0;
536 reload_out_reg[t_reload] = 0;
537 reload_opnum[t_reload] = opnum;
538 reload_when_needed[t_reload] = secondary_type;
539 reload_secondary_in_reload[t_reload] = -1;
540 reload_secondary_out_reload[t_reload] = -1;
541 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
542 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
543 reload_secondary_p[t_reload] = 1;
549 /* See if we can reuse an existing secondary reload. */
550 for (s_reload = 0; s_reload < n_reloads; s_reload++)
551 if (reload_secondary_p[s_reload]
552 && (reg_class_subset_p (class, reload_reg_class[s_reload])
553 || reg_class_subset_p (reload_reg_class[s_reload], class))
554 && ((in_p && reload_inmode[s_reload] == mode)
555 || (! in_p && reload_outmode[s_reload] == mode))
556 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
557 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
558 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
559 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
560 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
561 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
562 opnum, reload_opnum[s_reload]))
565 reload_inmode[s_reload] = mode;
567 reload_outmode[s_reload] = mode;
569 if (reg_class_subset_p (class, reload_reg_class[s_reload]))
570 reload_reg_class[s_reload] = class;
572 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
573 reload_optional[s_reload] &= optional;
574 reload_secondary_p[s_reload] = 1;
575 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
576 opnum, reload_opnum[s_reload]))
577 reload_when_needed[s_reload] = RELOAD_OTHER;
580 if (s_reload == n_reloads)
582 #ifdef SECONDARY_MEMORY_NEEDED
583 /* If we need a memory location to copy between the two reload regs,
584 set it up now. Note that we do the input case before making
585 the reload and the output case after. This is due to the
586 way reloads are output. */
588 if (in_p && icode == CODE_FOR_nothing
589 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
590 get_secondary_mem (x, reload_mode, opnum, type);
593 /* We need to make a new secondary reload for this register class. */
594 reload_in[s_reload] = reload_out[s_reload] = 0;
595 reload_reg_class[s_reload] = class;
597 reload_inmode[s_reload] = in_p ? mode : VOIDmode;
598 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
599 reload_reg_rtx[s_reload] = 0;
600 reload_optional[s_reload] = optional;
601 reload_nongroup[s_reload] = 0;
602 reload_inc[s_reload] = 0;
603 /* Maybe we could combine these, but it seems too tricky. */
604 reload_nocombine[s_reload] = 1;
605 reload_in_reg[s_reload] = 0;
606 reload_out_reg[s_reload] = 0;
607 reload_opnum[s_reload] = opnum;
608 reload_when_needed[s_reload] = secondary_type;
609 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
610 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
611 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
612 reload_secondary_out_icode[s_reload]
613 = ! in_p ? t_icode : CODE_FOR_nothing;
614 reload_secondary_p[s_reload] = 1;
618 #ifdef SECONDARY_MEMORY_NEEDED
619 if (! in_p && icode == CODE_FOR_nothing
620 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
621 get_secondary_mem (x, mode, opnum, type);
628 #endif /* HAVE_SECONDARY_RELOADS */
630 #ifdef SECONDARY_MEMORY_NEEDED
632 /* Return a memory location that will be used to copy X in mode MODE.
633 If we haven't already made a location for this mode in this insn,
634 call find_reloads_address on the location being returned. */
637 get_secondary_mem (x, mode, opnum, type)
639 enum machine_mode mode;
641 enum reload_type type;
646 /* By default, if MODE is narrower than a word, widen it to a word.
647 This is required because most machines that require these memory
648 locations do not support short load and stores from all registers
649 (e.g., FP registers). */
651 #ifdef SECONDARY_MEMORY_NEEDED_MODE
652 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
654 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
655 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
658 /* If we already have made a MEM for this operand in MODE, return it. */
659 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
660 return secondary_memlocs_elim[(int) mode][opnum];
662 /* If this is the first time we've tried to get a MEM for this mode,
663 allocate a new one. `something_changed' in reload will get set
664 by noticing that the frame size has changed. */
666 if (secondary_memlocs[(int) mode] == 0)
668 #ifdef SECONDARY_MEMORY_NEEDED_RTX
669 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
671 secondary_memlocs[(int) mode]
672 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
676 /* Get a version of the address doing any eliminations needed. If that
677 didn't give us a new MEM, make a new one if it isn't valid. */
679 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
680 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
682 if (! mem_valid && loc == secondary_memlocs[(int) mode])
683 loc = copy_rtx (loc);
685 /* The only time the call below will do anything is if the stack
686 offset is too large. In that case IND_LEVELS doesn't matter, so we
687 can just pass a zero. Adjust the type to be the address of the
688 corresponding object. If the address was valid, save the eliminated
689 address. If it wasn't valid, we need to make a reload each time, so
694 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
695 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
698 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
702 secondary_memlocs_elim[(int) mode][opnum] = loc;
706 /* Clear any secondary memory locations we've made. */
709 clear_secondary_mem ()
711 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
713 #endif /* SECONDARY_MEMORY_NEEDED */
715 /* Find the largest class for which every register number plus N is valid in
716 M1 (if in range). Abort if no such class exists. */
718 static enum reg_class
719 find_valid_class (m1, n)
720 enum machine_mode m1;
725 enum reg_class best_class;
728 for (class = 1; class < N_REG_CLASSES; class++)
731 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
732 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
733 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
734 && ! HARD_REGNO_MODE_OK (regno + n, m1))
737 if (! bad && reg_class_size[class] > best_size)
738 best_class = class, best_size = reg_class_size[class];
747 /* Record one reload that needs to be performed.
748 IN is an rtx saying where the data are to be found before this instruction.
749 OUT says where they must be stored after the instruction.
750 (IN is zero for data not read, and OUT is zero for data not written.)
751 INLOC and OUTLOC point to the places in the instructions where
752 IN and OUT were found.
753 If IN and OUT are both non-zero, it means the same register must be used
754 to reload both IN and OUT.
756 CLASS is a register class required for the reloaded data.
757 INMODE is the machine mode that the instruction requires
758 for the reg that replaces IN and OUTMODE is likewise for OUT.
760 If IN is zero, then OUT's location and mode should be passed as
763 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
765 OPTIONAL nonzero means this reload does not need to be performed:
766 it can be discarded if that is more convenient.
768 OPNUM and TYPE say what the purpose of this reload is.
770 The return value is the reload-number for this reload.
772 If both IN and OUT are nonzero, in some rare cases we might
773 want to make two separate reloads. (Actually we never do this now.)
774 Therefore, the reload-number for OUT is stored in
775 output_reloadnum when we return; the return value applies to IN.
776 Usually (presently always), when IN and OUT are nonzero,
777 the two reload-numbers are equal, but the caller should be careful to
781 push_reload (in, out, inloc, outloc, class,
782 inmode, outmode, strict_low, optional, opnum, type)
783 register rtx in, out;
785 enum reg_class class;
786 enum machine_mode inmode, outmode;
790 enum reload_type type;
794 int dont_remove_subreg = 0;
795 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
796 int secondary_in_reload = -1, secondary_out_reload = -1;
797 enum insn_code secondary_in_icode = CODE_FOR_nothing;
798 enum insn_code secondary_out_icode = CODE_FOR_nothing;
800 /* INMODE and/or OUTMODE could be VOIDmode if no mode
801 has been specified for the operand. In that case,
802 use the operand's mode as the mode to reload. */
803 if (inmode == VOIDmode && in != 0)
804 inmode = GET_MODE (in);
805 if (outmode == VOIDmode && out != 0)
806 outmode = GET_MODE (out);
808 /* If IN is a pseudo register everywhere-equivalent to a constant, and
809 it is not in a hard register, reload straight from the constant,
810 since we want to get rid of such pseudo registers.
811 Often this is done earlier, but not always in find_reloads_address. */
812 if (in != 0 && GET_CODE (in) == REG)
814 register int regno = REGNO (in);
816 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
817 && reg_equiv_constant[regno] != 0)
818 in = reg_equiv_constant[regno];
821 /* Likewise for OUT. Of course, OUT will never be equivalent to
822 an actual constant, but it might be equivalent to a memory location
823 (in the case of a parameter). */
824 if (out != 0 && GET_CODE (out) == REG)
826 register int regno = REGNO (out);
828 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
829 && reg_equiv_constant[regno] != 0)
830 out = reg_equiv_constant[regno];
833 /* If we have a read-write operand with an address side-effect,
834 change either IN or OUT so the side-effect happens only once. */
835 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
837 if (GET_CODE (XEXP (in, 0)) == POST_INC
838 || GET_CODE (XEXP (in, 0)) == POST_DEC)
839 in = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0));
840 if (GET_CODE (XEXP (in, 0)) == PRE_INC
841 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
842 out = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0));
845 /* If we are reloading a (SUBREG constant ...), really reload just the
846 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
847 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
848 a pseudo and hence will become a MEM) with M1 wider than M2 and the
849 register is a pseudo, also reload the inside expression.
850 For machines that extend byte loads, do this for any SUBREG of a pseudo
851 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
852 M2 is an integral mode that gets extended when loaded.
853 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
854 either M1 is not valid for R or M2 is wider than a word but we only
855 need one word to store an M2-sized quantity in R.
856 (However, if OUT is nonzero, we need to reload the reg *and*
857 the subreg, so do nothing here, and let following statement handle it.)
859 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
860 we can't handle it here because CONST_INT does not indicate a mode.
862 Similarly, we must reload the inside expression if we have a
863 STRICT_LOW_PART (presumably, in == out in the cas).
865 Also reload the inner expression if it does not require a secondary
866 reload but the SUBREG does.
868 Finally, reload the inner expression if it is a register that is in
869 the class whose registers cannot be referenced in a different size
870 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
871 cannot reload just the inside since we might end up with the wrong
874 if (in != 0 && GET_CODE (in) == SUBREG && SUBREG_WORD (in) == 0
875 #ifdef CLASS_CANNOT_CHANGE_SIZE
876 && class != CLASS_CANNOT_CHANGE_SIZE
878 && (CONSTANT_P (SUBREG_REG (in))
879 || GET_CODE (SUBREG_REG (in)) == PLUS
881 || (((GET_CODE (SUBREG_REG (in)) == REG
882 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
883 || GET_CODE (SUBREG_REG (in)) == MEM)
884 && ((GET_MODE_SIZE (inmode)
885 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
886 #ifdef LOAD_EXTEND_OP
887 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
888 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
890 && (GET_MODE_SIZE (inmode)
891 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
892 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
893 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
895 #ifdef WORD_REGISTER_OPERATIONS
896 || ((GET_MODE_SIZE (inmode)
897 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
898 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
899 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
903 || (GET_CODE (SUBREG_REG (in)) == REG
904 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
905 /* The case where out is nonzero
906 is handled differently in the following statement. */
907 && (out == 0 || SUBREG_WORD (in) == 0)
908 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
909 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
911 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
913 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
914 GET_MODE (SUBREG_REG (in)))))
915 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
918 #ifdef SECONDARY_INPUT_RELOAD_CLASS
919 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
920 && (SECONDARY_INPUT_RELOAD_CLASS (class,
921 GET_MODE (SUBREG_REG (in)),
925 #ifdef CLASS_CANNOT_CHANGE_SIZE
926 || (GET_CODE (SUBREG_REG (in)) == REG
927 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
928 && (TEST_HARD_REG_BIT
929 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
930 REGNO (SUBREG_REG (in))))
931 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
932 != GET_MODE_SIZE (inmode)))
936 in_subreg_loc = inloc;
937 inloc = &SUBREG_REG (in);
939 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
940 if (GET_CODE (in) == MEM)
941 /* This is supposed to happen only for paradoxical subregs made by
942 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
943 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
946 inmode = GET_MODE (in);
949 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
950 either M1 is not valid for R or M2 is wider than a word but we only
951 need one word to store an M2-sized quantity in R.
953 However, we must reload the inner reg *as well as* the subreg in
956 /* Similar issue for (SUBREG constant ...) if it was not handled by the
957 code above. This can happen if SUBREG_WORD != 0. */
959 if (in != 0 && GET_CODE (in) == SUBREG
960 && (CONSTANT_P (SUBREG_REG (in))
961 || (GET_CODE (SUBREG_REG (in)) == REG
962 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
963 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in))
966 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
967 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
969 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
971 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
972 GET_MODE (SUBREG_REG (in)))))))))
974 /* This relies on the fact that emit_reload_insns outputs the
975 instructions for input reloads of type RELOAD_OTHER in the same
976 order as the reloads. Thus if the outer reload is also of type
977 RELOAD_OTHER, we are guaranteed that this inner reload will be
978 output before the outer reload. */
979 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
980 find_valid_class (inmode, SUBREG_WORD (in)),
981 VOIDmode, VOIDmode, 0, 0, opnum, type);
982 dont_remove_subreg = 1;
985 /* Similarly for paradoxical and problematical SUBREGs on the output.
986 Note that there is no reason we need worry about the previous value
987 of SUBREG_REG (out); even if wider than out,
988 storing in a subreg is entitled to clobber it all
989 (except in the case of STRICT_LOW_PART,
990 and in that case the constraint should label it input-output.) */
991 if (out != 0 && GET_CODE (out) == SUBREG && SUBREG_WORD (out) == 0
992 #ifdef CLASS_CANNOT_CHANGE_SIZE
993 && class != CLASS_CANNOT_CHANGE_SIZE
995 && (CONSTANT_P (SUBREG_REG (out))
997 || (((GET_CODE (SUBREG_REG (out)) == REG
998 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
999 || GET_CODE (SUBREG_REG (out)) == MEM)
1000 && ((GET_MODE_SIZE (outmode)
1001 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1002 #ifdef WORD_REGISTER_OPERATIONS
1003 || ((GET_MODE_SIZE (outmode)
1004 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1005 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1006 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1010 || (GET_CODE (SUBREG_REG (out)) == REG
1011 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1012 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1013 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1015 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1017 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1018 GET_MODE (SUBREG_REG (out)))))
1019 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
1020 + SUBREG_WORD (out)),
1022 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1023 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1024 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1025 GET_MODE (SUBREG_REG (out)),
1029 #ifdef CLASS_CANNOT_CHANGE_SIZE
1030 || (GET_CODE (SUBREG_REG (out)) == REG
1031 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1032 && (TEST_HARD_REG_BIT
1033 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1034 REGNO (SUBREG_REG (out))))
1035 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1036 != GET_MODE_SIZE (outmode)))
1040 out_subreg_loc = outloc;
1041 outloc = &SUBREG_REG (out);
1043 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1044 if (GET_CODE (out) == MEM
1045 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1048 outmode = GET_MODE (out);
1051 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1052 either M1 is not valid for R or M2 is wider than a word but we only
1053 need one word to store an M2-sized quantity in R.
1055 However, we must reload the inner reg *as well as* the subreg in
1056 that case. In this case, the inner reg is an in-out reload. */
1058 if (out != 0 && GET_CODE (out) == SUBREG
1059 && GET_CODE (SUBREG_REG (out)) == REG
1060 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1061 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out),
1063 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1064 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1066 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1068 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1069 GET_MODE (SUBREG_REG (out)))))))
1071 /* This relies on the fact that emit_reload_insns outputs the
1072 instructions for output reloads of type RELOAD_OTHER in reverse
1073 order of the reloads. Thus if the outer reload is also of type
1074 RELOAD_OTHER, we are guaranteed that this inner reload will be
1075 output after the outer reload. */
1076 dont_remove_subreg = 1;
1077 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1079 find_valid_class (outmode, SUBREG_WORD (out)),
1080 VOIDmode, VOIDmode, 0, 0,
1081 opnum, RELOAD_OTHER);
1084 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1085 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1086 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1087 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1090 /* If IN is a SUBREG of a hard register, make a new REG. This
1091 simplifies some of the cases below. */
1093 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1094 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1095 && ! dont_remove_subreg)
1096 in = gen_rtx_REG (GET_MODE (in),
1097 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
1099 /* Similarly for OUT. */
1100 if (out != 0 && GET_CODE (out) == SUBREG
1101 && GET_CODE (SUBREG_REG (out)) == REG
1102 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1103 && ! dont_remove_subreg)
1104 out = gen_rtx_REG (GET_MODE (out),
1105 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
1107 /* Narrow down the class of register wanted if that is
1108 desirable on this machine for efficiency. */
1110 class = PREFERRED_RELOAD_CLASS (in, class);
1112 /* Output reloads may need analogous treatment, different in detail. */
1113 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1115 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1118 /* Make sure we use a class that can handle the actual pseudo
1119 inside any subreg. For example, on the 386, QImode regs
1120 can appear within SImode subregs. Although GENERAL_REGS
1121 can handle SImode, QImode needs a smaller class. */
1122 #ifdef LIMIT_RELOAD_CLASS
1124 class = LIMIT_RELOAD_CLASS (inmode, class);
1125 else if (in != 0 && GET_CODE (in) == SUBREG)
1126 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1129 class = LIMIT_RELOAD_CLASS (outmode, class);
1130 if (out != 0 && GET_CODE (out) == SUBREG)
1131 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1134 /* Verify that this class is at least possible for the mode that
1136 if (this_insn_is_asm)
1138 enum machine_mode mode;
1139 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1143 if (mode == VOIDmode)
1145 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1150 outmode = word_mode;
1152 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1153 if (HARD_REGNO_MODE_OK (i, mode)
1154 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1156 int nregs = HARD_REGNO_NREGS (i, mode);
1159 for (j = 1; j < nregs; j++)
1160 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1165 if (i == FIRST_PSEUDO_REGISTER)
1167 error_for_asm (this_insn, "impossible register constraint in `asm'");
1172 /* Optional output reloads are always OK even if we have no register class,
1173 since the function of these reloads is only to have spill_reg_store etc.
1174 set, so that the storing insn can be deleted later. */
1175 if (class == NO_REGS
1176 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1179 /* We can use an existing reload if the class is right
1180 and at least one of IN and OUT is a match
1181 and the other is at worst neutral.
1182 (A zero compared against anything is neutral.)
1184 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
1185 for the same thing since that can cause us to need more reload registers
1186 than we otherwise would. */
1188 for (i = 0; i < n_reloads; i++)
1189 if ((reg_class_subset_p (class, reload_reg_class[i])
1190 || reg_class_subset_p (reload_reg_class[i], class))
1191 /* If the existing reload has a register, it must fit our class. */
1192 && (reload_reg_rtx[i] == 0
1193 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1194 true_regnum (reload_reg_rtx[i])))
1195 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
1196 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
1198 (out != 0 && MATCHES (reload_out[i], out)
1199 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
1200 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
1201 && MERGABLE_RELOADS (type, reload_when_needed[i],
1202 opnum, reload_opnum[i]))
1205 /* Reloading a plain reg for input can match a reload to postincrement
1206 that reg, since the postincrement's value is the right value.
1207 Likewise, it can match a preincrement reload, since we regard
1208 the preincrementation as happening before any ref in this insn
1209 to that register. */
1211 for (i = 0; i < n_reloads; i++)
1212 if ((reg_class_subset_p (class, reload_reg_class[i])
1213 || reg_class_subset_p (reload_reg_class[i], class))
1214 /* If the existing reload has a register, it must fit our class. */
1215 && (reload_reg_rtx[i] == 0
1216 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1217 true_regnum (reload_reg_rtx[i])))
1218 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
1219 && ((GET_CODE (in) == REG
1220 && (GET_CODE (reload_in[i]) == POST_INC
1221 || GET_CODE (reload_in[i]) == POST_DEC
1222 || GET_CODE (reload_in[i]) == PRE_INC
1223 || GET_CODE (reload_in[i]) == PRE_DEC)
1224 && MATCHES (XEXP (reload_in[i], 0), in))
1226 (GET_CODE (reload_in[i]) == REG
1227 && (GET_CODE (in) == POST_INC
1228 || GET_CODE (in) == POST_DEC
1229 || GET_CODE (in) == PRE_INC
1230 || GET_CODE (in) == PRE_DEC)
1231 && MATCHES (XEXP (in, 0), reload_in[i])))
1232 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
1233 && MERGABLE_RELOADS (type, reload_when_needed[i],
1234 opnum, reload_opnum[i]))
1236 /* Make sure reload_in ultimately has the increment,
1237 not the plain register. */
1238 if (GET_CODE (in) == REG)
1245 /* See if we need a secondary reload register to move between CLASS
1246 and IN or CLASS and OUT. Get the icode and push any required reloads
1247 needed for each of them if so. */
1249 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1252 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1253 &secondary_in_icode);
1256 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1257 if (out != 0 && GET_CODE (out) != SCRATCH)
1258 secondary_out_reload
1259 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1260 type, &secondary_out_icode);
1263 /* We found no existing reload suitable for re-use.
1264 So add an additional reload. */
1266 #ifdef SECONDARY_MEMORY_NEEDED
1267 /* If a memory location is needed for the copy, make one. */
1268 if (in != 0 && GET_CODE (in) == REG
1269 && REGNO (in) < FIRST_PSEUDO_REGISTER
1270 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1272 get_secondary_mem (in, inmode, opnum, type);
1277 reload_out[i] = out;
1278 reload_reg_class[i] = class;
1279 reload_inmode[i] = inmode;
1280 reload_outmode[i] = outmode;
1281 reload_reg_rtx[i] = 0;
1282 reload_optional[i] = optional;
1283 reload_nongroup[i] = 0;
1285 reload_nocombine[i] = 0;
1286 reload_in_reg[i] = inloc ? *inloc : 0;
1287 reload_out_reg[i] = outloc ? *outloc : 0;
1288 reload_opnum[i] = opnum;
1289 reload_when_needed[i] = type;
1290 reload_secondary_in_reload[i] = secondary_in_reload;
1291 reload_secondary_out_reload[i] = secondary_out_reload;
1292 reload_secondary_in_icode[i] = secondary_in_icode;
1293 reload_secondary_out_icode[i] = secondary_out_icode;
1294 reload_secondary_p[i] = 0;
1298 #ifdef SECONDARY_MEMORY_NEEDED
1299 if (out != 0 && GET_CODE (out) == REG
1300 && REGNO (out) < FIRST_PSEUDO_REGISTER
1301 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1303 get_secondary_mem (out, outmode, opnum, type);
1308 /* We are reusing an existing reload,
1309 but we may have additional information for it.
1310 For example, we may now have both IN and OUT
1311 while the old one may have just one of them. */
1313 /* The modes can be different. If they are, we want to reload in
1314 the larger mode, so that the value is valid for both modes. */
1315 if (inmode != VOIDmode
1316 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (reload_inmode[i]))
1317 reload_inmode[i] = inmode;
1318 if (outmode != VOIDmode
1319 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (reload_outmode[i]))
1320 reload_outmode[i] = outmode;
1323 /* If we merge reloads for two distinct rtl expressions that
1324 are identical in content, there might be duplicate address
1325 reloads. Remove the extra set now, so that if we later find
1326 that we can inherit this reload, we can get rid of the
1327 address reloads altogether. */
1328 if (reload_in[i] != in && rtx_equal_p (in, reload_in[i]))
1330 /* We must keep the address reload with the lower operand
1332 if (opnum > reload_opnum[i])
1334 remove_address_replacements (in);
1338 remove_address_replacements (reload_in[i]);
1341 reload_in_reg[i] = inloc ? *inloc : 0;
1345 reload_out[i] = out;
1346 reload_out_reg[i] = outloc ? *outloc : 0;
1348 if (reg_class_subset_p (class, reload_reg_class[i]))
1349 reload_reg_class[i] = class;
1350 reload_optional[i] &= optional;
1351 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1352 opnum, reload_opnum[i]))
1353 reload_when_needed[i] = RELOAD_OTHER;
1354 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1357 /* If the ostensible rtx being reload differs from the rtx found
1358 in the location to substitute, this reload is not safe to combine
1359 because we cannot reliably tell whether it appears in the insn. */
1361 if (in != 0 && in != *inloc)
1362 reload_nocombine[i] = 1;
1365 /* This was replaced by changes in find_reloads_address_1 and the new
1366 function inc_for_reload, which go with a new meaning of reload_inc. */
1368 /* If this is an IN/OUT reload in an insn that sets the CC,
1369 it must be for an autoincrement. It doesn't work to store
1370 the incremented value after the insn because that would clobber the CC.
1371 So we must do the increment of the value reloaded from,
1372 increment it, store it back, then decrement again. */
1373 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1377 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1378 /* If we did not find a nonzero amount-to-increment-by,
1379 that contradicts the belief that IN is being incremented
1380 in an address in this insn. */
1381 if (reload_inc[i] == 0)
1386 /* If we will replace IN and OUT with the reload-reg,
1387 record where they are located so that substitution need
1388 not do a tree walk. */
1390 if (replace_reloads)
1394 register struct replacement *r = &replacements[n_replacements++];
1396 r->subreg_loc = in_subreg_loc;
1400 if (outloc != 0 && outloc != inloc)
1402 register struct replacement *r = &replacements[n_replacements++];
1405 r->subreg_loc = out_subreg_loc;
1410 /* If this reload is just being introduced and it has both
1411 an incoming quantity and an outgoing quantity that are
1412 supposed to be made to match, see if either one of the two
1413 can serve as the place to reload into.
1415 If one of them is acceptable, set reload_reg_rtx[i]
1418 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1420 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1422 reload_reg_class[i], i,
1423 earlyclobber_operand_p (out));
1425 /* If the outgoing register already contains the same value
1426 as the incoming one, we can dispense with loading it.
1427 The easiest way to tell the caller that is to give a phony
1428 value for the incoming operand (same as outgoing one). */
1429 if (reload_reg_rtx[i] == out
1430 && (GET_CODE (in) == REG || CONSTANT_P (in))
1431 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1432 static_reload_reg_p, i, inmode))
1436 /* If this is an input reload and the operand contains a register that
1437 dies in this insn and is used nowhere else, see if it is the right class
1438 to be used for this reload. Use it if so. (This occurs most commonly
1439 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1440 this if it is also an output reload that mentions the register unless
1441 the output is a SUBREG that clobbers an entire register.
1443 Note that the operand might be one of the spill regs, if it is a
1444 pseudo reg and we are in a block where spilling has not taken place.
1445 But if there is no spilling in this block, that is OK.
1446 An explicitly used hard reg cannot be a spill reg. */
1448 if (reload_reg_rtx[i] == 0 && in != 0)
1453 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1454 if (REG_NOTE_KIND (note) == REG_DEAD
1455 && GET_CODE (XEXP (note, 0)) == REG
1456 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1457 && reg_mentioned_p (XEXP (note, 0), in)
1458 && ! refers_to_regno_for_reload_p (regno,
1460 + HARD_REGNO_NREGS (regno,
1462 PATTERN (this_insn), inloc)
1463 /* If this is also an output reload, IN cannot be used as
1464 the reload register if it is set in this insn unless IN
1466 && (out == 0 || in == out
1467 || ! hard_reg_set_here_p (regno,
1469 + HARD_REGNO_NREGS (regno,
1471 PATTERN (this_insn)))
1472 /* ??? Why is this code so different from the previous?
1473 Is there any simple coherent way to describe the two together?
1474 What's going on here. */
1476 || (GET_CODE (in) == SUBREG
1477 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1479 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1480 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1481 /* Make sure the operand fits in the reg that dies. */
1482 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1483 && HARD_REGNO_MODE_OK (regno, inmode)
1484 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1485 && HARD_REGNO_MODE_OK (regno, outmode)
1486 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1487 && !fixed_regs[regno])
1489 reload_reg_rtx[i] = gen_rtx_REG (inmode, regno);
1495 output_reloadnum = i;
1500 /* Record an additional place we must replace a value
1501 for which we have already recorded a reload.
1502 RELOADNUM is the value returned by push_reload
1503 when the reload was recorded.
1504 This is used in insn patterns that use match_dup. */
1507 push_replacement (loc, reloadnum, mode)
1510 enum machine_mode mode;
1512 if (replace_reloads)
1514 register struct replacement *r = &replacements[n_replacements++];
1515 r->what = reloadnum;
1522 /* Transfer all replacements that used to be in reload FROM to be in
1526 transfer_replacements (to, from)
1531 for (i = 0; i < n_replacements; i++)
1532 if (replacements[i].what == from)
1533 replacements[i].what = to;
1536 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1537 or a subpart of it. If we have any replacements registered for IN_RTX,
1538 cancel the reloads that were supposed to load them.
1539 Return non-zero if we canceled any reloads. */
1541 remove_address_replacements (in_rtx)
1545 char reload_flags[MAX_RELOADS];
1546 int something_changed = 0;
1548 bzero (reload_flags, sizeof reload_flags);
1549 for (i = 0, j = 0; i < n_replacements; i++)
1551 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1552 reload_flags[replacements[i].what] |= 1;
1555 replacements[j++] = replacements[i];
1556 reload_flags[replacements[i].what] |= 2;
1559 /* Note that the following store must be done before the recursive calls. */
1562 for (i = n_reloads - 1; i >= 0; i--)
1564 if (reload_flags[i] == 1)
1566 deallocate_reload_reg (i);
1567 remove_address_replacements (reload_in[i]);
1569 something_changed = 1;
1572 return something_changed;
1575 /* Return non-zero if IN contains a piece of rtl that has the address LOC */
1577 loc_mentioned_in_p (loc, in)
1580 enum rtx_code code = GET_CODE (in);
1581 char *fmt = GET_RTX_FORMAT (code);
1584 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1586 if (loc == &XEXP (in, i))
1589 if (loc_mentioned_in_p (loc, XEXP (in, i)))
1591 else if (fmt[i] == 'E')
1592 for (j = XVECLEN (in, i) - 1; i >= 0; i--)
1593 if (loc_mentioned_in_p (loc, XVECEXP (in, i, j)))
1599 /* If there is only one output reload, and it is not for an earlyclobber
1600 operand, try to combine it with a (logically unrelated) input reload
1601 to reduce the number of reload registers needed.
1603 This is safe if the input reload does not appear in
1604 the value being output-reloaded, because this implies
1605 it is not needed any more once the original insn completes.
1607 If that doesn't work, see we can use any of the registers that
1608 die in this insn as a reload register. We can if it is of the right
1609 class and does not appear in the value being output-reloaded. */
1615 int output_reload = -1;
1616 int secondary_out = -1;
1619 /* Find the output reload; return unless there is exactly one
1620 and that one is mandatory. */
1622 for (i = 0; i < n_reloads; i++)
1623 if (reload_out[i] != 0)
1625 if (output_reload >= 0)
1630 if (output_reload < 0 || reload_optional[output_reload])
1633 /* An input-output reload isn't combinable. */
1635 if (reload_in[output_reload] != 0)
1638 /* If this reload is for an earlyclobber operand, we can't do anything. */
1639 if (earlyclobber_operand_p (reload_out[output_reload]))
1642 /* Check each input reload; can we combine it? */
1644 for (i = 0; i < n_reloads; i++)
1645 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1646 /* Life span of this reload must not extend past main insn. */
1647 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1648 && reload_when_needed[i] != RELOAD_FOR_OUTADDR_ADDRESS
1649 && reload_when_needed[i] != RELOAD_OTHER
1650 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1651 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1652 reload_outmode[output_reload]))
1653 && reload_inc[i] == 0
1654 && reload_reg_rtx[i] == 0
1655 #ifdef SECONDARY_MEMORY_NEEDED
1656 /* Don't combine two reloads with different secondary
1657 memory locations. */
1658 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1659 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1660 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1661 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1663 && (SMALL_REGISTER_CLASSES
1664 ? (reload_reg_class[i] == reload_reg_class[output_reload])
1665 : (reg_class_subset_p (reload_reg_class[i],
1666 reload_reg_class[output_reload])
1667 || reg_class_subset_p (reload_reg_class[output_reload],
1668 reload_reg_class[i])))
1669 && (MATCHES (reload_in[i], reload_out[output_reload])
1670 /* Args reversed because the first arg seems to be
1671 the one that we imagine being modified
1672 while the second is the one that might be affected. */
1673 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1675 /* However, if the input is a register that appears inside
1676 the output, then we also can't share.
1677 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1678 If the same reload reg is used for both reg 69 and the
1679 result to be stored in memory, then that result
1680 will clobber the address of the memory ref. */
1681 && ! (GET_CODE (reload_in[i]) == REG
1682 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1683 reload_out[output_reload]))))
1684 && (reg_class_size[(int) reload_reg_class[i]]
1685 || SMALL_REGISTER_CLASSES)
1686 /* We will allow making things slightly worse by combining an
1687 input and an output, but no worse than that. */
1688 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1689 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1693 /* We have found a reload to combine with! */
1694 reload_out[i] = reload_out[output_reload];
1695 reload_out_reg[i] = reload_out_reg[output_reload];
1696 reload_outmode[i] = reload_outmode[output_reload];
1697 /* Mark the old output reload as inoperative. */
1698 reload_out[output_reload] = 0;
1699 /* The combined reload is needed for the entire insn. */
1700 reload_when_needed[i] = RELOAD_OTHER;
1701 /* If the output reload had a secondary reload, copy it. */
1702 if (reload_secondary_out_reload[output_reload] != -1)
1704 reload_secondary_out_reload[i]
1705 = reload_secondary_out_reload[output_reload];
1706 reload_secondary_out_icode[i]
1707 = reload_secondary_out_icode[output_reload];
1710 #ifdef SECONDARY_MEMORY_NEEDED
1711 /* Copy any secondary MEM. */
1712 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1713 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1714 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1716 /* If required, minimize the register class. */
1717 if (reg_class_subset_p (reload_reg_class[output_reload],
1718 reload_reg_class[i]))
1719 reload_reg_class[i] = reload_reg_class[output_reload];
1721 /* Transfer all replacements from the old reload to the combined. */
1722 for (j = 0; j < n_replacements; j++)
1723 if (replacements[j].what == output_reload)
1724 replacements[j].what = i;
1729 /* If this insn has only one operand that is modified or written (assumed
1730 to be the first), it must be the one corresponding to this reload. It
1731 is safe to use anything that dies in this insn for that output provided
1732 that it does not occur in the output (we already know it isn't an
1733 earlyclobber. If this is an asm insn, give up. */
1735 if (INSN_CODE (this_insn) == -1)
1738 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1739 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1740 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1743 /* See if some hard register that dies in this insn and is not used in
1744 the output is the right class. Only works if the register we pick
1745 up can fully hold our output reload. */
1746 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1747 if (REG_NOTE_KIND (note) == REG_DEAD
1748 && GET_CODE (XEXP (note, 0)) == REG
1749 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1750 reload_out[output_reload])
1751 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1752 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1753 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1754 REGNO (XEXP (note, 0)))
1755 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1756 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1757 /* Ensure that a secondary or tertiary reload for this output
1758 won't want this register. */
1759 && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1
1760 || (! (TEST_HARD_REG_BIT
1761 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1762 REGNO (XEXP (note, 0))))
1763 && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1
1764 || ! (TEST_HARD_REG_BIT
1765 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1766 REGNO (XEXP (note, 0)))))))
1767 && ! fixed_regs[REGNO (XEXP (note, 0))])
1769 reload_reg_rtx[output_reload]
1770 = gen_rtx_REG (reload_outmode[output_reload],
1771 REGNO (XEXP (note, 0)));
1776 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1777 See if one of IN and OUT is a register that may be used;
1778 this is desirable since a spill-register won't be needed.
1779 If so, return the register rtx that proves acceptable.
1781 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1782 CLASS is the register class required for the reload.
1784 If FOR_REAL is >= 0, it is the number of the reload,
1785 and in some cases when it can be discovered that OUT doesn't need
1786 to be computed, clear out reload_out[FOR_REAL].
1788 If FOR_REAL is -1, this should not be done, because this call
1789 is just to see if a register can be found, not to find and install it.
1791 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1792 puts an additional constraint on being able to use IN for OUT since
1793 IN must not appear elsewhere in the insn (it is assumed that IN itself
1794 is safe from the earlyclobber). */
1797 find_dummy_reload (real_in, real_out, inloc, outloc,
1798 inmode, outmode, class, for_real, earlyclobber)
1799 rtx real_in, real_out;
1800 rtx *inloc, *outloc;
1801 enum machine_mode inmode, outmode;
1802 enum reg_class class;
1812 /* If operands exceed a word, we can't use either of them
1813 unless they have the same size. */
1814 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1815 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1816 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1819 /* Find the inside of any subregs. */
1820 while (GET_CODE (out) == SUBREG)
1822 out_offset = SUBREG_WORD (out);
1823 out = SUBREG_REG (out);
1825 while (GET_CODE (in) == SUBREG)
1827 in_offset = SUBREG_WORD (in);
1828 in = SUBREG_REG (in);
1831 /* Narrow down the reg class, the same way push_reload will;
1832 otherwise we might find a dummy now, but push_reload won't. */
1833 class = PREFERRED_RELOAD_CLASS (in, class);
1835 /* See if OUT will do. */
1836 if (GET_CODE (out) == REG
1837 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1839 register int regno = REGNO (out) + out_offset;
1840 int nwords = HARD_REGNO_NREGS (regno, outmode);
1843 /* When we consider whether the insn uses OUT,
1844 ignore references within IN. They don't prevent us
1845 from copying IN into OUT, because those refs would
1846 move into the insn that reloads IN.
1848 However, we only ignore IN in its role as this reload.
1849 If the insn uses IN elsewhere and it contains OUT,
1850 that counts. We can't be sure it's the "same" operand
1851 so it might not go through this reload. */
1853 *inloc = const0_rtx;
1855 if (regno < FIRST_PSEUDO_REGISTER
1856 /* A fixed reg that can overlap other regs better not be used
1857 for reloading in any way. */
1858 #ifdef OVERLAPPING_REGNO_P
1859 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1861 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1862 PATTERN (this_insn), outloc))
1865 for (i = 0; i < nwords; i++)
1866 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1872 if (GET_CODE (real_out) == REG)
1875 value = gen_rtx_REG (outmode, regno);
1882 /* Consider using IN if OUT was not acceptable
1883 or if OUT dies in this insn (like the quotient in a divmod insn).
1884 We can't use IN unless it is dies in this insn,
1885 which means we must know accurately which hard regs are live.
1886 Also, the result can't go in IN if IN is used within OUT,
1887 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1888 if (hard_regs_live_known
1889 && GET_CODE (in) == REG
1890 && REGNO (in) < FIRST_PSEUDO_REGISTER
1892 || find_reg_note (this_insn, REG_UNUSED, real_out))
1893 && find_reg_note (this_insn, REG_DEAD, real_in)
1894 && !fixed_regs[REGNO (in)]
1895 && HARD_REGNO_MODE_OK (REGNO (in),
1896 /* The only case where out and real_out might
1897 have different modes is where real_out
1898 is a subreg, and in that case, out
1900 (GET_MODE (out) != VOIDmode
1901 ? GET_MODE (out) : outmode)))
1903 register int regno = REGNO (in) + in_offset;
1904 int nwords = HARD_REGNO_NREGS (regno, inmode);
1906 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1907 && ! hard_reg_set_here_p (regno, regno + nwords,
1908 PATTERN (this_insn))
1910 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1911 PATTERN (this_insn), inloc)))
1914 for (i = 0; i < nwords; i++)
1915 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1921 /* If we were going to use OUT as the reload reg
1922 and changed our mind, it means OUT is a dummy that
1923 dies here. So don't bother copying value to it. */
1924 if (for_real >= 0 && value == real_out)
1925 reload_out[for_real] = 0;
1926 if (GET_CODE (real_in) == REG)
1929 value = gen_rtx_REG (inmode, regno);
1937 /* This page contains subroutines used mainly for determining
1938 whether the IN or an OUT of a reload can serve as the
1941 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1944 earlyclobber_operand_p (x)
1949 for (i = 0; i < n_earlyclobbers; i++)
1950 if (reload_earlyclobbers[i] == x)
1956 /* Return 1 if expression X alters a hard reg in the range
1957 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1958 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1959 X should be the body of an instruction. */
1962 hard_reg_set_here_p (beg_regno, end_regno, x)
1963 register int beg_regno, end_regno;
1966 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1968 register rtx op0 = SET_DEST (x);
1969 while (GET_CODE (op0) == SUBREG)
1970 op0 = SUBREG_REG (op0);
1971 if (GET_CODE (op0) == REG)
1973 register int r = REGNO (op0);
1974 /* See if this reg overlaps range under consideration. */
1976 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1980 else if (GET_CODE (x) == PARALLEL)
1982 register int i = XVECLEN (x, 0) - 1;
1984 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1991 /* Return 1 if ADDR is a valid memory address for mode MODE,
1992 and check that each pseudo reg has the proper kind of
1996 strict_memory_address_p (mode, addr)
1997 enum machine_mode mode;
2000 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2007 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2008 if they are the same hard reg, and has special hacks for
2009 autoincrement and autodecrement.
2010 This is specifically intended for find_reloads to use
2011 in determining whether two operands match.
2012 X is the operand whose number is the lower of the two.
2014 The value is 2 if Y contains a pre-increment that matches
2015 a non-incrementing address in X. */
2017 /* ??? To be completely correct, we should arrange to pass
2018 for X the output operand and for Y the input operand.
2019 For now, we assume that the output operand has the lower number
2020 because that is natural in (SET output (... input ...)). */
2023 operands_match_p (x, y)
2027 register RTX_CODE code = GET_CODE (x);
2033 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2034 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2035 && GET_CODE (SUBREG_REG (y)) == REG)))
2041 i = REGNO (SUBREG_REG (x));
2042 if (i >= FIRST_PSEUDO_REGISTER)
2044 i += SUBREG_WORD (x);
2049 if (GET_CODE (y) == SUBREG)
2051 j = REGNO (SUBREG_REG (y));
2052 if (j >= FIRST_PSEUDO_REGISTER)
2054 j += SUBREG_WORD (y);
2059 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2060 multiple hard register group, so that for example (reg:DI 0) and
2061 (reg:SI 1) will be considered the same register. */
2062 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2063 && i < FIRST_PSEUDO_REGISTER)
2064 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
2065 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2066 && j < FIRST_PSEUDO_REGISTER)
2067 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
2071 /* If two operands must match, because they are really a single
2072 operand of an assembler insn, then two postincrements are invalid
2073 because the assembler insn would increment only once.
2074 On the other hand, an postincrement matches ordinary indexing
2075 if the postincrement is the output operand. */
2076 if (code == POST_DEC || code == POST_INC)
2077 return operands_match_p (XEXP (x, 0), y);
2078 /* Two preincrements are invalid
2079 because the assembler insn would increment only once.
2080 On the other hand, an preincrement matches ordinary indexing
2081 if the preincrement is the input operand.
2082 In this case, return 2, since some callers need to do special
2083 things when this happens. */
2084 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
2085 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2089 /* Now we have disposed of all the cases
2090 in which different rtx codes can match. */
2091 if (code != GET_CODE (y))
2093 if (code == LABEL_REF)
2094 return XEXP (x, 0) == XEXP (y, 0);
2095 if (code == SYMBOL_REF)
2096 return XSTR (x, 0) == XSTR (y, 0);
2098 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2100 if (GET_MODE (x) != GET_MODE (y))
2103 /* Compare the elements. If any pair of corresponding elements
2104 fail to match, return 0 for the whole things. */
2107 fmt = GET_RTX_FORMAT (code);
2108 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2114 if (XWINT (x, i) != XWINT (y, i))
2119 if (XINT (x, i) != XINT (y, i))
2124 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2127 /* If any subexpression returns 2,
2128 we should return 2 if we are successful. */
2137 if (XVECLEN (x, i) != XVECLEN (y, i))
2139 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2141 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2149 /* It is believed that rtx's at this level will never
2150 contain anything but integers and other rtx's,
2151 except for within LABEL_REFs and SYMBOL_REFs. */
2156 return 1 + success_2;
2159 /* Return the number of times character C occurs in string S. */
2162 n_occurrences (c, s)
2172 /* Describe the range of registers or memory referenced by X.
2173 If X is a register, set REG_FLAG and put the first register
2174 number into START and the last plus one into END.
2175 If X is a memory reference, put a base address into BASE
2176 and a range of integer offsets into START and END.
2177 If X is pushing on the stack, we can assume it causes no trouble,
2178 so we set the SAFE field. */
2180 static struct decomposition
2184 struct decomposition val;
2190 if (GET_CODE (x) == MEM)
2192 rtx base, offset = 0;
2193 rtx addr = XEXP (x, 0);
2195 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2196 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2198 val.base = XEXP (addr, 0);
2199 val.start = - GET_MODE_SIZE (GET_MODE (x));
2200 val.end = GET_MODE_SIZE (GET_MODE (x));
2201 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2205 if (GET_CODE (addr) == CONST)
2207 addr = XEXP (addr, 0);
2210 if (GET_CODE (addr) == PLUS)
2212 if (CONSTANT_P (XEXP (addr, 0)))
2214 base = XEXP (addr, 1);
2215 offset = XEXP (addr, 0);
2217 else if (CONSTANT_P (XEXP (addr, 1)))
2219 base = XEXP (addr, 0);
2220 offset = XEXP (addr, 1);
2227 offset = const0_rtx;
2229 if (GET_CODE (offset) == CONST)
2230 offset = XEXP (offset, 0);
2231 if (GET_CODE (offset) == PLUS)
2233 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2235 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2236 offset = XEXP (offset, 0);
2238 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2240 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2241 offset = XEXP (offset, 1);
2245 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2246 offset = const0_rtx;
2249 else if (GET_CODE (offset) != CONST_INT)
2251 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2252 offset = const0_rtx;
2255 if (all_const && GET_CODE (base) == PLUS)
2256 base = gen_rtx_CONST (GET_MODE (base), base);
2258 if (GET_CODE (offset) != CONST_INT)
2261 val.start = INTVAL (offset);
2262 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2266 else if (GET_CODE (x) == REG)
2269 val.start = true_regnum (x);
2272 /* A pseudo with no hard reg. */
2273 val.start = REGNO (x);
2274 val.end = val.start + 1;
2278 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2280 else if (GET_CODE (x) == SUBREG)
2282 if (GET_CODE (SUBREG_REG (x)) != REG)
2283 /* This could be more precise, but it's good enough. */
2284 return decompose (SUBREG_REG (x));
2286 val.start = true_regnum (x);
2288 return decompose (SUBREG_REG (x));
2291 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2293 else if (CONSTANT_P (x)
2294 /* This hasn't been assigned yet, so it can't conflict yet. */
2295 || GET_CODE (x) == SCRATCH)
2302 /* Return 1 if altering Y will not modify the value of X.
2303 Y is also described by YDATA, which should be decompose (Y). */
2306 immune_p (x, y, ydata)
2308 struct decomposition ydata;
2310 struct decomposition xdata;
2313 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2317 if (GET_CODE (y) != MEM)
2319 /* If Y is memory and X is not, Y can't affect X. */
2320 if (GET_CODE (x) != MEM)
2323 xdata = decompose (x);
2325 if (! rtx_equal_p (xdata.base, ydata.base))
2327 /* If bases are distinct symbolic constants, there is no overlap. */
2328 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2330 /* Constants and stack slots never overlap. */
2331 if (CONSTANT_P (xdata.base)
2332 && (ydata.base == frame_pointer_rtx
2333 || ydata.base == hard_frame_pointer_rtx
2334 || ydata.base == stack_pointer_rtx))
2336 if (CONSTANT_P (ydata.base)
2337 && (xdata.base == frame_pointer_rtx
2338 || xdata.base == hard_frame_pointer_rtx
2339 || xdata.base == stack_pointer_rtx))
2341 /* If either base is variable, we don't know anything. */
2346 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2349 /* Similar, but calls decompose. */
2352 safe_from_earlyclobber (op, clobber)
2355 struct decomposition early_data;
2357 early_data = decompose (clobber);
2358 return immune_p (op, clobber, early_data);
2361 /* Main entry point of this file: search the body of INSN
2362 for values that need reloading and record them with push_reload.
2363 REPLACE nonzero means record also where the values occur
2364 so that subst_reloads can be used.
2366 IND_LEVELS says how many levels of indirection are supported by this
2367 machine; a value of zero means that a memory reference is not a valid
2370 LIVE_KNOWN says we have valid information about which hard
2371 regs are live at each point in the program; this is true when
2372 we are called from global_alloc but false when stupid register
2373 allocation has been done.
2375 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2376 which is nonnegative if the reg has been commandeered for reloading into.
2377 It is copied into STATIC_RELOAD_REG_P and referenced from there
2378 by various subroutines.
2380 Return TRUE if some operands need to be changed, because of swapping
2381 commutative operands, reg_equiv_address substitution, or whatever. */
2384 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2386 int replace, ind_levels;
2388 short *reload_reg_p;
2390 #ifdef REGISTER_CONSTRAINTS
2392 register int insn_code_number;
2395 /* These are the constraints for the insn. We don't change them. */
2396 char *constraints1[MAX_RECOG_OPERANDS];
2397 /* These start out as the constraints for the insn
2398 and they are chewed up as we consider alternatives. */
2399 char *constraints[MAX_RECOG_OPERANDS];
2400 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2402 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2403 char pref_or_nothing[MAX_RECOG_OPERANDS];
2404 /* Nonzero for a MEM operand whose entire address needs a reload. */
2405 int address_reloaded[MAX_RECOG_OPERANDS];
2406 /* Value of enum reload_type to use for operand. */
2407 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2408 /* Value of enum reload_type to use within address of operand. */
2409 enum reload_type address_type[MAX_RECOG_OPERANDS];
2410 /* Save the usage of each operand. */
2411 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2412 int no_input_reloads = 0, no_output_reloads = 0;
2414 int this_alternative[MAX_RECOG_OPERANDS];
2415 char this_alternative_win[MAX_RECOG_OPERANDS];
2416 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2417 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2418 int this_alternative_matches[MAX_RECOG_OPERANDS];
2420 int goal_alternative[MAX_RECOG_OPERANDS];
2421 int this_alternative_number;
2422 int goal_alternative_number;
2423 int operand_reloadnum[MAX_RECOG_OPERANDS];
2424 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2425 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2426 char goal_alternative_win[MAX_RECOG_OPERANDS];
2427 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2428 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2429 int goal_alternative_swapped;
2433 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2434 rtx substed_operand[MAX_RECOG_OPERANDS];
2435 rtx body = PATTERN (insn);
2436 rtx set = single_set (insn);
2437 int goal_earlyclobber, this_earlyclobber;
2438 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2440 /* Cache the last regno for the last pseudo we did an output reload
2441 for in case the next insn uses it. */
2442 static int last_output_reload_regno = -1;
2445 this_insn_is_asm = 0; /* Tentative. */
2448 n_earlyclobbers = 0;
2449 replace_reloads = replace;
2450 hard_regs_live_known = live_known;
2451 static_reload_reg_p = reload_reg_p;
2453 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2454 neither are insns that SET cc0. Insns that use CC0 are not allowed
2455 to have any input reloads. */
2456 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2457 no_output_reloads = 1;
2460 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2461 no_input_reloads = 1;
2462 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2463 no_output_reloads = 1;
2466 #ifdef SECONDARY_MEMORY_NEEDED
2467 /* The eliminated forms of any secondary memory locations are per-insn, so
2468 clear them out here. */
2470 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2473 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2474 Make OPERANDS point to a vector of operand values.
2475 Make OPERAND_LOCS point to a vector of pointers to
2476 where the operands were found.
2477 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2478 constraint-strings for this insn.
2479 Return if the insn needs no reload processing. */
2481 switch (GET_CODE (body))
2491 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2492 is cheap to move between them. If it is not, there may not be an insn
2493 to do the copy, so we may need a reload. */
2494 if (GET_CODE (SET_DEST (body)) == REG
2495 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2496 && GET_CODE (SET_SRC (body)) == REG
2497 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2498 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2499 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2503 reload_n_operands = noperands = asm_noperands (body);
2506 /* This insn is an `asm' with operands. */
2508 insn_code_number = -1;
2509 this_insn_is_asm = 1;
2511 /* expand_asm_operands makes sure there aren't too many operands. */
2512 if (noperands > MAX_RECOG_OPERANDS)
2515 /* Now get the operand values and constraints out of the insn. */
2517 decode_asm_operands (body, recog_operand, recog_operand_loc,
2518 constraints, operand_mode);
2521 bcopy ((char *) constraints, (char *) constraints1,
2522 noperands * sizeof (char *));
2523 n_alternatives = n_occurrences (',', constraints[0]) + 1;
2529 /* Ordinary insn: recognize it, get the operands via insn_extract
2530 and get the constraints. */
2532 insn_code_number = recog_memoized (insn);
2533 if (insn_code_number < 0)
2534 fatal_insn_not_found (insn);
2536 reload_n_operands = noperands = insn_n_operands[insn_code_number];
2537 n_alternatives = insn_n_alternatives[insn_code_number];
2538 /* Just return "no reloads" if insn has no operands with constraints. */
2539 if (n_alternatives == 0)
2541 insn_extract (insn);
2542 for (i = 0; i < noperands; i++)
2544 constraints[i] = constraints1[i]
2545 = insn_operand_constraint[insn_code_number][i];
2546 operand_mode[i] = insn_operand_mode[insn_code_number][i];
2555 /* If we will need to know, later, whether some pair of operands
2556 are the same, we must compare them now and save the result.
2557 Reloading the base and index registers will clobber them
2558 and afterward they will fail to match. */
2560 for (i = 0; i < noperands; i++)
2565 substed_operand[i] = recog_operand[i];
2568 modified[i] = RELOAD_READ;
2570 /* Scan this operand's constraint to see if it is an output operand,
2571 an in-out operand, is commutative, or should match another. */
2576 modified[i] = RELOAD_WRITE;
2578 modified[i] = RELOAD_READ_WRITE;
2581 /* The last operand should not be marked commutative. */
2582 if (i == noperands - 1)
2587 else if (c >= '0' && c <= '9')
2590 operands_match[c][i]
2591 = operands_match_p (recog_operand[c], recog_operand[i]);
2593 /* An operand may not match itself. */
2597 /* If C can be commuted with C+1, and C might need to match I,
2598 then C+1 might also need to match I. */
2599 if (commutative >= 0)
2601 if (c == commutative || c == commutative + 1)
2603 int other = c + (c == commutative ? 1 : -1);
2604 operands_match[other][i]
2605 = operands_match_p (recog_operand[other], recog_operand[i]);
2607 if (i == commutative || i == commutative + 1)
2609 int other = i + (i == commutative ? 1 : -1);
2610 operands_match[c][other]
2611 = operands_match_p (recog_operand[c], recog_operand[other]);
2613 /* Note that C is supposed to be less than I.
2614 No need to consider altering both C and I because in
2615 that case we would alter one into the other. */
2621 /* Examine each operand that is a memory reference or memory address
2622 and reload parts of the addresses into index registers.
2623 Also here any references to pseudo regs that didn't get hard regs
2624 but are equivalent to constants get replaced in the insn itself
2625 with those constants. Nobody will ever see them again.
2627 Finally, set up the preferred classes of each operand. */
2629 for (i = 0; i < noperands; i++)
2631 register RTX_CODE code = GET_CODE (recog_operand[i]);
2633 address_reloaded[i] = 0;
2634 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2635 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2638 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2639 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2642 if (*constraints[i] == 0)
2643 /* Ignore things like match_operator operands. */
2645 else if (constraints[i][0] == 'p')
2647 find_reloads_address (VOIDmode, NULL_PTR,
2648 recog_operand[i], recog_operand_loc[i],
2649 i, operand_type[i], ind_levels, insn);
2651 /* If we now have a simple operand where we used to have a
2652 PLUS or MULT, re-recognize and try again. */
2653 if ((GET_RTX_CLASS (GET_CODE (*recog_operand_loc[i])) == 'o'
2654 || GET_CODE (*recog_operand_loc[i]) == SUBREG)
2655 && (GET_CODE (recog_operand[i]) == MULT
2656 || GET_CODE (recog_operand[i]) == PLUS))
2658 INSN_CODE (insn) = -1;
2659 retval = find_reloads (insn, replace, ind_levels, live_known,
2664 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2666 else if (code == MEM)
2668 if (find_reloads_address (GET_MODE (recog_operand[i]),
2669 recog_operand_loc[i],
2670 XEXP (recog_operand[i], 0),
2671 &XEXP (recog_operand[i], 0),
2672 i, address_type[i], ind_levels, insn))
2673 address_reloaded[i] = 1;
2674 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2676 else if (code == SUBREG)
2678 rtx reg = SUBREG_REG (recog_operand[i]);
2680 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2683 && &SET_DEST (set) == recog_operand_loc[i],
2686 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2687 that didn't get a hard register, emit a USE with a REG_EQUAL
2688 note in front so that we might inherit a previous, possibly
2692 && GET_CODE (op) == MEM
2693 && GET_CODE (reg) == REG
2694 && (GET_MODE_SIZE (GET_MODE (reg))
2695 >= GET_MODE_SIZE (GET_MODE (op))))
2696 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode, reg), insn))
2697 = gen_rtx_EXPR_LIST (REG_EQUAL,
2698 reg_equiv_memory_loc[REGNO (reg)], NULL_RTX);
2700 substed_operand[i] = recog_operand[i] = op;
2702 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2703 /* We can get a PLUS as an "operand" as a result of register
2704 elimination. See eliminate_regs and gen_reload. We handle
2705 a unary operator by reloading the operand. */
2706 substed_operand[i] = recog_operand[i]
2707 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2708 ind_levels, 0, insn);
2709 else if (code == REG)
2711 /* This is equivalent to calling find_reloads_toplev.
2712 The code is duplicated for speed.
2713 When we find a pseudo always equivalent to a constant,
2714 we replace it by the constant. We must be sure, however,
2715 that we don't try to replace it in the insn in which it
2717 register int regno = REGNO (recog_operand[i]);
2718 if (reg_equiv_constant[regno] != 0
2719 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2721 /* Record the existing mode so that the check if constants are
2722 allowed will work when operand_mode isn't specified. */
2724 if (operand_mode[i] == VOIDmode)
2725 operand_mode[i] = GET_MODE (recog_operand[i]);
2727 substed_operand[i] = recog_operand[i]
2728 = reg_equiv_constant[regno];
2730 if (reg_equiv_memory_loc[regno] != 0
2731 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2732 /* We need not give a valid is_set_dest argument since the case
2733 of a constant equivalence was checked above. */
2734 substed_operand[i] = recog_operand[i]
2735 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2736 ind_levels, 0, insn);
2738 /* If the operand is still a register (we didn't replace it with an
2739 equivalent), get the preferred class to reload it into. */
2740 code = GET_CODE (recog_operand[i]);
2742 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2743 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2745 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2746 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2749 /* If this is simply a copy from operand 1 to operand 0, merge the
2750 preferred classes for the operands. */
2751 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2752 && recog_operand[1] == SET_SRC (set))
2754 preferred_class[0] = preferred_class[1]
2755 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2756 pref_or_nothing[0] |= pref_or_nothing[1];
2757 pref_or_nothing[1] |= pref_or_nothing[0];
2760 /* Now see what we need for pseudo-regs that didn't get hard regs
2761 or got the wrong kind of hard reg. For this, we must consider
2762 all the operands together against the register constraints. */
2764 best = MAX_RECOG_OPERANDS * 2 + 600;
2767 goal_alternative_swapped = 0;
2770 /* The constraints are made of several alternatives.
2771 Each operand's constraint looks like foo,bar,... with commas
2772 separating the alternatives. The first alternatives for all
2773 operands go together, the second alternatives go together, etc.
2775 First loop over alternatives. */
2777 for (this_alternative_number = 0;
2778 this_alternative_number < n_alternatives;
2779 this_alternative_number++)
2781 /* Loop over operands for one constraint alternative. */
2782 /* LOSERS counts those that don't fit this alternative
2783 and would require loading. */
2785 /* BAD is set to 1 if it some operand can't fit this alternative
2786 even after reloading. */
2788 /* REJECT is a count of how undesirable this alternative says it is
2789 if any reloading is required. If the alternative matches exactly
2790 then REJECT is ignored, but otherwise it gets this much
2791 counted against it in addition to the reloading needed. Each
2792 ? counts three times here since we want the disparaging caused by
2793 a bad register class to only count 1/3 as much. */
2796 this_earlyclobber = 0;
2798 for (i = 0; i < noperands; i++)
2800 register char *p = constraints[i];
2801 register int win = 0;
2802 /* 0 => this operand can be reloaded somehow for this alternative */
2804 /* 0 => this operand can be reloaded if the alternative allows regs. */
2807 register rtx operand = recog_operand[i];
2809 /* Nonzero means this is a MEM that must be reloaded into a reg
2810 regardless of what the constraint says. */
2811 int force_reload = 0;
2813 /* Nonzero if a constant forced into memory would be OK for this
2816 int earlyclobber = 0;
2818 /* If the predicate accepts a unary operator, it means that
2819 we need to reload the operand, but do not do this for
2820 match_operator and friends. */
2821 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2822 operand = XEXP (operand, 0);
2824 /* If the operand is a SUBREG, extract
2825 the REG or MEM (or maybe even a constant) within.
2826 (Constants can occur as a result of reg_equiv_constant.) */
2828 while (GET_CODE (operand) == SUBREG)
2830 offset += SUBREG_WORD (operand);
2831 operand = SUBREG_REG (operand);
2832 /* Force reload if this is a constant or PLUS or if there may
2833 be a problem accessing OPERAND in the outer mode. */
2834 if (CONSTANT_P (operand)
2835 || GET_CODE (operand) == PLUS
2836 /* We must force a reload of paradoxical SUBREGs
2837 of a MEM because the alignment of the inner value
2838 may not be enough to do the outer reference. On
2839 big-endian machines, it may also reference outside
2842 On machines that extend byte operations and we have a
2843 SUBREG where both the inner and outer modes are no wider
2844 than a word and the inner mode is narrower, is integral,
2845 and gets extended when loaded from memory, combine.c has
2846 made assumptions about the behavior of the machine in such
2847 register access. If the data is, in fact, in memory we
2848 must always load using the size assumed to be in the
2849 register and let the insn do the different-sized
2852 This is doubly true if WORD_REGISTER_OPERATIONS. In
2853 this case eliminate_regs has left non-paradoxical
2854 subregs for push_reloads to see. Make sure it does
2855 by forcing the reload.
2857 ??? When is it right at this stage to have a subreg
2858 of a mem that is _not_ to be handled specialy? IMO
2859 those should have been reduced to just a mem. */
2860 || ((GET_CODE (operand) == MEM
2861 || (GET_CODE (operand)== REG
2862 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2863 #ifndef WORD_REGISTER_OPERATIONS
2864 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2865 < BIGGEST_ALIGNMENT)
2866 && (GET_MODE_SIZE (operand_mode[i])
2867 > GET_MODE_SIZE (GET_MODE (operand))))
2868 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2869 #ifdef LOAD_EXTEND_OP
2870 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2871 && (GET_MODE_SIZE (GET_MODE (operand))
2873 && (GET_MODE_SIZE (operand_mode[i])
2874 > GET_MODE_SIZE (GET_MODE (operand)))
2875 && INTEGRAL_MODE_P (GET_MODE (operand))
2876 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2881 /* Subreg of a hard reg which can't handle the subreg's mode
2882 or which would handle that mode in the wrong number of
2883 registers for subregging to work. */
2884 || (GET_CODE (operand) == REG
2885 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2886 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2887 && (GET_MODE_SIZE (GET_MODE (operand))
2889 && ((GET_MODE_SIZE (GET_MODE (operand))
2891 != HARD_REGNO_NREGS (REGNO (operand),
2892 GET_MODE (operand))))
2893 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2898 this_alternative[i] = (int) NO_REGS;
2899 this_alternative_win[i] = 0;
2900 this_alternative_offmemok[i] = 0;
2901 this_alternative_earlyclobber[i] = 0;
2902 this_alternative_matches[i] = -1;
2904 /* An empty constraint or empty alternative
2905 allows anything which matched the pattern. */
2906 if (*p == 0 || *p == ',')
2909 /* Scan this alternative's specs for this operand;
2910 set WIN if the operand fits any letter in this alternative.
2911 Otherwise, clear BADOP if this operand could
2912 fit some letter after reloads,
2913 or set WINREG if this operand could fit after reloads
2914 provided the constraint allows some registers. */
2916 while (*p && (c = *p++) != ',')
2925 /* The last operand should not be marked commutative. */
2926 if (i != noperands - 1)
2939 /* Ignore rest of this alternative as far as
2940 reloading is concerned. */
2941 while (*p && *p != ',') p++;
2950 this_alternative_matches[i] = c;
2951 /* We are supposed to match a previous operand.
2952 If we do, we win if that one did.
2953 If we do not, count both of the operands as losers.
2954 (This is too conservative, since most of the time
2955 only a single reload insn will be needed to make
2956 the two operands win. As a result, this alternative
2957 may be rejected when it is actually desirable.) */
2958 if ((swapped && (c != commutative || i != commutative + 1))
2959 /* If we are matching as if two operands were swapped,
2960 also pretend that operands_match had been computed
2962 But if I is the second of those and C is the first,
2963 don't exchange them, because operands_match is valid
2964 only on one side of its diagonal. */
2966 [(c == commutative || c == commutative + 1)
2967 ? 2*commutative + 1 - c : c]
2968 [(i == commutative || i == commutative + 1)
2969 ? 2*commutative + 1 - i : i])
2970 : operands_match[c][i])
2972 /* If we are matching a non-offsettable address where an
2973 offsettable address was expected, then we must reject
2974 this combination, because we can't reload it. */
2975 if (this_alternative_offmemok[c]
2976 && GET_CODE (recog_operand[c]) == MEM
2977 && this_alternative[c] == (int) NO_REGS
2978 && ! this_alternative_win[c])
2981 win = this_alternative_win[c];
2985 /* Operands don't match. */
2987 /* Retroactively mark the operand we had to match
2988 as a loser, if it wasn't already. */
2989 if (this_alternative_win[c])
2991 this_alternative_win[c] = 0;
2992 if (this_alternative[c] == (int) NO_REGS)
2994 /* But count the pair only once in the total badness of
2995 this alternative, if the pair can be a dummy reload. */
2997 = find_dummy_reload (recog_operand[i], recog_operand[c],
2998 recog_operand_loc[i], recog_operand_loc[c],
2999 operand_mode[i], operand_mode[c],
3000 this_alternative[c], -1,
3001 this_alternative_earlyclobber[c]);
3006 /* This can be fixed with reloads if the operand
3007 we are supposed to match can be fixed with reloads. */
3009 this_alternative[i] = this_alternative[c];
3011 /* If we have to reload this operand and some previous
3012 operand also had to match the same thing as this
3013 operand, we don't know how to do that. So reject this
3015 if (! win || force_reload)
3016 for (j = 0; j < i; j++)
3017 if (this_alternative_matches[j]
3018 == this_alternative_matches[i])
3024 /* All necessary reloads for an address_operand
3025 were handled in find_reloads_address. */
3026 this_alternative[i] = (int) BASE_REG_CLASS;
3033 if (GET_CODE (operand) == MEM
3034 || (GET_CODE (operand) == REG
3035 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3036 && reg_renumber[REGNO (operand)] < 0))
3038 if (CONSTANT_P (operand)
3039 /* force_const_mem does not accept HIGH. */
3040 && GET_CODE (operand) != HIGH)
3046 if (GET_CODE (operand) == MEM
3047 && ! address_reloaded[i]
3048 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3049 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3054 if (GET_CODE (operand) == MEM
3055 && ! address_reloaded[i]
3056 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3057 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3061 /* Memory operand whose address is not offsettable. */
3065 if (GET_CODE (operand) == MEM
3066 && ! (ind_levels ? offsettable_memref_p (operand)
3067 : offsettable_nonstrict_memref_p (operand))
3068 /* Certain mem addresses will become offsettable
3069 after they themselves are reloaded. This is important;
3070 we don't want our own handling of unoffsettables
3071 to override the handling of reg_equiv_address. */
3072 && !(GET_CODE (XEXP (operand, 0)) == REG
3074 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3078 /* Memory operand whose address is offsettable. */
3082 if ((GET_CODE (operand) == MEM
3083 /* If IND_LEVELS, find_reloads_address won't reload a
3084 pseudo that didn't get a hard reg, so we have to
3085 reject that case. */
3086 && (ind_levels ? offsettable_memref_p (operand)
3087 : offsettable_nonstrict_memref_p (operand)))
3088 /* A reloaded auto-increment address is offsettable,
3089 because it is now just a simple register indirect. */
3090 || (GET_CODE (operand) == MEM
3091 && address_reloaded[i]
3092 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3093 || GET_CODE (XEXP (operand, 0)) == PRE_DEC
3094 || GET_CODE (XEXP (operand, 0)) == POST_INC
3095 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3096 /* Certain mem addresses will become offsettable
3097 after they themselves are reloaded. This is important;
3098 we don't want our own handling of unoffsettables
3099 to override the handling of reg_equiv_address. */
3100 || (GET_CODE (operand) == MEM
3101 && GET_CODE (XEXP (operand, 0)) == REG
3103 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
3104 || (GET_CODE (operand) == REG
3105 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3106 && reg_renumber[REGNO (operand)] < 0
3107 /* If reg_equiv_address is nonzero, we will be
3108 loading it into a register; hence it will be
3109 offsettable, but we cannot say that reg_equiv_mem
3110 is offsettable without checking. */
3111 && ((reg_equiv_mem[REGNO (operand)] != 0
3112 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3113 || (reg_equiv_address[REGNO (operand)] != 0))))
3115 /* force_const_mem does not accept HIGH. */
3116 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3117 || GET_CODE (operand) == MEM)
3124 /* Output operand that is stored before the need for the
3125 input operands (and their index registers) is over. */
3126 earlyclobber = 1, this_earlyclobber = 1;
3130 #ifndef REAL_ARITHMETIC
3131 /* Match any floating double constant, but only if
3132 we can examine the bits of it reliably. */
3133 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3134 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3135 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
3138 if (GET_CODE (operand) == CONST_DOUBLE)
3143 if (GET_CODE (operand) == CONST_DOUBLE)
3149 if (GET_CODE (operand) == CONST_DOUBLE
3150 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3155 if (GET_CODE (operand) == CONST_INT
3156 || (GET_CODE (operand) == CONST_DOUBLE
3157 && GET_MODE (operand) == VOIDmode))
3160 if (CONSTANT_P (operand)
3161 #ifdef LEGITIMATE_PIC_OPERAND_P
3162 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3169 if (GET_CODE (operand) == CONST_INT
3170 || (GET_CODE (operand) == CONST_DOUBLE
3171 && GET_MODE (operand) == VOIDmode))
3183 if (GET_CODE (operand) == CONST_INT
3184 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3194 /* A PLUS is never a valid operand, but reload can make
3195 it from a register when eliminating registers. */
3196 && GET_CODE (operand) != PLUS
3197 /* A SCRATCH is not a valid operand. */
3198 && GET_CODE (operand) != SCRATCH
3199 #ifdef LEGITIMATE_PIC_OPERAND_P
3200 && (! CONSTANT_P (operand)
3202 || LEGITIMATE_PIC_OPERAND_P (operand))
3204 && (GENERAL_REGS == ALL_REGS
3205 || GET_CODE (operand) != REG
3206 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3207 && reg_renumber[REGNO (operand)] < 0)))
3209 /* Drop through into 'r' case */
3213 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3216 #ifdef EXTRA_CONSTRAINT
3222 if (EXTRA_CONSTRAINT (operand, c))
3229 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3232 if (GET_MODE (operand) == BLKmode)
3235 if (GET_CODE (operand) == REG
3236 && reg_fits_class_p (operand, this_alternative[i],
3237 offset, GET_MODE (recog_operand[i])))
3244 /* If this operand could be handled with a reg,
3245 and some reg is allowed, then this operand can be handled. */
3246 if (winreg && this_alternative[i] != (int) NO_REGS)
3249 /* Record which operands fit this alternative. */
3250 this_alternative_earlyclobber[i] = earlyclobber;
3251 if (win && ! force_reload)
3252 this_alternative_win[i] = 1;
3255 int const_to_mem = 0;
3257 this_alternative_offmemok[i] = offmemok;
3261 /* Alternative loses if it has no regs for a reg operand. */
3262 if (GET_CODE (operand) == REG
3263 && this_alternative[i] == (int) NO_REGS
3264 && this_alternative_matches[i] < 0)
3268 /* If this is a pseudo-register that is set in the previous
3269 insns, there's a good chance that it will already be in a
3270 spill register and we can use that spill register. So
3271 make this case cheaper.
3273 Disabled for egcs. egcs has better inheritance code and
3274 this change causes problems with the improved reload
3275 inheritance code. */
3276 if (GET_CODE (operand) == REG
3277 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3278 && REGNO (operand) == last_output_reload_regno)
3282 /* If this is a constant that is reloaded into the desired
3283 class by copying it to memory first, count that as another
3284 reload. This is consistent with other code and is
3285 required to avoid choosing another alternative when
3286 the constant is moved into memory by this function on
3287 an early reload pass. Note that the test here is
3288 precisely the same as in the code below that calls
3290 if (CONSTANT_P (operand)
3291 /* force_const_mem does not accept HIGH. */
3292 && GET_CODE (operand) != HIGH
3293 && ((PREFERRED_RELOAD_CLASS (operand,
3294 (enum reg_class) this_alternative[i])
3296 || no_input_reloads)
3297 && operand_mode[i] != VOIDmode)
3300 if (this_alternative[i] != (int) NO_REGS)
3304 /* If we can't reload this value at all, reject this
3305 alternative. Note that we could also lose due to
3306 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3309 if (! CONSTANT_P (operand)
3310 && (enum reg_class) this_alternative[i] != NO_REGS
3311 && (PREFERRED_RELOAD_CLASS (operand,
3312 (enum reg_class) this_alternative[i])
3316 /* Alternative loses if it requires a type of reload not
3317 permitted for this insn. We can always reload SCRATCH
3318 and objects with a REG_UNUSED note. */
3319 else if (GET_CODE (operand) != SCRATCH
3320 && modified[i] != RELOAD_READ && no_output_reloads
3321 && ! find_reg_note (insn, REG_UNUSED, operand))
3323 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3328 /* We prefer to reload pseudos over reloading other things,
3329 since such reloads may be able to be eliminated later.
3330 If we are reloading a SCRATCH, we won't be generating any
3331 insns, just using a register, so it is also preferred.
3332 So bump REJECT in other cases. Don't do this in the
3333 case where we are forcing a constant into memory and
3334 it will then win since we don't want to have a different
3335 alternative match then. */
3336 if (! (GET_CODE (operand) == REG
3337 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3338 && GET_CODE (operand) != SCRATCH
3339 && ! (const_to_mem && constmemok))
3342 /* Input reloads can be inherited more often than output
3343 reloads can be removed, so penalize output reloads. */
3344 if (operand_type[i] != RELOAD_FOR_INPUT
3345 && GET_CODE (operand) != SCRATCH)
3349 /* If this operand is a pseudo register that didn't get a hard
3350 reg and this alternative accepts some register, see if the
3351 class that we want is a subset of the preferred class for this
3352 register. If not, but it intersects that class, use the
3353 preferred class instead. If it does not intersect the preferred
3354 class, show that usage of this alternative should be discouraged;
3355 it will be discouraged more still if the register is `preferred
3356 or nothing'. We do this because it increases the chance of
3357 reusing our spill register in a later insn and avoiding a pair
3358 of memory stores and loads.
3360 Don't bother with this if this alternative will accept this
3363 Don't do this for a multiword operand, since it is only a
3364 small win and has the risk of requiring more spill registers,
3365 which could cause a large loss.
3367 Don't do this if the preferred class has only one register
3368 because we might otherwise exhaust the class. */
3371 if (! win && this_alternative[i] != (int) NO_REGS
3372 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3373 && reg_class_size[(int) preferred_class[i]] > 1)
3375 if (! reg_class_subset_p (this_alternative[i],
3376 preferred_class[i]))
3378 /* Since we don't have a way of forming the intersection,
3379 we just do something special if the preferred class
3380 is a subset of the class we have; that's the most
3381 common case anyway. */
3382 if (reg_class_subset_p (preferred_class[i],
3383 this_alternative[i]))
3384 this_alternative[i] = (int) preferred_class[i];
3386 reject += (2 + 2 * pref_or_nothing[i]);
3391 /* Now see if any output operands that are marked "earlyclobber"
3392 in this alternative conflict with any input operands
3393 or any memory addresses. */
3395 for (i = 0; i < noperands; i++)
3396 if (this_alternative_earlyclobber[i]
3397 && this_alternative_win[i])
3399 struct decomposition early_data;
3401 early_data = decompose (recog_operand[i]);
3403 if (modified[i] == RELOAD_READ)
3406 if (this_alternative[i] == NO_REGS)
3408 this_alternative_earlyclobber[i] = 0;
3409 if (this_insn_is_asm)
3410 error_for_asm (this_insn,
3411 "`&' constraint used with no register class");
3416 for (j = 0; j < noperands; j++)
3417 /* Is this an input operand or a memory ref? */
3418 if ((GET_CODE (recog_operand[j]) == MEM
3419 || modified[j] != RELOAD_WRITE)
3421 /* Ignore things like match_operator operands. */
3422 && *constraints1[j] != 0
3423 /* Don't count an input operand that is constrained to match
3424 the early clobber operand. */
3425 && ! (this_alternative_matches[j] == i
3426 && rtx_equal_p (recog_operand[i], recog_operand[j]))
3427 /* Is it altered by storing the earlyclobber operand? */
3428 && !immune_p (recog_operand[j], recog_operand[i], early_data))
3430 /* If the output is in a single-reg class,
3431 it's costly to reload it, so reload the input instead. */
3432 if (reg_class_size[this_alternative[i]] == 1
3433 && (GET_CODE (recog_operand[j]) == REG
3434 || GET_CODE (recog_operand[j]) == SUBREG))
3437 this_alternative_win[j] = 0;
3442 /* If an earlyclobber operand conflicts with something,
3443 it must be reloaded, so request this and count the cost. */
3447 this_alternative_win[i] = 0;
3448 for (j = 0; j < noperands; j++)
3449 if (this_alternative_matches[j] == i
3450 && this_alternative_win[j])
3452 this_alternative_win[j] = 0;
3458 /* If one alternative accepts all the operands, no reload required,
3459 choose that alternative; don't consider the remaining ones. */
3462 /* Unswap these so that they are never swapped at `finish'. */
3463 if (commutative >= 0)
3465 recog_operand[commutative] = substed_operand[commutative];
3466 recog_operand[commutative + 1]
3467 = substed_operand[commutative + 1];
3469 for (i = 0; i < noperands; i++)
3471 goal_alternative_win[i] = 1;
3472 goal_alternative[i] = this_alternative[i];
3473 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3474 goal_alternative_matches[i] = this_alternative_matches[i];
3475 goal_alternative_earlyclobber[i]
3476 = this_alternative_earlyclobber[i];
3478 goal_alternative_number = this_alternative_number;
3479 goal_alternative_swapped = swapped;
3480 goal_earlyclobber = this_earlyclobber;
3484 /* REJECT, set by the ! and ? constraint characters and when a register
3485 would be reloaded into a non-preferred class, discourages the use of
3486 this alternative for a reload goal. REJECT is incremented by six
3487 for each ? and two for each non-preferred class. */
3488 losers = losers * 6 + reject;
3490 /* If this alternative can be made to work by reloading,
3491 and it needs less reloading than the others checked so far,
3492 record it as the chosen goal for reloading. */
3493 if (! bad && best > losers)
3495 for (i = 0; i < noperands; i++)
3497 goal_alternative[i] = this_alternative[i];
3498 goal_alternative_win[i] = this_alternative_win[i];
3499 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3500 goal_alternative_matches[i] = this_alternative_matches[i];
3501 goal_alternative_earlyclobber[i]
3502 = this_alternative_earlyclobber[i];
3504 goal_alternative_swapped = swapped;
3506 goal_alternative_number = this_alternative_number;
3507 goal_earlyclobber = this_earlyclobber;
3511 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3512 then we need to try each alternative twice,
3513 the second time matching those two operands
3514 as if we had exchanged them.
3515 To do this, really exchange them in operands.
3517 If we have just tried the alternatives the second time,
3518 return operands to normal and drop through. */
3520 if (commutative >= 0)
3525 register enum reg_class tclass;
3528 recog_operand[commutative] = substed_operand[commutative + 1];
3529 recog_operand[commutative + 1] = substed_operand[commutative];
3531 tclass = preferred_class[commutative];
3532 preferred_class[commutative] = preferred_class[commutative + 1];
3533 preferred_class[commutative + 1] = tclass;
3535 t = pref_or_nothing[commutative];
3536 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3537 pref_or_nothing[commutative + 1] = t;
3539 bcopy ((char *) constraints1, (char *) constraints,
3540 noperands * sizeof (char *));
3545 recog_operand[commutative] = substed_operand[commutative];
3546 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3550 /* The operands don't meet the constraints.
3551 goal_alternative describes the alternative
3552 that we could reach by reloading the fewest operands.
3553 Reload so as to fit it. */
3555 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3557 /* No alternative works with reloads?? */
3558 if (insn_code_number >= 0)
3560 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3561 /* Avoid further trouble with this insn. */
3562 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3567 /* Jump to `finish' from above if all operands are valid already.
3568 In that case, goal_alternative_win is all 1. */
3571 /* Right now, for any pair of operands I and J that are required to match,
3573 goal_alternative_matches[J] is I.
3574 Set up goal_alternative_matched as the inverse function:
3575 goal_alternative_matched[I] = J. */
3577 for (i = 0; i < noperands; i++)
3578 goal_alternative_matched[i] = -1;
3580 for (i = 0; i < noperands; i++)
3581 if (! goal_alternative_win[i]
3582 && goal_alternative_matches[i] >= 0)
3583 goal_alternative_matched[goal_alternative_matches[i]] = i;
3585 /* If the best alternative is with operands 1 and 2 swapped,
3586 consider them swapped before reporting the reloads. Update the
3587 operand numbers of any reloads already pushed. */
3589 if (goal_alternative_swapped)
3593 tem = substed_operand[commutative];
3594 substed_operand[commutative] = substed_operand[commutative + 1];
3595 substed_operand[commutative + 1] = tem;
3596 tem = recog_operand[commutative];
3597 recog_operand[commutative] = recog_operand[commutative + 1];
3598 recog_operand[commutative + 1] = tem;
3599 tem = *recog_operand_loc[commutative];
3600 *recog_operand_loc[commutative] = *recog_operand_loc[commutative+1];
3601 *recog_operand_loc[commutative+1] = tem;
3603 for (i = 0; i < n_reloads; i++)
3605 if (reload_opnum[i] == commutative)
3606 reload_opnum[i] = commutative + 1;
3607 else if (reload_opnum[i] == commutative + 1)
3608 reload_opnum[i] = commutative;
3612 for (i = 0; i < noperands; i++)
3614 operand_reloadnum[i] = -1;
3616 /* If this is an earlyclobber operand, we need to widen the scope.
3617 The reload must remain valid from the start of the insn being
3618 reloaded until after the operand is stored into its destination.
3619 We approximate this with RELOAD_OTHER even though we know that we
3620 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3622 One special case that is worth checking is when we have an
3623 output that is earlyclobber but isn't used past the insn (typically
3624 a SCRATCH). In this case, we only need have the reload live
3625 through the insn itself, but not for any of our input or output
3627 But we must not accidentally narrow the scope of an existing
3628 RELOAD_OTHER reload - leave these alone.
3630 In any case, anything needed to address this operand can remain
3631 however they were previously categorized. */
3633 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3635 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3636 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3639 /* Any constants that aren't allowed and can't be reloaded
3640 into registers are here changed into memory references. */
3641 for (i = 0; i < noperands; i++)
3642 if (! goal_alternative_win[i]
3643 && CONSTANT_P (recog_operand[i])
3644 /* force_const_mem does not accept HIGH. */
3645 && GET_CODE (recog_operand[i]) != HIGH
3646 && ((PREFERRED_RELOAD_CLASS (recog_operand[i],
3647 (enum reg_class) goal_alternative[i])
3649 || no_input_reloads)
3650 && operand_mode[i] != VOIDmode)
3652 *recog_operand_loc[i] = recog_operand[i]
3653 = find_reloads_toplev (force_const_mem (operand_mode[i],
3655 i, address_type[i], ind_levels, 0, insn);
3656 if (alternative_allows_memconst (constraints1[i],
3657 goal_alternative_number))
3658 goal_alternative_win[i] = 1;
3661 /* Record the values of the earlyclobber operands for the caller. */
3662 if (goal_earlyclobber)
3663 for (i = 0; i < noperands; i++)
3664 if (goal_alternative_earlyclobber[i])
3665 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3667 /* Now record reloads for all the operands that need them. */
3668 last_output_reload_regno = -1;
3669 for (i = 0; i < noperands; i++)
3670 if (! goal_alternative_win[i])
3672 /* Operands that match previous ones have already been handled. */
3673 if (goal_alternative_matches[i] >= 0)
3675 /* Handle an operand with a nonoffsettable address
3676 appearing where an offsettable address will do
3677 by reloading the address into a base register.
3679 ??? We can also do this when the operand is a register and
3680 reg_equiv_mem is not offsettable, but this is a bit tricky,
3681 so we don't bother with it. It may not be worth doing. */
3682 else if (goal_alternative_matched[i] == -1
3683 && goal_alternative_offmemok[i]
3684 && GET_CODE (recog_operand[i]) == MEM)
3686 operand_reloadnum[i]
3687 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3688 &XEXP (recog_operand[i], 0), NULL_PTR,
3689 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3690 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3691 reload_inc[operand_reloadnum[i]]
3692 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3694 /* If this operand is an output, we will have made any
3695 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3696 now we are treating part of the operand as an input, so
3697 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3699 if (modified[i] == RELOAD_WRITE)
3701 for (j = 0; j < n_reloads; j++)
3703 if (reload_opnum[j] == i)
3705 if (reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3706 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3707 else if (reload_when_needed[j]
3708 == RELOAD_FOR_OUTADDR_ADDRESS)
3709 reload_when_needed[j] = RELOAD_FOR_INPADDR_ADDRESS;
3714 else if (goal_alternative_matched[i] == -1)
3716 operand_reloadnum[i]
3717 = push_reload ((modified[i] != RELOAD_WRITE
3718 ? recog_operand[i] : 0),
3719 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3720 (modified[i] != RELOAD_WRITE
3721 ? recog_operand_loc[i] : 0),
3722 (modified[i] != RELOAD_READ
3723 ? recog_operand_loc[i] : 0),
3724 (enum reg_class) goal_alternative[i],
3725 (modified[i] == RELOAD_WRITE
3726 ? VOIDmode : operand_mode[i]),
3727 (modified[i] == RELOAD_READ
3728 ? VOIDmode : operand_mode[i]),
3729 (insn_code_number < 0 ? 0
3730 : insn_operand_strict_low[insn_code_number][i]),
3731 0, i, operand_type[i]);
3732 if (modified[i] != RELOAD_READ
3733 && GET_CODE (recog_operand[i]) == REG)
3734 last_output_reload_regno = REGNO (recog_operand[i]);
3736 /* In a matching pair of operands, one must be input only
3737 and the other must be output only.
3738 Pass the input operand as IN and the other as OUT. */
3739 else if (modified[i] == RELOAD_READ
3740 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3742 operand_reloadnum[i]
3743 = push_reload (recog_operand[i],
3744 recog_operand[goal_alternative_matched[i]],
3745 recog_operand_loc[i],
3746 recog_operand_loc[goal_alternative_matched[i]],
3747 (enum reg_class) goal_alternative[i],
3749 operand_mode[goal_alternative_matched[i]],
3750 0, 0, i, RELOAD_OTHER);
3751 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3752 if (GET_CODE (recog_operand[goal_alternative_matched[i]]) == REG)
3753 last_output_reload_regno
3754 = REGNO (recog_operand[goal_alternative_matched[i]]);
3756 else if (modified[i] == RELOAD_WRITE
3757 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3759 operand_reloadnum[goal_alternative_matched[i]]
3760 = push_reload (recog_operand[goal_alternative_matched[i]],
3762 recog_operand_loc[goal_alternative_matched[i]],
3763 recog_operand_loc[i],
3764 (enum reg_class) goal_alternative[i],
3765 operand_mode[goal_alternative_matched[i]],
3767 0, 0, i, RELOAD_OTHER);
3768 operand_reloadnum[i] = output_reloadnum;
3769 if (GET_CODE (recog_operand[i]) == REG)
3770 last_output_reload_regno = REGNO (recog_operand[i]);
3772 else if (insn_code_number >= 0)
3776 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3777 /* Avoid further trouble with this insn. */
3778 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3783 else if (goal_alternative_matched[i] < 0
3784 && goal_alternative_matches[i] < 0
3787 /* For each non-matching operand that's a MEM or a pseudo-register
3788 that didn't get a hard register, make an optional reload.
3789 This may get done even if the insn needs no reloads otherwise. */
3791 rtx operand = recog_operand[i];
3793 while (GET_CODE (operand) == SUBREG)
3794 operand = XEXP (operand, 0);
3795 if ((GET_CODE (operand) == MEM
3796 || (GET_CODE (operand) == REG
3797 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3798 /* If this is only for an output, the optional reload would not
3799 actually cause us to use a register now, just note that
3800 something is stored here. */
3801 && ((enum reg_class) goal_alternative[i] != NO_REGS
3802 || modified[i] == RELOAD_WRITE)
3803 && ! no_input_reloads
3804 /* An optional output reload might allow to delete INSN later.
3805 We mustn't make in-out reloads on insns that are not permitted
3807 If this is an asm, we can't delete it; we must not even call
3808 push_reload for an optional output reload in this case,
3809 because we can't be sure that the constraint allows a register,
3810 and push_reload verifies the constraints for asms. */
3811 && (modified[i] == RELOAD_READ
3812 || (! no_output_reloads && ! this_insn_is_asm)))
3813 operand_reloadnum[i]
3814 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3815 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3816 (modified[i] != RELOAD_WRITE
3817 ? recog_operand_loc[i] : 0),
3818 (modified[i] != RELOAD_READ
3819 ? recog_operand_loc[i] : 0),
3820 (enum reg_class) goal_alternative[i],
3821 (modified[i] == RELOAD_WRITE
3822 ? VOIDmode : operand_mode[i]),
3823 (modified[i] == RELOAD_READ
3824 ? VOIDmode : operand_mode[i]),
3825 (insn_code_number < 0 ? 0
3826 : insn_operand_strict_low[insn_code_number][i]),
3827 1, i, operand_type[i]);
3828 /* If a memory reference remains, yet we can't make an optional
3829 reload, check if this is actually a pseudo register reference;
3830 we then need to emit a USE and/or a CLOBBER so that reload
3831 inheritance will do the right thing. */
3832 else if (replace && GET_CODE (operand) == MEM)
3834 operand = *recog_operand_loc[i];
3836 while (GET_CODE (operand) == SUBREG)
3837 operand = XEXP (operand, 0);
3838 if (GET_CODE (operand) == REG)
3840 if (modified[i] != RELOAD_WRITE)
3841 emit_insn_before (gen_rtx_USE (VOIDmode, operand), insn);
3842 if (modified[i] != RELOAD_READ)
3843 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3847 else if (goal_alternative_matches[i] >= 0
3848 && goal_alternative_win[goal_alternative_matches[i]]
3849 && modified[i] == RELOAD_READ
3850 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3851 && ! no_input_reloads && ! no_output_reloads
3854 /* Similarly, make an optional reload for a pair of matching
3855 objects that are in MEM or a pseudo that didn't get a hard reg. */
3857 rtx operand = recog_operand[i];
3859 while (GET_CODE (operand) == SUBREG)
3860 operand = XEXP (operand, 0);
3861 if ((GET_CODE (operand) == MEM
3862 || (GET_CODE (operand) == REG
3863 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3864 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3866 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3867 = push_reload (recog_operand[goal_alternative_matches[i]],
3869 recog_operand_loc[goal_alternative_matches[i]],
3870 recog_operand_loc[i],
3871 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3872 operand_mode[goal_alternative_matches[i]],
3874 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3877 /* Perform whatever substitutions on the operands we are supposed
3878 to make due to commutativity or replacement of registers
3879 with equivalent constants or memory slots. */
3881 for (i = 0; i < noperands; i++)
3883 /* We only do this on the last pass through reload, because it is
3884 possible for some data (like reg_equiv_address) to be changed during
3885 later passes. Moreover, we loose the opportunity to get a useful
3886 reload_{in,out}_reg when we do these replacements. */
3889 *recog_operand_loc[i] = substed_operand[i];
3891 retval |= (substed_operand[i] != *recog_operand_loc[i]);
3894 /* If this insn pattern contains any MATCH_DUP's, make sure that
3895 they will be substituted if the operands they match are substituted.
3896 Also do now any substitutions we already did on the operands.
3898 Don't do this if we aren't making replacements because we might be
3899 propagating things allocated by frame pointer elimination into places
3900 it doesn't expect. */
3902 if (insn_code_number >= 0 && replace)
3903 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3905 int opno = recog_dup_num[i];
3906 *recog_dup_loc[i] = *recog_operand_loc[opno];
3907 if (operand_reloadnum[opno] >= 0)
3908 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3909 insn_operand_mode[insn_code_number][opno]);
3913 /* This loses because reloading of prior insns can invalidate the equivalence
3914 (or at least find_equiv_reg isn't smart enough to find it any more),
3915 causing this insn to need more reload regs than it needed before.
3916 It may be too late to make the reload regs available.
3917 Now this optimization is done safely in choose_reload_regs. */
3919 /* For each reload of a reg into some other class of reg,
3920 search for an existing equivalent reg (same value now) in the right class.
3921 We can use it as long as we don't need to change its contents. */
3922 for (i = 0; i < n_reloads; i++)
3923 if (reload_reg_rtx[i] == 0
3924 && reload_in[i] != 0
3925 && GET_CODE (reload_in[i]) == REG
3926 && reload_out[i] == 0)
3929 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3930 static_reload_reg_p, 0, reload_inmode[i]);
3931 /* Prevent generation of insn to load the value
3932 because the one we found already has the value. */
3933 if (reload_reg_rtx[i])
3934 reload_in[i] = reload_reg_rtx[i];
3938 /* Perhaps an output reload can be combined with another
3939 to reduce needs by one. */
3940 if (!goal_earlyclobber)
3943 /* If we have a pair of reloads for parts of an address, they are reloading
3944 the same object, the operands themselves were not reloaded, and they
3945 are for two operands that are supposed to match, merge the reloads and
3946 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3948 for (i = 0; i < n_reloads; i++)
3952 for (j = i + 1; j < n_reloads; j++)
3953 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3954 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3955 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3956 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3957 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3958 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS
3959 || reload_when_needed[j] == RELOAD_FOR_INPADDR_ADDRESS
3960 || reload_when_needed[j] == RELOAD_FOR_OUTADDR_ADDRESS)
3961 && rtx_equal_p (reload_in[i], reload_in[j])
3962 && (operand_reloadnum[reload_opnum[i]] < 0
3963 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3964 && (operand_reloadnum[reload_opnum[j]] < 0
3965 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3966 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3967 || (goal_alternative_matches[reload_opnum[j]]
3968 == reload_opnum[i])))
3970 for (k = 0; k < n_replacements; k++)
3971 if (replacements[k].what == j)
3972 replacements[k].what = i;
3974 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3975 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3976 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
3978 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3983 /* Scan all the reloads and update their type.
3984 If a reload is for the address of an operand and we didn't reload
3985 that operand, change the type. Similarly, change the operand number
3986 of a reload when two operands match. If a reload is optional, treat it
3987 as though the operand isn't reloaded.
3989 ??? This latter case is somewhat odd because if we do the optional
3990 reload, it means the object is hanging around. Thus we need only
3991 do the address reload if the optional reload was NOT done.
3993 Change secondary reloads to be the address type of their operand, not
3996 If an operand's reload is now RELOAD_OTHER, change any
3997 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3998 RELOAD_FOR_OTHER_ADDRESS. */
4000 for (i = 0; i < n_reloads; i++)
4002 if (reload_secondary_p[i]
4003 && reload_when_needed[i] == operand_type[reload_opnum[i]])
4004 reload_when_needed[i] = address_type[reload_opnum[i]];
4006 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
4007 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
4008 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
4009 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
4010 && (operand_reloadnum[reload_opnum[i]] < 0
4011 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
4013 /* If we have a secondary reload to go along with this reload,
4014 change its type to RELOAD_FOR_OPADDR_ADDR. */
4016 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
4017 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
4018 && reload_secondary_in_reload[i] != -1)
4020 int secondary_in_reload = reload_secondary_in_reload[i];
4022 reload_when_needed[secondary_in_reload]
4023 = RELOAD_FOR_OPADDR_ADDR;
4025 /* If there's a tertiary reload we have to change it also. */
4026 if (secondary_in_reload > 0
4027 && reload_secondary_in_reload[secondary_in_reload] != -1)
4028 reload_when_needed[reload_secondary_in_reload[secondary_in_reload]]
4029 = RELOAD_FOR_OPADDR_ADDR;
4032 if ((reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
4033 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
4034 && reload_secondary_out_reload[i] != -1)
4036 int secondary_out_reload = reload_secondary_out_reload[i];
4038 reload_when_needed[secondary_out_reload]
4039 = RELOAD_FOR_OPADDR_ADDR;
4041 /* If there's a tertiary reload we have to change it also. */
4042 if (secondary_out_reload
4043 && reload_secondary_out_reload[secondary_out_reload] != -1)
4044 reload_when_needed[reload_secondary_out_reload[secondary_out_reload]]
4045 = RELOAD_FOR_OPADDR_ADDR;
4048 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
4049 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
4050 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
4052 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
4055 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
4056 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
4057 && operand_reloadnum[reload_opnum[i]] >= 0
4058 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
4060 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
4062 if (goal_alternative_matches[reload_opnum[i]] >= 0)
4063 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
4066 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4067 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4068 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4070 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4071 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4072 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4073 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4074 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4075 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4076 This is complicated by the fact that a single operand can have more
4077 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4078 choose_reload_regs without affecting code quality, and cases that
4079 actually fail are extremely rare, so it turns out to be better to fix
4080 the problem here by not generating cases that choose_reload_regs will
4082 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4083 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4085 We can reduce the register pressure by exploiting that a
4086 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4087 does not conflict with any of them, if it is only used for the first of
4088 the RELOAD_FOR_X_ADDRESS reloads. */
4090 int first_op_addr_num = -2;
4091 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4092 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4094 /* We use last_op_addr_reload and the contents of the above arrays
4095 first as flags - -2 means no instance encountered, -1 means exactly
4096 one instance encountered.
4097 If more than one instance has been encountered, we store the reload
4098 number of the first reload of the kind in question; reload numbers
4099 are known to be non-negative. */
4100 for (i = 0; i < noperands; i++)
4101 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4102 for (i = n_reloads - 1; i >= 0; i--)
4104 switch (reload_when_needed[i])
4106 case RELOAD_FOR_OPERAND_ADDRESS:
4107 if (++first_op_addr_num >= 0)
4109 first_op_addr_num = i;
4113 case RELOAD_FOR_INPUT_ADDRESS:
4114 if (++first_inpaddr_num[reload_opnum[i]] >= 0)
4116 first_inpaddr_num[reload_opnum[i]] = i;
4120 case RELOAD_FOR_OUTPUT_ADDRESS:
4121 if (++first_outpaddr_num[reload_opnum[i]] >= 0)
4123 first_outpaddr_num[reload_opnum[i]] = i;
4134 for (i = 0; i < n_reloads; i++)
4136 int first_num, type;
4138 switch (reload_when_needed[i])
4140 case RELOAD_FOR_OPADDR_ADDR:
4141 first_num = first_op_addr_num;
4142 type = RELOAD_FOR_OPERAND_ADDRESS;
4144 case RELOAD_FOR_INPADDR_ADDRESS:
4145 first_num = first_inpaddr_num[reload_opnum[i]];
4146 type = RELOAD_FOR_INPUT_ADDRESS;
4148 case RELOAD_FOR_OUTADDR_ADDRESS:
4149 first_num = first_outpaddr_num[reload_opnum[i]];
4150 type = RELOAD_FOR_OUTPUT_ADDRESS;
4157 else if (i > first_num)
4158 reload_when_needed[i] = type;
4161 /* Check if the only TYPE reload that uses reload I is
4162 reload FIRST_NUM. */
4163 for (j = n_reloads - 1; j > first_num; j--)
4165 if (reload_when_needed[j] == type
4166 && reg_mentioned_p (reload_in[i], reload_in[j]))
4168 reload_when_needed[i] = type;
4177 /* See if we have any reloads that are now allowed to be merged
4178 because we've changed when the reload is needed to
4179 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4180 check for the most common cases. */
4182 for (i = 0; i < n_reloads; i++)
4183 if (reload_in[i] != 0 && reload_out[i] == 0
4184 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
4185 || reload_when_needed[i] == RELOAD_FOR_OPADDR_ADDR
4186 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
4187 for (j = 0; j < n_reloads; j++)
4188 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
4189 && reload_when_needed[j] == reload_when_needed[i]
4190 && MATCHES (reload_in[i], reload_in[j])
4191 && reload_reg_class[i] == reload_reg_class[j]
4192 && !reload_nocombine[i] && !reload_nocombine[j]
4193 && reload_reg_rtx[i] == reload_reg_rtx[j])
4195 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
4196 transfer_replacements (i, j);
4200 /* Set which reloads must use registers not used in any group. Start
4201 with those that conflict with a group and then include ones that
4202 conflict with ones that are already known to conflict with a group. */
4205 for (i = 0; i < n_reloads; i++)
4207 enum machine_mode mode = reload_inmode[i];
4208 enum reg_class class = reload_reg_class[i];
4211 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
4212 mode = reload_outmode[i];
4213 size = CLASS_MAX_NREGS (class, mode);
4216 for (j = 0; j < n_reloads; j++)
4217 if ((CLASS_MAX_NREGS (reload_reg_class[j],
4218 (GET_MODE_SIZE (reload_outmode[j])
4219 > GET_MODE_SIZE (reload_inmode[j]))
4220 ? reload_outmode[j] : reload_inmode[j])
4222 && !reload_optional[j]
4223 && (reload_in[j] != 0 || reload_out[j] != 0
4224 || reload_secondary_p[j])
4225 && reloads_conflict (i, j)
4226 && reg_classes_intersect_p (class, reload_reg_class[j]))
4228 reload_nongroup[i] = 1;
4238 for (i = 0; i < n_reloads; i++)
4240 enum machine_mode mode = reload_inmode[i];
4241 enum reg_class class = reload_reg_class[i];
4244 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
4245 mode = reload_outmode[i];
4246 size = CLASS_MAX_NREGS (class, mode);
4248 if (! reload_nongroup[i] && size == 1)
4249 for (j = 0; j < n_reloads; j++)
4250 if (reload_nongroup[j]
4251 && reloads_conflict (i, j)
4252 && reg_classes_intersect_p (class, reload_reg_class[j]))
4254 reload_nongroup[i] = 1;
4261 #else /* no REGISTER_CONSTRAINTS */
4263 int insn_code_number;
4264 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
4266 rtx body = PATTERN (insn);
4271 n_earlyclobbers = 0;
4272 replace_reloads = replace;
4275 /* Find what kind of insn this is. NOPERANDS gets number of operands.
4276 Store the operand values in RECOG_OPERAND and the locations
4277 of the words in the insn that point to them in RECOG_OPERAND_LOC.
4278 Return if the insn needs no reload processing. */
4280 switch (GET_CODE (body))
4291 noperands = asm_noperands (body);
4294 /* This insn is an `asm' with operands.
4295 First, find out how many operands, and allocate space. */
4297 insn_code_number = -1;
4298 /* ??? This is a bug! ???
4299 Give up and delete this insn if it has too many operands. */
4300 if (noperands > MAX_RECOG_OPERANDS)
4303 /* Now get the operand values out of the insn. */
4305 decode_asm_operands (body, recog_operand, recog_operand_loc,
4306 NULL_PTR, NULL_PTR);
4311 /* Ordinary insn: recognize it, allocate space for operands and
4312 constraints, and get them out via insn_extract. */
4314 insn_code_number = recog_memoized (insn);
4315 noperands = insn_n_operands[insn_code_number];
4316 insn_extract (insn);
4322 for (i = 0; i < noperands; i++)
4324 register RTX_CODE code = GET_CODE (recog_operand[i]);
4325 int is_set_dest = GET_CODE (body) == SET && (i == 0);
4327 if (insn_code_number >= 0)
4328 if (insn_operand_address_p[insn_code_number][i])
4329 find_reloads_address (VOIDmode, NULL_PTR,
4330 recog_operand[i], recog_operand_loc[i],
4331 i, RELOAD_FOR_INPUT, ind_levels, insn);
4333 /* In these cases, we can't tell if the operand is an input
4334 or an output, so be conservative. In practice it won't be
4338 find_reloads_address (GET_MODE (recog_operand[i]),
4339 recog_operand_loc[i],
4340 XEXP (recog_operand[i], 0),
4341 &XEXP (recog_operand[i], 0),
4342 i, RELOAD_OTHER, ind_levels, insn);
4344 recog_operand[i] = *recog_operand_loc[i]
4345 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
4346 ind_levels, is_set_dest);
4349 register int regno = REGNO (recog_operand[i]);
4350 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4351 recog_operand[i] = *recog_operand_loc[i]
4352 = reg_equiv_constant[regno];
4353 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4354 that feeds this insn. */
4355 if (reg_equiv_mem[regno] != 0)
4356 recog_operand[i] = *recog_operand_loc[i]
4357 = reg_equiv_mem[regno];
4362 /* Perhaps an output reload can be combined with another
4363 to reduce needs by one. */
4364 if (!goal_earlyclobber)
4366 #endif /* no REGISTER_CONSTRAINTS */
4370 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4371 accepts a memory operand with constant address. */
4374 alternative_allows_memconst (constraint, altnum)
4379 /* Skip alternatives before the one requested. */
4382 while (*constraint++ != ',');
4385 /* Scan the requested alternative for 'm' or 'o'.
4386 If one of them is present, this alternative accepts memory constants. */
4387 while ((c = *constraint++) && c != ',' && c != '#')
4388 if (c == 'm' || c == 'o')
4393 /* Scan X for memory references and scan the addresses for reloading.
4394 Also checks for references to "constant" regs that we want to eliminate
4395 and replaces them with the values they stand for.
4396 We may alter X destructively if it contains a reference to such.
4397 If X is just a constant reg, we return the equivalent value
4400 IND_LEVELS says how many levels of indirect addressing this machine
4403 OPNUM and TYPE identify the purpose of the reload.
4405 IS_SET_DEST is true if X is the destination of a SET, which is not
4406 appropriate to be replaced by a constant.
4408 INSN, if nonzero, is the insn in which we do the reload. It is used
4409 to determine if we may generate output reloads, and where to put USEs
4410 for pseudos that we have to replace with stack slots. */
4413 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn)
4416 enum reload_type type;
4421 register RTX_CODE code = GET_CODE (x);
4423 register char *fmt = GET_RTX_FORMAT (code);
4428 /* This code is duplicated for speed in find_reloads. */
4429 register int regno = REGNO (x);
4430 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4431 x = reg_equiv_constant[regno];
4433 /* This creates (subreg (mem...)) which would cause an unnecessary
4434 reload of the mem. */
4435 else if (reg_equiv_mem[regno] != 0)
4436 x = reg_equiv_mem[regno];
4438 else if (reg_equiv_memory_loc[regno]
4439 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4441 rtx mem = make_memloc (x, regno);
4442 if (reg_equiv_address[regno]
4443 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4445 /* If this is not a toplevel operand, find_reloads doesn't see
4446 this substitution. We have to emit a USE of the pseudo so
4447 that delete_output_reload can see it. */
4448 if (replace_reloads && recog_operand[opnum] != x)
4449 emit_insn_before (gen_rtx_USE (VOIDmode, x), insn);
4451 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4452 opnum, type, ind_levels, insn);
4460 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4461 opnum, type, ind_levels, insn);
4465 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4467 /* Check for SUBREG containing a REG that's equivalent to a constant.
4468 If the constant has a known value, truncate it right now.
4469 Similarly if we are extracting a single-word of a multi-word
4470 constant. If the constant is symbolic, allow it to be substituted
4471 normally. push_reload will strip the subreg later. If the
4472 constant is VOIDmode, abort because we will lose the mode of
4473 the register (this should never happen because one of the cases
4474 above should handle it). */
4476 register int regno = REGNO (SUBREG_REG (x));
4479 if (subreg_lowpart_p (x)
4480 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4481 && reg_equiv_constant[regno] != 0
4482 && (tem = gen_lowpart_common (GET_MODE (x),
4483 reg_equiv_constant[regno])) != 0)
4486 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4487 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4488 && reg_equiv_constant[regno] != 0
4489 && (tem = operand_subword (reg_equiv_constant[regno],
4491 GET_MODE (SUBREG_REG (x)))) != 0)
4493 /* TEM is now a word sized constant for the bits from X that
4494 we wanted. However, TEM may be the wrong representation.
4496 Use gen_lowpart_common to convert a CONST_INT into a
4497 CONST_DOUBLE and vice versa as needed according to by the mode
4499 tem = gen_lowpart_common (GET_MODE (x), tem);
4505 /* If the SUBREG is wider than a word, the above test will fail.
4506 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4507 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4508 a 32 bit target. We still can - and have to - handle this
4509 for non-paradoxical subregs of CONST_INTs. */
4510 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4511 && reg_equiv_constant[regno] != 0
4512 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT
4513 && (GET_MODE_SIZE (GET_MODE (x))
4514 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
4516 int shift = SUBREG_WORD (x) * BITS_PER_WORD;
4517 if (WORDS_BIG_ENDIAN)
4518 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4519 - GET_MODE_BITSIZE (GET_MODE (x))
4521 /* Here we use the knowledge that CONST_INTs have a
4522 HOST_WIDE_INT field. */
4523 if (shift >= HOST_BITS_PER_WIDE_INT)
4524 shift = HOST_BITS_PER_WIDE_INT - 1;
4525 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
4528 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4529 && reg_equiv_constant[regno] != 0
4530 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4533 /* If the subreg contains a reg that will be converted to a mem,
4534 convert the subreg to a narrower memref now.
4535 Otherwise, we would get (subreg (mem ...) ...),
4536 which would force reload of the mem.
4538 We also need to do this if there is an equivalent MEM that is
4539 not offsettable. In that case, alter_subreg would produce an
4540 invalid address on big-endian machines.
4542 For machines that extend byte loads, we must not reload using
4543 a wider mode if we have a paradoxical SUBREG. find_reloads will
4544 force a reload in that case. So we should not do anything here. */
4546 else if (regno >= FIRST_PSEUDO_REGISTER
4547 #ifdef LOAD_EXTEND_OP
4548 && (GET_MODE_SIZE (GET_MODE (x))
4549 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4551 && (reg_equiv_address[regno] != 0
4552 || (reg_equiv_mem[regno] != 0
4553 && (! strict_memory_address_p (GET_MODE (x),
4554 XEXP (reg_equiv_mem[regno], 0))
4555 || ! offsettable_memref_p (reg_equiv_mem[regno])
4556 || num_not_at_initial_offset))))
4558 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
4559 /* We must rerun eliminate_regs, in case the elimination
4560 offsets have changed. */
4561 rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
4564 if (BYTES_BIG_ENDIAN)
4567 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
4568 offset += MIN (size, UNITS_PER_WORD);
4569 size = GET_MODE_SIZE (GET_MODE (x));
4570 offset -= MIN (size, UNITS_PER_WORD);
4572 addr = plus_constant (addr, offset);
4573 x = gen_rtx_MEM (GET_MODE (x), addr);
4574 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4575 find_reloads_address (GET_MODE (x), NULL_PTR,
4577 &XEXP (x, 0), opnum, type, ind_levels, insn);
4578 /* If this is not a toplevel operand, find_reloads doesn't see this
4579 substitution. We have to emit a USE of the pseudo so that
4580 delete_output_reload can see it. */
4581 if (replace_reloads && recog_operand[opnum] != x)
4582 emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn);
4587 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4590 XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
4591 ind_levels, is_set_dest, insn);
4596 /* Return a mem ref for the memory equivalent of reg REGNO.
4597 This mem ref is not shared with anything. */
4600 make_memloc (ad, regno)
4604 /* We must rerun eliminate_regs, in case the elimination
4605 offsets have changed. */
4607 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4609 /* If TEM might contain a pseudo, we must copy it to avoid
4610 modifying it when we do the substitution for the reload. */
4611 if (rtx_varies_p (tem))
4612 tem = copy_rtx (tem);
4614 tem = gen_rtx_MEM (GET_MODE (ad), tem);
4615 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4619 /* Record all reloads needed for handling memory address AD
4620 which appears in *LOC in a memory reference to mode MODE
4621 which itself is found in location *MEMREFLOC.
4622 Note that we take shortcuts assuming that no multi-reg machine mode
4623 occurs as part of an address.
4625 OPNUM and TYPE specify the purpose of this reload.
4627 IND_LEVELS says how many levels of indirect addressing this machine
4630 INSN, if nonzero, is the insn in which we do the reload. It is used
4631 to determine if we may generate output reloads, and where to put USEs
4632 for pseudos that we have to replace with stack slots.
4634 Value is nonzero if this address is reloaded or replaced as a whole.
4635 This is interesting to the caller if the address is an autoincrement.
4637 Note that there is no verification that the address will be valid after
4638 this routine does its work. Instead, we rely on the fact that the address
4639 was valid when reload started. So we need only undo things that reload
4640 could have broken. These are wrong register types, pseudos not allocated
4641 to a hard register, and frame pointer elimination. */
4644 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4645 enum machine_mode mode;
4650 enum reload_type type;
4657 /* If the address is a register, see if it is a legitimate address and
4658 reload if not. We first handle the cases where we need not reload
4659 or where we must reload in a non-standard way. */
4661 if (GET_CODE (ad) == REG)
4665 if (reg_equiv_constant[regno] != 0
4666 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4668 *loc = ad = reg_equiv_constant[regno];
4672 tem = reg_equiv_memory_loc[regno];
4675 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4677 tem = make_memloc (ad, regno);
4678 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4680 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4681 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
4684 /* We can avoid a reload if the register's equivalent memory
4685 expression is valid as an indirect memory address.
4686 But not all addresses are valid in a mem used as an indirect
4687 address: only reg or reg+constant. */
4690 && strict_memory_address_p (mode, tem)
4691 && (GET_CODE (XEXP (tem, 0)) == REG
4692 || (GET_CODE (XEXP (tem, 0)) == PLUS
4693 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4694 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4696 /* TEM is not the same as what we'll be replacing the
4697 pseudo with after reload, put a USE in front of INSN
4698 in the final reload pass. */
4700 && num_not_at_initial_offset
4701 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4704 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
4705 /* This doesn't really count as replacing the address
4706 as a whole, since it is still a memory access. */
4714 /* The only remaining case where we can avoid a reload is if this is a
4715 hard register that is valid as a base register and which is not the
4716 subject of a CLOBBER in this insn. */
4718 else if (regno < FIRST_PSEUDO_REGISTER
4719 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4720 && ! regno_clobbered_p (regno, this_insn))
4723 /* If we do not have one of the cases above, we must do the reload. */
4724 push_reload (ad, NULL_RTX, loc, NULL_PTR, reload_address_base_reg_class,
4725 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4729 if (strict_memory_address_p (mode, ad))
4731 /* The address appears valid, so reloads are not needed.
4732 But the address may contain an eliminable register.
4733 This can happen because a machine with indirect addressing
4734 may consider a pseudo register by itself a valid address even when
4735 it has failed to get a hard reg.
4736 So do a tree-walk to find and eliminate all such regs. */
4738 /* But first quickly dispose of a common case. */
4739 if (GET_CODE (ad) == PLUS
4740 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4741 && GET_CODE (XEXP (ad, 0)) == REG
4742 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4745 subst_reg_equivs_changed = 0;
4746 *loc = subst_reg_equivs (ad, insn);
4748 if (! subst_reg_equivs_changed)
4751 /* Check result for validity after substitution. */
4752 if (strict_memory_address_p (mode, ad))
4756 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4761 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4766 *memrefloc = copy_rtx (*memrefloc);
4767 XEXP (*memrefloc, 0) = ad;
4768 move_replacements (&ad, &XEXP (*memrefloc, 0));
4774 /* The address is not valid. We have to figure out why. One possibility
4775 is that it is itself a MEM. This can happen when the frame pointer is
4776 being eliminated, a pseudo is not allocated to a hard register, and the
4777 offset between the frame and stack pointers is not its initial value.
4778 In that case the pseudo will have been replaced by a MEM referring to
4779 the stack pointer. */
4780 if (GET_CODE (ad) == MEM)
4782 /* First ensure that the address in this MEM is valid. Then, unless
4783 indirect addresses are valid, reload the MEM into a register. */
4785 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4786 opnum, ADDR_TYPE (type),
4787 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4789 /* If tem was changed, then we must create a new memory reference to
4790 hold it and store it back into memrefloc. */
4791 if (tem != ad && memrefloc)
4793 *memrefloc = copy_rtx (*memrefloc);
4794 copy_replacements (tem, XEXP (*memrefloc, 0));
4795 loc = &XEXP (*memrefloc, 0);
4798 /* Check similar cases as for indirect addresses as above except
4799 that we can allow pseudos and a MEM since they should have been
4800 taken care of above. */
4803 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4804 || GET_CODE (XEXP (tem, 0)) == MEM
4805 || ! (GET_CODE (XEXP (tem, 0)) == REG
4806 || (GET_CODE (XEXP (tem, 0)) == PLUS
4807 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4808 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4810 /* Must use TEM here, not AD, since it is the one that will
4811 have any subexpressions reloaded, if needed. */
4812 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4813 reload_address_base_reg_class, GET_MODE (tem),
4822 /* If we have address of a stack slot but it's not valid because the
4823 displacement is too large, compute the sum in a register.
4824 Handle all base registers here, not just fp/ap/sp, because on some
4825 targets (namely SH) we can also get too large displacements from
4826 big-endian corrections. */
4827 else if (GET_CODE (ad) == PLUS
4828 && GET_CODE (XEXP (ad, 0)) == REG
4829 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4830 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4831 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4833 /* Unshare the MEM rtx so we can safely alter it. */
4836 *memrefloc = copy_rtx (*memrefloc);
4837 loc = &XEXP (*memrefloc, 0);
4839 if (double_reg_address_ok)
4841 /* Unshare the sum as well. */
4842 *loc = ad = copy_rtx (ad);
4843 /* Reload the displacement into an index reg.
4844 We assume the frame pointer or arg pointer is a base reg. */
4845 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4846 reload_address_index_reg_class,
4847 GET_MODE (ad), opnum, type, ind_levels);
4851 /* If the sum of two regs is not necessarily valid,
4852 reload the sum into a base reg.
4853 That will at least work. */
4854 find_reloads_address_part (ad, loc, reload_address_base_reg_class,
4855 Pmode, opnum, type, ind_levels);
4860 /* If we have an indexed stack slot, there are three possible reasons why
4861 it might be invalid: The index might need to be reloaded, the address
4862 might have been made by frame pointer elimination and hence have a
4863 constant out of range, or both reasons might apply.
4865 We can easily check for an index needing reload, but even if that is the
4866 case, we might also have an invalid constant. To avoid making the
4867 conservative assumption and requiring two reloads, we see if this address
4868 is valid when not interpreted strictly. If it is, the only problem is
4869 that the index needs a reload and find_reloads_address_1 will take care
4872 There is still a case when we might generate an extra reload,
4873 however. In certain cases eliminate_regs will return a MEM for a REG
4874 (see the code there for details). In those cases, memory_address_p
4875 applied to our address will return 0 so we will think that our offset
4876 must be too large. But it might indeed be valid and the only problem
4877 is that a MEM is present where a REG should be. This case should be
4878 very rare and there doesn't seem to be any way to avoid it.
4880 If we decide to do something here, it must be that
4881 `double_reg_address_ok' is true and that this address rtl was made by
4882 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4883 rework the sum so that the reload register will be added to the index.
4884 This is safe because we know the address isn't shared.
4886 We check for fp/ap/sp as both the first and second operand of the
4889 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4890 && GET_CODE (XEXP (ad, 0)) == PLUS
4891 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4892 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4893 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4895 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4896 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4898 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4899 && ! memory_address_p (mode, ad))
4901 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4902 plus_constant (XEXP (XEXP (ad, 0), 0),
4903 INTVAL (XEXP (ad, 1))),
4904 XEXP (XEXP (ad, 0), 1));
4905 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4906 reload_address_base_reg_class,
4907 GET_MODE (ad), opnum, type, ind_levels);
4908 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4914 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4915 && GET_CODE (XEXP (ad, 0)) == PLUS
4916 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4917 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4918 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4920 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4921 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4923 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4924 && ! memory_address_p (mode, ad))
4926 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4927 XEXP (XEXP (ad, 0), 0),
4928 plus_constant (XEXP (XEXP (ad, 0), 1),
4929 INTVAL (XEXP (ad, 1))));
4930 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4931 reload_address_base_reg_class,
4932 GET_MODE (ad), opnum, type, ind_levels);
4933 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4939 /* See if address becomes valid when an eliminable register
4940 in a sum is replaced. */
4943 if (GET_CODE (ad) == PLUS)
4944 tem = subst_indexed_address (ad);
4945 if (tem != ad && strict_memory_address_p (mode, tem))
4947 /* Ok, we win that way. Replace any additional eliminable
4950 subst_reg_equivs_changed = 0;
4951 tem = subst_reg_equivs (tem, insn);
4953 /* Make sure that didn't make the address invalid again. */
4955 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4962 /* If constants aren't valid addresses, reload the constant address
4964 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4966 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4967 Unshare it so we can safely alter it. */
4968 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4969 && CONSTANT_POOL_ADDRESS_P (ad))
4971 *memrefloc = copy_rtx (*memrefloc);
4972 loc = &XEXP (*memrefloc, 0);
4975 find_reloads_address_part (ad, loc, reload_address_base_reg_class,
4981 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4985 /* Find all pseudo regs appearing in AD
4986 that are eliminable in favor of equivalent values
4987 and do not have hard regs; replace them by their equivalents.
4988 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4989 front of it for pseudos that we have to replace with stack slots. */
4992 subst_reg_equivs (ad, insn)
4996 register RTX_CODE code = GET_CODE (ad);
5014 register int regno = REGNO (ad);
5016 if (reg_equiv_constant[regno] != 0)
5018 subst_reg_equivs_changed = 1;
5019 return reg_equiv_constant[regno];
5021 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5023 rtx mem = make_memloc (ad, regno);
5024 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5026 subst_reg_equivs_changed = 1;
5027 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
5035 /* Quickly dispose of a common case. */
5036 if (XEXP (ad, 0) == frame_pointer_rtx
5037 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5045 fmt = GET_RTX_FORMAT (code);
5046 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5048 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5052 /* Compute the sum of X and Y, making canonicalizations assumed in an
5053 address, namely: sum constant integers, surround the sum of two
5054 constants with a CONST, put the constant as the second operand, and
5055 group the constant on the outermost sum.
5057 This routine assumes both inputs are already in canonical form. */
5064 enum machine_mode mode = GET_MODE (x);
5066 if (mode == VOIDmode)
5067 mode = GET_MODE (y);
5069 if (mode == VOIDmode)
5072 if (GET_CODE (x) == CONST_INT)
5073 return plus_constant (y, INTVAL (x));
5074 else if (GET_CODE (y) == CONST_INT)
5075 return plus_constant (x, INTVAL (y));
5076 else if (CONSTANT_P (x))
5077 tem = x, x = y, y = tem;
5079 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5080 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5082 /* Note that if the operands of Y are specified in the opposite
5083 order in the recursive calls below, infinite recursion will occur. */
5084 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5085 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5087 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5088 constant will have been placed second. */
5089 if (CONSTANT_P (x) && CONSTANT_P (y))
5091 if (GET_CODE (x) == CONST)
5093 if (GET_CODE (y) == CONST)
5096 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5099 return gen_rtx_PLUS (mode, x, y);
5102 /* If ADDR is a sum containing a pseudo register that should be
5103 replaced with a constant (from reg_equiv_constant),
5104 return the result of doing so, and also apply the associative
5105 law so that the result is more likely to be a valid address.
5106 (But it is not guaranteed to be one.)
5108 Note that at most one register is replaced, even if more are
5109 replaceable. Also, we try to put the result into a canonical form
5110 so it is more likely to be a valid address.
5112 In all other cases, return ADDR. */
5115 subst_indexed_address (addr)
5118 rtx op0 = 0, op1 = 0, op2 = 0;
5122 if (GET_CODE (addr) == PLUS)
5124 /* Try to find a register to replace. */
5125 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5126 if (GET_CODE (op0) == REG
5127 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5128 && reg_renumber[regno] < 0
5129 && reg_equiv_constant[regno] != 0)
5130 op0 = reg_equiv_constant[regno];
5131 else if (GET_CODE (op1) == REG
5132 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5133 && reg_renumber[regno] < 0
5134 && reg_equiv_constant[regno] != 0)
5135 op1 = reg_equiv_constant[regno];
5136 else if (GET_CODE (op0) == PLUS
5137 && (tem = subst_indexed_address (op0)) != op0)
5139 else if (GET_CODE (op1) == PLUS
5140 && (tem = subst_indexed_address (op1)) != op1)
5145 /* Pick out up to three things to add. */
5146 if (GET_CODE (op1) == PLUS)
5147 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5148 else if (GET_CODE (op0) == PLUS)
5149 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5151 /* Compute the sum. */
5153 op1 = form_sum (op1, op2);
5155 op0 = form_sum (op0, op1);
5162 /* Record the pseudo registers we must reload into hard registers in a
5163 subexpression of a would-be memory address, X referring to a value
5164 in mode MODE. (This function is not called if the address we find
5167 CONTEXT = 1 means we are considering regs as index regs,
5168 = 0 means we are considering them as base regs.
5170 OPNUM and TYPE specify the purpose of any reloads made.
5172 IND_LEVELS says how many levels of indirect addressing are
5173 supported at this point in the address.
5175 INSN, if nonzero, is the insn in which we do the reload. It is used
5176 to determine if we may generate output reloads.
5178 We return nonzero if X, as a whole, is reloaded or replaced. */
5180 /* Note that we take shortcuts assuming that no multi-reg machine mode
5181 occurs as part of an address.
5182 Also, this is not fully machine-customizable; it works for machines
5183 such as vaxes and 68000's and 32000's, but other possible machines
5184 could have addressing modes that this does not handle right. */
5187 find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
5188 enum machine_mode mode;
5193 enum reload_type type;
5197 register RTX_CODE code = GET_CODE (x);
5203 register rtx orig_op0 = XEXP (x, 0);
5204 register rtx orig_op1 = XEXP (x, 1);
5205 register RTX_CODE code0 = GET_CODE (orig_op0);
5206 register RTX_CODE code1 = GET_CODE (orig_op1);
5207 register rtx op0 = orig_op0;
5208 register rtx op1 = orig_op1;
5210 if (GET_CODE (op0) == SUBREG)
5212 op0 = SUBREG_REG (op0);
5213 code0 = GET_CODE (op0);
5214 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5215 op0 = gen_rtx_REG (word_mode,
5216 REGNO (op0) + SUBREG_WORD (orig_op0));
5219 if (GET_CODE (op1) == SUBREG)
5221 op1 = SUBREG_REG (op1);
5222 code1 = GET_CODE (op1);
5223 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5224 op1 = gen_rtx_REG (GET_MODE (op1),
5225 REGNO (op1) + SUBREG_WORD (orig_op1));
5228 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5229 || code0 == ZERO_EXTEND || code1 == MEM)
5231 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5232 type, ind_levels, insn);
5233 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5234 type, ind_levels, insn);
5237 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5238 || code1 == ZERO_EXTEND || code0 == MEM)
5240 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5241 type, ind_levels, insn);
5242 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5243 type, ind_levels, insn);
5246 else if (code0 == CONST_INT || code0 == CONST
5247 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5248 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5249 type, ind_levels, insn);
5251 else if (code1 == CONST_INT || code1 == CONST
5252 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5253 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5254 type, ind_levels, insn);
5256 else if (code0 == REG && code1 == REG)
5258 if (REG_OK_FOR_INDEX_P (op0)
5259 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5261 else if (REG_OK_FOR_INDEX_P (op1)
5262 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5264 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5265 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5266 type, ind_levels, insn);
5267 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5268 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5269 type, ind_levels, insn);
5270 else if (REG_OK_FOR_INDEX_P (op1))
5271 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5272 type, ind_levels, insn);
5273 else if (REG_OK_FOR_INDEX_P (op0))
5274 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5275 type, ind_levels, insn);
5278 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5279 type, ind_levels, insn);
5280 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5281 type, ind_levels, insn);
5285 else if (code0 == REG)
5287 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5288 type, ind_levels, insn);
5289 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5290 type, ind_levels, insn);
5293 else if (code1 == REG)
5295 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5296 type, ind_levels, insn);
5297 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5298 type, ind_levels, insn);
5308 if (GET_CODE (XEXP (x, 0)) == REG)
5310 register int regno = REGNO (XEXP (x, 0));
5314 /* A register that is incremented cannot be constant! */
5315 if (regno >= FIRST_PSEUDO_REGISTER
5316 && reg_equiv_constant[regno] != 0)
5319 /* Handle a register that is equivalent to a memory location
5320 which cannot be addressed directly. */
5321 if (reg_equiv_memory_loc[regno] != 0
5322 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5324 rtx tem = make_memloc (XEXP (x, 0), regno);
5325 if (reg_equiv_address[regno]
5326 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5328 /* First reload the memory location's address.
5329 We can't use ADDR_TYPE (type) here, because we need to
5330 write back the value after reading it, hence we actually
5331 need two registers. */
5332 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5333 &XEXP (tem, 0), opnum, type,
5335 /* Put this inside a new increment-expression. */
5336 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5337 /* Proceed to reload that, as if it contained a register. */
5341 /* If we have a hard register that is ok as an index,
5342 don't make a reload. If an autoincrement of a nice register
5343 isn't "valid", it must be that no autoincrement is "valid".
5344 If that is true and something made an autoincrement anyway,
5345 this must be a special context where one is allowed.
5346 (For example, a "push" instruction.)
5347 We can't improve this address, so leave it alone. */
5349 /* Otherwise, reload the autoincrement into a suitable hard reg
5350 and record how much to increment by. */
5352 if (reg_renumber[regno] >= 0)
5353 regno = reg_renumber[regno];
5354 if ((regno >= FIRST_PSEUDO_REGISTER
5355 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5356 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5363 /* If we can output the register afterwards, do so, this
5364 saves the extra update.
5365 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5366 CALL_INSN - and it does not set CC0.
5367 But don't do this if we cannot directly address the
5368 memory location, since this will make it harder to
5369 reuse address reloads, and increases register pressure.
5370 Also don't do this if we can probably update x directly. */
5371 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5373 : reg_equiv_mem[regno]);
5374 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5375 if (insn && GET_CODE (insn) == INSN && equiv
5376 && memory_operand (equiv, GET_MODE (equiv))
5378 && ! sets_cc0_p (PATTERN (insn))
5380 && ! (icode != CODE_FOR_nothing
5381 && (*insn_operand_predicate[icode][0]) (equiv, Pmode)
5382 && (*insn_operand_predicate[icode][1]) (equiv, Pmode)))
5387 = push_reload (x, x, loc, loc,
5389 ? reload_address_index_reg_class
5390 : reload_address_base_reg_class),
5391 GET_MODE (x), GET_MODE (x), 0, 0,
5392 opnum, RELOAD_OTHER);
5397 = push_reload (x, NULL_RTX, loc, NULL_PTR,
5399 ? reload_address_index_reg_class
5400 : reload_address_base_reg_class),
5401 GET_MODE (x), GET_MODE (x), 0, 0,
5403 reload_inc[reloadnum]
5404 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5410 /* Update the REG_INC notes. */
5412 for (link = REG_NOTES (this_insn);
5413 link; link = XEXP (link, 1))
5414 if (REG_NOTE_KIND (link) == REG_INC
5415 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
5416 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5422 else if (GET_CODE (XEXP (x, 0)) == MEM)
5424 /* This is probably the result of a substitution, by eliminate_regs,
5425 of an equivalent address for a pseudo that was not allocated to a
5426 hard register. Verify that the specified address is valid and
5427 reload it into a register. */
5428 rtx tem = XEXP (x, 0);
5432 /* Since we know we are going to reload this item, don't decrement
5433 for the indirection level.
5435 Note that this is actually conservative: it would be slightly
5436 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5438 /* We can't use ADDR_TYPE (type) here, because we need to
5439 write back the value after reading it, hence we actually
5440 need two registers. */
5441 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5442 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5443 opnum, type, ind_levels, insn);
5445 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
5447 ? reload_address_index_reg_class
5448 : reload_address_base_reg_class),
5449 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5450 reload_inc[reloadnum]
5451 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5453 link = FIND_REG_INC_NOTE (this_insn, tem);
5455 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5462 /* This is probably the result of a substitution, by eliminate_regs, of
5463 an equivalent address for a pseudo that was not allocated to a hard
5464 register. Verify that the specified address is valid and reload it
5467 Since we know we are going to reload this item, don't decrement for
5468 the indirection level.
5470 Note that this is actually conservative: it would be slightly more
5471 efficient to use the value of SPILL_INDIRECT_LEVELS from
5474 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5475 opnum, ADDR_TYPE (type), ind_levels, insn);
5476 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
5477 (context ? reload_address_index_reg_class
5478 : reload_address_base_reg_class),
5479 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5484 register int regno = REGNO (x);
5486 if (reg_equiv_constant[regno] != 0)
5488 find_reloads_address_part (reg_equiv_constant[regno], loc,
5490 ? reload_address_index_reg_class
5491 : reload_address_base_reg_class),
5492 GET_MODE (x), opnum, type, ind_levels);
5496 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5497 that feeds this insn. */
5498 if (reg_equiv_mem[regno] != 0)
5500 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
5502 ? reload_address_index_reg_class
5503 : reload_address_base_reg_class),
5504 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5509 if (reg_equiv_memory_loc[regno]
5510 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5512 rtx tem = make_memloc (x, regno);
5513 if (reg_equiv_address[regno] != 0
5514 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5517 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5518 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5523 if (reg_renumber[regno] >= 0)
5524 regno = reg_renumber[regno];
5526 if ((regno >= FIRST_PSEUDO_REGISTER
5527 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5528 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5530 push_reload (x, NULL_RTX, loc, NULL_PTR,
5532 ? reload_address_index_reg_class
5533 : reload_address_base_reg_class),
5534 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5538 /* If a register appearing in an address is the subject of a CLOBBER
5539 in this insn, reload it into some other register to be safe.
5540 The CLOBBER is supposed to make the register unavailable
5541 from before this insn to after it. */
5542 if (regno_clobbered_p (regno, this_insn))
5544 push_reload (x, NULL_RTX, loc, NULL_PTR,
5546 ? reload_address_index_reg_class
5547 : reload_address_base_reg_class),
5548 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5555 if (GET_CODE (SUBREG_REG (x)) == REG)
5557 /* If this is a SUBREG of a hard register and the resulting register
5558 is of the wrong class, reload the whole SUBREG. This avoids
5559 needless copies if SUBREG_REG is multi-word. */
5560 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5562 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5564 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5565 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5567 push_reload (x, NULL_RTX, loc, NULL_PTR,
5569 ? reload_address_index_reg_class
5570 : reload_address_base_reg_class),
5571 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5575 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5576 is larger than the class size, then reload the whole SUBREG. */
5579 enum reg_class class = (context
5580 ? reload_address_index_reg_class
5581 : reload_address_base_reg_class);
5582 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5583 > reg_class_size[class])
5585 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5586 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5598 register char *fmt = GET_RTX_FORMAT (code);
5601 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5604 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5605 opnum, type, ind_levels, insn);
5612 /* X, which is found at *LOC, is a part of an address that needs to be
5613 reloaded into a register of class CLASS. If X is a constant, or if
5614 X is a PLUS that contains a constant, check that the constant is a
5615 legitimate operand and that we are supposed to be able to load
5616 it into the register.
5618 If not, force the constant into memory and reload the MEM instead.
5620 MODE is the mode to use, in case X is an integer constant.
5622 OPNUM and TYPE describe the purpose of any reloads made.
5624 IND_LEVELS says how many levels of indirect addressing this machine
5628 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5631 enum reg_class class;
5632 enum machine_mode mode;
5634 enum reload_type type;
5638 && (! LEGITIMATE_CONSTANT_P (x)
5639 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5641 rtx tem = x = force_const_mem (mode, x);
5642 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5643 opnum, type, ind_levels, 0);
5646 else if (GET_CODE (x) == PLUS
5647 && CONSTANT_P (XEXP (x, 1))
5648 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5649 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5651 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5653 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5654 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5655 opnum, type, ind_levels, 0);
5658 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5659 mode, VOIDmode, 0, 0, opnum, type);
5662 /* Substitute into the current INSN the registers into which we have reloaded
5663 the things that need reloading. The array `replacements'
5664 says contains the locations of all pointers that must be changed
5665 and says what to replace them with.
5667 Return the rtx that X translates into; usually X, but modified. */
5674 for (i = 0; i < n_replacements; i++)
5676 register struct replacement *r = &replacements[i];
5677 register rtx reloadreg = reload_reg_rtx[r->what];
5680 /* Encapsulate RELOADREG so its machine mode matches what
5681 used to be there. Note that gen_lowpart_common will
5682 do the wrong thing if RELOADREG is multi-word. RELOADREG
5683 will always be a REG here. */
5684 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5685 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5687 /* If we are putting this into a SUBREG and RELOADREG is a
5688 SUBREG, we would be making nested SUBREGs, so we have to fix
5689 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5691 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5693 if (GET_MODE (*r->subreg_loc)
5694 == GET_MODE (SUBREG_REG (reloadreg)))
5695 *r->subreg_loc = SUBREG_REG (reloadreg);
5698 *r->where = SUBREG_REG (reloadreg);
5699 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
5703 *r->where = reloadreg;
5705 /* If reload got no reg and isn't optional, something's wrong. */
5706 else if (! reload_optional[r->what])
5711 /* Make a copy of any replacements being done into X and move those copies
5712 to locations in Y, a copy of X. We only look at the highest level of
5716 copy_replacements (x, y)
5721 enum rtx_code code = GET_CODE (x);
5722 char *fmt = GET_RTX_FORMAT (code);
5723 struct replacement *r;
5725 /* We can't support X being a SUBREG because we might then need to know its
5726 location if something inside it was replaced. */
5730 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5732 for (j = 0; j < n_replacements; j++)
5734 if (replacements[j].subreg_loc == &XEXP (x, i))
5736 r = &replacements[n_replacements++];
5737 r->where = replacements[j].where;
5738 r->subreg_loc = &XEXP (y, i);
5739 r->what = replacements[j].what;
5740 r->mode = replacements[j].mode;
5742 else if (replacements[j].where == &XEXP (x, i))
5744 r = &replacements[n_replacements++];
5745 r->where = &XEXP (y, i);
5747 r->what = replacements[j].what;
5748 r->mode = replacements[j].mode;
5753 /* Change any replacements being done to *X to be done to *Y */
5756 move_replacements (x, y)
5762 for (i = 0; i < n_replacements; i++)
5763 if (replacements[i].subreg_loc == x)
5764 replacements[i].subreg_loc = y;
5765 else if (replacements[i].where == x)
5767 replacements[i].where = y;
5768 replacements[i].subreg_loc = 0;
5772 /* If LOC was scheduled to be replaced by something, return the replacement.
5773 Otherwise, return *LOC. */
5776 find_replacement (loc)
5779 struct replacement *r;
5781 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5783 rtx reloadreg = reload_reg_rtx[r->what];
5785 if (reloadreg && r->where == loc)
5787 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5788 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5792 else if (reloadreg && r->subreg_loc == loc)
5794 /* RELOADREG must be either a REG or a SUBREG.
5796 ??? Is it actually still ever a SUBREG? If so, why? */
5798 if (GET_CODE (reloadreg) == REG)
5799 return gen_rtx_REG (GET_MODE (*loc),
5800 REGNO (reloadreg) + SUBREG_WORD (*loc));
5801 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5804 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
5805 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5809 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5810 what's inside and make a new rtl if so. */
5811 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
5812 || GET_CODE (*loc) == MULT)
5814 rtx x = find_replacement (&XEXP (*loc, 0));
5815 rtx y = find_replacement (&XEXP (*loc, 1));
5817 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
5818 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
5824 /* Return nonzero if register in range [REGNO, ENDREGNO)
5825 appears either explicitly or implicitly in X
5826 other than being stored into (except for earlyclobber operands).
5828 References contained within the substructure at LOC do not count.
5829 LOC may be zero, meaning don't ignore anything.
5831 This is similar to refers_to_regno_p in rtlanal.c except that we
5832 look at equivalences for pseudos that didn't get hard registers. */
5835 refers_to_regno_for_reload_p (regno, endregno, x, loc)
5836 int regno, endregno;
5841 register RTX_CODE code;
5848 code = GET_CODE (x);
5855 /* If this is a pseudo, a hard register must not have been allocated.
5856 X must therefore either be a constant or be in memory. */
5857 if (i >= FIRST_PSEUDO_REGISTER)
5859 if (reg_equiv_memory_loc[i])
5860 return refers_to_regno_for_reload_p (regno, endregno,
5861 reg_equiv_memory_loc[i],
5864 if (reg_equiv_constant[i])
5870 return (endregno > i
5871 && regno < i + (i < FIRST_PSEUDO_REGISTER
5872 ? HARD_REGNO_NREGS (i, GET_MODE (x))
5876 /* If this is a SUBREG of a hard reg, we can see exactly which
5877 registers are being modified. Otherwise, handle normally. */
5878 if (GET_CODE (SUBREG_REG (x)) == REG
5879 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5881 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5883 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5884 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5886 return endregno > inner_regno && regno < inner_endregno;
5892 if (&SET_DEST (x) != loc
5893 /* Note setting a SUBREG counts as referring to the REG it is in for
5894 a pseudo but not for hard registers since we can
5895 treat each word individually. */
5896 && ((GET_CODE (SET_DEST (x)) == SUBREG
5897 && loc != &SUBREG_REG (SET_DEST (x))
5898 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5899 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5900 && refers_to_regno_for_reload_p (regno, endregno,
5901 SUBREG_REG (SET_DEST (x)),
5903 /* If the output is an earlyclobber operand, this is
5905 || ((GET_CODE (SET_DEST (x)) != REG
5906 || earlyclobber_operand_p (SET_DEST (x)))
5907 && refers_to_regno_for_reload_p (regno, endregno,
5908 SET_DEST (x), loc))))
5911 if (code == CLOBBER || loc == &SET_SRC (x))
5920 /* X does not match, so try its subexpressions. */
5922 fmt = GET_RTX_FORMAT (code);
5923 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5925 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5933 if (refers_to_regno_for_reload_p (regno, endregno,
5937 else if (fmt[i] == 'E')
5940 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5941 if (loc != &XVECEXP (x, i, j)
5942 && refers_to_regno_for_reload_p (regno, endregno,
5943 XVECEXP (x, i, j), loc))
5950 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5951 we check if any register number in X conflicts with the relevant register
5952 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5953 contains a MEM (we don't bother checking for memory addresses that can't
5954 conflict because we expect this to be a rare case.
5956 This function is similar to reg_overlap_mention_p in rtlanal.c except
5957 that we look at equivalences for pseudos that didn't get hard registers. */
5960 reg_overlap_mentioned_for_reload_p (x, in)
5963 int regno, endregno;
5965 /* Overly conservative. */
5966 if (GET_CODE (x) == STRICT_LOW_PART)
5969 /* If either argument is a constant, then modifying X can not affect IN. */
5970 if (CONSTANT_P (x) || CONSTANT_P (in))
5972 else if (GET_CODE (x) == SUBREG)
5974 regno = REGNO (SUBREG_REG (x));
5975 if (regno < FIRST_PSEUDO_REGISTER)
5976 regno += SUBREG_WORD (x);
5978 else if (GET_CODE (x) == REG)
5982 /* If this is a pseudo, it must not have been assigned a hard register.
5983 Therefore, it must either be in memory or be a constant. */
5985 if (regno >= FIRST_PSEUDO_REGISTER)
5987 if (reg_equiv_memory_loc[regno])
5988 return refers_to_mem_for_reload_p (in);
5989 else if (reg_equiv_constant[regno])
5994 else if (GET_CODE (x) == MEM)
5995 return refers_to_mem_for_reload_p (in);
5996 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
5997 || GET_CODE (x) == CC0)
5998 return reg_mentioned_p (x, in);
6002 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6003 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6005 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
6008 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6012 refers_to_mem_for_reload_p (x)
6018 if (GET_CODE (x) == MEM)
6021 if (GET_CODE (x) == REG)
6022 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6023 && reg_equiv_memory_loc[REGNO (x)]);
6025 fmt = GET_RTX_FORMAT (GET_CODE (x));
6026 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6028 && (GET_CODE (XEXP (x, i)) == MEM
6029 || refers_to_mem_for_reload_p (XEXP (x, i))))
6035 /* Check the insns before INSN to see if there is a suitable register
6036 containing the same value as GOAL.
6037 If OTHER is -1, look for a register in class CLASS.
6038 Otherwise, just see if register number OTHER shares GOAL's value.
6040 Return an rtx for the register found, or zero if none is found.
6042 If RELOAD_REG_P is (short *)1,
6043 we reject any hard reg that appears in reload_reg_rtx
6044 because such a hard reg is also needed coming into this insn.
6046 If RELOAD_REG_P is any other nonzero value,
6047 it is a vector indexed by hard reg number
6048 and we reject any hard reg whose element in the vector is nonnegative
6049 as well as any that appears in reload_reg_rtx.
6051 If GOAL is zero, then GOALREG is a register number; we look
6052 for an equivalent for that register.
6054 MODE is the machine mode of the value we want an equivalence for.
6055 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6057 This function is used by jump.c as well as in the reload pass.
6059 If GOAL is the sum of the stack pointer and a constant, we treat it
6060 as if it were a constant except that sp is required to be unchanging. */
6063 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
6066 enum reg_class class;
6068 short *reload_reg_p;
6070 enum machine_mode mode;
6072 register rtx p = insn;
6073 rtx goaltry, valtry, value, where;
6075 register int regno = -1;
6079 int goal_mem_addr_varies = 0;
6080 int need_stable_sp = 0;
6086 else if (GET_CODE (goal) == REG)
6087 regno = REGNO (goal);
6088 else if (GET_CODE (goal) == MEM)
6090 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6091 if (MEM_VOLATILE_P (goal))
6093 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6095 /* An address with side effects must be reexecuted. */
6108 else if (CONSTANT_P (goal))
6110 else if (GET_CODE (goal) == PLUS
6111 && XEXP (goal, 0) == stack_pointer_rtx
6112 && CONSTANT_P (XEXP (goal, 1)))
6113 goal_const = need_stable_sp = 1;
6114 else if (GET_CODE (goal) == PLUS
6115 && XEXP (goal, 0) == frame_pointer_rtx
6116 && CONSTANT_P (XEXP (goal, 1)))
6121 /* On some machines, certain regs must always be rejected
6122 because they don't behave the way ordinary registers do. */
6124 #ifdef OVERLAPPING_REGNO_P
6125 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6126 && OVERLAPPING_REGNO_P (regno))
6130 /* Scan insns back from INSN, looking for one that copies
6131 a value into or out of GOAL.
6132 Stop and give up if we reach a label. */
6137 if (p == 0 || GET_CODE (p) == CODE_LABEL)
6139 if (GET_CODE (p) == INSN
6140 /* If we don't want spill regs ... */
6141 && (! (reload_reg_p != 0
6142 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6143 /* ... then ignore insns introduced by reload; they aren't useful
6144 and can cause results in reload_as_needed to be different
6145 from what they were when calculating the need for spills.
6146 If we notice an input-reload insn here, we will reject it below,
6147 but it might hide a usable equivalent. That makes bad code.
6148 It may even abort: perhaps no reg was spilled for this insn
6149 because it was assumed we would find that equivalent. */
6150 || INSN_UID (p) < reload_first_uid))
6153 pat = single_set (p);
6154 /* First check for something that sets some reg equal to GOAL. */
6157 && true_regnum (SET_SRC (pat)) == regno
6158 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6161 && true_regnum (SET_DEST (pat)) == regno
6162 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6164 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6165 /* When looking for stack pointer + const,
6166 make sure we don't use a stack adjust. */
6167 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6168 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6170 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6171 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6173 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6174 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6175 /* If we are looking for a constant,
6176 and something equivalent to that constant was copied
6177 into a reg, we can use that reg. */
6178 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6180 && rtx_equal_p (XEXP (tem, 0), goal)
6181 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6182 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6184 && GET_CODE (SET_DEST (pat)) == REG
6185 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6186 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
6187 && GET_CODE (goal) == CONST_INT
6188 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
6190 && rtx_equal_p (goal, goaltry)
6191 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
6193 && (valueno = true_regnum (valtry)) >= 0)
6194 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6196 && GET_CODE (SET_DEST (pat)) == REG
6197 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6198 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
6199 && GET_CODE (goal) == CONST_INT
6200 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6202 && rtx_equal_p (goal, goaltry)
6204 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6205 && (valueno = true_regnum (valtry)) >= 0)))
6208 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
6209 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6219 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6220 (or copying VALUE into GOAL, if GOAL is also a register).
6221 Now verify that VALUE is really valid. */
6223 /* VALUENO is the register number of VALUE; a hard register. */
6225 /* Don't try to re-use something that is killed in this insn. We want
6226 to be able to trust REG_UNUSED notes. */
6227 if (find_reg_note (where, REG_UNUSED, value))
6230 /* If we propose to get the value from the stack pointer or if GOAL is
6231 a MEM based on the stack pointer, we need a stable SP. */
6232 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6233 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6237 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6238 if (GET_MODE (value) != mode)
6241 /* Reject VALUE if it was loaded from GOAL
6242 and is also a register that appears in the address of GOAL. */
6244 if (goal_mem && value == SET_DEST (single_set (where))
6245 && refers_to_regno_for_reload_p (valueno,
6247 + HARD_REGNO_NREGS (valueno, mode)),
6251 /* Reject registers that overlap GOAL. */
6253 if (!goal_mem && !goal_const
6254 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
6255 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
6258 /* Reject VALUE if it is one of the regs reserved for reloads.
6259 Reload1 knows how to reuse them anyway, and it would get
6260 confused if we allocated one without its knowledge.
6261 (Now that insns introduced by reload are ignored above,
6262 this case shouldn't happen, but I'm not positive.) */
6264 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
6265 && reload_reg_p[valueno] >= 0)
6268 /* On some machines, certain regs must always be rejected
6269 because they don't behave the way ordinary registers do. */
6271 #ifdef OVERLAPPING_REGNO_P
6272 if (OVERLAPPING_REGNO_P (valueno))
6276 nregs = HARD_REGNO_NREGS (regno, mode);
6277 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6279 /* Reject VALUE if it is a register being used for an input reload
6280 even if it is not one of those reserved. */
6282 if (reload_reg_p != 0)
6285 for (i = 0; i < n_reloads; i++)
6286 if (reload_reg_rtx[i] != 0 && reload_in[i])
6288 int regno1 = REGNO (reload_reg_rtx[i]);
6289 int nregs1 = HARD_REGNO_NREGS (regno1,
6290 GET_MODE (reload_reg_rtx[i]));
6291 if (regno1 < valueno + valuenregs
6292 && regno1 + nregs1 > valueno)
6298 /* We must treat frame pointer as varying here,
6299 since it can vary--in a nonlocal goto as generated by expand_goto. */
6300 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6302 /* Now verify that the values of GOAL and VALUE remain unaltered
6303 until INSN is reached. */
6312 /* Don't trust the conversion past a function call
6313 if either of the two is in a call-clobbered register, or memory. */
6314 if (GET_CODE (p) == CALL_INSN
6315 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6316 && call_used_regs[regno])
6318 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
6319 && call_used_regs[valueno])
6325 #ifdef NON_SAVING_SETJMP
6326 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
6327 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6331 #ifdef INSN_CLOBBERS_REGNO_P
6332 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
6333 && INSN_CLOBBERS_REGNO_P (p, valueno))
6334 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6335 && INSN_CLOBBERS_REGNO_P (p, regno)))
6339 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6343 /* Watch out for unspec_volatile, and volatile asms. */
6344 if (volatile_insn_p (pat))
6347 /* If this insn P stores in either GOAL or VALUE, return 0.
6348 If GOAL is a memory ref and this insn writes memory, return 0.
6349 If GOAL is a memory ref and its address is not constant,
6350 and this insn P changes a register used in GOAL, return 0. */
6352 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6354 register rtx dest = SET_DEST (pat);
6355 while (GET_CODE (dest) == SUBREG
6356 || GET_CODE (dest) == ZERO_EXTRACT
6357 || GET_CODE (dest) == SIGN_EXTRACT
6358 || GET_CODE (dest) == STRICT_LOW_PART)
6359 dest = XEXP (dest, 0);
6360 if (GET_CODE (dest) == REG)
6362 register int xregno = REGNO (dest);
6364 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6365 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6368 if (xregno < regno + nregs && xregno + xnregs > regno)
6370 if (xregno < valueno + valuenregs
6371 && xregno + xnregs > valueno)
6373 if (goal_mem_addr_varies
6374 && reg_overlap_mentioned_for_reload_p (dest, goal))
6376 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6379 else if (goal_mem && GET_CODE (dest) == MEM
6380 && ! push_operand (dest, GET_MODE (dest)))
6382 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6383 && reg_equiv_memory_loc[regno] != 0)
6385 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6388 else if (GET_CODE (pat) == PARALLEL)
6391 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6393 register rtx v1 = XVECEXP (pat, 0, i);
6394 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6396 register rtx dest = SET_DEST (v1);
6397 while (GET_CODE (dest) == SUBREG
6398 || GET_CODE (dest) == ZERO_EXTRACT
6399 || GET_CODE (dest) == SIGN_EXTRACT
6400 || GET_CODE (dest) == STRICT_LOW_PART)
6401 dest = XEXP (dest, 0);
6402 if (GET_CODE (dest) == REG)
6404 register int xregno = REGNO (dest);
6406 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6407 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6410 if (xregno < regno + nregs
6411 && xregno + xnregs > regno)
6413 if (xregno < valueno + valuenregs
6414 && xregno + xnregs > valueno)
6416 if (goal_mem_addr_varies
6417 && reg_overlap_mentioned_for_reload_p (dest,
6420 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6423 else if (goal_mem && GET_CODE (dest) == MEM
6424 && ! push_operand (dest, GET_MODE (dest)))
6426 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6427 && reg_equiv_memory_loc[regno] != 0)
6429 else if (need_stable_sp
6430 && push_operand (dest, GET_MODE (dest)))
6436 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6440 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6441 link = XEXP (link, 1))
6443 pat = XEXP (link, 0);
6444 if (GET_CODE (pat) == CLOBBER)
6446 register rtx dest = SET_DEST (pat);
6447 while (GET_CODE (dest) == SUBREG
6448 || GET_CODE (dest) == ZERO_EXTRACT
6449 || GET_CODE (dest) == SIGN_EXTRACT
6450 || GET_CODE (dest) == STRICT_LOW_PART)
6451 dest = XEXP (dest, 0);
6452 if (GET_CODE (dest) == REG)
6454 register int xregno = REGNO (dest);
6456 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6457 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6460 if (xregno < regno + nregs
6461 && xregno + xnregs > regno)
6463 if (xregno < valueno + valuenregs
6464 && xregno + xnregs > valueno)
6466 if (goal_mem_addr_varies
6467 && reg_overlap_mentioned_for_reload_p (dest,
6471 else if (goal_mem && GET_CODE (dest) == MEM
6472 && ! push_operand (dest, GET_MODE (dest)))
6474 else if (need_stable_sp
6475 && push_operand (dest, GET_MODE (dest)))
6482 /* If this insn auto-increments or auto-decrements
6483 either regno or valueno, return 0 now.
6484 If GOAL is a memory ref and its address is not constant,
6485 and this insn P increments a register used in GOAL, return 0. */
6489 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6490 if (REG_NOTE_KIND (link) == REG_INC
6491 && GET_CODE (XEXP (link, 0)) == REG)
6493 register int incno = REGNO (XEXP (link, 0));
6494 if (incno < regno + nregs && incno >= regno)
6496 if (incno < valueno + valuenregs && incno >= valueno)
6498 if (goal_mem_addr_varies
6499 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6509 /* Find a place where INCED appears in an increment or decrement operator
6510 within X, and return the amount INCED is incremented or decremented by.
6511 The value is always positive. */
6514 find_inc_amount (x, inced)
6517 register enum rtx_code code = GET_CODE (x);
6523 register rtx addr = XEXP (x, 0);
6524 if ((GET_CODE (addr) == PRE_DEC
6525 || GET_CODE (addr) == POST_DEC
6526 || GET_CODE (addr) == PRE_INC
6527 || GET_CODE (addr) == POST_INC)
6528 && XEXP (addr, 0) == inced)
6529 return GET_MODE_SIZE (GET_MODE (x));
6532 fmt = GET_RTX_FORMAT (code);
6533 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6537 register int tem = find_inc_amount (XEXP (x, i), inced);
6544 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6546 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6556 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6559 regno_clobbered_p (regno, insn)
6563 if (GET_CODE (PATTERN (insn)) == CLOBBER
6564 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6565 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
6567 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6569 int i = XVECLEN (PATTERN (insn), 0) - 1;
6573 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6574 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
6575 && REGNO (XEXP (elt, 0)) == regno)
6583 static char *reload_when_needed_name[] =
6586 "RELOAD_FOR_OUTPUT",
6588 "RELOAD_FOR_INPUT_ADDRESS",
6589 "RELOAD_FOR_INPADDR_ADDRESS",
6590 "RELOAD_FOR_OUTPUT_ADDRESS",
6591 "RELOAD_FOR_OUTADDR_ADDRESS",
6592 "RELOAD_FOR_OPERAND_ADDRESS",
6593 "RELOAD_FOR_OPADDR_ADDR",
6595 "RELOAD_FOR_OTHER_ADDRESS"
6598 static char *reg_class_names[] = REG_CLASS_NAMES;
6600 /* These functions are used to print the variables set by 'find_reloads' */
6603 debug_reload_to_stream (f)
6611 for (r = 0; r < n_reloads; r++)
6613 fprintf (f, "Reload %d: ", r);
6615 if (reload_in[r] != 0)
6617 fprintf (f, "reload_in (%s) = ",
6618 GET_MODE_NAME (reload_inmode[r]));
6619 print_inline_rtx (f, reload_in[r], 24);
6620 fprintf (f, "\n\t");
6623 if (reload_out[r] != 0)
6625 fprintf (f, "reload_out (%s) = ",
6626 GET_MODE_NAME (reload_outmode[r]));
6627 print_inline_rtx (f, reload_out[r], 24);
6628 fprintf (f, "\n\t");
6631 fprintf (f, "%s, ", reg_class_names[(int) reload_reg_class[r]]);
6633 fprintf (f, "%s (opnum = %d)",
6634 reload_when_needed_name[(int) reload_when_needed[r]],
6637 if (reload_optional[r])
6638 fprintf (f, ", optional");
6640 if (reload_nongroup[r])
6641 fprintf (stderr, ", nongroup");
6643 if (reload_inc[r] != 0)
6644 fprintf (f, ", inc by %d", reload_inc[r]);
6646 if (reload_nocombine[r])
6647 fprintf (f, ", can't combine");
6649 if (reload_secondary_p[r])
6650 fprintf (f, ", secondary_reload_p");
6652 if (reload_in_reg[r] != 0)
6654 fprintf (f, "\n\treload_in_reg: ");
6655 print_inline_rtx (f, reload_in_reg[r], 24);
6658 if (reload_out_reg[r] != 0)
6660 fprintf (f, "\n\treload_out_reg: ");
6661 print_inline_rtx (f, reload_out_reg[r], 24);
6664 if (reload_reg_rtx[r] != 0)
6666 fprintf (f, "\n\treload_reg_rtx: ");
6667 print_inline_rtx (f, reload_reg_rtx[r], 24);
6671 if (reload_secondary_in_reload[r] != -1)
6673 fprintf (f, "%ssecondary_in_reload = %d",
6674 prefix, reload_secondary_in_reload[r]);
6678 if (reload_secondary_out_reload[r] != -1)
6679 fprintf (f, "%ssecondary_out_reload = %d\n",
6680 prefix, reload_secondary_out_reload[r]);
6683 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
6685 fprintf (stderr, "%ssecondary_in_icode = %s", prefix,
6686 insn_name[reload_secondary_in_icode[r]]);
6690 if (reload_secondary_out_icode[r] != CODE_FOR_nothing)
6691 fprintf (stderr, "%ssecondary_out_icode = %s", prefix,
6692 insn_name[reload_secondary_out_icode[r]]);
6701 debug_reload_to_stream (stderr);
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