1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
30 init_reload actually has to be called earlier anyway.
32 To scan an insn, call `find_reloads'. This does two things:
33 1. sets up tables describing which values must be reloaded
34 for this insn, and what kind of hard regs they must be reloaded into;
35 2. optionally record the locations where those values appear in
36 the data, so they can be replaced properly later.
37 This is done only if the second arg to `find_reloads' is nonzero.
39 The third arg to `find_reloads' specifies the number of levels
40 of indirect addressing supported by the machine. If it is zero,
41 indirect addressing is not valid. If it is one, (MEM (REG n))
42 is valid even if (REG n) did not get a hard register; if it is two,
43 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44 hard register, and similarly for higher values.
46 Then you must choose the hard regs to reload those pseudo regs into,
47 and generate appropriate load insns before this insn and perhaps
48 also store insns after this insn. Set up the array `reload_reg_rtx'
49 to contain the REG rtx's for the registers you used. In some
50 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51 for certain reloads. Then that tells you which register to use,
52 so you do not need to allocate one. But you still do need to add extra
53 instructions to copy the value into and out of that register.
55 Finally you must call `subst_reloads' to substitute the reload reg rtx's
56 into the locations already recorded.
60 find_reloads can alter the operands of the instruction it is called on.
62 1. Two operands of any sort may be interchanged, if they are in a
63 commutative instruction.
64 This happens only if find_reloads thinks the instruction will compile
67 2. Pseudo-registers that are equivalent to constants are replaced
68 with those constants if they are not in hard registers.
70 1 happens every time find_reloads is called.
71 2 happens only when REPLACE is 1, which is only when
72 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
90 /* We do not enable this with ENABLE_CHECKING, since it is awfully slow. */
95 #include "coretypes.h"
99 #include "insn-config.h"
105 #include "addresses.h"
106 #include "hard-reg-set.h"
110 #include "function.h"
116 /* True if X is a constant that can be forced into the constant pool. */
117 #define CONST_POOL_OK_P(X) \
119 && GET_CODE (X) != HIGH \
120 && !targetm.cannot_force_const_mem (X))
122 /* True if C is a non-empty register class that has too few registers
123 to be safely used as a reload target class. */
124 #define SMALL_REGISTER_CLASS_P(C) \
125 (reg_class_size [(C)] == 1 \
126 || (reg_class_size [(C)] >= 1 && CLASS_LIKELY_SPILLED_P (C)))
129 /* All reloads of the current insn are recorded here. See reload.h for
132 struct reload rld[MAX_RELOADS];
134 /* All the "earlyclobber" operands of the current insn
135 are recorded here. */
137 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
139 int reload_n_operands;
141 /* Replacing reloads.
143 If `replace_reloads' is nonzero, then as each reload is recorded
144 an entry is made for it in the table `replacements'.
145 Then later `subst_reloads' can look through that table and
146 perform all the replacements needed. */
148 /* Nonzero means record the places to replace. */
149 static int replace_reloads;
151 /* Each replacement is recorded with a structure like this. */
154 rtx *where; /* Location to store in */
155 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
156 a SUBREG; 0 otherwise. */
157 int what; /* which reload this is for */
158 enum machine_mode mode; /* mode it must have */
161 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
163 /* Number of replacements currently recorded. */
164 static int n_replacements;
166 /* Used to track what is modified by an operand. */
169 int reg_flag; /* Nonzero if referencing a register. */
170 int safe; /* Nonzero if this can't conflict with anything. */
171 rtx base; /* Base address for MEM. */
172 HOST_WIDE_INT start; /* Starting offset or register number. */
173 HOST_WIDE_INT end; /* Ending offset or register number. */
176 #ifdef SECONDARY_MEMORY_NEEDED
178 /* Save MEMs needed to copy from one class of registers to another. One MEM
179 is used per mode, but normally only one or two modes are ever used.
181 We keep two versions, before and after register elimination. The one
182 after register elimination is record separately for each operand. This
183 is done in case the address is not valid to be sure that we separately
186 static rtx secondary_memlocs[NUM_MACHINE_MODES];
187 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
188 static int secondary_memlocs_elim_used = 0;
191 /* The instruction we are doing reloads for;
192 so we can test whether a register dies in it. */
193 static rtx this_insn;
195 /* Nonzero if this instruction is a user-specified asm with operands. */
196 static int this_insn_is_asm;
198 /* If hard_regs_live_known is nonzero,
199 we can tell which hard regs are currently live,
200 at least enough to succeed in choosing dummy reloads. */
201 static int hard_regs_live_known;
203 /* Indexed by hard reg number,
204 element is nonnegative if hard reg has been spilled.
205 This vector is passed to `find_reloads' as an argument
206 and is not changed here. */
207 static short *static_reload_reg_p;
209 /* Set to 1 in subst_reg_equivs if it changes anything. */
210 static int subst_reg_equivs_changed;
212 /* On return from push_reload, holds the reload-number for the OUT
213 operand, which can be different for that from the input operand. */
214 static int output_reloadnum;
216 /* Compare two RTX's. */
217 #define MATCHES(x, y) \
218 (x == y || (x != 0 && (REG_P (x) \
219 ? REG_P (y) && REGNO (x) == REGNO (y) \
220 : rtx_equal_p (x, y) && ! side_effects_p (x))))
222 /* Indicates if two reloads purposes are for similar enough things that we
223 can merge their reloads. */
224 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
225 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
226 || ((when1) == (when2) && (op1) == (op2)) \
227 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
228 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
229 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
230 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
231 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
233 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
234 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
235 ((when1) != (when2) \
236 || ! ((op1) == (op2) \
237 || (when1) == RELOAD_FOR_INPUT \
238 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
239 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
241 /* If we are going to reload an address, compute the reload type to
243 #define ADDR_TYPE(type) \
244 ((type) == RELOAD_FOR_INPUT_ADDRESS \
245 ? RELOAD_FOR_INPADDR_ADDRESS \
246 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
247 ? RELOAD_FOR_OUTADDR_ADDRESS \
250 static int push_secondary_reload (int, rtx, int, int, enum reg_class,
251 enum machine_mode, enum reload_type,
252 enum insn_code *, secondary_reload_info *);
253 static enum reg_class find_valid_class (enum machine_mode, enum machine_mode,
255 static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
256 static void push_replacement (rtx *, int, enum machine_mode);
257 static void dup_replacements (rtx *, rtx *);
258 static void combine_reloads (void);
259 static int find_reusable_reload (rtx *, rtx, enum reg_class,
260 enum reload_type, int, int);
261 static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
262 enum machine_mode, enum reg_class, int, int);
263 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
264 static struct decomposition decompose (rtx);
265 static int immune_p (rtx, rtx, struct decomposition);
266 static bool alternative_allows_const_pool_ref (rtx, const char *, int);
267 static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
269 static rtx make_memloc (rtx, int);
270 static int maybe_memory_address_p (enum machine_mode, rtx, rtx *);
271 static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
272 int, enum reload_type, int, rtx);
273 static rtx subst_reg_equivs (rtx, rtx);
274 static rtx subst_indexed_address (rtx);
275 static void update_auto_inc_notes (rtx, int, int);
276 static int find_reloads_address_1 (enum machine_mode, rtx, int,
277 enum rtx_code, enum rtx_code, rtx *,
278 int, enum reload_type,int, rtx);
279 static void find_reloads_address_part (rtx, rtx *, enum reg_class,
280 enum machine_mode, int,
281 enum reload_type, int);
282 static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
284 static void copy_replacements_1 (rtx *, rtx *, int);
285 static int find_inc_amount (rtx, rtx);
286 static int refers_to_mem_for_reload_p (rtx);
287 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
290 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
294 push_reg_equiv_alt_mem (int regno, rtx mem)
298 for (it = reg_equiv_alt_mem_list [regno]; it; it = XEXP (it, 1))
299 if (rtx_equal_p (XEXP (it, 0), mem))
302 reg_equiv_alt_mem_list [regno]
303 = alloc_EXPR_LIST (REG_EQUIV, mem,
304 reg_equiv_alt_mem_list [regno]);
307 /* Determine if any secondary reloads are needed for loading (if IN_P is
308 nonzero) or storing (if IN_P is zero) X to or from a reload register of
309 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
310 are needed, push them.
312 Return the reload number of the secondary reload we made, or -1 if
313 we didn't need one. *PICODE is set to the insn_code to use if we do
314 need a secondary reload. */
317 push_secondary_reload (int in_p, rtx x, int opnum, int optional,
318 enum reg_class reload_class,
319 enum machine_mode reload_mode, enum reload_type type,
320 enum insn_code *picode, secondary_reload_info *prev_sri)
322 enum reg_class rclass = NO_REGS;
323 enum reg_class scratch_class;
324 enum machine_mode mode = reload_mode;
325 enum insn_code icode = CODE_FOR_nothing;
326 enum insn_code t_icode = CODE_FOR_nothing;
327 enum reload_type secondary_type;
328 int s_reload, t_reload = -1;
329 const char *scratch_constraint;
331 secondary_reload_info sri;
333 if (type == RELOAD_FOR_INPUT_ADDRESS
334 || type == RELOAD_FOR_OUTPUT_ADDRESS
335 || type == RELOAD_FOR_INPADDR_ADDRESS
336 || type == RELOAD_FOR_OUTADDR_ADDRESS)
337 secondary_type = type;
339 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
341 *picode = CODE_FOR_nothing;
343 /* If X is a paradoxical SUBREG, use the inner value to determine both the
344 mode and object being reloaded. */
345 if (GET_CODE (x) == SUBREG
346 && (GET_MODE_SIZE (GET_MODE (x))
347 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
350 reload_mode = GET_MODE (x);
353 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
354 is still a pseudo-register by now, it *must* have an equivalent MEM
355 but we don't want to assume that), use that equivalent when seeing if
356 a secondary reload is needed since whether or not a reload is needed
357 might be sensitive to the form of the MEM. */
359 if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
360 && reg_equiv_mem[REGNO (x)] != 0)
361 x = reg_equiv_mem[REGNO (x)];
363 sri.icode = CODE_FOR_nothing;
364 sri.prev_sri = prev_sri;
365 rclass = targetm.secondary_reload (in_p, x, reload_class, reload_mode, &sri);
368 /* If we don't need any secondary registers, done. */
369 if (rclass == NO_REGS && icode == CODE_FOR_nothing)
372 if (rclass != NO_REGS)
373 t_reload = push_secondary_reload (in_p, x, opnum, optional, rclass,
374 reload_mode, type, &t_icode, &sri);
376 /* If we will be using an insn, the secondary reload is for a
379 if (icode != CODE_FOR_nothing)
381 /* If IN_P is nonzero, the reload register will be the output in
382 operand 0. If IN_P is zero, the reload register will be the input
383 in operand 1. Outputs should have an initial "=", which we must
386 /* ??? It would be useful to be able to handle only two, or more than
387 three, operands, but for now we can only handle the case of having
388 exactly three: output, input and one temp/scratch. */
389 gcc_assert (insn_data[(int) icode].n_operands == 3);
391 /* ??? We currently have no way to represent a reload that needs
392 an icode to reload from an intermediate tertiary reload register.
393 We should probably have a new field in struct reload to tag a
394 chain of scratch operand reloads onto. */
395 gcc_assert (rclass == NO_REGS);
397 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
398 gcc_assert (*scratch_constraint == '=');
399 scratch_constraint++;
400 if (*scratch_constraint == '&')
401 scratch_constraint++;
402 letter = *scratch_constraint;
403 scratch_class = (letter == 'r' ? GENERAL_REGS
404 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) letter,
405 scratch_constraint));
407 rclass = scratch_class;
408 mode = insn_data[(int) icode].operand[2].mode;
411 /* This case isn't valid, so fail. Reload is allowed to use the same
412 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
413 in the case of a secondary register, we actually need two different
414 registers for correct code. We fail here to prevent the possibility of
415 silently generating incorrect code later.
417 The convention is that secondary input reloads are valid only if the
418 secondary_class is different from class. If you have such a case, you
419 can not use secondary reloads, you must work around the problem some
422 Allow this when a reload_in/out pattern is being used. I.e. assume
423 that the generated code handles this case. */
425 gcc_assert (!in_p || rclass != reload_class || icode != CODE_FOR_nothing
426 || t_icode != CODE_FOR_nothing);
428 /* See if we can reuse an existing secondary reload. */
429 for (s_reload = 0; s_reload < n_reloads; s_reload++)
430 if (rld[s_reload].secondary_p
431 && (reg_class_subset_p (rclass, rld[s_reload].rclass)
432 || reg_class_subset_p (rld[s_reload].rclass, rclass))
433 && ((in_p && rld[s_reload].inmode == mode)
434 || (! in_p && rld[s_reload].outmode == mode))
435 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
436 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
437 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
438 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
439 && (SMALL_REGISTER_CLASS_P (rclass) || SMALL_REGISTER_CLASSES)
440 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
441 opnum, rld[s_reload].opnum))
444 rld[s_reload].inmode = mode;
446 rld[s_reload].outmode = mode;
448 if (reg_class_subset_p (rclass, rld[s_reload].rclass))
449 rld[s_reload].rclass = rclass;
451 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
452 rld[s_reload].optional &= optional;
453 rld[s_reload].secondary_p = 1;
454 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
455 opnum, rld[s_reload].opnum))
456 rld[s_reload].when_needed = RELOAD_OTHER;
461 if (s_reload == n_reloads)
463 #ifdef SECONDARY_MEMORY_NEEDED
464 /* If we need a memory location to copy between the two reload regs,
465 set it up now. Note that we do the input case before making
466 the reload and the output case after. This is due to the
467 way reloads are output. */
469 if (in_p && icode == CODE_FOR_nothing
470 && SECONDARY_MEMORY_NEEDED (rclass, reload_class, mode))
472 get_secondary_mem (x, reload_mode, opnum, type);
474 /* We may have just added new reloads. Make sure we add
475 the new reload at the end. */
476 s_reload = n_reloads;
480 /* We need to make a new secondary reload for this register class. */
481 rld[s_reload].in = rld[s_reload].out = 0;
482 rld[s_reload].rclass = rclass;
484 rld[s_reload].inmode = in_p ? mode : VOIDmode;
485 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
486 rld[s_reload].reg_rtx = 0;
487 rld[s_reload].optional = optional;
488 rld[s_reload].inc = 0;
489 /* Maybe we could combine these, but it seems too tricky. */
490 rld[s_reload].nocombine = 1;
491 rld[s_reload].in_reg = 0;
492 rld[s_reload].out_reg = 0;
493 rld[s_reload].opnum = opnum;
494 rld[s_reload].when_needed = secondary_type;
495 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
496 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
497 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
498 rld[s_reload].secondary_out_icode
499 = ! in_p ? t_icode : CODE_FOR_nothing;
500 rld[s_reload].secondary_p = 1;
504 #ifdef SECONDARY_MEMORY_NEEDED
505 if (! in_p && icode == CODE_FOR_nothing
506 && SECONDARY_MEMORY_NEEDED (reload_class, rclass, mode))
507 get_secondary_mem (x, mode, opnum, type);
515 /* If a secondary reload is needed, return its class. If both an intermediate
516 register and a scratch register is needed, we return the class of the
517 intermediate register. */
519 secondary_reload_class (bool in_p, enum reg_class rclass,
520 enum machine_mode mode, rtx x)
522 enum insn_code icode;
523 secondary_reload_info sri;
525 sri.icode = CODE_FOR_nothing;
527 rclass = targetm.secondary_reload (in_p, x, rclass, mode, &sri);
530 /* If there are no secondary reloads at all, we return NO_REGS.
531 If an intermediate register is needed, we return its class. */
532 if (icode == CODE_FOR_nothing || rclass != NO_REGS)
535 /* No intermediate register is needed, but we have a special reload
536 pattern, which we assume for now needs a scratch register. */
537 return scratch_reload_class (icode);
540 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
541 three operands, verify that operand 2 is an output operand, and return
543 ??? We'd like to be able to handle any pattern with at least 2 operands,
544 for zero or more scratch registers, but that needs more infrastructure. */
546 scratch_reload_class (enum insn_code icode)
548 const char *scratch_constraint;
550 enum reg_class rclass;
552 gcc_assert (insn_data[(int) icode].n_operands == 3);
553 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
554 gcc_assert (*scratch_constraint == '=');
555 scratch_constraint++;
556 if (*scratch_constraint == '&')
557 scratch_constraint++;
558 scratch_letter = *scratch_constraint;
559 if (scratch_letter == 'r')
561 rclass = REG_CLASS_FROM_CONSTRAINT ((unsigned char) scratch_letter,
563 gcc_assert (rclass != NO_REGS);
567 #ifdef SECONDARY_MEMORY_NEEDED
569 /* Return a memory location that will be used to copy X in mode MODE.
570 If we haven't already made a location for this mode in this insn,
571 call find_reloads_address on the location being returned. */
574 get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
575 int opnum, enum reload_type type)
580 /* By default, if MODE is narrower than a word, widen it to a word.
581 This is required because most machines that require these memory
582 locations do not support short load and stores from all registers
583 (e.g., FP registers). */
585 #ifdef SECONDARY_MEMORY_NEEDED_MODE
586 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
588 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
589 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
592 /* If we already have made a MEM for this operand in MODE, return it. */
593 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
594 return secondary_memlocs_elim[(int) mode][opnum];
596 /* If this is the first time we've tried to get a MEM for this mode,
597 allocate a new one. `something_changed' in reload will get set
598 by noticing that the frame size has changed. */
600 if (secondary_memlocs[(int) mode] == 0)
602 #ifdef SECONDARY_MEMORY_NEEDED_RTX
603 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
605 secondary_memlocs[(int) mode]
606 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
610 /* Get a version of the address doing any eliminations needed. If that
611 didn't give us a new MEM, make a new one if it isn't valid. */
613 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
614 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
616 if (! mem_valid && loc == secondary_memlocs[(int) mode])
617 loc = copy_rtx (loc);
619 /* The only time the call below will do anything is if the stack
620 offset is too large. In that case IND_LEVELS doesn't matter, so we
621 can just pass a zero. Adjust the type to be the address of the
622 corresponding object. If the address was valid, save the eliminated
623 address. If it wasn't valid, we need to make a reload each time, so
628 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
629 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
632 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
636 secondary_memlocs_elim[(int) mode][opnum] = loc;
637 if (secondary_memlocs_elim_used <= (int)mode)
638 secondary_memlocs_elim_used = (int)mode + 1;
642 /* Clear any secondary memory locations we've made. */
645 clear_secondary_mem (void)
647 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
649 #endif /* SECONDARY_MEMORY_NEEDED */
652 /* Find the largest class which has at least one register valid in
653 mode INNER, and which for every such register, that register number
654 plus N is also valid in OUTER (if in range) and is cheap to move
655 into REGNO. Such a class must exist. */
657 static enum reg_class
658 find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED,
659 enum machine_mode inner ATTRIBUTE_UNUSED, int n,
660 unsigned int dest_regno ATTRIBUTE_UNUSED)
665 enum reg_class best_class = NO_REGS;
666 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
667 unsigned int best_size = 0;
670 for (rclass = 1; rclass < N_REG_CLASSES; rclass++)
674 for (regno = 0; regno < FIRST_PSEUDO_REGISTER - n && ! bad; regno++)
675 if (TEST_HARD_REG_BIT (reg_class_contents[rclass], regno))
677 if (HARD_REGNO_MODE_OK (regno, inner))
680 if (! TEST_HARD_REG_BIT (reg_class_contents[rclass], regno + n)
681 || ! HARD_REGNO_MODE_OK (regno + n, outer))
688 cost = REGISTER_MOVE_COST (outer, rclass, dest_class);
690 if ((reg_class_size[rclass] > best_size
691 && (best_cost < 0 || best_cost >= cost))
695 best_size = reg_class_size[rclass];
696 best_cost = REGISTER_MOVE_COST (outer, rclass, dest_class);
700 gcc_assert (best_size != 0);
705 /* Return the number of a previously made reload that can be combined with
706 a new one, or n_reloads if none of the existing reloads can be used.
707 OUT, RCLASS, TYPE and OPNUM are the same arguments as passed to
708 push_reload, they determine the kind of the new reload that we try to
709 combine. P_IN points to the corresponding value of IN, which can be
710 modified by this function.
711 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
714 find_reusable_reload (rtx *p_in, rtx out, enum reg_class rclass,
715 enum reload_type type, int opnum, int dont_share)
719 /* We can't merge two reloads if the output of either one is
722 if (earlyclobber_operand_p (out))
725 /* We can use an existing reload if the class is right
726 and at least one of IN and OUT is a match
727 and the other is at worst neutral.
728 (A zero compared against anything is neutral.)
730 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
731 for the same thing since that can cause us to need more reload registers
732 than we otherwise would. */
734 for (i = 0; i < n_reloads; i++)
735 if ((reg_class_subset_p (rclass, rld[i].rclass)
736 || reg_class_subset_p (rld[i].rclass, rclass))
737 /* If the existing reload has a register, it must fit our class. */
738 && (rld[i].reg_rtx == 0
739 || TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
740 true_regnum (rld[i].reg_rtx)))
741 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
742 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
743 || (out != 0 && MATCHES (rld[i].out, out)
744 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
745 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
746 && (SMALL_REGISTER_CLASS_P (rclass) || SMALL_REGISTER_CLASSES)
747 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
750 /* Reloading a plain reg for input can match a reload to postincrement
751 that reg, since the postincrement's value is the right value.
752 Likewise, it can match a preincrement reload, since we regard
753 the preincrementation as happening before any ref in this insn
755 for (i = 0; i < n_reloads; i++)
756 if ((reg_class_subset_p (rclass, rld[i].rclass)
757 || reg_class_subset_p (rld[i].rclass, rclass))
758 /* If the existing reload has a register, it must fit our
760 && (rld[i].reg_rtx == 0
761 || TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
762 true_regnum (rld[i].reg_rtx)))
763 && out == 0 && rld[i].out == 0 && rld[i].in != 0
765 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC
766 && MATCHES (XEXP (rld[i].in, 0), in))
767 || (REG_P (rld[i].in)
768 && GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC
769 && MATCHES (XEXP (in, 0), rld[i].in)))
770 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
771 && (SMALL_REGISTER_CLASS_P (rclass) || SMALL_REGISTER_CLASSES)
772 && MERGABLE_RELOADS (type, rld[i].when_needed,
773 opnum, rld[i].opnum))
775 /* Make sure reload_in ultimately has the increment,
776 not the plain register. */
784 /* Return nonzero if X is a SUBREG which will require reloading of its
785 SUBREG_REG expression. */
788 reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
792 /* Only SUBREGs are problematical. */
793 if (GET_CODE (x) != SUBREG)
796 inner = SUBREG_REG (x);
798 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
799 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
802 /* If INNER is not a hard register, then INNER will not need to
805 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
808 /* If INNER is not ok for MODE, then INNER will need reloading. */
809 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
812 /* If the outer part is a word or smaller, INNER larger than a
813 word and the number of regs for INNER is not the same as the
814 number of words in INNER, then INNER will need reloading. */
815 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
817 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
818 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
819 != (int) hard_regno_nregs[REGNO (inner)][GET_MODE (inner)]));
822 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
823 requiring an extra reload register. The caller has already found that
824 IN contains some reference to REGNO, so check that we can produce the
825 new value in a single step. E.g. if we have
826 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
827 instruction that adds one to a register, this should succeed.
828 However, if we have something like
829 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
830 needs to be loaded into a register first, we need a separate reload
832 Such PLUS reloads are generated by find_reload_address_part.
833 The out-of-range PLUS expressions are usually introduced in the instruction
834 patterns by register elimination and substituting pseudos without a home
835 by their function-invariant equivalences. */
837 can_reload_into (rtx in, int regno, enum machine_mode mode)
841 struct recog_data save_recog_data;
843 /* For matching constraints, we often get notional input reloads where
844 we want to use the original register as the reload register. I.e.
845 technically this is a non-optional input-output reload, but IN is
846 already a valid register, and has been chosen as the reload register.
847 Speed this up, since it trivially works. */
851 /* To test MEMs properly, we'd have to take into account all the reloads
852 that are already scheduled, which can become quite complicated.
853 And since we've already handled address reloads for this MEM, it
854 should always succeed anyway. */
858 /* If we can make a simple SET insn that does the job, everything should
860 dst = gen_rtx_REG (mode, regno);
861 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
862 save_recog_data = recog_data;
863 if (recog_memoized (test_insn) >= 0)
865 extract_insn (test_insn);
866 r = constrain_operands (1);
868 recog_data = save_recog_data;
872 /* Record one reload that needs to be performed.
873 IN is an rtx saying where the data are to be found before this instruction.
874 OUT says where they must be stored after the instruction.
875 (IN is zero for data not read, and OUT is zero for data not written.)
876 INLOC and OUTLOC point to the places in the instructions where
877 IN and OUT were found.
878 If IN and OUT are both nonzero, it means the same register must be used
879 to reload both IN and OUT.
881 RCLASS is a register class required for the reloaded data.
882 INMODE is the machine mode that the instruction requires
883 for the reg that replaces IN and OUTMODE is likewise for OUT.
885 If IN is zero, then OUT's location and mode should be passed as
888 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
890 OPTIONAL nonzero means this reload does not need to be performed:
891 it can be discarded if that is more convenient.
893 OPNUM and TYPE say what the purpose of this reload is.
895 The return value is the reload-number for this reload.
897 If both IN and OUT are nonzero, in some rare cases we might
898 want to make two separate reloads. (Actually we never do this now.)
899 Therefore, the reload-number for OUT is stored in
900 output_reloadnum when we return; the return value applies to IN.
901 Usually (presently always), when IN and OUT are nonzero,
902 the two reload-numbers are equal, but the caller should be careful to
906 push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
907 enum reg_class rclass, enum machine_mode inmode,
908 enum machine_mode outmode, int strict_low, int optional,
909 int opnum, enum reload_type type)
913 int dont_remove_subreg = 0;
914 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
915 int secondary_in_reload = -1, secondary_out_reload = -1;
916 enum insn_code secondary_in_icode = CODE_FOR_nothing;
917 enum insn_code secondary_out_icode = CODE_FOR_nothing;
919 /* INMODE and/or OUTMODE could be VOIDmode if no mode
920 has been specified for the operand. In that case,
921 use the operand's mode as the mode to reload. */
922 if (inmode == VOIDmode && in != 0)
923 inmode = GET_MODE (in);
924 if (outmode == VOIDmode && out != 0)
925 outmode = GET_MODE (out);
927 /* If find_reloads and friends until now missed to replace a pseudo
928 with a constant of reg_equiv_constant something went wrong
930 Note that it can't simply be done here if we missed it earlier
931 since the constant might need to be pushed into the literal pool
932 and the resulting memref would probably need further
934 if (in != 0 && REG_P (in))
936 int regno = REGNO (in);
938 gcc_assert (regno < FIRST_PSEUDO_REGISTER
939 || reg_renumber[regno] >= 0
940 || reg_equiv_constant[regno] == NULL_RTX);
943 /* reg_equiv_constant only contains constants which are obviously
944 not appropriate as destination. So if we would need to replace
945 the destination pseudo with a constant we are in real
947 if (out != 0 && REG_P (out))
949 int regno = REGNO (out);
951 gcc_assert (regno < FIRST_PSEUDO_REGISTER
952 || reg_renumber[regno] >= 0
953 || reg_equiv_constant[regno] == NULL_RTX);
956 /* If we have a read-write operand with an address side-effect,
957 change either IN or OUT so the side-effect happens only once. */
958 if (in != 0 && out != 0 && MEM_P (in) && rtx_equal_p (in, out))
959 switch (GET_CODE (XEXP (in, 0)))
961 case POST_INC: case POST_DEC: case POST_MODIFY:
962 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
965 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
966 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
973 /* If we are reloading a (SUBREG constant ...), really reload just the
974 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
975 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
976 a pseudo and hence will become a MEM) with M1 wider than M2 and the
977 register is a pseudo, also reload the inside expression.
978 For machines that extend byte loads, do this for any SUBREG of a pseudo
979 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
980 M2 is an integral mode that gets extended when loaded.
981 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
982 either M1 is not valid for R or M2 is wider than a word but we only
983 need one word to store an M2-sized quantity in R.
984 (However, if OUT is nonzero, we need to reload the reg *and*
985 the subreg, so do nothing here, and let following statement handle it.)
987 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
988 we can't handle it here because CONST_INT does not indicate a mode.
990 Similarly, we must reload the inside expression if we have a
991 STRICT_LOW_PART (presumably, in == out in this case).
993 Also reload the inner expression if it does not require a secondary
994 reload but the SUBREG does.
996 Finally, reload the inner expression if it is a register that is in
997 the class whose registers cannot be referenced in a different size
998 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
999 cannot reload just the inside since we might end up with the wrong
1000 register class. But if it is inside a STRICT_LOW_PART, we have
1001 no choice, so we hope we do get the right register class there. */
1003 if (in != 0 && GET_CODE (in) == SUBREG
1004 && (subreg_lowpart_p (in) || strict_low)
1005 #ifdef CANNOT_CHANGE_MODE_CLASS
1006 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, rclass)
1008 && (CONSTANT_P (SUBREG_REG (in))
1009 || GET_CODE (SUBREG_REG (in)) == PLUS
1011 || (((REG_P (SUBREG_REG (in))
1012 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1013 || MEM_P (SUBREG_REG (in)))
1014 && ((GET_MODE_SIZE (inmode)
1015 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1016 #ifdef LOAD_EXTEND_OP
1017 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1018 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1020 && (GET_MODE_SIZE (inmode)
1021 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1022 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
1023 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != UNKNOWN)
1025 #ifdef WORD_REGISTER_OPERATIONS
1026 || ((GET_MODE_SIZE (inmode)
1027 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1028 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1029 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1033 || (REG_P (SUBREG_REG (in))
1034 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1035 /* The case where out is nonzero
1036 is handled differently in the following statement. */
1037 && (out == 0 || subreg_lowpart_p (in))
1038 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1039 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1041 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1043 != (int) hard_regno_nregs[REGNO (SUBREG_REG (in))]
1044 [GET_MODE (SUBREG_REG (in))]))
1045 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1046 || (secondary_reload_class (1, rclass, inmode, in) != NO_REGS
1047 && (secondary_reload_class (1, rclass, GET_MODE (SUBREG_REG (in)),
1050 #ifdef CANNOT_CHANGE_MODE_CLASS
1051 || (REG_P (SUBREG_REG (in))
1052 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1053 && REG_CANNOT_CHANGE_MODE_P
1054 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1058 in_subreg_loc = inloc;
1059 inloc = &SUBREG_REG (in);
1061 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1063 /* This is supposed to happen only for paradoxical subregs made by
1064 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1065 gcc_assert (GET_MODE_SIZE (GET_MODE (in)) <= GET_MODE_SIZE (inmode));
1067 inmode = GET_MODE (in);
1070 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1071 either M1 is not valid for R or M2 is wider than a word but we only
1072 need one word to store an M2-sized quantity in R.
1074 However, we must reload the inner reg *as well as* the subreg in
1077 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1078 code above. This can happen if SUBREG_BYTE != 0. */
1080 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1082 enum reg_class in_class = rclass;
1084 if (REG_P (SUBREG_REG (in)))
1086 = find_valid_class (inmode, GET_MODE (SUBREG_REG (in)),
1087 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1088 GET_MODE (SUBREG_REG (in)),
1091 REGNO (SUBREG_REG (in)));
1093 /* This relies on the fact that emit_reload_insns outputs the
1094 instructions for input reloads of type RELOAD_OTHER in the same
1095 order as the reloads. Thus if the outer reload is also of type
1096 RELOAD_OTHER, we are guaranteed that this inner reload will be
1097 output before the outer reload. */
1098 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1099 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1100 dont_remove_subreg = 1;
1103 /* Similarly for paradoxical and problematical SUBREGs on the output.
1104 Note that there is no reason we need worry about the previous value
1105 of SUBREG_REG (out); even if wider than out,
1106 storing in a subreg is entitled to clobber it all
1107 (except in the case of STRICT_LOW_PART,
1108 and in that case the constraint should label it input-output.) */
1109 if (out != 0 && GET_CODE (out) == SUBREG
1110 && (subreg_lowpart_p (out) || strict_low)
1111 #ifdef CANNOT_CHANGE_MODE_CLASS
1112 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, rclass)
1114 && (CONSTANT_P (SUBREG_REG (out))
1116 || (((REG_P (SUBREG_REG (out))
1117 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1118 || MEM_P (SUBREG_REG (out)))
1119 && ((GET_MODE_SIZE (outmode)
1120 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1121 #ifdef WORD_REGISTER_OPERATIONS
1122 || ((GET_MODE_SIZE (outmode)
1123 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1124 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1125 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1129 || (REG_P (SUBREG_REG (out))
1130 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1131 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1132 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1134 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1136 != (int) hard_regno_nregs[REGNO (SUBREG_REG (out))]
1137 [GET_MODE (SUBREG_REG (out))]))
1138 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1139 || (secondary_reload_class (0, rclass, outmode, out) != NO_REGS
1140 && (secondary_reload_class (0, rclass, GET_MODE (SUBREG_REG (out)),
1143 #ifdef CANNOT_CHANGE_MODE_CLASS
1144 || (REG_P (SUBREG_REG (out))
1145 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1146 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1147 GET_MODE (SUBREG_REG (out)),
1152 out_subreg_loc = outloc;
1153 outloc = &SUBREG_REG (out);
1155 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1156 gcc_assert (!MEM_P (out)
1157 || GET_MODE_SIZE (GET_MODE (out))
1158 <= GET_MODE_SIZE (outmode));
1160 outmode = GET_MODE (out);
1163 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1164 either M1 is not valid for R or M2 is wider than a word but we only
1165 need one word to store an M2-sized quantity in R.
1167 However, we must reload the inner reg *as well as* the subreg in
1168 that case. In this case, the inner reg is an in-out reload. */
1170 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1172 /* This relies on the fact that emit_reload_insns outputs the
1173 instructions for output reloads of type RELOAD_OTHER in reverse
1174 order of the reloads. Thus if the outer reload is also of type
1175 RELOAD_OTHER, we are guaranteed that this inner reload will be
1176 output after the outer reload. */
1177 dont_remove_subreg = 1;
1178 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1180 find_valid_class (outmode, GET_MODE (SUBREG_REG (out)),
1181 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1182 GET_MODE (SUBREG_REG (out)),
1185 REGNO (SUBREG_REG (out))),
1186 VOIDmode, VOIDmode, 0, 0,
1187 opnum, RELOAD_OTHER);
1190 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1191 if (in != 0 && out != 0 && MEM_P (out)
1192 && (REG_P (in) || MEM_P (in) || GET_CODE (in) == PLUS)
1193 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1196 /* If IN is a SUBREG of a hard register, make a new REG. This
1197 simplifies some of the cases below. */
1199 if (in != 0 && GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))
1200 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1201 && ! dont_remove_subreg)
1202 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1204 /* Similarly for OUT. */
1205 if (out != 0 && GET_CODE (out) == SUBREG
1206 && REG_P (SUBREG_REG (out))
1207 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1208 && ! dont_remove_subreg)
1209 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1211 /* Narrow down the class of register wanted if that is
1212 desirable on this machine for efficiency. */
1214 enum reg_class preferred_class = rclass;
1217 preferred_class = PREFERRED_RELOAD_CLASS (in, rclass);
1219 /* Output reloads may need analogous treatment, different in detail. */
1220 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1222 preferred_class = PREFERRED_OUTPUT_RELOAD_CLASS (out, preferred_class);
1225 /* Discard what the target said if we cannot do it. */
1226 if (preferred_class != NO_REGS
1227 || (optional && type == RELOAD_FOR_OUTPUT))
1228 rclass = preferred_class;
1231 /* Make sure we use a class that can handle the actual pseudo
1232 inside any subreg. For example, on the 386, QImode regs
1233 can appear within SImode subregs. Although GENERAL_REGS
1234 can handle SImode, QImode needs a smaller class. */
1235 #ifdef LIMIT_RELOAD_CLASS
1237 rclass = LIMIT_RELOAD_CLASS (inmode, rclass);
1238 else if (in != 0 && GET_CODE (in) == SUBREG)
1239 rclass = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), rclass);
1242 rclass = LIMIT_RELOAD_CLASS (outmode, rclass);
1243 if (out != 0 && GET_CODE (out) == SUBREG)
1244 rclass = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), rclass);
1247 /* Verify that this class is at least possible for the mode that
1249 if (this_insn_is_asm)
1251 enum machine_mode mode;
1252 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1256 if (mode == VOIDmode)
1258 error_for_asm (this_insn, "cannot reload integer constant "
1259 "operand in %<asm%>");
1264 outmode = word_mode;
1266 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1267 if (HARD_REGNO_MODE_OK (i, mode)
1268 && in_hard_reg_set_p (reg_class_contents[(int) rclass], mode, i))
1270 if (i == FIRST_PSEUDO_REGISTER)
1272 error_for_asm (this_insn, "impossible register constraint "
1274 /* Avoid further trouble with this insn. */
1275 PATTERN (this_insn) = gen_rtx_USE (VOIDmode, const0_rtx);
1276 /* We used to continue here setting class to ALL_REGS, but it triggers
1277 sanity check on i386 for:
1278 void foo(long double d)
1282 Returning zero here ought to be safe as we take care in
1283 find_reloads to not process the reloads when instruction was
1290 /* Optional output reloads are always OK even if we have no register class,
1291 since the function of these reloads is only to have spill_reg_store etc.
1292 set, so that the storing insn can be deleted later. */
1293 gcc_assert (rclass != NO_REGS
1294 || (optional != 0 && type == RELOAD_FOR_OUTPUT));
1296 i = find_reusable_reload (&in, out, rclass, type, opnum, dont_share);
1300 /* See if we need a secondary reload register to move between CLASS
1301 and IN or CLASS and OUT. Get the icode and push any required reloads
1302 needed for each of them if so. */
1306 = push_secondary_reload (1, in, opnum, optional, rclass, inmode, type,
1307 &secondary_in_icode, NULL);
1308 if (out != 0 && GET_CODE (out) != SCRATCH)
1309 secondary_out_reload
1310 = push_secondary_reload (0, out, opnum, optional, rclass, outmode,
1311 type, &secondary_out_icode, NULL);
1313 /* We found no existing reload suitable for re-use.
1314 So add an additional reload. */
1316 #ifdef SECONDARY_MEMORY_NEEDED
1317 /* If a memory location is needed for the copy, make one. */
1320 || (GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))))
1321 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1322 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1324 get_secondary_mem (in, inmode, opnum, type);
1330 rld[i].rclass = rclass;
1331 rld[i].inmode = inmode;
1332 rld[i].outmode = outmode;
1334 rld[i].optional = optional;
1336 rld[i].nocombine = 0;
1337 rld[i].in_reg = inloc ? *inloc : 0;
1338 rld[i].out_reg = outloc ? *outloc : 0;
1339 rld[i].opnum = opnum;
1340 rld[i].when_needed = type;
1341 rld[i].secondary_in_reload = secondary_in_reload;
1342 rld[i].secondary_out_reload = secondary_out_reload;
1343 rld[i].secondary_in_icode = secondary_in_icode;
1344 rld[i].secondary_out_icode = secondary_out_icode;
1345 rld[i].secondary_p = 0;
1349 #ifdef SECONDARY_MEMORY_NEEDED
1352 || (GET_CODE (out) == SUBREG && REG_P (SUBREG_REG (out))))
1353 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1354 && SECONDARY_MEMORY_NEEDED (rclass,
1355 REGNO_REG_CLASS (reg_or_subregno (out)),
1357 get_secondary_mem (out, outmode, opnum, type);
1362 /* We are reusing an existing reload,
1363 but we may have additional information for it.
1364 For example, we may now have both IN and OUT
1365 while the old one may have just one of them. */
1367 /* The modes can be different. If they are, we want to reload in
1368 the larger mode, so that the value is valid for both modes. */
1369 if (inmode != VOIDmode
1370 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1371 rld[i].inmode = inmode;
1372 if (outmode != VOIDmode
1373 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1374 rld[i].outmode = outmode;
1377 rtx in_reg = inloc ? *inloc : 0;
1378 /* If we merge reloads for two distinct rtl expressions that
1379 are identical in content, there might be duplicate address
1380 reloads. Remove the extra set now, so that if we later find
1381 that we can inherit this reload, we can get rid of the
1382 address reloads altogether.
1384 Do not do this if both reloads are optional since the result
1385 would be an optional reload which could potentially leave
1386 unresolved address replacements.
1388 It is not sufficient to call transfer_replacements since
1389 choose_reload_regs will remove the replacements for address
1390 reloads of inherited reloads which results in the same
1392 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1393 && ! (rld[i].optional && optional))
1395 /* We must keep the address reload with the lower operand
1397 if (opnum > rld[i].opnum)
1399 remove_address_replacements (in);
1401 in_reg = rld[i].in_reg;
1404 remove_address_replacements (rld[i].in);
1406 /* When emitting reloads we don't necessarily look at the in-
1407 and outmode, but also directly at the operands (in and out).
1408 So we can't simply overwrite them with whatever we have found
1409 for this (to-be-merged) reload, we have to "merge" that too.
1410 Reusing another reload already verified that we deal with the
1411 same operands, just possibly in different modes. So we
1412 overwrite the operands only when the new mode is larger.
1413 See also PR33613. */
1415 || GET_MODE_SIZE (GET_MODE (in))
1416 > GET_MODE_SIZE (GET_MODE (rld[i].in)))
1420 && GET_MODE_SIZE (GET_MODE (in_reg))
1421 > GET_MODE_SIZE (GET_MODE (rld[i].in_reg))))
1422 rld[i].in_reg = in_reg;
1428 && GET_MODE_SIZE (GET_MODE (out))
1429 > GET_MODE_SIZE (GET_MODE (rld[i].out))))
1433 || GET_MODE_SIZE (GET_MODE (*outloc))
1434 > GET_MODE_SIZE (GET_MODE (rld[i].out_reg))))
1435 rld[i].out_reg = *outloc;
1437 if (reg_class_subset_p (rclass, rld[i].rclass))
1438 rld[i].rclass = rclass;
1439 rld[i].optional &= optional;
1440 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1441 opnum, rld[i].opnum))
1442 rld[i].when_needed = RELOAD_OTHER;
1443 rld[i].opnum = MIN (rld[i].opnum, opnum);
1446 /* If the ostensible rtx being reloaded differs from the rtx found
1447 in the location to substitute, this reload is not safe to combine
1448 because we cannot reliably tell whether it appears in the insn. */
1450 if (in != 0 && in != *inloc)
1451 rld[i].nocombine = 1;
1454 /* This was replaced by changes in find_reloads_address_1 and the new
1455 function inc_for_reload, which go with a new meaning of reload_inc. */
1457 /* If this is an IN/OUT reload in an insn that sets the CC,
1458 it must be for an autoincrement. It doesn't work to store
1459 the incremented value after the insn because that would clobber the CC.
1460 So we must do the increment of the value reloaded from,
1461 increment it, store it back, then decrement again. */
1462 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1466 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1467 /* If we did not find a nonzero amount-to-increment-by,
1468 that contradicts the belief that IN is being incremented
1469 in an address in this insn. */
1470 gcc_assert (rld[i].inc != 0);
1474 /* If we will replace IN and OUT with the reload-reg,
1475 record where they are located so that substitution need
1476 not do a tree walk. */
1478 if (replace_reloads)
1482 struct replacement *r = &replacements[n_replacements++];
1484 r->subreg_loc = in_subreg_loc;
1488 if (outloc != 0 && outloc != inloc)
1490 struct replacement *r = &replacements[n_replacements++];
1493 r->subreg_loc = out_subreg_loc;
1498 /* If this reload is just being introduced and it has both
1499 an incoming quantity and an outgoing quantity that are
1500 supposed to be made to match, see if either one of the two
1501 can serve as the place to reload into.
1503 If one of them is acceptable, set rld[i].reg_rtx
1506 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1508 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1511 earlyclobber_operand_p (out));
1513 /* If the outgoing register already contains the same value
1514 as the incoming one, we can dispense with loading it.
1515 The easiest way to tell the caller that is to give a phony
1516 value for the incoming operand (same as outgoing one). */
1517 if (rld[i].reg_rtx == out
1518 && (REG_P (in) || CONSTANT_P (in))
1519 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1520 static_reload_reg_p, i, inmode))
1524 /* If this is an input reload and the operand contains a register that
1525 dies in this insn and is used nowhere else, see if it is the right class
1526 to be used for this reload. Use it if so. (This occurs most commonly
1527 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1528 this if it is also an output reload that mentions the register unless
1529 the output is a SUBREG that clobbers an entire register.
1531 Note that the operand might be one of the spill regs, if it is a
1532 pseudo reg and we are in a block where spilling has not taken place.
1533 But if there is no spilling in this block, that is OK.
1534 An explicitly used hard reg cannot be a spill reg. */
1536 if (rld[i].reg_rtx == 0 && in != 0 && hard_regs_live_known)
1540 enum machine_mode rel_mode = inmode;
1542 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1545 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1546 if (REG_NOTE_KIND (note) == REG_DEAD
1547 && REG_P (XEXP (note, 0))
1548 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1549 && reg_mentioned_p (XEXP (note, 0), in)
1550 /* Check that a former pseudo is valid; see find_dummy_reload. */
1551 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1552 || (! bitmap_bit_p (flag_ira
1553 ? DF_LR_OUT (ENTRY_BLOCK_PTR)
1554 : DF_LIVE_OUT (ENTRY_BLOCK_PTR),
1555 ORIGINAL_REGNO (XEXP (note, 0)))
1556 && hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))] == 1))
1557 && ! refers_to_regno_for_reload_p (regno,
1558 end_hard_regno (rel_mode,
1560 PATTERN (this_insn), inloc)
1561 /* If this is also an output reload, IN cannot be used as
1562 the reload register if it is set in this insn unless IN
1564 && (out == 0 || in == out
1565 || ! hard_reg_set_here_p (regno,
1566 end_hard_regno (rel_mode, regno),
1567 PATTERN (this_insn)))
1568 /* ??? Why is this code so different from the previous?
1569 Is there any simple coherent way to describe the two together?
1570 What's going on here. */
1572 || (GET_CODE (in) == SUBREG
1573 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1575 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1576 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1577 /* Make sure the operand fits in the reg that dies. */
1578 && (GET_MODE_SIZE (rel_mode)
1579 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1580 && HARD_REGNO_MODE_OK (regno, inmode)
1581 && HARD_REGNO_MODE_OK (regno, outmode))
1584 unsigned int nregs = MAX (hard_regno_nregs[regno][inmode],
1585 hard_regno_nregs[regno][outmode]);
1587 for (offs = 0; offs < nregs; offs++)
1588 if (fixed_regs[regno + offs]
1589 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
1594 && (! (refers_to_regno_for_reload_p
1595 (regno, end_hard_regno (inmode, regno), in, (rtx *) 0))
1596 || can_reload_into (in, regno, inmode)))
1598 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1605 output_reloadnum = i;
1610 /* Record an additional place we must replace a value
1611 for which we have already recorded a reload.
1612 RELOADNUM is the value returned by push_reload
1613 when the reload was recorded.
1614 This is used in insn patterns that use match_dup. */
1617 push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1619 if (replace_reloads)
1621 struct replacement *r = &replacements[n_replacements++];
1622 r->what = reloadnum;
1629 /* Duplicate any replacement we have recorded to apply at
1630 location ORIG_LOC to also be performed at DUP_LOC.
1631 This is used in insn patterns that use match_dup. */
1634 dup_replacements (rtx *dup_loc, rtx *orig_loc)
1636 int i, n = n_replacements;
1638 for (i = 0; i < n; i++)
1640 struct replacement *r = &replacements[i];
1641 if (r->where == orig_loc)
1642 push_replacement (dup_loc, r->what, r->mode);
1646 /* Transfer all replacements that used to be in reload FROM to be in
1650 transfer_replacements (int to, int from)
1654 for (i = 0; i < n_replacements; i++)
1655 if (replacements[i].what == from)
1656 replacements[i].what = to;
1659 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1660 or a subpart of it. If we have any replacements registered for IN_RTX,
1661 cancel the reloads that were supposed to load them.
1662 Return nonzero if we canceled any reloads. */
1664 remove_address_replacements (rtx in_rtx)
1667 char reload_flags[MAX_RELOADS];
1668 int something_changed = 0;
1670 memset (reload_flags, 0, sizeof reload_flags);
1671 for (i = 0, j = 0; i < n_replacements; i++)
1673 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1674 reload_flags[replacements[i].what] |= 1;
1677 replacements[j++] = replacements[i];
1678 reload_flags[replacements[i].what] |= 2;
1681 /* Note that the following store must be done before the recursive calls. */
1684 for (i = n_reloads - 1; i >= 0; i--)
1686 if (reload_flags[i] == 1)
1688 deallocate_reload_reg (i);
1689 remove_address_replacements (rld[i].in);
1691 something_changed = 1;
1694 return something_changed;
1697 /* If there is only one output reload, and it is not for an earlyclobber
1698 operand, try to combine it with a (logically unrelated) input reload
1699 to reduce the number of reload registers needed.
1701 This is safe if the input reload does not appear in
1702 the value being output-reloaded, because this implies
1703 it is not needed any more once the original insn completes.
1705 If that doesn't work, see we can use any of the registers that
1706 die in this insn as a reload register. We can if it is of the right
1707 class and does not appear in the value being output-reloaded. */
1710 combine_reloads (void)
1713 int output_reload = -1;
1714 int secondary_out = -1;
1717 /* Find the output reload; return unless there is exactly one
1718 and that one is mandatory. */
1720 for (i = 0; i < n_reloads; i++)
1721 if (rld[i].out != 0)
1723 if (output_reload >= 0)
1728 if (output_reload < 0 || rld[output_reload].optional)
1731 /* An input-output reload isn't combinable. */
1733 if (rld[output_reload].in != 0)
1736 /* If this reload is for an earlyclobber operand, we can't do anything. */
1737 if (earlyclobber_operand_p (rld[output_reload].out))
1740 /* If there is a reload for part of the address of this operand, we would
1741 need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1742 its life to the point where doing this combine would not lower the
1743 number of spill registers needed. */
1744 for (i = 0; i < n_reloads; i++)
1745 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1746 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1747 && rld[i].opnum == rld[output_reload].opnum)
1750 /* Check each input reload; can we combine it? */
1752 for (i = 0; i < n_reloads; i++)
1753 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1754 /* Life span of this reload must not extend past main insn. */
1755 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1756 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1757 && rld[i].when_needed != RELOAD_OTHER
1758 && (CLASS_MAX_NREGS (rld[i].rclass, rld[i].inmode)
1759 == CLASS_MAX_NREGS (rld[output_reload].rclass,
1760 rld[output_reload].outmode))
1762 && rld[i].reg_rtx == 0
1763 #ifdef SECONDARY_MEMORY_NEEDED
1764 /* Don't combine two reloads with different secondary
1765 memory locations. */
1766 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1767 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1768 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1769 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1771 && (SMALL_REGISTER_CLASSES
1772 ? (rld[i].rclass == rld[output_reload].rclass)
1773 : (reg_class_subset_p (rld[i].rclass,
1774 rld[output_reload].rclass)
1775 || reg_class_subset_p (rld[output_reload].rclass,
1777 && (MATCHES (rld[i].in, rld[output_reload].out)
1778 /* Args reversed because the first arg seems to be
1779 the one that we imagine being modified
1780 while the second is the one that might be affected. */
1781 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1783 /* However, if the input is a register that appears inside
1784 the output, then we also can't share.
1785 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1786 If the same reload reg is used for both reg 69 and the
1787 result to be stored in memory, then that result
1788 will clobber the address of the memory ref. */
1789 && ! (REG_P (rld[i].in)
1790 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1791 rld[output_reload].out))))
1792 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1793 rld[i].when_needed != RELOAD_FOR_INPUT)
1794 && (reg_class_size[(int) rld[i].rclass]
1795 || SMALL_REGISTER_CLASSES)
1796 /* We will allow making things slightly worse by combining an
1797 input and an output, but no worse than that. */
1798 && (rld[i].when_needed == RELOAD_FOR_INPUT
1799 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1803 /* We have found a reload to combine with! */
1804 rld[i].out = rld[output_reload].out;
1805 rld[i].out_reg = rld[output_reload].out_reg;
1806 rld[i].outmode = rld[output_reload].outmode;
1807 /* Mark the old output reload as inoperative. */
1808 rld[output_reload].out = 0;
1809 /* The combined reload is needed for the entire insn. */
1810 rld[i].when_needed = RELOAD_OTHER;
1811 /* If the output reload had a secondary reload, copy it. */
1812 if (rld[output_reload].secondary_out_reload != -1)
1814 rld[i].secondary_out_reload
1815 = rld[output_reload].secondary_out_reload;
1816 rld[i].secondary_out_icode
1817 = rld[output_reload].secondary_out_icode;
1820 #ifdef SECONDARY_MEMORY_NEEDED
1821 /* Copy any secondary MEM. */
1822 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1823 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1824 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1826 /* If required, minimize the register class. */
1827 if (reg_class_subset_p (rld[output_reload].rclass,
1829 rld[i].rclass = rld[output_reload].rclass;
1831 /* Transfer all replacements from the old reload to the combined. */
1832 for (j = 0; j < n_replacements; j++)
1833 if (replacements[j].what == output_reload)
1834 replacements[j].what = i;
1839 /* If this insn has only one operand that is modified or written (assumed
1840 to be the first), it must be the one corresponding to this reload. It
1841 is safe to use anything that dies in this insn for that output provided
1842 that it does not occur in the output (we already know it isn't an
1843 earlyclobber. If this is an asm insn, give up. */
1845 if (INSN_CODE (this_insn) == -1)
1848 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1849 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1850 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1853 /* See if some hard register that dies in this insn and is not used in
1854 the output is the right class. Only works if the register we pick
1855 up can fully hold our output reload. */
1856 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1857 if (REG_NOTE_KIND (note) == REG_DEAD
1858 && REG_P (XEXP (note, 0))
1859 && !reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1860 rld[output_reload].out)
1861 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1862 && HARD_REGNO_MODE_OK (regno, rld[output_reload].outmode)
1863 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].rclass],
1865 && (hard_regno_nregs[regno][rld[output_reload].outmode]
1866 <= hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))])
1867 /* Ensure that a secondary or tertiary reload for this output
1868 won't want this register. */
1869 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1870 || (!(TEST_HARD_REG_BIT
1871 (reg_class_contents[(int) rld[secondary_out].rclass], regno))
1872 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1873 || !(TEST_HARD_REG_BIT
1874 (reg_class_contents[(int) rld[secondary_out].rclass],
1876 && !fixed_regs[regno]
1877 /* Check that a former pseudo is valid; see find_dummy_reload. */
1878 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1879 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR),
1880 ORIGINAL_REGNO (XEXP (note, 0)))
1881 && hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))] == 1)))
1883 rld[output_reload].reg_rtx
1884 = gen_rtx_REG (rld[output_reload].outmode, regno);
1889 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1890 See if one of IN and OUT is a register that may be used;
1891 this is desirable since a spill-register won't be needed.
1892 If so, return the register rtx that proves acceptable.
1894 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1895 RCLASS is the register class required for the reload.
1897 If FOR_REAL is >= 0, it is the number of the reload,
1898 and in some cases when it can be discovered that OUT doesn't need
1899 to be computed, clear out rld[FOR_REAL].out.
1901 If FOR_REAL is -1, this should not be done, because this call
1902 is just to see if a register can be found, not to find and install it.
1904 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1905 puts an additional constraint on being able to use IN for OUT since
1906 IN must not appear elsewhere in the insn (it is assumed that IN itself
1907 is safe from the earlyclobber). */
1910 find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1911 enum machine_mode inmode, enum machine_mode outmode,
1912 enum reg_class rclass, int for_real, int earlyclobber)
1920 /* If operands exceed a word, we can't use either of them
1921 unless they have the same size. */
1922 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1923 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1924 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1927 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1928 respectively refers to a hard register. */
1930 /* Find the inside of any subregs. */
1931 while (GET_CODE (out) == SUBREG)
1933 if (REG_P (SUBREG_REG (out))
1934 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1935 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1936 GET_MODE (SUBREG_REG (out)),
1939 out = SUBREG_REG (out);
1941 while (GET_CODE (in) == SUBREG)
1943 if (REG_P (SUBREG_REG (in))
1944 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1945 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1946 GET_MODE (SUBREG_REG (in)),
1949 in = SUBREG_REG (in);
1952 /* Narrow down the reg class, the same way push_reload will;
1953 otherwise we might find a dummy now, but push_reload won't. */
1955 enum reg_class preferred_class = PREFERRED_RELOAD_CLASS (in, rclass);
1956 if (preferred_class != NO_REGS)
1957 rclass = preferred_class;
1960 /* See if OUT will do. */
1962 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1964 unsigned int regno = REGNO (out) + out_offset;
1965 unsigned int nwords = hard_regno_nregs[regno][outmode];
1968 /* When we consider whether the insn uses OUT,
1969 ignore references within IN. They don't prevent us
1970 from copying IN into OUT, because those refs would
1971 move into the insn that reloads IN.
1973 However, we only ignore IN in its role as this reload.
1974 If the insn uses IN elsewhere and it contains OUT,
1975 that counts. We can't be sure it's the "same" operand
1976 so it might not go through this reload. */
1978 *inloc = const0_rtx;
1980 if (regno < FIRST_PSEUDO_REGISTER
1981 && HARD_REGNO_MODE_OK (regno, outmode)
1982 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1983 PATTERN (this_insn), outloc))
1987 for (i = 0; i < nwords; i++)
1988 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
1994 if (REG_P (real_out))
1997 value = gen_rtx_REG (outmode, regno);
2004 /* Consider using IN if OUT was not acceptable
2005 or if OUT dies in this insn (like the quotient in a divmod insn).
2006 We can't use IN unless it is dies in this insn,
2007 which means we must know accurately which hard regs are live.
2008 Also, the result can't go in IN if IN is used within OUT,
2009 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
2010 if (hard_regs_live_known
2012 && REGNO (in) < FIRST_PSEUDO_REGISTER
2014 || find_reg_note (this_insn, REG_UNUSED, real_out))
2015 && find_reg_note (this_insn, REG_DEAD, real_in)
2016 && !fixed_regs[REGNO (in)]
2017 && HARD_REGNO_MODE_OK (REGNO (in),
2018 /* The only case where out and real_out might
2019 have different modes is where real_out
2020 is a subreg, and in that case, out
2022 (GET_MODE (out) != VOIDmode
2023 ? GET_MODE (out) : outmode))
2024 && (ORIGINAL_REGNO (in) < FIRST_PSEUDO_REGISTER
2025 /* However only do this if we can be sure that this input
2026 operand doesn't correspond with an uninitialized pseudo.
2027 global can assign some hardreg to it that is the same as
2028 the one assigned to a different, also live pseudo (as it
2029 can ignore the conflict). We must never introduce writes
2030 to such hardregs, as they would clobber the other live
2031 pseudo. See PR 20973. */
2032 || (!bitmap_bit_p (flag_ira
2033 ? DF_LR_OUT (ENTRY_BLOCK_PTR)
2034 : DF_LIVE_OUT (ENTRY_BLOCK_PTR),
2035 ORIGINAL_REGNO (in))
2036 /* Similarly, only do this if we can be sure that the death
2037 note is still valid. global can assign some hardreg to
2038 the pseudo referenced in the note and simultaneously a
2039 subword of this hardreg to a different, also live pseudo,
2040 because only another subword of the hardreg is actually
2041 used in the insn. This cannot happen if the pseudo has
2042 been assigned exactly one hardreg. See PR 33732. */
2043 && hard_regno_nregs[REGNO (in)][GET_MODE (in)] == 1)))
2045 unsigned int regno = REGNO (in) + in_offset;
2046 unsigned int nwords = hard_regno_nregs[regno][inmode];
2048 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
2049 && ! hard_reg_set_here_p (regno, regno + nwords,
2050 PATTERN (this_insn))
2052 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
2053 PATTERN (this_insn), inloc)))
2057 for (i = 0; i < nwords; i++)
2058 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
2064 /* If we were going to use OUT as the reload reg
2065 and changed our mind, it means OUT is a dummy that
2066 dies here. So don't bother copying value to it. */
2067 if (for_real >= 0 && value == real_out)
2068 rld[for_real].out = 0;
2069 if (REG_P (real_in))
2072 value = gen_rtx_REG (inmode, regno);
2080 /* This page contains subroutines used mainly for determining
2081 whether the IN or an OUT of a reload can serve as the
2084 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2087 earlyclobber_operand_p (rtx x)
2091 for (i = 0; i < n_earlyclobbers; i++)
2092 if (reload_earlyclobbers[i] == x)
2098 /* Return 1 if expression X alters a hard reg in the range
2099 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2100 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2101 X should be the body of an instruction. */
2104 hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2106 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2108 rtx op0 = SET_DEST (x);
2110 while (GET_CODE (op0) == SUBREG)
2111 op0 = SUBREG_REG (op0);
2114 unsigned int r = REGNO (op0);
2116 /* See if this reg overlaps range under consideration. */
2118 && end_hard_regno (GET_MODE (op0), r) > beg_regno)
2122 else if (GET_CODE (x) == PARALLEL)
2124 int i = XVECLEN (x, 0) - 1;
2127 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2134 /* Return 1 if ADDR is a valid memory address for mode MODE,
2135 and check that each pseudo reg has the proper kind of
2139 strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx addr)
2141 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2148 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2149 if they are the same hard reg, and has special hacks for
2150 autoincrement and autodecrement.
2151 This is specifically intended for find_reloads to use
2152 in determining whether two operands match.
2153 X is the operand whose number is the lower of the two.
2155 The value is 2 if Y contains a pre-increment that matches
2156 a non-incrementing address in X. */
2158 /* ??? To be completely correct, we should arrange to pass
2159 for X the output operand and for Y the input operand.
2160 For now, we assume that the output operand has the lower number
2161 because that is natural in (SET output (... input ...)). */
2164 operands_match_p (rtx x, rtx y)
2167 RTX_CODE code = GET_CODE (x);
2173 if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x))))
2174 && (REG_P (y) || (GET_CODE (y) == SUBREG
2175 && REG_P (SUBREG_REG (y)))))
2181 i = REGNO (SUBREG_REG (x));
2182 if (i >= FIRST_PSEUDO_REGISTER)
2184 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2185 GET_MODE (SUBREG_REG (x)),
2192 if (GET_CODE (y) == SUBREG)
2194 j = REGNO (SUBREG_REG (y));
2195 if (j >= FIRST_PSEUDO_REGISTER)
2197 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2198 GET_MODE (SUBREG_REG (y)),
2205 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2206 multiple hard register group of scalar integer registers, so that
2207 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2209 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2210 && SCALAR_INT_MODE_P (GET_MODE (x))
2211 && i < FIRST_PSEUDO_REGISTER)
2212 i += hard_regno_nregs[i][GET_MODE (x)] - 1;
2213 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2214 && SCALAR_INT_MODE_P (GET_MODE (y))
2215 && j < FIRST_PSEUDO_REGISTER)
2216 j += hard_regno_nregs[j][GET_MODE (y)] - 1;
2220 /* If two operands must match, because they are really a single
2221 operand of an assembler insn, then two postincrements are invalid
2222 because the assembler insn would increment only once.
2223 On the other hand, a postincrement matches ordinary indexing
2224 if the postincrement is the output operand. */
2225 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2226 return operands_match_p (XEXP (x, 0), y);
2227 /* Two preincrements are invalid
2228 because the assembler insn would increment only once.
2229 On the other hand, a preincrement matches ordinary indexing
2230 if the preincrement is the input operand.
2231 In this case, return 2, since some callers need to do special
2232 things when this happens. */
2233 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2234 || GET_CODE (y) == PRE_MODIFY)
2235 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2239 /* Now we have disposed of all the cases in which different rtx codes
2241 if (code != GET_CODE (y))
2244 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2245 if (GET_MODE (x) != GET_MODE (y))
2256 return XEXP (x, 0) == XEXP (y, 0);
2258 return XSTR (x, 0) == XSTR (y, 0);
2264 /* Compare the elements. If any pair of corresponding elements
2265 fail to match, return 0 for the whole things. */
2268 fmt = GET_RTX_FORMAT (code);
2269 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2275 if (XWINT (x, i) != XWINT (y, i))
2280 if (XINT (x, i) != XINT (y, i))
2285 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2288 /* If any subexpression returns 2,
2289 we should return 2 if we are successful. */
2298 if (XVECLEN (x, i) != XVECLEN (y, i))
2300 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2302 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2310 /* It is believed that rtx's at this level will never
2311 contain anything but integers and other rtx's,
2312 except for within LABEL_REFs and SYMBOL_REFs. */
2317 return 1 + success_2;
2320 /* Describe the range of registers or memory referenced by X.
2321 If X is a register, set REG_FLAG and put the first register
2322 number into START and the last plus one into END.
2323 If X is a memory reference, put a base address into BASE
2324 and a range of integer offsets into START and END.
2325 If X is pushing on the stack, we can assume it causes no trouble,
2326 so we set the SAFE field. */
2328 static struct decomposition
2331 struct decomposition val;
2334 memset (&val, 0, sizeof (val));
2336 switch (GET_CODE (x))
2340 rtx base = NULL_RTX, offset = 0;
2341 rtx addr = XEXP (x, 0);
2343 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2344 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2346 val.base = XEXP (addr, 0);
2347 val.start = -GET_MODE_SIZE (GET_MODE (x));
2348 val.end = GET_MODE_SIZE (GET_MODE (x));
2349 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2353 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2355 if (GET_CODE (XEXP (addr, 1)) == PLUS
2356 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2357 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2359 val.base = XEXP (addr, 0);
2360 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2361 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2362 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2367 if (GET_CODE (addr) == CONST)
2369 addr = XEXP (addr, 0);
2372 if (GET_CODE (addr) == PLUS)
2374 if (CONSTANT_P (XEXP (addr, 0)))
2376 base = XEXP (addr, 1);
2377 offset = XEXP (addr, 0);
2379 else if (CONSTANT_P (XEXP (addr, 1)))
2381 base = XEXP (addr, 0);
2382 offset = XEXP (addr, 1);
2389 offset = const0_rtx;
2391 if (GET_CODE (offset) == CONST)
2392 offset = XEXP (offset, 0);
2393 if (GET_CODE (offset) == PLUS)
2395 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2397 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2398 offset = XEXP (offset, 0);
2400 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2402 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2403 offset = XEXP (offset, 1);
2407 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2408 offset = const0_rtx;
2411 else if (GET_CODE (offset) != CONST_INT)
2413 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2414 offset = const0_rtx;
2417 if (all_const && GET_CODE (base) == PLUS)
2418 base = gen_rtx_CONST (GET_MODE (base), base);
2420 gcc_assert (GET_CODE (offset) == CONST_INT);
2422 val.start = INTVAL (offset);
2423 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2430 val.start = true_regnum (x);
2431 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2433 /* A pseudo with no hard reg. */
2434 val.start = REGNO (x);
2435 val.end = val.start + 1;
2439 val.end = end_hard_regno (GET_MODE (x), val.start);
2443 if (!REG_P (SUBREG_REG (x)))
2444 /* This could be more precise, but it's good enough. */
2445 return decompose (SUBREG_REG (x));
2447 val.start = true_regnum (x);
2448 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2449 return decompose (SUBREG_REG (x));
2452 val.end = val.start + subreg_nregs (x);
2456 /* This hasn't been assigned yet, so it can't conflict yet. */
2461 gcc_assert (CONSTANT_P (x));
2468 /* Return 1 if altering Y will not modify the value of X.
2469 Y is also described by YDATA, which should be decompose (Y). */
2472 immune_p (rtx x, rtx y, struct decomposition ydata)
2474 struct decomposition xdata;
2477 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2481 gcc_assert (MEM_P (y));
2482 /* If Y is memory and X is not, Y can't affect X. */
2486 xdata = decompose (x);
2488 if (! rtx_equal_p (xdata.base, ydata.base))
2490 /* If bases are distinct symbolic constants, there is no overlap. */
2491 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2493 /* Constants and stack slots never overlap. */
2494 if (CONSTANT_P (xdata.base)
2495 && (ydata.base == frame_pointer_rtx
2496 || ydata.base == hard_frame_pointer_rtx
2497 || ydata.base == stack_pointer_rtx))
2499 if (CONSTANT_P (ydata.base)
2500 && (xdata.base == frame_pointer_rtx
2501 || xdata.base == hard_frame_pointer_rtx
2502 || xdata.base == stack_pointer_rtx))
2504 /* If either base is variable, we don't know anything. */
2508 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2511 /* Similar, but calls decompose. */
2514 safe_from_earlyclobber (rtx op, rtx clobber)
2516 struct decomposition early_data;
2518 early_data = decompose (clobber);
2519 return immune_p (op, clobber, early_data);
2522 /* Main entry point of this file: search the body of INSN
2523 for values that need reloading and record them with push_reload.
2524 REPLACE nonzero means record also where the values occur
2525 so that subst_reloads can be used.
2527 IND_LEVELS says how many levels of indirection are supported by this
2528 machine; a value of zero means that a memory reference is not a valid
2531 LIVE_KNOWN says we have valid information about which hard
2532 regs are live at each point in the program; this is true when
2533 we are called from global_alloc but false when stupid register
2534 allocation has been done.
2536 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2537 which is nonnegative if the reg has been commandeered for reloading into.
2538 It is copied into STATIC_RELOAD_REG_P and referenced from there
2539 by various subroutines.
2541 Return TRUE if some operands need to be changed, because of swapping
2542 commutative operands, reg_equiv_address substitution, or whatever. */
2545 find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2546 short *reload_reg_p)
2548 int insn_code_number;
2551 /* These start out as the constraints for the insn
2552 and they are chewed up as we consider alternatives. */
2553 const char *constraints[MAX_RECOG_OPERANDS];
2554 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2556 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2557 char pref_or_nothing[MAX_RECOG_OPERANDS];
2558 /* Nonzero for a MEM operand whose entire address needs a reload.
2559 May be -1 to indicate the entire address may or may not need a reload. */
2560 int address_reloaded[MAX_RECOG_OPERANDS];
2561 /* Nonzero for an address operand that needs to be completely reloaded.
2562 May be -1 to indicate the entire operand may or may not need a reload. */
2563 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2564 /* Value of enum reload_type to use for operand. */
2565 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2566 /* Value of enum reload_type to use within address of operand. */
2567 enum reload_type address_type[MAX_RECOG_OPERANDS];
2568 /* Save the usage of each operand. */
2569 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2570 int no_input_reloads = 0, no_output_reloads = 0;
2572 int this_alternative[MAX_RECOG_OPERANDS];
2573 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2574 char this_alternative_win[MAX_RECOG_OPERANDS];
2575 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2576 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2577 int this_alternative_matches[MAX_RECOG_OPERANDS];
2579 int goal_alternative[MAX_RECOG_OPERANDS];
2580 int this_alternative_number;
2581 int goal_alternative_number = 0;
2582 int operand_reloadnum[MAX_RECOG_OPERANDS];
2583 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2584 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2585 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2586 char goal_alternative_win[MAX_RECOG_OPERANDS];
2587 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2588 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2589 int goal_alternative_swapped;
2592 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2593 rtx substed_operand[MAX_RECOG_OPERANDS];
2594 rtx body = PATTERN (insn);
2595 rtx set = single_set (insn);
2596 int goal_earlyclobber = 0, this_earlyclobber;
2597 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2603 n_earlyclobbers = 0;
2604 replace_reloads = replace;
2605 hard_regs_live_known = live_known;
2606 static_reload_reg_p = reload_reg_p;
2608 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2609 neither are insns that SET cc0. Insns that use CC0 are not allowed
2610 to have any input reloads. */
2611 if (JUMP_P (insn) || CALL_P (insn))
2612 no_output_reloads = 1;
2615 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2616 no_input_reloads = 1;
2617 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2618 no_output_reloads = 1;
2621 #ifdef SECONDARY_MEMORY_NEEDED
2622 /* The eliminated forms of any secondary memory locations are per-insn, so
2623 clear them out here. */
2625 if (secondary_memlocs_elim_used)
2627 memset (secondary_memlocs_elim, 0,
2628 sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2629 secondary_memlocs_elim_used = 0;
2633 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2634 is cheap to move between them. If it is not, there may not be an insn
2635 to do the copy, so we may need a reload. */
2636 if (GET_CODE (body) == SET
2637 && REG_P (SET_DEST (body))
2638 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2639 && REG_P (SET_SRC (body))
2640 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2641 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2642 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2643 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2646 extract_insn (insn);
2648 noperands = reload_n_operands = recog_data.n_operands;
2649 n_alternatives = recog_data.n_alternatives;
2651 /* Just return "no reloads" if insn has no operands with constraints. */
2652 if (noperands == 0 || n_alternatives == 0)
2655 insn_code_number = INSN_CODE (insn);
2656 this_insn_is_asm = insn_code_number < 0;
2658 memcpy (operand_mode, recog_data.operand_mode,
2659 noperands * sizeof (enum machine_mode));
2660 memcpy (constraints, recog_data.constraints,
2661 noperands * sizeof (const char *));
2665 /* If we will need to know, later, whether some pair of operands
2666 are the same, we must compare them now and save the result.
2667 Reloading the base and index registers will clobber them
2668 and afterward they will fail to match. */
2670 for (i = 0; i < noperands; i++)
2676 substed_operand[i] = recog_data.operand[i];
2679 modified[i] = RELOAD_READ;
2681 /* Scan this operand's constraint to see if it is an output operand,
2682 an in-out operand, is commutative, or should match another. */
2686 p += CONSTRAINT_LEN (c, p);
2690 modified[i] = RELOAD_WRITE;
2693 modified[i] = RELOAD_READ_WRITE;
2697 /* The last operand should not be marked commutative. */
2698 gcc_assert (i != noperands - 1);
2700 /* We currently only support one commutative pair of
2701 operands. Some existing asm code currently uses more
2702 than one pair. Previously, that would usually work,
2703 but sometimes it would crash the compiler. We
2704 continue supporting that case as well as we can by
2705 silently ignoring all but the first pair. In the
2706 future we may handle it correctly. */
2707 if (commutative < 0)
2710 gcc_assert (this_insn_is_asm);
2713 /* Use of ISDIGIT is tempting here, but it may get expensive because
2714 of locale support we don't want. */
2715 case '0': case '1': case '2': case '3': case '4':
2716 case '5': case '6': case '7': case '8': case '9':
2718 c = strtoul (p - 1, &end, 10);
2721 operands_match[c][i]
2722 = operands_match_p (recog_data.operand[c],
2723 recog_data.operand[i]);
2725 /* An operand may not match itself. */
2726 gcc_assert (c != i);
2728 /* If C can be commuted with C+1, and C might need to match I,
2729 then C+1 might also need to match I. */
2730 if (commutative >= 0)
2732 if (c == commutative || c == commutative + 1)
2734 int other = c + (c == commutative ? 1 : -1);
2735 operands_match[other][i]
2736 = operands_match_p (recog_data.operand[other],
2737 recog_data.operand[i]);
2739 if (i == commutative || i == commutative + 1)
2741 int other = i + (i == commutative ? 1 : -1);
2742 operands_match[c][other]
2743 = operands_match_p (recog_data.operand[c],
2744 recog_data.operand[other]);
2746 /* Note that C is supposed to be less than I.
2747 No need to consider altering both C and I because in
2748 that case we would alter one into the other. */
2755 /* Examine each operand that is a memory reference or memory address
2756 and reload parts of the addresses into index registers.
2757 Also here any references to pseudo regs that didn't get hard regs
2758 but are equivalent to constants get replaced in the insn itself
2759 with those constants. Nobody will ever see them again.
2761 Finally, set up the preferred classes of each operand. */
2763 for (i = 0; i < noperands; i++)
2765 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2767 address_reloaded[i] = 0;
2768 address_operand_reloaded[i] = 0;
2769 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2770 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2773 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2774 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2777 if (*constraints[i] == 0)
2778 /* Ignore things like match_operator operands. */
2780 else if (constraints[i][0] == 'p'
2781 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2783 address_operand_reloaded[i]
2784 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2785 recog_data.operand[i],
2786 recog_data.operand_loc[i],
2787 i, operand_type[i], ind_levels, insn);
2789 /* If we now have a simple operand where we used to have a
2790 PLUS or MULT, re-recognize and try again. */
2791 if ((OBJECT_P (*recog_data.operand_loc[i])
2792 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2793 && (GET_CODE (recog_data.operand[i]) == MULT
2794 || GET_CODE (recog_data.operand[i]) == PLUS))
2796 INSN_CODE (insn) = -1;
2797 retval = find_reloads (insn, replace, ind_levels, live_known,
2802 recog_data.operand[i] = *recog_data.operand_loc[i];
2803 substed_operand[i] = recog_data.operand[i];
2805 /* Address operands are reloaded in their existing mode,
2806 no matter what is specified in the machine description. */
2807 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2809 else if (code == MEM)
2812 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2813 recog_data.operand_loc[i],
2814 XEXP (recog_data.operand[i], 0),
2815 &XEXP (recog_data.operand[i], 0),
2816 i, address_type[i], ind_levels, insn);
2817 recog_data.operand[i] = *recog_data.operand_loc[i];
2818 substed_operand[i] = recog_data.operand[i];
2820 else if (code == SUBREG)
2822 rtx reg = SUBREG_REG (recog_data.operand[i]);
2824 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2827 && &SET_DEST (set) == recog_data.operand_loc[i],
2829 &address_reloaded[i]);
2831 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2832 that didn't get a hard register, emit a USE with a REG_EQUAL
2833 note in front so that we might inherit a previous, possibly
2839 && (GET_MODE_SIZE (GET_MODE (reg))
2840 >= GET_MODE_SIZE (GET_MODE (op)))
2841 && reg_equiv_constant[REGNO (reg)] == 0)
2842 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2844 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2846 substed_operand[i] = recog_data.operand[i] = op;
2848 else if (code == PLUS || GET_RTX_CLASS (code) == RTX_UNARY)
2849 /* We can get a PLUS as an "operand" as a result of register
2850 elimination. See eliminate_regs and gen_reload. We handle
2851 a unary operator by reloading the operand. */
2852 substed_operand[i] = recog_data.operand[i]
2853 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2854 ind_levels, 0, insn,
2855 &address_reloaded[i]);
2856 else if (code == REG)
2858 /* This is equivalent to calling find_reloads_toplev.
2859 The code is duplicated for speed.
2860 When we find a pseudo always equivalent to a constant,
2861 we replace it by the constant. We must be sure, however,
2862 that we don't try to replace it in the insn in which it
2864 int regno = REGNO (recog_data.operand[i]);
2865 if (reg_equiv_constant[regno] != 0
2866 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2868 /* Record the existing mode so that the check if constants are
2869 allowed will work when operand_mode isn't specified. */
2871 if (operand_mode[i] == VOIDmode)
2872 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2874 substed_operand[i] = recog_data.operand[i]
2875 = reg_equiv_constant[regno];
2877 if (reg_equiv_memory_loc[regno] != 0
2878 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2879 /* We need not give a valid is_set_dest argument since the case
2880 of a constant equivalence was checked above. */
2881 substed_operand[i] = recog_data.operand[i]
2882 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2883 ind_levels, 0, insn,
2884 &address_reloaded[i]);
2886 /* If the operand is still a register (we didn't replace it with an
2887 equivalent), get the preferred class to reload it into. */
2888 code = GET_CODE (recog_data.operand[i]);
2890 = ((code == REG && REGNO (recog_data.operand[i])
2891 >= FIRST_PSEUDO_REGISTER)
2892 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2896 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2897 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2900 /* If this is simply a copy from operand 1 to operand 0, merge the
2901 preferred classes for the operands. */
2902 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2903 && recog_data.operand[1] == SET_SRC (set))
2905 preferred_class[0] = preferred_class[1]
2906 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2907 pref_or_nothing[0] |= pref_or_nothing[1];
2908 pref_or_nothing[1] |= pref_or_nothing[0];
2911 /* Now see what we need for pseudo-regs that didn't get hard regs
2912 or got the wrong kind of hard reg. For this, we must consider
2913 all the operands together against the register constraints. */
2915 best = MAX_RECOG_OPERANDS * 2 + 600;
2918 goal_alternative_swapped = 0;
2921 /* The constraints are made of several alternatives.
2922 Each operand's constraint looks like foo,bar,... with commas
2923 separating the alternatives. The first alternatives for all
2924 operands go together, the second alternatives go together, etc.
2926 First loop over alternatives. */
2928 for (this_alternative_number = 0;
2929 this_alternative_number < n_alternatives;
2930 this_alternative_number++)
2932 /* Loop over operands for one constraint alternative. */
2933 /* LOSERS counts those that don't fit this alternative
2934 and would require loading. */
2936 /* BAD is set to 1 if it some operand can't fit this alternative
2937 even after reloading. */
2939 /* REJECT is a count of how undesirable this alternative says it is
2940 if any reloading is required. If the alternative matches exactly
2941 then REJECT is ignored, but otherwise it gets this much
2942 counted against it in addition to the reloading needed. Each
2943 ? counts three times here since we want the disparaging caused by
2944 a bad register class to only count 1/3 as much. */
2947 if (!recog_data.alternative_enabled_p[this_alternative_number])
2951 for (i = 0; i < recog_data.n_operands; i++)
2952 constraints[i] = skip_alternative (constraints[i]);
2957 this_earlyclobber = 0;
2959 for (i = 0; i < noperands; i++)
2961 const char *p = constraints[i];
2966 /* 0 => this operand can be reloaded somehow for this alternative. */
2968 /* 0 => this operand can be reloaded if the alternative allows regs. */
2972 rtx operand = recog_data.operand[i];
2974 /* Nonzero means this is a MEM that must be reloaded into a reg
2975 regardless of what the constraint says. */
2976 int force_reload = 0;
2978 /* Nonzero if a constant forced into memory would be OK for this
2981 int earlyclobber = 0;
2983 /* If the predicate accepts a unary operator, it means that
2984 we need to reload the operand, but do not do this for
2985 match_operator and friends. */
2986 if (UNARY_P (operand) && *p != 0)
2987 operand = XEXP (operand, 0);
2989 /* If the operand is a SUBREG, extract
2990 the REG or MEM (or maybe even a constant) within.
2991 (Constants can occur as a result of reg_equiv_constant.) */
2993 while (GET_CODE (operand) == SUBREG)
2995 /* Offset only matters when operand is a REG and
2996 it is a hard reg. This is because it is passed
2997 to reg_fits_class_p if it is a REG and all pseudos
2998 return 0 from that function. */
2999 if (REG_P (SUBREG_REG (operand))
3000 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
3002 if (!subreg_offset_representable_p
3003 (REGNO (SUBREG_REG (operand)),
3004 GET_MODE (SUBREG_REG (operand)),
3005 SUBREG_BYTE (operand),
3006 GET_MODE (operand)))
3008 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
3009 GET_MODE (SUBREG_REG (operand)),
3010 SUBREG_BYTE (operand),
3011 GET_MODE (operand));
3013 operand = SUBREG_REG (operand);
3014 /* Force reload if this is a constant or PLUS or if there may
3015 be a problem accessing OPERAND in the outer mode. */
3016 if (CONSTANT_P (operand)
3017 || GET_CODE (operand) == PLUS
3018 /* We must force a reload of paradoxical SUBREGs
3019 of a MEM because the alignment of the inner value
3020 may not be enough to do the outer reference. On
3021 big-endian machines, it may also reference outside
3024 On machines that extend byte operations and we have a
3025 SUBREG where both the inner and outer modes are no wider
3026 than a word and the inner mode is narrower, is integral,
3027 and gets extended when loaded from memory, combine.c has
3028 made assumptions about the behavior of the machine in such
3029 register access. If the data is, in fact, in memory we
3030 must always load using the size assumed to be in the
3031 register and let the insn do the different-sized
3034 This is doubly true if WORD_REGISTER_OPERATIONS. In
3035 this case eliminate_regs has left non-paradoxical
3036 subregs for push_reload to see. Make sure it does
3037 by forcing the reload.
3039 ??? When is it right at this stage to have a subreg
3040 of a mem that is _not_ to be handled specially? IMO
3041 those should have been reduced to just a mem. */
3042 || ((MEM_P (operand)
3044 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3045 #ifndef WORD_REGISTER_OPERATIONS
3046 && (((GET_MODE_BITSIZE (GET_MODE (operand))
3047 < BIGGEST_ALIGNMENT)
3048 && (GET_MODE_SIZE (operand_mode[i])
3049 > GET_MODE_SIZE (GET_MODE (operand))))
3051 #ifdef LOAD_EXTEND_OP
3052 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3053 && (GET_MODE_SIZE (GET_MODE (operand))
3055 && (GET_MODE_SIZE (operand_mode[i])
3056 > GET_MODE_SIZE (GET_MODE (operand)))
3057 && INTEGRAL_MODE_P (GET_MODE (operand))
3058 && LOAD_EXTEND_OP (GET_MODE (operand)) != UNKNOWN)
3067 this_alternative[i] = (int) NO_REGS;
3068 this_alternative_win[i] = 0;
3069 this_alternative_match_win[i] = 0;
3070 this_alternative_offmemok[i] = 0;
3071 this_alternative_earlyclobber[i] = 0;
3072 this_alternative_matches[i] = -1;
3074 /* An empty constraint or empty alternative
3075 allows anything which matched the pattern. */
3076 if (*p == 0 || *p == ',')
3079 /* Scan this alternative's specs for this operand;
3080 set WIN if the operand fits any letter in this alternative.
3081 Otherwise, clear BADOP if this operand could
3082 fit some letter after reloads,
3083 or set WINREG if this operand could fit after reloads
3084 provided the constraint allows some registers. */
3087 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
3096 case '=': case '+': case '*':
3100 /* We only support one commutative marker, the first
3101 one. We already set commutative above. */
3113 /* Ignore rest of this alternative as far as
3114 reloading is concerned. */
3117 while (*p && *p != ',');
3121 case '0': case '1': case '2': case '3': case '4':
3122 case '5': case '6': case '7': case '8': case '9':
3123 m = strtoul (p, &end, 10);
3127 this_alternative_matches[i] = m;
3128 /* We are supposed to match a previous operand.
3129 If we do, we win if that one did.
3130 If we do not, count both of the operands as losers.
3131 (This is too conservative, since most of the time
3132 only a single reload insn will be needed to make
3133 the two operands win. As a result, this alternative
3134 may be rejected when it is actually desirable.) */
3135 if ((swapped && (m != commutative || i != commutative + 1))
3136 /* If we are matching as if two operands were swapped,
3137 also pretend that operands_match had been computed
3139 But if I is the second of those and C is the first,
3140 don't exchange them, because operands_match is valid
3141 only on one side of its diagonal. */
3143 [(m == commutative || m == commutative + 1)
3144 ? 2 * commutative + 1 - m : m]
3145 [(i == commutative || i == commutative + 1)
3146 ? 2 * commutative + 1 - i : i])
3147 : operands_match[m][i])
3149 /* If we are matching a non-offsettable address where an
3150 offsettable address was expected, then we must reject
3151 this combination, because we can't reload it. */
3152 if (this_alternative_offmemok[m]
3153 && MEM_P (recog_data.operand[m])
3154 && this_alternative[m] == (int) NO_REGS
3155 && ! this_alternative_win[m])
3158 did_match = this_alternative_win[m];
3162 /* Operands don't match. */
3165 /* Retroactively mark the operand we had to match
3166 as a loser, if it wasn't already. */
3167 if (this_alternative_win[m])
3169 this_alternative_win[m] = 0;
3170 if (this_alternative[m] == (int) NO_REGS)
3172 /* But count the pair only once in the total badness of
3173 this alternative, if the pair can be a dummy reload.
3174 The pointers in operand_loc are not swapped; swap
3175 them by hand if necessary. */
3176 if (swapped && i == commutative)
3177 loc1 = commutative + 1;
3178 else if (swapped && i == commutative + 1)
3182 if (swapped && m == commutative)
3183 loc2 = commutative + 1;
3184 else if (swapped && m == commutative + 1)
3189 = find_dummy_reload (recog_data.operand[i],
3190 recog_data.operand[m],
3191 recog_data.operand_loc[loc1],
3192 recog_data.operand_loc[loc2],
3193 operand_mode[i], operand_mode[m],
3194 this_alternative[m], -1,
3195 this_alternative_earlyclobber[m]);
3200 /* This can be fixed with reloads if the operand
3201 we are supposed to match can be fixed with reloads. */
3203 this_alternative[i] = this_alternative[m];
3205 /* If we have to reload this operand and some previous
3206 operand also had to match the same thing as this
3207 operand, we don't know how to do that. So reject this
3209 if (! did_match || force_reload)
3210 for (j = 0; j < i; j++)
3211 if (this_alternative_matches[j]
3212 == this_alternative_matches[i])
3217 /* All necessary reloads for an address_operand
3218 were handled in find_reloads_address. */
3220 = (int) base_reg_class (VOIDmode, ADDRESS, SCRATCH);
3225 case TARGET_MEM_CONSTRAINT:
3230 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3231 && reg_renumber[REGNO (operand)] < 0))
3233 if (CONST_POOL_OK_P (operand))
3240 && ! address_reloaded[i]
3241 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3242 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3248 && ! address_reloaded[i]
3249 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3250 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3254 /* Memory operand whose address is not offsettable. */
3259 && ! (ind_levels ? offsettable_memref_p (operand)
3260 : offsettable_nonstrict_memref_p (operand))
3261 /* Certain mem addresses will become offsettable
3262 after they themselves are reloaded. This is important;
3263 we don't want our own handling of unoffsettables
3264 to override the handling of reg_equiv_address. */
3265 && !(REG_P (XEXP (operand, 0))
3267 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3271 /* Memory operand whose address is offsettable. */
3275 if ((MEM_P (operand)
3276 /* If IND_LEVELS, find_reloads_address won't reload a
3277 pseudo that didn't get a hard reg, so we have to
3278 reject that case. */
3279 && ((ind_levels ? offsettable_memref_p (operand)
3280 : offsettable_nonstrict_memref_p (operand))
3281 /* A reloaded address is offsettable because it is now
3282 just a simple register indirect. */
3283 || address_reloaded[i] == 1))
3285 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3286 && reg_renumber[REGNO (operand)] < 0
3287 /* If reg_equiv_address is nonzero, we will be
3288 loading it into a register; hence it will be
3289 offsettable, but we cannot say that reg_equiv_mem
3290 is offsettable without checking. */
3291 && ((reg_equiv_mem[REGNO (operand)] != 0
3292 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3293 || (reg_equiv_address[REGNO (operand)] != 0))))
3295 if (CONST_POOL_OK_P (operand)
3303 /* Output operand that is stored before the need for the
3304 input operands (and their index registers) is over. */
3305 earlyclobber = 1, this_earlyclobber = 1;
3310 if (GET_CODE (operand) == CONST_DOUBLE
3311 || (GET_CODE (operand) == CONST_VECTOR
3312 && (GET_MODE_CLASS (GET_MODE (operand))
3313 == MODE_VECTOR_FLOAT)))
3319 if (GET_CODE (operand) == CONST_DOUBLE
3320 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3325 if (GET_CODE (operand) == CONST_INT
3326 || (GET_CODE (operand) == CONST_DOUBLE
3327 && GET_MODE (operand) == VOIDmode))
3330 if (CONSTANT_P (operand)
3331 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)))
3336 if (GET_CODE (operand) == CONST_INT
3337 || (GET_CODE (operand) == CONST_DOUBLE
3338 && GET_MODE (operand) == VOIDmode))
3350 if (GET_CODE (operand) == CONST_INT
3351 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3362 /* A PLUS is never a valid operand, but reload can make
3363 it from a register when eliminating registers. */
3364 && GET_CODE (operand) != PLUS
3365 /* A SCRATCH is not a valid operand. */
3366 && GET_CODE (operand) != SCRATCH
3367 && (! CONSTANT_P (operand)
3369 || LEGITIMATE_PIC_OPERAND_P (operand))
3370 && (GENERAL_REGS == ALL_REGS
3372 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3373 && reg_renumber[REGNO (operand)] < 0)))
3375 /* Drop through into 'r' case. */
3379 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3383 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3385 #ifdef EXTRA_CONSTRAINT_STR
3386 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3390 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3392 /* If the address was already reloaded,
3394 else if (MEM_P (operand)
3395 && address_reloaded[i] == 1)
3397 /* Likewise if the address will be reloaded because
3398 reg_equiv_address is nonzero. For reg_equiv_mem
3399 we have to check. */
3400 else if (REG_P (operand)
3401 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3402 && reg_renumber[REGNO (operand)] < 0
3403 && ((reg_equiv_mem[REGNO (operand)] != 0
3404 && EXTRA_CONSTRAINT_STR (reg_equiv_mem[REGNO (operand)], c, p))
3405 || (reg_equiv_address[REGNO (operand)] != 0)))
3408 /* If we didn't already win, we can reload
3409 constants via force_const_mem, and other
3410 MEMs by reloading the address like for 'o'. */
3411 if (CONST_POOL_OK_P (operand)
3418 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3420 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3423 /* If we didn't already win, we can reload
3424 the address into a base register. */
3426 = (int) base_reg_class (VOIDmode, ADDRESS, SCRATCH);
3431 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3438 = (int) (reg_class_subunion
3439 [this_alternative[i]]
3440 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3442 if (GET_MODE (operand) == BLKmode)
3446 && reg_fits_class_p (operand, this_alternative[i],
3447 offset, GET_MODE (recog_data.operand[i])))
3451 while ((p += len), c);
3455 /* If this operand could be handled with a reg,
3456 and some reg is allowed, then this operand can be handled. */
3457 if (winreg && this_alternative[i] != (int) NO_REGS)
3460 /* Record which operands fit this alternative. */
3461 this_alternative_earlyclobber[i] = earlyclobber;
3462 if (win && ! force_reload)
3463 this_alternative_win[i] = 1;
3464 else if (did_match && ! force_reload)
3465 this_alternative_match_win[i] = 1;
3468 int const_to_mem = 0;
3470 this_alternative_offmemok[i] = offmemok;
3474 /* Alternative loses if it has no regs for a reg operand. */
3476 && this_alternative[i] == (int) NO_REGS
3477 && this_alternative_matches[i] < 0)
3480 /* If this is a constant that is reloaded into the desired
3481 class by copying it to memory first, count that as another
3482 reload. This is consistent with other code and is
3483 required to avoid choosing another alternative when
3484 the constant is moved into memory by this function on
3485 an early reload pass. Note that the test here is
3486 precisely the same as in the code below that calls
3488 if (CONST_POOL_OK_P (operand)
3489 && ((PREFERRED_RELOAD_CLASS (operand,
3490 (enum reg_class) this_alternative[i])
3492 || no_input_reloads)
3493 && operand_mode[i] != VOIDmode)
3496 if (this_alternative[i] != (int) NO_REGS)
3500 /* Alternative loses if it requires a type of reload not
3501 permitted for this insn. We can always reload SCRATCH
3502 and objects with a REG_UNUSED note. */
3503 if (GET_CODE (operand) != SCRATCH
3504 && modified[i] != RELOAD_READ && no_output_reloads
3505 && ! find_reg_note (insn, REG_UNUSED, operand))
3507 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3511 /* If we can't reload this value at all, reject this
3512 alternative. Note that we could also lose due to
3513 LIMIT_RELOAD_CLASS, but we don't check that
3516 if (! CONSTANT_P (operand)
3517 && (enum reg_class) this_alternative[i] != NO_REGS)
3519 if (PREFERRED_RELOAD_CLASS
3520 (operand, (enum reg_class) this_alternative[i])
3524 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
3525 if (operand_type[i] == RELOAD_FOR_OUTPUT
3526 && PREFERRED_OUTPUT_RELOAD_CLASS
3527 (operand, (enum reg_class) this_alternative[i])
3533 /* We prefer to reload pseudos over reloading other things,
3534 since such reloads may be able to be eliminated later.
3535 If we are reloading a SCRATCH, we won't be generating any
3536 insns, just using a register, so it is also preferred.
3537 So bump REJECT in other cases. Don't do this in the
3538 case where we are forcing a constant into memory and
3539 it will then win since we don't want to have a different
3540 alternative match then. */
3541 if (! (REG_P (operand)
3542 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3543 && GET_CODE (operand) != SCRATCH
3544 && ! (const_to_mem && constmemok))
3547 /* Input reloads can be inherited more often than output
3548 reloads can be removed, so penalize output reloads. */
3549 if (operand_type[i] != RELOAD_FOR_INPUT
3550 && GET_CODE (operand) != SCRATCH)
3554 /* If this operand is a pseudo register that didn't get a hard
3555 reg and this alternative accepts some register, see if the
3556 class that we want is a subset of the preferred class for this
3557 register. If not, but it intersects that class, use the
3558 preferred class instead. If it does not intersect the preferred
3559 class, show that usage of this alternative should be discouraged;
3560 it will be discouraged more still if the register is `preferred
3561 or nothing'. We do this because it increases the chance of
3562 reusing our spill register in a later insn and avoiding a pair
3563 of memory stores and loads.
3565 Don't bother with this if this alternative will accept this
3568 Don't do this for a multiword operand, since it is only a
3569 small win and has the risk of requiring more spill registers,
3570 which could cause a large loss.
3572 Don't do this if the preferred class has only one register
3573 because we might otherwise exhaust the class. */
3575 if (! win && ! did_match
3576 && this_alternative[i] != (int) NO_REGS
3577 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3578 && reg_class_size [(int) preferred_class[i]] > 0
3579 && ! SMALL_REGISTER_CLASS_P (preferred_class[i]))
3581 if (! reg_class_subset_p (this_alternative[i],
3582 preferred_class[i]))
3584 /* Since we don't have a way of forming the intersection,
3585 we just do something special if the preferred class
3586 is a subset of the class we have; that's the most
3587 common case anyway. */
3588 if (reg_class_subset_p (preferred_class[i],
3589 this_alternative[i]))
3590 this_alternative[i] = (int) preferred_class[i];
3592 reject += (2 + 2 * pref_or_nothing[i]);
3597 /* Now see if any output operands that are marked "earlyclobber"
3598 in this alternative conflict with any input operands
3599 or any memory addresses. */
3601 for (i = 0; i < noperands; i++)
3602 if (this_alternative_earlyclobber[i]
3603 && (this_alternative_win[i] || this_alternative_match_win[i]))
3605 struct decomposition early_data;
3607 early_data = decompose (recog_data.operand[i]);
3609 gcc_assert (modified[i] != RELOAD_READ);
3611 if (this_alternative[i] == NO_REGS)
3613 this_alternative_earlyclobber[i] = 0;
3614 gcc_assert (this_insn_is_asm);
3615 error_for_asm (this_insn,
3616 "%<&%> constraint used with no register class");
3619 for (j = 0; j < noperands; j++)
3620 /* Is this an input operand or a memory ref? */
3621 if ((MEM_P (recog_data.operand[j])
3622 || modified[j] != RELOAD_WRITE)
3624 /* Ignore things like match_operator operands. */
3625 && *recog_data.constraints[j] != 0
3626 /* Don't count an input operand that is constrained to match
3627 the early clobber operand. */
3628 && ! (this_alternative_matches[j] == i
3629 && rtx_equal_p (recog_data.operand[i],
3630 recog_data.operand[j]))
3631 /* Is it altered by storing the earlyclobber operand? */
3632 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3635 /* If the output is in a non-empty few-regs class,
3636 it's costly to reload it, so reload the input instead. */
3637 if (SMALL_REGISTER_CLASS_P (this_alternative[i])
3638 && (REG_P (recog_data.operand[j])
3639 || GET_CODE (recog_data.operand[j]) == SUBREG))
3642 this_alternative_win[j] = 0;
3643 this_alternative_match_win[j] = 0;
3648 /* If an earlyclobber operand conflicts with something,
3649 it must be reloaded, so request this and count the cost. */
3653 this_alternative_win[i] = 0;
3654 this_alternative_match_win[j] = 0;
3655 for (j = 0; j < noperands; j++)
3656 if (this_alternative_matches[j] == i
3657 && this_alternative_match_win[j])
3659 this_alternative_win[j] = 0;
3660 this_alternative_match_win[j] = 0;
3666 /* If one alternative accepts all the operands, no reload required,
3667 choose that alternative; don't consider the remaining ones. */
3670 /* Unswap these so that they are never swapped at `finish'. */
3671 if (commutative >= 0)
3673 recog_data.operand[commutative] = substed_operand[commutative];
3674 recog_data.operand[commutative + 1]
3675 = substed_operand[commutative + 1];
3677 for (i = 0; i < noperands; i++)
3679 goal_alternative_win[i] = this_alternative_win[i];
3680 goal_alternative_match_win[i] = this_alternative_match_win[i];
3681 goal_alternative[i] = this_alternative[i];
3682 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3683 goal_alternative_matches[i] = this_alternative_matches[i];
3684 goal_alternative_earlyclobber[i]
3685 = this_alternative_earlyclobber[i];
3687 goal_alternative_number = this_alternative_number;
3688 goal_alternative_swapped = swapped;
3689 goal_earlyclobber = this_earlyclobber;
3693 /* REJECT, set by the ! and ? constraint characters and when a register
3694 would be reloaded into a non-preferred class, discourages the use of
3695 this alternative for a reload goal. REJECT is incremented by six
3696 for each ? and two for each non-preferred class. */
3697 losers = losers * 6 + reject;
3699 /* If this alternative can be made to work by reloading,
3700 and it needs less reloading than the others checked so far,
3701 record it as the chosen goal for reloading. */
3702 if (! bad && best > losers)
3704 for (i = 0; i < noperands; i++)
3706 goal_alternative[i] = this_alternative[i];
3707 goal_alternative_win[i] = this_alternative_win[i];
3708 goal_alternative_match_win[i] = this_alternative_match_win[i];
3709 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3710 goal_alternative_matches[i] = this_alternative_matches[i];
3711 goal_alternative_earlyclobber[i]
3712 = this_alternative_earlyclobber[i];
3714 goal_alternative_swapped = swapped;
3716 goal_alternative_number = this_alternative_number;
3717 goal_earlyclobber = this_earlyclobber;
3721 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3722 then we need to try each alternative twice,
3723 the second time matching those two operands
3724 as if we had exchanged them.
3725 To do this, really exchange them in operands.
3727 If we have just tried the alternatives the second time,
3728 return operands to normal and drop through. */
3730 if (commutative >= 0)
3735 enum reg_class tclass;
3738 recog_data.operand[commutative] = substed_operand[commutative + 1];
3739 recog_data.operand[commutative + 1] = substed_operand[commutative];
3740 /* Swap the duplicates too. */
3741 for (i = 0; i < recog_data.n_dups; i++)
3742 if (recog_data.dup_num[i] == commutative
3743 || recog_data.dup_num[i] == commutative + 1)
3744 *recog_data.dup_loc[i]
3745 = recog_data.operand[(int) recog_data.dup_num[i]];
3747 tclass = preferred_class[commutative];
3748 preferred_class[commutative] = preferred_class[commutative + 1];
3749 preferred_class[commutative + 1] = tclass;
3751 t = pref_or_nothing[commutative];
3752 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3753 pref_or_nothing[commutative + 1] = t;
3755 t = address_reloaded[commutative];
3756 address_reloaded[commutative] = address_reloaded[commutative + 1];
3757 address_reloaded[commutative + 1] = t;
3759 memcpy (constraints, recog_data.constraints,
3760 noperands * sizeof (const char *));
3765 recog_data.operand[commutative] = substed_operand[commutative];
3766 recog_data.operand[commutative + 1]
3767 = substed_operand[commutative + 1];
3768 /* Unswap the duplicates too. */
3769 for (i = 0; i < recog_data.n_dups; i++)
3770 if (recog_data.dup_num[i] == commutative
3771 || recog_data.dup_num[i] == commutative + 1)
3772 *recog_data.dup_loc[i]
3773 = recog_data.operand[(int) recog_data.dup_num[i]];
3777 /* The operands don't meet the constraints.
3778 goal_alternative describes the alternative
3779 that we could reach by reloading the fewest operands.
3780 Reload so as to fit it. */
3782 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3784 /* No alternative works with reloads?? */
3785 if (insn_code_number >= 0)
3786 fatal_insn ("unable to generate reloads for:", insn);
3787 error_for_asm (insn, "inconsistent operand constraints in an %<asm%>");
3788 /* Avoid further trouble with this insn. */
3789 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3794 /* Jump to `finish' from above if all operands are valid already.
3795 In that case, goal_alternative_win is all 1. */
3798 /* Right now, for any pair of operands I and J that are required to match,
3800 goal_alternative_matches[J] is I.
3801 Set up goal_alternative_matched as the inverse function:
3802 goal_alternative_matched[I] = J. */
3804 for (i = 0; i < noperands; i++)
3805 goal_alternative_matched[i] = -1;
3807 for (i = 0; i < noperands; i++)
3808 if (! goal_alternative_win[i]
3809 && goal_alternative_matches[i] >= 0)
3810 goal_alternative_matched[goal_alternative_matches[i]] = i;
3812 for (i = 0; i < noperands; i++)
3813 goal_alternative_win[i] |= goal_alternative_match_win[i];
3815 /* If the best alternative is with operands 1 and 2 swapped,
3816 consider them swapped before reporting the reloads. Update the
3817 operand numbers of any reloads already pushed. */
3819 if (goal_alternative_swapped)
3823 tem = substed_operand[commutative];
3824 substed_operand[commutative] = substed_operand[commutative + 1];
3825 substed_operand[commutative + 1] = tem;
3826 tem = recog_data.operand[commutative];
3827 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3828 recog_data.operand[commutative + 1] = tem;
3829 tem = *recog_data.operand_loc[commutative];
3830 *recog_data.operand_loc[commutative]
3831 = *recog_data.operand_loc[commutative + 1];
3832 *recog_data.operand_loc[commutative + 1] = tem;
3834 for (i = 0; i < n_reloads; i++)
3836 if (rld[i].opnum == commutative)
3837 rld[i].opnum = commutative + 1;
3838 else if (rld[i].opnum == commutative + 1)
3839 rld[i].opnum = commutative;
3843 for (i = 0; i < noperands; i++)
3845 operand_reloadnum[i] = -1;
3847 /* If this is an earlyclobber operand, we need to widen the scope.
3848 The reload must remain valid from the start of the insn being
3849 reloaded until after the operand is stored into its destination.
3850 We approximate this with RELOAD_OTHER even though we know that we
3851 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3853 One special case that is worth checking is when we have an
3854 output that is earlyclobber but isn't used past the insn (typically
3855 a SCRATCH). In this case, we only need have the reload live
3856 through the insn itself, but not for any of our input or output
3858 But we must not accidentally narrow the scope of an existing
3859 RELOAD_OTHER reload - leave these alone.
3861 In any case, anything needed to address this operand can remain
3862 however they were previously categorized. */
3864 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3866 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3867 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3870 /* Any constants that aren't allowed and can't be reloaded
3871 into registers are here changed into memory references. */
3872 for (i = 0; i < noperands; i++)
3873 if (! goal_alternative_win[i])
3875 rtx op = recog_data.operand[i];
3876 rtx subreg = NULL_RTX;
3877 rtx plus = NULL_RTX;
3878 enum machine_mode mode = operand_mode[i];
3880 /* Reloads of SUBREGs of CONSTANT RTXs are handled later in
3881 push_reload so we have to let them pass here. */
3882 if (GET_CODE (op) == SUBREG)
3885 op = SUBREG_REG (op);
3886 mode = GET_MODE (op);
3889 if (GET_CODE (op) == PLUS)
3895 if (CONST_POOL_OK_P (op)
3896 && ((PREFERRED_RELOAD_CLASS (op,
3897 (enum reg_class) goal_alternative[i])
3899 || no_input_reloads)
3900 && mode != VOIDmode)
3902 int this_address_reloaded;
3903 rtx tem = force_const_mem (mode, op);
3905 /* If we stripped a SUBREG or a PLUS above add it back. */
3906 if (plus != NULL_RTX)
3907 tem = gen_rtx_PLUS (mode, XEXP (plus, 0), tem);
3909 if (subreg != NULL_RTX)
3910 tem = gen_rtx_SUBREG (operand_mode[i], tem, SUBREG_BYTE (subreg));
3912 this_address_reloaded = 0;
3913 substed_operand[i] = recog_data.operand[i]
3914 = find_reloads_toplev (tem, i, address_type[i], ind_levels,
3915 0, insn, &this_address_reloaded);
3917 /* If the alternative accepts constant pool refs directly
3918 there will be no reload needed at all. */
3919 if (plus == NULL_RTX
3920 && subreg == NULL_RTX
3921 && alternative_allows_const_pool_ref (this_address_reloaded == 0
3922 ? substed_operand[i]
3924 recog_data.constraints[i],
3925 goal_alternative_number))
3926 goal_alternative_win[i] = 1;
3930 /* Record the values of the earlyclobber operands for the caller. */
3931 if (goal_earlyclobber)
3932 for (i = 0; i < noperands; i++)
3933 if (goal_alternative_earlyclobber[i])
3934 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3936 /* Now record reloads for all the operands that need them. */
3937 for (i = 0; i < noperands; i++)
3938 if (! goal_alternative_win[i])
3940 /* Operands that match previous ones have already been handled. */
3941 if (goal_alternative_matches[i] >= 0)
3943 /* Handle an operand with a nonoffsettable address
3944 appearing where an offsettable address will do
3945 by reloading the address into a base register.
3947 ??? We can also do this when the operand is a register and
3948 reg_equiv_mem is not offsettable, but this is a bit tricky,
3949 so we don't bother with it. It may not be worth doing. */
3950 else if (goal_alternative_matched[i] == -1
3951 && goal_alternative_offmemok[i]
3952 && MEM_P (recog_data.operand[i]))
3954 /* If the address to be reloaded is a VOIDmode constant,
3955 use Pmode as mode of the reload register, as would have
3956 been done by find_reloads_address. */
3957 enum machine_mode address_mode;
3958 address_mode = GET_MODE (XEXP (recog_data.operand[i], 0));
3959 if (address_mode == VOIDmode)
3960 address_mode = Pmode;
3962 operand_reloadnum[i]
3963 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3964 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3965 base_reg_class (VOIDmode, MEM, SCRATCH),
3967 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3968 rld[operand_reloadnum[i]].inc
3969 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3971 /* If this operand is an output, we will have made any
3972 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3973 now we are treating part of the operand as an input, so
3974 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3976 if (modified[i] == RELOAD_WRITE)
3978 for (j = 0; j < n_reloads; j++)
3980 if (rld[j].opnum == i)
3982 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3983 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3984 else if (rld[j].when_needed
3985 == RELOAD_FOR_OUTADDR_ADDRESS)
3986 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3991 else if (goal_alternative_matched[i] == -1)
3993 operand_reloadnum[i]
3994 = push_reload ((modified[i] != RELOAD_WRITE
3995 ? recog_data.operand[i] : 0),
3996 (modified[i] != RELOAD_READ
3997 ? recog_data.operand[i] : 0),
3998 (modified[i] != RELOAD_WRITE
3999 ? recog_data.operand_loc[i] : 0),
4000 (modified[i] != RELOAD_READ
4001 ? recog_data.operand_loc[i] : 0),
4002 (enum reg_class) goal_alternative[i],
4003 (modified[i] == RELOAD_WRITE
4004 ? VOIDmode : operand_mode[i]),
4005 (modified[i] == RELOAD_READ
4006 ? VOIDmode : operand_mode[i]),
4007 (insn_code_number < 0 ? 0
4008 : insn_data[insn_code_number].operand[i].strict_low),
4009 0, i, operand_type[i]);
4011 /* In a matching pair of operands, one must be input only
4012 and the other must be output only.
4013 Pass the input operand as IN and the other as OUT. */
4014 else if (modified[i] == RELOAD_READ
4015 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
4017 operand_reloadnum[i]
4018 = push_reload (recog_data.operand[i],
4019 recog_data.operand[goal_alternative_matched[i]],
4020 recog_data.operand_loc[i],
4021 recog_data.operand_loc[goal_alternative_matched[i]],
4022 (enum reg_class) goal_alternative[i],
4024 operand_mode[goal_alternative_matched[i]],
4025 0, 0, i, RELOAD_OTHER);
4026 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
4028 else if (modified[i] == RELOAD_WRITE
4029 && modified[goal_alternative_matched[i]] == RELOAD_READ)
4031 operand_reloadnum[goal_alternative_matched[i]]
4032 = push_reload (recog_data.operand[goal_alternative_matched[i]],
4033 recog_data.operand[i],
4034 recog_data.operand_loc[goal_alternative_matched[i]],
4035 recog_data.operand_loc[i],
4036 (enum reg_class) goal_alternative[i],
4037 operand_mode[goal_alternative_matched[i]],
4039 0, 0, i, RELOAD_OTHER);
4040 operand_reloadnum[i] = output_reloadnum;
4044 gcc_assert (insn_code_number < 0);
4045 error_for_asm (insn, "inconsistent operand constraints "
4047 /* Avoid further trouble with this insn. */
4048 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
4053 else if (goal_alternative_matched[i] < 0
4054 && goal_alternative_matches[i] < 0
4055 && address_operand_reloaded[i] != 1
4058 /* For each non-matching operand that's a MEM or a pseudo-register
4059 that didn't get a hard register, make an optional reload.
4060 This may get done even if the insn needs no reloads otherwise. */
4062 rtx operand = recog_data.operand[i];
4064 while (GET_CODE (operand) == SUBREG)
4065 operand = SUBREG_REG (operand);
4066 if ((MEM_P (operand)
4068 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4069 /* If this is only for an output, the optional reload would not
4070 actually cause us to use a register now, just note that
4071 something is stored here. */
4072 && ((enum reg_class) goal_alternative[i] != NO_REGS
4073 || modified[i] == RELOAD_WRITE)
4074 && ! no_input_reloads
4075 /* An optional output reload might allow to delete INSN later.
4076 We mustn't make in-out reloads on insns that are not permitted
4078 If this is an asm, we can't delete it; we must not even call
4079 push_reload for an optional output reload in this case,
4080 because we can't be sure that the constraint allows a register,
4081 and push_reload verifies the constraints for asms. */
4082 && (modified[i] == RELOAD_READ
4083 || (! no_output_reloads && ! this_insn_is_asm)))
4084 operand_reloadnum[i]
4085 = push_reload ((modified[i] != RELOAD_WRITE
4086 ? recog_data.operand[i] : 0),
4087 (modified[i] != RELOAD_READ
4088 ? recog_data.operand[i] : 0),
4089 (modified[i] != RELOAD_WRITE
4090 ? recog_data.operand_loc[i] : 0),
4091 (modified[i] != RELOAD_READ
4092 ? recog_data.operand_loc[i] : 0),
4093 (enum reg_class) goal_alternative[i],
4094 (modified[i] == RELOAD_WRITE
4095 ? VOIDmode : operand_mode[i]),
4096 (modified[i] == RELOAD_READ
4097 ? VOIDmode : operand_mode[i]),
4098 (insn_code_number < 0 ? 0
4099 : insn_data[insn_code_number].operand[i].strict_low),
4100 1, i, operand_type[i]);
4101 /* If a memory reference remains (either as a MEM or a pseudo that
4102 did not get a hard register), yet we can't make an optional
4103 reload, check if this is actually a pseudo register reference;
4104 we then need to emit a USE and/or a CLOBBER so that reload
4105 inheritance will do the right thing. */
4109 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
4110 && reg_renumber [REGNO (operand)] < 0)))
4112 operand = *recog_data.operand_loc[i];
4114 while (GET_CODE (operand) == SUBREG)
4115 operand = SUBREG_REG (operand);
4116 if (REG_P (operand))
4118 if (modified[i] != RELOAD_WRITE)
4119 /* We mark the USE with QImode so that we recognize
4120 it as one that can be safely deleted at the end
4122 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
4124 if (modified[i] != RELOAD_READ)
4125 emit_insn_after (gen_clobber (operand), insn);
4129 else if (goal_alternative_matches[i] >= 0
4130 && goal_alternative_win[goal_alternative_matches[i]]
4131 && modified[i] == RELOAD_READ
4132 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
4133 && ! no_input_reloads && ! no_output_reloads
4136 /* Similarly, make an optional reload for a pair of matching
4137 objects that are in MEM or a pseudo that didn't get a hard reg. */
4139 rtx operand = recog_data.operand[i];
4141 while (GET_CODE (operand) == SUBREG)
4142 operand = SUBREG_REG (operand);
4143 if ((MEM_P (operand)
4145 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4146 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
4148 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
4149 = push_reload (recog_data.operand[goal_alternative_matches[i]],
4150 recog_data.operand[i],
4151 recog_data.operand_loc[goal_alternative_matches[i]],
4152 recog_data.operand_loc[i],
4153 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
4154 operand_mode[goal_alternative_matches[i]],
4156 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
4159 /* Perform whatever substitutions on the operands we are supposed
4160 to make due to commutativity or replacement of registers
4161 with equivalent constants or memory slots. */
4163 for (i = 0; i < noperands; i++)
4165 /* We only do this on the last pass through reload, because it is
4166 possible for some data (like reg_equiv_address) to be changed during
4167 later passes. Moreover, we lose the opportunity to get a useful
4168 reload_{in,out}_reg when we do these replacements. */
4172 rtx substitution = substed_operand[i];
4174 *recog_data.operand_loc[i] = substitution;
4176 /* If we're replacing an operand with a LABEL_REF, we need to
4177 make sure that there's a REG_LABEL_OPERAND note attached to
4178 this instruction. */
4179 if (GET_CODE (substitution) == LABEL_REF
4180 && !find_reg_note (insn, REG_LABEL_OPERAND,
4181 XEXP (substitution, 0))
4182 /* For a JUMP_P, if it was a branch target it must have
4183 already been recorded as such. */
4185 || !label_is_jump_target_p (XEXP (substitution, 0),
4187 add_reg_note (insn, REG_LABEL_OPERAND, XEXP (substitution, 0));
4190 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4193 /* If this insn pattern contains any MATCH_DUP's, make sure that
4194 they will be substituted if the operands they match are substituted.
4195 Also do now any substitutions we already did on the operands.
4197 Don't do this if we aren't making replacements because we might be
4198 propagating things allocated by frame pointer elimination into places
4199 it doesn't expect. */
4201 if (insn_code_number >= 0 && replace)
4202 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4204 int opno = recog_data.dup_num[i];
4205 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4206 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4210 /* This loses because reloading of prior insns can invalidate the equivalence
4211 (or at least find_equiv_reg isn't smart enough to find it any more),
4212 causing this insn to need more reload regs than it needed before.
4213 It may be too late to make the reload regs available.
4214 Now this optimization is done safely in choose_reload_regs. */
4216 /* For each reload of a reg into some other class of reg,
4217 search for an existing equivalent reg (same value now) in the right class.
4218 We can use it as long as we don't need to change its contents. */
4219 for (i = 0; i < n_reloads; i++)
4220 if (rld[i].reg_rtx == 0
4222 && REG_P (rld[i].in)
4226 = find_equiv_reg (rld[i].in, insn, rld[i].rclass, -1,
4227 static_reload_reg_p, 0, rld[i].inmode);
4228 /* Prevent generation of insn to load the value
4229 because the one we found already has the value. */
4231 rld[i].in = rld[i].reg_rtx;
4235 /* If we detected error and replaced asm instruction by USE, forget about the
4237 if (GET_CODE (PATTERN (insn)) == USE
4238 && GET_CODE (XEXP (PATTERN (insn), 0)) == CONST_INT)
4241 /* Perhaps an output reload can be combined with another
4242 to reduce needs by one. */
4243 if (!goal_earlyclobber)
4246 /* If we have a pair of reloads for parts of an address, they are reloading
4247 the same object, the operands themselves were not reloaded, and they
4248 are for two operands that are supposed to match, merge the reloads and
4249 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4251 for (i = 0; i < n_reloads; i++)
4255 for (j = i + 1; j < n_reloads; j++)
4256 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4257 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4258 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4259 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4260 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4261 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4262 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4263 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4264 && rtx_equal_p (rld[i].in, rld[j].in)
4265 && (operand_reloadnum[rld[i].opnum] < 0
4266 || rld[operand_reloadnum[rld[i].opnum]].optional)
4267 && (operand_reloadnum[rld[j].opnum] < 0
4268 || rld[operand_reloadnum[rld[j].opnum]].optional)
4269 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4270 || (goal_alternative_matches[rld[j].opnum]
4273 for (k = 0; k < n_replacements; k++)
4274 if (replacements[k].what == j)
4275 replacements[k].what = i;
4277 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4278 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4279 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4281 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4286 /* Scan all the reloads and update their type.
4287 If a reload is for the address of an operand and we didn't reload
4288 that operand, change the type. Similarly, change the operand number
4289 of a reload when two operands match. If a reload is optional, treat it
4290 as though the operand isn't reloaded.
4292 ??? This latter case is somewhat odd because if we do the optional
4293 reload, it means the object is hanging around. Thus we need only
4294 do the address reload if the optional reload was NOT done.
4296 Change secondary reloads to be the address type of their operand, not
4299 If an operand's reload is now RELOAD_OTHER, change any
4300 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4301 RELOAD_FOR_OTHER_ADDRESS. */
4303 for (i = 0; i < n_reloads; i++)
4305 if (rld[i].secondary_p
4306 && rld[i].when_needed == operand_type[rld[i].opnum])
4307 rld[i].when_needed = address_type[rld[i].opnum];
4309 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4310 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4311 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4312 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4313 && (operand_reloadnum[rld[i].opnum] < 0
4314 || rld[operand_reloadnum[rld[i].opnum]].optional))
4316 /* If we have a secondary reload to go along with this reload,
4317 change its type to RELOAD_FOR_OPADDR_ADDR. */
4319 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4320 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4321 && rld[i].secondary_in_reload != -1)
4323 int secondary_in_reload = rld[i].secondary_in_reload;
4325 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4327 /* If there's a tertiary reload we have to change it also. */
4328 if (secondary_in_reload > 0
4329 && rld[secondary_in_reload].secondary_in_reload != -1)
4330 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4331 = RELOAD_FOR_OPADDR_ADDR;
4334 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4335 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4336 && rld[i].secondary_out_reload != -1)
4338 int secondary_out_reload = rld[i].secondary_out_reload;
4340 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4342 /* If there's a tertiary reload we have to change it also. */
4343 if (secondary_out_reload
4344 && rld[secondary_out_reload].secondary_out_reload != -1)
4345 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4346 = RELOAD_FOR_OPADDR_ADDR;
4349 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4350 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4351 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4353 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4356 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4357 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4358 && operand_reloadnum[rld[i].opnum] >= 0
4359 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4361 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4363 if (goal_alternative_matches[rld[i].opnum] >= 0)
4364 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4367 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4368 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4369 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4371 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4372 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4373 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4374 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4375 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4376 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4377 This is complicated by the fact that a single operand can have more
4378 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4379 choose_reload_regs without affecting code quality, and cases that
4380 actually fail are extremely rare, so it turns out to be better to fix
4381 the problem here by not generating cases that choose_reload_regs will
4383 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4384 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4386 We can reduce the register pressure by exploiting that a
4387 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4388 does not conflict with any of them, if it is only used for the first of
4389 the RELOAD_FOR_X_ADDRESS reloads. */
4391 int first_op_addr_num = -2;
4392 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4393 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4394 int need_change = 0;
4395 /* We use last_op_addr_reload and the contents of the above arrays
4396 first as flags - -2 means no instance encountered, -1 means exactly
4397 one instance encountered.
4398 If more than one instance has been encountered, we store the reload
4399 number of the first reload of the kind in question; reload numbers
4400 are known to be non-negative. */
4401 for (i = 0; i < noperands; i++)
4402 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4403 for (i = n_reloads - 1; i >= 0; i--)
4405 switch (rld[i].when_needed)
4407 case RELOAD_FOR_OPERAND_ADDRESS:
4408 if (++first_op_addr_num >= 0)
4410 first_op_addr_num = i;
4414 case RELOAD_FOR_INPUT_ADDRESS:
4415 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4417 first_inpaddr_num[rld[i].opnum] = i;
4421 case RELOAD_FOR_OUTPUT_ADDRESS:
4422 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4424 first_outpaddr_num[rld[i].opnum] = i;
4435 for (i = 0; i < n_reloads; i++)
4438 enum reload_type type;
4440 switch (rld[i].when_needed)
4442 case RELOAD_FOR_OPADDR_ADDR:
4443 first_num = first_op_addr_num;
4444 type = RELOAD_FOR_OPERAND_ADDRESS;
4446 case RELOAD_FOR_INPADDR_ADDRESS:
4447 first_num = first_inpaddr_num[rld[i].opnum];
4448 type = RELOAD_FOR_INPUT_ADDRESS;
4450 case RELOAD_FOR_OUTADDR_ADDRESS:
4451 first_num = first_outpaddr_num[rld[i].opnum];
4452 type = RELOAD_FOR_OUTPUT_ADDRESS;
4459 else if (i > first_num)
4460 rld[i].when_needed = type;
4463 /* Check if the only TYPE reload that uses reload I is
4464 reload FIRST_NUM. */
4465 for (j = n_reloads - 1; j > first_num; j--)
4467 if (rld[j].when_needed == type
4468 && (rld[i].secondary_p
4469 ? rld[j].secondary_in_reload == i
4470 : reg_mentioned_p (rld[i].in, rld[j].in)))
4472 rld[i].when_needed = type;
4481 /* See if we have any reloads that are now allowed to be merged
4482 because we've changed when the reload is needed to
4483 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4484 check for the most common cases. */
4486 for (i = 0; i < n_reloads; i++)
4487 if (rld[i].in != 0 && rld[i].out == 0
4488 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4489 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4490 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4491 for (j = 0; j < n_reloads; j++)
4492 if (i != j && rld[j].in != 0 && rld[j].out == 0
4493 && rld[j].when_needed == rld[i].when_needed
4494 && MATCHES (rld[i].in, rld[j].in)
4495 && rld[i].rclass == rld[j].rclass
4496 && !rld[i].nocombine && !rld[j].nocombine
4497 && rld[i].reg_rtx == rld[j].reg_rtx)
4499 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4500 transfer_replacements (i, j);
4505 /* If we made any reloads for addresses, see if they violate a
4506 "no input reloads" requirement for this insn. But loads that we
4507 do after the insn (such as for output addresses) are fine. */
4508 if (no_input_reloads)
4509 for (i = 0; i < n_reloads; i++)
4510 gcc_assert (rld[i].in == 0
4511 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS
4512 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS);
4515 /* Compute reload_mode and reload_nregs. */
4516 for (i = 0; i < n_reloads; i++)
4519 = (rld[i].inmode == VOIDmode
4520 || (GET_MODE_SIZE (rld[i].outmode)
4521 > GET_MODE_SIZE (rld[i].inmode)))
4522 ? rld[i].outmode : rld[i].inmode;
4524 rld[i].nregs = CLASS_MAX_NREGS (rld[i].rclass, rld[i].mode);
4527 /* Special case a simple move with an input reload and a
4528 destination of a hard reg, if the hard reg is ok, use it. */
4529 for (i = 0; i < n_reloads; i++)
4530 if (rld[i].when_needed == RELOAD_FOR_INPUT
4531 && GET_CODE (PATTERN (insn)) == SET
4532 && REG_P (SET_DEST (PATTERN (insn)))
4533 && (SET_SRC (PATTERN (insn)) == rld[i].in
4534 || SET_SRC (PATTERN (insn)) == rld[i].in_reg)
4535 && !elimination_target_reg_p (SET_DEST (PATTERN (insn))))
4537 rtx dest = SET_DEST (PATTERN (insn));
4538 unsigned int regno = REGNO (dest);
4540 if (regno < FIRST_PSEUDO_REGISTER
4541 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno)
4542 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4544 int nr = hard_regno_nregs[regno][rld[i].mode];
4547 for (nri = 1; nri < nr; nri ++)
4548 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno + nri))
4552 rld[i].reg_rtx = dest;
4559 /* Return true if alternative number ALTNUM in constraint-string
4560 CONSTRAINT is guaranteed to accept a reloaded constant-pool reference.
4561 MEM gives the reference if it didn't need any reloads, otherwise it
4565 alternative_allows_const_pool_ref (rtx mem, const char *constraint, int altnum)
4569 /* Skip alternatives before the one requested. */
4572 while (*constraint++ != ',');
4575 /* Scan the requested alternative for TARGET_MEM_CONSTRAINT or 'o'.
4576 If one of them is present, this alternative accepts the result of
4577 passing a constant-pool reference through find_reloads_toplev.
4579 The same is true of extra memory constraints if the address
4580 was reloaded into a register. However, the target may elect
4581 to disallow the original constant address, forcing it to be
4582 reloaded into a register instead. */
4583 for (; (c = *constraint) && c != ',' && c != '#';
4584 constraint += CONSTRAINT_LEN (c, constraint))
4586 if (c == TARGET_MEM_CONSTRAINT || c == 'o')
4588 #ifdef EXTRA_CONSTRAINT_STR
4589 if (EXTRA_MEMORY_CONSTRAINT (c, constraint)
4590 && (mem == NULL || EXTRA_CONSTRAINT_STR (mem, c, constraint)))
4597 /* Scan X for memory references and scan the addresses for reloading.
4598 Also checks for references to "constant" regs that we want to eliminate
4599 and replaces them with the values they stand for.
4600 We may alter X destructively if it contains a reference to such.
4601 If X is just a constant reg, we return the equivalent value
4604 IND_LEVELS says how many levels of indirect addressing this machine
4607 OPNUM and TYPE identify the purpose of the reload.
4609 IS_SET_DEST is true if X is the destination of a SET, which is not
4610 appropriate to be replaced by a constant.
4612 INSN, if nonzero, is the insn in which we do the reload. It is used
4613 to determine if we may generate output reloads, and where to put USEs
4614 for pseudos that we have to replace with stack slots.
4616 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4617 result of find_reloads_address. */
4620 find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4621 int ind_levels, int is_set_dest, rtx insn,
4622 int *address_reloaded)
4624 RTX_CODE code = GET_CODE (x);
4626 const char *fmt = GET_RTX_FORMAT (code);
4632 /* This code is duplicated for speed in find_reloads. */
4633 int regno = REGNO (x);
4634 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4635 x = reg_equiv_constant[regno];
4637 /* This creates (subreg (mem...)) which would cause an unnecessary
4638 reload of the mem. */
4639 else if (reg_equiv_mem[regno] != 0)
4640 x = reg_equiv_mem[regno];
4642 else if (reg_equiv_memory_loc[regno]
4643 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4645 rtx mem = make_memloc (x, regno);
4646 if (reg_equiv_address[regno]
4647 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4649 /* If this is not a toplevel operand, find_reloads doesn't see
4650 this substitution. We have to emit a USE of the pseudo so
4651 that delete_output_reload can see it. */
4652 if (replace_reloads && recog_data.operand[opnum] != x)
4653 /* We mark the USE with QImode so that we recognize it
4654 as one that can be safely deleted at the end of
4656 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4659 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4660 opnum, type, ind_levels, insn);
4661 if (!rtx_equal_p (x, mem))
4662 push_reg_equiv_alt_mem (regno, x);
4663 if (address_reloaded)
4664 *address_reloaded = i;
4673 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4674 opnum, type, ind_levels, insn);
4675 if (address_reloaded)
4676 *address_reloaded = i;
4681 if (code == SUBREG && REG_P (SUBREG_REG (x)))
4683 /* Check for SUBREG containing a REG that's equivalent to a
4684 constant. If the constant has a known value, truncate it
4685 right now. Similarly if we are extracting a single-word of a
4686 multi-word constant. If the constant is symbolic, allow it
4687 to be substituted normally. push_reload will strip the
4688 subreg later. The constant must not be VOIDmode, because we
4689 will lose the mode of the register (this should never happen
4690 because one of the cases above should handle it). */
4692 int regno = REGNO (SUBREG_REG (x));
4695 if (regno >= FIRST_PSEUDO_REGISTER
4696 && reg_renumber[regno] < 0
4697 && reg_equiv_constant[regno] != 0)
4700 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4701 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4703 if (CONSTANT_P (tem) && !LEGITIMATE_CONSTANT_P (tem))
4705 tem = force_const_mem (GET_MODE (x), tem);
4706 i = find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4707 &XEXP (tem, 0), opnum, type,
4709 if (address_reloaded)
4710 *address_reloaded = i;
4715 /* If the subreg contains a reg that will be converted to a mem,
4716 convert the subreg to a narrower memref now.
4717 Otherwise, we would get (subreg (mem ...) ...),
4718 which would force reload of the mem.
4720 We also need to do this if there is an equivalent MEM that is
4721 not offsettable. In that case, alter_subreg would produce an
4722 invalid address on big-endian machines.
4724 For machines that extend byte loads, we must not reload using
4725 a wider mode if we have a paradoxical SUBREG. find_reloads will
4726 force a reload in that case. So we should not do anything here. */
4728 if (regno >= FIRST_PSEUDO_REGISTER
4729 #ifdef LOAD_EXTEND_OP
4730 && (GET_MODE_SIZE (GET_MODE (x))
4731 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4733 && (reg_equiv_address[regno] != 0
4734 || (reg_equiv_mem[regno] != 0
4735 && (! strict_memory_address_p (GET_MODE (x),
4736 XEXP (reg_equiv_mem[regno], 0))
4737 || ! offsettable_memref_p (reg_equiv_mem[regno])
4738 || num_not_at_initial_offset))))
4739 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4743 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4747 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4748 ind_levels, is_set_dest, insn,
4750 /* If we have replaced a reg with it's equivalent memory loc -
4751 that can still be handled here e.g. if it's in a paradoxical
4752 subreg - we must make the change in a copy, rather than using
4753 a destructive change. This way, find_reloads can still elect
4754 not to do the change. */
4755 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4757 x = shallow_copy_rtx (x);
4760 XEXP (x, i) = new_part;
4766 /* Return a mem ref for the memory equivalent of reg REGNO.
4767 This mem ref is not shared with anything. */
4770 make_memloc (rtx ad, int regno)
4772 /* We must rerun eliminate_regs, in case the elimination
4773 offsets have changed. */
4775 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4777 /* If TEM might contain a pseudo, we must copy it to avoid
4778 modifying it when we do the substitution for the reload. */
4779 if (rtx_varies_p (tem, 0))
4780 tem = copy_rtx (tem);
4782 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4783 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4785 /* Copy the result if it's still the same as the equivalence, to avoid
4786 modifying it when we do the substitution for the reload. */
4787 if (tem == reg_equiv_memory_loc[regno])
4788 tem = copy_rtx (tem);
4792 /* Returns true if AD could be turned into a valid memory reference
4793 to mode MODE by reloading the part pointed to by PART into a
4797 maybe_memory_address_p (enum machine_mode mode, rtx ad, rtx *part)
4801 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4804 retv = memory_address_p (mode, ad);
4810 /* Record all reloads needed for handling memory address AD
4811 which appears in *LOC in a memory reference to mode MODE
4812 which itself is found in location *MEMREFLOC.
4813 Note that we take shortcuts assuming that no multi-reg machine mode
4814 occurs as part of an address.
4816 OPNUM and TYPE specify the purpose of this reload.
4818 IND_LEVELS says how many levels of indirect addressing this machine
4821 INSN, if nonzero, is the insn in which we do the reload. It is used
4822 to determine if we may generate output reloads, and where to put USEs
4823 for pseudos that we have to replace with stack slots.
4825 Value is one if this address is reloaded or replaced as a whole; it is
4826 zero if the top level of this address was not reloaded or replaced, and
4827 it is -1 if it may or may not have been reloaded or replaced.
4829 Note that there is no verification that the address will be valid after
4830 this routine does its work. Instead, we rely on the fact that the address
4831 was valid when reload started. So we need only undo things that reload
4832 could have broken. These are wrong register types, pseudos not allocated
4833 to a hard register, and frame pointer elimination. */
4836 find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4837 rtx *loc, int opnum, enum reload_type type,
4838 int ind_levels, rtx insn)
4841 int removed_and = 0;
4845 /* If the address is a register, see if it is a legitimate address and
4846 reload if not. We first handle the cases where we need not reload
4847 or where we must reload in a non-standard way. */
4853 if (reg_equiv_constant[regno] != 0)
4855 find_reloads_address_part (reg_equiv_constant[regno], loc,
4856 base_reg_class (mode, MEM, SCRATCH),
4857 GET_MODE (ad), opnum, type, ind_levels);
4861 tem = reg_equiv_memory_loc[regno];
4864 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4866 tem = make_memloc (ad, regno);
4867 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4871 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4872 &XEXP (tem, 0), opnum,
4873 ADDR_TYPE (type), ind_levels, insn);
4874 if (!rtx_equal_p (tem, orig))
4875 push_reg_equiv_alt_mem (regno, tem);
4877 /* We can avoid a reload if the register's equivalent memory
4878 expression is valid as an indirect memory address.
4879 But not all addresses are valid in a mem used as an indirect
4880 address: only reg or reg+constant. */
4883 && strict_memory_address_p (mode, tem)
4884 && (REG_P (XEXP (tem, 0))
4885 || (GET_CODE (XEXP (tem, 0)) == PLUS
4886 && REG_P (XEXP (XEXP (tem, 0), 0))
4887 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4889 /* TEM is not the same as what we'll be replacing the
4890 pseudo with after reload, put a USE in front of INSN
4891 in the final reload pass. */
4893 && num_not_at_initial_offset
4894 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4897 /* We mark the USE with QImode so that we
4898 recognize it as one that can be safely
4899 deleted at the end of reload. */
4900 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4903 /* This doesn't really count as replacing the address
4904 as a whole, since it is still a memory access. */
4912 /* The only remaining case where we can avoid a reload is if this is a
4913 hard register that is valid as a base register and which is not the
4914 subject of a CLOBBER in this insn. */
4916 else if (regno < FIRST_PSEUDO_REGISTER
4917 && regno_ok_for_base_p (regno, mode, MEM, SCRATCH)
4918 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4921 /* If we do not have one of the cases above, we must do the reload. */
4922 push_reload (ad, NULL_RTX, loc, (rtx*) 0, base_reg_class (mode, MEM, SCRATCH),
4923 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4927 if (strict_memory_address_p (mode, ad))
4929 /* The address appears valid, so reloads are not needed.
4930 But the address may contain an eliminable register.
4931 This can happen because a machine with indirect addressing
4932 may consider a pseudo register by itself a valid address even when
4933 it has failed to get a hard reg.
4934 So do a tree-walk to find and eliminate all such regs. */
4936 /* But first quickly dispose of a common case. */
4937 if (GET_CODE (ad) == PLUS
4938 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4939 && REG_P (XEXP (ad, 0))
4940 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4943 subst_reg_equivs_changed = 0;
4944 *loc = subst_reg_equivs (ad, insn);
4946 if (! subst_reg_equivs_changed)
4949 /* Check result for validity after substitution. */
4950 if (strict_memory_address_p (mode, ad))
4954 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4959 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4964 *memrefloc = copy_rtx (*memrefloc);
4965 XEXP (*memrefloc, 0) = ad;
4966 move_replacements (&ad, &XEXP (*memrefloc, 0));
4972 /* The address is not valid. We have to figure out why. First see if
4973 we have an outer AND and remove it if so. Then analyze what's inside. */
4975 if (GET_CODE (ad) == AND)
4978 loc = &XEXP (ad, 0);
4982 /* One possibility for why the address is invalid is that it is itself
4983 a MEM. This can happen when the frame pointer is being eliminated, a
4984 pseudo is not allocated to a hard register, and the offset between the
4985 frame and stack pointers is not its initial value. In that case the
4986 pseudo will have been replaced by a MEM referring to the
4990 /* First ensure that the address in this MEM is valid. Then, unless
4991 indirect addresses are valid, reload the MEM into a register. */
4993 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4994 opnum, ADDR_TYPE (type),
4995 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4997 /* If tem was changed, then we must create a new memory reference to
4998 hold it and store it back into memrefloc. */
4999 if (tem != ad && memrefloc)
5001 *memrefloc = copy_rtx (*memrefloc);
5002 copy_replacements (tem, XEXP (*memrefloc, 0));
5003 loc = &XEXP (*memrefloc, 0);
5005 loc = &XEXP (*loc, 0);
5008 /* Check similar cases as for indirect addresses as above except
5009 that we can allow pseudos and a MEM since they should have been
5010 taken care of above. */
5013 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
5014 || MEM_P (XEXP (tem, 0))
5015 || ! (REG_P (XEXP (tem, 0))
5016 || (GET_CODE (XEXP (tem, 0)) == PLUS
5017 && REG_P (XEXP (XEXP (tem, 0), 0))
5018 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
5020 /* Must use TEM here, not AD, since it is the one that will
5021 have any subexpressions reloaded, if needed. */
5022 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
5023 base_reg_class (mode, MEM, SCRATCH), GET_MODE (tem),
5026 return ! removed_and;
5032 /* If we have address of a stack slot but it's not valid because the
5033 displacement is too large, compute the sum in a register.
5034 Handle all base registers here, not just fp/ap/sp, because on some
5035 targets (namely SH) we can also get too large displacements from
5036 big-endian corrections. */
5037 else if (GET_CODE (ad) == PLUS
5038 && REG_P (XEXP (ad, 0))
5039 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
5040 && GET_CODE (XEXP (ad, 1)) == CONST_INT
5041 && regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode, PLUS,
5045 /* Unshare the MEM rtx so we can safely alter it. */
5048 *memrefloc = copy_rtx (*memrefloc);
5049 loc = &XEXP (*memrefloc, 0);
5051 loc = &XEXP (*loc, 0);
5054 if (double_reg_address_ok)
5056 /* Unshare the sum as well. */
5057 *loc = ad = copy_rtx (ad);
5059 /* Reload the displacement into an index reg.
5060 We assume the frame pointer or arg pointer is a base reg. */
5061 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
5062 INDEX_REG_CLASS, GET_MODE (ad), opnum,
5068 /* If the sum of two regs is not necessarily valid,
5069 reload the sum into a base reg.
5070 That will at least work. */
5071 find_reloads_address_part (ad, loc,
5072 base_reg_class (mode, MEM, SCRATCH),
5073 Pmode, opnum, type, ind_levels);
5075 return ! removed_and;
5078 /* If we have an indexed stack slot, there are three possible reasons why
5079 it might be invalid: The index might need to be reloaded, the address
5080 might have been made by frame pointer elimination and hence have a
5081 constant out of range, or both reasons might apply.
5083 We can easily check for an index needing reload, but even if that is the
5084 case, we might also have an invalid constant. To avoid making the
5085 conservative assumption and requiring two reloads, we see if this address
5086 is valid when not interpreted strictly. If it is, the only problem is
5087 that the index needs a reload and find_reloads_address_1 will take care
5090 Handle all base registers here, not just fp/ap/sp, because on some
5091 targets (namely SPARC) we can also get invalid addresses from preventive
5092 subreg big-endian corrections made by find_reloads_toplev. We
5093 can also get expressions involving LO_SUM (rather than PLUS) from
5094 find_reloads_subreg_address.
5096 If we decide to do something, it must be that `double_reg_address_ok'
5097 is true. We generate a reload of the base register + constant and
5098 rework the sum so that the reload register will be added to the index.
5099 This is safe because we know the address isn't shared.
5101 We check for the base register as both the first and second operand of
5102 the innermost PLUS and/or LO_SUM. */
5104 for (op_index = 0; op_index < 2; ++op_index)
5106 rtx operand, addend;
5107 enum rtx_code inner_code;
5109 if (GET_CODE (ad) != PLUS)
5112 inner_code = GET_CODE (XEXP (ad, 0));
5113 if (!(GET_CODE (ad) == PLUS
5114 && GET_CODE (XEXP (ad, 1)) == CONST_INT
5115 && (inner_code == PLUS || inner_code == LO_SUM)))
5118 operand = XEXP (XEXP (ad, 0), op_index);
5119 if (!REG_P (operand) || REGNO (operand) >= FIRST_PSEUDO_REGISTER)
5122 addend = XEXP (XEXP (ad, 0), 1 - op_index);
5124 if ((regno_ok_for_base_p (REGNO (operand), mode, inner_code,
5126 || operand == frame_pointer_rtx
5127 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
5128 || operand == hard_frame_pointer_rtx
5130 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5131 || operand == arg_pointer_rtx
5133 || operand == stack_pointer_rtx)
5134 && ! maybe_memory_address_p (mode, ad,
5135 &XEXP (XEXP (ad, 0), 1 - op_index)))
5140 offset_reg = plus_constant (operand, INTVAL (XEXP (ad, 1)));
5142 /* Form the adjusted address. */
5143 if (GET_CODE (XEXP (ad, 0)) == PLUS)
5144 ad = gen_rtx_PLUS (GET_MODE (ad),
5145 op_index == 0 ? offset_reg : addend,
5146 op_index == 0 ? addend : offset_reg);
5148 ad = gen_rtx_LO_SUM (GET_MODE (ad),
5149 op_index == 0 ? offset_reg : addend,
5150 op_index == 0 ? addend : offset_reg);
5153 cls = base_reg_class (mode, MEM, GET_CODE (addend));
5154 find_reloads_address_part (XEXP (ad, op_index),
5155 &XEXP (ad, op_index), cls,
5156 GET_MODE (ad), opnum, type, ind_levels);
5157 find_reloads_address_1 (mode,
5158 XEXP (ad, 1 - op_index), 1, GET_CODE (ad),
5159 GET_CODE (XEXP (ad, op_index)),
5160 &XEXP (ad, 1 - op_index), opnum,
5167 /* See if address becomes valid when an eliminable register
5168 in a sum is replaced. */
5171 if (GET_CODE (ad) == PLUS)
5172 tem = subst_indexed_address (ad);
5173 if (tem != ad && strict_memory_address_p (mode, tem))
5175 /* Ok, we win that way. Replace any additional eliminable
5178 subst_reg_equivs_changed = 0;
5179 tem = subst_reg_equivs (tem, insn);
5181 /* Make sure that didn't make the address invalid again. */
5183 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
5190 /* If constants aren't valid addresses, reload the constant address
5192 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
5194 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5195 Unshare it so we can safely alter it. */
5196 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
5197 && CONSTANT_POOL_ADDRESS_P (ad))
5199 *memrefloc = copy_rtx (*memrefloc);
5200 loc = &XEXP (*memrefloc, 0);
5202 loc = &XEXP (*loc, 0);
5205 find_reloads_address_part (ad, loc, base_reg_class (mode, MEM, SCRATCH),
5206 Pmode, opnum, type, ind_levels);
5207 return ! removed_and;
5210 return find_reloads_address_1 (mode, ad, 0, MEM, SCRATCH, loc, opnum, type,
5214 /* Find all pseudo regs appearing in AD
5215 that are eliminable in favor of equivalent values
5216 and do not have hard regs; replace them by their equivalents.
5217 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5218 front of it for pseudos that we have to replace with stack slots. */
5221 subst_reg_equivs (rtx ad, rtx insn)
5223 RTX_CODE code = GET_CODE (ad);
5243 int regno = REGNO (ad);
5245 if (reg_equiv_constant[regno] != 0)
5247 subst_reg_equivs_changed = 1;
5248 return reg_equiv_constant[regno];
5250 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5252 rtx mem = make_memloc (ad, regno);
5253 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5255 subst_reg_equivs_changed = 1;
5256 /* We mark the USE with QImode so that we recognize it
5257 as one that can be safely deleted at the end of
5259 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5268 /* Quickly dispose of a common case. */
5269 if (XEXP (ad, 0) == frame_pointer_rtx
5270 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5278 fmt = GET_RTX_FORMAT (code);
5279 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5281 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5285 /* Compute the sum of X and Y, making canonicalizations assumed in an
5286 address, namely: sum constant integers, surround the sum of two
5287 constants with a CONST, put the constant as the second operand, and
5288 group the constant on the outermost sum.
5290 This routine assumes both inputs are already in canonical form. */
5293 form_sum (rtx x, rtx y)
5296 enum machine_mode mode = GET_MODE (x);
5298 if (mode == VOIDmode)
5299 mode = GET_MODE (y);
5301 if (mode == VOIDmode)
5304 if (GET_CODE (x) == CONST_INT)
5305 return plus_constant (y, INTVAL (x));
5306 else if (GET_CODE (y) == CONST_INT)
5307 return plus_constant (x, INTVAL (y));
5308 else if (CONSTANT_P (x))
5309 tem = x, x = y, y = tem;
5311 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5312 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5314 /* Note that if the operands of Y are specified in the opposite
5315 order in the recursive calls below, infinite recursion will occur. */
5316 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5317 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5319 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5320 constant will have been placed second. */
5321 if (CONSTANT_P (x) && CONSTANT_P (y))
5323 if (GET_CODE (x) == CONST)
5325 if (GET_CODE (y) == CONST)
5328 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5331 return gen_rtx_PLUS (mode, x, y);
5334 /* If ADDR is a sum containing a pseudo register that should be
5335 replaced with a constant (from reg_equiv_constant),
5336 return the result of doing so, and also apply the associative
5337 law so that the result is more likely to be a valid address.
5338 (But it is not guaranteed to be one.)
5340 Note that at most one register is replaced, even if more are
5341 replaceable. Also, we try to put the result into a canonical form
5342 so it is more likely to be a valid address.
5344 In all other cases, return ADDR. */
5347 subst_indexed_address (rtx addr)
5349 rtx op0 = 0, op1 = 0, op2 = 0;
5353 if (GET_CODE (addr) == PLUS)
5355 /* Try to find a register to replace. */
5356 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5358 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5359 && reg_renumber[regno] < 0
5360 && reg_equiv_constant[regno] != 0)
5361 op0 = reg_equiv_constant[regno];
5362 else if (REG_P (op1)
5363 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5364 && reg_renumber[regno] < 0
5365 && reg_equiv_constant[regno] != 0)
5366 op1 = reg_equiv_constant[regno];
5367 else if (GET_CODE (op0) == PLUS
5368 && (tem = subst_indexed_address (op0)) != op0)
5370 else if (GET_CODE (op1) == PLUS
5371 && (tem = subst_indexed_address (op1)) != op1)
5376 /* Pick out up to three things to add. */
5377 if (GET_CODE (op1) == PLUS)
5378 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5379 else if (GET_CODE (op0) == PLUS)
5380 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5382 /* Compute the sum. */
5384 op1 = form_sum (op1, op2);
5386 op0 = form_sum (op0, op1);
5393 /* Update the REG_INC notes for an insn. It updates all REG_INC
5394 notes for the instruction which refer to REGNO the to refer
5395 to the reload number.
5397 INSN is the insn for which any REG_INC notes need updating.
5399 REGNO is the register number which has been reloaded.
5401 RELOADNUM is the reload number. */
5404 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5405 int reloadnum ATTRIBUTE_UNUSED)
5410 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5411 if (REG_NOTE_KIND (link) == REG_INC
5412 && (int) REGNO (XEXP (link, 0)) == regno)
5413 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5417 /* Record the pseudo registers we must reload into hard registers in a
5418 subexpression of a would-be memory address, X referring to a value
5419 in mode MODE. (This function is not called if the address we find
5422 CONTEXT = 1 means we are considering regs as index regs,
5423 = 0 means we are considering them as base regs.
5424 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5426 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5427 is the code of the index part of the address. Otherwise, pass SCRATCH
5429 OPNUM and TYPE specify the purpose of any reloads made.
5431 IND_LEVELS says how many levels of indirect addressing are
5432 supported at this point in the address.
5434 INSN, if nonzero, is the insn in which we do the reload. It is used
5435 to determine if we may generate output reloads.
5437 We return nonzero if X, as a whole, is reloaded or replaced. */
5439 /* Note that we take shortcuts assuming that no multi-reg machine mode
5440 occurs as part of an address.
5441 Also, this is not fully machine-customizable; it works for machines
5442 such as VAXen and 68000's and 32000's, but other possible machines
5443 could have addressing modes that this does not handle right.
5444 If you add push_reload calls here, you need to make sure gen_reload
5445 handles those cases gracefully. */
5448 find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
5449 enum rtx_code outer_code, enum rtx_code index_code,
5450 rtx *loc, int opnum, enum reload_type type,
5451 int ind_levels, rtx insn)
5453 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, OUTER, INDEX) \
5455 ? regno_ok_for_base_p (REGNO, MODE, OUTER, INDEX) \
5456 : REGNO_OK_FOR_INDEX_P (REGNO))
5458 enum reg_class context_reg_class;
5459 RTX_CODE code = GET_CODE (x);
5462 context_reg_class = INDEX_REG_CLASS;
5464 context_reg_class = base_reg_class (mode, outer_code, index_code);
5470 rtx orig_op0 = XEXP (x, 0);
5471 rtx orig_op1 = XEXP (x, 1);
5472 RTX_CODE code0 = GET_CODE (orig_op0);
5473 RTX_CODE code1 = GET_CODE (orig_op1);
5477 if (GET_CODE (op0) == SUBREG)
5479 op0 = SUBREG_REG (op0);
5480 code0 = GET_CODE (op0);
5481 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5482 op0 = gen_rtx_REG (word_mode,
5484 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5485 GET_MODE (SUBREG_REG (orig_op0)),
5486 SUBREG_BYTE (orig_op0),
5487 GET_MODE (orig_op0))));
5490 if (GET_CODE (op1) == SUBREG)
5492 op1 = SUBREG_REG (op1);
5493 code1 = GET_CODE (op1);
5494 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5495 /* ??? Why is this given op1's mode and above for
5496 ??? op0 SUBREGs we use word_mode? */
5497 op1 = gen_rtx_REG (GET_MODE (op1),
5499 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5500 GET_MODE (SUBREG_REG (orig_op1)),
5501 SUBREG_BYTE (orig_op1),
5502 GET_MODE (orig_op1))));
5504 /* Plus in the index register may be created only as a result of
5505 register rematerialization for expression like &localvar*4. Reload it.
5506 It may be possible to combine the displacement on the outer level,
5507 but it is probably not worthwhile to do so. */
5510 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5511 opnum, ADDR_TYPE (type), ind_levels, insn);
5512 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5514 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5518 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5519 || code0 == ZERO_EXTEND || code1 == MEM)
5521 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5522 &XEXP (x, 0), opnum, type, ind_levels,
5524 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5525 &XEXP (x, 1), opnum, type, ind_levels,
5529 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5530 || code1 == ZERO_EXTEND || code0 == MEM)
5532 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5533 &XEXP (x, 0), opnum, type, ind_levels,
5535 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5536 &XEXP (x, 1), opnum, type, ind_levels,
5540 else if (code0 == CONST_INT || code0 == CONST
5541 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5542 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5543 &XEXP (x, 1), opnum, type, ind_levels,
5546 else if (code1 == CONST_INT || code1 == CONST
5547 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5548 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5549 &XEXP (x, 0), opnum, type, ind_levels,
5552 else if (code0 == REG && code1 == REG)
5554 if (REGNO_OK_FOR_INDEX_P (REGNO (op1))
5555 && regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5557 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0))
5558 && regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5560 else if (regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5561 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5562 &XEXP (x, 1), opnum, type, ind_levels,
5564 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1)))
5565 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5566 &XEXP (x, 0), opnum, type, ind_levels,
5568 else if (regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5569 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5570 &XEXP (x, 0), opnum, type, ind_levels,
5572 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0)))
5573 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5574 &XEXP (x, 1), opnum, type, ind_levels,
5578 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5579 &XEXP (x, 0), opnum, type, ind_levels,
5581 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5582 &XEXP (x, 1), opnum, type, ind_levels,
5587 else if (code0 == REG)
5589 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5590 &XEXP (x, 0), opnum, type, ind_levels,
5592 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5593 &XEXP (x, 1), opnum, type, ind_levels,
5597 else if (code1 == REG)
5599 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5600 &XEXP (x, 1), opnum, type, ind_levels,
5602 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5603 &XEXP (x, 0), opnum, type, ind_levels,
5613 rtx op0 = XEXP (x, 0);
5614 rtx op1 = XEXP (x, 1);
5615 enum rtx_code index_code;
5619 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5622 /* Currently, we only support {PRE,POST}_MODIFY constructs
5623 where a base register is {inc,dec}remented by the contents
5624 of another register or by a constant value. Thus, these
5625 operands must match. */
5626 gcc_assert (op0 == XEXP (op1, 0));
5628 /* Require index register (or constant). Let's just handle the
5629 register case in the meantime... If the target allows
5630 auto-modify by a constant then we could try replacing a pseudo
5631 register with its equivalent constant where applicable.
5633 We also handle the case where the register was eliminated
5634 resulting in a PLUS subexpression.
5636 If we later decide to reload the whole PRE_MODIFY or
5637 POST_MODIFY, inc_for_reload might clobber the reload register
5638 before reading the index. The index register might therefore
5639 need to live longer than a TYPE reload normally would, so be
5640 conservative and class it as RELOAD_OTHER. */
5641 if ((REG_P (XEXP (op1, 1))
5642 && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5643 || GET_CODE (XEXP (op1, 1)) == PLUS)
5644 find_reloads_address_1 (mode, XEXP (op1, 1), 1, code, SCRATCH,
5645 &XEXP (op1, 1), opnum, RELOAD_OTHER,
5648 gcc_assert (REG_P (XEXP (op1, 0)));
5650 regno = REGNO (XEXP (op1, 0));
5651 index_code = GET_CODE (XEXP (op1, 1));
5653 /* A register that is incremented cannot be constant! */
5654 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5655 || reg_equiv_constant[regno] == 0);
5657 /* Handle a register that is equivalent to a memory location
5658 which cannot be addressed directly. */
5659 if (reg_equiv_memory_loc[regno] != 0
5660 && (reg_equiv_address[regno] != 0
5661 || num_not_at_initial_offset))
5663 rtx tem = make_memloc (XEXP (x, 0), regno);
5665 if (reg_equiv_address[regno]
5666 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5670 /* First reload the memory location's address.
5671 We can't use ADDR_TYPE (type) here, because we need to
5672 write back the value after reading it, hence we actually
5673 need two registers. */
5674 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5675 &XEXP (tem, 0), opnum,
5679 if (!rtx_equal_p (tem, orig))
5680 push_reg_equiv_alt_mem (regno, tem);
5682 /* Then reload the memory location into a base
5684 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5686 base_reg_class (mode, code,
5688 GET_MODE (x), GET_MODE (x), 0,
5689 0, opnum, RELOAD_OTHER);
5691 update_auto_inc_notes (this_insn, regno, reloadnum);
5696 if (reg_renumber[regno] >= 0)
5697 regno = reg_renumber[regno];
5699 /* We require a base register here... */
5700 if (!regno_ok_for_base_p (regno, GET_MODE (x), code, index_code))
5702 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5703 &XEXP (op1, 0), &XEXP (x, 0),
5704 base_reg_class (mode, code, index_code),
5705 GET_MODE (x), GET_MODE (x), 0, 0,
5706 opnum, RELOAD_OTHER);
5708 update_auto_inc_notes (this_insn, regno, reloadnum);
5718 if (REG_P (XEXP (x, 0)))
5720 int regno = REGNO (XEXP (x, 0));
5724 /* A register that is incremented cannot be constant! */
5725 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5726 || reg_equiv_constant[regno] == 0);
5728 /* Handle a register that is equivalent to a memory location
5729 which cannot be addressed directly. */
5730 if (reg_equiv_memory_loc[regno] != 0
5731 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5733 rtx tem = make_memloc (XEXP (x, 0), regno);
5734 if (reg_equiv_address[regno]
5735 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5739 /* First reload the memory location's address.
5740 We can't use ADDR_TYPE (type) here, because we need to
5741 write back the value after reading it, hence we actually
5742 need two registers. */
5743 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5744 &XEXP (tem, 0), opnum, type,
5746 if (!rtx_equal_p (tem, orig))
5747 push_reg_equiv_alt_mem (regno, tem);
5748 /* Put this inside a new increment-expression. */
5749 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5750 /* Proceed to reload that, as if it contained a register. */
5754 /* If we have a hard register that is ok in this incdec context,
5755 don't make a reload. If the register isn't nice enough for
5756 autoincdec, we can reload it. But, if an autoincrement of a
5757 register that we here verified as playing nice, still outside
5758 isn't "valid", it must be that no autoincrement is "valid".
5759 If that is true and something made an autoincrement anyway,
5760 this must be a special context where one is allowed.
5761 (For example, a "push" instruction.)
5762 We can't improve this address, so leave it alone. */
5764 /* Otherwise, reload the autoincrement into a suitable hard reg
5765 and record how much to increment by. */
5767 if (reg_renumber[regno] >= 0)
5768 regno = reg_renumber[regno];
5769 if (regno >= FIRST_PSEUDO_REGISTER
5770 || !REG_OK_FOR_CONTEXT (context, regno, mode, code,
5775 /* If we can output the register afterwards, do so, this
5776 saves the extra update.
5777 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5778 CALL_INSN - and it does not set CC0.
5779 But don't do this if we cannot directly address the
5780 memory location, since this will make it harder to
5781 reuse address reloads, and increases register pressure.
5782 Also don't do this if we can probably update x directly. */
5783 rtx equiv = (MEM_P (XEXP (x, 0))
5785 : reg_equiv_mem[regno]);
5786 int icode = (int) optab_handler (add_optab, Pmode)->insn_code;
5787 if (insn && NONJUMP_INSN_P (insn) && equiv
5788 && memory_operand (equiv, GET_MODE (equiv))
5790 && ! sets_cc0_p (PATTERN (insn))
5792 && ! (icode != CODE_FOR_nothing
5793 && ((*insn_data[icode].operand[0].predicate)
5795 && ((*insn_data[icode].operand[1].predicate)
5798 /* We use the original pseudo for loc, so that
5799 emit_reload_insns() knows which pseudo this
5800 reload refers to and updates the pseudo rtx, not
5801 its equivalent memory location, as well as the
5802 corresponding entry in reg_last_reload_reg. */
5803 loc = &XEXP (x_orig, 0);
5806 = push_reload (x, x, loc, loc,
5808 GET_MODE (x), GET_MODE (x), 0, 0,
5809 opnum, RELOAD_OTHER);
5814 = push_reload (x, x, loc, (rtx*) 0,
5816 GET_MODE (x), GET_MODE (x), 0, 0,
5819 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5824 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5834 /* Look for parts to reload in the inner expression and reload them
5835 too, in addition to this operation. Reloading all inner parts in
5836 addition to this one shouldn't be necessary, but at this point,
5837 we don't know if we can possibly omit any part that *can* be
5838 reloaded. Targets that are better off reloading just either part
5839 (or perhaps even a different part of an outer expression), should
5840 define LEGITIMIZE_RELOAD_ADDRESS. */
5841 find_reloads_address_1 (GET_MODE (XEXP (x, 0)), XEXP (x, 0),
5842 context, code, SCRATCH, &XEXP (x, 0), opnum,
5843 type, ind_levels, insn);
5844 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5846 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5850 /* This is probably the result of a substitution, by eliminate_regs, of
5851 an equivalent address for a pseudo that was not allocated to a hard
5852 register. Verify that the specified address is valid and reload it
5855 Since we know we are going to reload this item, don't decrement for
5856 the indirection level.
5858 Note that this is actually conservative: it would be slightly more
5859 efficient to use the value of SPILL_INDIRECT_LEVELS from
5862 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5863 opnum, ADDR_TYPE (type), ind_levels, insn);
5864 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5866 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5871 int regno = REGNO (x);
5873 if (reg_equiv_constant[regno] != 0)
5875 find_reloads_address_part (reg_equiv_constant[regno], loc,
5877 GET_MODE (x), opnum, type, ind_levels);
5881 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5882 that feeds this insn. */
5883 if (reg_equiv_mem[regno] != 0)
5885 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5887 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5892 if (reg_equiv_memory_loc[regno]
5893 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5895 rtx tem = make_memloc (x, regno);
5896 if (reg_equiv_address[regno] != 0
5897 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5900 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5901 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5903 if (!rtx_equal_p (x, tem))
5904 push_reg_equiv_alt_mem (regno, x);
5908 if (reg_renumber[regno] >= 0)
5909 regno = reg_renumber[regno];
5911 if (regno >= FIRST_PSEUDO_REGISTER
5912 || !REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5915 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5917 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5921 /* If a register appearing in an address is the subject of a CLOBBER
5922 in this insn, reload it into some other register to be safe.
5923 The CLOBBER is supposed to make the register unavailable
5924 from before this insn to after it. */
5925 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5927 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5929 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5936 if (REG_P (SUBREG_REG (x)))
5938 /* If this is a SUBREG of a hard register and the resulting register
5939 is of the wrong class, reload the whole SUBREG. This avoids
5940 needless copies if SUBREG_REG is multi-word. */
5941 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5943 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5945 if (!REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5948 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5950 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5954 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5955 is larger than the class size, then reload the whole SUBREG. */
5958 enum reg_class rclass = context_reg_class;
5959 if ((unsigned) CLASS_MAX_NREGS (rclass, GET_MODE (SUBREG_REG (x)))
5960 > reg_class_size[rclass])
5962 x = find_reloads_subreg_address (x, 0, opnum,
5965 push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass,
5966 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5978 const char *fmt = GET_RTX_FORMAT (code);
5981 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5984 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
5986 find_reloads_address_1 (mode, XEXP (x, i), context, code, SCRATCH,
5987 &XEXP (x, i), opnum, type, ind_levels, insn);
5991 #undef REG_OK_FOR_CONTEXT
5995 /* X, which is found at *LOC, is a part of an address that needs to be
5996 reloaded into a register of class RCLASS. If X is a constant, or if
5997 X is a PLUS that contains a constant, check that the constant is a
5998 legitimate operand and that we are supposed to be able to load
5999 it into the register.
6001 If not, force the constant into memory and reload the MEM instead.
6003 MODE is the mode to use, in case X is an integer constant.
6005 OPNUM and TYPE describe the purpose of any reloads made.
6007 IND_LEVELS says how many levels of indirect addressing this machine
6011 find_reloads_address_part (rtx x, rtx *loc, enum reg_class rclass,
6012 enum machine_mode mode, int opnum,
6013 enum reload_type type, int ind_levels)
6016 && (! LEGITIMATE_CONSTANT_P (x)
6017 || PREFERRED_RELOAD_CLASS (x, rclass) == NO_REGS))
6019 x = force_const_mem (mode, x);
6020 find_reloads_address (mode, &x, XEXP (x, 0), &XEXP (x, 0),
6021 opnum, type, ind_levels, 0);
6024 else if (GET_CODE (x) == PLUS
6025 && CONSTANT_P (XEXP (x, 1))
6026 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
6027 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), rclass) == NO_REGS))
6031 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
6032 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
6033 find_reloads_address (mode, &XEXP (x, 1), XEXP (tem, 0), &XEXP (tem, 0),
6034 opnum, type, ind_levels, 0);
6037 push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass,
6038 mode, VOIDmode, 0, 0, opnum, type);
6041 /* X, a subreg of a pseudo, is a part of an address that needs to be
6044 If the pseudo is equivalent to a memory location that cannot be directly
6045 addressed, make the necessary address reloads.
6047 If address reloads have been necessary, or if the address is changed
6048 by register elimination, return the rtx of the memory location;
6049 otherwise, return X.
6051 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
6054 OPNUM and TYPE identify the purpose of the reload.
6056 IND_LEVELS says how many levels of indirect addressing are
6057 supported at this point in the address.
6059 INSN, if nonzero, is the insn in which we do the reload. It is used
6060 to determine where to put USEs for pseudos that we have to replace with
6064 find_reloads_subreg_address (rtx x, int force_replace, int opnum,
6065 enum reload_type type, int ind_levels, rtx insn)
6067 int regno = REGNO (SUBREG_REG (x));
6069 if (reg_equiv_memory_loc[regno])
6071 /* If the address is not directly addressable, or if the address is not
6072 offsettable, then it must be replaced. */
6074 && (reg_equiv_address[regno]
6075 || ! offsettable_memref_p (reg_equiv_mem[regno])))
6078 if (force_replace || num_not_at_initial_offset)
6080 rtx tem = make_memloc (SUBREG_REG (x), regno);
6082 /* If the address changes because of register elimination, then
6083 it must be replaced. */
6085 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
6087 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
6088 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
6093 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
6094 hold the correct (negative) byte offset. */
6095 if (BYTES_BIG_ENDIAN && outer_size > inner_size)
6096 offset = inner_size - outer_size;
6098 offset = SUBREG_BYTE (x);
6100 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
6101 PUT_MODE (tem, GET_MODE (x));
6102 if (MEM_OFFSET (tem))
6103 set_mem_offset (tem, plus_constant (MEM_OFFSET (tem), offset));
6105 /* If this was a paradoxical subreg that we replaced, the
6106 resulting memory must be sufficiently aligned to allow
6107 us to widen the mode of the memory. */
6108 if (outer_size > inner_size)
6112 base = XEXP (tem, 0);
6113 if (GET_CODE (base) == PLUS)
6115 if (GET_CODE (XEXP (base, 1)) == CONST_INT
6116 && INTVAL (XEXP (base, 1)) % outer_size != 0)
6118 base = XEXP (base, 0);
6121 || (REGNO_POINTER_ALIGN (REGNO (base))
6122 < outer_size * BITS_PER_UNIT))
6126 reloaded = find_reloads_address (GET_MODE (tem), &tem,
6127 XEXP (tem, 0), &XEXP (tem, 0),
6128 opnum, type, ind_levels, insn);
6129 /* ??? Do we need to handle nonzero offsets somehow? */
6130 if (!offset && !rtx_equal_p (tem, orig))
6131 push_reg_equiv_alt_mem (regno, tem);
6133 /* For some processors an address may be valid in the
6134 original mode but not in a smaller mode. For
6135 example, ARM accepts a scaled index register in
6136 SImode but not in HImode. Similarly, the address may
6137 have been valid before the subreg offset was added,
6138 but not afterwards. find_reloads_address
6139 assumes that we pass it a valid address, and doesn't
6140 force a reload. This will probably be fine if
6141 find_reloads_address finds some reloads. But if it
6142 doesn't find any, then we may have just converted a
6143 valid address into an invalid one. Check for that
6146 && !strict_memory_address_p (GET_MODE (tem),
6148 push_reload (XEXP (tem, 0), NULL_RTX, &XEXP (tem, 0), (rtx*) 0,
6149 base_reg_class (GET_MODE (tem), MEM, SCRATCH),
6150 GET_MODE (XEXP (tem, 0)), VOIDmode, 0, 0,
6153 /* If this is not a toplevel operand, find_reloads doesn't see
6154 this substitution. We have to emit a USE of the pseudo so
6155 that delete_output_reload can see it. */
6156 if (replace_reloads && recog_data.operand[opnum] != x)
6157 /* We mark the USE with QImode so that we recognize it
6158 as one that can be safely deleted at the end of
6160 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
6170 /* Substitute into the current INSN the registers into which we have reloaded
6171 the things that need reloading. The array `replacements'
6172 contains the locations of all pointers that must be changed
6173 and says what to replace them with.
6175 Return the rtx that X translates into; usually X, but modified. */
6178 subst_reloads (rtx insn)
6182 for (i = 0; i < n_replacements; i++)
6184 struct replacement *r = &replacements[i];
6185 rtx reloadreg = rld[r->what].reg_rtx;
6189 /* This checking takes a very long time on some platforms
6190 causing the gcc.c-torture/compile/limits-fnargs.c test
6191 to time out during testing. See PR 31850.
6193 Internal consistency test. Check that we don't modify
6194 anything in the equivalence arrays. Whenever something from
6195 those arrays needs to be reloaded, it must be unshared before
6196 being substituted into; the equivalence must not be modified.
6197 Otherwise, if the equivalence is used after that, it will
6198 have been modified, and the thing substituted (probably a
6199 register) is likely overwritten and not a usable equivalence. */
6202 for (check_regno = 0; check_regno < max_regno; check_regno++)
6204 #define CHECK_MODF(ARRAY) \
6205 gcc_assert (!ARRAY[check_regno] \
6206 || !loc_mentioned_in_p (r->where, \
6207 ARRAY[check_regno]))
6209 CHECK_MODF (reg_equiv_constant);
6210 CHECK_MODF (reg_equiv_memory_loc);
6211 CHECK_MODF (reg_equiv_address);
6212 CHECK_MODF (reg_equiv_mem);
6215 #endif /* DEBUG_RELOAD */
6217 /* If we're replacing a LABEL_REF with a register, there must
6218 already be an indication (to e.g. flow) which label this
6219 register refers to. */
6220 gcc_assert (GET_CODE (*r->where) != LABEL_REF
6222 || find_reg_note (insn,
6224 XEXP (*r->where, 0))
6225 || label_is_jump_target_p (XEXP (*r->where, 0), insn));
6227 /* Encapsulate RELOADREG so its machine mode matches what
6228 used to be there. Note that gen_lowpart_common will
6229 do the wrong thing if RELOADREG is multi-word. RELOADREG
6230 will always be a REG here. */
6231 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
6232 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6234 /* If we are putting this into a SUBREG and RELOADREG is a
6235 SUBREG, we would be making nested SUBREGs, so we have to fix
6236 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
6238 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
6240 if (GET_MODE (*r->subreg_loc)
6241 == GET_MODE (SUBREG_REG (reloadreg)))
6242 *r->subreg_loc = SUBREG_REG (reloadreg);
6246 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
6248 /* When working with SUBREGs the rule is that the byte
6249 offset must be a multiple of the SUBREG's mode. */
6250 final_offset = (final_offset /
6251 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6252 final_offset = (final_offset *
6253 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6255 *r->where = SUBREG_REG (reloadreg);
6256 SUBREG_BYTE (*r->subreg_loc) = final_offset;
6260 *r->where = reloadreg;
6262 /* If reload got no reg and isn't optional, something's wrong. */
6264 gcc_assert (rld[r->what].optional);
6268 /* Make a copy of any replacements being done into X and move those
6269 copies to locations in Y, a copy of X. */
6272 copy_replacements (rtx x, rtx y)
6274 /* We can't support X being a SUBREG because we might then need to know its
6275 location if something inside it was replaced. */
6276 gcc_assert (GET_CODE (x) != SUBREG);
6278 copy_replacements_1 (&x, &y, n_replacements);
6282 copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6286 struct replacement *r;
6290 for (j = 0; j < orig_replacements; j++)
6292 if (replacements[j].subreg_loc == px)
6294 r = &replacements[n_replacements++];
6295 r->where = replacements[j].where;
6297 r->what = replacements[j].what;
6298 r->mode = replacements[j].mode;
6300 else if (replacements[j].where == px)
6302 r = &replacements[n_replacements++];
6305 r->what = replacements[j].what;
6306 r->mode = replacements[j].mode;
6312 code = GET_CODE (x);
6313 fmt = GET_RTX_FORMAT (code);
6315 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6318 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6319 else if (fmt[i] == 'E')
6320 for (j = XVECLEN (x, i); --j >= 0; )
6321 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6326 /* Change any replacements being done to *X to be done to *Y. */
6329 move_replacements (rtx *x, rtx *y)
6333 for (i = 0; i < n_replacements; i++)
6334 if (replacements[i].subreg_loc == x)
6335 replacements[i].subreg_loc = y;
6336 else if (replacements[i].where == x)
6338 replacements[i].where = y;
6339 replacements[i].subreg_loc = 0;
6343 /* If LOC was scheduled to be replaced by something, return the replacement.
6344 Otherwise, return *LOC. */
6347 find_replacement (rtx *loc)
6349 struct replacement *r;
6351 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6353 rtx reloadreg = rld[r->what].reg_rtx;
6355 if (reloadreg && r->where == loc)
6357 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6358 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6362 else if (reloadreg && r->subreg_loc == loc)
6364 /* RELOADREG must be either a REG or a SUBREG.
6366 ??? Is it actually still ever a SUBREG? If so, why? */
6368 if (REG_P (reloadreg))
6369 return gen_rtx_REG (GET_MODE (*loc),
6370 (REGNO (reloadreg) +
6371 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6372 GET_MODE (SUBREG_REG (*loc)),
6375 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6379 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6381 /* When working with SUBREGs the rule is that the byte
6382 offset must be a multiple of the SUBREG's mode. */
6383 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6384 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6385 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6391 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6392 what's inside and make a new rtl if so. */
6393 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6394 || GET_CODE (*loc) == MULT)
6396 rtx x = find_replacement (&XEXP (*loc, 0));
6397 rtx y = find_replacement (&XEXP (*loc, 1));
6399 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6400 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6406 /* Return nonzero if register in range [REGNO, ENDREGNO)
6407 appears either explicitly or implicitly in X
6408 other than being stored into (except for earlyclobber operands).
6410 References contained within the substructure at LOC do not count.
6411 LOC may be zero, meaning don't ignore anything.
6413 This is similar to refers_to_regno_p in rtlanal.c except that we
6414 look at equivalences for pseudos that didn't get hard registers. */
6417 refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6429 code = GET_CODE (x);
6436 /* If this is a pseudo, a hard register must not have been allocated.
6437 X must therefore either be a constant or be in memory. */
6438 if (r >= FIRST_PSEUDO_REGISTER)
6440 if (reg_equiv_memory_loc[r])
6441 return refers_to_regno_for_reload_p (regno, endregno,
6442 reg_equiv_memory_loc[r],
6445 gcc_assert (reg_equiv_constant[r] || reg_equiv_invariant[r]);
6449 return (endregno > r
6450 && regno < r + (r < FIRST_PSEUDO_REGISTER
6451 ? hard_regno_nregs[r][GET_MODE (x)]
6455 /* If this is a SUBREG of a hard reg, we can see exactly which
6456 registers are being modified. Otherwise, handle normally. */
6457 if (REG_P (SUBREG_REG (x))
6458 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6460 unsigned int inner_regno = subreg_regno (x);
6461 unsigned int inner_endregno
6462 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6463 ? subreg_nregs (x) : 1);
6465 return endregno > inner_regno && regno < inner_endregno;
6471 if (&SET_DEST (x) != loc
6472 /* Note setting a SUBREG counts as referring to the REG it is in for
6473 a pseudo but not for hard registers since we can
6474 treat each word individually. */
6475 && ((GET_CODE (SET_DEST (x)) == SUBREG
6476 && loc != &SUBREG_REG (SET_DEST (x))
6477 && REG_P (SUBREG_REG (SET_DEST (x)))
6478 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6479 && refers_to_regno_for_reload_p (regno, endregno,
6480 SUBREG_REG (SET_DEST (x)),
6482 /* If the output is an earlyclobber operand, this is
6484 || ((!REG_P (SET_DEST (x))
6485 || earlyclobber_operand_p (SET_DEST (x)))
6486 && refers_to_regno_for_reload_p (regno, endregno,
6487 SET_DEST (x), loc))))
6490 if (code == CLOBBER || loc == &SET_SRC (x))
6499 /* X does not match, so try its subexpressions. */
6501 fmt = GET_RTX_FORMAT (code);
6502 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6504 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6512 if (refers_to_regno_for_reload_p (regno, endregno,
6516 else if (fmt[i] == 'E')
6519 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6520 if (loc != &XVECEXP (x, i, j)
6521 && refers_to_regno_for_reload_p (regno, endregno,
6522 XVECEXP (x, i, j), loc))
6529 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6530 we check if any register number in X conflicts with the relevant register
6531 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6532 contains a MEM (we don't bother checking for memory addresses that can't
6533 conflict because we expect this to be a rare case.
6535 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6536 that we look at equivalences for pseudos that didn't get hard registers. */
6539 reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6541 int regno, endregno;
6543 /* Overly conservative. */
6544 if (GET_CODE (x) == STRICT_LOW_PART
6545 || GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
6548 /* If either argument is a constant, then modifying X can not affect IN. */
6549 if (CONSTANT_P (x) || CONSTANT_P (in))
6551 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == MEM)
6552 return refers_to_mem_for_reload_p (in);
6553 else if (GET_CODE (x) == SUBREG)
6555 regno = REGNO (SUBREG_REG (x));
6556 if (regno < FIRST_PSEUDO_REGISTER)
6557 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6558 GET_MODE (SUBREG_REG (x)),
6561 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6562 ? subreg_nregs (x) : 1);
6564 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6570 /* If this is a pseudo, it must not have been assigned a hard register.
6571 Therefore, it must either be in memory or be a constant. */
6573 if (regno >= FIRST_PSEUDO_REGISTER)
6575 if (reg_equiv_memory_loc[regno])
6576 return refers_to_mem_for_reload_p (in);
6577 gcc_assert (reg_equiv_constant[regno]);
6581 endregno = END_HARD_REGNO (x);
6583 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6586 return refers_to_mem_for_reload_p (in);
6587 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6588 || GET_CODE (x) == CC0)
6589 return reg_mentioned_p (x, in);
6592 gcc_assert (GET_CODE (x) == PLUS);
6594 /* We actually want to know if X is mentioned somewhere inside IN.
6595 We must not say that (plus (sp) (const_int 124)) is in
6596 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6597 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6598 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6603 else if (GET_CODE (in) == PLUS)
6604 return (rtx_equal_p (x, in)
6605 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6606 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6607 else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6608 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6614 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6618 refers_to_mem_for_reload_p (rtx x)
6627 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6628 && reg_equiv_memory_loc[REGNO (x)]);
6630 fmt = GET_RTX_FORMAT (GET_CODE (x));
6631 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6633 && (MEM_P (XEXP (x, i))
6634 || refers_to_mem_for_reload_p (XEXP (x, i))))
6640 /* Check the insns before INSN to see if there is a suitable register
6641 containing the same value as GOAL.
6642 If OTHER is -1, look for a register in class RCLASS.
6643 Otherwise, just see if register number OTHER shares GOAL's value.
6645 Return an rtx for the register found, or zero if none is found.
6647 If RELOAD_REG_P is (short *)1,
6648 we reject any hard reg that appears in reload_reg_rtx
6649 because such a hard reg is also needed coming into this insn.
6651 If RELOAD_REG_P is any other nonzero value,
6652 it is a vector indexed by hard reg number
6653 and we reject any hard reg whose element in the vector is nonnegative
6654 as well as any that appears in reload_reg_rtx.
6656 If GOAL is zero, then GOALREG is a register number; we look
6657 for an equivalent for that register.
6659 MODE is the machine mode of the value we want an equivalence for.
6660 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6662 This function is used by jump.c as well as in the reload pass.
6664 If GOAL is the sum of the stack pointer and a constant, we treat it
6665 as if it were a constant except that sp is required to be unchanging. */
6668 find_equiv_reg (rtx goal, rtx insn, enum reg_class rclass, int other,
6669 short *reload_reg_p, int goalreg, enum machine_mode mode)
6672 rtx goaltry, valtry, value, where;
6678 int goal_mem_addr_varies = 0;
6679 int need_stable_sp = 0;
6686 else if (REG_P (goal))
6687 regno = REGNO (goal);
6688 else if (MEM_P (goal))
6690 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6691 if (MEM_VOLATILE_P (goal))
6693 if (flag_float_store && SCALAR_FLOAT_MODE_P (GET_MODE (goal)))
6695 /* An address with side effects must be reexecuted. */
6710 else if (CONSTANT_P (goal))
6712 else if (GET_CODE (goal) == PLUS
6713 && XEXP (goal, 0) == stack_pointer_rtx
6714 && CONSTANT_P (XEXP (goal, 1)))
6715 goal_const = need_stable_sp = 1;
6716 else if (GET_CODE (goal) == PLUS
6717 && XEXP (goal, 0) == frame_pointer_rtx
6718 && CONSTANT_P (XEXP (goal, 1)))
6724 /* Scan insns back from INSN, looking for one that copies
6725 a value into or out of GOAL.
6726 Stop and give up if we reach a label. */
6732 if (p == 0 || LABEL_P (p)
6733 || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6736 if (NONJUMP_INSN_P (p)
6737 /* If we don't want spill regs ... */
6738 && (! (reload_reg_p != 0
6739 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6740 /* ... then ignore insns introduced by reload; they aren't
6741 useful and can cause results in reload_as_needed to be
6742 different from what they were when calculating the need for
6743 spills. If we notice an input-reload insn here, we will
6744 reject it below, but it might hide a usable equivalent.
6745 That makes bad code. It may even fail: perhaps no reg was
6746 spilled for this insn because it was assumed we would find
6748 || INSN_UID (p) < reload_first_uid))
6751 pat = single_set (p);
6753 /* First check for something that sets some reg equal to GOAL. */
6756 && true_regnum (SET_SRC (pat)) == regno
6757 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6760 && true_regnum (SET_DEST (pat)) == regno
6761 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6763 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6764 /* When looking for stack pointer + const,
6765 make sure we don't use a stack adjust. */
6766 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6767 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6769 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6770 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6772 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6773 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6774 /* If we are looking for a constant,
6775 and something equivalent to that constant was copied
6776 into a reg, we can use that reg. */
6777 || (goal_const && REG_NOTES (p) != 0
6778 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6779 && ((rtx_equal_p (XEXP (tem, 0), goal)
6781 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6782 || (REG_P (SET_DEST (pat))
6783 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6784 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6785 && GET_CODE (goal) == CONST_INT
6787 = operand_subword (XEXP (tem, 0), 0, 0,
6789 && rtx_equal_p (goal, goaltry)
6791 = operand_subword (SET_DEST (pat), 0, 0,
6793 && (valueno = true_regnum (valtry)) >= 0)))
6794 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6796 && REG_P (SET_DEST (pat))
6797 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6798 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6799 && GET_CODE (goal) == CONST_INT
6800 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6802 && rtx_equal_p (goal, goaltry)
6804 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6805 && (valueno = true_regnum (valtry)) >= 0)))
6809 if (valueno != other)
6812 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6814 else if (!in_hard_reg_set_p (reg_class_contents[(int) rclass],
6824 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6825 (or copying VALUE into GOAL, if GOAL is also a register).
6826 Now verify that VALUE is really valid. */
6828 /* VALUENO is the register number of VALUE; a hard register. */
6830 /* Don't try to re-use something that is killed in this insn. We want
6831 to be able to trust REG_UNUSED notes. */
6832 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6835 /* If we propose to get the value from the stack pointer or if GOAL is
6836 a MEM based on the stack pointer, we need a stable SP. */
6837 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6838 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6842 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6843 if (GET_MODE (value) != mode)
6846 /* Reject VALUE if it was loaded from GOAL
6847 and is also a register that appears in the address of GOAL. */
6849 if (goal_mem && value == SET_DEST (single_set (where))
6850 && refers_to_regno_for_reload_p (valueno, end_hard_regno (mode, valueno),
6854 /* Reject registers that overlap GOAL. */
6856 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6857 nregs = hard_regno_nregs[regno][mode];
6860 valuenregs = hard_regno_nregs[valueno][mode];
6862 if (!goal_mem && !goal_const
6863 && regno + nregs > valueno && regno < valueno + valuenregs)
6866 /* Reject VALUE if it is one of the regs reserved for reloads.
6867 Reload1 knows how to reuse them anyway, and it would get
6868 confused if we allocated one without its knowledge.
6869 (Now that insns introduced by reload are ignored above,
6870 this case shouldn't happen, but I'm not positive.) */
6872 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6875 for (i = 0; i < valuenregs; ++i)
6876 if (reload_reg_p[valueno + i] >= 0)
6880 /* Reject VALUE if it is a register being used for an input reload
6881 even if it is not one of those reserved. */
6883 if (reload_reg_p != 0)
6886 for (i = 0; i < n_reloads; i++)
6887 if (rld[i].reg_rtx != 0 && rld[i].in)
6889 int regno1 = REGNO (rld[i].reg_rtx);
6890 int nregs1 = hard_regno_nregs[regno1]
6891 [GET_MODE (rld[i].reg_rtx)];
6892 if (regno1 < valueno + valuenregs
6893 && regno1 + nregs1 > valueno)
6899 /* We must treat frame pointer as varying here,
6900 since it can vary--in a nonlocal goto as generated by expand_goto. */
6901 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6903 /* Now verify that the values of GOAL and VALUE remain unaltered
6904 until INSN is reached. */
6913 /* Don't trust the conversion past a function call
6914 if either of the two is in a call-clobbered register, or memory. */
6919 if (goal_mem || need_stable_sp)
6922 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6923 for (i = 0; i < nregs; ++i)
6924 if (call_used_regs[regno + i]
6925 || HARD_REGNO_CALL_PART_CLOBBERED (regno + i, mode))
6928 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6929 for (i = 0; i < valuenregs; ++i)
6930 if (call_used_regs[valueno + i]
6931 || HARD_REGNO_CALL_PART_CLOBBERED (valueno + i, mode))
6939 /* Watch out for unspec_volatile, and volatile asms. */
6940 if (volatile_insn_p (pat))
6943 /* If this insn P stores in either GOAL or VALUE, return 0.
6944 If GOAL is a memory ref and this insn writes memory, return 0.
6945 If GOAL is a memory ref and its address is not constant,
6946 and this insn P changes a register used in GOAL, return 0. */
6948 if (GET_CODE (pat) == COND_EXEC)
6949 pat = COND_EXEC_CODE (pat);
6950 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6952 rtx dest = SET_DEST (pat);
6953 while (GET_CODE (dest) == SUBREG
6954 || GET_CODE (dest) == ZERO_EXTRACT
6955 || GET_CODE (dest) == STRICT_LOW_PART)
6956 dest = XEXP (dest, 0);
6959 int xregno = REGNO (dest);
6961 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6962 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6965 if (xregno < regno + nregs && xregno + xnregs > regno)
6967 if (xregno < valueno + valuenregs
6968 && xregno + xnregs > valueno)
6970 if (goal_mem_addr_varies
6971 && reg_overlap_mentioned_for_reload_p (dest, goal))
6973 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6976 else if (goal_mem && MEM_P (dest)
6977 && ! push_operand (dest, GET_MODE (dest)))
6979 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6980 && reg_equiv_memory_loc[regno] != 0)
6982 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6985 else if (GET_CODE (pat) == PARALLEL)
6988 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6990 rtx v1 = XVECEXP (pat, 0, i);
6991 if (GET_CODE (v1) == COND_EXEC)
6992 v1 = COND_EXEC_CODE (v1);
6993 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6995 rtx dest = SET_DEST (v1);
6996 while (GET_CODE (dest) == SUBREG
6997 || GET_CODE (dest) == ZERO_EXTRACT
6998 || GET_CODE (dest) == STRICT_LOW_PART)
6999 dest = XEXP (dest, 0);
7002 int xregno = REGNO (dest);
7004 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
7005 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
7008 if (xregno < regno + nregs
7009 && xregno + xnregs > regno)
7011 if (xregno < valueno + valuenregs
7012 && xregno + xnregs > valueno)
7014 if (goal_mem_addr_varies
7015 && reg_overlap_mentioned_for_reload_p (dest,
7018 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
7021 else if (goal_mem && MEM_P (dest)
7022 && ! push_operand (dest, GET_MODE (dest)))
7024 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
7025 && reg_equiv_memory_loc[regno] != 0)
7027 else if (need_stable_sp
7028 && push_operand (dest, GET_MODE (dest)))
7034 if (CALL_P (p) && CALL_INSN_FUNCTION_USAGE (p))
7038 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
7039 link = XEXP (link, 1))
7041 pat = XEXP (link, 0);
7042 if (GET_CODE (pat) == CLOBBER)
7044 rtx dest = SET_DEST (pat);
7048 int xregno = REGNO (dest);
7050 = hard_regno_nregs[xregno][GET_MODE (dest)];
7052 if (xregno < regno + nregs
7053 && xregno + xnregs > regno)
7055 else if (xregno < valueno + valuenregs
7056 && xregno + xnregs > valueno)
7058 else if (goal_mem_addr_varies
7059 && reg_overlap_mentioned_for_reload_p (dest,
7064 else if (goal_mem && MEM_P (dest)
7065 && ! push_operand (dest, GET_MODE (dest)))
7067 else if (need_stable_sp
7068 && push_operand (dest, GET_MODE (dest)))
7075 /* If this insn auto-increments or auto-decrements
7076 either regno or valueno, return 0 now.
7077 If GOAL is a memory ref and its address is not constant,
7078 and this insn P increments a register used in GOAL, return 0. */
7082 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
7083 if (REG_NOTE_KIND (link) == REG_INC
7084 && REG_P (XEXP (link, 0)))
7086 int incno = REGNO (XEXP (link, 0));
7087 if (incno < regno + nregs && incno >= regno)
7089 if (incno < valueno + valuenregs && incno >= valueno)
7091 if (goal_mem_addr_varies
7092 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
7102 /* Find a place where INCED appears in an increment or decrement operator
7103 within X, and return the amount INCED is incremented or decremented by.
7104 The value is always positive. */
7107 find_inc_amount (rtx x, rtx inced)
7109 enum rtx_code code = GET_CODE (x);
7115 rtx addr = XEXP (x, 0);
7116 if ((GET_CODE (addr) == PRE_DEC
7117 || GET_CODE (addr) == POST_DEC
7118 || GET_CODE (addr) == PRE_INC
7119 || GET_CODE (addr) == POST_INC)
7120 && XEXP (addr, 0) == inced)
7121 return GET_MODE_SIZE (GET_MODE (x));
7122 else if ((GET_CODE (addr) == PRE_MODIFY
7123 || GET_CODE (addr) == POST_MODIFY)
7124 && GET_CODE (XEXP (addr, 1)) == PLUS
7125 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
7126 && XEXP (addr, 0) == inced
7127 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
7129 i = INTVAL (XEXP (XEXP (addr, 1), 1));
7130 return i < 0 ? -i : i;
7134 fmt = GET_RTX_FORMAT (code);
7135 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7139 int tem = find_inc_amount (XEXP (x, i), inced);
7146 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7148 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
7158 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7159 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7163 reg_inc_found_and_valid_p (unsigned int regno, unsigned int endregno,
7170 if (! INSN_P (insn))
7173 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
7174 if (REG_NOTE_KIND (link) == REG_INC)
7176 unsigned int test = (int) REGNO (XEXP (link, 0));
7177 if (test >= regno && test < endregno)
7184 #define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7188 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7189 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7190 REG_INC. REGNO must refer to a hard register. */
7193 regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
7196 unsigned int nregs, endregno;
7198 /* regno must be a hard register. */
7199 gcc_assert (regno < FIRST_PSEUDO_REGISTER);
7201 nregs = hard_regno_nregs[regno][mode];
7202 endregno = regno + nregs;
7204 if ((GET_CODE (PATTERN (insn)) == CLOBBER
7205 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7206 && REG_P (XEXP (PATTERN (insn), 0)))
7208 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
7210 return test >= regno && test < endregno;
7213 if (sets == 2 && reg_inc_found_and_valid_p (regno, endregno, insn))
7216 if (GET_CODE (PATTERN (insn)) == PARALLEL)
7218 int i = XVECLEN (PATTERN (insn), 0) - 1;
7222 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7223 if ((GET_CODE (elt) == CLOBBER
7224 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7225 && REG_P (XEXP (elt, 0)))
7227 unsigned int test = REGNO (XEXP (elt, 0));
7229 if (test >= regno && test < endregno)
7233 && reg_inc_found_and_valid_p (regno, endregno, elt))
7241 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7243 reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
7247 if (GET_MODE (reloadreg) == mode)
7250 regno = REGNO (reloadreg);
7252 if (WORDS_BIG_ENDIAN)
7253 regno += (int) hard_regno_nregs[regno][GET_MODE (reloadreg)]
7254 - (int) hard_regno_nregs[regno][mode];
7256 return gen_rtx_REG (mode, regno);
7259 static const char *const reload_when_needed_name[] =
7262 "RELOAD_FOR_OUTPUT",
7264 "RELOAD_FOR_INPUT_ADDRESS",
7265 "RELOAD_FOR_INPADDR_ADDRESS",
7266 "RELOAD_FOR_OUTPUT_ADDRESS",
7267 "RELOAD_FOR_OUTADDR_ADDRESS",
7268 "RELOAD_FOR_OPERAND_ADDRESS",
7269 "RELOAD_FOR_OPADDR_ADDR",
7271 "RELOAD_FOR_OTHER_ADDRESS"
7274 /* These functions are used to print the variables set by 'find_reloads' */
7277 debug_reload_to_stream (FILE *f)
7284 for (r = 0; r < n_reloads; r++)
7286 fprintf (f, "Reload %d: ", r);
7290 fprintf (f, "reload_in (%s) = ",
7291 GET_MODE_NAME (rld[r].inmode));
7292 print_inline_rtx (f, rld[r].in, 24);
7293 fprintf (f, "\n\t");
7296 if (rld[r].out != 0)
7298 fprintf (f, "reload_out (%s) = ",
7299 GET_MODE_NAME (rld[r].outmode));
7300 print_inline_rtx (f, rld[r].out, 24);
7301 fprintf (f, "\n\t");
7304 fprintf (f, "%s, ", reg_class_names[(int) rld[r].rclass]);
7306 fprintf (f, "%s (opnum = %d)",
7307 reload_when_needed_name[(int) rld[r].when_needed],
7310 if (rld[r].optional)
7311 fprintf (f, ", optional");
7313 if (rld[r].nongroup)
7314 fprintf (f, ", nongroup");
7316 if (rld[r].inc != 0)
7317 fprintf (f, ", inc by %d", rld[r].inc);
7319 if (rld[r].nocombine)
7320 fprintf (f, ", can't combine");
7322 if (rld[r].secondary_p)
7323 fprintf (f, ", secondary_reload_p");
7325 if (rld[r].in_reg != 0)
7327 fprintf (f, "\n\treload_in_reg: ");
7328 print_inline_rtx (f, rld[r].in_reg, 24);
7331 if (rld[r].out_reg != 0)
7333 fprintf (f, "\n\treload_out_reg: ");
7334 print_inline_rtx (f, rld[r].out_reg, 24);
7337 if (rld[r].reg_rtx != 0)
7339 fprintf (f, "\n\treload_reg_rtx: ");
7340 print_inline_rtx (f, rld[r].reg_rtx, 24);
7344 if (rld[r].secondary_in_reload != -1)
7346 fprintf (f, "%ssecondary_in_reload = %d",
7347 prefix, rld[r].secondary_in_reload);
7351 if (rld[r].secondary_out_reload != -1)
7352 fprintf (f, "%ssecondary_out_reload = %d\n",
7353 prefix, rld[r].secondary_out_reload);
7356 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7358 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7359 insn_data[rld[r].secondary_in_icode].name);
7363 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7364 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7365 insn_data[rld[r].secondary_out_icode].name);
7374 debug_reload_to_stream (stderr);