1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92, 93, 1994 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "insn-config.h"
92 #include "insn-codes.h"
96 #include "hard-reg-set.h"
100 #ifndef REGISTER_MOVE_COST
101 #define REGISTER_MOVE_COST(x, y) 2
104 /* The variables set up by `find_reloads' are:
106 n_reloads number of distinct reloads needed; max reload # + 1
107 tables indexed by reload number
108 reload_in rtx for value to reload from
109 reload_out rtx for where to store reload-reg afterward if nec
110 (often the same as reload_in)
111 reload_reg_class enum reg_class, saying what regs to reload into
112 reload_inmode enum machine_mode; mode this operand should have
113 when reloaded, on input.
114 reload_outmode enum machine_mode; mode this operand should have
115 when reloaded, on output.
116 reload_optional char, nonzero for an optional reload.
117 Optional reloads are ignored unless the
118 value is already sitting in a register.
119 reload_inc int, positive amount to increment or decrement by if
120 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
121 Ignored otherwise (don't assume it is zero).
122 reload_in_reg rtx. A reg for which reload_in is the equivalent.
123 If reload_in is a symbol_ref which came from
124 reg_equiv_constant, then this is the pseudo
125 which has that symbol_ref as equivalent.
126 reload_reg_rtx rtx. This is the register to reload into.
127 If it is zero when `find_reloads' returns,
128 you must find a suitable register in the class
129 specified by reload_reg_class, and store here
130 an rtx for that register with mode from
131 reload_inmode or reload_outmode.
132 reload_nocombine char, nonzero if this reload shouldn't be
133 combined with another reload.
134 reload_opnum int, operand number being reloaded. This is
135 used to group related reloads and need not always
136 be equal to the actual operand number in the insn,
137 though it current will be; for in-out operands, it
138 is one of the two operand numbers.
139 reload_when_needed enum, classifies reload as needed either for
140 addressing an input reload, addressing an output,
141 for addressing a non-reloaded mem ref,
142 or for unspecified purposes (i.e., more than one
144 reload_secondary_p int, 1 if this is a secondary register for one
146 reload_secondary_in_reload
147 reload_secondary_out_reload
148 int, gives the reload number of a secondary
149 reload, when needed; otherwise -1
150 reload_secondary_in_icode
151 reload_secondary_out_icode
152 enum insn_code, if a secondary reload is required,
153 gives the INSN_CODE that uses the secondary
154 reload as a scratch register, or CODE_FOR_nothing
155 if the secondary reload register is to be an
156 intermediate register. */
159 rtx reload_in[MAX_RELOADS];
160 rtx reload_out[MAX_RELOADS];
161 enum reg_class reload_reg_class[MAX_RELOADS];
162 enum machine_mode reload_inmode[MAX_RELOADS];
163 enum machine_mode reload_outmode[MAX_RELOADS];
164 rtx reload_reg_rtx[MAX_RELOADS];
165 char reload_optional[MAX_RELOADS];
166 int reload_inc[MAX_RELOADS];
167 rtx reload_in_reg[MAX_RELOADS];
168 char reload_nocombine[MAX_RELOADS];
169 int reload_opnum[MAX_RELOADS];
170 enum reload_type reload_when_needed[MAX_RELOADS];
171 int reload_secondary_p[MAX_RELOADS];
172 int reload_secondary_in_reload[MAX_RELOADS];
173 int reload_secondary_out_reload[MAX_RELOADS];
174 enum insn_code reload_secondary_in_icode[MAX_RELOADS];
175 enum insn_code reload_secondary_out_icode[MAX_RELOADS];
177 /* All the "earlyclobber" operands of the current insn
178 are recorded here. */
180 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
182 int reload_n_operands;
184 /* Replacing reloads.
186 If `replace_reloads' is nonzero, then as each reload is recorded
187 an entry is made for it in the table `replacements'.
188 Then later `subst_reloads' can look through that table and
189 perform all the replacements needed. */
191 /* Nonzero means record the places to replace. */
192 static int replace_reloads;
194 /* Each replacement is recorded with a structure like this. */
197 rtx *where; /* Location to store in */
198 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
199 a SUBREG; 0 otherwise. */
200 int what; /* which reload this is for */
201 enum machine_mode mode; /* mode it must have */
204 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
206 /* Number of replacements currently recorded. */
207 static int n_replacements;
209 /* Used to track what is modified by an operand. */
212 int reg_flag; /* Nonzero if referencing a register. */
213 int safe; /* Nonzero if this can't conflict with anything. */
214 rtx base; /* Base adddress for MEM. */
215 HOST_WIDE_INT start; /* Starting offset or register number. */
216 HOST_WIDE_INT end; /* Endinf offset or register number. */
219 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
220 (see reg_equiv_address). */
221 static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
222 static int n_memlocs;
224 #ifdef SECONDARY_MEMORY_NEEDED
226 /* Save MEMs needed to copy from one class of registers to another. One MEM
227 is used per mode, but normally only one or two modes are ever used.
229 We keep two versions, before and after register elimination. The one
230 after register elimination is record separately for each operand. This
231 is done in case the address is not valid to be sure that we separately
234 static rtx secondary_memlocs[NUM_MACHINE_MODES];
235 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
238 /* The instruction we are doing reloads for;
239 so we can test whether a register dies in it. */
240 static rtx this_insn;
242 /* Nonzero if this instruction is a user-specified asm with operands. */
243 static int this_insn_is_asm;
245 /* If hard_regs_live_known is nonzero,
246 we can tell which hard regs are currently live,
247 at least enough to succeed in choosing dummy reloads. */
248 static int hard_regs_live_known;
250 /* Indexed by hard reg number,
251 element is nonegative if hard reg has been spilled.
252 This vector is passed to `find_reloads' as an argument
253 and is not changed here. */
254 static short *static_reload_reg_p;
256 /* Set to 1 in subst_reg_equivs if it changes anything. */
257 static int subst_reg_equivs_changed;
259 /* On return from push_reload, holds the reload-number for the OUT
260 operand, which can be different for that from the input operand. */
261 static int output_reloadnum;
263 /* Compare two RTX's. */
264 #define MATCHES(x, y) \
265 (x == y || (x != 0 && (GET_CODE (x) == REG \
266 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
267 : rtx_equal_p (x, y) && ! side_effects_p (x))))
269 /* Indicates if two reloads purposes are for similar enough things that we
270 can merge their reloads. */
271 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
272 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
273 || ((when1) == (when2) && (op1) == (op2)) \
274 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
275 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
276 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
277 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
278 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
280 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
281 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
282 ((when1) != (when2) \
283 || ! ((op1) == (op2) \
284 || (when1) == RELOAD_FOR_INPUT \
285 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
286 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
288 static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
289 enum machine_mode, enum reload_type,
291 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
292 enum machine_mode, enum machine_mode,
293 int, int, int, enum reload_type));
294 static void push_replacement PROTO((rtx *, int, enum machine_mode));
295 static void combine_reloads PROTO((void));
296 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
297 enum machine_mode, enum machine_mode,
298 enum reg_class, int));
299 static int earlyclobber_operand_p PROTO((rtx));
300 static int hard_reg_set_here_p PROTO((int, int, rtx));
301 static struct decomposition decompose PROTO((rtx));
302 static int immune_p PROTO((rtx, rtx, struct decomposition));
303 static int alternative_allows_memconst PROTO((char *, int));
304 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int));
305 static rtx make_memloc PROTO((rtx, int));
306 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
307 int, enum reload_type, int));
308 static rtx subst_reg_equivs PROTO((rtx));
309 static rtx subst_indexed_address PROTO((rtx));
310 static int find_reloads_address_1 PROTO((rtx, int, rtx *, int,
311 enum reload_type,int));
312 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
313 enum machine_mode, int,
314 enum reload_type, int));
315 static int find_inc_amount PROTO((rtx, rtx));
317 #ifdef HAVE_SECONDARY_RELOADS
319 /* Determine if any secondary reloads are needed for loading (if IN_P is
320 non-zero) or storing (if IN_P is zero) X to or from a reload register of
321 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
322 are needed, push them.
324 Return the reload number of the secondary reload we made, or -1 if
325 we didn't need one. *PICODE is set to the insn_code to use if we do
326 need a secondary reload. */
329 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
335 enum reg_class reload_class;
336 enum machine_mode reload_mode;
337 enum reload_type type;
338 enum insn_code *picode;
340 enum reg_class class = NO_REGS;
341 enum machine_mode mode = reload_mode;
342 enum insn_code icode = CODE_FOR_nothing;
343 enum reg_class t_class = NO_REGS;
344 enum machine_mode t_mode = VOIDmode;
345 enum insn_code t_icode = CODE_FOR_nothing;
346 enum reload_type secondary_type;
348 int s_reload, t_reload = -1;
350 if (type == RELOAD_FOR_INPUT_ADDRESS || type == RELOAD_FOR_OUTPUT_ADDRESS)
351 secondary_type = type;
353 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
355 *picode = CODE_FOR_nothing;
357 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
358 is still a pseudo-register by now, it *must* have an equivalent MEM
359 but we don't want to assume that), use that equivalent when seeing if
360 a secondary reload is needed since whether or not a reload is needed
361 might be sensitive to the form of the MEM. */
363 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
364 && reg_equiv_mem[REGNO (x)] != 0)
365 x = reg_equiv_mem[REGNO (x)];
367 #ifdef SECONDARY_INPUT_RELOAD_CLASS
369 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
372 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
374 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
377 /* If we don't need any secondary registers, done. */
378 if (class == NO_REGS)
381 /* Get a possible insn to use. If the predicate doesn't accept X, don't
384 icode = (in_p ? reload_in_optab[(int) reload_mode]
385 : reload_out_optab[(int) reload_mode]);
387 if (icode != CODE_FOR_nothing
388 && insn_operand_predicate[(int) icode][in_p]
389 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
390 icode = CODE_FOR_nothing;
392 /* If we will be using an insn, see if it can directly handle the reload
393 register we will be using. If it can, the secondary reload is for a
394 scratch register. If it can't, we will use the secondary reload for
395 an intermediate register and require a tertiary reload for the scratch
398 if (icode != CODE_FOR_nothing)
400 /* If IN_P is non-zero, the reload register will be the output in
401 operand 0. If IN_P is zero, the reload register will be the input
402 in operand 1. Outputs should have an initial "=", which we must
405 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
406 enum reg_class insn_class
407 = (insn_letter == 'r' ? GENERAL_REGS
408 : REG_CLASS_FROM_LETTER (insn_letter));
410 if (insn_class == NO_REGS
411 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
412 /* The scratch register's constraint must start with "=&". */
413 || insn_operand_constraint[(int) icode][2][0] != '='
414 || insn_operand_constraint[(int) icode][2][1] != '&')
417 if (reg_class_subset_p (reload_class, insn_class))
418 mode = insn_operand_mode[(int) icode][2];
421 char t_letter = insn_operand_constraint[(int) icode][2][2];
423 t_mode = insn_operand_mode[(int) icode][2];
424 t_class = (t_letter == 'r' ? GENERAL_REGS
425 : REG_CLASS_FROM_LETTER (t_letter));
427 icode = CODE_FOR_nothing;
431 /* This case isn't valid, so fail. Reload is allowed to use the same
432 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
433 in the case of a secondary register, we actually need two different
434 registers for correct code. We fail here to prevent the possibility of
435 silently generating incorrect code later.
437 The convention is that secondary input reloads are valid only if the
438 secondary_class is different from class. If you have such a case, you
439 can not use secondary reloads, you must work around the problem some
442 Allow this when MODE is not reload_mode and assume that the generated
443 code handles this case (it does on the Alpha, which is the only place
444 this currently happens). */
446 if (in_p && class == reload_class && mode == reload_mode)
449 /* If we need a tertiary reload, see if we have one we can reuse or else
452 if (t_class != NO_REGS)
454 for (t_reload = 0; t_reload < n_reloads; t_reload++)
455 if (reload_secondary_p[t_reload]
456 && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
457 || reg_class_subset_p (reload_reg_class[t_reload], t_class))
458 && ((in_p && reload_inmode[t_reload] == t_mode)
459 || (! in_p && reload_outmode[t_reload] == t_mode))
460 && ((in_p && (reload_secondary_in_icode[t_reload]
461 == CODE_FOR_nothing))
462 || (! in_p &&(reload_secondary_out_icode[t_reload]
463 == CODE_FOR_nothing)))
464 && (reg_class_size[(int) t_class] == 1
465 #ifdef SMALL_REGISTER_CLASSES
469 && MERGABLE_RELOADS (secondary_type,
470 reload_when_needed[t_reload],
471 opnum, reload_opnum[t_reload]))
474 reload_inmode[t_reload] = t_mode;
476 reload_outmode[t_reload] = t_mode;
478 if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
479 reload_reg_class[t_reload] = t_class;
481 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
482 reload_optional[t_reload] &= optional;
483 reload_secondary_p[t_reload] = 1;
484 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
485 opnum, reload_opnum[t_reload]))
486 reload_when_needed[t_reload] = RELOAD_OTHER;
489 if (t_reload == n_reloads)
491 /* We need to make a new tertiary reload for this register class. */
492 reload_in[t_reload] = reload_out[t_reload] = 0;
493 reload_reg_class[t_reload] = t_class;
494 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
495 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
496 reload_reg_rtx[t_reload] = 0;
497 reload_optional[t_reload] = optional;
498 reload_inc[t_reload] = 0;
499 /* Maybe we could combine these, but it seems too tricky. */
500 reload_nocombine[t_reload] = 1;
501 reload_in_reg[t_reload] = 0;
502 reload_opnum[t_reload] = opnum;
503 reload_when_needed[t_reload] = secondary_type;
504 reload_secondary_in_reload[t_reload] = -1;
505 reload_secondary_out_reload[t_reload] = -1;
506 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
507 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
508 reload_secondary_p[t_reload] = 1;
514 /* See if we can reuse an existing secondary reload. */
515 for (s_reload = 0; s_reload < n_reloads; s_reload++)
516 if (reload_secondary_p[s_reload]
517 && (reg_class_subset_p (class, reload_reg_class[s_reload])
518 || reg_class_subset_p (reload_reg_class[s_reload], class))
519 && ((in_p && reload_inmode[s_reload] == mode)
520 || (! in_p && reload_outmode[s_reload] == mode))
521 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
522 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
523 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
524 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
525 && (reg_class_size[(int) class] == 1
526 #ifdef SMALL_REGISTER_CLASSES
530 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
531 opnum, reload_opnum[s_reload]))
534 reload_inmode[s_reload] = mode;
536 reload_outmode[s_reload] = mode;
538 if (reg_class_subset_p (class, reload_reg_class[s_reload]))
539 reload_reg_class[s_reload] = class;
541 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
542 reload_optional[s_reload] &= optional;
543 reload_secondary_p[s_reload] = 1;
544 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
545 opnum, reload_opnum[s_reload]))
546 reload_when_needed[s_reload] = RELOAD_OTHER;
549 if (s_reload == n_reloads)
551 /* We need to make a new secondary reload for this register class. */
552 reload_in[s_reload] = reload_out[s_reload] = 0;
553 reload_reg_class[s_reload] = class;
555 reload_inmode[s_reload] = in_p ? mode : VOIDmode;
556 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
557 reload_reg_rtx[s_reload] = 0;
558 reload_optional[s_reload] = optional;
559 reload_inc[s_reload] = 0;
560 /* Maybe we could combine these, but it seems too tricky. */
561 reload_nocombine[s_reload] = 1;
562 reload_in_reg[s_reload] = 0;
563 reload_opnum[s_reload] = opnum;
564 reload_when_needed[s_reload] = secondary_type;
565 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
566 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
567 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
568 reload_secondary_out_icode[s_reload]
569 = ! in_p ? t_icode : CODE_FOR_nothing;
570 reload_secondary_p[s_reload] = 1;
574 #ifdef SECONDARY_MEMORY_NEEDED
575 /* If we need a memory location to copy between the two reload regs,
578 if (in_p && icode == CODE_FOR_nothing
579 && SECONDARY_MEMORY_NEEDED (class, reload_class, reload_mode))
580 get_secondary_mem (x, reload_mode, opnum, type);
582 if (! in_p && icode == CODE_FOR_nothing
583 && SECONDARY_MEMORY_NEEDED (reload_class, class, reload_mode))
584 get_secondary_mem (x, reload_mode, opnum, type);
591 #endif /* HAVE_SECONDARY_RELOADS */
593 #ifdef SECONDARY_MEMORY_NEEDED
595 /* Return a memory location that will be used to copy X in mode MODE.
596 If we haven't already made a location for this mode in this insn,
597 call find_reloads_address on the location being returned. */
600 get_secondary_mem (x, mode, opnum, type)
602 enum machine_mode mode;
604 enum reload_type type;
609 /* By default, if MODE is narrower than a word, widen it to a word.
610 This is required because most machines that require these memory
611 locations do not support short load and stores from all registers
612 (e.g., FP registers). */
614 #ifdef SECONDARY_MEMORY_NEEDED_MODE
615 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
617 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
618 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
621 /* If we already have made a MEM for this operand in MODE, return it. */
622 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
623 return secondary_memlocs_elim[(int) mode][opnum];
625 /* If this is the first time we've tried to get a MEM for this mode,
626 allocate a new one. `something_changed' in reload will get set
627 by noticing that the frame size has changed. */
629 if (secondary_memlocs[(int) mode] == 0)
631 #ifdef SECONDARY_MEMORY_NEEDED_RTX
632 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
634 secondary_memlocs[(int) mode]
635 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
639 /* Get a version of the address doing any eliminations needed. If that
640 didn't give us a new MEM, make a new one if it isn't valid. */
642 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
643 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
645 if (! mem_valid && loc == secondary_memlocs[(int) mode])
646 loc = copy_rtx (loc);
648 /* The only time the call below will do anything is if the stack
649 offset is too large. In that case IND_LEVELS doesn't matter, so we
650 can just pass a zero. Adjust the type to be the address of the
651 corresponding object. If the address was valid, save the eliminated
652 address. If it wasn't valid, we need to make a reload each time, so
657 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
658 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
661 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
665 secondary_memlocs_elim[(int) mode][opnum] = loc;
669 /* Clear any secondary memory locations we've made. */
672 clear_secondary_mem ()
674 bzero (secondary_memlocs, sizeof secondary_memlocs);
676 #endif /* SECONDARY_MEMORY_NEEDED */
678 /* Record one reload that needs to be performed.
679 IN is an rtx saying where the data are to be found before this instruction.
680 OUT says where they must be stored after the instruction.
681 (IN is zero for data not read, and OUT is zero for data not written.)
682 INLOC and OUTLOC point to the places in the instructions where
683 IN and OUT were found.
684 If IN and OUT are both non-zero, it means the same register must be used
685 to reload both IN and OUT.
687 CLASS is a register class required for the reloaded data.
688 INMODE is the machine mode that the instruction requires
689 for the reg that replaces IN and OUTMODE is likewise for OUT.
691 If IN is zero, then OUT's location and mode should be passed as
694 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
696 OPTIONAL nonzero means this reload does not need to be performed:
697 it can be discarded if that is more convenient.
699 OPNUM and TYPE say what the purpose of this reload is.
701 The return value is the reload-number for this reload.
703 If both IN and OUT are nonzero, in some rare cases we might
704 want to make two separate reloads. (Actually we never do this now.)
705 Therefore, the reload-number for OUT is stored in
706 output_reloadnum when we return; the return value applies to IN.
707 Usually (presently always), when IN and OUT are nonzero,
708 the two reload-numbers are equal, but the caller should be careful to
712 push_reload (in, out, inloc, outloc, class,
713 inmode, outmode, strict_low, optional, opnum, type)
714 register rtx in, out;
716 enum reg_class class;
717 enum machine_mode inmode, outmode;
721 enum reload_type type;
725 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
726 int secondary_in_reload = -1, secondary_out_reload = -1;
727 enum insn_code secondary_in_icode, secondary_out_icode;
729 /* INMODE and/or OUTMODE could be VOIDmode if no mode
730 has been specified for the operand. In that case,
731 use the operand's mode as the mode to reload. */
732 if (inmode == VOIDmode && in != 0)
733 inmode = GET_MODE (in);
734 if (outmode == VOIDmode && out != 0)
735 outmode = GET_MODE (out);
737 /* If IN is a pseudo register everywhere-equivalent to a constant, and
738 it is not in a hard register, reload straight from the constant,
739 since we want to get rid of such pseudo registers.
740 Often this is done earlier, but not always in find_reloads_address. */
741 if (in != 0 && GET_CODE (in) == REG)
743 register int regno = REGNO (in);
745 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
746 && reg_equiv_constant[regno] != 0)
747 in = reg_equiv_constant[regno];
750 /* Likewise for OUT. Of course, OUT will never be equivalent to
751 an actual constant, but it might be equivalent to a memory location
752 (in the case of a parameter). */
753 if (out != 0 && GET_CODE (out) == REG)
755 register int regno = REGNO (out);
757 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
758 && reg_equiv_constant[regno] != 0)
759 out = reg_equiv_constant[regno];
762 /* If we have a read-write operand with an address side-effect,
763 change either IN or OUT so the side-effect happens only once. */
764 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
766 if (GET_CODE (XEXP (in, 0)) == POST_INC
767 || GET_CODE (XEXP (in, 0)) == POST_DEC)
768 in = gen_rtx (MEM, GET_MODE (in), XEXP (XEXP (in, 0), 0));
769 if (GET_CODE (XEXP (in, 0)) == PRE_INC
770 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
771 out = gen_rtx (MEM, GET_MODE (out), XEXP (XEXP (out, 0), 0));
774 /* If we are reloading a (SUBREG constant ...), really reload just the
775 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
776 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
777 a pseudo and hence will become a MEM) with M1 wider than M2 and the
778 register is a pseudo, also reload the inside expression.
779 For machines that extend byte loads, do this for any SUBREG of a pseudo
780 where both M1 and M2 are a word or smaller unless they are the same
782 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
783 either M1 is not valid for R or M2 is wider than a word but we only
784 need one word to store an M2-sized quantity in R.
785 (However, if OUT is nonzero, we need to reload the reg *and*
786 the subreg, so do nothing here, and let following statement handle it.)
788 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
789 we can't handle it here because CONST_INT does not indicate a mode.
791 Similarly, we must reload the inside expression if we have a
792 STRICT_LOW_PART (presumably, in == out in the cas).
794 Also reload the inner expression if it does not require a secondary
795 reload but the SUBREG does. */
797 if (in != 0 && GET_CODE (in) == SUBREG
798 && (CONSTANT_P (SUBREG_REG (in))
799 || GET_CODE (SUBREG_REG (in)) == PLUS
801 || (((GET_CODE (SUBREG_REG (in)) == REG
802 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
803 || GET_CODE (SUBREG_REG (in)) == MEM)
804 && ((GET_MODE_SIZE (inmode)
805 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
806 #ifdef LOAD_EXTEND_OP
807 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
808 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
810 && (GET_MODE_SIZE (inmode)
811 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))))
814 || (GET_CODE (SUBREG_REG (in)) == REG
815 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
816 /* The case where out is nonzero
817 is handled differently in the following statement. */
818 && (out == 0 || SUBREG_WORD (in) == 0)
819 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
820 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
822 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
824 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
825 GET_MODE (SUBREG_REG (in)))))
826 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
829 #ifdef SECONDARY_INPUT_RELOAD_CLASS
830 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
831 && (SECONDARY_INPUT_RELOAD_CLASS (class,
832 GET_MODE (SUBREG_REG (in)),
838 in_subreg_loc = inloc;
839 inloc = &SUBREG_REG (in);
841 #ifndef LOAD_EXTEND_OP
842 if (GET_CODE (in) == MEM)
843 /* This is supposed to happen only for paradoxical subregs made by
844 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
845 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
848 inmode = GET_MODE (in);
851 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
852 either M1 is not valid for R or M2 is wider than a word but we only
853 need one word to store an M2-sized quantity in R.
855 However, we must reload the inner reg *as well as* the subreg in
858 if (in != 0 && GET_CODE (in) == SUBREG
859 && GET_CODE (SUBREG_REG (in)) == REG
860 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
861 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)), inmode)
862 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
863 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
865 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
867 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
868 GET_MODE (SUBREG_REG (in)))))))
870 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
871 GENERAL_REGS, VOIDmode, VOIDmode, 0, 0, opnum, type);
875 /* Similarly for paradoxical and problematical SUBREGs on the output.
876 Note that there is no reason we need worry about the previous value
877 of SUBREG_REG (out); even if wider than out,
878 storing in a subreg is entitled to clobber it all
879 (except in the case of STRICT_LOW_PART,
880 and in that case the constraint should label it input-output.) */
881 if (out != 0 && GET_CODE (out) == SUBREG
882 && (CONSTANT_P (SUBREG_REG (out))
884 || (((GET_CODE (SUBREG_REG (out)) == REG
885 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
886 || GET_CODE (SUBREG_REG (out)) == MEM)
887 && ((GET_MODE_SIZE (outmode)
888 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
889 #ifdef LOAD_EXTEND_OP
890 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
891 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
893 && (GET_MODE_SIZE (outmode)
894 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))))
897 || (GET_CODE (SUBREG_REG (out)) == REG
898 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
899 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
900 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
902 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
904 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
905 GET_MODE (SUBREG_REG (out)))))
906 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
907 + SUBREG_WORD (out)),
909 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
910 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
911 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
912 GET_MODE (SUBREG_REG (out)),
918 out_subreg_loc = outloc;
919 outloc = &SUBREG_REG (out);
921 #ifndef LOAD_EXTEND_OP
922 if (GET_CODE (out) == MEM
923 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
926 outmode = GET_MODE (out);
929 /* If IN appears in OUT, we can't share any input-only reload for IN. */
930 if (in != 0 && out != 0 && GET_CODE (out) == MEM
931 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
932 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
935 /* If IN is a SUBREG of a hard register, make a new REG. This
936 simplifies some of the cases below. */
938 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
939 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
940 in = gen_rtx (REG, GET_MODE (in),
941 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
943 /* Similarly for OUT. */
944 if (out != 0 && GET_CODE (out) == SUBREG
945 && GET_CODE (SUBREG_REG (out)) == REG
946 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
947 out = gen_rtx (REG, GET_MODE (out),
948 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
950 /* Narrow down the class of register wanted if that is
951 desirable on this machine for efficiency. */
953 class = PREFERRED_RELOAD_CLASS (in, class);
955 /* Output reloads may need analogous treatment, different in detail. */
956 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
958 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
961 /* Make sure we use a class that can handle the actual pseudo
962 inside any subreg. For example, on the 386, QImode regs
963 can appear within SImode subregs. Although GENERAL_REGS
964 can handle SImode, QImode needs a smaller class. */
965 #ifdef LIMIT_RELOAD_CLASS
967 class = LIMIT_RELOAD_CLASS (inmode, class);
968 else if (in != 0 && GET_CODE (in) == SUBREG)
969 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
972 class = LIMIT_RELOAD_CLASS (outmode, class);
973 if (out != 0 && GET_CODE (out) == SUBREG)
974 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
977 /* Verify that this class is at least possible for the mode that
979 if (this_insn_is_asm)
981 enum machine_mode mode;
982 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
986 if (mode == VOIDmode)
988 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
995 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
996 if (HARD_REGNO_MODE_OK (i, mode)
997 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
999 int nregs = HARD_REGNO_NREGS (i, mode);
1002 for (j = 1; j < nregs; j++)
1003 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1008 if (i == FIRST_PSEUDO_REGISTER)
1010 error_for_asm (this_insn, "impossible register constraint in `asm'");
1015 if (class == NO_REGS)
1018 /* We can use an existing reload if the class is right
1019 and at least one of IN and OUT is a match
1020 and the other is at worst neutral.
1021 (A zero compared against anything is neutral.)
1023 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
1024 for the same thing since that can cause us to need more reload registers
1025 than we otherwise would. */
1027 for (i = 0; i < n_reloads; i++)
1028 if ((reg_class_subset_p (class, reload_reg_class[i])
1029 || reg_class_subset_p (reload_reg_class[i], class))
1030 /* If the existing reload has a register, it must fit our class. */
1031 && (reload_reg_rtx[i] == 0
1032 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1033 true_regnum (reload_reg_rtx[i])))
1034 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
1035 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
1037 (out != 0 && MATCHES (reload_out[i], out)
1038 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
1039 && (reg_class_size[(int) class] == 1
1040 #ifdef SMALL_REGISTER_CLASSES
1044 && MERGABLE_RELOADS (type, reload_when_needed[i],
1045 opnum, reload_opnum[i]))
1048 /* Reloading a plain reg for input can match a reload to postincrement
1049 that reg, since the postincrement's value is the right value.
1050 Likewise, it can match a preincrement reload, since we regard
1051 the preincrementation as happening before any ref in this insn
1052 to that register. */
1054 for (i = 0; i < n_reloads; i++)
1055 if ((reg_class_subset_p (class, reload_reg_class[i])
1056 || reg_class_subset_p (reload_reg_class[i], class))
1057 /* If the existing reload has a register, it must fit our class. */
1058 && (reload_reg_rtx[i] == 0
1059 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1060 true_regnum (reload_reg_rtx[i])))
1061 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
1062 && ((GET_CODE (in) == REG
1063 && (GET_CODE (reload_in[i]) == POST_INC
1064 || GET_CODE (reload_in[i]) == POST_DEC
1065 || GET_CODE (reload_in[i]) == PRE_INC
1066 || GET_CODE (reload_in[i]) == PRE_DEC)
1067 && MATCHES (XEXP (reload_in[i], 0), in))
1069 (GET_CODE (reload_in[i]) == REG
1070 && (GET_CODE (in) == POST_INC
1071 || GET_CODE (in) == POST_DEC
1072 || GET_CODE (in) == PRE_INC
1073 || GET_CODE (in) == PRE_DEC)
1074 && MATCHES (XEXP (in, 0), reload_in[i])))
1075 && (reg_class_size[(int) class] == 1
1076 #ifdef SMALL_REGISTER_CLASSES
1080 && MERGABLE_RELOADS (type, reload_when_needed[i],
1081 opnum, reload_opnum[i]))
1083 /* Make sure reload_in ultimately has the increment,
1084 not the plain register. */
1085 if (GET_CODE (in) == REG)
1092 /* See if we need a secondary reload register to move between CLASS
1093 and IN or CLASS and OUT. Get the icode and push any required reloads
1094 needed for each of them if so. */
1096 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1099 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1100 &secondary_in_icode);
1103 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1104 if (out != 0 && GET_CODE (out) != SCRATCH)
1105 secondary_out_reload
1106 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1107 type, &secondary_out_icode);
1110 /* We found no existing reload suitable for re-use.
1111 So add an additional reload. */
1115 reload_out[i] = out;
1116 reload_reg_class[i] = class;
1117 reload_inmode[i] = inmode;
1118 reload_outmode[i] = outmode;
1119 reload_reg_rtx[i] = 0;
1120 reload_optional[i] = optional;
1122 reload_nocombine[i] = 0;
1123 reload_in_reg[i] = inloc ? *inloc : 0;
1124 reload_opnum[i] = opnum;
1125 reload_when_needed[i] = type;
1126 reload_secondary_in_reload[i] = secondary_in_reload;
1127 reload_secondary_out_reload[i] = secondary_out_reload;
1128 reload_secondary_in_icode[i] = secondary_in_icode;
1129 reload_secondary_out_icode[i] = secondary_out_icode;
1130 reload_secondary_p[i] = 0;
1134 #ifdef SECONDARY_MEMORY_NEEDED
1135 /* If a memory location is needed for the copy, make one. */
1136 if (in != 0 && GET_CODE (in) == REG
1137 && REGNO (in) < FIRST_PSEUDO_REGISTER
1138 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1140 get_secondary_mem (in, inmode, opnum, type);
1142 if (out != 0 && GET_CODE (out) == REG
1143 && REGNO (out) < FIRST_PSEUDO_REGISTER
1144 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1146 get_secondary_mem (out, outmode, opnum, type);
1151 /* We are reusing an existing reload,
1152 but we may have additional information for it.
1153 For example, we may now have both IN and OUT
1154 while the old one may have just one of them. */
1156 if (inmode != VOIDmode)
1157 reload_inmode[i] = inmode;
1158 if (outmode != VOIDmode)
1159 reload_outmode[i] = outmode;
1163 reload_out[i] = out;
1164 if (reg_class_subset_p (class, reload_reg_class[i]))
1165 reload_reg_class[i] = class;
1166 reload_optional[i] &= optional;
1167 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1168 opnum, reload_opnum[i]))
1169 reload_when_needed[i] = RELOAD_OTHER;
1170 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1173 /* If the ostensible rtx being reload differs from the rtx found
1174 in the location to substitute, this reload is not safe to combine
1175 because we cannot reliably tell whether it appears in the insn. */
1177 if (in != 0 && in != *inloc)
1178 reload_nocombine[i] = 1;
1181 /* This was replaced by changes in find_reloads_address_1 and the new
1182 function inc_for_reload, which go with a new meaning of reload_inc. */
1184 /* If this is an IN/OUT reload in an insn that sets the CC,
1185 it must be for an autoincrement. It doesn't work to store
1186 the incremented value after the insn because that would clobber the CC.
1187 So we must do the increment of the value reloaded from,
1188 increment it, store it back, then decrement again. */
1189 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1193 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1194 /* If we did not find a nonzero amount-to-increment-by,
1195 that contradicts the belief that IN is being incremented
1196 in an address in this insn. */
1197 if (reload_inc[i] == 0)
1202 /* If we will replace IN and OUT with the reload-reg,
1203 record where they are located so that substitution need
1204 not do a tree walk. */
1206 if (replace_reloads)
1210 register struct replacement *r = &replacements[n_replacements++];
1212 r->subreg_loc = in_subreg_loc;
1216 if (outloc != 0 && outloc != inloc)
1218 register struct replacement *r = &replacements[n_replacements++];
1221 r->subreg_loc = out_subreg_loc;
1226 /* If this reload is just being introduced and it has both
1227 an incoming quantity and an outgoing quantity that are
1228 supposed to be made to match, see if either one of the two
1229 can serve as the place to reload into.
1231 If one of them is acceptable, set reload_reg_rtx[i]
1234 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1236 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1238 reload_reg_class[i], i);
1240 /* If the outgoing register already contains the same value
1241 as the incoming one, we can dispense with loading it.
1242 The easiest way to tell the caller that is to give a phony
1243 value for the incoming operand (same as outgoing one). */
1244 if (reload_reg_rtx[i] == out
1245 && (GET_CODE (in) == REG || CONSTANT_P (in))
1246 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1247 static_reload_reg_p, i, inmode))
1251 /* If this is an input reload and the operand contains a register that
1252 dies in this insn and is used nowhere else, see if it is the right class
1253 to be used for this reload. Use it if so. (This occurs most commonly
1254 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1255 this if it is also an output reload that mentions the register unless
1256 the output is a SUBREG that clobbers an entire register.
1258 Note that the operand might be one of the spill regs, if it is a
1259 pseudo reg and we are in a block where spilling has not taken place.
1260 But if there is no spilling in this block, that is OK.
1261 An explicitly used hard reg cannot be a spill reg. */
1263 if (reload_reg_rtx[i] == 0 && in != 0)
1268 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1269 if (REG_NOTE_KIND (note) == REG_DEAD
1270 && GET_CODE (XEXP (note, 0)) == REG
1271 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1272 && reg_mentioned_p (XEXP (note, 0), in)
1273 && ! refers_to_regno_for_reload_p (regno,
1275 + HARD_REGNO_NREGS (regno,
1277 PATTERN (this_insn), inloc)
1278 /* If this is also an output reload, IN cannot be used as
1279 the reload register if it is set in this insn unless IN
1281 && (out == 0 || in == out
1282 || ! hard_reg_set_here_p (regno,
1284 + HARD_REGNO_NREGS (regno,
1286 PATTERN (this_insn)))
1287 /* ??? Why is this code so different from the previous?
1288 Is there any simple coherent way to describe the two together?
1289 What's going on here. */
1291 || (GET_CODE (in) == SUBREG
1292 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1294 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1295 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1296 /* Make sure the operand fits in the reg that dies. */
1297 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1298 && HARD_REGNO_MODE_OK (regno, inmode)
1299 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1300 && HARD_REGNO_MODE_OK (regno, outmode)
1301 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1302 && !fixed_regs[regno])
1304 reload_reg_rtx[i] = gen_rtx (REG, inmode, regno);
1310 output_reloadnum = i;
1315 /* Record an additional place we must replace a value
1316 for which we have already recorded a reload.
1317 RELOADNUM is the value returned by push_reload
1318 when the reload was recorded.
1319 This is used in insn patterns that use match_dup. */
1322 push_replacement (loc, reloadnum, mode)
1325 enum machine_mode mode;
1327 if (replace_reloads)
1329 register struct replacement *r = &replacements[n_replacements++];
1330 r->what = reloadnum;
1337 /* Transfer all replacements that used to be in reload FROM to be in
1341 transfer_replacements (to, from)
1346 for (i = 0; i < n_replacements; i++)
1347 if (replacements[i].what == from)
1348 replacements[i].what = to;
1351 /* If there is only one output reload, and it is not for an earlyclobber
1352 operand, try to combine it with a (logically unrelated) input reload
1353 to reduce the number of reload registers needed.
1355 This is safe if the input reload does not appear in
1356 the value being output-reloaded, because this implies
1357 it is not needed any more once the original insn completes.
1359 If that doesn't work, see we can use any of the registers that
1360 die in this insn as a reload register. We can if it is of the right
1361 class and does not appear in the value being output-reloaded. */
1367 int output_reload = -1;
1370 /* Find the output reload; return unless there is exactly one
1371 and that one is mandatory. */
1373 for (i = 0; i < n_reloads; i++)
1374 if (reload_out[i] != 0)
1376 if (output_reload >= 0)
1381 if (output_reload < 0 || reload_optional[output_reload])
1384 /* An input-output reload isn't combinable. */
1386 if (reload_in[output_reload] != 0)
1389 /* If this reload is for an earlyclobber operand, we can't do anything. */
1390 if (earlyclobber_operand_p (reload_out[output_reload]))
1393 /* Check each input reload; can we combine it? */
1395 for (i = 0; i < n_reloads; i++)
1396 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1397 /* Life span of this reload must not extend past main insn. */
1398 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1399 && reload_when_needed[i] != RELOAD_OTHER
1400 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1401 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1402 reload_outmode[output_reload]))
1403 && reload_inc[i] == 0
1404 && reload_reg_rtx[i] == 0
1405 #ifdef SECONDARY_MEMORY_NEEDED
1406 /* Don't combine two reloads with different secondary
1407 memory locations. */
1408 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1409 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1410 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1411 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1413 #ifdef SMALL_REGISTER_CLASSES
1414 && reload_reg_class[i] == reload_reg_class[output_reload]
1416 && (reg_class_subset_p (reload_reg_class[i],
1417 reload_reg_class[output_reload])
1418 || reg_class_subset_p (reload_reg_class[output_reload],
1419 reload_reg_class[i]))
1421 && (MATCHES (reload_in[i], reload_out[output_reload])
1422 /* Args reversed because the first arg seems to be
1423 the one that we imagine being modified
1424 while the second is the one that might be affected. */
1425 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1427 /* However, if the input is a register that appears inside
1428 the output, then we also can't share.
1429 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1430 If the same reload reg is used for both reg 69 and the
1431 result to be stored in memory, then that result
1432 will clobber the address of the memory ref. */
1433 && ! (GET_CODE (reload_in[i]) == REG
1434 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1435 reload_out[output_reload]))))
1436 && (reg_class_size[(int) reload_reg_class[i]]
1437 #ifdef SMALL_REGISTER_CLASSES
1441 /* We will allow making things slightly worse by combining an
1442 input and an output, but no worse than that. */
1443 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1444 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1448 /* We have found a reload to combine with! */
1449 reload_out[i] = reload_out[output_reload];
1450 reload_outmode[i] = reload_outmode[output_reload];
1451 /* Mark the old output reload as inoperative. */
1452 reload_out[output_reload] = 0;
1453 /* The combined reload is needed for the entire insn. */
1454 reload_when_needed[i] = RELOAD_OTHER;
1455 /* If the output reload had a secondary reload, copy it. */
1456 if (reload_secondary_out_reload[output_reload] != -1)
1458 reload_secondary_out_reload[i]
1459 = reload_secondary_out_reload[output_reload];
1460 reload_secondary_out_icode[i]
1461 = reload_secondary_out_icode[output_reload];
1464 #ifdef SECONDARY_MEMORY_NEEDED
1465 /* Copy any secondary MEM. */
1466 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1467 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1468 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1470 /* If required, minimize the register class. */
1471 if (reg_class_subset_p (reload_reg_class[output_reload],
1472 reload_reg_class[i]))
1473 reload_reg_class[i] = reload_reg_class[output_reload];
1475 /* Transfer all replacements from the old reload to the combined. */
1476 for (j = 0; j < n_replacements; j++)
1477 if (replacements[j].what == output_reload)
1478 replacements[j].what = i;
1483 /* If this insn has only one operand that is modified or written (assumed
1484 to be the first), it must be the one corresponding to this reload. It
1485 is safe to use anything that dies in this insn for that output provided
1486 that it does not occur in the output (we already know it isn't an
1487 earlyclobber. If this is an asm insn, give up. */
1489 if (INSN_CODE (this_insn) == -1)
1492 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1493 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1494 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1497 /* See if some hard register that dies in this insn and is not used in
1498 the output is the right class. Only works if the register we pick
1499 up can fully hold our output reload. */
1500 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1501 if (REG_NOTE_KIND (note) == REG_DEAD
1502 && GET_CODE (XEXP (note, 0)) == REG
1503 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1504 reload_out[output_reload])
1505 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1506 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1507 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1508 REGNO (XEXP (note, 0)))
1509 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1510 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1511 && ! fixed_regs[REGNO (XEXP (note, 0))])
1513 reload_reg_rtx[output_reload] = gen_rtx (REG,
1514 reload_outmode[output_reload],
1515 REGNO (XEXP (note, 0)));
1520 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1521 See if one of IN and OUT is a register that may be used;
1522 this is desirable since a spill-register won't be needed.
1523 If so, return the register rtx that proves acceptable.
1525 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1526 CLASS is the register class required for the reload.
1528 If FOR_REAL is >= 0, it is the number of the reload,
1529 and in some cases when it can be discovered that OUT doesn't need
1530 to be computed, clear out reload_out[FOR_REAL].
1532 If FOR_REAL is -1, this should not be done, because this call
1533 is just to see if a register can be found, not to find and install it. */
1536 find_dummy_reload (real_in, real_out, inloc, outloc,
1537 inmode, outmode, class, for_real)
1538 rtx real_in, real_out;
1539 rtx *inloc, *outloc;
1540 enum machine_mode inmode, outmode;
1541 enum reg_class class;
1550 /* If operands exceed a word, we can't use either of them
1551 unless they have the same size. */
1552 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1553 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1554 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1557 /* Find the inside of any subregs. */
1558 while (GET_CODE (out) == SUBREG)
1560 out_offset = SUBREG_WORD (out);
1561 out = SUBREG_REG (out);
1563 while (GET_CODE (in) == SUBREG)
1565 in_offset = SUBREG_WORD (in);
1566 in = SUBREG_REG (in);
1569 /* Narrow down the reg class, the same way push_reload will;
1570 otherwise we might find a dummy now, but push_reload won't. */
1571 class = PREFERRED_RELOAD_CLASS (in, class);
1573 /* See if OUT will do. */
1574 if (GET_CODE (out) == REG
1575 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1577 register int regno = REGNO (out) + out_offset;
1578 int nwords = HARD_REGNO_NREGS (regno, outmode);
1581 /* When we consider whether the insn uses OUT,
1582 ignore references within IN. They don't prevent us
1583 from copying IN into OUT, because those refs would
1584 move into the insn that reloads IN.
1586 However, we only ignore IN in its role as this reload.
1587 If the insn uses IN elsewhere and it contains OUT,
1588 that counts. We can't be sure it's the "same" operand
1589 so it might not go through this reload. */
1591 *inloc = const0_rtx;
1593 if (regno < FIRST_PSEUDO_REGISTER
1594 /* A fixed reg that can overlap other regs better not be used
1595 for reloading in any way. */
1596 #ifdef OVERLAPPING_REGNO_P
1597 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1599 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1600 PATTERN (this_insn), outloc))
1603 for (i = 0; i < nwords; i++)
1604 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1610 if (GET_CODE (real_out) == REG)
1613 value = gen_rtx (REG, outmode, regno);
1620 /* Consider using IN if OUT was not acceptable
1621 or if OUT dies in this insn (like the quotient in a divmod insn).
1622 We can't use IN unless it is dies in this insn,
1623 which means we must know accurately which hard regs are live.
1624 Also, the result can't go in IN if IN is used within OUT. */
1625 if (hard_regs_live_known
1626 && GET_CODE (in) == REG
1627 && REGNO (in) < FIRST_PSEUDO_REGISTER
1629 || find_reg_note (this_insn, REG_UNUSED, real_out))
1630 && find_reg_note (this_insn, REG_DEAD, real_in)
1631 && !fixed_regs[REGNO (in)]
1632 && HARD_REGNO_MODE_OK (REGNO (in),
1633 /* The only case where out and real_out might
1634 have different modes is where real_out
1635 is a subreg, and in that case, out
1637 (GET_MODE (out) != VOIDmode
1638 ? GET_MODE (out) : outmode)))
1640 register int regno = REGNO (in) + in_offset;
1641 int nwords = HARD_REGNO_NREGS (regno, inmode);
1643 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1644 && ! hard_reg_set_here_p (regno, regno + nwords,
1645 PATTERN (this_insn)))
1648 for (i = 0; i < nwords; i++)
1649 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1655 /* If we were going to use OUT as the reload reg
1656 and changed our mind, it means OUT is a dummy that
1657 dies here. So don't bother copying value to it. */
1658 if (for_real >= 0 && value == real_out)
1659 reload_out[for_real] = 0;
1660 if (GET_CODE (real_in) == REG)
1663 value = gen_rtx (REG, inmode, regno);
1671 /* This page contains subroutines used mainly for determining
1672 whether the IN or an OUT of a reload can serve as the
1675 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1678 earlyclobber_operand_p (x)
1683 for (i = 0; i < n_earlyclobbers; i++)
1684 if (reload_earlyclobbers[i] == x)
1690 /* Return 1 if expression X alters a hard reg in the range
1691 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1692 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1693 X should be the body of an instruction. */
1696 hard_reg_set_here_p (beg_regno, end_regno, x)
1697 register int beg_regno, end_regno;
1700 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1702 register rtx op0 = SET_DEST (x);
1703 while (GET_CODE (op0) == SUBREG)
1704 op0 = SUBREG_REG (op0);
1705 if (GET_CODE (op0) == REG)
1707 register int r = REGNO (op0);
1708 /* See if this reg overlaps range under consideration. */
1710 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1714 else if (GET_CODE (x) == PARALLEL)
1716 register int i = XVECLEN (x, 0) - 1;
1718 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1725 /* Return 1 if ADDR is a valid memory address for mode MODE,
1726 and check that each pseudo reg has the proper kind of
1730 strict_memory_address_p (mode, addr)
1731 enum machine_mode mode;
1734 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1741 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1742 if they are the same hard reg, and has special hacks for
1743 autoincrement and autodecrement.
1744 This is specifically intended for find_reloads to use
1745 in determining whether two operands match.
1746 X is the operand whose number is the lower of the two.
1748 The value is 2 if Y contains a pre-increment that matches
1749 a non-incrementing address in X. */
1751 /* ??? To be completely correct, we should arrange to pass
1752 for X the output operand and for Y the input operand.
1753 For now, we assume that the output operand has the lower number
1754 because that is natural in (SET output (... input ...)). */
1757 operands_match_p (x, y)
1761 register RTX_CODE code = GET_CODE (x);
1767 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
1768 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
1769 && GET_CODE (SUBREG_REG (y)) == REG)))
1775 i = REGNO (SUBREG_REG (x));
1776 if (i >= FIRST_PSEUDO_REGISTER)
1778 i += SUBREG_WORD (x);
1783 if (GET_CODE (y) == SUBREG)
1785 j = REGNO (SUBREG_REG (y));
1786 if (j >= FIRST_PSEUDO_REGISTER)
1788 j += SUBREG_WORD (y);
1793 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1794 multiple hard register group, so that for example (reg:DI 0) and
1795 (reg:SI 1) will be considered the same register. */
1796 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
1797 && i < FIRST_PSEUDO_REGISTER)
1798 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
1799 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
1800 && j < FIRST_PSEUDO_REGISTER)
1801 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
1805 /* If two operands must match, because they are really a single
1806 operand of an assembler insn, then two postincrements are invalid
1807 because the assembler insn would increment only once.
1808 On the other hand, an postincrement matches ordinary indexing
1809 if the postincrement is the output operand. */
1810 if (code == POST_DEC || code == POST_INC)
1811 return operands_match_p (XEXP (x, 0), y);
1812 /* Two preincrements are invalid
1813 because the assembler insn would increment only once.
1814 On the other hand, an preincrement matches ordinary indexing
1815 if the preincrement is the input operand.
1816 In this case, return 2, since some callers need to do special
1817 things when this happens. */
1818 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
1819 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
1823 /* Now we have disposed of all the cases
1824 in which different rtx codes can match. */
1825 if (code != GET_CODE (y))
1827 if (code == LABEL_REF)
1828 return XEXP (x, 0) == XEXP (y, 0);
1829 if (code == SYMBOL_REF)
1830 return XSTR (x, 0) == XSTR (y, 0);
1832 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1834 if (GET_MODE (x) != GET_MODE (y))
1837 /* Compare the elements. If any pair of corresponding elements
1838 fail to match, return 0 for the whole things. */
1841 fmt = GET_RTX_FORMAT (code);
1842 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1848 if (XWINT (x, i) != XWINT (y, i))
1853 if (XINT (x, i) != XINT (y, i))
1858 val = operands_match_p (XEXP (x, i), XEXP (y, i));
1861 /* If any subexpression returns 2,
1862 we should return 2 if we are successful. */
1870 /* It is believed that rtx's at this level will never
1871 contain anything but integers and other rtx's,
1872 except for within LABEL_REFs and SYMBOL_REFs. */
1877 return 1 + success_2;
1880 /* Return the number of times character C occurs in string S. */
1883 n_occurrences (c, s)
1893 /* Describe the range of registers or memory referenced by X.
1894 If X is a register, set REG_FLAG and put the first register
1895 number into START and the last plus one into END.
1896 If X is a memory reference, put a base address into BASE
1897 and a range of integer offsets into START and END.
1898 If X is pushing on the stack, we can assume it causes no trouble,
1899 so we set the SAFE field. */
1901 static struct decomposition
1905 struct decomposition val;
1910 if (GET_CODE (x) == MEM)
1912 rtx base, offset = 0;
1913 rtx addr = XEXP (x, 0);
1915 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
1916 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
1918 val.base = XEXP (addr, 0);
1919 val.start = - GET_MODE_SIZE (GET_MODE (x));
1920 val.end = GET_MODE_SIZE (GET_MODE (x));
1921 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
1925 if (GET_CODE (addr) == CONST)
1927 addr = XEXP (addr, 0);
1930 if (GET_CODE (addr) == PLUS)
1932 if (CONSTANT_P (XEXP (addr, 0)))
1934 base = XEXP (addr, 1);
1935 offset = XEXP (addr, 0);
1937 else if (CONSTANT_P (XEXP (addr, 1)))
1939 base = XEXP (addr, 0);
1940 offset = XEXP (addr, 1);
1947 offset = const0_rtx;
1949 if (GET_CODE (offset) == CONST)
1950 offset = XEXP (offset, 0);
1951 if (GET_CODE (offset) == PLUS)
1953 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
1955 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 1));
1956 offset = XEXP (offset, 0);
1958 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
1960 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 0));
1961 offset = XEXP (offset, 1);
1965 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
1966 offset = const0_rtx;
1969 else if (GET_CODE (offset) != CONST_INT)
1971 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
1972 offset = const0_rtx;
1975 if (all_const && GET_CODE (base) == PLUS)
1976 base = gen_rtx (CONST, GET_MODE (base), base);
1978 if (GET_CODE (offset) != CONST_INT)
1981 val.start = INTVAL (offset);
1982 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
1986 else if (GET_CODE (x) == REG)
1989 val.start = true_regnum (x);
1992 /* A pseudo with no hard reg. */
1993 val.start = REGNO (x);
1994 val.end = val.start + 1;
1998 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2000 else if (GET_CODE (x) == SUBREG)
2002 if (GET_CODE (SUBREG_REG (x)) != REG)
2003 /* This could be more precise, but it's good enough. */
2004 return decompose (SUBREG_REG (x));
2006 val.start = true_regnum (x);
2008 return decompose (SUBREG_REG (x));
2011 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2013 else if (CONSTANT_P (x)
2014 /* This hasn't been assigned yet, so it can't conflict yet. */
2015 || GET_CODE (x) == SCRATCH)
2022 /* Return 1 if altering Y will not modify the value of X.
2023 Y is also described by YDATA, which should be decompose (Y). */
2026 immune_p (x, y, ydata)
2028 struct decomposition ydata;
2030 struct decomposition xdata;
2033 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2037 if (GET_CODE (y) != MEM)
2039 /* If Y is memory and X is not, Y can't affect X. */
2040 if (GET_CODE (x) != MEM)
2043 xdata = decompose (x);
2045 if (! rtx_equal_p (xdata.base, ydata.base))
2047 /* If bases are distinct symbolic constants, there is no overlap. */
2048 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2050 /* Constants and stack slots never overlap. */
2051 if (CONSTANT_P (xdata.base)
2052 && (ydata.base == frame_pointer_rtx
2053 || ydata.base == hard_frame_pointer_rtx
2054 || ydata.base == stack_pointer_rtx))
2056 if (CONSTANT_P (ydata.base)
2057 && (xdata.base == frame_pointer_rtx
2058 || xdata.base == hard_frame_pointer_rtx
2059 || xdata.base == stack_pointer_rtx))
2061 /* If either base is variable, we don't know anything. */
2066 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2069 /* Similar, but calls decompose. */
2072 safe_from_earlyclobber (op, clobber)
2075 struct decomposition early_data;
2077 early_data = decompose (clobber);
2078 return immune_p (op, clobber, early_data);
2081 /* Main entry point of this file: search the body of INSN
2082 for values that need reloading and record them with push_reload.
2083 REPLACE nonzero means record also where the values occur
2084 so that subst_reloads can be used.
2086 IND_LEVELS says how many levels of indirection are supported by this
2087 machine; a value of zero means that a memory reference is not a valid
2090 LIVE_KNOWN says we have valid information about which hard
2091 regs are live at each point in the program; this is true when
2092 we are called from global_alloc but false when stupid register
2093 allocation has been done.
2095 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2096 which is nonnegative if the reg has been commandeered for reloading into.
2097 It is copied into STATIC_RELOAD_REG_P and referenced from there
2098 by various subroutines. */
2101 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2103 int replace, ind_levels;
2105 short *reload_reg_p;
2107 #ifdef REGISTER_CONSTRAINTS
2109 register int insn_code_number;
2112 /* These are the constraints for the insn. We don't change them. */
2113 char *constraints1[MAX_RECOG_OPERANDS];
2114 /* These start out as the constraints for the insn
2115 and they are chewed up as we consider alternatives. */
2116 char *constraints[MAX_RECOG_OPERANDS];
2117 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2119 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2120 char pref_or_nothing[MAX_RECOG_OPERANDS];
2121 /* Nonzero for a MEM operand whose entire address needs a reload. */
2122 int address_reloaded[MAX_RECOG_OPERANDS];
2123 /* Value of enum reload_type to use for operand. */
2124 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2125 /* Value of enum reload_type to use within address of operand. */
2126 enum reload_type address_type[MAX_RECOG_OPERANDS];
2127 /* Save the usage of each operand. */
2128 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2129 int no_input_reloads = 0, no_output_reloads = 0;
2131 int this_alternative[MAX_RECOG_OPERANDS];
2132 char this_alternative_win[MAX_RECOG_OPERANDS];
2133 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2134 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2135 int this_alternative_matches[MAX_RECOG_OPERANDS];
2137 int goal_alternative[MAX_RECOG_OPERANDS];
2138 int this_alternative_number;
2139 int goal_alternative_number;
2140 int operand_reloadnum[MAX_RECOG_OPERANDS];
2141 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2142 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2143 char goal_alternative_win[MAX_RECOG_OPERANDS];
2144 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2145 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2146 int goal_alternative_swapped;
2149 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2150 rtx substed_operand[MAX_RECOG_OPERANDS];
2151 rtx body = PATTERN (insn);
2152 rtx set = single_set (insn);
2153 int goal_earlyclobber, this_earlyclobber;
2154 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2157 this_insn_is_asm = 0; /* Tentative. */
2161 n_earlyclobbers = 0;
2162 replace_reloads = replace;
2163 hard_regs_live_known = live_known;
2164 static_reload_reg_p = reload_reg_p;
2166 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2167 neither are insns that SET cc0. Insns that use CC0 are not allowed
2168 to have any input reloads. */
2169 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2170 no_output_reloads = 1;
2173 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2174 no_input_reloads = 1;
2175 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2176 no_output_reloads = 1;
2179 #ifdef SECONDARY_MEMORY_NEEDED
2180 /* The eliminated forms of any secondary memory locations are per-insn, so
2181 clear them out here. */
2183 bzero (secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2186 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2187 Make OPERANDS point to a vector of operand values.
2188 Make OPERAND_LOCS point to a vector of pointers to
2189 where the operands were found.
2190 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2191 constraint-strings for this insn.
2192 Return if the insn needs no reload processing. */
2194 switch (GET_CODE (body))
2204 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2205 is cheap to move between them. If it is not, there may not be an insn
2206 to do the copy, so we may need a reload. */
2207 if (GET_CODE (SET_DEST (body)) == REG
2208 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2209 && GET_CODE (SET_SRC (body)) == REG
2210 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2211 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2212 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2216 reload_n_operands = noperands = asm_noperands (body);
2219 /* This insn is an `asm' with operands. */
2221 insn_code_number = -1;
2222 this_insn_is_asm = 1;
2224 /* expand_asm_operands makes sure there aren't too many operands. */
2225 if (noperands > MAX_RECOG_OPERANDS)
2228 /* Now get the operand values and constraints out of the insn. */
2230 decode_asm_operands (body, recog_operand, recog_operand_loc,
2231 constraints, operand_mode);
2234 bcopy (constraints, constraints1, noperands * sizeof (char *));
2235 n_alternatives = n_occurrences (',', constraints[0]) + 1;
2236 for (i = 1; i < noperands; i++)
2237 if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
2239 error_for_asm (insn, "operand constraints differ in number of alternatives");
2240 /* Avoid further trouble with this insn. */
2241 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2250 /* Ordinary insn: recognize it, get the operands via insn_extract
2251 and get the constraints. */
2253 insn_code_number = recog_memoized (insn);
2254 if (insn_code_number < 0)
2255 fatal_insn_not_found (insn);
2257 reload_n_operands = noperands = insn_n_operands[insn_code_number];
2258 n_alternatives = insn_n_alternatives[insn_code_number];
2259 /* Just return "no reloads" if insn has no operands with constraints. */
2260 if (n_alternatives == 0)
2262 insn_extract (insn);
2263 for (i = 0; i < noperands; i++)
2265 constraints[i] = constraints1[i]
2266 = insn_operand_constraint[insn_code_number][i];
2267 operand_mode[i] = insn_operand_mode[insn_code_number][i];
2276 /* If we will need to know, later, whether some pair of operands
2277 are the same, we must compare them now and save the result.
2278 Reloading the base and index registers will clobber them
2279 and afterward they will fail to match. */
2281 for (i = 0; i < noperands; i++)
2286 substed_operand[i] = recog_operand[i];
2289 modified[i] = RELOAD_READ;
2291 /* Scan this operand's constraint to see if it is an output operand,
2292 an in-out operand, is commutative, or should match another. */
2297 modified[i] = RELOAD_WRITE;
2299 modified[i] = RELOAD_READ_WRITE;
2302 /* The last operand should not be marked commutative. */
2303 if (i == noperands - 1)
2305 if (this_insn_is_asm)
2306 warning_for_asm (this_insn,
2307 "`%%' constraint used with last operand");
2314 else if (c >= '0' && c <= '9')
2317 operands_match[c][i]
2318 = operands_match_p (recog_operand[c], recog_operand[i]);
2320 /* An operand may not match itself. */
2323 if (this_insn_is_asm)
2324 warning_for_asm (this_insn,
2325 "operand %d has constraint %d", i, c);
2330 /* If C can be commuted with C+1, and C might need to match I,
2331 then C+1 might also need to match I. */
2332 if (commutative >= 0)
2334 if (c == commutative || c == commutative + 1)
2336 int other = c + (c == commutative ? 1 : -1);
2337 operands_match[other][i]
2338 = operands_match_p (recog_operand[other], recog_operand[i]);
2340 if (i == commutative || i == commutative + 1)
2342 int other = i + (i == commutative ? 1 : -1);
2343 operands_match[c][other]
2344 = operands_match_p (recog_operand[c], recog_operand[other]);
2346 /* Note that C is supposed to be less than I.
2347 No need to consider altering both C and I because in
2348 that case we would alter one into the other. */
2354 /* Examine each operand that is a memory reference or memory address
2355 and reload parts of the addresses into index registers.
2356 Also here any references to pseudo regs that didn't get hard regs
2357 but are equivalent to constants get replaced in the insn itself
2358 with those constants. Nobody will ever see them again.
2360 Finally, set up the preferred classes of each operand. */
2362 for (i = 0; i < noperands; i++)
2364 register RTX_CODE code = GET_CODE (recog_operand[i]);
2366 address_reloaded[i] = 0;
2367 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2368 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2371 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2372 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2375 if (*constraints[i] == 0)
2376 /* Ignore things like match_operator operands. */
2378 else if (constraints[i][0] == 'p')
2380 find_reloads_address (VOIDmode, NULL_PTR,
2381 recog_operand[i], recog_operand_loc[i],
2382 i, operand_type[i], ind_levels);
2383 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2385 else if (code == MEM)
2387 if (find_reloads_address (GET_MODE (recog_operand[i]),
2388 recog_operand_loc[i],
2389 XEXP (recog_operand[i], 0),
2390 &XEXP (recog_operand[i], 0),
2391 i, address_type[i], ind_levels))
2392 address_reloaded[i] = 1;
2393 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2395 else if (code == SUBREG)
2396 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2397 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2400 && &SET_DEST (set) == recog_operand_loc[i]);
2401 else if (code == PLUS)
2402 /* We can get a PLUS as an "operand" as a result of
2403 register elimination. See eliminate_regs and gen_input_reload. */
2404 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2405 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2407 else if (code == REG)
2409 /* This is equivalent to calling find_reloads_toplev.
2410 The code is duplicated for speed.
2411 When we find a pseudo always equivalent to a constant,
2412 we replace it by the constant. We must be sure, however,
2413 that we don't try to replace it in the insn in which it
2415 register int regno = REGNO (recog_operand[i]);
2416 if (reg_equiv_constant[regno] != 0
2417 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2418 substed_operand[i] = recog_operand[i]
2419 = reg_equiv_constant[regno];
2420 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2421 that feeds this insn. */
2422 if (reg_equiv_mem[regno] != 0)
2423 substed_operand[i] = recog_operand[i]
2424 = reg_equiv_mem[regno];
2426 if (reg_equiv_address[regno] != 0)
2428 /* If reg_equiv_address is not a constant address, copy it,
2429 since it may be shared. */
2430 rtx address = reg_equiv_address[regno];
2432 if (rtx_varies_p (address))
2433 address = copy_rtx (address);
2435 /* If this is an output operand, we must output a CLOBBER
2436 after INSN so find_equiv_reg knows REGNO is being written.
2437 Mark this insn specially, do we can put our output reloads
2440 if (modified[i] != RELOAD_READ)
2441 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER, VOIDmode,
2446 *recog_operand_loc[i] = recog_operand[i]
2447 = gen_rtx (MEM, GET_MODE (recog_operand[i]), address);
2448 RTX_UNCHANGING_P (recog_operand[i])
2449 = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
2450 find_reloads_address (GET_MODE (recog_operand[i]),
2451 recog_operand_loc[i],
2452 XEXP (recog_operand[i], 0),
2453 &XEXP (recog_operand[i], 0),
2454 i, address_type[i], ind_levels);
2455 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2458 /* If the operand is still a register (we didn't replace it with an
2459 equivalent), get the preferred class to reload it into. */
2460 code = GET_CODE (recog_operand[i]);
2462 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2463 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2465 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2466 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2469 /* If this is simply a copy from operand 1 to operand 0, merge the
2470 preferred classes for the operands. */
2471 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2472 && recog_operand[1] == SET_SRC (set))
2474 preferred_class[0] = preferred_class[1]
2475 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2476 pref_or_nothing[0] |= pref_or_nothing[1];
2477 pref_or_nothing[1] |= pref_or_nothing[0];
2480 /* Now see what we need for pseudo-regs that didn't get hard regs
2481 or got the wrong kind of hard reg. For this, we must consider
2482 all the operands together against the register constraints. */
2484 best = MAX_RECOG_OPERANDS + 300;
2487 goal_alternative_swapped = 0;
2490 /* The constraints are made of several alternatives.
2491 Each operand's constraint looks like foo,bar,... with commas
2492 separating the alternatives. The first alternatives for all
2493 operands go together, the second alternatives go together, etc.
2495 First loop over alternatives. */
2497 for (this_alternative_number = 0;
2498 this_alternative_number < n_alternatives;
2499 this_alternative_number++)
2501 /* Loop over operands for one constraint alternative. */
2502 /* LOSERS counts those that don't fit this alternative
2503 and would require loading. */
2505 /* BAD is set to 1 if it some operand can't fit this alternative
2506 even after reloading. */
2508 /* REJECT is a count of how undesirable this alternative says it is
2509 if any reloading is required. If the alternative matches exactly
2510 then REJECT is ignored, but otherwise it gets this much
2511 counted against it in addition to the reloading needed. Each
2512 ? counts three times here since we want the disparaging caused by
2513 a bad register class to only count 1/3 as much. */
2516 this_earlyclobber = 0;
2518 for (i = 0; i < noperands; i++)
2520 register char *p = constraints[i];
2521 register int win = 0;
2522 /* 0 => this operand can be reloaded somehow for this alternative */
2524 /* 0 => this operand can be reloaded if the alternative allows regs. */
2527 register rtx operand = recog_operand[i];
2529 /* Nonzero means this is a MEM that must be reloaded into a reg
2530 regardless of what the constraint says. */
2531 int force_reload = 0;
2533 /* Nonzero if a constant forced into memory would be OK for this
2536 int earlyclobber = 0;
2538 /* If the operand is a SUBREG, extract
2539 the REG or MEM (or maybe even a constant) within.
2540 (Constants can occur as a result of reg_equiv_constant.) */
2542 while (GET_CODE (operand) == SUBREG)
2544 offset += SUBREG_WORD (operand);
2545 operand = SUBREG_REG (operand);
2546 /* Force reload if this is a constant or PLUS or if there may may
2547 be a problem accessing OPERAND in the outer mode. */
2548 if (CONSTANT_P (operand)
2549 || GET_CODE (operand) == PLUS
2550 /* We must force a reload of paradoxical SUBREGs
2551 of a MEM because the alignment of the inner value
2552 may not be enough to do the outer reference.
2554 On machines that extend byte operations and we have a
2555 SUBREG where both the inner and outer modes are different
2556 size but no wider than a word, combine.c has made
2557 assumptions about the behavior of the machine in such
2558 register access. If the data is, in fact, in memory we
2559 must always load using the size assumed to be in the
2560 register and let the insn do the different-sized
2562 || ((GET_CODE (operand) == MEM
2563 || (GET_CODE (operand)== REG
2564 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2565 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2566 < BIGGEST_ALIGNMENT)
2567 && (GET_MODE_SIZE (operand_mode[i])
2568 > GET_MODE_SIZE (GET_MODE (operand))))
2569 #ifdef LOAD_EXTEND_OP
2570 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2571 && (GET_MODE_SIZE (GET_MODE (operand))
2573 && (GET_MODE_SIZE (operand_mode[i])
2574 != GET_MODE_SIZE (GET_MODE (operand))))
2577 /* Subreg of a hard reg which can't handle the subreg's mode
2578 or which would handle that mode in the wrong number of
2579 registers for subregging to work. */
2580 || (GET_CODE (operand) == REG
2581 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2582 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2583 && (GET_MODE_SIZE (GET_MODE (operand))
2585 && ((GET_MODE_SIZE (GET_MODE (operand))
2587 != HARD_REGNO_NREGS (REGNO (operand),
2588 GET_MODE (operand))))
2589 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2594 this_alternative[i] = (int) NO_REGS;
2595 this_alternative_win[i] = 0;
2596 this_alternative_offmemok[i] = 0;
2597 this_alternative_earlyclobber[i] = 0;
2598 this_alternative_matches[i] = -1;
2600 /* An empty constraint or empty alternative
2601 allows anything which matched the pattern. */
2602 if (*p == 0 || *p == ',')
2605 /* Scan this alternative's specs for this operand;
2606 set WIN if the operand fits any letter in this alternative.
2607 Otherwise, clear BADOP if this operand could
2608 fit some letter after reloads,
2609 or set WINREG if this operand could fit after reloads
2610 provided the constraint allows some registers. */
2612 while (*p && (c = *p++) != ',')
2621 /* The last operand should not be marked commutative. */
2622 if (i != noperands - 1)
2635 /* Ignore rest of this alternative as far as
2636 reloading is concerned. */
2637 while (*p && *p != ',') p++;
2646 this_alternative_matches[i] = c;
2647 /* We are supposed to match a previous operand.
2648 If we do, we win if that one did.
2649 If we do not, count both of the operands as losers.
2650 (This is too conservative, since most of the time
2651 only a single reload insn will be needed to make
2652 the two operands win. As a result, this alternative
2653 may be rejected when it is actually desirable.) */
2654 if ((swapped && (c != commutative || i != commutative + 1))
2655 /* If we are matching as if two operands were swapped,
2656 also pretend that operands_match had been computed
2658 But if I is the second of those and C is the first,
2659 don't exchange them, because operands_match is valid
2660 only on one side of its diagonal. */
2662 [(c == commutative || c == commutative + 1)
2663 ? 2*commutative + 1 - c : c]
2664 [(i == commutative || i == commutative + 1)
2665 ? 2*commutative + 1 - i : i])
2666 : operands_match[c][i])
2667 win = this_alternative_win[c];
2670 /* Operands don't match. */
2672 /* Retroactively mark the operand we had to match
2673 as a loser, if it wasn't already. */
2674 if (this_alternative_win[c])
2676 this_alternative_win[c] = 0;
2677 if (this_alternative[c] == (int) NO_REGS)
2679 /* But count the pair only once in the total badness of
2680 this alternative, if the pair can be a dummy reload. */
2682 = find_dummy_reload (recog_operand[i], recog_operand[c],
2683 recog_operand_loc[i], recog_operand_loc[c],
2684 operand_mode[i], operand_mode[c],
2685 this_alternative[c], -1);
2690 /* This can be fixed with reloads if the operand
2691 we are supposed to match can be fixed with reloads. */
2693 this_alternative[i] = this_alternative[c];
2695 /* If we have to reload this operand and some previous
2696 operand also had to match the same thing as this
2697 operand, we don't know how to do that. So reject this
2699 if (! win || force_reload)
2700 for (j = 0; j < i; j++)
2701 if (this_alternative_matches[j]
2702 == this_alternative_matches[i])
2708 /* All necessary reloads for an address_operand
2709 were handled in find_reloads_address. */
2710 this_alternative[i] = (int) ALL_REGS;
2717 if (GET_CODE (operand) == MEM
2718 || (GET_CODE (operand) == REG
2719 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2720 && reg_renumber[REGNO (operand)] < 0))
2722 if (CONSTANT_P (operand))
2728 if (GET_CODE (operand) == MEM
2729 && ! address_reloaded[i]
2730 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2731 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2736 if (GET_CODE (operand) == MEM
2737 && ! address_reloaded[i]
2738 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2739 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2743 /* Memory operand whose address is not offsettable. */
2747 if (GET_CODE (operand) == MEM
2748 && ! (ind_levels ? offsettable_memref_p (operand)
2749 : offsettable_nonstrict_memref_p (operand))
2750 /* Certain mem addresses will become offsettable
2751 after they themselves are reloaded. This is important;
2752 we don't want our own handling of unoffsettables
2753 to override the handling of reg_equiv_address. */
2754 && !(GET_CODE (XEXP (operand, 0)) == REG
2756 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
2760 /* Memory operand whose address is offsettable. */
2764 if ((GET_CODE (operand) == MEM
2765 /* If IND_LEVELS, find_reloads_address won't reload a
2766 pseudo that didn't get a hard reg, so we have to
2767 reject that case. */
2768 && (ind_levels ? offsettable_memref_p (operand)
2769 : offsettable_nonstrict_memref_p (operand)))
2770 /* Certain mem addresses will become offsettable
2771 after they themselves are reloaded. This is important;
2772 we don't want our own handling of unoffsettables
2773 to override the handling of reg_equiv_address. */
2774 || (GET_CODE (operand) == MEM
2775 && GET_CODE (XEXP (operand, 0)) == REG
2777 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
2778 || (GET_CODE (operand) == REG
2779 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2780 && reg_renumber[REGNO (operand)] < 0
2781 /* If reg_equiv_address is nonzero, we will be
2782 loading it into a register; hence it will be
2783 offsettable, but we cannot say that reg_equiv_mem
2784 is offsettable without checking. */
2785 && ((reg_equiv_mem[REGNO (operand)] != 0
2786 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
2787 || (reg_equiv_address[REGNO (operand)] != 0))))
2789 if (CONSTANT_P (operand) || GET_CODE (operand) == MEM)
2796 /* Output operand that is stored before the need for the
2797 input operands (and their index registers) is over. */
2798 earlyclobber = 1, this_earlyclobber = 1;
2802 /* Match any floating double constant, but only if
2803 we can examine the bits of it reliably. */
2804 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
2805 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
2806 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
2808 if (GET_CODE (operand) == CONST_DOUBLE)
2813 if (GET_CODE (operand) == CONST_DOUBLE)
2819 if (GET_CODE (operand) == CONST_DOUBLE
2820 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
2825 if (GET_CODE (operand) == CONST_INT
2826 || (GET_CODE (operand) == CONST_DOUBLE
2827 && GET_MODE (operand) == VOIDmode))
2830 if (CONSTANT_P (operand)
2831 #ifdef LEGITIMATE_PIC_OPERAND_P
2832 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
2839 if (GET_CODE (operand) == CONST_INT
2840 || (GET_CODE (operand) == CONST_DOUBLE
2841 && GET_MODE (operand) == VOIDmode))
2853 if (GET_CODE (operand) == CONST_INT
2854 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
2864 /* A PLUS is never a valid operand, but reload can make
2865 it from a register when eliminating registers. */
2866 && GET_CODE (operand) != PLUS
2867 /* A SCRATCH is not a valid operand. */
2868 && GET_CODE (operand) != SCRATCH
2869 #ifdef LEGITIMATE_PIC_OPERAND_P
2870 && (! CONSTANT_P (operand)
2872 || LEGITIMATE_PIC_OPERAND_P (operand))
2874 && (GENERAL_REGS == ALL_REGS
2875 || GET_CODE (operand) != REG
2876 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
2877 && reg_renumber[REGNO (operand)] < 0)))
2879 /* Drop through into 'r' case */
2883 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
2886 #ifdef EXTRA_CONSTRAINT
2892 if (EXTRA_CONSTRAINT (operand, c))
2899 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
2902 if (GET_MODE (operand) == BLKmode)
2905 if (GET_CODE (operand) == REG
2906 && reg_fits_class_p (operand, this_alternative[i],
2907 offset, GET_MODE (recog_operand[i])))
2914 /* If this operand could be handled with a reg,
2915 and some reg is allowed, then this operand can be handled. */
2916 if (winreg && this_alternative[i] != (int) NO_REGS)
2919 /* Record which operands fit this alternative. */
2920 this_alternative_earlyclobber[i] = earlyclobber;
2921 if (win && ! force_reload)
2922 this_alternative_win[i] = 1;
2925 int const_to_mem = 0;
2927 this_alternative_offmemok[i] = offmemok;
2931 /* Alternative loses if it has no regs for a reg operand. */
2932 if (GET_CODE (operand) == REG
2933 && this_alternative[i] == (int) NO_REGS
2934 && this_alternative_matches[i] < 0)
2937 /* Alternative loses if it requires a type of reload not
2938 permitted for this insn. We can always reload SCRATCH
2939 and objects with a REG_UNUSED note. */
2940 if (GET_CODE (operand) != SCRATCH
2941 && modified[i] != RELOAD_READ && no_output_reloads
2942 && ! find_reg_note (insn, REG_UNUSED, operand))
2944 else if (modified[i] != RELOAD_WRITE && no_input_reloads)
2947 /* If this is a constant that is reloaded into the desired
2948 class by copying it to memory first, count that as another
2949 reload. This is consistent with other code and is
2950 required to avoid chosing another alternative when
2951 the constant is moved into memory by this function on
2952 an early reload pass. Note that the test here is
2953 precisely the same as in the code below that calls
2955 if (CONSTANT_P (operand)
2956 && (PREFERRED_RELOAD_CLASS (operand,
2957 (enum reg_class) this_alternative[i])
2959 && operand_mode[i] != VOIDmode)
2962 if (this_alternative[i] != (int) NO_REGS)
2966 /* If we can't reload this value at all, reject this
2967 alternative. Note that we could also lose due to
2968 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
2971 if (! CONSTANT_P (operand)
2972 && (PREFERRED_RELOAD_CLASS (operand,
2973 (enum reg_class) this_alternative[i])
2977 /* We prefer to reload pseudos over reloading other things,
2978 since such reloads may be able to be eliminated later.
2979 If we are reloading a SCRATCH, we won't be generating any
2980 insns, just using a register, so it is also preferred.
2981 So bump REJECT in other cases. Don't do this in the
2982 case where we are forcing a constant into memory and
2983 it will then win since we don't want to have a different
2984 alternative match then. */
2985 if (! (GET_CODE (operand) == REG
2986 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
2987 && GET_CODE (operand) != SCRATCH
2988 && ! (const_to_mem && constmemok))
2992 /* If this operand is a pseudo register that didn't get a hard
2993 reg and this alternative accepts some register, see if the
2994 class that we want is a subset of the preferred class for this
2995 register. If not, but it intersects that class, use the
2996 preferred class instead. If it does not intersect the preferred
2997 class, show that usage of this alternative should be discouraged;
2998 it will be discouraged more still if the register is `preferred
2999 or nothing'. We do this because it increases the chance of
3000 reusing our spill register in a later insn and avoiding a pair
3001 of memory stores and loads.
3003 Don't bother with this if this alternative will accept this
3006 Don't do this for a multiword operand, since it is only a
3007 small win and has the risk of requiring more spill registers,
3008 which could cause a large loss.
3010 Don't do this if the preferred class has only one register
3011 because we might otherwise exhaust the class. */
3014 if (! win && this_alternative[i] != (int) NO_REGS
3015 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3016 && reg_class_size[(int) preferred_class[i]] > 1)
3018 if (! reg_class_subset_p (this_alternative[i],
3019 preferred_class[i]))
3021 /* Since we don't have a way of forming the intersection,
3022 we just do something special if the preferred class
3023 is a subset of the class we have; that's the most
3024 common case anyway. */
3025 if (reg_class_subset_p (preferred_class[i],
3026 this_alternative[i]))
3027 this_alternative[i] = (int) preferred_class[i];
3029 reject += (1 + pref_or_nothing[i]);
3034 /* Now see if any output operands that are marked "earlyclobber"
3035 in this alternative conflict with any input operands
3036 or any memory addresses. */
3038 for (i = 0; i < noperands; i++)
3039 if (this_alternative_earlyclobber[i]
3040 && this_alternative_win[i])
3042 struct decomposition early_data;
3044 early_data = decompose (recog_operand[i]);
3046 if (modified[i] == RELOAD_READ)
3048 if (this_insn_is_asm)
3049 warning_for_asm (this_insn,
3050 "`&' constraint used with input operand");
3056 if (this_alternative[i] == NO_REGS)
3058 this_alternative_earlyclobber[i] = 0;
3059 if (this_insn_is_asm)
3060 error_for_asm (this_insn,
3061 "`&' constraint used with no register class");
3066 for (j = 0; j < noperands; j++)
3067 /* Is this an input operand or a memory ref? */
3068 if ((GET_CODE (recog_operand[j]) == MEM
3069 || modified[j] != RELOAD_WRITE)
3071 /* Ignore things like match_operator operands. */
3072 && *constraints1[j] != 0
3073 /* Don't count an input operand that is constrained to match
3074 the early clobber operand. */
3075 && ! (this_alternative_matches[j] == i
3076 && rtx_equal_p (recog_operand[i], recog_operand[j]))
3077 /* Is it altered by storing the earlyclobber operand? */
3078 && !immune_p (recog_operand[j], recog_operand[i], early_data))
3080 /* If the output is in a single-reg class,
3081 it's costly to reload it, so reload the input instead. */
3082 if (reg_class_size[this_alternative[i]] == 1
3083 && (GET_CODE (recog_operand[j]) == REG
3084 || GET_CODE (recog_operand[j]) == SUBREG))
3087 this_alternative_win[j] = 0;
3092 /* If an earlyclobber operand conflicts with something,
3093 it must be reloaded, so request this and count the cost. */
3097 this_alternative_win[i] = 0;
3098 for (j = 0; j < noperands; j++)
3099 if (this_alternative_matches[j] == i
3100 && this_alternative_win[j])
3102 this_alternative_win[j] = 0;
3108 /* If one alternative accepts all the operands, no reload required,
3109 choose that alternative; don't consider the remaining ones. */
3112 /* Unswap these so that they are never swapped at `finish'. */
3113 if (commutative >= 0)
3115 recog_operand[commutative] = substed_operand[commutative];
3116 recog_operand[commutative + 1]
3117 = substed_operand[commutative + 1];
3119 for (i = 0; i < noperands; i++)
3121 goal_alternative_win[i] = 1;
3122 goal_alternative[i] = this_alternative[i];
3123 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3124 goal_alternative_matches[i] = this_alternative_matches[i];
3125 goal_alternative_earlyclobber[i]
3126 = this_alternative_earlyclobber[i];
3128 goal_alternative_number = this_alternative_number;
3129 goal_alternative_swapped = swapped;
3130 goal_earlyclobber = this_earlyclobber;
3134 /* REJECT, set by the ! and ? constraint characters and when a register
3135 would be reloaded into a non-preferred class, discourages the use of
3136 this alternative for a reload goal. REJECT is incremented by three
3137 for each ? and one for each non-preferred class. */
3138 losers = losers * 3 + reject;
3140 /* If this alternative can be made to work by reloading,
3141 and it needs less reloading than the others checked so far,
3142 record it as the chosen goal for reloading. */
3143 if (! bad && best > losers)
3145 for (i = 0; i < noperands; i++)
3147 goal_alternative[i] = this_alternative[i];
3148 goal_alternative_win[i] = this_alternative_win[i];
3149 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3150 goal_alternative_matches[i] = this_alternative_matches[i];
3151 goal_alternative_earlyclobber[i]
3152 = this_alternative_earlyclobber[i];
3154 goal_alternative_swapped = swapped;
3156 goal_alternative_number = this_alternative_number;
3157 goal_earlyclobber = this_earlyclobber;
3161 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3162 then we need to try each alternative twice,
3163 the second time matching those two operands
3164 as if we had exchanged them.
3165 To do this, really exchange them in operands.
3167 If we have just tried the alternatives the second time,
3168 return operands to normal and drop through. */
3170 if (commutative >= 0)
3175 register enum reg_class tclass;
3178 recog_operand[commutative] = substed_operand[commutative + 1];
3179 recog_operand[commutative + 1] = substed_operand[commutative];
3181 tclass = preferred_class[commutative];
3182 preferred_class[commutative] = preferred_class[commutative + 1];
3183 preferred_class[commutative + 1] = tclass;
3185 t = pref_or_nothing[commutative];
3186 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3187 pref_or_nothing[commutative + 1] = t;
3189 bcopy (constraints1, constraints, noperands * sizeof (char *));
3194 recog_operand[commutative] = substed_operand[commutative];
3195 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3199 /* The operands don't meet the constraints.
3200 goal_alternative describes the alternative
3201 that we could reach by reloading the fewest operands.
3202 Reload so as to fit it. */
3204 if (best == MAX_RECOG_OPERANDS + 300)
3206 /* No alternative works with reloads?? */
3207 if (insn_code_number >= 0)
3209 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3210 /* Avoid further trouble with this insn. */
3211 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3216 /* Jump to `finish' from above if all operands are valid already.
3217 In that case, goal_alternative_win is all 1. */
3220 /* Right now, for any pair of operands I and J that are required to match,
3222 goal_alternative_matches[J] is I.
3223 Set up goal_alternative_matched as the inverse function:
3224 goal_alternative_matched[I] = J. */
3226 for (i = 0; i < noperands; i++)
3227 goal_alternative_matched[i] = -1;
3229 for (i = 0; i < noperands; i++)
3230 if (! goal_alternative_win[i]
3231 && goal_alternative_matches[i] >= 0)
3232 goal_alternative_matched[goal_alternative_matches[i]] = i;
3234 /* If the best alternative is with operands 1 and 2 swapped,
3235 consider them swapped before reporting the reloads. Update the
3236 operand numbers of any reloads already pushed. */
3238 if (goal_alternative_swapped)
3242 tem = substed_operand[commutative];
3243 substed_operand[commutative] = substed_operand[commutative + 1];
3244 substed_operand[commutative + 1] = tem;
3245 tem = recog_operand[commutative];
3246 recog_operand[commutative] = recog_operand[commutative + 1];
3247 recog_operand[commutative + 1] = tem;
3249 for (i = 0; i < n_reloads; i++)
3251 if (reload_opnum[i] == commutative)
3252 reload_opnum[i] = commutative + 1;
3253 else if (reload_opnum[i] == commutative + 1)
3254 reload_opnum[i] = commutative;
3258 /* Perform whatever substitutions on the operands we are supposed
3259 to make due to commutativity or replacement of registers
3260 with equivalent constants or memory slots. */
3262 for (i = 0; i < noperands; i++)
3264 *recog_operand_loc[i] = substed_operand[i];
3265 /* While we are looping on operands, initialize this. */
3266 operand_reloadnum[i] = -1;
3268 /* If this is an earlyclobber operand, we need to widen the scope.
3269 The reload must remain valid from the start of the insn being
3270 reloaded until after the operand is stored into its destination.
3271 We approximate this with RELOAD_OTHER even though we know that we
3272 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3274 One special case that is worth checking is when we have an
3275 output that is earlyclobber but isn't used past the insn (typically
3276 a SCRATCH). In this case, we only need have the reload live
3277 through the insn itself, but not for any of our input or output
3280 In any case, anything needed to address this operand can remain
3281 however they were previously categorized. */
3283 if (goal_alternative_earlyclobber[i])
3285 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3286 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3289 /* Any constants that aren't allowed and can't be reloaded
3290 into registers are here changed into memory references. */
3291 for (i = 0; i < noperands; i++)
3292 if (! goal_alternative_win[i]
3293 && CONSTANT_P (recog_operand[i])
3294 && (PREFERRED_RELOAD_CLASS (recog_operand[i],
3295 (enum reg_class) goal_alternative[i])
3297 && operand_mode[i] != VOIDmode)
3299 *recog_operand_loc[i] = recog_operand[i]
3300 = find_reloads_toplev (force_const_mem (operand_mode[i],
3302 i, address_type[i], ind_levels, 0);
3303 if (alternative_allows_memconst (constraints1[i],
3304 goal_alternative_number))
3305 goal_alternative_win[i] = 1;
3308 /* Record the values of the earlyclobber operands for the caller. */
3309 if (goal_earlyclobber)
3310 for (i = 0; i < noperands; i++)
3311 if (goal_alternative_earlyclobber[i])
3312 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3314 /* Now record reloads for all the operands that need them. */
3315 for (i = 0; i < noperands; i++)
3316 if (! goal_alternative_win[i])
3318 /* Operands that match previous ones have already been handled. */
3319 if (goal_alternative_matches[i] >= 0)
3321 /* Handle an operand with a nonoffsettable address
3322 appearing where an offsettable address will do
3323 by reloading the address into a base register.
3325 ??? We can also do this when the operand is a register and
3326 reg_equiv_mem is not offsettable, but this is a bit tricky,
3327 so we don't bother with it. It may not be worth doing. */
3328 else if (goal_alternative_matched[i] == -1
3329 && goal_alternative_offmemok[i]
3330 && GET_CODE (recog_operand[i]) == MEM)
3332 operand_reloadnum[i]
3333 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3334 &XEXP (recog_operand[i], 0), NULL_PTR,
3335 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3336 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3337 reload_inc[operand_reloadnum[i]]
3338 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3340 /* If this operand is an output, we will have made any
3341 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3342 now we are treating part of the operand as an input, so
3343 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3345 if (modified[i] == RELOAD_WRITE)
3346 for (j = 0; j < n_reloads; j++)
3347 if (reload_opnum[j] == i
3348 && reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3349 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3351 else if (goal_alternative_matched[i] == -1)
3352 operand_reloadnum[i] =
3353 push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3354 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3355 (modified[i] != RELOAD_WRITE ?
3356 recog_operand_loc[i] : 0),
3357 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3358 (enum reg_class) goal_alternative[i],
3359 (modified[i] == RELOAD_WRITE
3360 ? VOIDmode : operand_mode[i]),
3361 (modified[i] == RELOAD_READ
3362 ? VOIDmode : operand_mode[i]),
3363 (insn_code_number < 0 ? 0
3364 : insn_operand_strict_low[insn_code_number][i]),
3365 0, i, operand_type[i]);
3366 /* In a matching pair of operands, one must be input only
3367 and the other must be output only.
3368 Pass the input operand as IN and the other as OUT. */
3369 else if (modified[i] == RELOAD_READ
3370 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3372 operand_reloadnum[i]
3373 = push_reload (recog_operand[i],
3374 recog_operand[goal_alternative_matched[i]],
3375 recog_operand_loc[i],
3376 recog_operand_loc[goal_alternative_matched[i]],
3377 (enum reg_class) goal_alternative[i],
3379 operand_mode[goal_alternative_matched[i]],
3380 0, 0, i, RELOAD_OTHER);
3381 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3383 else if (modified[i] == RELOAD_WRITE
3384 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3386 operand_reloadnum[goal_alternative_matched[i]]
3387 = push_reload (recog_operand[goal_alternative_matched[i]],
3389 recog_operand_loc[goal_alternative_matched[i]],
3390 recog_operand_loc[i],
3391 (enum reg_class) goal_alternative[i],
3392 operand_mode[goal_alternative_matched[i]],
3394 0, 0, i, RELOAD_OTHER);
3395 operand_reloadnum[i] = output_reloadnum;
3397 else if (insn_code_number >= 0)
3401 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3402 /* Avoid further trouble with this insn. */
3403 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3408 else if (goal_alternative_matched[i] < 0
3409 && goal_alternative_matches[i] < 0
3412 /* For each non-matching operand that's a MEM or a pseudo-register
3413 that didn't get a hard register, make an optional reload.
3414 This may get done even if the insn needs no reloads otherwise. */
3416 rtx operand = recog_operand[i];
3418 while (GET_CODE (operand) == SUBREG)
3419 operand = XEXP (operand, 0);
3420 if ((GET_CODE (operand) == MEM
3421 || (GET_CODE (operand) == REG
3422 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3423 && (enum reg_class) goal_alternative[i] != NO_REGS
3424 && ! no_input_reloads
3425 /* Optional output reloads don't do anything and we mustn't
3426 make in-out reloads on insns that are not permitted output
3428 && (modified[i] == RELOAD_READ
3429 || (modified[i] == RELOAD_READ_WRITE && ! no_output_reloads)))
3430 operand_reloadnum[i]
3431 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3432 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3433 (modified[i] != RELOAD_WRITE
3434 ? recog_operand_loc[i] : 0),
3435 (modified[i] != RELOAD_READ
3436 ? recog_operand_loc[i] : 0),
3437 (enum reg_class) goal_alternative[i],
3438 (modified[i] == RELOAD_WRITE
3439 ? VOIDmode : operand_mode[i]),
3440 (modified[i] == RELOAD_READ
3441 ? VOIDmode : operand_mode[i]),
3442 (insn_code_number < 0 ? 0
3443 : insn_operand_strict_low[insn_code_number][i]),
3444 1, i, operand_type[i]);
3446 else if (goal_alternative_matches[i] >= 0
3447 && goal_alternative_win[goal_alternative_matches[i]]
3448 && modified[i] == RELOAD_READ
3449 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3450 && ! no_input_reloads && ! no_output_reloads
3453 /* Similarly, make an optional reload for a pair of matching
3454 objects that are in MEM or a pseudo that didn't get a hard reg. */
3456 rtx operand = recog_operand[i];
3458 while (GET_CODE (operand) == SUBREG)
3459 operand = XEXP (operand, 0);
3460 if ((GET_CODE (operand) == MEM
3461 || (GET_CODE (operand) == REG
3462 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3463 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3465 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3466 = push_reload (recog_operand[goal_alternative_matches[i]],
3468 recog_operand_loc[goal_alternative_matches[i]],
3469 recog_operand_loc[i],
3470 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3471 operand_mode[goal_alternative_matches[i]],
3473 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3476 /* If this insn pattern contains any MATCH_DUP's, make sure that
3477 they will be substituted if the operands they match are substituted.
3478 Also do now any substitutions we already did on the operands.
3480 Don't do this if we aren't making replacements because we might be
3481 propagating things allocated by frame pointer elimination into places
3482 it doesn't expect. */
3484 if (insn_code_number >= 0 && replace)
3485 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3487 int opno = recog_dup_num[i];
3488 *recog_dup_loc[i] = *recog_operand_loc[opno];
3489 if (operand_reloadnum[opno] >= 0)
3490 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3491 insn_operand_mode[insn_code_number][opno]);
3495 /* This loses because reloading of prior insns can invalidate the equivalence
3496 (or at least find_equiv_reg isn't smart enough to find it any more),
3497 causing this insn to need more reload regs than it needed before.
3498 It may be too late to make the reload regs available.
3499 Now this optimization is done safely in choose_reload_regs. */
3501 /* For each reload of a reg into some other class of reg,
3502 search for an existing equivalent reg (same value now) in the right class.
3503 We can use it as long as we don't need to change its contents. */
3504 for (i = 0; i < n_reloads; i++)
3505 if (reload_reg_rtx[i] == 0
3506 && reload_in[i] != 0
3507 && GET_CODE (reload_in[i]) == REG
3508 && reload_out[i] == 0)
3511 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3512 static_reload_reg_p, 0, reload_inmode[i]);
3513 /* Prevent generation of insn to load the value
3514 because the one we found already has the value. */
3515 if (reload_reg_rtx[i])
3516 reload_in[i] = reload_reg_rtx[i];
3520 /* Perhaps an output reload can be combined with another
3521 to reduce needs by one. */
3522 if (!goal_earlyclobber)
3525 /* If we have a pair of reloads for parts of an address, they are reloading
3526 the same object, the operands themselves were not reloaded, and they
3527 are for two operands that are supposed to match, merge the reloads and
3528 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3530 for (i = 0; i < n_reloads; i++)
3534 for (j = i + 1; j < n_reloads; j++)
3535 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3536 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3537 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3538 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3539 && rtx_equal_p (reload_in[i], reload_in[j])
3540 && (operand_reloadnum[reload_opnum[i]] < 0
3541 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3542 && (operand_reloadnum[reload_opnum[j]] < 0
3543 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3544 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3545 || (goal_alternative_matches[reload_opnum[j]]
3546 == reload_opnum[i])))
3548 for (k = 0; k < n_replacements; k++)
3549 if (replacements[k].what == j)
3550 replacements[k].what = i;
3552 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3557 /* Scan all the reloads and update their type.
3558 If a reload is for the address of an operand and we didn't reload
3559 that operand, change the type. Similarly, change the operand number
3560 of a reload when two operands match. If a reload is optional, treat it
3561 as though the operand isn't reloaded.
3563 ??? This latter case is somewhat odd because if we do the optional
3564 reload, it means the object is hanging around. Thus we need only
3565 do the address reload if the optional reload was NOT done.
3567 Change secondary reloads to be the address type of their operand, not
3570 If an operand's reload is now RELOAD_OTHER, change any
3571 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3572 RELOAD_FOR_OTHER_ADDRESS. */
3574 for (i = 0; i < n_reloads; i++)
3576 if (reload_secondary_p[i]
3577 && reload_when_needed[i] == operand_type[reload_opnum[i]])
3578 reload_when_needed[i] = address_type[reload_opnum[i]];
3580 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3581 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3582 && (operand_reloadnum[reload_opnum[i]] < 0
3583 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3584 && ! reload_secondary_p[i])
3585 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3587 if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3588 && operand_reloadnum[reload_opnum[i]] >= 0
3589 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
3591 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
3593 if (goal_alternative_matches[reload_opnum[i]] >= 0)
3594 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
3597 /* See if we have any reloads that are now allowed to be merged
3598 because we've changed when the reload is needed to
3599 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3600 check for the most common cases. */
3602 for (i = 0; i < n_reloads; i++)
3603 if (reload_in[i] != 0 && reload_out[i] == 0
3604 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
3605 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
3606 for (j = 0; j < n_reloads; j++)
3607 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
3608 && reload_when_needed[j] == reload_when_needed[i]
3609 && MATCHES (reload_in[i], reload_in[j])
3610 && reload_reg_class[i] == reload_reg_class[j]
3611 && !reload_nocombine[i] && !reload_nocombine[j]
3612 && reload_reg_rtx[i] == reload_reg_rtx[j])
3614 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
3615 transfer_replacements (i, j);
3619 #else /* no REGISTER_CONSTRAINTS */
3621 int insn_code_number;
3622 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
3624 rtx body = PATTERN (insn);
3628 n_earlyclobbers = 0;
3629 replace_reloads = replace;
3632 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3633 Store the operand values in RECOG_OPERAND and the locations
3634 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3635 Return if the insn needs no reload processing. */
3637 switch (GET_CODE (body))
3648 noperands = asm_noperands (body);
3651 /* This insn is an `asm' with operands.
3652 First, find out how many operands, and allocate space. */
3654 insn_code_number = -1;
3655 /* ??? This is a bug! ???
3656 Give up and delete this insn if it has too many operands. */
3657 if (noperands > MAX_RECOG_OPERANDS)
3660 /* Now get the operand values out of the insn. */
3662 decode_asm_operands (body, recog_operand, recog_operand_loc,
3663 NULL_PTR, NULL_PTR);
3668 /* Ordinary insn: recognize it, allocate space for operands and
3669 constraints, and get them out via insn_extract. */
3671 insn_code_number = recog_memoized (insn);
3672 noperands = insn_n_operands[insn_code_number];
3673 insn_extract (insn);
3679 for (i = 0; i < noperands; i++)
3681 register RTX_CODE code = GET_CODE (recog_operand[i]);
3682 int is_set_dest = GET_CODE (body) == SET && (i == 0);
3684 if (insn_code_number >= 0)
3685 if (insn_operand_address_p[insn_code_number][i])
3686 find_reloads_address (VOIDmode, NULL_PTR,
3687 recog_operand[i], recog_operand_loc[i],
3688 i, RELOAD_FOR_INPUT, ind_levels);
3690 /* In these cases, we can't tell if the operand is an input
3691 or an output, so be conservative. In practice it won't be
3695 find_reloads_address (GET_MODE (recog_operand[i]),
3696 recog_operand_loc[i],
3697 XEXP (recog_operand[i], 0),
3698 &XEXP (recog_operand[i], 0),
3699 i, RELOAD_OTHER, ind_levels);
3701 recog_operand[i] = *recog_operand_loc[i]
3702 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
3703 ind_levels, is_set_dest);
3706 register int regno = REGNO (recog_operand[i]);
3707 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3708 recog_operand[i] = *recog_operand_loc[i]
3709 = reg_equiv_constant[regno];
3710 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3711 that feeds this insn. */
3712 if (reg_equiv_mem[regno] != 0)
3713 recog_operand[i] = *recog_operand_loc[i]
3714 = reg_equiv_mem[regno];
3719 /* Perhaps an output reload can be combined with another
3720 to reduce needs by one. */
3721 if (!goal_earlyclobber)
3723 #endif /* no REGISTER_CONSTRAINTS */
3726 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3727 accepts a memory operand with constant address. */
3730 alternative_allows_memconst (constraint, altnum)
3735 /* Skip alternatives before the one requested. */
3738 while (*constraint++ != ',');
3741 /* Scan the requested alternative for 'm' or 'o'.
3742 If one of them is present, this alternative accepts memory constants. */
3743 while ((c = *constraint++) && c != ',' && c != '#')
3744 if (c == 'm' || c == 'o')
3749 /* Scan X for memory references and scan the addresses for reloading.
3750 Also checks for references to "constant" regs that we want to eliminate
3751 and replaces them with the values they stand for.
3752 We may alter X destructively if it contains a reference to such.
3753 If X is just a constant reg, we return the equivalent value
3756 IND_LEVELS says how many levels of indirect addressing this machine
3759 OPNUM and TYPE identify the purpose of the reload.
3761 IS_SET_DEST is true if X is the destination of a SET, which is not
3762 appropriate to be replaced by a constant. */
3765 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest)
3768 enum reload_type type;
3772 register RTX_CODE code = GET_CODE (x);
3774 register char *fmt = GET_RTX_FORMAT (code);
3779 /* This code is duplicated for speed in find_reloads. */
3780 register int regno = REGNO (x);
3781 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3782 x = reg_equiv_constant[regno];
3784 /* This creates (subreg (mem...)) which would cause an unnecessary
3785 reload of the mem. */
3786 else if (reg_equiv_mem[regno] != 0)
3787 x = reg_equiv_mem[regno];
3789 else if (reg_equiv_address[regno] != 0)
3791 /* If reg_equiv_address varies, it may be shared, so copy it. */
3792 rtx addr = reg_equiv_address[regno];
3794 if (rtx_varies_p (addr))
3795 addr = copy_rtx (addr);
3797 x = gen_rtx (MEM, GET_MODE (x), addr);
3798 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3799 find_reloads_address (GET_MODE (x), NULL_PTR,
3801 &XEXP (x, 0), opnum, type, ind_levels);
3808 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
3809 opnum, type, ind_levels);
3813 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
3815 /* Check for SUBREG containing a REG that's equivalent to a constant.
3816 If the constant has a known value, truncate it right now.
3817 Similarly if we are extracting a single-word of a multi-word
3818 constant. If the constant is symbolic, allow it to be substituted
3819 normally. push_reload will strip the subreg later. If the
3820 constant is VOIDmode, abort because we will lose the mode of
3821 the register (this should never happen because one of the cases
3822 above should handle it). */
3824 register int regno = REGNO (SUBREG_REG (x));
3827 if (subreg_lowpart_p (x)
3828 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3829 && reg_equiv_constant[regno] != 0
3830 && (tem = gen_lowpart_common (GET_MODE (x),
3831 reg_equiv_constant[regno])) != 0)
3834 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
3835 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3836 && reg_equiv_constant[regno] != 0
3837 && (tem = operand_subword (reg_equiv_constant[regno],
3839 GET_MODE (SUBREG_REG (x)))) != 0)
3842 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3843 && reg_equiv_constant[regno] != 0
3844 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
3847 /* If the subreg contains a reg that will be converted to a mem,
3848 convert the subreg to a narrower memref now.
3849 Otherwise, we would get (subreg (mem ...) ...),
3850 which would force reload of the mem.
3852 We also need to do this if there is an equivalent MEM that is
3853 not offsettable. In that case, alter_subreg would produce an
3854 invalid address on big-endian machines.
3856 For machines that extend byte loads, we must not reload using
3857 a wider mode if we have a paradoxical SUBREG. find_reloads will
3858 force a reload in that case. So we should not do anything here. */
3860 else if (regno >= FIRST_PSEUDO_REGISTER
3861 #ifdef LOAD_EXTEND_OP
3862 && (GET_MODE_SIZE (GET_MODE (x))
3863 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3865 && (reg_equiv_address[regno] != 0
3866 || (reg_equiv_mem[regno] != 0
3867 && (! strict_memory_address_p (GET_MODE (x),
3868 XEXP (reg_equiv_mem[regno], 0))
3869 || ! offsettable_memref_p (reg_equiv_mem[regno])))))
3871 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
3872 rtx addr = (reg_equiv_address[regno] ? reg_equiv_address[regno]
3873 : XEXP (reg_equiv_mem[regno], 0));
3874 #if BYTES_BIG_ENDIAN
3876 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
3877 offset += MIN (size, UNITS_PER_WORD);
3878 size = GET_MODE_SIZE (GET_MODE (x));
3879 offset -= MIN (size, UNITS_PER_WORD);
3881 addr = plus_constant (addr, offset);
3882 x = gen_rtx (MEM, GET_MODE (x), addr);
3883 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3884 find_reloads_address (GET_MODE (x), NULL_PTR,
3886 &XEXP (x, 0), opnum, type, ind_levels);
3891 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3894 XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
3895 ind_levels, is_set_dest);
3900 /* Return a mem ref for the memory equivalent of reg REGNO.
3901 This mem ref is not shared with anything. */
3904 make_memloc (ad, regno)
3909 rtx tem = reg_equiv_address[regno];
3911 #if 0 /* We cannot safely reuse a memloc made here;
3912 if the pseudo appears twice, and its mem needs a reload,
3913 it gets two separate reloads assigned, but it only
3914 gets substituted with the second of them;
3915 then it can get used before that reload reg gets loaded up. */
3916 for (i = 0; i < n_memlocs; i++)
3917 if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
3921 /* If TEM might contain a pseudo, we must copy it to avoid
3922 modifying it when we do the substitution for the reload. */
3923 if (rtx_varies_p (tem))
3924 tem = copy_rtx (tem);
3926 tem = gen_rtx (MEM, GET_MODE (ad), tem);
3927 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3928 memlocs[n_memlocs++] = tem;
3932 /* Record all reloads needed for handling memory address AD
3933 which appears in *LOC in a memory reference to mode MODE
3934 which itself is found in location *MEMREFLOC.
3935 Note that we take shortcuts assuming that no multi-reg machine mode
3936 occurs as part of an address.
3938 OPNUM and TYPE specify the purpose of this reload.
3940 IND_LEVELS says how many levels of indirect addressing this machine
3943 Value is nonzero if this address is reloaded or replaced as a whole.
3944 This is interesting to the caller if the address is an autoincrement.
3946 Note that there is no verification that the address will be valid after
3947 this routine does its work. Instead, we rely on the fact that the address
3948 was valid when reload started. So we need only undo things that reload
3949 could have broken. These are wrong register types, pseudos not allocated
3950 to a hard register, and frame pointer elimination. */
3953 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels)
3954 enum machine_mode mode;
3959 enum reload_type type;
3965 /* If the address is a register, see if it is a legitimate address and
3966 reload if not. We first handle the cases where we need not reload
3967 or where we must reload in a non-standard way. */
3969 if (GET_CODE (ad) == REG)
3973 if (reg_equiv_constant[regno] != 0
3974 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
3976 *loc = ad = reg_equiv_constant[regno];
3980 else if (reg_equiv_address[regno] != 0)
3982 tem = make_memloc (ad, regno);
3983 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
3984 &XEXP (tem, 0), opnum, type, ind_levels);
3985 push_reload (tem, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
3986 GET_MODE (ad), VOIDmode, 0, 0,
3991 /* We can avoid a reload if the register's equivalent memory expression
3992 is valid as an indirect memory address.
3993 But not all addresses are valid in a mem used as an indirect address:
3994 only reg or reg+constant. */
3996 else if (reg_equiv_mem[regno] != 0 && ind_levels > 0
3997 && strict_memory_address_p (mode, reg_equiv_mem[regno])
3998 && (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == REG
3999 || (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == PLUS
4000 && GET_CODE (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)) == REG
4001 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)))))
4004 /* The only remaining case where we can avoid a reload is if this is a
4005 hard register that is valid as a base register and which is not the
4006 subject of a CLOBBER in this insn. */
4008 else if (regno < FIRST_PSEUDO_REGISTER && REGNO_OK_FOR_BASE_P (regno)
4009 && ! regno_clobbered_p (regno, this_insn))
4012 /* If we do not have one of the cases above, we must do the reload. */
4013 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4014 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4018 if (strict_memory_address_p (mode, ad))
4020 /* The address appears valid, so reloads are not needed.
4021 But the address may contain an eliminable register.
4022 This can happen because a machine with indirect addressing
4023 may consider a pseudo register by itself a valid address even when
4024 it has failed to get a hard reg.
4025 So do a tree-walk to find and eliminate all such regs. */
4027 /* But first quickly dispose of a common case. */
4028 if (GET_CODE (ad) == PLUS
4029 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4030 && GET_CODE (XEXP (ad, 0)) == REG
4031 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4034 subst_reg_equivs_changed = 0;
4035 *loc = subst_reg_equivs (ad);
4037 if (! subst_reg_equivs_changed)
4040 /* Check result for validity after substitution. */
4041 if (strict_memory_address_p (mode, ad))
4045 /* The address is not valid. We have to figure out why. One possibility
4046 is that it is itself a MEM. This can happen when the frame pointer is
4047 being eliminated, a pseudo is not allocated to a hard register, and the
4048 offset between the frame and stack pointers is not its initial value.
4049 In that case the pseudo will have been replaced by a MEM referring to
4050 the stack pointer. */
4051 if (GET_CODE (ad) == MEM)
4053 /* First ensure that the address in this MEM is valid. Then, unless
4054 indirect addresses are valid, reload the MEM into a register. */
4056 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4057 opnum, type, ind_levels == 0 ? 0 : ind_levels - 1);
4059 /* If tem was changed, then we must create a new memory reference to
4060 hold it and store it back into memrefloc. */
4061 if (tem != ad && memrefloc)
4063 *memrefloc = copy_rtx (*memrefloc);
4064 copy_replacements (tem, XEXP (*memrefloc, 0));
4065 loc = &XEXP (*memrefloc, 0);
4068 /* Check similar cases as for indirect addresses as above except
4069 that we can allow pseudos and a MEM since they should have been
4070 taken care of above. */
4073 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4074 || GET_CODE (XEXP (tem, 0)) == MEM
4075 || ! (GET_CODE (XEXP (tem, 0)) == REG
4076 || (GET_CODE (XEXP (tem, 0)) == PLUS
4077 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4078 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4080 /* Must use TEM here, not AD, since it is the one that will
4081 have any subexpressions reloaded, if needed. */
4082 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4083 BASE_REG_CLASS, GET_MODE (tem), VOIDmode, 0,
4091 /* If we have address of a stack slot but it's not valid
4092 (displacement is too large), compute the sum in a register. */
4093 else if (GET_CODE (ad) == PLUS
4094 && (XEXP (ad, 0) == frame_pointer_rtx
4095 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4096 || XEXP (ad, 0) == hard_frame_pointer_rtx
4098 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4099 || XEXP (ad, 0) == arg_pointer_rtx
4101 || XEXP (ad, 0) == stack_pointer_rtx)
4102 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4104 /* Unshare the MEM rtx so we can safely alter it. */
4107 *memrefloc = copy_rtx (*memrefloc);
4108 loc = &XEXP (*memrefloc, 0);
4110 if (double_reg_address_ok)
4112 /* Unshare the sum as well. */
4113 *loc = ad = copy_rtx (ad);
4114 /* Reload the displacement into an index reg.
4115 We assume the frame pointer or arg pointer is a base reg. */
4116 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4117 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4122 /* If the sum of two regs is not necessarily valid,
4123 reload the sum into a base reg.
4124 That will at least work. */
4125 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode,
4126 opnum, type, ind_levels);
4131 /* If we have an indexed stack slot, there are three possible reasons why
4132 it might be invalid: The index might need to be reloaded, the address
4133 might have been made by frame pointer elimination and hence have a
4134 constant out of range, or both reasons might apply.
4136 We can easily check for an index needing reload, but even if that is the
4137 case, we might also have an invalid constant. To avoid making the
4138 conservative assumption and requiring two reloads, we see if this address
4139 is valid when not interpreted strictly. If it is, the only problem is
4140 that the index needs a reload and find_reloads_address_1 will take care
4143 There is still a case when we might generate an extra reload,
4144 however. In certain cases eliminate_regs will return a MEM for a REG
4145 (see the code there for details). In those cases, memory_address_p
4146 applied to our address will return 0 so we will think that our offset
4147 must be too large. But it might indeed be valid and the only problem
4148 is that a MEM is present where a REG should be. This case should be
4149 very rare and there doesn't seem to be any way to avoid it.
4151 If we decide to do something here, it must be that
4152 `double_reg_address_ok' is true and that this address rtl was made by
4153 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4154 rework the sum so that the reload register will be added to the index.
4155 This is safe because we know the address isn't shared.
4157 We check for fp/ap/sp as both the first and second operand of the
4160 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4161 && GET_CODE (XEXP (ad, 0)) == PLUS
4162 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4163 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4164 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4166 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4167 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4169 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4170 && ! memory_address_p (mode, ad))
4172 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4173 plus_constant (XEXP (XEXP (ad, 0), 0),
4174 INTVAL (XEXP (ad, 1))),
4175 XEXP (XEXP (ad, 0), 1));
4176 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4177 GET_MODE (ad), opnum, type, ind_levels);
4178 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0);
4183 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4184 && GET_CODE (XEXP (ad, 0)) == PLUS
4185 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4186 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4187 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4189 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4190 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4192 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4193 && ! memory_address_p (mode, ad))
4195 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4196 plus_constant (XEXP (XEXP (ad, 0), 1),
4197 INTVAL (XEXP (ad, 1))),
4198 XEXP (XEXP (ad, 0), 0));
4199 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4200 GET_MODE (ad), opnum, type, ind_levels);
4201 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0);
4206 /* See if address becomes valid when an eliminable register
4207 in a sum is replaced. */
4210 if (GET_CODE (ad) == PLUS)
4211 tem = subst_indexed_address (ad);
4212 if (tem != ad && strict_memory_address_p (mode, tem))
4214 /* Ok, we win that way. Replace any additional eliminable
4217 subst_reg_equivs_changed = 0;
4218 tem = subst_reg_equivs (tem);
4220 /* Make sure that didn't make the address invalid again. */
4222 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4229 /* If constants aren't valid addresses, reload the constant address
4231 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4233 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4234 Unshare it so we can safely alter it. */
4235 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4236 && CONSTANT_POOL_ADDRESS_P (ad))
4238 *memrefloc = copy_rtx (*memrefloc);
4239 loc = &XEXP (*memrefloc, 0);
4242 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4247 return find_reloads_address_1 (ad, 0, loc, opnum, type, ind_levels);
4250 /* Find all pseudo regs appearing in AD
4251 that are eliminable in favor of equivalent values
4252 and do not have hard regs; replace them by their equivalents. */
4255 subst_reg_equivs (ad)
4258 register RTX_CODE code = GET_CODE (ad);
4276 register int regno = REGNO (ad);
4278 if (reg_equiv_constant[regno] != 0)
4280 subst_reg_equivs_changed = 1;
4281 return reg_equiv_constant[regno];
4287 /* Quickly dispose of a common case. */
4288 if (XEXP (ad, 0) == frame_pointer_rtx
4289 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4293 fmt = GET_RTX_FORMAT (code);
4294 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4296 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
4300 /* Compute the sum of X and Y, making canonicalizations assumed in an
4301 address, namely: sum constant integers, surround the sum of two
4302 constants with a CONST, put the constant as the second operand, and
4303 group the constant on the outermost sum.
4305 This routine assumes both inputs are already in canonical form. */
4312 enum machine_mode mode = GET_MODE (x);
4314 if (mode == VOIDmode)
4315 mode = GET_MODE (y);
4317 if (mode == VOIDmode)
4320 if (GET_CODE (x) == CONST_INT)
4321 return plus_constant (y, INTVAL (x));
4322 else if (GET_CODE (y) == CONST_INT)
4323 return plus_constant (x, INTVAL (y));
4324 else if (CONSTANT_P (x))
4325 tem = x, x = y, y = tem;
4327 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
4328 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
4330 /* Note that if the operands of Y are specified in the opposite
4331 order in the recursive calls below, infinite recursion will occur. */
4332 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
4333 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
4335 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4336 constant will have been placed second. */
4337 if (CONSTANT_P (x) && CONSTANT_P (y))
4339 if (GET_CODE (x) == CONST)
4341 if (GET_CODE (y) == CONST)
4344 return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, mode, x, y));
4347 return gen_rtx (PLUS, mode, x, y);
4350 /* If ADDR is a sum containing a pseudo register that should be
4351 replaced with a constant (from reg_equiv_constant),
4352 return the result of doing so, and also apply the associative
4353 law so that the result is more likely to be a valid address.
4354 (But it is not guaranteed to be one.)
4356 Note that at most one register is replaced, even if more are
4357 replaceable. Also, we try to put the result into a canonical form
4358 so it is more likely to be a valid address.
4360 In all other cases, return ADDR. */
4363 subst_indexed_address (addr)
4366 rtx op0 = 0, op1 = 0, op2 = 0;
4370 if (GET_CODE (addr) == PLUS)
4372 /* Try to find a register to replace. */
4373 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
4374 if (GET_CODE (op0) == REG
4375 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
4376 && reg_renumber[regno] < 0
4377 && reg_equiv_constant[regno] != 0)
4378 op0 = reg_equiv_constant[regno];
4379 else if (GET_CODE (op1) == REG
4380 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
4381 && reg_renumber[regno] < 0
4382 && reg_equiv_constant[regno] != 0)
4383 op1 = reg_equiv_constant[regno];
4384 else if (GET_CODE (op0) == PLUS
4385 && (tem = subst_indexed_address (op0)) != op0)
4387 else if (GET_CODE (op1) == PLUS
4388 && (tem = subst_indexed_address (op1)) != op1)
4393 /* Pick out up to three things to add. */
4394 if (GET_CODE (op1) == PLUS)
4395 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
4396 else if (GET_CODE (op0) == PLUS)
4397 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4399 /* Compute the sum. */
4401 op1 = form_sum (op1, op2);
4403 op0 = form_sum (op0, op1);
4410 /* Record the pseudo registers we must reload into hard registers
4411 in a subexpression of a would-be memory address, X.
4412 (This function is not called if the address we find is strictly valid.)
4413 CONTEXT = 1 means we are considering regs as index regs,
4414 = 0 means we are considering them as base regs.
4416 OPNUM and TYPE specify the purpose of any reloads made.
4418 IND_LEVELS says how many levels of indirect addressing are
4419 supported at this point in the address.
4421 We return nonzero if X, as a whole, is reloaded or replaced. */
4423 /* Note that we take shortcuts assuming that no multi-reg machine mode
4424 occurs as part of an address.
4425 Also, this is not fully machine-customizable; it works for machines
4426 such as vaxes and 68000's and 32000's, but other possible machines
4427 could have addressing modes that this does not handle right. */
4430 find_reloads_address_1 (x, context, loc, opnum, type, ind_levels)
4435 enum reload_type type;
4438 register RTX_CODE code = GET_CODE (x);
4444 register rtx orig_op0 = XEXP (x, 0);
4445 register rtx orig_op1 = XEXP (x, 1);
4446 register RTX_CODE code0 = GET_CODE (orig_op0);
4447 register RTX_CODE code1 = GET_CODE (orig_op1);
4448 register rtx op0 = orig_op0;
4449 register rtx op1 = orig_op1;
4451 if (GET_CODE (op0) == SUBREG)
4453 op0 = SUBREG_REG (op0);
4454 code0 = GET_CODE (op0);
4457 if (GET_CODE (op1) == SUBREG)
4459 op1 = SUBREG_REG (op1);
4460 code1 = GET_CODE (op1);
4463 if (code0 == MULT || code0 == SIGN_EXTEND || code1 == MEM)
4465 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4467 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4471 else if (code1 == MULT || code1 == SIGN_EXTEND || code0 == MEM)
4473 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4475 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4479 else if (code0 == CONST_INT || code0 == CONST
4480 || code0 == SYMBOL_REF || code0 == LABEL_REF)
4481 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4484 else if (code1 == CONST_INT || code1 == CONST
4485 || code1 == SYMBOL_REF || code1 == LABEL_REF)
4486 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4489 else if (code0 == REG && code1 == REG)
4491 if (REG_OK_FOR_INDEX_P (op0)
4492 && REG_OK_FOR_BASE_P (op1))
4494 else if (REG_OK_FOR_INDEX_P (op1)
4495 && REG_OK_FOR_BASE_P (op0))
4497 else if (REG_OK_FOR_BASE_P (op1))
4498 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4500 else if (REG_OK_FOR_BASE_P (op0))
4501 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4503 else if (REG_OK_FOR_INDEX_P (op1))
4504 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4506 else if (REG_OK_FOR_INDEX_P (op0))
4507 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4511 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4513 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4518 else if (code0 == REG)
4520 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4522 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4526 else if (code1 == REG)
4528 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4530 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4541 if (GET_CODE (XEXP (x, 0)) == REG)
4543 register int regno = REGNO (XEXP (x, 0));
4547 /* A register that is incremented cannot be constant! */
4548 if (regno >= FIRST_PSEUDO_REGISTER
4549 && reg_equiv_constant[regno] != 0)
4552 /* Handle a register that is equivalent to a memory location
4553 which cannot be addressed directly. */
4554 if (reg_equiv_address[regno] != 0)
4556 rtx tem = make_memloc (XEXP (x, 0), regno);
4557 /* First reload the memory location's address. */
4558 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
4559 &XEXP (tem, 0), opnum, type, ind_levels);
4560 /* Put this inside a new increment-expression. */
4561 x = gen_rtx (GET_CODE (x), GET_MODE (x), tem);
4562 /* Proceed to reload that, as if it contained a register. */
4565 /* If we have a hard register that is ok as an index,
4566 don't make a reload. If an autoincrement of a nice register
4567 isn't "valid", it must be that no autoincrement is "valid".
4568 If that is true and something made an autoincrement anyway,
4569 this must be a special context where one is allowed.
4570 (For example, a "push" instruction.)
4571 We can't improve this address, so leave it alone. */
4573 /* Otherwise, reload the autoincrement into a suitable hard reg
4574 and record how much to increment by. */
4576 if (reg_renumber[regno] >= 0)
4577 regno = reg_renumber[regno];
4578 if ((regno >= FIRST_PSEUDO_REGISTER
4579 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4580 : REGNO_OK_FOR_BASE_P (regno))))
4585 = push_reload (x, NULL_RTX, loc, NULL_PTR,
4586 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4587 GET_MODE (x), GET_MODE (x), VOIDmode, 0,
4589 reload_inc[reloadnum]
4590 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
4595 /* Update the REG_INC notes. */
4597 for (link = REG_NOTES (this_insn);
4598 link; link = XEXP (link, 1))
4599 if (REG_NOTE_KIND (link) == REG_INC
4600 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
4601 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4607 else if (GET_CODE (XEXP (x, 0)) == MEM)
4609 /* This is probably the result of a substitution, by eliminate_regs,
4610 of an equivalent address for a pseudo that was not allocated to a
4611 hard register. Verify that the specified address is valid and
4612 reload it into a register. */
4613 rtx tem = XEXP (x, 0);
4617 /* Since we know we are going to reload this item, don't decrement
4618 for the indirection level.
4620 Note that this is actually conservative: it would be slightly
4621 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4623 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
4624 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
4625 opnum, type, ind_levels);
4627 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
4628 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4629 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4630 reload_inc[reloadnum]
4631 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
4633 link = FIND_REG_INC_NOTE (this_insn, tem);
4635 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4642 /* This is probably the result of a substitution, by eliminate_regs, of
4643 an equivalent address for a pseudo that was not allocated to a hard
4644 register. Verify that the specified address is valid and reload it
4647 Since we know we are going to reload this item, don't decrement for
4648 the indirection level.
4650 Note that this is actually conservative: it would be slightly more
4651 efficient to use the value of SPILL_INDIRECT_LEVELS from
4654 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
4655 opnum, type, ind_levels);
4656 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
4657 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4658 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4663 register int regno = REGNO (x);
4665 if (reg_equiv_constant[regno] != 0)
4667 find_reloads_address_part (reg_equiv_constant[regno], loc,
4668 (context ? INDEX_REG_CLASS
4670 GET_MODE (x), opnum, type, ind_levels);
4674 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4675 that feeds this insn. */
4676 if (reg_equiv_mem[regno] != 0)
4678 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
4679 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4680 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4685 if (reg_equiv_address[regno] != 0)
4687 x = make_memloc (x, regno);
4688 find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
4689 opnum, type, ind_levels);
4692 if (reg_renumber[regno] >= 0)
4693 regno = reg_renumber[regno];
4695 if ((regno >= FIRST_PSEUDO_REGISTER
4696 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4697 : REGNO_OK_FOR_BASE_P (regno))))
4699 push_reload (x, NULL_RTX, loc, NULL_PTR,
4700 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4701 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4705 /* If a register appearing in an address is the subject of a CLOBBER
4706 in this insn, reload it into some other register to be safe.
4707 The CLOBBER is supposed to make the register unavailable
4708 from before this insn to after it. */
4709 if (regno_clobbered_p (regno, this_insn))
4711 push_reload (x, NULL_RTX, loc, NULL_PTR,
4712 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4713 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4720 /* If this is a SUBREG of a hard register and the resulting register is
4721 of the wrong class, reload the whole SUBREG. This avoids needless
4722 copies if SUBREG_REG is multi-word. */
4723 if (GET_CODE (SUBREG_REG (x)) == REG
4724 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
4726 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
4728 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
4729 : REGNO_OK_FOR_BASE_P (regno)))
4731 push_reload (x, NULL_RTX, loc, NULL_PTR,
4732 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4733 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4741 register char *fmt = GET_RTX_FORMAT (code);
4744 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4747 find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i),
4748 opnum, type, ind_levels);
4755 /* X, which is found at *LOC, is a part of an address that needs to be
4756 reloaded into a register of class CLASS. If X is a constant, or if
4757 X is a PLUS that contains a constant, check that the constant is a
4758 legitimate operand and that we are supposed to be able to load
4759 it into the register.
4761 If not, force the constant into memory and reload the MEM instead.
4763 MODE is the mode to use, in case X is an integer constant.
4765 OPNUM and TYPE describe the purpose of any reloads made.
4767 IND_LEVELS says how many levels of indirect addressing this machine
4771 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
4774 enum reg_class class;
4775 enum machine_mode mode;
4777 enum reload_type type;
4781 && (! LEGITIMATE_CONSTANT_P (x)
4782 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
4784 rtx tem = x = force_const_mem (mode, x);
4785 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4786 opnum, type, ind_levels);
4789 else if (GET_CODE (x) == PLUS
4790 && CONSTANT_P (XEXP (x, 1))
4791 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
4792 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
4794 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
4796 x = gen_rtx (PLUS, GET_MODE (x), XEXP (x, 0), tem);
4797 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4798 opnum, type, ind_levels);
4801 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
4802 mode, VOIDmode, 0, 0, opnum, type);
4805 /* Substitute into the current INSN the registers into which we have reloaded
4806 the things that need reloading. The array `replacements'
4807 says contains the locations of all pointers that must be changed
4808 and says what to replace them with.
4810 Return the rtx that X translates into; usually X, but modified. */
4817 for (i = 0; i < n_replacements; i++)
4819 register struct replacement *r = &replacements[i];
4820 register rtx reloadreg = reload_reg_rtx[r->what];
4823 /* Encapsulate RELOADREG so its machine mode matches what
4824 used to be there. Note that gen_lowpart_common will
4825 do the wrong thing if RELOADREG is multi-word. RELOADREG
4826 will always be a REG here. */
4827 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
4828 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4830 /* If we are putting this into a SUBREG and RELOADREG is a
4831 SUBREG, we would be making nested SUBREGs, so we have to fix
4832 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4834 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
4836 if (GET_MODE (*r->subreg_loc)
4837 == GET_MODE (SUBREG_REG (reloadreg)))
4838 *r->subreg_loc = SUBREG_REG (reloadreg);
4841 *r->where = SUBREG_REG (reloadreg);
4842 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
4846 *r->where = reloadreg;
4848 /* If reload got no reg and isn't optional, something's wrong. */
4849 else if (! reload_optional[r->what])
4854 /* Make a copy of any replacements being done into X and move those copies
4855 to locations in Y, a copy of X. We only look at the highest level of
4859 copy_replacements (x, y)
4864 enum rtx_code code = GET_CODE (x);
4865 char *fmt = GET_RTX_FORMAT (code);
4866 struct replacement *r;
4868 /* We can't support X being a SUBREG because we might then need to know its
4869 location if something inside it was replaced. */
4873 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4875 for (j = 0; j < n_replacements; j++)
4877 if (replacements[j].subreg_loc == &XEXP (x, i))
4879 r = &replacements[n_replacements++];
4880 r->where = replacements[j].where;
4881 r->subreg_loc = &XEXP (y, i);
4882 r->what = replacements[j].what;
4883 r->mode = replacements[j].mode;
4885 else if (replacements[j].where == &XEXP (x, i))
4887 r = &replacements[n_replacements++];
4888 r->where = &XEXP (y, i);
4890 r->what = replacements[j].what;
4891 r->mode = replacements[j].mode;
4896 /* If LOC was scheduled to be replaced by something, return the replacement.
4897 Otherwise, return *LOC. */
4900 find_replacement (loc)
4903 struct replacement *r;
4905 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
4907 rtx reloadreg = reload_reg_rtx[r->what];
4909 if (reloadreg && r->where == loc)
4911 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
4912 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4916 else if (reloadreg && r->subreg_loc == loc)
4918 /* RELOADREG must be either a REG or a SUBREG.
4920 ??? Is it actually still ever a SUBREG? If so, why? */
4922 if (GET_CODE (reloadreg) == REG)
4923 return gen_rtx (REG, GET_MODE (*loc),
4924 REGNO (reloadreg) + SUBREG_WORD (*loc));
4925 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
4928 return gen_rtx (SUBREG, GET_MODE (*loc), SUBREG_REG (reloadreg),
4929 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
4936 /* Return nonzero if register in range [REGNO, ENDREGNO)
4937 appears either explicitly or implicitly in X
4938 other than being stored into (except for earlyclobber operands).
4940 References contained within the substructure at LOC do not count.
4941 LOC may be zero, meaning don't ignore anything.
4943 This is similar to refers_to_regno_p in rtlanal.c except that we
4944 look at equivalences for pseudos that didn't get hard registers. */
4947 refers_to_regno_for_reload_p (regno, endregno, x, loc)
4948 int regno, endregno;
4953 register RTX_CODE code;
4960 code = GET_CODE (x);
4967 /* If this is a pseudo, a hard register must not have been allocated.
4968 X must therefore either be a constant or be in memory. */
4969 if (i >= FIRST_PSEUDO_REGISTER)
4971 if (reg_equiv_memory_loc[i])
4972 return refers_to_regno_for_reload_p (regno, endregno,
4973 reg_equiv_memory_loc[i],
4976 if (reg_equiv_constant[i])
4982 return (endregno > i
4983 && regno < i + (i < FIRST_PSEUDO_REGISTER
4984 ? HARD_REGNO_NREGS (i, GET_MODE (x))
4988 /* If this is a SUBREG of a hard reg, we can see exactly which
4989 registers are being modified. Otherwise, handle normally. */
4990 if (GET_CODE (SUBREG_REG (x)) == REG
4991 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
4993 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
4995 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
4996 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
4998 return endregno > inner_regno && regno < inner_endregno;
5004 if (&SET_DEST (x) != loc
5005 /* Note setting a SUBREG counts as referring to the REG it is in for
5006 a pseudo but not for hard registers since we can
5007 treat each word individually. */
5008 && ((GET_CODE (SET_DEST (x)) == SUBREG
5009 && loc != &SUBREG_REG (SET_DEST (x))
5010 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5011 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5012 && refers_to_regno_for_reload_p (regno, endregno,
5013 SUBREG_REG (SET_DEST (x)),
5015 /* If the ouput is an earlyclobber operand, this is
5017 || ((GET_CODE (SET_DEST (x)) != REG
5018 || earlyclobber_operand_p (SET_DEST (x)))
5019 && refers_to_regno_for_reload_p (regno, endregno,
5020 SET_DEST (x), loc))))
5023 if (code == CLOBBER || loc == &SET_SRC (x))
5029 /* X does not match, so try its subexpressions. */
5031 fmt = GET_RTX_FORMAT (code);
5032 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5034 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5042 if (refers_to_regno_for_reload_p (regno, endregno,
5046 else if (fmt[i] == 'E')
5049 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5050 if (loc != &XVECEXP (x, i, j)
5051 && refers_to_regno_for_reload_p (regno, endregno,
5052 XVECEXP (x, i, j), loc))
5059 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5060 we check if any register number in X conflicts with the relevant register
5061 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5062 contains a MEM (we don't bother checking for memory addresses that can't
5063 conflict because we expect this to be a rare case.
5065 This function is similar to reg_overlap_mention_p in rtlanal.c except
5066 that we look at equivalences for pseudos that didn't get hard registers. */
5069 reg_overlap_mentioned_for_reload_p (x, in)
5072 int regno, endregno;
5074 if (GET_CODE (x) == SUBREG)
5076 regno = REGNO (SUBREG_REG (x));
5077 if (regno < FIRST_PSEUDO_REGISTER)
5078 regno += SUBREG_WORD (x);
5080 else if (GET_CODE (x) == REG)
5084 /* If this is a pseudo, it must not have been assigned a hard register.
5085 Therefore, it must either be in memory or be a constant. */
5087 if (regno >= FIRST_PSEUDO_REGISTER)
5089 if (reg_equiv_memory_loc[regno])
5090 return refers_to_mem_for_reload_p (in);
5091 else if (reg_equiv_constant[regno])
5096 else if (CONSTANT_P (x))
5098 else if (GET_CODE (x) == MEM)
5099 return refers_to_mem_for_reload_p (in);
5100 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
5101 || GET_CODE (x) == CC0)
5102 return reg_mentioned_p (x, in);
5106 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
5107 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5109 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
5112 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5116 refers_to_mem_for_reload_p (x)
5122 if (GET_CODE (x) == MEM)
5125 if (GET_CODE (x) == REG)
5126 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
5127 && reg_equiv_memory_loc[REGNO (x)]);
5129 fmt = GET_RTX_FORMAT (GET_CODE (x));
5130 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
5132 && (GET_CODE (XEXP (x, i)) == MEM
5133 || refers_to_mem_for_reload_p (XEXP (x, i))))
5139 /* Check the insns before INSN to see if there is a suitable register
5140 containing the same value as GOAL.
5141 If OTHER is -1, look for a register in class CLASS.
5142 Otherwise, just see if register number OTHER shares GOAL's value.
5144 Return an rtx for the register found, or zero if none is found.
5146 If RELOAD_REG_P is (short *)1,
5147 we reject any hard reg that appears in reload_reg_rtx
5148 because such a hard reg is also needed coming into this insn.
5150 If RELOAD_REG_P is any other nonzero value,
5151 it is a vector indexed by hard reg number
5152 and we reject any hard reg whose element in the vector is nonnegative
5153 as well as any that appears in reload_reg_rtx.
5155 If GOAL is zero, then GOALREG is a register number; we look
5156 for an equivalent for that register.
5158 MODE is the machine mode of the value we want an equivalence for.
5159 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5161 This function is used by jump.c as well as in the reload pass.
5163 If GOAL is the sum of the stack pointer and a constant, we treat it
5164 as if it were a constant except that sp is required to be unchanging. */
5167 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
5170 enum reg_class class;
5172 short *reload_reg_p;
5174 enum machine_mode mode;
5176 register rtx p = insn;
5177 rtx goaltry, valtry, value, where;
5179 register int regno = -1;
5183 int goal_mem_addr_varies = 0;
5184 int need_stable_sp = 0;
5190 else if (GET_CODE (goal) == REG)
5191 regno = REGNO (goal);
5192 else if (GET_CODE (goal) == MEM)
5194 enum rtx_code code = GET_CODE (XEXP (goal, 0));
5195 if (MEM_VOLATILE_P (goal))
5197 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
5199 /* An address with side effects must be reexecuted. */
5210 else if (CONSTANT_P (goal))
5212 else if (GET_CODE (goal) == PLUS
5213 && XEXP (goal, 0) == stack_pointer_rtx
5214 && CONSTANT_P (XEXP (goal, 1)))
5215 goal_const = need_stable_sp = 1;
5219 /* On some machines, certain regs must always be rejected
5220 because they don't behave the way ordinary registers do. */
5222 #ifdef OVERLAPPING_REGNO_P
5223 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5224 && OVERLAPPING_REGNO_P (regno))
5228 /* Scan insns back from INSN, looking for one that copies
5229 a value into or out of GOAL.
5230 Stop and give up if we reach a label. */
5235 if (p == 0 || GET_CODE (p) == CODE_LABEL)
5237 if (GET_CODE (p) == INSN
5238 /* If we don't want spill regs ... */
5239 && (! (reload_reg_p != 0
5240 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
5241 /* ... then ignore insns introduced by reload; they aren't useful
5242 and can cause results in reload_as_needed to be different
5243 from what they were when calculating the need for spills.
5244 If we notice an input-reload insn here, we will reject it below,
5245 but it might hide a usable equivalent. That makes bad code.
5246 It may even abort: perhaps no reg was spilled for this insn
5247 because it was assumed we would find that equivalent. */
5248 || INSN_UID (p) < reload_first_uid))
5251 pat = single_set (p);
5252 /* First check for something that sets some reg equal to GOAL. */
5255 && true_regnum (SET_SRC (pat)) == regno
5256 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5259 && true_regnum (SET_DEST (pat)) == regno
5260 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
5262 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
5263 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5265 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
5266 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
5268 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
5269 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
5270 /* If we are looking for a constant,
5271 and something equivalent to that constant was copied
5272 into a reg, we can use that reg. */
5273 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5275 && rtx_equal_p (XEXP (tem, 0), goal)
5276 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5277 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5279 && GET_CODE (SET_DEST (pat)) == REG
5280 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5281 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5282 && GET_CODE (goal) == CONST_INT
5283 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
5285 && rtx_equal_p (goal, goaltry)
5286 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
5288 && (valueno = true_regnum (valtry)) >= 0)
5289 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5291 && GET_CODE (SET_DEST (pat)) == REG
5292 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5293 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5294 && GET_CODE (goal) == CONST_INT
5295 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
5297 && rtx_equal_p (goal, goaltry)
5299 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
5300 && (valueno = true_regnum (valtry)) >= 0)))
5303 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
5304 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
5314 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5315 (or copying VALUE into GOAL, if GOAL is also a register).
5316 Now verify that VALUE is really valid. */
5318 /* VALUENO is the register number of VALUE; a hard register. */
5320 /* Don't try to re-use something that is killed in this insn. We want
5321 to be able to trust REG_UNUSED notes. */
5322 if (find_reg_note (where, REG_UNUSED, value))
5325 /* If we propose to get the value from the stack pointer or if GOAL is
5326 a MEM based on the stack pointer, we need a stable SP. */
5327 if (valueno == STACK_POINTER_REGNUM
5328 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
5332 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5333 if (GET_MODE (value) != mode)
5336 /* Reject VALUE if it was loaded from GOAL
5337 and is also a register that appears in the address of GOAL. */
5339 if (goal_mem && value == SET_DEST (PATTERN (where))
5340 && refers_to_regno_for_reload_p (valueno,
5342 + HARD_REGNO_NREGS (valueno, mode)),
5346 /* Reject registers that overlap GOAL. */
5348 if (!goal_mem && !goal_const
5349 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
5350 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
5353 /* Reject VALUE if it is one of the regs reserved for reloads.
5354 Reload1 knows how to reuse them anyway, and it would get
5355 confused if we allocated one without its knowledge.
5356 (Now that insns introduced by reload are ignored above,
5357 this case shouldn't happen, but I'm not positive.) */
5359 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
5360 && reload_reg_p[valueno] >= 0)
5363 /* On some machines, certain regs must always be rejected
5364 because they don't behave the way ordinary registers do. */
5366 #ifdef OVERLAPPING_REGNO_P
5367 if (OVERLAPPING_REGNO_P (valueno))
5371 nregs = HARD_REGNO_NREGS (regno, mode);
5372 valuenregs = HARD_REGNO_NREGS (valueno, mode);
5374 /* Reject VALUE if it is a register being used for an input reload
5375 even if it is not one of those reserved. */
5377 if (reload_reg_p != 0)
5380 for (i = 0; i < n_reloads; i++)
5381 if (reload_reg_rtx[i] != 0 && reload_in[i])
5383 int regno1 = REGNO (reload_reg_rtx[i]);
5384 int nregs1 = HARD_REGNO_NREGS (regno1,
5385 GET_MODE (reload_reg_rtx[i]));
5386 if (regno1 < valueno + valuenregs
5387 && regno1 + nregs1 > valueno)
5393 /* We must treat frame pointer as varying here,
5394 since it can vary--in a nonlocal goto as generated by expand_goto. */
5395 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
5397 /* Now verify that the values of GOAL and VALUE remain unaltered
5398 until INSN is reached. */
5407 /* Don't trust the conversion past a function call
5408 if either of the two is in a call-clobbered register, or memory. */
5409 if (GET_CODE (p) == CALL_INSN
5410 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5411 && call_used_regs[regno])
5413 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5414 && call_used_regs[valueno])
5420 #ifdef INSN_CLOBBERS_REGNO_P
5421 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5422 && INSN_CLOBBERS_REGNO_P (p, valueno))
5423 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5424 && INSN_CLOBBERS_REGNO_P (p, regno)))
5428 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
5430 /* If this insn P stores in either GOAL or VALUE, return 0.
5431 If GOAL is a memory ref and this insn writes memory, return 0.
5432 If GOAL is a memory ref and its address is not constant,
5433 and this insn P changes a register used in GOAL, return 0. */
5436 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
5438 register rtx dest = SET_DEST (pat);
5439 while (GET_CODE (dest) == SUBREG
5440 || GET_CODE (dest) == ZERO_EXTRACT
5441 || GET_CODE (dest) == SIGN_EXTRACT
5442 || GET_CODE (dest) == STRICT_LOW_PART)
5443 dest = XEXP (dest, 0);
5444 if (GET_CODE (dest) == REG)
5446 register int xregno = REGNO (dest);
5448 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5449 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5452 if (xregno < regno + nregs && xregno + xnregs > regno)
5454 if (xregno < valueno + valuenregs
5455 && xregno + xnregs > valueno)
5457 if (goal_mem_addr_varies
5458 && reg_overlap_mentioned_for_reload_p (dest, goal))
5461 else if (goal_mem && GET_CODE (dest) == MEM
5462 && ! push_operand (dest, GET_MODE (dest)))
5464 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
5467 else if (GET_CODE (pat) == PARALLEL)
5470 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
5472 register rtx v1 = XVECEXP (pat, 0, i);
5473 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
5475 register rtx dest = SET_DEST (v1);
5476 while (GET_CODE (dest) == SUBREG
5477 || GET_CODE (dest) == ZERO_EXTRACT
5478 || GET_CODE (dest) == SIGN_EXTRACT
5479 || GET_CODE (dest) == STRICT_LOW_PART)
5480 dest = XEXP (dest, 0);
5481 if (GET_CODE (dest) == REG)
5483 register int xregno = REGNO (dest);
5485 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5486 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5489 if (xregno < regno + nregs
5490 && xregno + xnregs > regno)
5492 if (xregno < valueno + valuenregs
5493 && xregno + xnregs > valueno)
5495 if (goal_mem_addr_varies
5496 && reg_overlap_mentioned_for_reload_p (dest,
5500 else if (goal_mem && GET_CODE (dest) == MEM
5501 && ! push_operand (dest, GET_MODE (dest)))
5503 else if (need_stable_sp
5504 && push_operand (dest, GET_MODE (dest)))
5511 /* If this insn auto-increments or auto-decrements
5512 either regno or valueno, return 0 now.
5513 If GOAL is a memory ref and its address is not constant,
5514 and this insn P increments a register used in GOAL, return 0. */
5518 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
5519 if (REG_NOTE_KIND (link) == REG_INC
5520 && GET_CODE (XEXP (link, 0)) == REG)
5522 register int incno = REGNO (XEXP (link, 0));
5523 if (incno < regno + nregs && incno >= regno)
5525 if (incno < valueno + valuenregs && incno >= valueno)
5527 if (goal_mem_addr_varies
5528 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
5538 /* Find a place where INCED appears in an increment or decrement operator
5539 within X, and return the amount INCED is incremented or decremented by.
5540 The value is always positive. */
5543 find_inc_amount (x, inced)
5546 register enum rtx_code code = GET_CODE (x);
5552 register rtx addr = XEXP (x, 0);
5553 if ((GET_CODE (addr) == PRE_DEC
5554 || GET_CODE (addr) == POST_DEC
5555 || GET_CODE (addr) == PRE_INC
5556 || GET_CODE (addr) == POST_INC)
5557 && XEXP (addr, 0) == inced)
5558 return GET_MODE_SIZE (GET_MODE (x));
5561 fmt = GET_RTX_FORMAT (code);
5562 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5566 register int tem = find_inc_amount (XEXP (x, i), inced);
5573 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5575 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
5585 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5588 regno_clobbered_p (regno, insn)
5592 if (GET_CODE (PATTERN (insn)) == CLOBBER
5593 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
5594 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
5596 if (GET_CODE (PATTERN (insn)) == PARALLEL)
5598 int i = XVECLEN (PATTERN (insn), 0) - 1;
5602 rtx elt = XVECEXP (PATTERN (insn), 0, i);
5603 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
5604 && REGNO (XEXP (elt, 0)) == regno)
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