1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
30 init_reload actually has to be called earlier anyway.
32 To scan an insn, call `find_reloads'. This does two things:
33 1. sets up tables describing which values must be reloaded
34 for this insn, and what kind of hard regs they must be reloaded into;
35 2. optionally record the locations where those values appear in
36 the data, so they can be replaced properly later.
37 This is done only if the second arg to `find_reloads' is nonzero.
39 The third arg to `find_reloads' specifies the number of levels
40 of indirect addressing supported by the machine. If it is zero,
41 indirect addressing is not valid. If it is one, (MEM (REG n))
42 is valid even if (REG n) did not get a hard register; if it is two,
43 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44 hard register, and similarly for higher values.
46 Then you must choose the hard regs to reload those pseudo regs into,
47 and generate appropriate load insns before this insn and perhaps
48 also store insns after this insn. Set up the array `reload_reg_rtx'
49 to contain the REG rtx's for the registers you used. In some
50 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51 for certain reloads. Then that tells you which register to use,
52 so you do not need to allocate one. But you still do need to add extra
53 instructions to copy the value into and out of that register.
55 Finally you must call `subst_reloads' to substitute the reload reg rtx's
56 into the locations already recorded.
60 find_reloads can alter the operands of the instruction it is called on.
62 1. Two operands of any sort may be interchanged, if they are in a
63 commutative instruction.
64 This happens only if find_reloads thinks the instruction will compile
67 2. Pseudo-registers that are equivalent to constants are replaced
68 with those constants if they are not in hard registers.
70 1 happens every time find_reloads is called.
71 2 happens only when REPLACE is 1, which is only when
72 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
90 /* We do not enable this with ENABLE_CHECKING, since it is awfully slow. */
95 #include "coretypes.h"
99 #include "insn-config.h"
105 #include "addresses.h"
106 #include "hard-reg-set.h"
110 #include "function.h"
117 /* True if X is a constant that can be forced into the constant pool. */
118 #define CONST_POOL_OK_P(X) \
120 && GET_CODE (X) != HIGH \
121 && !targetm.cannot_force_const_mem (X))
123 /* True if C is a non-empty register class that has too few registers
124 to be safely used as a reload target class. */
125 #define SMALL_REGISTER_CLASS_P(C) \
126 (reg_class_size [(C)] == 1 \
127 || (reg_class_size [(C)] >= 1 && CLASS_LIKELY_SPILLED_P (C)))
130 /* All reloads of the current insn are recorded here. See reload.h for
133 struct reload rld[MAX_RELOADS];
135 /* All the "earlyclobber" operands of the current insn
136 are recorded here. */
138 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
140 int reload_n_operands;
142 /* Replacing reloads.
144 If `replace_reloads' is nonzero, then as each reload is recorded
145 an entry is made for it in the table `replacements'.
146 Then later `subst_reloads' can look through that table and
147 perform all the replacements needed. */
149 /* Nonzero means record the places to replace. */
150 static int replace_reloads;
152 /* Each replacement is recorded with a structure like this. */
155 rtx *where; /* Location to store in */
156 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
157 a SUBREG; 0 otherwise. */
158 int what; /* which reload this is for */
159 enum machine_mode mode; /* mode it must have */
162 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
164 /* Number of replacements currently recorded. */
165 static int n_replacements;
167 /* Used to track what is modified by an operand. */
170 int reg_flag; /* Nonzero if referencing a register. */
171 int safe; /* Nonzero if this can't conflict with anything. */
172 rtx base; /* Base address for MEM. */
173 HOST_WIDE_INT start; /* Starting offset or register number. */
174 HOST_WIDE_INT end; /* Ending offset or register number. */
177 #ifdef SECONDARY_MEMORY_NEEDED
179 /* Save MEMs needed to copy from one class of registers to another. One MEM
180 is used per mode, but normally only one or two modes are ever used.
182 We keep two versions, before and after register elimination. The one
183 after register elimination is record separately for each operand. This
184 is done in case the address is not valid to be sure that we separately
187 static rtx secondary_memlocs[NUM_MACHINE_MODES];
188 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
189 static int secondary_memlocs_elim_used = 0;
192 /* The instruction we are doing reloads for;
193 so we can test whether a register dies in it. */
194 static rtx this_insn;
196 /* Nonzero if this instruction is a user-specified asm with operands. */
197 static int this_insn_is_asm;
199 /* If hard_regs_live_known is nonzero,
200 we can tell which hard regs are currently live,
201 at least enough to succeed in choosing dummy reloads. */
202 static int hard_regs_live_known;
204 /* Indexed by hard reg number,
205 element is nonnegative if hard reg has been spilled.
206 This vector is passed to `find_reloads' as an argument
207 and is not changed here. */
208 static short *static_reload_reg_p;
210 /* Set to 1 in subst_reg_equivs if it changes anything. */
211 static int subst_reg_equivs_changed;
213 /* On return from push_reload, holds the reload-number for the OUT
214 operand, which can be different for that from the input operand. */
215 static int output_reloadnum;
217 /* Compare two RTX's. */
218 #define MATCHES(x, y) \
219 (x == y || (x != 0 && (REG_P (x) \
220 ? REG_P (y) && REGNO (x) == REGNO (y) \
221 : rtx_equal_p (x, y) && ! side_effects_p (x))))
223 /* Indicates if two reloads purposes are for similar enough things that we
224 can merge their reloads. */
225 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
226 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
227 || ((when1) == (when2) && (op1) == (op2)) \
228 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
229 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
230 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
231 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
232 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
234 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
235 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
236 ((when1) != (when2) \
237 || ! ((op1) == (op2) \
238 || (when1) == RELOAD_FOR_INPUT \
239 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
240 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
242 /* If we are going to reload an address, compute the reload type to
244 #define ADDR_TYPE(type) \
245 ((type) == RELOAD_FOR_INPUT_ADDRESS \
246 ? RELOAD_FOR_INPADDR_ADDRESS \
247 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
248 ? RELOAD_FOR_OUTADDR_ADDRESS \
251 static int push_secondary_reload (int, rtx, int, int, enum reg_class,
252 enum machine_mode, enum reload_type,
253 enum insn_code *, secondary_reload_info *);
254 static enum reg_class find_valid_class (enum machine_mode, enum machine_mode,
256 static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
257 static void push_replacement (rtx *, int, enum machine_mode);
258 static void dup_replacements (rtx *, rtx *);
259 static void combine_reloads (void);
260 static int find_reusable_reload (rtx *, rtx, enum reg_class,
261 enum reload_type, int, int);
262 static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
263 enum machine_mode, enum reg_class, int, int);
264 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
265 static struct decomposition decompose (rtx);
266 static int immune_p (rtx, rtx, struct decomposition);
267 static bool alternative_allows_const_pool_ref (rtx, const char *, int);
268 static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
270 static rtx make_memloc (rtx, int);
271 static int maybe_memory_address_addr_space_p (enum machine_mode, rtx,
272 addr_space_t, rtx *);
273 static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
274 int, enum reload_type, int, rtx);
275 static rtx subst_reg_equivs (rtx, rtx);
276 static rtx subst_indexed_address (rtx);
277 static void update_auto_inc_notes (rtx, int, int);
278 static int find_reloads_address_1 (enum machine_mode, rtx, int,
279 enum rtx_code, enum rtx_code, rtx *,
280 int, enum reload_type,int, rtx);
281 static void find_reloads_address_part (rtx, rtx *, enum reg_class,
282 enum machine_mode, int,
283 enum reload_type, int);
284 static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
286 static void copy_replacements_1 (rtx *, rtx *, int);
287 static int find_inc_amount (rtx, rtx);
288 static int refers_to_mem_for_reload_p (rtx);
289 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
292 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
296 push_reg_equiv_alt_mem (int regno, rtx mem)
300 for (it = reg_equiv_alt_mem_list [regno]; it; it = XEXP (it, 1))
301 if (rtx_equal_p (XEXP (it, 0), mem))
304 reg_equiv_alt_mem_list [regno]
305 = alloc_EXPR_LIST (REG_EQUIV, mem,
306 reg_equiv_alt_mem_list [regno]);
309 /* Determine if any secondary reloads are needed for loading (if IN_P is
310 nonzero) or storing (if IN_P is zero) X to or from a reload register of
311 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
312 are needed, push them.
314 Return the reload number of the secondary reload we made, or -1 if
315 we didn't need one. *PICODE is set to the insn_code to use if we do
316 need a secondary reload. */
319 push_secondary_reload (int in_p, rtx x, int opnum, int optional,
320 enum reg_class reload_class,
321 enum machine_mode reload_mode, enum reload_type type,
322 enum insn_code *picode, secondary_reload_info *prev_sri)
324 enum reg_class rclass = NO_REGS;
325 enum reg_class scratch_class;
326 enum machine_mode mode = reload_mode;
327 enum insn_code icode = CODE_FOR_nothing;
328 enum insn_code t_icode = CODE_FOR_nothing;
329 enum reload_type secondary_type;
330 int s_reload, t_reload = -1;
331 const char *scratch_constraint;
333 secondary_reload_info sri;
335 if (type == RELOAD_FOR_INPUT_ADDRESS
336 || type == RELOAD_FOR_OUTPUT_ADDRESS
337 || type == RELOAD_FOR_INPADDR_ADDRESS
338 || type == RELOAD_FOR_OUTADDR_ADDRESS)
339 secondary_type = type;
341 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
343 *picode = CODE_FOR_nothing;
345 /* If X is a paradoxical SUBREG, use the inner value to determine both the
346 mode and object being reloaded. */
347 if (GET_CODE (x) == SUBREG
348 && (GET_MODE_SIZE (GET_MODE (x))
349 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
352 reload_mode = GET_MODE (x);
355 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
356 is still a pseudo-register by now, it *must* have an equivalent MEM
357 but we don't want to assume that), use that equivalent when seeing if
358 a secondary reload is needed since whether or not a reload is needed
359 might be sensitive to the form of the MEM. */
361 if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
362 && reg_equiv_mem[REGNO (x)] != 0)
363 x = reg_equiv_mem[REGNO (x)];
365 sri.icode = CODE_FOR_nothing;
366 sri.prev_sri = prev_sri;
367 rclass = targetm.secondary_reload (in_p, x, reload_class, reload_mode, &sri);
368 icode = (enum insn_code) sri.icode;
370 /* If we don't need any secondary registers, done. */
371 if (rclass == NO_REGS && icode == CODE_FOR_nothing)
374 if (rclass != NO_REGS)
375 t_reload = push_secondary_reload (in_p, x, opnum, optional, rclass,
376 reload_mode, type, &t_icode, &sri);
378 /* If we will be using an insn, the secondary reload is for a
381 if (icode != CODE_FOR_nothing)
383 /* If IN_P is nonzero, the reload register will be the output in
384 operand 0. If IN_P is zero, the reload register will be the input
385 in operand 1. Outputs should have an initial "=", which we must
388 /* ??? It would be useful to be able to handle only two, or more than
389 three, operands, but for now we can only handle the case of having
390 exactly three: output, input and one temp/scratch. */
391 gcc_assert (insn_data[(int) icode].n_operands == 3);
393 /* ??? We currently have no way to represent a reload that needs
394 an icode to reload from an intermediate tertiary reload register.
395 We should probably have a new field in struct reload to tag a
396 chain of scratch operand reloads onto. */
397 gcc_assert (rclass == NO_REGS);
399 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
400 gcc_assert (*scratch_constraint == '=');
401 scratch_constraint++;
402 if (*scratch_constraint == '&')
403 scratch_constraint++;
404 letter = *scratch_constraint;
405 scratch_class = (letter == 'r' ? GENERAL_REGS
406 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) letter,
407 scratch_constraint));
409 rclass = scratch_class;
410 mode = insn_data[(int) icode].operand[2].mode;
413 /* This case isn't valid, so fail. Reload is allowed to use the same
414 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
415 in the case of a secondary register, we actually need two different
416 registers for correct code. We fail here to prevent the possibility of
417 silently generating incorrect code later.
419 The convention is that secondary input reloads are valid only if the
420 secondary_class is different from class. If you have such a case, you
421 can not use secondary reloads, you must work around the problem some
424 Allow this when a reload_in/out pattern is being used. I.e. assume
425 that the generated code handles this case. */
427 gcc_assert (!in_p || rclass != reload_class || icode != CODE_FOR_nothing
428 || t_icode != CODE_FOR_nothing);
430 /* See if we can reuse an existing secondary reload. */
431 for (s_reload = 0; s_reload < n_reloads; s_reload++)
432 if (rld[s_reload].secondary_p
433 && (reg_class_subset_p (rclass, rld[s_reload].rclass)
434 || reg_class_subset_p (rld[s_reload].rclass, rclass))
435 && ((in_p && rld[s_reload].inmode == mode)
436 || (! in_p && rld[s_reload].outmode == mode))
437 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
438 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
439 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
440 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
441 && (SMALL_REGISTER_CLASS_P (rclass)
442 || targetm.small_register_classes_for_mode_p (VOIDmode))
443 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
444 opnum, rld[s_reload].opnum))
447 rld[s_reload].inmode = mode;
449 rld[s_reload].outmode = mode;
451 if (reg_class_subset_p (rclass, rld[s_reload].rclass))
452 rld[s_reload].rclass = rclass;
454 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
455 rld[s_reload].optional &= optional;
456 rld[s_reload].secondary_p = 1;
457 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
458 opnum, rld[s_reload].opnum))
459 rld[s_reload].when_needed = RELOAD_OTHER;
464 if (s_reload == n_reloads)
466 #ifdef SECONDARY_MEMORY_NEEDED
467 /* If we need a memory location to copy between the two reload regs,
468 set it up now. Note that we do the input case before making
469 the reload and the output case after. This is due to the
470 way reloads are output. */
472 if (in_p && icode == CODE_FOR_nothing
473 && SECONDARY_MEMORY_NEEDED (rclass, reload_class, mode))
475 get_secondary_mem (x, reload_mode, opnum, type);
477 /* We may have just added new reloads. Make sure we add
478 the new reload at the end. */
479 s_reload = n_reloads;
483 /* We need to make a new secondary reload for this register class. */
484 rld[s_reload].in = rld[s_reload].out = 0;
485 rld[s_reload].rclass = rclass;
487 rld[s_reload].inmode = in_p ? mode : VOIDmode;
488 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
489 rld[s_reload].reg_rtx = 0;
490 rld[s_reload].optional = optional;
491 rld[s_reload].inc = 0;
492 /* Maybe we could combine these, but it seems too tricky. */
493 rld[s_reload].nocombine = 1;
494 rld[s_reload].in_reg = 0;
495 rld[s_reload].out_reg = 0;
496 rld[s_reload].opnum = opnum;
497 rld[s_reload].when_needed = secondary_type;
498 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
499 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
500 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
501 rld[s_reload].secondary_out_icode
502 = ! in_p ? t_icode : CODE_FOR_nothing;
503 rld[s_reload].secondary_p = 1;
507 #ifdef SECONDARY_MEMORY_NEEDED
508 if (! in_p && icode == CODE_FOR_nothing
509 && SECONDARY_MEMORY_NEEDED (reload_class, rclass, mode))
510 get_secondary_mem (x, mode, opnum, type);
518 /* If a secondary reload is needed, return its class. If both an intermediate
519 register and a scratch register is needed, we return the class of the
520 intermediate register. */
522 secondary_reload_class (bool in_p, enum reg_class rclass,
523 enum machine_mode mode, rtx x)
525 enum insn_code icode;
526 secondary_reload_info sri;
528 sri.icode = CODE_FOR_nothing;
530 rclass = targetm.secondary_reload (in_p, x, rclass, mode, &sri);
531 icode = (enum insn_code) sri.icode;
533 /* If there are no secondary reloads at all, we return NO_REGS.
534 If an intermediate register is needed, we return its class. */
535 if (icode == CODE_FOR_nothing || rclass != NO_REGS)
538 /* No intermediate register is needed, but we have a special reload
539 pattern, which we assume for now needs a scratch register. */
540 return scratch_reload_class (icode);
543 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
544 three operands, verify that operand 2 is an output operand, and return
546 ??? We'd like to be able to handle any pattern with at least 2 operands,
547 for zero or more scratch registers, but that needs more infrastructure. */
549 scratch_reload_class (enum insn_code icode)
551 const char *scratch_constraint;
553 enum reg_class rclass;
555 gcc_assert (insn_data[(int) icode].n_operands == 3);
556 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
557 gcc_assert (*scratch_constraint == '=');
558 scratch_constraint++;
559 if (*scratch_constraint == '&')
560 scratch_constraint++;
561 scratch_letter = *scratch_constraint;
562 if (scratch_letter == 'r')
564 rclass = REG_CLASS_FROM_CONSTRAINT ((unsigned char) scratch_letter,
566 gcc_assert (rclass != NO_REGS);
570 #ifdef SECONDARY_MEMORY_NEEDED
572 /* Return a memory location that will be used to copy X in mode MODE.
573 If we haven't already made a location for this mode in this insn,
574 call find_reloads_address on the location being returned. */
577 get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
578 int opnum, enum reload_type type)
583 /* By default, if MODE is narrower than a word, widen it to a word.
584 This is required because most machines that require these memory
585 locations do not support short load and stores from all registers
586 (e.g., FP registers). */
588 #ifdef SECONDARY_MEMORY_NEEDED_MODE
589 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
591 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
592 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
595 /* If we already have made a MEM for this operand in MODE, return it. */
596 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
597 return secondary_memlocs_elim[(int) mode][opnum];
599 /* If this is the first time we've tried to get a MEM for this mode,
600 allocate a new one. `something_changed' in reload will get set
601 by noticing that the frame size has changed. */
603 if (secondary_memlocs[(int) mode] == 0)
605 #ifdef SECONDARY_MEMORY_NEEDED_RTX
606 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
608 secondary_memlocs[(int) mode]
609 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
613 /* Get a version of the address doing any eliminations needed. If that
614 didn't give us a new MEM, make a new one if it isn't valid. */
616 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
617 mem_valid = strict_memory_address_addr_space_p (mode, XEXP (loc, 0),
618 MEM_ADDR_SPACE (loc));
620 if (! mem_valid && loc == secondary_memlocs[(int) mode])
621 loc = copy_rtx (loc);
623 /* The only time the call below will do anything is if the stack
624 offset is too large. In that case IND_LEVELS doesn't matter, so we
625 can just pass a zero. Adjust the type to be the address of the
626 corresponding object. If the address was valid, save the eliminated
627 address. If it wasn't valid, we need to make a reload each time, so
632 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
633 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
636 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
640 secondary_memlocs_elim[(int) mode][opnum] = loc;
641 if (secondary_memlocs_elim_used <= (int)mode)
642 secondary_memlocs_elim_used = (int)mode + 1;
646 /* Clear any secondary memory locations we've made. */
649 clear_secondary_mem (void)
651 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
653 #endif /* SECONDARY_MEMORY_NEEDED */
656 /* Find the largest class which has at least one register valid in
657 mode INNER, and which for every such register, that register number
658 plus N is also valid in OUTER (if in range) and is cheap to move
659 into REGNO. Such a class must exist. */
661 static enum reg_class
662 find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED,
663 enum machine_mode inner ATTRIBUTE_UNUSED, int n,
664 unsigned int dest_regno ATTRIBUTE_UNUSED)
669 enum reg_class best_class = NO_REGS;
670 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
671 unsigned int best_size = 0;
674 for (rclass = 1; rclass < N_REG_CLASSES; rclass++)
678 for (regno = 0; regno < FIRST_PSEUDO_REGISTER - n && ! bad; regno++)
679 if (TEST_HARD_REG_BIT (reg_class_contents[rclass], regno))
681 if (HARD_REGNO_MODE_OK (regno, inner))
684 if (! TEST_HARD_REG_BIT (reg_class_contents[rclass], regno + n)
685 || ! HARD_REGNO_MODE_OK (regno + n, outer))
692 cost = REGISTER_MOVE_COST (outer, (enum reg_class) rclass, dest_class);
694 if ((reg_class_size[rclass] > best_size
695 && (best_cost < 0 || best_cost >= cost))
698 best_class = (enum reg_class) rclass;
699 best_size = reg_class_size[rclass];
700 best_cost = REGISTER_MOVE_COST (outer, (enum reg_class) rclass,
705 gcc_assert (best_size != 0);
710 /* Return the number of a previously made reload that can be combined with
711 a new one, or n_reloads if none of the existing reloads can be used.
712 OUT, RCLASS, TYPE and OPNUM are the same arguments as passed to
713 push_reload, they determine the kind of the new reload that we try to
714 combine. P_IN points to the corresponding value of IN, which can be
715 modified by this function.
716 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
719 find_reusable_reload (rtx *p_in, rtx out, enum reg_class rclass,
720 enum reload_type type, int opnum, int dont_share)
724 /* We can't merge two reloads if the output of either one is
727 if (earlyclobber_operand_p (out))
730 /* We can use an existing reload if the class is right
731 and at least one of IN and OUT is a match
732 and the other is at worst neutral.
733 (A zero compared against anything is neutral.)
735 For targets with small register classes, don't use existing reloads
736 unless they are for the same thing since that can cause us to need
737 more reload registers than we otherwise would. */
739 for (i = 0; i < n_reloads; i++)
740 if ((reg_class_subset_p (rclass, rld[i].rclass)
741 || reg_class_subset_p (rld[i].rclass, rclass))
742 /* If the existing reload has a register, it must fit our class. */
743 && (rld[i].reg_rtx == 0
744 || TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
745 true_regnum (rld[i].reg_rtx)))
746 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
747 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
748 || (out != 0 && MATCHES (rld[i].out, out)
749 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
750 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
751 && (SMALL_REGISTER_CLASS_P (rclass)
752 || targetm.small_register_classes_for_mode_p (VOIDmode))
753 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
756 /* Reloading a plain reg for input can match a reload to postincrement
757 that reg, since the postincrement's value is the right value.
758 Likewise, it can match a preincrement reload, since we regard
759 the preincrementation as happening before any ref in this insn
761 for (i = 0; i < n_reloads; i++)
762 if ((reg_class_subset_p (rclass, rld[i].rclass)
763 || reg_class_subset_p (rld[i].rclass, rclass))
764 /* If the existing reload has a register, it must fit our
766 && (rld[i].reg_rtx == 0
767 || TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
768 true_regnum (rld[i].reg_rtx)))
769 && out == 0 && rld[i].out == 0 && rld[i].in != 0
771 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC
772 && MATCHES (XEXP (rld[i].in, 0), in))
773 || (REG_P (rld[i].in)
774 && GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC
775 && MATCHES (XEXP (in, 0), rld[i].in)))
776 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
777 && (SMALL_REGISTER_CLASS_P (rclass)
778 || targetm.small_register_classes_for_mode_p (VOIDmode))
779 && MERGABLE_RELOADS (type, rld[i].when_needed,
780 opnum, rld[i].opnum))
782 /* Make sure reload_in ultimately has the increment,
783 not the plain register. */
791 /* Return nonzero if X is a SUBREG which will require reloading of its
792 SUBREG_REG expression. */
795 reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
799 /* Only SUBREGs are problematical. */
800 if (GET_CODE (x) != SUBREG)
803 inner = SUBREG_REG (x);
805 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
806 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
809 /* If INNER is not a hard register, then INNER will not need to
812 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
815 /* If INNER is not ok for MODE, then INNER will need reloading. */
816 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
819 /* If the outer part is a word or smaller, INNER larger than a
820 word and the number of regs for INNER is not the same as the
821 number of words in INNER, then INNER will need reloading. */
822 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
824 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
825 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
826 != (int) hard_regno_nregs[REGNO (inner)][GET_MODE (inner)]));
829 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
830 requiring an extra reload register. The caller has already found that
831 IN contains some reference to REGNO, so check that we can produce the
832 new value in a single step. E.g. if we have
833 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
834 instruction that adds one to a register, this should succeed.
835 However, if we have something like
836 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
837 needs to be loaded into a register first, we need a separate reload
839 Such PLUS reloads are generated by find_reload_address_part.
840 The out-of-range PLUS expressions are usually introduced in the instruction
841 patterns by register elimination and substituting pseudos without a home
842 by their function-invariant equivalences. */
844 can_reload_into (rtx in, int regno, enum machine_mode mode)
848 struct recog_data save_recog_data;
850 /* For matching constraints, we often get notional input reloads where
851 we want to use the original register as the reload register. I.e.
852 technically this is a non-optional input-output reload, but IN is
853 already a valid register, and has been chosen as the reload register.
854 Speed this up, since it trivially works. */
858 /* To test MEMs properly, we'd have to take into account all the reloads
859 that are already scheduled, which can become quite complicated.
860 And since we've already handled address reloads for this MEM, it
861 should always succeed anyway. */
865 /* If we can make a simple SET insn that does the job, everything should
867 dst = gen_rtx_REG (mode, regno);
868 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
869 save_recog_data = recog_data;
870 if (recog_memoized (test_insn) >= 0)
872 extract_insn (test_insn);
873 r = constrain_operands (1);
875 recog_data = save_recog_data;
879 /* Record one reload that needs to be performed.
880 IN is an rtx saying where the data are to be found before this instruction.
881 OUT says where they must be stored after the instruction.
882 (IN is zero for data not read, and OUT is zero for data not written.)
883 INLOC and OUTLOC point to the places in the instructions where
884 IN and OUT were found.
885 If IN and OUT are both nonzero, it means the same register must be used
886 to reload both IN and OUT.
888 RCLASS is a register class required for the reloaded data.
889 INMODE is the machine mode that the instruction requires
890 for the reg that replaces IN and OUTMODE is likewise for OUT.
892 If IN is zero, then OUT's location and mode should be passed as
895 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
897 OPTIONAL nonzero means this reload does not need to be performed:
898 it can be discarded if that is more convenient.
900 OPNUM and TYPE say what the purpose of this reload is.
902 The return value is the reload-number for this reload.
904 If both IN and OUT are nonzero, in some rare cases we might
905 want to make two separate reloads. (Actually we never do this now.)
906 Therefore, the reload-number for OUT is stored in
907 output_reloadnum when we return; the return value applies to IN.
908 Usually (presently always), when IN and OUT are nonzero,
909 the two reload-numbers are equal, but the caller should be careful to
913 push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
914 enum reg_class rclass, enum machine_mode inmode,
915 enum machine_mode outmode, int strict_low, int optional,
916 int opnum, enum reload_type type)
920 int dont_remove_subreg = 0;
921 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
922 int secondary_in_reload = -1, secondary_out_reload = -1;
923 enum insn_code secondary_in_icode = CODE_FOR_nothing;
924 enum insn_code secondary_out_icode = CODE_FOR_nothing;
926 /* INMODE and/or OUTMODE could be VOIDmode if no mode
927 has been specified for the operand. In that case,
928 use the operand's mode as the mode to reload. */
929 if (inmode == VOIDmode && in != 0)
930 inmode = GET_MODE (in);
931 if (outmode == VOIDmode && out != 0)
932 outmode = GET_MODE (out);
934 /* If find_reloads and friends until now missed to replace a pseudo
935 with a constant of reg_equiv_constant something went wrong
937 Note that it can't simply be done here if we missed it earlier
938 since the constant might need to be pushed into the literal pool
939 and the resulting memref would probably need further
941 if (in != 0 && REG_P (in))
943 int regno = REGNO (in);
945 gcc_assert (regno < FIRST_PSEUDO_REGISTER
946 || reg_renumber[regno] >= 0
947 || reg_equiv_constant[regno] == NULL_RTX);
950 /* reg_equiv_constant only contains constants which are obviously
951 not appropriate as destination. So if we would need to replace
952 the destination pseudo with a constant we are in real
954 if (out != 0 && REG_P (out))
956 int regno = REGNO (out);
958 gcc_assert (regno < FIRST_PSEUDO_REGISTER
959 || reg_renumber[regno] >= 0
960 || reg_equiv_constant[regno] == NULL_RTX);
963 /* If we have a read-write operand with an address side-effect,
964 change either IN or OUT so the side-effect happens only once. */
965 if (in != 0 && out != 0 && MEM_P (in) && rtx_equal_p (in, out))
966 switch (GET_CODE (XEXP (in, 0)))
968 case POST_INC: case POST_DEC: case POST_MODIFY:
969 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
972 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
973 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
980 /* If we are reloading a (SUBREG constant ...), really reload just the
981 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
982 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
983 a pseudo and hence will become a MEM) with M1 wider than M2 and the
984 register is a pseudo, also reload the inside expression.
985 For machines that extend byte loads, do this for any SUBREG of a pseudo
986 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
987 M2 is an integral mode that gets extended when loaded.
988 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
989 either M1 is not valid for R or M2 is wider than a word but we only
990 need one word to store an M2-sized quantity in R.
991 (However, if OUT is nonzero, we need to reload the reg *and*
992 the subreg, so do nothing here, and let following statement handle it.)
994 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
995 we can't handle it here because CONST_INT does not indicate a mode.
997 Similarly, we must reload the inside expression if we have a
998 STRICT_LOW_PART (presumably, in == out in this case).
1000 Also reload the inner expression if it does not require a secondary
1001 reload but the SUBREG does.
1003 Finally, reload the inner expression if it is a register that is in
1004 the class whose registers cannot be referenced in a different size
1005 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
1006 cannot reload just the inside since we might end up with the wrong
1007 register class. But if it is inside a STRICT_LOW_PART, we have
1008 no choice, so we hope we do get the right register class there. */
1010 if (in != 0 && GET_CODE (in) == SUBREG
1011 && (subreg_lowpart_p (in) || strict_low)
1012 #ifdef CANNOT_CHANGE_MODE_CLASS
1013 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, rclass)
1015 && (CONSTANT_P (SUBREG_REG (in))
1016 || GET_CODE (SUBREG_REG (in)) == PLUS
1018 || (((REG_P (SUBREG_REG (in))
1019 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1020 || MEM_P (SUBREG_REG (in)))
1021 && ((GET_MODE_SIZE (inmode)
1022 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1023 #ifdef LOAD_EXTEND_OP
1024 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1025 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1027 && (GET_MODE_SIZE (inmode)
1028 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1029 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
1030 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != UNKNOWN)
1032 #ifdef WORD_REGISTER_OPERATIONS
1033 || ((GET_MODE_SIZE (inmode)
1034 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1035 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1036 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1040 || (REG_P (SUBREG_REG (in))
1041 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1042 /* The case where out is nonzero
1043 is handled differently in the following statement. */
1044 && (out == 0 || subreg_lowpart_p (in))
1045 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1046 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1048 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1050 != (int) hard_regno_nregs[REGNO (SUBREG_REG (in))]
1051 [GET_MODE (SUBREG_REG (in))]))
1052 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1053 || (secondary_reload_class (1, rclass, inmode, in) != NO_REGS
1054 && (secondary_reload_class (1, rclass, GET_MODE (SUBREG_REG (in)),
1057 #ifdef CANNOT_CHANGE_MODE_CLASS
1058 || (REG_P (SUBREG_REG (in))
1059 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1060 && REG_CANNOT_CHANGE_MODE_P
1061 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1065 in_subreg_loc = inloc;
1066 inloc = &SUBREG_REG (in);
1068 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1070 /* This is supposed to happen only for paradoxical subregs made by
1071 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1072 gcc_assert (GET_MODE_SIZE (GET_MODE (in)) <= GET_MODE_SIZE (inmode));
1074 inmode = GET_MODE (in);
1077 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1078 either M1 is not valid for R or M2 is wider than a word but we only
1079 need one word to store an M2-sized quantity in R.
1081 However, we must reload the inner reg *as well as* the subreg in
1084 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1085 code above. This can happen if SUBREG_BYTE != 0. */
1087 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1089 enum reg_class in_class = rclass;
1091 if (REG_P (SUBREG_REG (in)))
1093 = find_valid_class (inmode, GET_MODE (SUBREG_REG (in)),
1094 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1095 GET_MODE (SUBREG_REG (in)),
1098 REGNO (SUBREG_REG (in)));
1100 /* This relies on the fact that emit_reload_insns outputs the
1101 instructions for input reloads of type RELOAD_OTHER in the same
1102 order as the reloads. Thus if the outer reload is also of type
1103 RELOAD_OTHER, we are guaranteed that this inner reload will be
1104 output before the outer reload. */
1105 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1106 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1107 dont_remove_subreg = 1;
1110 /* Similarly for paradoxical and problematical SUBREGs on the output.
1111 Note that there is no reason we need worry about the previous value
1112 of SUBREG_REG (out); even if wider than out,
1113 storing in a subreg is entitled to clobber it all
1114 (except in the case of STRICT_LOW_PART,
1115 and in that case the constraint should label it input-output.) */
1116 if (out != 0 && GET_CODE (out) == SUBREG
1117 && (subreg_lowpart_p (out) || strict_low)
1118 #ifdef CANNOT_CHANGE_MODE_CLASS
1119 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, rclass)
1121 && (CONSTANT_P (SUBREG_REG (out))
1123 || (((REG_P (SUBREG_REG (out))
1124 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1125 || MEM_P (SUBREG_REG (out)))
1126 && ((GET_MODE_SIZE (outmode)
1127 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1128 #ifdef WORD_REGISTER_OPERATIONS
1129 || ((GET_MODE_SIZE (outmode)
1130 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1131 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1132 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1136 || (REG_P (SUBREG_REG (out))
1137 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1138 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1139 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1141 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1143 != (int) hard_regno_nregs[REGNO (SUBREG_REG (out))]
1144 [GET_MODE (SUBREG_REG (out))]))
1145 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1146 || (secondary_reload_class (0, rclass, outmode, out) != NO_REGS
1147 && (secondary_reload_class (0, rclass, GET_MODE (SUBREG_REG (out)),
1150 #ifdef CANNOT_CHANGE_MODE_CLASS
1151 || (REG_P (SUBREG_REG (out))
1152 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1153 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1154 GET_MODE (SUBREG_REG (out)),
1159 out_subreg_loc = outloc;
1160 outloc = &SUBREG_REG (out);
1162 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1163 gcc_assert (!MEM_P (out)
1164 || GET_MODE_SIZE (GET_MODE (out))
1165 <= GET_MODE_SIZE (outmode));
1167 outmode = GET_MODE (out);
1170 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1171 either M1 is not valid for R or M2 is wider than a word but we only
1172 need one word to store an M2-sized quantity in R.
1174 However, we must reload the inner reg *as well as* the subreg in
1175 that case. In this case, the inner reg is an in-out reload. */
1177 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1179 /* This relies on the fact that emit_reload_insns outputs the
1180 instructions for output reloads of type RELOAD_OTHER in reverse
1181 order of the reloads. Thus if the outer reload is also of type
1182 RELOAD_OTHER, we are guaranteed that this inner reload will be
1183 output after the outer reload. */
1184 dont_remove_subreg = 1;
1185 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1187 find_valid_class (outmode, GET_MODE (SUBREG_REG (out)),
1188 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1189 GET_MODE (SUBREG_REG (out)),
1192 REGNO (SUBREG_REG (out))),
1193 VOIDmode, VOIDmode, 0, 0,
1194 opnum, RELOAD_OTHER);
1197 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1198 if (in != 0 && out != 0 && MEM_P (out)
1199 && (REG_P (in) || MEM_P (in) || GET_CODE (in) == PLUS)
1200 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1203 /* If IN is a SUBREG of a hard register, make a new REG. This
1204 simplifies some of the cases below. */
1206 if (in != 0 && GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))
1207 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1208 && ! dont_remove_subreg)
1209 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1211 /* Similarly for OUT. */
1212 if (out != 0 && GET_CODE (out) == SUBREG
1213 && REG_P (SUBREG_REG (out))
1214 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1215 && ! dont_remove_subreg)
1216 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1218 /* Narrow down the class of register wanted if that is
1219 desirable on this machine for efficiency. */
1221 enum reg_class preferred_class = rclass;
1224 preferred_class = PREFERRED_RELOAD_CLASS (in, rclass);
1226 /* Output reloads may need analogous treatment, different in detail. */
1227 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1229 preferred_class = PREFERRED_OUTPUT_RELOAD_CLASS (out, preferred_class);
1232 /* Discard what the target said if we cannot do it. */
1233 if (preferred_class != NO_REGS
1234 || (optional && type == RELOAD_FOR_OUTPUT))
1235 rclass = preferred_class;
1238 /* Make sure we use a class that can handle the actual pseudo
1239 inside any subreg. For example, on the 386, QImode regs
1240 can appear within SImode subregs. Although GENERAL_REGS
1241 can handle SImode, QImode needs a smaller class. */
1242 #ifdef LIMIT_RELOAD_CLASS
1244 rclass = LIMIT_RELOAD_CLASS (inmode, rclass);
1245 else if (in != 0 && GET_CODE (in) == SUBREG)
1246 rclass = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), rclass);
1249 rclass = LIMIT_RELOAD_CLASS (outmode, rclass);
1250 if (out != 0 && GET_CODE (out) == SUBREG)
1251 rclass = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), rclass);
1254 /* Verify that this class is at least possible for the mode that
1256 if (this_insn_is_asm)
1258 enum machine_mode mode;
1259 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1263 if (mode == VOIDmode)
1265 error_for_asm (this_insn, "cannot reload integer constant "
1266 "operand in %<asm%>");
1271 outmode = word_mode;
1273 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1274 if (HARD_REGNO_MODE_OK (i, mode)
1275 && in_hard_reg_set_p (reg_class_contents[(int) rclass], mode, i))
1277 if (i == FIRST_PSEUDO_REGISTER)
1279 error_for_asm (this_insn, "impossible register constraint "
1281 /* Avoid further trouble with this insn. */
1282 PATTERN (this_insn) = gen_rtx_USE (VOIDmode, const0_rtx);
1283 /* We used to continue here setting class to ALL_REGS, but it triggers
1284 sanity check on i386 for:
1285 void foo(long double d)
1289 Returning zero here ought to be safe as we take care in
1290 find_reloads to not process the reloads when instruction was
1297 /* Optional output reloads are always OK even if we have no register class,
1298 since the function of these reloads is only to have spill_reg_store etc.
1299 set, so that the storing insn can be deleted later. */
1300 gcc_assert (rclass != NO_REGS
1301 || (optional != 0 && type == RELOAD_FOR_OUTPUT));
1303 i = find_reusable_reload (&in, out, rclass, type, opnum, dont_share);
1307 /* See if we need a secondary reload register to move between CLASS
1308 and IN or CLASS and OUT. Get the icode and push any required reloads
1309 needed for each of them if so. */
1313 = push_secondary_reload (1, in, opnum, optional, rclass, inmode, type,
1314 &secondary_in_icode, NULL);
1315 if (out != 0 && GET_CODE (out) != SCRATCH)
1316 secondary_out_reload
1317 = push_secondary_reload (0, out, opnum, optional, rclass, outmode,
1318 type, &secondary_out_icode, NULL);
1320 /* We found no existing reload suitable for re-use.
1321 So add an additional reload. */
1323 #ifdef SECONDARY_MEMORY_NEEDED
1324 /* If a memory location is needed for the copy, make one. */
1327 || (GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))))
1328 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1329 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1331 get_secondary_mem (in, inmode, opnum, type);
1337 rld[i].rclass = rclass;
1338 rld[i].inmode = inmode;
1339 rld[i].outmode = outmode;
1341 rld[i].optional = optional;
1343 rld[i].nocombine = 0;
1344 rld[i].in_reg = inloc ? *inloc : 0;
1345 rld[i].out_reg = outloc ? *outloc : 0;
1346 rld[i].opnum = opnum;
1347 rld[i].when_needed = type;
1348 rld[i].secondary_in_reload = secondary_in_reload;
1349 rld[i].secondary_out_reload = secondary_out_reload;
1350 rld[i].secondary_in_icode = secondary_in_icode;
1351 rld[i].secondary_out_icode = secondary_out_icode;
1352 rld[i].secondary_p = 0;
1356 #ifdef SECONDARY_MEMORY_NEEDED
1359 || (GET_CODE (out) == SUBREG && REG_P (SUBREG_REG (out))))
1360 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1361 && SECONDARY_MEMORY_NEEDED (rclass,
1362 REGNO_REG_CLASS (reg_or_subregno (out)),
1364 get_secondary_mem (out, outmode, opnum, type);
1369 /* We are reusing an existing reload,
1370 but we may have additional information for it.
1371 For example, we may now have both IN and OUT
1372 while the old one may have just one of them. */
1374 /* The modes can be different. If they are, we want to reload in
1375 the larger mode, so that the value is valid for both modes. */
1376 if (inmode != VOIDmode
1377 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1378 rld[i].inmode = inmode;
1379 if (outmode != VOIDmode
1380 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1381 rld[i].outmode = outmode;
1384 rtx in_reg = inloc ? *inloc : 0;
1385 /* If we merge reloads for two distinct rtl expressions that
1386 are identical in content, there might be duplicate address
1387 reloads. Remove the extra set now, so that if we later find
1388 that we can inherit this reload, we can get rid of the
1389 address reloads altogether.
1391 Do not do this if both reloads are optional since the result
1392 would be an optional reload which could potentially leave
1393 unresolved address replacements.
1395 It is not sufficient to call transfer_replacements since
1396 choose_reload_regs will remove the replacements for address
1397 reloads of inherited reloads which results in the same
1399 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1400 && ! (rld[i].optional && optional))
1402 /* We must keep the address reload with the lower operand
1404 if (opnum > rld[i].opnum)
1406 remove_address_replacements (in);
1408 in_reg = rld[i].in_reg;
1411 remove_address_replacements (rld[i].in);
1413 /* When emitting reloads we don't necessarily look at the in-
1414 and outmode, but also directly at the operands (in and out).
1415 So we can't simply overwrite them with whatever we have found
1416 for this (to-be-merged) reload, we have to "merge" that too.
1417 Reusing another reload already verified that we deal with the
1418 same operands, just possibly in different modes. So we
1419 overwrite the operands only when the new mode is larger.
1420 See also PR33613. */
1422 || GET_MODE_SIZE (GET_MODE (in))
1423 > GET_MODE_SIZE (GET_MODE (rld[i].in)))
1427 && GET_MODE_SIZE (GET_MODE (in_reg))
1428 > GET_MODE_SIZE (GET_MODE (rld[i].in_reg))))
1429 rld[i].in_reg = in_reg;
1435 && GET_MODE_SIZE (GET_MODE (out))
1436 > GET_MODE_SIZE (GET_MODE (rld[i].out))))
1440 || GET_MODE_SIZE (GET_MODE (*outloc))
1441 > GET_MODE_SIZE (GET_MODE (rld[i].out_reg))))
1442 rld[i].out_reg = *outloc;
1444 if (reg_class_subset_p (rclass, rld[i].rclass))
1445 rld[i].rclass = rclass;
1446 rld[i].optional &= optional;
1447 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1448 opnum, rld[i].opnum))
1449 rld[i].when_needed = RELOAD_OTHER;
1450 rld[i].opnum = MIN (rld[i].opnum, opnum);
1453 /* If the ostensible rtx being reloaded differs from the rtx found
1454 in the location to substitute, this reload is not safe to combine
1455 because we cannot reliably tell whether it appears in the insn. */
1457 if (in != 0 && in != *inloc)
1458 rld[i].nocombine = 1;
1461 /* This was replaced by changes in find_reloads_address_1 and the new
1462 function inc_for_reload, which go with a new meaning of reload_inc. */
1464 /* If this is an IN/OUT reload in an insn that sets the CC,
1465 it must be for an autoincrement. It doesn't work to store
1466 the incremented value after the insn because that would clobber the CC.
1467 So we must do the increment of the value reloaded from,
1468 increment it, store it back, then decrement again. */
1469 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1473 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1474 /* If we did not find a nonzero amount-to-increment-by,
1475 that contradicts the belief that IN is being incremented
1476 in an address in this insn. */
1477 gcc_assert (rld[i].inc != 0);
1481 /* If we will replace IN and OUT with the reload-reg,
1482 record where they are located so that substitution need
1483 not do a tree walk. */
1485 if (replace_reloads)
1489 struct replacement *r = &replacements[n_replacements++];
1491 r->subreg_loc = in_subreg_loc;
1495 if (outloc != 0 && outloc != inloc)
1497 struct replacement *r = &replacements[n_replacements++];
1500 r->subreg_loc = out_subreg_loc;
1505 /* If this reload is just being introduced and it has both
1506 an incoming quantity and an outgoing quantity that are
1507 supposed to be made to match, see if either one of the two
1508 can serve as the place to reload into.
1510 If one of them is acceptable, set rld[i].reg_rtx
1513 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1515 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1518 earlyclobber_operand_p (out));
1520 /* If the outgoing register already contains the same value
1521 as the incoming one, we can dispense with loading it.
1522 The easiest way to tell the caller that is to give a phony
1523 value for the incoming operand (same as outgoing one). */
1524 if (rld[i].reg_rtx == out
1525 && (REG_P (in) || CONSTANT_P (in))
1526 && 0 != find_equiv_reg (in, this_insn, NO_REGS, REGNO (out),
1527 static_reload_reg_p, i, inmode))
1531 /* If this is an input reload and the operand contains a register that
1532 dies in this insn and is used nowhere else, see if it is the right class
1533 to be used for this reload. Use it if so. (This occurs most commonly
1534 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1535 this if it is also an output reload that mentions the register unless
1536 the output is a SUBREG that clobbers an entire register.
1538 Note that the operand might be one of the spill regs, if it is a
1539 pseudo reg and we are in a block where spilling has not taken place.
1540 But if there is no spilling in this block, that is OK.
1541 An explicitly used hard reg cannot be a spill reg. */
1543 if (rld[i].reg_rtx == 0 && in != 0 && hard_regs_live_known)
1547 enum machine_mode rel_mode = inmode;
1549 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1552 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1553 if (REG_NOTE_KIND (note) == REG_DEAD
1554 && REG_P (XEXP (note, 0))
1555 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1556 && reg_mentioned_p (XEXP (note, 0), in)
1557 /* Check that a former pseudo is valid; see find_dummy_reload. */
1558 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1559 || (! bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR),
1560 ORIGINAL_REGNO (XEXP (note, 0)))
1561 && hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))] == 1))
1562 && ! refers_to_regno_for_reload_p (regno,
1563 end_hard_regno (rel_mode,
1565 PATTERN (this_insn), inloc)
1566 /* If this is also an output reload, IN cannot be used as
1567 the reload register if it is set in this insn unless IN
1569 && (out == 0 || in == out
1570 || ! hard_reg_set_here_p (regno,
1571 end_hard_regno (rel_mode, regno),
1572 PATTERN (this_insn)))
1573 /* ??? Why is this code so different from the previous?
1574 Is there any simple coherent way to describe the two together?
1575 What's going on here. */
1577 || (GET_CODE (in) == SUBREG
1578 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1580 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1581 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1582 /* Make sure the operand fits in the reg that dies. */
1583 && (GET_MODE_SIZE (rel_mode)
1584 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1585 && HARD_REGNO_MODE_OK (regno, inmode)
1586 && HARD_REGNO_MODE_OK (regno, outmode))
1589 unsigned int nregs = MAX (hard_regno_nregs[regno][inmode],
1590 hard_regno_nregs[regno][outmode]);
1592 for (offs = 0; offs < nregs; offs++)
1593 if (fixed_regs[regno + offs]
1594 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
1599 && (! (refers_to_regno_for_reload_p
1600 (regno, end_hard_regno (inmode, regno), in, (rtx *) 0))
1601 || can_reload_into (in, regno, inmode)))
1603 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1610 output_reloadnum = i;
1615 /* Record an additional place we must replace a value
1616 for which we have already recorded a reload.
1617 RELOADNUM is the value returned by push_reload
1618 when the reload was recorded.
1619 This is used in insn patterns that use match_dup. */
1622 push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1624 if (replace_reloads)
1626 struct replacement *r = &replacements[n_replacements++];
1627 r->what = reloadnum;
1634 /* Duplicate any replacement we have recorded to apply at
1635 location ORIG_LOC to also be performed at DUP_LOC.
1636 This is used in insn patterns that use match_dup. */
1639 dup_replacements (rtx *dup_loc, rtx *orig_loc)
1641 int i, n = n_replacements;
1643 for (i = 0; i < n; i++)
1645 struct replacement *r = &replacements[i];
1646 if (r->where == orig_loc)
1647 push_replacement (dup_loc, r->what, r->mode);
1651 /* Transfer all replacements that used to be in reload FROM to be in
1655 transfer_replacements (int to, int from)
1659 for (i = 0; i < n_replacements; i++)
1660 if (replacements[i].what == from)
1661 replacements[i].what = to;
1664 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1665 or a subpart of it. If we have any replacements registered for IN_RTX,
1666 cancel the reloads that were supposed to load them.
1667 Return nonzero if we canceled any reloads. */
1669 remove_address_replacements (rtx in_rtx)
1672 char reload_flags[MAX_RELOADS];
1673 int something_changed = 0;
1675 memset (reload_flags, 0, sizeof reload_flags);
1676 for (i = 0, j = 0; i < n_replacements; i++)
1678 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1679 reload_flags[replacements[i].what] |= 1;
1682 replacements[j++] = replacements[i];
1683 reload_flags[replacements[i].what] |= 2;
1686 /* Note that the following store must be done before the recursive calls. */
1689 for (i = n_reloads - 1; i >= 0; i--)
1691 if (reload_flags[i] == 1)
1693 deallocate_reload_reg (i);
1694 remove_address_replacements (rld[i].in);
1696 something_changed = 1;
1699 return something_changed;
1702 /* If there is only one output reload, and it is not for an earlyclobber
1703 operand, try to combine it with a (logically unrelated) input reload
1704 to reduce the number of reload registers needed.
1706 This is safe if the input reload does not appear in
1707 the value being output-reloaded, because this implies
1708 it is not needed any more once the original insn completes.
1710 If that doesn't work, see we can use any of the registers that
1711 die in this insn as a reload register. We can if it is of the right
1712 class and does not appear in the value being output-reloaded. */
1715 combine_reloads (void)
1718 int output_reload = -1;
1719 int secondary_out = -1;
1722 /* Find the output reload; return unless there is exactly one
1723 and that one is mandatory. */
1725 for (i = 0; i < n_reloads; i++)
1726 if (rld[i].out != 0)
1728 if (output_reload >= 0)
1733 if (output_reload < 0 || rld[output_reload].optional)
1736 /* An input-output reload isn't combinable. */
1738 if (rld[output_reload].in != 0)
1741 /* If this reload is for an earlyclobber operand, we can't do anything. */
1742 if (earlyclobber_operand_p (rld[output_reload].out))
1745 /* If there is a reload for part of the address of this operand, we would
1746 need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1747 its life to the point where doing this combine would not lower the
1748 number of spill registers needed. */
1749 for (i = 0; i < n_reloads; i++)
1750 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1751 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1752 && rld[i].opnum == rld[output_reload].opnum)
1755 /* Check each input reload; can we combine it? */
1757 for (i = 0; i < n_reloads; i++)
1758 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1759 /* Life span of this reload must not extend past main insn. */
1760 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1761 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1762 && rld[i].when_needed != RELOAD_OTHER
1763 && (CLASS_MAX_NREGS (rld[i].rclass, rld[i].inmode)
1764 == CLASS_MAX_NREGS (rld[output_reload].rclass,
1765 rld[output_reload].outmode))
1767 && rld[i].reg_rtx == 0
1768 #ifdef SECONDARY_MEMORY_NEEDED
1769 /* Don't combine two reloads with different secondary
1770 memory locations. */
1771 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1772 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1773 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1774 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1776 && (targetm.small_register_classes_for_mode_p (VOIDmode)
1777 ? (rld[i].rclass == rld[output_reload].rclass)
1778 : (reg_class_subset_p (rld[i].rclass,
1779 rld[output_reload].rclass)
1780 || reg_class_subset_p (rld[output_reload].rclass,
1782 && (MATCHES (rld[i].in, rld[output_reload].out)
1783 /* Args reversed because the first arg seems to be
1784 the one that we imagine being modified
1785 while the second is the one that might be affected. */
1786 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1788 /* However, if the input is a register that appears inside
1789 the output, then we also can't share.
1790 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1791 If the same reload reg is used for both reg 69 and the
1792 result to be stored in memory, then that result
1793 will clobber the address of the memory ref. */
1794 && ! (REG_P (rld[i].in)
1795 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1796 rld[output_reload].out))))
1797 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1798 rld[i].when_needed != RELOAD_FOR_INPUT)
1799 && (reg_class_size[(int) rld[i].rclass]
1800 || targetm.small_register_classes_for_mode_p (VOIDmode))
1801 /* We will allow making things slightly worse by combining an
1802 input and an output, but no worse than that. */
1803 && (rld[i].when_needed == RELOAD_FOR_INPUT
1804 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1808 /* We have found a reload to combine with! */
1809 rld[i].out = rld[output_reload].out;
1810 rld[i].out_reg = rld[output_reload].out_reg;
1811 rld[i].outmode = rld[output_reload].outmode;
1812 /* Mark the old output reload as inoperative. */
1813 rld[output_reload].out = 0;
1814 /* The combined reload is needed for the entire insn. */
1815 rld[i].when_needed = RELOAD_OTHER;
1816 /* If the output reload had a secondary reload, copy it. */
1817 if (rld[output_reload].secondary_out_reload != -1)
1819 rld[i].secondary_out_reload
1820 = rld[output_reload].secondary_out_reload;
1821 rld[i].secondary_out_icode
1822 = rld[output_reload].secondary_out_icode;
1825 #ifdef SECONDARY_MEMORY_NEEDED
1826 /* Copy any secondary MEM. */
1827 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1828 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1829 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1831 /* If required, minimize the register class. */
1832 if (reg_class_subset_p (rld[output_reload].rclass,
1834 rld[i].rclass = rld[output_reload].rclass;
1836 /* Transfer all replacements from the old reload to the combined. */
1837 for (j = 0; j < n_replacements; j++)
1838 if (replacements[j].what == output_reload)
1839 replacements[j].what = i;
1844 /* If this insn has only one operand that is modified or written (assumed
1845 to be the first), it must be the one corresponding to this reload. It
1846 is safe to use anything that dies in this insn for that output provided
1847 that it does not occur in the output (we already know it isn't an
1848 earlyclobber. If this is an asm insn, give up. */
1850 if (INSN_CODE (this_insn) == -1)
1853 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1854 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1855 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1858 /* See if some hard register that dies in this insn and is not used in
1859 the output is the right class. Only works if the register we pick
1860 up can fully hold our output reload. */
1861 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1862 if (REG_NOTE_KIND (note) == REG_DEAD
1863 && REG_P (XEXP (note, 0))
1864 && !reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1865 rld[output_reload].out)
1866 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1867 && HARD_REGNO_MODE_OK (regno, rld[output_reload].outmode)
1868 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].rclass],
1870 && (hard_regno_nregs[regno][rld[output_reload].outmode]
1871 <= hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))])
1872 /* Ensure that a secondary or tertiary reload for this output
1873 won't want this register. */
1874 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1875 || (!(TEST_HARD_REG_BIT
1876 (reg_class_contents[(int) rld[secondary_out].rclass], regno))
1877 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1878 || !(TEST_HARD_REG_BIT
1879 (reg_class_contents[(int) rld[secondary_out].rclass],
1881 && !fixed_regs[regno]
1882 /* Check that a former pseudo is valid; see find_dummy_reload. */
1883 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1884 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR),
1885 ORIGINAL_REGNO (XEXP (note, 0)))
1886 && hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))] == 1)))
1888 rld[output_reload].reg_rtx
1889 = gen_rtx_REG (rld[output_reload].outmode, regno);
1894 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1895 See if one of IN and OUT is a register that may be used;
1896 this is desirable since a spill-register won't be needed.
1897 If so, return the register rtx that proves acceptable.
1899 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1900 RCLASS is the register class required for the reload.
1902 If FOR_REAL is >= 0, it is the number of the reload,
1903 and in some cases when it can be discovered that OUT doesn't need
1904 to be computed, clear out rld[FOR_REAL].out.
1906 If FOR_REAL is -1, this should not be done, because this call
1907 is just to see if a register can be found, not to find and install it.
1909 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1910 puts an additional constraint on being able to use IN for OUT since
1911 IN must not appear elsewhere in the insn (it is assumed that IN itself
1912 is safe from the earlyclobber). */
1915 find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1916 enum machine_mode inmode, enum machine_mode outmode,
1917 enum reg_class rclass, int for_real, int earlyclobber)
1925 /* If operands exceed a word, we can't use either of them
1926 unless they have the same size. */
1927 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1928 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1929 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1932 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1933 respectively refers to a hard register. */
1935 /* Find the inside of any subregs. */
1936 while (GET_CODE (out) == SUBREG)
1938 if (REG_P (SUBREG_REG (out))
1939 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1940 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1941 GET_MODE (SUBREG_REG (out)),
1944 out = SUBREG_REG (out);
1946 while (GET_CODE (in) == SUBREG)
1948 if (REG_P (SUBREG_REG (in))
1949 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1950 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1951 GET_MODE (SUBREG_REG (in)),
1954 in = SUBREG_REG (in);
1957 /* Narrow down the reg class, the same way push_reload will;
1958 otherwise we might find a dummy now, but push_reload won't. */
1960 enum reg_class preferred_class = PREFERRED_RELOAD_CLASS (in, rclass);
1961 if (preferred_class != NO_REGS)
1962 rclass = preferred_class;
1965 /* See if OUT will do. */
1967 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1969 unsigned int regno = REGNO (out) + out_offset;
1970 unsigned int nwords = hard_regno_nregs[regno][outmode];
1973 /* When we consider whether the insn uses OUT,
1974 ignore references within IN. They don't prevent us
1975 from copying IN into OUT, because those refs would
1976 move into the insn that reloads IN.
1978 However, we only ignore IN in its role as this reload.
1979 If the insn uses IN elsewhere and it contains OUT,
1980 that counts. We can't be sure it's the "same" operand
1981 so it might not go through this reload. */
1983 *inloc = const0_rtx;
1985 if (regno < FIRST_PSEUDO_REGISTER
1986 && HARD_REGNO_MODE_OK (regno, outmode)
1987 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1988 PATTERN (this_insn), outloc))
1992 for (i = 0; i < nwords; i++)
1993 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
1999 if (REG_P (real_out))
2002 value = gen_rtx_REG (outmode, regno);
2009 /* Consider using IN if OUT was not acceptable
2010 or if OUT dies in this insn (like the quotient in a divmod insn).
2011 We can't use IN unless it is dies in this insn,
2012 which means we must know accurately which hard regs are live.
2013 Also, the result can't go in IN if IN is used within OUT,
2014 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
2015 if (hard_regs_live_known
2017 && REGNO (in) < FIRST_PSEUDO_REGISTER
2019 || find_reg_note (this_insn, REG_UNUSED, real_out))
2020 && find_reg_note (this_insn, REG_DEAD, real_in)
2021 && !fixed_regs[REGNO (in)]
2022 && HARD_REGNO_MODE_OK (REGNO (in),
2023 /* The only case where out and real_out might
2024 have different modes is where real_out
2025 is a subreg, and in that case, out
2027 (GET_MODE (out) != VOIDmode
2028 ? GET_MODE (out) : outmode))
2029 && (ORIGINAL_REGNO (in) < FIRST_PSEUDO_REGISTER
2030 /* However only do this if we can be sure that this input
2031 operand doesn't correspond with an uninitialized pseudo.
2032 global can assign some hardreg to it that is the same as
2033 the one assigned to a different, also live pseudo (as it
2034 can ignore the conflict). We must never introduce writes
2035 to such hardregs, as they would clobber the other live
2036 pseudo. See PR 20973. */
2037 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR),
2038 ORIGINAL_REGNO (in))
2039 /* Similarly, only do this if we can be sure that the death
2040 note is still valid. global can assign some hardreg to
2041 the pseudo referenced in the note and simultaneously a
2042 subword of this hardreg to a different, also live pseudo,
2043 because only another subword of the hardreg is actually
2044 used in the insn. This cannot happen if the pseudo has
2045 been assigned exactly one hardreg. See PR 33732. */
2046 && hard_regno_nregs[REGNO (in)][GET_MODE (in)] == 1)))
2048 unsigned int regno = REGNO (in) + in_offset;
2049 unsigned int nwords = hard_regno_nregs[regno][inmode];
2051 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
2052 && ! hard_reg_set_here_p (regno, regno + nwords,
2053 PATTERN (this_insn))
2055 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
2056 PATTERN (this_insn), inloc)))
2060 for (i = 0; i < nwords; i++)
2061 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
2067 /* If we were going to use OUT as the reload reg
2068 and changed our mind, it means OUT is a dummy that
2069 dies here. So don't bother copying value to it. */
2070 if (for_real >= 0 && value == real_out)
2071 rld[for_real].out = 0;
2072 if (REG_P (real_in))
2075 value = gen_rtx_REG (inmode, regno);
2083 /* This page contains subroutines used mainly for determining
2084 whether the IN or an OUT of a reload can serve as the
2087 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2090 earlyclobber_operand_p (rtx x)
2094 for (i = 0; i < n_earlyclobbers; i++)
2095 if (reload_earlyclobbers[i] == x)
2101 /* Return 1 if expression X alters a hard reg in the range
2102 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2103 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2104 X should be the body of an instruction. */
2107 hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2109 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2111 rtx op0 = SET_DEST (x);
2113 while (GET_CODE (op0) == SUBREG)
2114 op0 = SUBREG_REG (op0);
2117 unsigned int r = REGNO (op0);
2119 /* See if this reg overlaps range under consideration. */
2121 && end_hard_regno (GET_MODE (op0), r) > beg_regno)
2125 else if (GET_CODE (x) == PARALLEL)
2127 int i = XVECLEN (x, 0) - 1;
2130 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2137 /* Return 1 if ADDR is a valid memory address for mode MODE
2138 in address space AS, and check that each pseudo reg has the
2139 proper kind of hard reg. */
2142 strict_memory_address_addr_space_p (enum machine_mode mode ATTRIBUTE_UNUSED,
2143 rtx addr, addr_space_t as)
2145 #ifdef GO_IF_LEGITIMATE_ADDRESS
2146 gcc_assert (ADDR_SPACE_GENERIC_P (as));
2147 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2153 return targetm.addr_space.legitimate_address_p (mode, addr, 1, as);
2157 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2158 if they are the same hard reg, and has special hacks for
2159 autoincrement and autodecrement.
2160 This is specifically intended for find_reloads to use
2161 in determining whether two operands match.
2162 X is the operand whose number is the lower of the two.
2164 The value is 2 if Y contains a pre-increment that matches
2165 a non-incrementing address in X. */
2167 /* ??? To be completely correct, we should arrange to pass
2168 for X the output operand and for Y the input operand.
2169 For now, we assume that the output operand has the lower number
2170 because that is natural in (SET output (... input ...)). */
2173 operands_match_p (rtx x, rtx y)
2176 RTX_CODE code = GET_CODE (x);
2182 if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x))))
2183 && (REG_P (y) || (GET_CODE (y) == SUBREG
2184 && REG_P (SUBREG_REG (y)))))
2190 i = REGNO (SUBREG_REG (x));
2191 if (i >= FIRST_PSEUDO_REGISTER)
2193 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2194 GET_MODE (SUBREG_REG (x)),
2201 if (GET_CODE (y) == SUBREG)
2203 j = REGNO (SUBREG_REG (y));
2204 if (j >= FIRST_PSEUDO_REGISTER)
2206 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2207 GET_MODE (SUBREG_REG (y)),
2214 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2215 multiple hard register group of scalar integer registers, so that
2216 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2218 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2219 && SCALAR_INT_MODE_P (GET_MODE (x))
2220 && i < FIRST_PSEUDO_REGISTER)
2221 i += hard_regno_nregs[i][GET_MODE (x)] - 1;
2222 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2223 && SCALAR_INT_MODE_P (GET_MODE (y))
2224 && j < FIRST_PSEUDO_REGISTER)
2225 j += hard_regno_nregs[j][GET_MODE (y)] - 1;
2229 /* If two operands must match, because they are really a single
2230 operand of an assembler insn, then two postincrements are invalid
2231 because the assembler insn would increment only once.
2232 On the other hand, a postincrement matches ordinary indexing
2233 if the postincrement is the output operand. */
2234 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2235 return operands_match_p (XEXP (x, 0), y);
2236 /* Two preincrements are invalid
2237 because the assembler insn would increment only once.
2238 On the other hand, a preincrement matches ordinary indexing
2239 if the preincrement is the input operand.
2240 In this case, return 2, since some callers need to do special
2241 things when this happens. */
2242 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2243 || GET_CODE (y) == PRE_MODIFY)
2244 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2248 /* Now we have disposed of all the cases in which different rtx codes
2250 if (code != GET_CODE (y))
2253 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2254 if (GET_MODE (x) != GET_MODE (y))
2257 /* MEMs refering to different address space are not equivalent. */
2258 if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y))
2269 return XEXP (x, 0) == XEXP (y, 0);
2271 return XSTR (x, 0) == XSTR (y, 0);
2277 /* Compare the elements. If any pair of corresponding elements
2278 fail to match, return 0 for the whole things. */
2281 fmt = GET_RTX_FORMAT (code);
2282 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2288 if (XWINT (x, i) != XWINT (y, i))
2293 if (XINT (x, i) != XINT (y, i))
2298 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2301 /* If any subexpression returns 2,
2302 we should return 2 if we are successful. */
2311 if (XVECLEN (x, i) != XVECLEN (y, i))
2313 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2315 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2323 /* It is believed that rtx's at this level will never
2324 contain anything but integers and other rtx's,
2325 except for within LABEL_REFs and SYMBOL_REFs. */
2330 return 1 + success_2;
2333 /* Describe the range of registers or memory referenced by X.
2334 If X is a register, set REG_FLAG and put the first register
2335 number into START and the last plus one into END.
2336 If X is a memory reference, put a base address into BASE
2337 and a range of integer offsets into START and END.
2338 If X is pushing on the stack, we can assume it causes no trouble,
2339 so we set the SAFE field. */
2341 static struct decomposition
2344 struct decomposition val;
2347 memset (&val, 0, sizeof (val));
2349 switch (GET_CODE (x))
2353 rtx base = NULL_RTX, offset = 0;
2354 rtx addr = XEXP (x, 0);
2356 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2357 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2359 val.base = XEXP (addr, 0);
2360 val.start = -GET_MODE_SIZE (GET_MODE (x));
2361 val.end = GET_MODE_SIZE (GET_MODE (x));
2362 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2366 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2368 if (GET_CODE (XEXP (addr, 1)) == PLUS
2369 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2370 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2372 val.base = XEXP (addr, 0);
2373 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2374 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2375 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2380 if (GET_CODE (addr) == CONST)
2382 addr = XEXP (addr, 0);
2385 if (GET_CODE (addr) == PLUS)
2387 if (CONSTANT_P (XEXP (addr, 0)))
2389 base = XEXP (addr, 1);
2390 offset = XEXP (addr, 0);
2392 else if (CONSTANT_P (XEXP (addr, 1)))
2394 base = XEXP (addr, 0);
2395 offset = XEXP (addr, 1);
2402 offset = const0_rtx;
2404 if (GET_CODE (offset) == CONST)
2405 offset = XEXP (offset, 0);
2406 if (GET_CODE (offset) == PLUS)
2408 if (CONST_INT_P (XEXP (offset, 0)))
2410 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2411 offset = XEXP (offset, 0);
2413 else if (CONST_INT_P (XEXP (offset, 1)))
2415 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2416 offset = XEXP (offset, 1);
2420 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2421 offset = const0_rtx;
2424 else if (!CONST_INT_P (offset))
2426 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2427 offset = const0_rtx;
2430 if (all_const && GET_CODE (base) == PLUS)
2431 base = gen_rtx_CONST (GET_MODE (base), base);
2433 gcc_assert (CONST_INT_P (offset));
2435 val.start = INTVAL (offset);
2436 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2443 val.start = true_regnum (x);
2444 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2446 /* A pseudo with no hard reg. */
2447 val.start = REGNO (x);
2448 val.end = val.start + 1;
2452 val.end = end_hard_regno (GET_MODE (x), val.start);
2456 if (!REG_P (SUBREG_REG (x)))
2457 /* This could be more precise, but it's good enough. */
2458 return decompose (SUBREG_REG (x));
2460 val.start = true_regnum (x);
2461 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2462 return decompose (SUBREG_REG (x));
2465 val.end = val.start + subreg_nregs (x);
2469 /* This hasn't been assigned yet, so it can't conflict yet. */
2474 gcc_assert (CONSTANT_P (x));
2481 /* Return 1 if altering Y will not modify the value of X.
2482 Y is also described by YDATA, which should be decompose (Y). */
2485 immune_p (rtx x, rtx y, struct decomposition ydata)
2487 struct decomposition xdata;
2490 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2494 gcc_assert (MEM_P (y));
2495 /* If Y is memory and X is not, Y can't affect X. */
2499 xdata = decompose (x);
2501 if (! rtx_equal_p (xdata.base, ydata.base))
2503 /* If bases are distinct symbolic constants, there is no overlap. */
2504 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2506 /* Constants and stack slots never overlap. */
2507 if (CONSTANT_P (xdata.base)
2508 && (ydata.base == frame_pointer_rtx
2509 || ydata.base == hard_frame_pointer_rtx
2510 || ydata.base == stack_pointer_rtx))
2512 if (CONSTANT_P (ydata.base)
2513 && (xdata.base == frame_pointer_rtx
2514 || xdata.base == hard_frame_pointer_rtx
2515 || xdata.base == stack_pointer_rtx))
2517 /* If either base is variable, we don't know anything. */
2521 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2524 /* Similar, but calls decompose. */
2527 safe_from_earlyclobber (rtx op, rtx clobber)
2529 struct decomposition early_data;
2531 early_data = decompose (clobber);
2532 return immune_p (op, clobber, early_data);
2535 /* Main entry point of this file: search the body of INSN
2536 for values that need reloading and record them with push_reload.
2537 REPLACE nonzero means record also where the values occur
2538 so that subst_reloads can be used.
2540 IND_LEVELS says how many levels of indirection are supported by this
2541 machine; a value of zero means that a memory reference is not a valid
2544 LIVE_KNOWN says we have valid information about which hard
2545 regs are live at each point in the program; this is true when
2546 we are called from global_alloc but false when stupid register
2547 allocation has been done.
2549 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2550 which is nonnegative if the reg has been commandeered for reloading into.
2551 It is copied into STATIC_RELOAD_REG_P and referenced from there
2552 by various subroutines.
2554 Return TRUE if some operands need to be changed, because of swapping
2555 commutative operands, reg_equiv_address substitution, or whatever. */
2558 find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2559 short *reload_reg_p)
2561 int insn_code_number;
2564 /* These start out as the constraints for the insn
2565 and they are chewed up as we consider alternatives. */
2566 const char *constraints[MAX_RECOG_OPERANDS];
2567 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2569 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2570 char pref_or_nothing[MAX_RECOG_OPERANDS];
2571 /* Nonzero for a MEM operand whose entire address needs a reload.
2572 May be -1 to indicate the entire address may or may not need a reload. */
2573 int address_reloaded[MAX_RECOG_OPERANDS];
2574 /* Nonzero for an address operand that needs to be completely reloaded.
2575 May be -1 to indicate the entire operand may or may not need a reload. */
2576 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2577 /* Value of enum reload_type to use for operand. */
2578 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2579 /* Value of enum reload_type to use within address of operand. */
2580 enum reload_type address_type[MAX_RECOG_OPERANDS];
2581 /* Save the usage of each operand. */
2582 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2583 int no_input_reloads = 0, no_output_reloads = 0;
2585 enum reg_class this_alternative[MAX_RECOG_OPERANDS];
2586 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2587 char this_alternative_win[MAX_RECOG_OPERANDS];
2588 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2589 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2590 int this_alternative_matches[MAX_RECOG_OPERANDS];
2592 int goal_alternative[MAX_RECOG_OPERANDS];
2593 int this_alternative_number;
2594 int goal_alternative_number = 0;
2595 int operand_reloadnum[MAX_RECOG_OPERANDS];
2596 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2597 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2598 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2599 char goal_alternative_win[MAX_RECOG_OPERANDS];
2600 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2601 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2602 int goal_alternative_swapped;
2604 int best_small_class_operands_num;
2606 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2607 rtx substed_operand[MAX_RECOG_OPERANDS];
2608 rtx body = PATTERN (insn);
2609 rtx set = single_set (insn);
2610 int goal_earlyclobber = 0, this_earlyclobber;
2611 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2617 n_earlyclobbers = 0;
2618 replace_reloads = replace;
2619 hard_regs_live_known = live_known;
2620 static_reload_reg_p = reload_reg_p;
2622 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2623 neither are insns that SET cc0. Insns that use CC0 are not allowed
2624 to have any input reloads. */
2625 if (JUMP_P (insn) || CALL_P (insn))
2626 no_output_reloads = 1;
2629 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2630 no_input_reloads = 1;
2631 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2632 no_output_reloads = 1;
2635 #ifdef SECONDARY_MEMORY_NEEDED
2636 /* The eliminated forms of any secondary memory locations are per-insn, so
2637 clear them out here. */
2639 if (secondary_memlocs_elim_used)
2641 memset (secondary_memlocs_elim, 0,
2642 sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2643 secondary_memlocs_elim_used = 0;
2647 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2648 is cheap to move between them. If it is not, there may not be an insn
2649 to do the copy, so we may need a reload. */
2650 if (GET_CODE (body) == SET
2651 && REG_P (SET_DEST (body))
2652 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2653 && REG_P (SET_SRC (body))
2654 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2655 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2656 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2657 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2660 extract_insn (insn);
2662 noperands = reload_n_operands = recog_data.n_operands;
2663 n_alternatives = recog_data.n_alternatives;
2665 /* Just return "no reloads" if insn has no operands with constraints. */
2666 if (noperands == 0 || n_alternatives == 0)
2669 insn_code_number = INSN_CODE (insn);
2670 this_insn_is_asm = insn_code_number < 0;
2672 memcpy (operand_mode, recog_data.operand_mode,
2673 noperands * sizeof (enum machine_mode));
2674 memcpy (constraints, recog_data.constraints,
2675 noperands * sizeof (const char *));
2679 /* If we will need to know, later, whether some pair of operands
2680 are the same, we must compare them now and save the result.
2681 Reloading the base and index registers will clobber them
2682 and afterward they will fail to match. */
2684 for (i = 0; i < noperands; i++)
2690 substed_operand[i] = recog_data.operand[i];
2693 modified[i] = RELOAD_READ;
2695 /* Scan this operand's constraint to see if it is an output operand,
2696 an in-out operand, is commutative, or should match another. */
2700 p += CONSTRAINT_LEN (c, p);
2704 modified[i] = RELOAD_WRITE;
2707 modified[i] = RELOAD_READ_WRITE;
2711 /* The last operand should not be marked commutative. */
2712 gcc_assert (i != noperands - 1);
2714 /* We currently only support one commutative pair of
2715 operands. Some existing asm code currently uses more
2716 than one pair. Previously, that would usually work,
2717 but sometimes it would crash the compiler. We
2718 continue supporting that case as well as we can by
2719 silently ignoring all but the first pair. In the
2720 future we may handle it correctly. */
2721 if (commutative < 0)
2724 gcc_assert (this_insn_is_asm);
2727 /* Use of ISDIGIT is tempting here, but it may get expensive because
2728 of locale support we don't want. */
2729 case '0': case '1': case '2': case '3': case '4':
2730 case '5': case '6': case '7': case '8': case '9':
2732 c = strtoul (p - 1, &end, 10);
2735 operands_match[c][i]
2736 = operands_match_p (recog_data.operand[c],
2737 recog_data.operand[i]);
2739 /* An operand may not match itself. */
2740 gcc_assert (c != i);
2742 /* If C can be commuted with C+1, and C might need to match I,
2743 then C+1 might also need to match I. */
2744 if (commutative >= 0)
2746 if (c == commutative || c == commutative + 1)
2748 int other = c + (c == commutative ? 1 : -1);
2749 operands_match[other][i]
2750 = operands_match_p (recog_data.operand[other],
2751 recog_data.operand[i]);
2753 if (i == commutative || i == commutative + 1)
2755 int other = i + (i == commutative ? 1 : -1);
2756 operands_match[c][other]
2757 = operands_match_p (recog_data.operand[c],
2758 recog_data.operand[other]);
2760 /* Note that C is supposed to be less than I.
2761 No need to consider altering both C and I because in
2762 that case we would alter one into the other. */
2769 /* Examine each operand that is a memory reference or memory address
2770 and reload parts of the addresses into index registers.
2771 Also here any references to pseudo regs that didn't get hard regs
2772 but are equivalent to constants get replaced in the insn itself
2773 with those constants. Nobody will ever see them again.
2775 Finally, set up the preferred classes of each operand. */
2777 for (i = 0; i < noperands; i++)
2779 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2781 address_reloaded[i] = 0;
2782 address_operand_reloaded[i] = 0;
2783 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2784 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2787 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2788 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2791 if (*constraints[i] == 0)
2792 /* Ignore things like match_operator operands. */
2794 else if (constraints[i][0] == 'p'
2795 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2797 address_operand_reloaded[i]
2798 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2799 recog_data.operand[i],
2800 recog_data.operand_loc[i],
2801 i, operand_type[i], ind_levels, insn);
2803 /* If we now have a simple operand where we used to have a
2804 PLUS or MULT, re-recognize and try again. */
2805 if ((OBJECT_P (*recog_data.operand_loc[i])
2806 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2807 && (GET_CODE (recog_data.operand[i]) == MULT
2808 || GET_CODE (recog_data.operand[i]) == PLUS))
2810 INSN_CODE (insn) = -1;
2811 retval = find_reloads (insn, replace, ind_levels, live_known,
2816 recog_data.operand[i] = *recog_data.operand_loc[i];
2817 substed_operand[i] = recog_data.operand[i];
2819 /* Address operands are reloaded in their existing mode,
2820 no matter what is specified in the machine description. */
2821 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2823 else if (code == MEM)
2826 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2827 recog_data.operand_loc[i],
2828 XEXP (recog_data.operand[i], 0),
2829 &XEXP (recog_data.operand[i], 0),
2830 i, address_type[i], ind_levels, insn);
2831 recog_data.operand[i] = *recog_data.operand_loc[i];
2832 substed_operand[i] = recog_data.operand[i];
2834 else if (code == SUBREG)
2836 rtx reg = SUBREG_REG (recog_data.operand[i]);
2838 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2841 && &SET_DEST (set) == recog_data.operand_loc[i],
2843 &address_reloaded[i]);
2845 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2846 that didn't get a hard register, emit a USE with a REG_EQUAL
2847 note in front so that we might inherit a previous, possibly
2853 && (GET_MODE_SIZE (GET_MODE (reg))
2854 >= GET_MODE_SIZE (GET_MODE (op)))
2855 && reg_equiv_constant[REGNO (reg)] == 0)
2856 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2858 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2860 substed_operand[i] = recog_data.operand[i] = op;
2862 else if (code == PLUS || GET_RTX_CLASS (code) == RTX_UNARY)
2863 /* We can get a PLUS as an "operand" as a result of register
2864 elimination. See eliminate_regs and gen_reload. We handle
2865 a unary operator by reloading the operand. */
2866 substed_operand[i] = recog_data.operand[i]
2867 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2868 ind_levels, 0, insn,
2869 &address_reloaded[i]);
2870 else if (code == REG)
2872 /* This is equivalent to calling find_reloads_toplev.
2873 The code is duplicated for speed.
2874 When we find a pseudo always equivalent to a constant,
2875 we replace it by the constant. We must be sure, however,
2876 that we don't try to replace it in the insn in which it
2878 int regno = REGNO (recog_data.operand[i]);
2879 if (reg_equiv_constant[regno] != 0
2880 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2882 /* Record the existing mode so that the check if constants are
2883 allowed will work when operand_mode isn't specified. */
2885 if (operand_mode[i] == VOIDmode)
2886 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2888 substed_operand[i] = recog_data.operand[i]
2889 = reg_equiv_constant[regno];
2891 if (reg_equiv_memory_loc[regno] != 0
2892 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2893 /* We need not give a valid is_set_dest argument since the case
2894 of a constant equivalence was checked above. */
2895 substed_operand[i] = recog_data.operand[i]
2896 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2897 ind_levels, 0, insn,
2898 &address_reloaded[i]);
2900 /* If the operand is still a register (we didn't replace it with an
2901 equivalent), get the preferred class to reload it into. */
2902 code = GET_CODE (recog_data.operand[i]);
2904 = ((code == REG && REGNO (recog_data.operand[i])
2905 >= FIRST_PSEUDO_REGISTER)
2906 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2910 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2911 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2914 /* If this is simply a copy from operand 1 to operand 0, merge the
2915 preferred classes for the operands. */
2916 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2917 && recog_data.operand[1] == SET_SRC (set))
2919 preferred_class[0] = preferred_class[1]
2920 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2921 pref_or_nothing[0] |= pref_or_nothing[1];
2922 pref_or_nothing[1] |= pref_or_nothing[0];
2925 /* Now see what we need for pseudo-regs that didn't get hard regs
2926 or got the wrong kind of hard reg. For this, we must consider
2927 all the operands together against the register constraints. */
2929 best = MAX_RECOG_OPERANDS * 2 + 600;
2930 best_small_class_operands_num = 0;
2933 goal_alternative_swapped = 0;
2936 /* The constraints are made of several alternatives.
2937 Each operand's constraint looks like foo,bar,... with commas
2938 separating the alternatives. The first alternatives for all
2939 operands go together, the second alternatives go together, etc.
2941 First loop over alternatives. */
2943 for (this_alternative_number = 0;
2944 this_alternative_number < n_alternatives;
2945 this_alternative_number++)
2947 /* Loop over operands for one constraint alternative. */
2948 /* LOSERS counts those that don't fit this alternative
2949 and would require loading. */
2951 /* BAD is set to 1 if it some operand can't fit this alternative
2952 even after reloading. */
2954 /* REJECT is a count of how undesirable this alternative says it is
2955 if any reloading is required. If the alternative matches exactly
2956 then REJECT is ignored, but otherwise it gets this much
2957 counted against it in addition to the reloading needed. Each
2958 ? counts three times here since we want the disparaging caused by
2959 a bad register class to only count 1/3 as much. */
2962 if (!recog_data.alternative_enabled_p[this_alternative_number])
2966 for (i = 0; i < recog_data.n_operands; i++)
2967 constraints[i] = skip_alternative (constraints[i]);
2972 this_earlyclobber = 0;
2974 for (i = 0; i < noperands; i++)
2976 const char *p = constraints[i];
2981 /* 0 => this operand can be reloaded somehow for this alternative. */
2983 /* 0 => this operand can be reloaded if the alternative allows regs. */
2987 rtx operand = recog_data.operand[i];
2989 /* Nonzero means this is a MEM that must be reloaded into a reg
2990 regardless of what the constraint says. */
2991 int force_reload = 0;
2993 /* Nonzero if a constant forced into memory would be OK for this
2996 int earlyclobber = 0;
2998 /* If the predicate accepts a unary operator, it means that
2999 we need to reload the operand, but do not do this for
3000 match_operator and friends. */
3001 if (UNARY_P (operand) && *p != 0)
3002 operand = XEXP (operand, 0);
3004 /* If the operand is a SUBREG, extract
3005 the REG or MEM (or maybe even a constant) within.
3006 (Constants can occur as a result of reg_equiv_constant.) */
3008 while (GET_CODE (operand) == SUBREG)
3010 /* Offset only matters when operand is a REG and
3011 it is a hard reg. This is because it is passed
3012 to reg_fits_class_p if it is a REG and all pseudos
3013 return 0 from that function. */
3014 if (REG_P (SUBREG_REG (operand))
3015 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
3017 if (simplify_subreg_regno (REGNO (SUBREG_REG (operand)),
3018 GET_MODE (SUBREG_REG (operand)),
3019 SUBREG_BYTE (operand),
3020 GET_MODE (operand)) < 0)
3022 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
3023 GET_MODE (SUBREG_REG (operand)),
3024 SUBREG_BYTE (operand),
3025 GET_MODE (operand));
3027 operand = SUBREG_REG (operand);
3028 /* Force reload if this is a constant or PLUS or if there may
3029 be a problem accessing OPERAND in the outer mode. */
3030 if (CONSTANT_P (operand)
3031 || GET_CODE (operand) == PLUS
3032 /* We must force a reload of paradoxical SUBREGs
3033 of a MEM because the alignment of the inner value
3034 may not be enough to do the outer reference. On
3035 big-endian machines, it may also reference outside
3038 On machines that extend byte operations and we have a
3039 SUBREG where both the inner and outer modes are no wider
3040 than a word and the inner mode is narrower, is integral,
3041 and gets extended when loaded from memory, combine.c has
3042 made assumptions about the behavior of the machine in such
3043 register access. If the data is, in fact, in memory we
3044 must always load using the size assumed to be in the
3045 register and let the insn do the different-sized
3048 This is doubly true if WORD_REGISTER_OPERATIONS. In
3049 this case eliminate_regs has left non-paradoxical
3050 subregs for push_reload to see. Make sure it does
3051 by forcing the reload.
3053 ??? When is it right at this stage to have a subreg
3054 of a mem that is _not_ to be handled specially? IMO
3055 those should have been reduced to just a mem. */
3056 || ((MEM_P (operand)
3058 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3059 #ifndef WORD_REGISTER_OPERATIONS
3060 && (((GET_MODE_BITSIZE (GET_MODE (operand))
3061 < BIGGEST_ALIGNMENT)
3062 && (GET_MODE_SIZE (operand_mode[i])
3063 > GET_MODE_SIZE (GET_MODE (operand))))
3065 #ifdef LOAD_EXTEND_OP
3066 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3067 && (GET_MODE_SIZE (GET_MODE (operand))
3069 && (GET_MODE_SIZE (operand_mode[i])
3070 > GET_MODE_SIZE (GET_MODE (operand)))
3071 && INTEGRAL_MODE_P (GET_MODE (operand))
3072 && LOAD_EXTEND_OP (GET_MODE (operand)) != UNKNOWN)
3081 this_alternative[i] = NO_REGS;
3082 this_alternative_win[i] = 0;
3083 this_alternative_match_win[i] = 0;
3084 this_alternative_offmemok[i] = 0;
3085 this_alternative_earlyclobber[i] = 0;
3086 this_alternative_matches[i] = -1;
3088 /* An empty constraint or empty alternative
3089 allows anything which matched the pattern. */
3090 if (*p == 0 || *p == ',')
3093 /* Scan this alternative's specs for this operand;
3094 set WIN if the operand fits any letter in this alternative.
3095 Otherwise, clear BADOP if this operand could
3096 fit some letter after reloads,
3097 or set WINREG if this operand could fit after reloads
3098 provided the constraint allows some registers. */
3101 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
3110 case '=': case '+': case '*':
3114 /* We only support one commutative marker, the first
3115 one. We already set commutative above. */
3127 /* Ignore rest of this alternative as far as
3128 reloading is concerned. */
3131 while (*p && *p != ',');
3135 case '0': case '1': case '2': case '3': case '4':
3136 case '5': case '6': case '7': case '8': case '9':
3137 m = strtoul (p, &end, 10);
3141 this_alternative_matches[i] = m;
3142 /* We are supposed to match a previous operand.
3143 If we do, we win if that one did.
3144 If we do not, count both of the operands as losers.
3145 (This is too conservative, since most of the time
3146 only a single reload insn will be needed to make
3147 the two operands win. As a result, this alternative
3148 may be rejected when it is actually desirable.) */
3149 if ((swapped && (m != commutative || i != commutative + 1))
3150 /* If we are matching as if two operands were swapped,
3151 also pretend that operands_match had been computed
3153 But if I is the second of those and C is the first,
3154 don't exchange them, because operands_match is valid
3155 only on one side of its diagonal. */
3157 [(m == commutative || m == commutative + 1)
3158 ? 2 * commutative + 1 - m : m]
3159 [(i == commutative || i == commutative + 1)
3160 ? 2 * commutative + 1 - i : i])
3161 : operands_match[m][i])
3163 /* If we are matching a non-offsettable address where an
3164 offsettable address was expected, then we must reject
3165 this combination, because we can't reload it. */
3166 if (this_alternative_offmemok[m]
3167 && MEM_P (recog_data.operand[m])
3168 && this_alternative[m] == NO_REGS
3169 && ! this_alternative_win[m])
3172 did_match = this_alternative_win[m];
3176 /* Operands don't match. */
3179 /* Retroactively mark the operand we had to match
3180 as a loser, if it wasn't already. */
3181 if (this_alternative_win[m])
3183 this_alternative_win[m] = 0;
3184 if (this_alternative[m] == NO_REGS)
3186 /* But count the pair only once in the total badness of
3187 this alternative, if the pair can be a dummy reload.
3188 The pointers in operand_loc are not swapped; swap
3189 them by hand if necessary. */
3190 if (swapped && i == commutative)
3191 loc1 = commutative + 1;
3192 else if (swapped && i == commutative + 1)
3196 if (swapped && m == commutative)
3197 loc2 = commutative + 1;
3198 else if (swapped && m == commutative + 1)
3203 = find_dummy_reload (recog_data.operand[i],
3204 recog_data.operand[m],
3205 recog_data.operand_loc[loc1],
3206 recog_data.operand_loc[loc2],
3207 operand_mode[i], operand_mode[m],
3208 this_alternative[m], -1,
3209 this_alternative_earlyclobber[m]);
3214 /* This can be fixed with reloads if the operand
3215 we are supposed to match can be fixed with reloads. */
3217 this_alternative[i] = this_alternative[m];
3219 /* If we have to reload this operand and some previous
3220 operand also had to match the same thing as this
3221 operand, we don't know how to do that. So reject this
3223 if (! did_match || force_reload)
3224 for (j = 0; j < i; j++)
3225 if (this_alternative_matches[j]
3226 == this_alternative_matches[i])
3231 /* All necessary reloads for an address_operand
3232 were handled in find_reloads_address. */
3233 this_alternative[i] = base_reg_class (VOIDmode, ADDRESS,
3239 case TARGET_MEM_CONSTRAINT:
3244 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3245 && reg_renumber[REGNO (operand)] < 0))
3247 if (CONST_POOL_OK_P (operand))
3254 && ! address_reloaded[i]
3255 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3256 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3262 && ! address_reloaded[i]
3263 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3264 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3268 /* Memory operand whose address is not offsettable. */
3273 && ! (ind_levels ? offsettable_memref_p (operand)
3274 : offsettable_nonstrict_memref_p (operand))
3275 /* Certain mem addresses will become offsettable
3276 after they themselves are reloaded. This is important;
3277 we don't want our own handling of unoffsettables
3278 to override the handling of reg_equiv_address. */
3279 && !(REG_P (XEXP (operand, 0))
3281 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3285 /* Memory operand whose address is offsettable. */
3289 if ((MEM_P (operand)
3290 /* If IND_LEVELS, find_reloads_address won't reload a
3291 pseudo that didn't get a hard reg, so we have to
3292 reject that case. */
3293 && ((ind_levels ? offsettable_memref_p (operand)
3294 : offsettable_nonstrict_memref_p (operand))
3295 /* A reloaded address is offsettable because it is now
3296 just a simple register indirect. */
3297 || address_reloaded[i] == 1))
3299 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3300 && reg_renumber[REGNO (operand)] < 0
3301 /* If reg_equiv_address is nonzero, we will be
3302 loading it into a register; hence it will be
3303 offsettable, but we cannot say that reg_equiv_mem
3304 is offsettable without checking. */
3305 && ((reg_equiv_mem[REGNO (operand)] != 0
3306 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3307 || (reg_equiv_address[REGNO (operand)] != 0))))
3309 if (CONST_POOL_OK_P (operand)
3317 /* Output operand that is stored before the need for the
3318 input operands (and their index registers) is over. */
3319 earlyclobber = 1, this_earlyclobber = 1;
3324 if (GET_CODE (operand) == CONST_DOUBLE
3325 || (GET_CODE (operand) == CONST_VECTOR
3326 && (GET_MODE_CLASS (GET_MODE (operand))
3327 == MODE_VECTOR_FLOAT)))
3333 if (GET_CODE (operand) == CONST_DOUBLE
3334 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3339 if (CONST_INT_P (operand)
3340 || (GET_CODE (operand) == CONST_DOUBLE
3341 && GET_MODE (operand) == VOIDmode))
3344 if (CONSTANT_P (operand)
3345 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)))
3350 if (CONST_INT_P (operand)
3351 || (GET_CODE (operand) == CONST_DOUBLE
3352 && GET_MODE (operand) == VOIDmode))
3364 if (CONST_INT_P (operand)
3365 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3376 /* A PLUS is never a valid operand, but reload can make
3377 it from a register when eliminating registers. */
3378 && GET_CODE (operand) != PLUS
3379 /* A SCRATCH is not a valid operand. */
3380 && GET_CODE (operand) != SCRATCH
3381 && (! CONSTANT_P (operand)
3383 || LEGITIMATE_PIC_OPERAND_P (operand))
3384 && (GENERAL_REGS == ALL_REGS
3386 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3387 && reg_renumber[REGNO (operand)] < 0)))
3389 /* Drop through into 'r' case. */
3393 = reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3397 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3399 #ifdef EXTRA_CONSTRAINT_STR
3400 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3404 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3406 /* If the address was already reloaded,
3408 else if (MEM_P (operand)
3409 && address_reloaded[i] == 1)
3411 /* Likewise if the address will be reloaded because
3412 reg_equiv_address is nonzero. For reg_equiv_mem
3413 we have to check. */
3414 else if (REG_P (operand)
3415 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3416 && reg_renumber[REGNO (operand)] < 0
3417 && ((reg_equiv_mem[REGNO (operand)] != 0
3418 && EXTRA_CONSTRAINT_STR (reg_equiv_mem[REGNO (operand)], c, p))
3419 || (reg_equiv_address[REGNO (operand)] != 0)))
3422 /* If we didn't already win, we can reload
3423 constants via force_const_mem, and other
3424 MEMs by reloading the address like for 'o'. */
3425 if (CONST_POOL_OK_P (operand)
3432 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3434 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3437 /* If we didn't already win, we can reload
3438 the address into a base register. */
3439 this_alternative[i] = base_reg_class (VOIDmode,
3446 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3453 = (reg_class_subunion
3454 [this_alternative[i]]
3455 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3457 if (GET_MODE (operand) == BLKmode)
3461 && reg_fits_class_p (operand, this_alternative[i],
3462 offset, GET_MODE (recog_data.operand[i])))
3466 while ((p += len), c);
3470 /* If this operand could be handled with a reg,
3471 and some reg is allowed, then this operand can be handled. */
3472 if (winreg && this_alternative[i] != NO_REGS)
3475 /* Record which operands fit this alternative. */
3476 this_alternative_earlyclobber[i] = earlyclobber;
3477 if (win && ! force_reload)
3478 this_alternative_win[i] = 1;
3479 else if (did_match && ! force_reload)
3480 this_alternative_match_win[i] = 1;
3483 int const_to_mem = 0;
3485 this_alternative_offmemok[i] = offmemok;
3489 /* Alternative loses if it has no regs for a reg operand. */
3491 && this_alternative[i] == NO_REGS
3492 && this_alternative_matches[i] < 0)
3495 /* If this is a constant that is reloaded into the desired
3496 class by copying it to memory first, count that as another
3497 reload. This is consistent with other code and is
3498 required to avoid choosing another alternative when
3499 the constant is moved into memory by this function on
3500 an early reload pass. Note that the test here is
3501 precisely the same as in the code below that calls
3503 if (CONST_POOL_OK_P (operand)
3504 && ((PREFERRED_RELOAD_CLASS (operand, this_alternative[i])
3506 || no_input_reloads)
3507 && operand_mode[i] != VOIDmode)
3510 if (this_alternative[i] != NO_REGS)
3514 /* Alternative loses if it requires a type of reload not
3515 permitted for this insn. We can always reload SCRATCH
3516 and objects with a REG_UNUSED note. */
3517 if (GET_CODE (operand) != SCRATCH
3518 && modified[i] != RELOAD_READ && no_output_reloads
3519 && ! find_reg_note (insn, REG_UNUSED, operand))
3521 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3525 /* If we can't reload this value at all, reject this
3526 alternative. Note that we could also lose due to
3527 LIMIT_RELOAD_CLASS, but we don't check that
3530 if (! CONSTANT_P (operand) && this_alternative[i] != NO_REGS)
3532 if (PREFERRED_RELOAD_CLASS (operand, this_alternative[i])
3536 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
3537 if (operand_type[i] == RELOAD_FOR_OUTPUT
3538 && (PREFERRED_OUTPUT_RELOAD_CLASS (operand,
3539 this_alternative[i])
3545 /* We prefer to reload pseudos over reloading other things,
3546 since such reloads may be able to be eliminated later.
3547 If we are reloading a SCRATCH, we won't be generating any
3548 insns, just using a register, so it is also preferred.
3549 So bump REJECT in other cases. Don't do this in the
3550 case where we are forcing a constant into memory and
3551 it will then win since we don't want to have a different
3552 alternative match then. */
3553 if (! (REG_P (operand)
3554 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3555 && GET_CODE (operand) != SCRATCH
3556 && ! (const_to_mem && constmemok))
3559 /* Input reloads can be inherited more often than output
3560 reloads can be removed, so penalize output reloads. */
3561 if (operand_type[i] != RELOAD_FOR_INPUT
3562 && GET_CODE (operand) != SCRATCH)
3566 /* If this operand is a pseudo register that didn't get a hard
3567 reg and this alternative accepts some register, see if the
3568 class that we want is a subset of the preferred class for this
3569 register. If not, but it intersects that class, use the
3570 preferred class instead. If it does not intersect the preferred
3571 class, show that usage of this alternative should be discouraged;
3572 it will be discouraged more still if the register is `preferred
3573 or nothing'. We do this because it increases the chance of
3574 reusing our spill register in a later insn and avoiding a pair
3575 of memory stores and loads.
3577 Don't bother with this if this alternative will accept this
3580 Don't do this for a multiword operand, since it is only a
3581 small win and has the risk of requiring more spill registers,
3582 which could cause a large loss.
3584 Don't do this if the preferred class has only one register
3585 because we might otherwise exhaust the class. */
3587 if (! win && ! did_match
3588 && this_alternative[i] != NO_REGS
3589 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3590 && reg_class_size [(int) preferred_class[i]] > 0
3591 && ! SMALL_REGISTER_CLASS_P (preferred_class[i]))
3593 if (! reg_class_subset_p (this_alternative[i],
3594 preferred_class[i]))
3596 /* Since we don't have a way of forming the intersection,
3597 we just do something special if the preferred class
3598 is a subset of the class we have; that's the most
3599 common case anyway. */
3600 if (reg_class_subset_p (preferred_class[i],
3601 this_alternative[i]))
3602 this_alternative[i] = preferred_class[i];
3604 reject += (2 + 2 * pref_or_nothing[i]);
3609 /* Now see if any output operands that are marked "earlyclobber"
3610 in this alternative conflict with any input operands
3611 or any memory addresses. */
3613 for (i = 0; i < noperands; i++)
3614 if (this_alternative_earlyclobber[i]
3615 && (this_alternative_win[i] || this_alternative_match_win[i]))
3617 struct decomposition early_data;
3619 early_data = decompose (recog_data.operand[i]);
3621 gcc_assert (modified[i] != RELOAD_READ);
3623 if (this_alternative[i] == NO_REGS)
3625 this_alternative_earlyclobber[i] = 0;
3626 gcc_assert (this_insn_is_asm);
3627 error_for_asm (this_insn,
3628 "%<&%> constraint used with no register class");
3631 for (j = 0; j < noperands; j++)
3632 /* Is this an input operand or a memory ref? */
3633 if ((MEM_P (recog_data.operand[j])
3634 || modified[j] != RELOAD_WRITE)
3636 /* Ignore things like match_operator operands. */
3637 && !recog_data.is_operator[j]
3638 /* Don't count an input operand that is constrained to match
3639 the early clobber operand. */
3640 && ! (this_alternative_matches[j] == i
3641 && rtx_equal_p (recog_data.operand[i],
3642 recog_data.operand[j]))
3643 /* Is it altered by storing the earlyclobber operand? */
3644 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3647 /* If the output is in a non-empty few-regs class,
3648 it's costly to reload it, so reload the input instead. */
3649 if (SMALL_REGISTER_CLASS_P (this_alternative[i])
3650 && (REG_P (recog_data.operand[j])
3651 || GET_CODE (recog_data.operand[j]) == SUBREG))
3654 this_alternative_win[j] = 0;
3655 this_alternative_match_win[j] = 0;
3660 /* If an earlyclobber operand conflicts with something,
3661 it must be reloaded, so request this and count the cost. */
3665 this_alternative_win[i] = 0;
3666 this_alternative_match_win[j] = 0;
3667 for (j = 0; j < noperands; j++)
3668 if (this_alternative_matches[j] == i
3669 && this_alternative_match_win[j])
3671 this_alternative_win[j] = 0;
3672 this_alternative_match_win[j] = 0;
3678 /* If one alternative accepts all the operands, no reload required,
3679 choose that alternative; don't consider the remaining ones. */
3682 /* Unswap these so that they are never swapped at `finish'. */
3683 if (commutative >= 0)
3685 recog_data.operand[commutative] = substed_operand[commutative];
3686 recog_data.operand[commutative + 1]
3687 = substed_operand[commutative + 1];
3689 for (i = 0; i < noperands; i++)
3691 goal_alternative_win[i] = this_alternative_win[i];
3692 goal_alternative_match_win[i] = this_alternative_match_win[i];
3693 goal_alternative[i] = this_alternative[i];
3694 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3695 goal_alternative_matches[i] = this_alternative_matches[i];
3696 goal_alternative_earlyclobber[i]
3697 = this_alternative_earlyclobber[i];
3699 goal_alternative_number = this_alternative_number;
3700 goal_alternative_swapped = swapped;
3701 goal_earlyclobber = this_earlyclobber;
3705 /* REJECT, set by the ! and ? constraint characters and when a register
3706 would be reloaded into a non-preferred class, discourages the use of
3707 this alternative for a reload goal. REJECT is incremented by six
3708 for each ? and two for each non-preferred class. */
3709 losers = losers * 6 + reject;
3711 /* If this alternative can be made to work by reloading,
3712 and it needs less reloading than the others checked so far,
3713 record it as the chosen goal for reloading. */
3716 bool change_p = false;
3717 int small_class_operands_num = 0;
3721 for (i = 0; i < noperands; i++)
3722 small_class_operands_num
3723 += SMALL_REGISTER_CLASS_P (this_alternative[i]) ? 1 : 0;
3726 /* If the cost of the reloads is the same,
3727 prefer alternative which requires minimal
3728 number of small register classes for the
3729 operands. This improves chances of reloads
3730 for insn requiring small register
3732 && (small_class_operands_num
3733 < best_small_class_operands_num)))
3738 for (i = 0; i < noperands; i++)
3740 goal_alternative[i] = this_alternative[i];
3741 goal_alternative_win[i] = this_alternative_win[i];
3742 goal_alternative_match_win[i]
3743 = this_alternative_match_win[i];
3744 goal_alternative_offmemok[i]
3745 = this_alternative_offmemok[i];
3746 goal_alternative_matches[i] = this_alternative_matches[i];
3747 goal_alternative_earlyclobber[i]
3748 = this_alternative_earlyclobber[i];
3750 goal_alternative_swapped = swapped;
3752 best_small_class_operands_num = small_class_operands_num;
3753 goal_alternative_number = this_alternative_number;
3754 goal_earlyclobber = this_earlyclobber;
3759 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3760 then we need to try each alternative twice,
3761 the second time matching those two operands
3762 as if we had exchanged them.
3763 To do this, really exchange them in operands.
3765 If we have just tried the alternatives the second time,
3766 return operands to normal and drop through. */
3768 if (commutative >= 0)
3773 enum reg_class tclass;
3776 recog_data.operand[commutative] = substed_operand[commutative + 1];
3777 recog_data.operand[commutative + 1] = substed_operand[commutative];
3778 /* Swap the duplicates too. */
3779 for (i = 0; i < recog_data.n_dups; i++)
3780 if (recog_data.dup_num[i] == commutative
3781 || recog_data.dup_num[i] == commutative + 1)
3782 *recog_data.dup_loc[i]
3783 = recog_data.operand[(int) recog_data.dup_num[i]];
3785 tclass = preferred_class[commutative];
3786 preferred_class[commutative] = preferred_class[commutative + 1];
3787 preferred_class[commutative + 1] = tclass;
3789 t = pref_or_nothing[commutative];
3790 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3791 pref_or_nothing[commutative + 1] = t;
3793 t = address_reloaded[commutative];
3794 address_reloaded[commutative] = address_reloaded[commutative + 1];
3795 address_reloaded[commutative + 1] = t;
3797 memcpy (constraints, recog_data.constraints,
3798 noperands * sizeof (const char *));
3803 recog_data.operand[commutative] = substed_operand[commutative];
3804 recog_data.operand[commutative + 1]
3805 = substed_operand[commutative + 1];
3806 /* Unswap the duplicates too. */
3807 for (i = 0; i < recog_data.n_dups; i++)
3808 if (recog_data.dup_num[i] == commutative
3809 || recog_data.dup_num[i] == commutative + 1)
3810 *recog_data.dup_loc[i]
3811 = recog_data.operand[(int) recog_data.dup_num[i]];
3815 /* The operands don't meet the constraints.
3816 goal_alternative describes the alternative
3817 that we could reach by reloading the fewest operands.
3818 Reload so as to fit it. */
3820 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3822 /* No alternative works with reloads?? */
3823 if (insn_code_number >= 0)
3824 fatal_insn ("unable to generate reloads for:", insn);
3825 error_for_asm (insn, "inconsistent operand constraints in an %<asm%>");
3826 /* Avoid further trouble with this insn. */
3827 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3832 /* Jump to `finish' from above if all operands are valid already.
3833 In that case, goal_alternative_win is all 1. */
3836 /* Right now, for any pair of operands I and J that are required to match,
3838 goal_alternative_matches[J] is I.
3839 Set up goal_alternative_matched as the inverse function:
3840 goal_alternative_matched[I] = J. */
3842 for (i = 0; i < noperands; i++)
3843 goal_alternative_matched[i] = -1;
3845 for (i = 0; i < noperands; i++)
3846 if (! goal_alternative_win[i]
3847 && goal_alternative_matches[i] >= 0)
3848 goal_alternative_matched[goal_alternative_matches[i]] = i;
3850 for (i = 0; i < noperands; i++)
3851 goal_alternative_win[i] |= goal_alternative_match_win[i];
3853 /* If the best alternative is with operands 1 and 2 swapped,
3854 consider them swapped before reporting the reloads. Update the
3855 operand numbers of any reloads already pushed. */
3857 if (goal_alternative_swapped)
3861 tem = substed_operand[commutative];
3862 substed_operand[commutative] = substed_operand[commutative + 1];
3863 substed_operand[commutative + 1] = tem;
3864 tem = recog_data.operand[commutative];
3865 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3866 recog_data.operand[commutative + 1] = tem;
3867 tem = *recog_data.operand_loc[commutative];
3868 *recog_data.operand_loc[commutative]
3869 = *recog_data.operand_loc[commutative + 1];
3870 *recog_data.operand_loc[commutative + 1] = tem;
3872 for (i = 0; i < n_reloads; i++)
3874 if (rld[i].opnum == commutative)
3875 rld[i].opnum = commutative + 1;
3876 else if (rld[i].opnum == commutative + 1)
3877 rld[i].opnum = commutative;
3881 for (i = 0; i < noperands; i++)
3883 operand_reloadnum[i] = -1;
3885 /* If this is an earlyclobber operand, we need to widen the scope.
3886 The reload must remain valid from the start of the insn being
3887 reloaded until after the operand is stored into its destination.
3888 We approximate this with RELOAD_OTHER even though we know that we
3889 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3891 One special case that is worth checking is when we have an
3892 output that is earlyclobber but isn't used past the insn (typically
3893 a SCRATCH). In this case, we only need have the reload live
3894 through the insn itself, but not for any of our input or output
3896 But we must not accidentally narrow the scope of an existing
3897 RELOAD_OTHER reload - leave these alone.
3899 In any case, anything needed to address this operand can remain
3900 however they were previously categorized. */
3902 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3904 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3905 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3908 /* Any constants that aren't allowed and can't be reloaded
3909 into registers are here changed into memory references. */
3910 for (i = 0; i < noperands; i++)
3911 if (! goal_alternative_win[i])
3913 rtx op = recog_data.operand[i];
3914 rtx subreg = NULL_RTX;
3915 rtx plus = NULL_RTX;
3916 enum machine_mode mode = operand_mode[i];
3918 /* Reloads of SUBREGs of CONSTANT RTXs are handled later in
3919 push_reload so we have to let them pass here. */
3920 if (GET_CODE (op) == SUBREG)
3923 op = SUBREG_REG (op);
3924 mode = GET_MODE (op);
3927 if (GET_CODE (op) == PLUS)
3933 if (CONST_POOL_OK_P (op)
3934 && ((PREFERRED_RELOAD_CLASS (op,
3935 (enum reg_class) goal_alternative[i])
3937 || no_input_reloads)
3938 && mode != VOIDmode)
3940 int this_address_reloaded;
3941 rtx tem = force_const_mem (mode, op);
3943 /* If we stripped a SUBREG or a PLUS above add it back. */
3944 if (plus != NULL_RTX)
3945 tem = gen_rtx_PLUS (mode, XEXP (plus, 0), tem);
3947 if (subreg != NULL_RTX)
3948 tem = gen_rtx_SUBREG (operand_mode[i], tem, SUBREG_BYTE (subreg));
3950 this_address_reloaded = 0;
3951 substed_operand[i] = recog_data.operand[i]
3952 = find_reloads_toplev (tem, i, address_type[i], ind_levels,
3953 0, insn, &this_address_reloaded);
3955 /* If the alternative accepts constant pool refs directly
3956 there will be no reload needed at all. */
3957 if (plus == NULL_RTX
3958 && subreg == NULL_RTX
3959 && alternative_allows_const_pool_ref (this_address_reloaded == 0
3960 ? substed_operand[i]
3962 recog_data.constraints[i],
3963 goal_alternative_number))
3964 goal_alternative_win[i] = 1;
3968 /* Record the values of the earlyclobber operands for the caller. */
3969 if (goal_earlyclobber)
3970 for (i = 0; i < noperands; i++)
3971 if (goal_alternative_earlyclobber[i])
3972 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3974 /* Now record reloads for all the operands that need them. */
3975 for (i = 0; i < noperands; i++)
3976 if (! goal_alternative_win[i])
3978 /* Operands that match previous ones have already been handled. */
3979 if (goal_alternative_matches[i] >= 0)
3981 /* Handle an operand with a nonoffsettable address
3982 appearing where an offsettable address will do
3983 by reloading the address into a base register.
3985 ??? We can also do this when the operand is a register and
3986 reg_equiv_mem is not offsettable, but this is a bit tricky,
3987 so we don't bother with it. It may not be worth doing. */
3988 else if (goal_alternative_matched[i] == -1
3989 && goal_alternative_offmemok[i]
3990 && MEM_P (recog_data.operand[i]))
3992 /* If the address to be reloaded is a VOIDmode constant,
3993 use the default address mode as mode of the reload register,
3994 as would have been done by find_reloads_address. */
3995 enum machine_mode address_mode;
3996 address_mode = GET_MODE (XEXP (recog_data.operand[i], 0));
3997 if (address_mode == VOIDmode)
3999 addr_space_t as = MEM_ADDR_SPACE (recog_data.operand[i]);
4000 address_mode = targetm.addr_space.address_mode (as);
4003 operand_reloadnum[i]
4004 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
4005 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
4006 base_reg_class (VOIDmode, MEM, SCRATCH),
4008 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
4009 rld[operand_reloadnum[i]].inc
4010 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
4012 /* If this operand is an output, we will have made any
4013 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
4014 now we are treating part of the operand as an input, so
4015 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
4017 if (modified[i] == RELOAD_WRITE)
4019 for (j = 0; j < n_reloads; j++)
4021 if (rld[j].opnum == i)
4023 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
4024 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
4025 else if (rld[j].when_needed
4026 == RELOAD_FOR_OUTADDR_ADDRESS)
4027 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
4032 else if (goal_alternative_matched[i] == -1)
4034 operand_reloadnum[i]
4035 = push_reload ((modified[i] != RELOAD_WRITE
4036 ? recog_data.operand[i] : 0),
4037 (modified[i] != RELOAD_READ
4038 ? recog_data.operand[i] : 0),
4039 (modified[i] != RELOAD_WRITE
4040 ? recog_data.operand_loc[i] : 0),
4041 (modified[i] != RELOAD_READ
4042 ? recog_data.operand_loc[i] : 0),
4043 (enum reg_class) goal_alternative[i],
4044 (modified[i] == RELOAD_WRITE
4045 ? VOIDmode : operand_mode[i]),
4046 (modified[i] == RELOAD_READ
4047 ? VOIDmode : operand_mode[i]),
4048 (insn_code_number < 0 ? 0
4049 : insn_data[insn_code_number].operand[i].strict_low),
4050 0, i, operand_type[i]);
4052 /* In a matching pair of operands, one must be input only
4053 and the other must be output only.
4054 Pass the input operand as IN and the other as OUT. */
4055 else if (modified[i] == RELOAD_READ
4056 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
4058 operand_reloadnum[i]
4059 = push_reload (recog_data.operand[i],
4060 recog_data.operand[goal_alternative_matched[i]],
4061 recog_data.operand_loc[i],
4062 recog_data.operand_loc[goal_alternative_matched[i]],
4063 (enum reg_class) goal_alternative[i],
4065 operand_mode[goal_alternative_matched[i]],
4066 0, 0, i, RELOAD_OTHER);
4067 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
4069 else if (modified[i] == RELOAD_WRITE
4070 && modified[goal_alternative_matched[i]] == RELOAD_READ)
4072 operand_reloadnum[goal_alternative_matched[i]]
4073 = push_reload (recog_data.operand[goal_alternative_matched[i]],
4074 recog_data.operand[i],
4075 recog_data.operand_loc[goal_alternative_matched[i]],
4076 recog_data.operand_loc[i],
4077 (enum reg_class) goal_alternative[i],
4078 operand_mode[goal_alternative_matched[i]],
4080 0, 0, i, RELOAD_OTHER);
4081 operand_reloadnum[i] = output_reloadnum;
4085 gcc_assert (insn_code_number < 0);
4086 error_for_asm (insn, "inconsistent operand constraints "
4088 /* Avoid further trouble with this insn. */
4089 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
4094 else if (goal_alternative_matched[i] < 0
4095 && goal_alternative_matches[i] < 0
4096 && address_operand_reloaded[i] != 1
4099 /* For each non-matching operand that's a MEM or a pseudo-register
4100 that didn't get a hard register, make an optional reload.
4101 This may get done even if the insn needs no reloads otherwise. */
4103 rtx operand = recog_data.operand[i];
4105 while (GET_CODE (operand) == SUBREG)
4106 operand = SUBREG_REG (operand);
4107 if ((MEM_P (operand)
4109 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4110 /* If this is only for an output, the optional reload would not
4111 actually cause us to use a register now, just note that
4112 something is stored here. */
4113 && ((enum reg_class) goal_alternative[i] != NO_REGS
4114 || modified[i] == RELOAD_WRITE)
4115 && ! no_input_reloads
4116 /* An optional output reload might allow to delete INSN later.
4117 We mustn't make in-out reloads on insns that are not permitted
4119 If this is an asm, we can't delete it; we must not even call
4120 push_reload for an optional output reload in this case,
4121 because we can't be sure that the constraint allows a register,
4122 and push_reload verifies the constraints for asms. */
4123 && (modified[i] == RELOAD_READ
4124 || (! no_output_reloads && ! this_insn_is_asm)))
4125 operand_reloadnum[i]
4126 = push_reload ((modified[i] != RELOAD_WRITE
4127 ? recog_data.operand[i] : 0),
4128 (modified[i] != RELOAD_READ
4129 ? recog_data.operand[i] : 0),
4130 (modified[i] != RELOAD_WRITE
4131 ? recog_data.operand_loc[i] : 0),
4132 (modified[i] != RELOAD_READ
4133 ? recog_data.operand_loc[i] : 0),
4134 (enum reg_class) goal_alternative[i],
4135 (modified[i] == RELOAD_WRITE
4136 ? VOIDmode : operand_mode[i]),
4137 (modified[i] == RELOAD_READ
4138 ? VOIDmode : operand_mode[i]),
4139 (insn_code_number < 0 ? 0
4140 : insn_data[insn_code_number].operand[i].strict_low),
4141 1, i, operand_type[i]);
4142 /* If a memory reference remains (either as a MEM or a pseudo that
4143 did not get a hard register), yet we can't make an optional
4144 reload, check if this is actually a pseudo register reference;
4145 we then need to emit a USE and/or a CLOBBER so that reload
4146 inheritance will do the right thing. */
4150 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
4151 && reg_renumber [REGNO (operand)] < 0)))
4153 operand = *recog_data.operand_loc[i];
4155 while (GET_CODE (operand) == SUBREG)
4156 operand = SUBREG_REG (operand);
4157 if (REG_P (operand))
4159 if (modified[i] != RELOAD_WRITE)
4160 /* We mark the USE with QImode so that we recognize
4161 it as one that can be safely deleted at the end
4163 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
4165 if (modified[i] != RELOAD_READ)
4166 emit_insn_after (gen_clobber (operand), insn);
4170 else if (goal_alternative_matches[i] >= 0
4171 && goal_alternative_win[goal_alternative_matches[i]]
4172 && modified[i] == RELOAD_READ
4173 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
4174 && ! no_input_reloads && ! no_output_reloads
4177 /* Similarly, make an optional reload for a pair of matching
4178 objects that are in MEM or a pseudo that didn't get a hard reg. */
4180 rtx operand = recog_data.operand[i];
4182 while (GET_CODE (operand) == SUBREG)
4183 operand = SUBREG_REG (operand);
4184 if ((MEM_P (operand)
4186 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4187 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
4189 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
4190 = push_reload (recog_data.operand[goal_alternative_matches[i]],
4191 recog_data.operand[i],
4192 recog_data.operand_loc[goal_alternative_matches[i]],
4193 recog_data.operand_loc[i],
4194 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
4195 operand_mode[goal_alternative_matches[i]],
4197 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
4200 /* Perform whatever substitutions on the operands we are supposed
4201 to make due to commutativity or replacement of registers
4202 with equivalent constants or memory slots. */
4204 for (i = 0; i < noperands; i++)
4206 /* We only do this on the last pass through reload, because it is
4207 possible for some data (like reg_equiv_address) to be changed during
4208 later passes. Moreover, we lose the opportunity to get a useful
4209 reload_{in,out}_reg when we do these replacements. */
4213 rtx substitution = substed_operand[i];
4215 *recog_data.operand_loc[i] = substitution;
4217 /* If we're replacing an operand with a LABEL_REF, we need to
4218 make sure that there's a REG_LABEL_OPERAND note attached to
4219 this instruction. */
4220 if (GET_CODE (substitution) == LABEL_REF
4221 && !find_reg_note (insn, REG_LABEL_OPERAND,
4222 XEXP (substitution, 0))
4223 /* For a JUMP_P, if it was a branch target it must have
4224 already been recorded as such. */
4226 || !label_is_jump_target_p (XEXP (substitution, 0),
4228 add_reg_note (insn, REG_LABEL_OPERAND, XEXP (substitution, 0));
4231 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4234 /* If this insn pattern contains any MATCH_DUP's, make sure that
4235 they will be substituted if the operands they match are substituted.
4236 Also do now any substitutions we already did on the operands.
4238 Don't do this if we aren't making replacements because we might be
4239 propagating things allocated by frame pointer elimination into places
4240 it doesn't expect. */
4242 if (insn_code_number >= 0 && replace)
4243 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4245 int opno = recog_data.dup_num[i];
4246 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4247 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4251 /* This loses because reloading of prior insns can invalidate the equivalence
4252 (or at least find_equiv_reg isn't smart enough to find it any more),
4253 causing this insn to need more reload regs than it needed before.
4254 It may be too late to make the reload regs available.
4255 Now this optimization is done safely in choose_reload_regs. */
4257 /* For each reload of a reg into some other class of reg,
4258 search for an existing equivalent reg (same value now) in the right class.
4259 We can use it as long as we don't need to change its contents. */
4260 for (i = 0; i < n_reloads; i++)
4261 if (rld[i].reg_rtx == 0
4263 && REG_P (rld[i].in)
4267 = find_equiv_reg (rld[i].in, insn, rld[i].rclass, -1,
4268 static_reload_reg_p, 0, rld[i].inmode);
4269 /* Prevent generation of insn to load the value
4270 because the one we found already has the value. */
4272 rld[i].in = rld[i].reg_rtx;
4276 /* If we detected error and replaced asm instruction by USE, forget about the
4278 if (GET_CODE (PATTERN (insn)) == USE
4279 && CONST_INT_P (XEXP (PATTERN (insn), 0)))
4282 /* Perhaps an output reload can be combined with another
4283 to reduce needs by one. */
4284 if (!goal_earlyclobber)
4287 /* If we have a pair of reloads for parts of an address, they are reloading
4288 the same object, the operands themselves were not reloaded, and they
4289 are for two operands that are supposed to match, merge the reloads and
4290 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4292 for (i = 0; i < n_reloads; i++)
4296 for (j = i + 1; j < n_reloads; j++)
4297 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4298 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4299 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4300 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4301 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4302 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4303 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4304 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4305 && rtx_equal_p (rld[i].in, rld[j].in)
4306 && (operand_reloadnum[rld[i].opnum] < 0
4307 || rld[operand_reloadnum[rld[i].opnum]].optional)
4308 && (operand_reloadnum[rld[j].opnum] < 0
4309 || rld[operand_reloadnum[rld[j].opnum]].optional)
4310 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4311 || (goal_alternative_matches[rld[j].opnum]
4314 for (k = 0; k < n_replacements; k++)
4315 if (replacements[k].what == j)
4316 replacements[k].what = i;
4318 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4319 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4320 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4322 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4327 /* Scan all the reloads and update their type.
4328 If a reload is for the address of an operand and we didn't reload
4329 that operand, change the type. Similarly, change the operand number
4330 of a reload when two operands match. If a reload is optional, treat it
4331 as though the operand isn't reloaded.
4333 ??? This latter case is somewhat odd because if we do the optional
4334 reload, it means the object is hanging around. Thus we need only
4335 do the address reload if the optional reload was NOT done.
4337 Change secondary reloads to be the address type of their operand, not
4340 If an operand's reload is now RELOAD_OTHER, change any
4341 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4342 RELOAD_FOR_OTHER_ADDRESS. */
4344 for (i = 0; i < n_reloads; i++)
4346 if (rld[i].secondary_p
4347 && rld[i].when_needed == operand_type[rld[i].opnum])
4348 rld[i].when_needed = address_type[rld[i].opnum];
4350 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4351 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4352 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4353 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4354 && (operand_reloadnum[rld[i].opnum] < 0
4355 || rld[operand_reloadnum[rld[i].opnum]].optional))
4357 /* If we have a secondary reload to go along with this reload,
4358 change its type to RELOAD_FOR_OPADDR_ADDR. */
4360 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4361 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4362 && rld[i].secondary_in_reload != -1)
4364 int secondary_in_reload = rld[i].secondary_in_reload;
4366 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4368 /* If there's a tertiary reload we have to change it also. */
4369 if (secondary_in_reload > 0
4370 && rld[secondary_in_reload].secondary_in_reload != -1)
4371 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4372 = RELOAD_FOR_OPADDR_ADDR;
4375 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4376 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4377 && rld[i].secondary_out_reload != -1)
4379 int secondary_out_reload = rld[i].secondary_out_reload;
4381 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4383 /* If there's a tertiary reload we have to change it also. */
4384 if (secondary_out_reload
4385 && rld[secondary_out_reload].secondary_out_reload != -1)
4386 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4387 = RELOAD_FOR_OPADDR_ADDR;
4390 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4391 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4392 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4394 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4397 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4398 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4399 && operand_reloadnum[rld[i].opnum] >= 0
4400 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4402 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4404 if (goal_alternative_matches[rld[i].opnum] >= 0)
4405 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4408 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4409 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4410 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4412 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4413 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4414 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4415 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4416 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4417 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4418 This is complicated by the fact that a single operand can have more
4419 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4420 choose_reload_regs without affecting code quality, and cases that
4421 actually fail are extremely rare, so it turns out to be better to fix
4422 the problem here by not generating cases that choose_reload_regs will
4424 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4425 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4427 We can reduce the register pressure by exploiting that a
4428 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4429 does not conflict with any of them, if it is only used for the first of
4430 the RELOAD_FOR_X_ADDRESS reloads. */
4432 int first_op_addr_num = -2;
4433 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4434 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4435 int need_change = 0;
4436 /* We use last_op_addr_reload and the contents of the above arrays
4437 first as flags - -2 means no instance encountered, -1 means exactly
4438 one instance encountered.
4439 If more than one instance has been encountered, we store the reload
4440 number of the first reload of the kind in question; reload numbers
4441 are known to be non-negative. */
4442 for (i = 0; i < noperands; i++)
4443 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4444 for (i = n_reloads - 1; i >= 0; i--)
4446 switch (rld[i].when_needed)
4448 case RELOAD_FOR_OPERAND_ADDRESS:
4449 if (++first_op_addr_num >= 0)
4451 first_op_addr_num = i;
4455 case RELOAD_FOR_INPUT_ADDRESS:
4456 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4458 first_inpaddr_num[rld[i].opnum] = i;
4462 case RELOAD_FOR_OUTPUT_ADDRESS:
4463 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4465 first_outpaddr_num[rld[i].opnum] = i;
4476 for (i = 0; i < n_reloads; i++)
4479 enum reload_type type;
4481 switch (rld[i].when_needed)
4483 case RELOAD_FOR_OPADDR_ADDR:
4484 first_num = first_op_addr_num;
4485 type = RELOAD_FOR_OPERAND_ADDRESS;
4487 case RELOAD_FOR_INPADDR_ADDRESS:
4488 first_num = first_inpaddr_num[rld[i].opnum];
4489 type = RELOAD_FOR_INPUT_ADDRESS;
4491 case RELOAD_FOR_OUTADDR_ADDRESS:
4492 first_num = first_outpaddr_num[rld[i].opnum];
4493 type = RELOAD_FOR_OUTPUT_ADDRESS;
4500 else if (i > first_num)
4501 rld[i].when_needed = type;
4504 /* Check if the only TYPE reload that uses reload I is
4505 reload FIRST_NUM. */
4506 for (j = n_reloads - 1; j > first_num; j--)
4508 if (rld[j].when_needed == type
4509 && (rld[i].secondary_p
4510 ? rld[j].secondary_in_reload == i
4511 : reg_mentioned_p (rld[i].in, rld[j].in)))
4513 rld[i].when_needed = type;
4522 /* See if we have any reloads that are now allowed to be merged
4523 because we've changed when the reload is needed to
4524 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4525 check for the most common cases. */
4527 for (i = 0; i < n_reloads; i++)
4528 if (rld[i].in != 0 && rld[i].out == 0
4529 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4530 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4531 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4532 for (j = 0; j < n_reloads; j++)
4533 if (i != j && rld[j].in != 0 && rld[j].out == 0
4534 && rld[j].when_needed == rld[i].when_needed
4535 && MATCHES (rld[i].in, rld[j].in)
4536 && rld[i].rclass == rld[j].rclass
4537 && !rld[i].nocombine && !rld[j].nocombine
4538 && rld[i].reg_rtx == rld[j].reg_rtx)
4540 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4541 transfer_replacements (i, j);
4546 /* If we made any reloads for addresses, see if they violate a
4547 "no input reloads" requirement for this insn. But loads that we
4548 do after the insn (such as for output addresses) are fine. */
4549 if (no_input_reloads)
4550 for (i = 0; i < n_reloads; i++)
4551 gcc_assert (rld[i].in == 0
4552 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS
4553 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS);
4556 /* Compute reload_mode and reload_nregs. */
4557 for (i = 0; i < n_reloads; i++)
4560 = (rld[i].inmode == VOIDmode
4561 || (GET_MODE_SIZE (rld[i].outmode)
4562 > GET_MODE_SIZE (rld[i].inmode)))
4563 ? rld[i].outmode : rld[i].inmode;
4565 rld[i].nregs = CLASS_MAX_NREGS (rld[i].rclass, rld[i].mode);
4568 /* Special case a simple move with an input reload and a
4569 destination of a hard reg, if the hard reg is ok, use it. */
4570 for (i = 0; i < n_reloads; i++)
4571 if (rld[i].when_needed == RELOAD_FOR_INPUT
4572 && GET_CODE (PATTERN (insn)) == SET
4573 && REG_P (SET_DEST (PATTERN (insn)))
4574 && (SET_SRC (PATTERN (insn)) == rld[i].in
4575 || SET_SRC (PATTERN (insn)) == rld[i].in_reg)
4576 && !elimination_target_reg_p (SET_DEST (PATTERN (insn))))
4578 rtx dest = SET_DEST (PATTERN (insn));
4579 unsigned int regno = REGNO (dest);
4581 if (regno < FIRST_PSEUDO_REGISTER
4582 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno)
4583 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4585 int nr = hard_regno_nregs[regno][rld[i].mode];
4588 for (nri = 1; nri < nr; nri ++)
4589 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno + nri))
4593 rld[i].reg_rtx = dest;
4600 /* Return true if alternative number ALTNUM in constraint-string
4601 CONSTRAINT is guaranteed to accept a reloaded constant-pool reference.
4602 MEM gives the reference if it didn't need any reloads, otherwise it
4606 alternative_allows_const_pool_ref (rtx mem ATTRIBUTE_UNUSED,
4607 const char *constraint, int altnum)
4611 /* Skip alternatives before the one requested. */
4614 while (*constraint++ != ',');
4617 /* Scan the requested alternative for TARGET_MEM_CONSTRAINT or 'o'.
4618 If one of them is present, this alternative accepts the result of
4619 passing a constant-pool reference through find_reloads_toplev.
4621 The same is true of extra memory constraints if the address
4622 was reloaded into a register. However, the target may elect
4623 to disallow the original constant address, forcing it to be
4624 reloaded into a register instead. */
4625 for (; (c = *constraint) && c != ',' && c != '#';
4626 constraint += CONSTRAINT_LEN (c, constraint))
4628 if (c == TARGET_MEM_CONSTRAINT || c == 'o')
4630 #ifdef EXTRA_CONSTRAINT_STR
4631 if (EXTRA_MEMORY_CONSTRAINT (c, constraint)
4632 && (mem == NULL || EXTRA_CONSTRAINT_STR (mem, c, constraint)))
4639 /* Scan X for memory references and scan the addresses for reloading.
4640 Also checks for references to "constant" regs that we want to eliminate
4641 and replaces them with the values they stand for.
4642 We may alter X destructively if it contains a reference to such.
4643 If X is just a constant reg, we return the equivalent value
4646 IND_LEVELS says how many levels of indirect addressing this machine
4649 OPNUM and TYPE identify the purpose of the reload.
4651 IS_SET_DEST is true if X is the destination of a SET, which is not
4652 appropriate to be replaced by a constant.
4654 INSN, if nonzero, is the insn in which we do the reload. It is used
4655 to determine if we may generate output reloads, and where to put USEs
4656 for pseudos that we have to replace with stack slots.
4658 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4659 result of find_reloads_address. */
4662 find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4663 int ind_levels, int is_set_dest, rtx insn,
4664 int *address_reloaded)
4666 RTX_CODE code = GET_CODE (x);
4668 const char *fmt = GET_RTX_FORMAT (code);
4674 /* This code is duplicated for speed in find_reloads. */
4675 int regno = REGNO (x);
4676 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4677 x = reg_equiv_constant[regno];
4679 /* This creates (subreg (mem...)) which would cause an unnecessary
4680 reload of the mem. */
4681 else if (reg_equiv_mem[regno] != 0)
4682 x = reg_equiv_mem[regno];
4684 else if (reg_equiv_memory_loc[regno]
4685 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4687 rtx mem = make_memloc (x, regno);
4688 if (reg_equiv_address[regno]
4689 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4691 /* If this is not a toplevel operand, find_reloads doesn't see
4692 this substitution. We have to emit a USE of the pseudo so
4693 that delete_output_reload can see it. */
4694 if (replace_reloads && recog_data.operand[opnum] != x)
4695 /* We mark the USE with QImode so that we recognize it
4696 as one that can be safely deleted at the end of
4698 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4701 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4702 opnum, type, ind_levels, insn);
4703 if (!rtx_equal_p (x, mem))
4704 push_reg_equiv_alt_mem (regno, x);
4705 if (address_reloaded)
4706 *address_reloaded = i;
4715 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4716 opnum, type, ind_levels, insn);
4717 if (address_reloaded)
4718 *address_reloaded = i;
4723 if (code == SUBREG && REG_P (SUBREG_REG (x)))
4725 /* Check for SUBREG containing a REG that's equivalent to a
4726 constant. If the constant has a known value, truncate it
4727 right now. Similarly if we are extracting a single-word of a
4728 multi-word constant. If the constant is symbolic, allow it
4729 to be substituted normally. push_reload will strip the
4730 subreg later. The constant must not be VOIDmode, because we
4731 will lose the mode of the register (this should never happen
4732 because one of the cases above should handle it). */
4734 int regno = REGNO (SUBREG_REG (x));
4737 if (regno >= FIRST_PSEUDO_REGISTER
4738 && reg_renumber[regno] < 0
4739 && reg_equiv_constant[regno] != 0)
4742 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4743 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4745 if (CONSTANT_P (tem) && !LEGITIMATE_CONSTANT_P (tem))
4747 tem = force_const_mem (GET_MODE (x), tem);
4748 i = find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4749 &XEXP (tem, 0), opnum, type,
4751 if (address_reloaded)
4752 *address_reloaded = i;
4757 /* If the subreg contains a reg that will be converted to a mem,
4758 convert the subreg to a narrower memref now.
4759 Otherwise, we would get (subreg (mem ...) ...),
4760 which would force reload of the mem.
4762 We also need to do this if there is an equivalent MEM that is
4763 not offsettable. In that case, alter_subreg would produce an
4764 invalid address on big-endian machines.
4766 For machines that extend byte loads, we must not reload using
4767 a wider mode if we have a paradoxical SUBREG. find_reloads will
4768 force a reload in that case. So we should not do anything here. */
4770 if (regno >= FIRST_PSEUDO_REGISTER
4771 #ifdef LOAD_EXTEND_OP
4772 && (GET_MODE_SIZE (GET_MODE (x))
4773 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4775 && (reg_equiv_address[regno] != 0
4776 || (reg_equiv_mem[regno] != 0
4777 && (! strict_memory_address_addr_space_p
4778 (GET_MODE (x), XEXP (reg_equiv_mem[regno], 0),
4779 MEM_ADDR_SPACE (reg_equiv_mem[regno]))
4780 || ! offsettable_memref_p (reg_equiv_mem[regno])
4781 || num_not_at_initial_offset))))
4782 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4786 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4790 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4791 ind_levels, is_set_dest, insn,
4793 /* If we have replaced a reg with it's equivalent memory loc -
4794 that can still be handled here e.g. if it's in a paradoxical
4795 subreg - we must make the change in a copy, rather than using
4796 a destructive change. This way, find_reloads can still elect
4797 not to do the change. */
4798 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4800 x = shallow_copy_rtx (x);
4803 XEXP (x, i) = new_part;
4809 /* Return a mem ref for the memory equivalent of reg REGNO.
4810 This mem ref is not shared with anything. */
4813 make_memloc (rtx ad, int regno)
4815 /* We must rerun eliminate_regs, in case the elimination
4816 offsets have changed. */
4818 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], VOIDmode, NULL_RTX),
4821 /* If TEM might contain a pseudo, we must copy it to avoid
4822 modifying it when we do the substitution for the reload. */
4823 if (rtx_varies_p (tem, 0))
4824 tem = copy_rtx (tem);
4826 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4827 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4829 /* Copy the result if it's still the same as the equivalence, to avoid
4830 modifying it when we do the substitution for the reload. */
4831 if (tem == reg_equiv_memory_loc[regno])
4832 tem = copy_rtx (tem);
4836 /* Returns true if AD could be turned into a valid memory reference
4837 to mode MODE in address space AS by reloading the part pointed to
4838 by PART into a register. */
4841 maybe_memory_address_addr_space_p (enum machine_mode mode, rtx ad,
4842 addr_space_t as, rtx *part)
4846 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4849 retv = memory_address_addr_space_p (mode, ad, as);
4855 /* Record all reloads needed for handling memory address AD
4856 which appears in *LOC in a memory reference to mode MODE
4857 which itself is found in location *MEMREFLOC.
4858 Note that we take shortcuts assuming that no multi-reg machine mode
4859 occurs as part of an address.
4861 OPNUM and TYPE specify the purpose of this reload.
4863 IND_LEVELS says how many levels of indirect addressing this machine
4866 INSN, if nonzero, is the insn in which we do the reload. It is used
4867 to determine if we may generate output reloads, and where to put USEs
4868 for pseudos that we have to replace with stack slots.
4870 Value is one if this address is reloaded or replaced as a whole; it is
4871 zero if the top level of this address was not reloaded or replaced, and
4872 it is -1 if it may or may not have been reloaded or replaced.
4874 Note that there is no verification that the address will be valid after
4875 this routine does its work. Instead, we rely on the fact that the address
4876 was valid when reload started. So we need only undo things that reload
4877 could have broken. These are wrong register types, pseudos not allocated
4878 to a hard register, and frame pointer elimination. */
4881 find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4882 rtx *loc, int opnum, enum reload_type type,
4883 int ind_levels, rtx insn)
4885 addr_space_t as = memrefloc? MEM_ADDR_SPACE (*memrefloc)
4886 : ADDR_SPACE_GENERIC;
4888 int removed_and = 0;
4892 /* If the address is a register, see if it is a legitimate address and
4893 reload if not. We first handle the cases where we need not reload
4894 or where we must reload in a non-standard way. */
4900 if (reg_equiv_constant[regno] != 0)
4902 find_reloads_address_part (reg_equiv_constant[regno], loc,
4903 base_reg_class (mode, MEM, SCRATCH),
4904 GET_MODE (ad), opnum, type, ind_levels);
4908 tem = reg_equiv_memory_loc[regno];
4911 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4913 tem = make_memloc (ad, regno);
4914 if (! strict_memory_address_addr_space_p (GET_MODE (tem),
4916 MEM_ADDR_SPACE (tem)))
4920 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4921 &XEXP (tem, 0), opnum,
4922 ADDR_TYPE (type), ind_levels, insn);
4923 if (!rtx_equal_p (tem, orig))
4924 push_reg_equiv_alt_mem (regno, tem);
4926 /* We can avoid a reload if the register's equivalent memory
4927 expression is valid as an indirect memory address.
4928 But not all addresses are valid in a mem used as an indirect
4929 address: only reg or reg+constant. */
4932 && strict_memory_address_addr_space_p (mode, tem, as)
4933 && (REG_P (XEXP (tem, 0))
4934 || (GET_CODE (XEXP (tem, 0)) == PLUS
4935 && REG_P (XEXP (XEXP (tem, 0), 0))
4936 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4938 /* TEM is not the same as what we'll be replacing the
4939 pseudo with after reload, put a USE in front of INSN
4940 in the final reload pass. */
4942 && num_not_at_initial_offset
4943 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4946 /* We mark the USE with QImode so that we
4947 recognize it as one that can be safely
4948 deleted at the end of reload. */
4949 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4952 /* This doesn't really count as replacing the address
4953 as a whole, since it is still a memory access. */
4961 /* The only remaining case where we can avoid a reload is if this is a
4962 hard register that is valid as a base register and which is not the
4963 subject of a CLOBBER in this insn. */
4965 else if (regno < FIRST_PSEUDO_REGISTER
4966 && regno_ok_for_base_p (regno, mode, MEM, SCRATCH)
4967 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4970 /* If we do not have one of the cases above, we must do the reload. */
4971 push_reload (ad, NULL_RTX, loc, (rtx*) 0, base_reg_class (mode, MEM, SCRATCH),
4972 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4976 if (strict_memory_address_addr_space_p (mode, ad, as))
4978 /* The address appears valid, so reloads are not needed.
4979 But the address may contain an eliminable register.
4980 This can happen because a machine with indirect addressing
4981 may consider a pseudo register by itself a valid address even when
4982 it has failed to get a hard reg.
4983 So do a tree-walk to find and eliminate all such regs. */
4985 /* But first quickly dispose of a common case. */
4986 if (GET_CODE (ad) == PLUS
4987 && CONST_INT_P (XEXP (ad, 1))
4988 && REG_P (XEXP (ad, 0))
4989 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4992 subst_reg_equivs_changed = 0;
4993 *loc = subst_reg_equivs (ad, insn);
4995 if (! subst_reg_equivs_changed)
4998 /* Check result for validity after substitution. */
4999 if (strict_memory_address_addr_space_p (mode, ad, as))
5003 #ifdef LEGITIMIZE_RELOAD_ADDRESS
5006 if (memrefloc && ADDR_SPACE_GENERIC_P (as))
5008 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
5013 *memrefloc = copy_rtx (*memrefloc);
5014 XEXP (*memrefloc, 0) = ad;
5015 move_replacements (&ad, &XEXP (*memrefloc, 0));
5021 /* The address is not valid. We have to figure out why. First see if
5022 we have an outer AND and remove it if so. Then analyze what's inside. */
5024 if (GET_CODE (ad) == AND)
5027 loc = &XEXP (ad, 0);
5031 /* One possibility for why the address is invalid is that it is itself
5032 a MEM. This can happen when the frame pointer is being eliminated, a
5033 pseudo is not allocated to a hard register, and the offset between the
5034 frame and stack pointers is not its initial value. In that case the
5035 pseudo will have been replaced by a MEM referring to the
5039 /* First ensure that the address in this MEM is valid. Then, unless
5040 indirect addresses are valid, reload the MEM into a register. */
5042 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
5043 opnum, ADDR_TYPE (type),
5044 ind_levels == 0 ? 0 : ind_levels - 1, insn);
5046 /* If tem was changed, then we must create a new memory reference to
5047 hold it and store it back into memrefloc. */
5048 if (tem != ad && memrefloc)
5050 *memrefloc = copy_rtx (*memrefloc);
5051 copy_replacements (tem, XEXP (*memrefloc, 0));
5052 loc = &XEXP (*memrefloc, 0);
5054 loc = &XEXP (*loc, 0);
5057 /* Check similar cases as for indirect addresses as above except
5058 that we can allow pseudos and a MEM since they should have been
5059 taken care of above. */
5062 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
5063 || MEM_P (XEXP (tem, 0))
5064 || ! (REG_P (XEXP (tem, 0))
5065 || (GET_CODE (XEXP (tem, 0)) == PLUS
5066 && REG_P (XEXP (XEXP (tem, 0), 0))
5067 && CONST_INT_P (XEXP (XEXP (tem, 0), 1)))))
5069 /* Must use TEM here, not AD, since it is the one that will
5070 have any subexpressions reloaded, if needed. */
5071 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
5072 base_reg_class (mode, MEM, SCRATCH), GET_MODE (tem),
5075 return ! removed_and;
5081 /* If we have address of a stack slot but it's not valid because the
5082 displacement is too large, compute the sum in a register.
5083 Handle all base registers here, not just fp/ap/sp, because on some
5084 targets (namely SH) we can also get too large displacements from
5085 big-endian corrections. */
5086 else if (GET_CODE (ad) == PLUS
5087 && REG_P (XEXP (ad, 0))
5088 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
5089 && CONST_INT_P (XEXP (ad, 1))
5090 && regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode, PLUS,
5094 /* Unshare the MEM rtx so we can safely alter it. */
5097 *memrefloc = copy_rtx (*memrefloc);
5098 loc = &XEXP (*memrefloc, 0);
5100 loc = &XEXP (*loc, 0);
5103 if (double_reg_address_ok)
5105 /* Unshare the sum as well. */
5106 *loc = ad = copy_rtx (ad);
5108 /* Reload the displacement into an index reg.
5109 We assume the frame pointer or arg pointer is a base reg. */
5110 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
5111 INDEX_REG_CLASS, GET_MODE (ad), opnum,
5117 /* If the sum of two regs is not necessarily valid,
5118 reload the sum into a base reg.
5119 That will at least work. */
5120 find_reloads_address_part (ad, loc,
5121 base_reg_class (mode, MEM, SCRATCH),
5122 GET_MODE (ad), opnum, type, ind_levels);
5124 return ! removed_and;
5127 /* If we have an indexed stack slot, there are three possible reasons why
5128 it might be invalid: The index might need to be reloaded, the address
5129 might have been made by frame pointer elimination and hence have a
5130 constant out of range, or both reasons might apply.
5132 We can easily check for an index needing reload, but even if that is the
5133 case, we might also have an invalid constant. To avoid making the
5134 conservative assumption and requiring two reloads, we see if this address
5135 is valid when not interpreted strictly. If it is, the only problem is
5136 that the index needs a reload and find_reloads_address_1 will take care
5139 Handle all base registers here, not just fp/ap/sp, because on some
5140 targets (namely SPARC) we can also get invalid addresses from preventive
5141 subreg big-endian corrections made by find_reloads_toplev. We
5142 can also get expressions involving LO_SUM (rather than PLUS) from
5143 find_reloads_subreg_address.
5145 If we decide to do something, it must be that `double_reg_address_ok'
5146 is true. We generate a reload of the base register + constant and
5147 rework the sum so that the reload register will be added to the index.
5148 This is safe because we know the address isn't shared.
5150 We check for the base register as both the first and second operand of
5151 the innermost PLUS and/or LO_SUM. */
5153 for (op_index = 0; op_index < 2; ++op_index)
5155 rtx operand, addend;
5156 enum rtx_code inner_code;
5158 if (GET_CODE (ad) != PLUS)
5161 inner_code = GET_CODE (XEXP (ad, 0));
5162 if (!(GET_CODE (ad) == PLUS
5163 && CONST_INT_P (XEXP (ad, 1))
5164 && (inner_code == PLUS || inner_code == LO_SUM)))
5167 operand = XEXP (XEXP (ad, 0), op_index);
5168 if (!REG_P (operand) || REGNO (operand) >= FIRST_PSEUDO_REGISTER)
5171 addend = XEXP (XEXP (ad, 0), 1 - op_index);
5173 if ((regno_ok_for_base_p (REGNO (operand), mode, inner_code,
5175 || operand == frame_pointer_rtx
5176 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
5177 || operand == hard_frame_pointer_rtx
5179 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5180 || operand == arg_pointer_rtx
5182 || operand == stack_pointer_rtx)
5183 && ! maybe_memory_address_addr_space_p
5184 (mode, ad, as, &XEXP (XEXP (ad, 0), 1 - op_index)))
5189 offset_reg = plus_constant (operand, INTVAL (XEXP (ad, 1)));
5191 /* Form the adjusted address. */
5192 if (GET_CODE (XEXP (ad, 0)) == PLUS)
5193 ad = gen_rtx_PLUS (GET_MODE (ad),
5194 op_index == 0 ? offset_reg : addend,
5195 op_index == 0 ? addend : offset_reg);
5197 ad = gen_rtx_LO_SUM (GET_MODE (ad),
5198 op_index == 0 ? offset_reg : addend,
5199 op_index == 0 ? addend : offset_reg);
5202 cls = base_reg_class (mode, MEM, GET_CODE (addend));
5203 find_reloads_address_part (XEXP (ad, op_index),
5204 &XEXP (ad, op_index), cls,
5205 GET_MODE (ad), opnum, type, ind_levels);
5206 find_reloads_address_1 (mode,
5207 XEXP (ad, 1 - op_index), 1, GET_CODE (ad),
5208 GET_CODE (XEXP (ad, op_index)),
5209 &XEXP (ad, 1 - op_index), opnum,
5216 /* See if address becomes valid when an eliminable register
5217 in a sum is replaced. */
5220 if (GET_CODE (ad) == PLUS)
5221 tem = subst_indexed_address (ad);
5222 if (tem != ad && strict_memory_address_addr_space_p (mode, tem, as))
5224 /* Ok, we win that way. Replace any additional eliminable
5227 subst_reg_equivs_changed = 0;
5228 tem = subst_reg_equivs (tem, insn);
5230 /* Make sure that didn't make the address invalid again. */
5232 if (! subst_reg_equivs_changed
5233 || strict_memory_address_addr_space_p (mode, tem, as))
5240 /* If constants aren't valid addresses, reload the constant address
5242 if (CONSTANT_P (ad) && ! strict_memory_address_addr_space_p (mode, ad, as))
5244 enum machine_mode address_mode = GET_MODE (ad);
5245 if (address_mode == VOIDmode)
5246 address_mode = targetm.addr_space.address_mode (as);
5248 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5249 Unshare it so we can safely alter it. */
5250 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
5251 && CONSTANT_POOL_ADDRESS_P (ad))
5253 *memrefloc = copy_rtx (*memrefloc);
5254 loc = &XEXP (*memrefloc, 0);
5256 loc = &XEXP (*loc, 0);
5259 find_reloads_address_part (ad, loc, base_reg_class (mode, MEM, SCRATCH),
5260 address_mode, opnum, type, ind_levels);
5261 return ! removed_and;
5264 return find_reloads_address_1 (mode, ad, 0, MEM, SCRATCH, loc, opnum, type,
5268 /* Find all pseudo regs appearing in AD
5269 that are eliminable in favor of equivalent values
5270 and do not have hard regs; replace them by their equivalents.
5271 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5272 front of it for pseudos that we have to replace with stack slots. */
5275 subst_reg_equivs (rtx ad, rtx insn)
5277 RTX_CODE code = GET_CODE (ad);
5297 int regno = REGNO (ad);
5299 if (reg_equiv_constant[regno] != 0)
5301 subst_reg_equivs_changed = 1;
5302 return reg_equiv_constant[regno];
5304 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5306 rtx mem = make_memloc (ad, regno);
5307 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5309 subst_reg_equivs_changed = 1;
5310 /* We mark the USE with QImode so that we recognize it
5311 as one that can be safely deleted at the end of
5313 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5322 /* Quickly dispose of a common case. */
5323 if (XEXP (ad, 0) == frame_pointer_rtx
5324 && CONST_INT_P (XEXP (ad, 1)))
5332 fmt = GET_RTX_FORMAT (code);
5333 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5335 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5339 /* Compute the sum of X and Y, making canonicalizations assumed in an
5340 address, namely: sum constant integers, surround the sum of two
5341 constants with a CONST, put the constant as the second operand, and
5342 group the constant on the outermost sum.
5344 This routine assumes both inputs are already in canonical form. */
5347 form_sum (enum machine_mode mode, rtx x, rtx y)
5351 gcc_assert (GET_MODE (x) == mode || GET_MODE (x) == VOIDmode);
5352 gcc_assert (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode);
5354 if (CONST_INT_P (x))
5355 return plus_constant (y, INTVAL (x));
5356 else if (CONST_INT_P (y))
5357 return plus_constant (x, INTVAL (y));
5358 else if (CONSTANT_P (x))
5359 tem = x, x = y, y = tem;
5361 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5362 return form_sum (mode, XEXP (x, 0), form_sum (mode, XEXP (x, 1), y));
5364 /* Note that if the operands of Y are specified in the opposite
5365 order in the recursive calls below, infinite recursion will occur. */
5366 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5367 return form_sum (mode, form_sum (mode, x, XEXP (y, 0)), XEXP (y, 1));
5369 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5370 constant will have been placed second. */
5371 if (CONSTANT_P (x) && CONSTANT_P (y))
5373 if (GET_CODE (x) == CONST)
5375 if (GET_CODE (y) == CONST)
5378 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5381 return gen_rtx_PLUS (mode, x, y);
5384 /* If ADDR is a sum containing a pseudo register that should be
5385 replaced with a constant (from reg_equiv_constant),
5386 return the result of doing so, and also apply the associative
5387 law so that the result is more likely to be a valid address.
5388 (But it is not guaranteed to be one.)
5390 Note that at most one register is replaced, even if more are
5391 replaceable. Also, we try to put the result into a canonical form
5392 so it is more likely to be a valid address.
5394 In all other cases, return ADDR. */
5397 subst_indexed_address (rtx addr)
5399 rtx op0 = 0, op1 = 0, op2 = 0;
5403 if (GET_CODE (addr) == PLUS)
5405 /* Try to find a register to replace. */
5406 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5408 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5409 && reg_renumber[regno] < 0
5410 && reg_equiv_constant[regno] != 0)
5411 op0 = reg_equiv_constant[regno];
5412 else if (REG_P (op1)
5413 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5414 && reg_renumber[regno] < 0
5415 && reg_equiv_constant[regno] != 0)
5416 op1 = reg_equiv_constant[regno];
5417 else if (GET_CODE (op0) == PLUS
5418 && (tem = subst_indexed_address (op0)) != op0)
5420 else if (GET_CODE (op1) == PLUS
5421 && (tem = subst_indexed_address (op1)) != op1)
5426 /* Pick out up to three things to add. */
5427 if (GET_CODE (op1) == PLUS)
5428 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5429 else if (GET_CODE (op0) == PLUS)
5430 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5432 /* Compute the sum. */
5434 op1 = form_sum (GET_MODE (addr), op1, op2);
5436 op0 = form_sum (GET_MODE (addr), op0, op1);
5443 /* Update the REG_INC notes for an insn. It updates all REG_INC
5444 notes for the instruction which refer to REGNO the to refer
5445 to the reload number.
5447 INSN is the insn for which any REG_INC notes need updating.
5449 REGNO is the register number which has been reloaded.
5451 RELOADNUM is the reload number. */
5454 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5455 int reloadnum ATTRIBUTE_UNUSED)
5460 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5461 if (REG_NOTE_KIND (link) == REG_INC
5462 && (int) REGNO (XEXP (link, 0)) == regno)
5463 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5467 /* Record the pseudo registers we must reload into hard registers in a
5468 subexpression of a would-be memory address, X referring to a value
5469 in mode MODE. (This function is not called if the address we find
5472 CONTEXT = 1 means we are considering regs as index regs,
5473 = 0 means we are considering them as base regs.
5474 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5476 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5477 is the code of the index part of the address. Otherwise, pass SCRATCH
5479 OPNUM and TYPE specify the purpose of any reloads made.
5481 IND_LEVELS says how many levels of indirect addressing are
5482 supported at this point in the address.
5484 INSN, if nonzero, is the insn in which we do the reload. It is used
5485 to determine if we may generate output reloads.
5487 We return nonzero if X, as a whole, is reloaded or replaced. */
5489 /* Note that we take shortcuts assuming that no multi-reg machine mode
5490 occurs as part of an address.
5491 Also, this is not fully machine-customizable; it works for machines
5492 such as VAXen and 68000's and 32000's, but other possible machines
5493 could have addressing modes that this does not handle right.
5494 If you add push_reload calls here, you need to make sure gen_reload
5495 handles those cases gracefully. */
5498 find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
5499 enum rtx_code outer_code, enum rtx_code index_code,
5500 rtx *loc, int opnum, enum reload_type type,
5501 int ind_levels, rtx insn)
5503 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, OUTER, INDEX) \
5505 ? regno_ok_for_base_p (REGNO, MODE, OUTER, INDEX) \
5506 : REGNO_OK_FOR_INDEX_P (REGNO))
5508 enum reg_class context_reg_class;
5509 RTX_CODE code = GET_CODE (x);
5512 context_reg_class = INDEX_REG_CLASS;
5514 context_reg_class = base_reg_class (mode, outer_code, index_code);
5520 rtx orig_op0 = XEXP (x, 0);
5521 rtx orig_op1 = XEXP (x, 1);
5522 RTX_CODE code0 = GET_CODE (orig_op0);
5523 RTX_CODE code1 = GET_CODE (orig_op1);
5527 if (GET_CODE (op0) == SUBREG)
5529 op0 = SUBREG_REG (op0);
5530 code0 = GET_CODE (op0);
5531 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5532 op0 = gen_rtx_REG (word_mode,
5534 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5535 GET_MODE (SUBREG_REG (orig_op0)),
5536 SUBREG_BYTE (orig_op0),
5537 GET_MODE (orig_op0))));
5540 if (GET_CODE (op1) == SUBREG)
5542 op1 = SUBREG_REG (op1);
5543 code1 = GET_CODE (op1);
5544 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5545 /* ??? Why is this given op1's mode and above for
5546 ??? op0 SUBREGs we use word_mode? */
5547 op1 = gen_rtx_REG (GET_MODE (op1),
5549 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5550 GET_MODE (SUBREG_REG (orig_op1)),
5551 SUBREG_BYTE (orig_op1),
5552 GET_MODE (orig_op1))));
5554 /* Plus in the index register may be created only as a result of
5555 register rematerialization for expression like &localvar*4. Reload it.
5556 It may be possible to combine the displacement on the outer level,
5557 but it is probably not worthwhile to do so. */
5560 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5561 opnum, ADDR_TYPE (type), ind_levels, insn);
5562 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5564 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5568 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5569 || code0 == ZERO_EXTEND || code1 == MEM)
5571 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5572 &XEXP (x, 0), opnum, type, ind_levels,
5574 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5575 &XEXP (x, 1), opnum, type, ind_levels,
5579 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5580 || code1 == ZERO_EXTEND || code0 == MEM)
5582 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5583 &XEXP (x, 0), opnum, type, ind_levels,
5585 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5586 &XEXP (x, 1), opnum, type, ind_levels,
5590 else if (code0 == CONST_INT || code0 == CONST
5591 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5592 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5593 &XEXP (x, 1), opnum, type, ind_levels,
5596 else if (code1 == CONST_INT || code1 == CONST
5597 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5598 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5599 &XEXP (x, 0), opnum, type, ind_levels,
5602 else if (code0 == REG && code1 == REG)
5604 if (REGNO_OK_FOR_INDEX_P (REGNO (op1))
5605 && regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5607 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0))
5608 && regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5610 else if (regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5611 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5612 &XEXP (x, 1), opnum, type, ind_levels,
5614 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1)))
5615 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5616 &XEXP (x, 0), opnum, type, ind_levels,
5618 else if (regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5619 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5620 &XEXP (x, 0), opnum, type, ind_levels,
5622 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0)))
5623 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5624 &XEXP (x, 1), opnum, type, ind_levels,
5628 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5629 &XEXP (x, 0), opnum, type, ind_levels,
5631 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5632 &XEXP (x, 1), opnum, type, ind_levels,
5637 else if (code0 == REG)
5639 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5640 &XEXP (x, 0), opnum, type, ind_levels,
5642 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5643 &XEXP (x, 1), opnum, type, ind_levels,
5647 else if (code1 == REG)
5649 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5650 &XEXP (x, 1), opnum, type, ind_levels,
5652 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5653 &XEXP (x, 0), opnum, type, ind_levels,
5663 rtx op0 = XEXP (x, 0);
5664 rtx op1 = XEXP (x, 1);
5665 enum rtx_code index_code;
5669 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5672 /* Currently, we only support {PRE,POST}_MODIFY constructs
5673 where a base register is {inc,dec}remented by the contents
5674 of another register or by a constant value. Thus, these
5675 operands must match. */
5676 gcc_assert (op0 == XEXP (op1, 0));
5678 /* Require index register (or constant). Let's just handle the
5679 register case in the meantime... If the target allows
5680 auto-modify by a constant then we could try replacing a pseudo
5681 register with its equivalent constant where applicable.
5683 We also handle the case where the register was eliminated
5684 resulting in a PLUS subexpression.
5686 If we later decide to reload the whole PRE_MODIFY or
5687 POST_MODIFY, inc_for_reload might clobber the reload register
5688 before reading the index. The index register might therefore
5689 need to live longer than a TYPE reload normally would, so be
5690 conservative and class it as RELOAD_OTHER. */
5691 if ((REG_P (XEXP (op1, 1))
5692 && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5693 || GET_CODE (XEXP (op1, 1)) == PLUS)
5694 find_reloads_address_1 (mode, XEXP (op1, 1), 1, code, SCRATCH,
5695 &XEXP (op1, 1), opnum, RELOAD_OTHER,
5698 gcc_assert (REG_P (XEXP (op1, 0)));
5700 regno = REGNO (XEXP (op1, 0));
5701 index_code = GET_CODE (XEXP (op1, 1));
5703 /* A register that is incremented cannot be constant! */
5704 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5705 || reg_equiv_constant[regno] == 0);
5707 /* Handle a register that is equivalent to a memory location
5708 which cannot be addressed directly. */
5709 if (reg_equiv_memory_loc[regno] != 0
5710 && (reg_equiv_address[regno] != 0
5711 || num_not_at_initial_offset))
5713 rtx tem = make_memloc (XEXP (x, 0), regno);
5715 if (reg_equiv_address[regno]
5716 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5720 /* First reload the memory location's address.
5721 We can't use ADDR_TYPE (type) here, because we need to
5722 write back the value after reading it, hence we actually
5723 need two registers. */
5724 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5725 &XEXP (tem, 0), opnum,
5729 if (!rtx_equal_p (tem, orig))
5730 push_reg_equiv_alt_mem (regno, tem);
5732 /* Then reload the memory location into a base
5734 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5736 base_reg_class (mode, code,
5738 GET_MODE (x), GET_MODE (x), 0,
5739 0, opnum, RELOAD_OTHER);
5741 update_auto_inc_notes (this_insn, regno, reloadnum);
5746 if (reg_renumber[regno] >= 0)
5747 regno = reg_renumber[regno];
5749 /* We require a base register here... */
5750 if (!regno_ok_for_base_p (regno, GET_MODE (x), code, index_code))
5752 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5753 &XEXP (op1, 0), &XEXP (x, 0),
5754 base_reg_class (mode, code, index_code),
5755 GET_MODE (x), GET_MODE (x), 0, 0,
5756 opnum, RELOAD_OTHER);
5758 update_auto_inc_notes (this_insn, regno, reloadnum);
5768 if (REG_P (XEXP (x, 0)))
5770 int regno = REGNO (XEXP (x, 0));
5774 /* A register that is incremented cannot be constant! */
5775 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5776 || reg_equiv_constant[regno] == 0);
5778 /* Handle a register that is equivalent to a memory location
5779 which cannot be addressed directly. */
5780 if (reg_equiv_memory_loc[regno] != 0
5781 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5783 rtx tem = make_memloc (XEXP (x, 0), regno);
5784 if (reg_equiv_address[regno]
5785 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5789 /* First reload the memory location's address.
5790 We can't use ADDR_TYPE (type) here, because we need to
5791 write back the value after reading it, hence we actually
5792 need two registers. */
5793 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5794 &XEXP (tem, 0), opnum, type,
5796 if (!rtx_equal_p (tem, orig))
5797 push_reg_equiv_alt_mem (regno, tem);
5798 /* Put this inside a new increment-expression. */
5799 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5800 /* Proceed to reload that, as if it contained a register. */
5804 /* If we have a hard register that is ok in this incdec context,
5805 don't make a reload. If the register isn't nice enough for
5806 autoincdec, we can reload it. But, if an autoincrement of a
5807 register that we here verified as playing nice, still outside
5808 isn't "valid", it must be that no autoincrement is "valid".
5809 If that is true and something made an autoincrement anyway,
5810 this must be a special context where one is allowed.
5811 (For example, a "push" instruction.)
5812 We can't improve this address, so leave it alone. */
5814 /* Otherwise, reload the autoincrement into a suitable hard reg
5815 and record how much to increment by. */
5817 if (reg_renumber[regno] >= 0)
5818 regno = reg_renumber[regno];
5819 if (regno >= FIRST_PSEUDO_REGISTER
5820 || !REG_OK_FOR_CONTEXT (context, regno, mode, code,
5825 /* If we can output the register afterwards, do so, this
5826 saves the extra update.
5827 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5828 CALL_INSN - and it does not set CC0.
5829 But don't do this if we cannot directly address the
5830 memory location, since this will make it harder to
5831 reuse address reloads, and increases register pressure.
5832 Also don't do this if we can probably update x directly. */
5833 rtx equiv = (MEM_P (XEXP (x, 0))
5835 : reg_equiv_mem[regno]);
5837 = (int) optab_handler (add_optab, GET_MODE (x))->insn_code;
5838 if (insn && NONJUMP_INSN_P (insn) && equiv
5839 && memory_operand (equiv, GET_MODE (equiv))
5841 && ! sets_cc0_p (PATTERN (insn))
5843 && ! (icode != CODE_FOR_nothing
5844 && ((*insn_data[icode].operand[0].predicate)
5845 (equiv, GET_MODE (x)))
5846 && ((*insn_data[icode].operand[1].predicate)
5847 (equiv, GET_MODE (x)))))
5849 /* We use the original pseudo for loc, so that
5850 emit_reload_insns() knows which pseudo this
5851 reload refers to and updates the pseudo rtx, not
5852 its equivalent memory location, as well as the
5853 corresponding entry in reg_last_reload_reg. */
5854 loc = &XEXP (x_orig, 0);
5857 = push_reload (x, x, loc, loc,
5859 GET_MODE (x), GET_MODE (x), 0, 0,
5860 opnum, RELOAD_OTHER);
5865 = push_reload (x, x, loc, (rtx*) 0,
5867 GET_MODE (x), GET_MODE (x), 0, 0,
5870 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5875 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5885 /* Look for parts to reload in the inner expression and reload them
5886 too, in addition to this operation. Reloading all inner parts in
5887 addition to this one shouldn't be necessary, but at this point,
5888 we don't know if we can possibly omit any part that *can* be
5889 reloaded. Targets that are better off reloading just either part
5890 (or perhaps even a different part of an outer expression), should
5891 define LEGITIMIZE_RELOAD_ADDRESS. */
5892 find_reloads_address_1 (GET_MODE (XEXP (x, 0)), XEXP (x, 0),
5893 context, code, SCRATCH, &XEXP (x, 0), opnum,
5894 type, ind_levels, insn);
5895 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5897 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5901 /* This is probably the result of a substitution, by eliminate_regs, of
5902 an equivalent address for a pseudo that was not allocated to a hard
5903 register. Verify that the specified address is valid and reload it
5906 Since we know we are going to reload this item, don't decrement for
5907 the indirection level.
5909 Note that this is actually conservative: it would be slightly more
5910 efficient to use the value of SPILL_INDIRECT_LEVELS from
5913 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5914 opnum, ADDR_TYPE (type), ind_levels, insn);
5915 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5917 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5922 int regno = REGNO (x);
5924 if (reg_equiv_constant[regno] != 0)
5926 find_reloads_address_part (reg_equiv_constant[regno], loc,
5928 GET_MODE (x), opnum, type, ind_levels);
5932 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5933 that feeds this insn. */
5934 if (reg_equiv_mem[regno] != 0)
5936 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5938 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5943 if (reg_equiv_memory_loc[regno]
5944 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5946 rtx tem = make_memloc (x, regno);
5947 if (reg_equiv_address[regno] != 0
5948 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5951 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5952 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5954 if (!rtx_equal_p (x, tem))
5955 push_reg_equiv_alt_mem (regno, x);
5959 if (reg_renumber[regno] >= 0)
5960 regno = reg_renumber[regno];
5962 if (regno >= FIRST_PSEUDO_REGISTER
5963 || !REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5966 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5968 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5972 /* If a register appearing in an address is the subject of a CLOBBER
5973 in this insn, reload it into some other register to be safe.
5974 The CLOBBER is supposed to make the register unavailable
5975 from before this insn to after it. */
5976 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5978 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5980 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5987 if (REG_P (SUBREG_REG (x)))
5989 /* If this is a SUBREG of a hard register and the resulting register
5990 is of the wrong class, reload the whole SUBREG. This avoids
5991 needless copies if SUBREG_REG is multi-word. */
5992 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5994 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5996 if (!REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5999 push_reload (x, NULL_RTX, loc, (rtx*) 0,
6001 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
6005 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
6006 is larger than the class size, then reload the whole SUBREG. */
6009 enum reg_class rclass = context_reg_class;
6010 if ((unsigned) CLASS_MAX_NREGS (rclass, GET_MODE (SUBREG_REG (x)))
6011 > reg_class_size[rclass])
6013 x = find_reloads_subreg_address (x, 0, opnum,
6016 push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass,
6017 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
6029 const char *fmt = GET_RTX_FORMAT (code);
6032 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6035 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
6037 find_reloads_address_1 (mode, XEXP (x, i), context, code, SCRATCH,
6038 &XEXP (x, i), opnum, type, ind_levels, insn);
6042 #undef REG_OK_FOR_CONTEXT
6046 /* X, which is found at *LOC, is a part of an address that needs to be
6047 reloaded into a register of class RCLASS. If X is a constant, or if
6048 X is a PLUS that contains a constant, check that the constant is a
6049 legitimate operand and that we are supposed to be able to load
6050 it into the register.
6052 If not, force the constant into memory and reload the MEM instead.
6054 MODE is the mode to use, in case X is an integer constant.
6056 OPNUM and TYPE describe the purpose of any reloads made.
6058 IND_LEVELS says how many levels of indirect addressing this machine
6062 find_reloads_address_part (rtx x, rtx *loc, enum reg_class rclass,
6063 enum machine_mode mode, int opnum,
6064 enum reload_type type, int ind_levels)
6067 && (! LEGITIMATE_CONSTANT_P (x)
6068 || PREFERRED_RELOAD_CLASS (x, rclass) == NO_REGS))
6070 x = force_const_mem (mode, x);
6071 find_reloads_address (mode, &x, XEXP (x, 0), &XEXP (x, 0),
6072 opnum, type, ind_levels, 0);
6075 else if (GET_CODE (x) == PLUS
6076 && CONSTANT_P (XEXP (x, 1))
6077 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
6078 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), rclass) == NO_REGS))
6082 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
6083 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
6084 find_reloads_address (mode, &XEXP (x, 1), XEXP (tem, 0), &XEXP (tem, 0),
6085 opnum, type, ind_levels, 0);
6088 push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass,
6089 mode, VOIDmode, 0, 0, opnum, type);
6092 /* X, a subreg of a pseudo, is a part of an address that needs to be
6095 If the pseudo is equivalent to a memory location that cannot be directly
6096 addressed, make the necessary address reloads.
6098 If address reloads have been necessary, or if the address is changed
6099 by register elimination, return the rtx of the memory location;
6100 otherwise, return X.
6102 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
6105 OPNUM and TYPE identify the purpose of the reload.
6107 IND_LEVELS says how many levels of indirect addressing are
6108 supported at this point in the address.
6110 INSN, if nonzero, is the insn in which we do the reload. It is used
6111 to determine where to put USEs for pseudos that we have to replace with
6115 find_reloads_subreg_address (rtx x, int force_replace, int opnum,
6116 enum reload_type type, int ind_levels, rtx insn)
6118 int regno = REGNO (SUBREG_REG (x));
6120 if (reg_equiv_memory_loc[regno])
6122 /* If the address is not directly addressable, or if the address is not
6123 offsettable, then it must be replaced. */
6125 && (reg_equiv_address[regno]
6126 || ! offsettable_memref_p (reg_equiv_mem[regno])))
6129 if (force_replace || num_not_at_initial_offset)
6131 rtx tem = make_memloc (SUBREG_REG (x), regno);
6133 /* If the address changes because of register elimination, then
6134 it must be replaced. */
6136 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
6138 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
6139 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
6144 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
6145 hold the correct (negative) byte offset. */
6146 if (BYTES_BIG_ENDIAN && outer_size > inner_size)
6147 offset = inner_size - outer_size;
6149 offset = SUBREG_BYTE (x);
6151 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
6152 PUT_MODE (tem, GET_MODE (x));
6153 if (MEM_OFFSET (tem))
6154 set_mem_offset (tem, plus_constant (MEM_OFFSET (tem), offset));
6156 && INTVAL (MEM_SIZE (tem)) != (HOST_WIDE_INT) outer_size)
6157 set_mem_size (tem, GEN_INT (outer_size));
6159 /* If this was a paradoxical subreg that we replaced, the
6160 resulting memory must be sufficiently aligned to allow
6161 us to widen the mode of the memory. */
6162 if (outer_size > inner_size)
6166 base = XEXP (tem, 0);
6167 if (GET_CODE (base) == PLUS)
6169 if (CONST_INT_P (XEXP (base, 1))
6170 && INTVAL (XEXP (base, 1)) % outer_size != 0)
6172 base = XEXP (base, 0);
6175 || (REGNO_POINTER_ALIGN (REGNO (base))
6176 < outer_size * BITS_PER_UNIT))
6180 reloaded = find_reloads_address (GET_MODE (tem), &tem,
6181 XEXP (tem, 0), &XEXP (tem, 0),
6182 opnum, type, ind_levels, insn);
6183 /* ??? Do we need to handle nonzero offsets somehow? */
6184 if (!offset && !rtx_equal_p (tem, orig))
6185 push_reg_equiv_alt_mem (regno, tem);
6187 /* For some processors an address may be valid in the
6188 original mode but not in a smaller mode. For
6189 example, ARM accepts a scaled index register in
6190 SImode but not in HImode. Note that this is only
6191 a problem if the address in reg_equiv_mem is already
6192 invalid in the new mode; other cases would be fixed
6193 by find_reloads_address as usual.
6195 ??? We attempt to handle such cases here by doing an
6196 additional reload of the full address after the
6197 usual processing by find_reloads_address. Note that
6198 this may not work in the general case, but it seems
6199 to cover the cases where this situation currently
6200 occurs. A more general fix might be to reload the
6201 *value* instead of the address, but this would not
6202 be expected by the callers of this routine as-is.
6204 If find_reloads_address already completed replaced
6205 the address, there is nothing further to do. */
6207 && reg_equiv_mem[regno] != 0
6208 && !strict_memory_address_addr_space_p
6209 (GET_MODE (x), XEXP (reg_equiv_mem[regno], 0),
6210 MEM_ADDR_SPACE (reg_equiv_mem[regno])))
6211 push_reload (XEXP (tem, 0), NULL_RTX, &XEXP (tem, 0), (rtx*) 0,
6212 base_reg_class (GET_MODE (tem), MEM, SCRATCH),
6213 GET_MODE (XEXP (tem, 0)), VOIDmode, 0, 0,
6216 /* If this is not a toplevel operand, find_reloads doesn't see
6217 this substitution. We have to emit a USE of the pseudo so
6218 that delete_output_reload can see it. */
6219 if (replace_reloads && recog_data.operand[opnum] != x)
6220 /* We mark the USE with QImode so that we recognize it
6221 as one that can be safely deleted at the end of
6223 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
6233 /* Substitute into the current INSN the registers into which we have reloaded
6234 the things that need reloading. The array `replacements'
6235 contains the locations of all pointers that must be changed
6236 and says what to replace them with.
6238 Return the rtx that X translates into; usually X, but modified. */
6241 subst_reloads (rtx insn)
6245 for (i = 0; i < n_replacements; i++)
6247 struct replacement *r = &replacements[i];
6248 rtx reloadreg = rld[r->what].reg_rtx;
6252 /* This checking takes a very long time on some platforms
6253 causing the gcc.c-torture/compile/limits-fnargs.c test
6254 to time out during testing. See PR 31850.
6256 Internal consistency test. Check that we don't modify
6257 anything in the equivalence arrays. Whenever something from
6258 those arrays needs to be reloaded, it must be unshared before
6259 being substituted into; the equivalence must not be modified.
6260 Otherwise, if the equivalence is used after that, it will
6261 have been modified, and the thing substituted (probably a
6262 register) is likely overwritten and not a usable equivalence. */
6265 for (check_regno = 0; check_regno < max_regno; check_regno++)
6267 #define CHECK_MODF(ARRAY) \
6268 gcc_assert (!ARRAY[check_regno] \
6269 || !loc_mentioned_in_p (r->where, \
6270 ARRAY[check_regno]))
6272 CHECK_MODF (reg_equiv_constant);
6273 CHECK_MODF (reg_equiv_memory_loc);
6274 CHECK_MODF (reg_equiv_address);
6275 CHECK_MODF (reg_equiv_mem);
6278 #endif /* DEBUG_RELOAD */
6280 /* If we're replacing a LABEL_REF with a register, there must
6281 already be an indication (to e.g. flow) which label this
6282 register refers to. */
6283 gcc_assert (GET_CODE (*r->where) != LABEL_REF
6285 || find_reg_note (insn,
6287 XEXP (*r->where, 0))
6288 || label_is_jump_target_p (XEXP (*r->where, 0), insn));
6290 /* Encapsulate RELOADREG so its machine mode matches what
6291 used to be there. Note that gen_lowpart_common will
6292 do the wrong thing if RELOADREG is multi-word. RELOADREG
6293 will always be a REG here. */
6294 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
6295 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6297 /* If we are putting this into a SUBREG and RELOADREG is a
6298 SUBREG, we would be making nested SUBREGs, so we have to fix
6299 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
6301 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
6303 if (GET_MODE (*r->subreg_loc)
6304 == GET_MODE (SUBREG_REG (reloadreg)))
6305 *r->subreg_loc = SUBREG_REG (reloadreg);
6309 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
6311 /* When working with SUBREGs the rule is that the byte
6312 offset must be a multiple of the SUBREG's mode. */
6313 final_offset = (final_offset /
6314 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6315 final_offset = (final_offset *
6316 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6318 *r->where = SUBREG_REG (reloadreg);
6319 SUBREG_BYTE (*r->subreg_loc) = final_offset;
6323 *r->where = reloadreg;
6325 /* If reload got no reg and isn't optional, something's wrong. */
6327 gcc_assert (rld[r->what].optional);
6331 /* Make a copy of any replacements being done into X and move those
6332 copies to locations in Y, a copy of X. */
6335 copy_replacements (rtx x, rtx y)
6337 /* We can't support X being a SUBREG because we might then need to know its
6338 location if something inside it was replaced. */
6339 gcc_assert (GET_CODE (x) != SUBREG);
6341 copy_replacements_1 (&x, &y, n_replacements);
6345 copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6349 struct replacement *r;
6353 for (j = 0; j < orig_replacements; j++)
6355 if (replacements[j].subreg_loc == px)
6357 r = &replacements[n_replacements++];
6358 r->where = replacements[j].where;
6360 r->what = replacements[j].what;
6361 r->mode = replacements[j].mode;
6363 else if (replacements[j].where == px)
6365 r = &replacements[n_replacements++];
6368 r->what = replacements[j].what;
6369 r->mode = replacements[j].mode;
6375 code = GET_CODE (x);
6376 fmt = GET_RTX_FORMAT (code);
6378 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6381 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6382 else if (fmt[i] == 'E')
6383 for (j = XVECLEN (x, i); --j >= 0; )
6384 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6389 /* Change any replacements being done to *X to be done to *Y. */
6392 move_replacements (rtx *x, rtx *y)
6396 for (i = 0; i < n_replacements; i++)
6397 if (replacements[i].subreg_loc == x)
6398 replacements[i].subreg_loc = y;
6399 else if (replacements[i].where == x)
6401 replacements[i].where = y;
6402 replacements[i].subreg_loc = 0;
6406 /* If LOC was scheduled to be replaced by something, return the replacement.
6407 Otherwise, return *LOC. */
6410 find_replacement (rtx *loc)
6412 struct replacement *r;
6414 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6416 rtx reloadreg = rld[r->what].reg_rtx;
6418 if (reloadreg && r->where == loc)
6420 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6421 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6425 else if (reloadreg && r->subreg_loc == loc)
6427 /* RELOADREG must be either a REG or a SUBREG.
6429 ??? Is it actually still ever a SUBREG? If so, why? */
6431 if (REG_P (reloadreg))
6432 return gen_rtx_REG (GET_MODE (*loc),
6433 (REGNO (reloadreg) +
6434 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6435 GET_MODE (SUBREG_REG (*loc)),
6438 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6442 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6444 /* When working with SUBREGs the rule is that the byte
6445 offset must be a multiple of the SUBREG's mode. */
6446 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6447 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6448 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6454 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6455 what's inside and make a new rtl if so. */
6456 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6457 || GET_CODE (*loc) == MULT)
6459 rtx x = find_replacement (&XEXP (*loc, 0));
6460 rtx y = find_replacement (&XEXP (*loc, 1));
6462 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6463 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6469 /* Return nonzero if register in range [REGNO, ENDREGNO)
6470 appears either explicitly or implicitly in X
6471 other than being stored into (except for earlyclobber operands).
6473 References contained within the substructure at LOC do not count.
6474 LOC may be zero, meaning don't ignore anything.
6476 This is similar to refers_to_regno_p in rtlanal.c except that we
6477 look at equivalences for pseudos that didn't get hard registers. */
6480 refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6492 code = GET_CODE (x);
6499 /* If this is a pseudo, a hard register must not have been allocated.
6500 X must therefore either be a constant or be in memory. */
6501 if (r >= FIRST_PSEUDO_REGISTER)
6503 if (reg_equiv_memory_loc[r])
6504 return refers_to_regno_for_reload_p (regno, endregno,
6505 reg_equiv_memory_loc[r],
6508 gcc_assert (reg_equiv_constant[r] || reg_equiv_invariant[r]);
6512 return (endregno > r
6513 && regno < r + (r < FIRST_PSEUDO_REGISTER
6514 ? hard_regno_nregs[r][GET_MODE (x)]
6518 /* If this is a SUBREG of a hard reg, we can see exactly which
6519 registers are being modified. Otherwise, handle normally. */
6520 if (REG_P (SUBREG_REG (x))
6521 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6523 unsigned int inner_regno = subreg_regno (x);
6524 unsigned int inner_endregno
6525 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6526 ? subreg_nregs (x) : 1);
6528 return endregno > inner_regno && regno < inner_endregno;
6534 if (&SET_DEST (x) != loc
6535 /* Note setting a SUBREG counts as referring to the REG it is in for
6536 a pseudo but not for hard registers since we can
6537 treat each word individually. */
6538 && ((GET_CODE (SET_DEST (x)) == SUBREG
6539 && loc != &SUBREG_REG (SET_DEST (x))
6540 && REG_P (SUBREG_REG (SET_DEST (x)))
6541 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6542 && refers_to_regno_for_reload_p (regno, endregno,
6543 SUBREG_REG (SET_DEST (x)),
6545 /* If the output is an earlyclobber operand, this is
6547 || ((!REG_P (SET_DEST (x))
6548 || earlyclobber_operand_p (SET_DEST (x)))
6549 && refers_to_regno_for_reload_p (regno, endregno,
6550 SET_DEST (x), loc))))
6553 if (code == CLOBBER || loc == &SET_SRC (x))
6562 /* X does not match, so try its subexpressions. */
6564 fmt = GET_RTX_FORMAT (code);
6565 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6567 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6575 if (refers_to_regno_for_reload_p (regno, endregno,
6579 else if (fmt[i] == 'E')
6582 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6583 if (loc != &XVECEXP (x, i, j)
6584 && refers_to_regno_for_reload_p (regno, endregno,
6585 XVECEXP (x, i, j), loc))
6592 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6593 we check if any register number in X conflicts with the relevant register
6594 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6595 contains a MEM (we don't bother checking for memory addresses that can't
6596 conflict because we expect this to be a rare case.
6598 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6599 that we look at equivalences for pseudos that didn't get hard registers. */
6602 reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6604 int regno, endregno;
6606 /* Overly conservative. */
6607 if (GET_CODE (x) == STRICT_LOW_PART
6608 || GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
6611 /* If either argument is a constant, then modifying X can not affect IN. */
6612 if (CONSTANT_P (x) || CONSTANT_P (in))
6614 else if (GET_CODE (x) == SUBREG && MEM_P (SUBREG_REG (x)))
6615 return refers_to_mem_for_reload_p (in);
6616 else if (GET_CODE (x) == SUBREG)
6618 regno = REGNO (SUBREG_REG (x));
6619 if (regno < FIRST_PSEUDO_REGISTER)
6620 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6621 GET_MODE (SUBREG_REG (x)),
6624 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6625 ? subreg_nregs (x) : 1);
6627 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6633 /* If this is a pseudo, it must not have been assigned a hard register.
6634 Therefore, it must either be in memory or be a constant. */
6636 if (regno >= FIRST_PSEUDO_REGISTER)
6638 if (reg_equiv_memory_loc[regno])
6639 return refers_to_mem_for_reload_p (in);
6640 gcc_assert (reg_equiv_constant[regno]);
6644 endregno = END_HARD_REGNO (x);
6646 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6649 return refers_to_mem_for_reload_p (in);
6650 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6651 || GET_CODE (x) == CC0)
6652 return reg_mentioned_p (x, in);
6655 gcc_assert (GET_CODE (x) == PLUS);
6657 /* We actually want to know if X is mentioned somewhere inside IN.
6658 We must not say that (plus (sp) (const_int 124)) is in
6659 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6660 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6661 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6666 else if (GET_CODE (in) == PLUS)
6667 return (rtx_equal_p (x, in)
6668 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6669 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6670 else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6671 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6677 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6681 refers_to_mem_for_reload_p (rtx x)
6690 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6691 && reg_equiv_memory_loc[REGNO (x)]);
6693 fmt = GET_RTX_FORMAT (GET_CODE (x));
6694 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6696 && (MEM_P (XEXP (x, i))
6697 || refers_to_mem_for_reload_p (XEXP (x, i))))
6703 /* Check the insns before INSN to see if there is a suitable register
6704 containing the same value as GOAL.
6705 If OTHER is -1, look for a register in class RCLASS.
6706 Otherwise, just see if register number OTHER shares GOAL's value.
6708 Return an rtx for the register found, or zero if none is found.
6710 If RELOAD_REG_P is (short *)1,
6711 we reject any hard reg that appears in reload_reg_rtx
6712 because such a hard reg is also needed coming into this insn.
6714 If RELOAD_REG_P is any other nonzero value,
6715 it is a vector indexed by hard reg number
6716 and we reject any hard reg whose element in the vector is nonnegative
6717 as well as any that appears in reload_reg_rtx.
6719 If GOAL is zero, then GOALREG is a register number; we look
6720 for an equivalent for that register.
6722 MODE is the machine mode of the value we want an equivalence for.
6723 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6725 This function is used by jump.c as well as in the reload pass.
6727 If GOAL is the sum of the stack pointer and a constant, we treat it
6728 as if it were a constant except that sp is required to be unchanging. */
6731 find_equiv_reg (rtx goal, rtx insn, enum reg_class rclass, int other,
6732 short *reload_reg_p, int goalreg, enum machine_mode mode)
6735 rtx goaltry, valtry, value, where;
6741 int goal_mem_addr_varies = 0;
6742 int need_stable_sp = 0;
6749 else if (REG_P (goal))
6750 regno = REGNO (goal);
6751 else if (MEM_P (goal))
6753 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6754 if (MEM_VOLATILE_P (goal))
6756 if (flag_float_store && SCALAR_FLOAT_MODE_P (GET_MODE (goal)))
6758 /* An address with side effects must be reexecuted. */
6773 else if (CONSTANT_P (goal))
6775 else if (GET_CODE (goal) == PLUS
6776 && XEXP (goal, 0) == stack_pointer_rtx
6777 && CONSTANT_P (XEXP (goal, 1)))
6778 goal_const = need_stable_sp = 1;
6779 else if (GET_CODE (goal) == PLUS
6780 && XEXP (goal, 0) == frame_pointer_rtx
6781 && CONSTANT_P (XEXP (goal, 1)))
6787 /* Scan insns back from INSN, looking for one that copies
6788 a value into or out of GOAL.
6789 Stop and give up if we reach a label. */
6794 if (p && DEBUG_INSN_P (p))
6797 if (p == 0 || LABEL_P (p)
6798 || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6801 if (NONJUMP_INSN_P (p)
6802 /* If we don't want spill regs ... */
6803 && (! (reload_reg_p != 0
6804 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6805 /* ... then ignore insns introduced by reload; they aren't
6806 useful and can cause results in reload_as_needed to be
6807 different from what they were when calculating the need for
6808 spills. If we notice an input-reload insn here, we will
6809 reject it below, but it might hide a usable equivalent.
6810 That makes bad code. It may even fail: perhaps no reg was
6811 spilled for this insn because it was assumed we would find
6813 || INSN_UID (p) < reload_first_uid))
6816 pat = single_set (p);
6818 /* First check for something that sets some reg equal to GOAL. */
6821 && true_regnum (SET_SRC (pat)) == regno
6822 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6825 && true_regnum (SET_DEST (pat)) == regno
6826 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6828 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6829 /* When looking for stack pointer + const,
6830 make sure we don't use a stack adjust. */
6831 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6832 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6834 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6835 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6837 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6838 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6839 /* If we are looking for a constant,
6840 and something equivalent to that constant was copied
6841 into a reg, we can use that reg. */
6842 || (goal_const && REG_NOTES (p) != 0
6843 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6844 && ((rtx_equal_p (XEXP (tem, 0), goal)
6846 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6847 || (REG_P (SET_DEST (pat))
6848 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6849 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6850 && CONST_INT_P (goal)
6852 = operand_subword (XEXP (tem, 0), 0, 0,
6854 && rtx_equal_p (goal, goaltry)
6856 = operand_subword (SET_DEST (pat), 0, 0,
6858 && (valueno = true_regnum (valtry)) >= 0)))
6859 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6861 && REG_P (SET_DEST (pat))
6862 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6863 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6864 && CONST_INT_P (goal)
6865 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6867 && rtx_equal_p (goal, goaltry)
6869 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6870 && (valueno = true_regnum (valtry)) >= 0)))
6874 if (valueno != other)
6877 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6879 else if (!in_hard_reg_set_p (reg_class_contents[(int) rclass],
6889 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6890 (or copying VALUE into GOAL, if GOAL is also a register).
6891 Now verify that VALUE is really valid. */
6893 /* VALUENO is the register number of VALUE; a hard register. */
6895 /* Don't try to re-use something that is killed in this insn. We want
6896 to be able to trust REG_UNUSED notes. */
6897 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6900 /* If we propose to get the value from the stack pointer or if GOAL is
6901 a MEM based on the stack pointer, we need a stable SP. */
6902 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6903 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6907 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6908 if (GET_MODE (value) != mode)
6911 /* Reject VALUE if it was loaded from GOAL
6912 and is also a register that appears in the address of GOAL. */
6914 if (goal_mem && value == SET_DEST (single_set (where))
6915 && refers_to_regno_for_reload_p (valueno, end_hard_regno (mode, valueno),
6919 /* Reject registers that overlap GOAL. */
6921 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6922 nregs = hard_regno_nregs[regno][mode];
6925 valuenregs = hard_regno_nregs[valueno][mode];
6927 if (!goal_mem && !goal_const
6928 && regno + nregs > valueno && regno < valueno + valuenregs)
6931 /* Reject VALUE if it is one of the regs reserved for reloads.
6932 Reload1 knows how to reuse them anyway, and it would get
6933 confused if we allocated one without its knowledge.
6934 (Now that insns introduced by reload are ignored above,
6935 this case shouldn't happen, but I'm not positive.) */
6937 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6940 for (i = 0; i < valuenregs; ++i)
6941 if (reload_reg_p[valueno + i] >= 0)
6945 /* Reject VALUE if it is a register being used for an input reload
6946 even if it is not one of those reserved. */
6948 if (reload_reg_p != 0)
6951 for (i = 0; i < n_reloads; i++)
6952 if (rld[i].reg_rtx != 0 && rld[i].in)
6954 int regno1 = REGNO (rld[i].reg_rtx);
6955 int nregs1 = hard_regno_nregs[regno1]
6956 [GET_MODE (rld[i].reg_rtx)];
6957 if (regno1 < valueno + valuenregs
6958 && regno1 + nregs1 > valueno)
6964 /* We must treat frame pointer as varying here,
6965 since it can vary--in a nonlocal goto as generated by expand_goto. */
6966 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6968 /* Now verify that the values of GOAL and VALUE remain unaltered
6969 until INSN is reached. */
6978 /* Don't trust the conversion past a function call
6979 if either of the two is in a call-clobbered register, or memory. */
6984 if (goal_mem || need_stable_sp)
6987 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6988 for (i = 0; i < nregs; ++i)
6989 if (call_used_regs[regno + i]
6990 || HARD_REGNO_CALL_PART_CLOBBERED (regno + i, mode))
6993 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6994 for (i = 0; i < valuenregs; ++i)
6995 if (call_used_regs[valueno + i]
6996 || HARD_REGNO_CALL_PART_CLOBBERED (valueno + i, mode))
7004 /* Watch out for unspec_volatile, and volatile asms. */
7005 if (volatile_insn_p (pat))
7008 /* If this insn P stores in either GOAL or VALUE, return 0.
7009 If GOAL is a memory ref and this insn writes memory, return 0.
7010 If GOAL is a memory ref and its address is not constant,
7011 and this insn P changes a register used in GOAL, return 0. */
7013 if (GET_CODE (pat) == COND_EXEC)
7014 pat = COND_EXEC_CODE (pat);
7015 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
7017 rtx dest = SET_DEST (pat);
7018 while (GET_CODE (dest) == SUBREG
7019 || GET_CODE (dest) == ZERO_EXTRACT
7020 || GET_CODE (dest) == STRICT_LOW_PART)
7021 dest = XEXP (dest, 0);
7024 int xregno = REGNO (dest);
7026 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
7027 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
7030 if (xregno < regno + nregs && xregno + xnregs > regno)
7032 if (xregno < valueno + valuenregs
7033 && xregno + xnregs > valueno)
7035 if (goal_mem_addr_varies
7036 && reg_overlap_mentioned_for_reload_p (dest, goal))
7038 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
7041 else if (goal_mem && MEM_P (dest)
7042 && ! push_operand (dest, GET_MODE (dest)))
7044 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
7045 && reg_equiv_memory_loc[regno] != 0)
7047 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
7050 else if (GET_CODE (pat) == PARALLEL)
7053 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
7055 rtx v1 = XVECEXP (pat, 0, i);
7056 if (GET_CODE (v1) == COND_EXEC)
7057 v1 = COND_EXEC_CODE (v1);
7058 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
7060 rtx dest = SET_DEST (v1);
7061 while (GET_CODE (dest) == SUBREG
7062 || GET_CODE (dest) == ZERO_EXTRACT
7063 || GET_CODE (dest) == STRICT_LOW_PART)
7064 dest = XEXP (dest, 0);
7067 int xregno = REGNO (dest);
7069 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
7070 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
7073 if (xregno < regno + nregs
7074 && xregno + xnregs > regno)
7076 if (xregno < valueno + valuenregs
7077 && xregno + xnregs > valueno)
7079 if (goal_mem_addr_varies
7080 && reg_overlap_mentioned_for_reload_p (dest,
7083 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
7086 else if (goal_mem && MEM_P (dest)
7087 && ! push_operand (dest, GET_MODE (dest)))
7089 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
7090 && reg_equiv_memory_loc[regno] != 0)
7092 else if (need_stable_sp
7093 && push_operand (dest, GET_MODE (dest)))
7099 if (CALL_P (p) && CALL_INSN_FUNCTION_USAGE (p))
7103 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
7104 link = XEXP (link, 1))
7106 pat = XEXP (link, 0);
7107 if (GET_CODE (pat) == CLOBBER)
7109 rtx dest = SET_DEST (pat);
7113 int xregno = REGNO (dest);
7115 = hard_regno_nregs[xregno][GET_MODE (dest)];
7117 if (xregno < regno + nregs
7118 && xregno + xnregs > regno)
7120 else if (xregno < valueno + valuenregs
7121 && xregno + xnregs > valueno)
7123 else if (goal_mem_addr_varies
7124 && reg_overlap_mentioned_for_reload_p (dest,
7129 else if (goal_mem && MEM_P (dest)
7130 && ! push_operand (dest, GET_MODE (dest)))
7132 else if (need_stable_sp
7133 && push_operand (dest, GET_MODE (dest)))
7140 /* If this insn auto-increments or auto-decrements
7141 either regno or valueno, return 0 now.
7142 If GOAL is a memory ref and its address is not constant,
7143 and this insn P increments a register used in GOAL, return 0. */
7147 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
7148 if (REG_NOTE_KIND (link) == REG_INC
7149 && REG_P (XEXP (link, 0)))
7151 int incno = REGNO (XEXP (link, 0));
7152 if (incno < regno + nregs && incno >= regno)
7154 if (incno < valueno + valuenregs && incno >= valueno)
7156 if (goal_mem_addr_varies
7157 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
7167 /* Find a place where INCED appears in an increment or decrement operator
7168 within X, and return the amount INCED is incremented or decremented by.
7169 The value is always positive. */
7172 find_inc_amount (rtx x, rtx inced)
7174 enum rtx_code code = GET_CODE (x);
7180 rtx addr = XEXP (x, 0);
7181 if ((GET_CODE (addr) == PRE_DEC
7182 || GET_CODE (addr) == POST_DEC
7183 || GET_CODE (addr) == PRE_INC
7184 || GET_CODE (addr) == POST_INC)
7185 && XEXP (addr, 0) == inced)
7186 return GET_MODE_SIZE (GET_MODE (x));
7187 else if ((GET_CODE (addr) == PRE_MODIFY
7188 || GET_CODE (addr) == POST_MODIFY)
7189 && GET_CODE (XEXP (addr, 1)) == PLUS
7190 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
7191 && XEXP (addr, 0) == inced
7192 && CONST_INT_P (XEXP (XEXP (addr, 1), 1)))
7194 i = INTVAL (XEXP (XEXP (addr, 1), 1));
7195 return i < 0 ? -i : i;
7199 fmt = GET_RTX_FORMAT (code);
7200 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7204 int tem = find_inc_amount (XEXP (x, i), inced);
7211 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7213 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
7223 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7224 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7228 reg_inc_found_and_valid_p (unsigned int regno, unsigned int endregno,
7235 if (! INSN_P (insn))
7238 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
7239 if (REG_NOTE_KIND (link) == REG_INC)
7241 unsigned int test = (int) REGNO (XEXP (link, 0));
7242 if (test >= regno && test < endregno)
7249 #define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7253 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7254 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7255 REG_INC. REGNO must refer to a hard register. */
7258 regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
7261 unsigned int nregs, endregno;
7263 /* regno must be a hard register. */
7264 gcc_assert (regno < FIRST_PSEUDO_REGISTER);
7266 nregs = hard_regno_nregs[regno][mode];
7267 endregno = regno + nregs;
7269 if ((GET_CODE (PATTERN (insn)) == CLOBBER
7270 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7271 && REG_P (XEXP (PATTERN (insn), 0)))
7273 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
7275 return test >= regno && test < endregno;
7278 if (sets == 2 && reg_inc_found_and_valid_p (regno, endregno, insn))
7281 if (GET_CODE (PATTERN (insn)) == PARALLEL)
7283 int i = XVECLEN (PATTERN (insn), 0) - 1;
7287 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7288 if ((GET_CODE (elt) == CLOBBER
7289 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7290 && REG_P (XEXP (elt, 0)))
7292 unsigned int test = REGNO (XEXP (elt, 0));
7294 if (test >= regno && test < endregno)
7298 && reg_inc_found_and_valid_p (regno, endregno, elt))
7306 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7308 reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
7312 if (GET_MODE (reloadreg) == mode)
7315 regno = REGNO (reloadreg);
7317 if (WORDS_BIG_ENDIAN)
7318 regno += (int) hard_regno_nregs[regno][GET_MODE (reloadreg)]
7319 - (int) hard_regno_nregs[regno][mode];
7321 return gen_rtx_REG (mode, regno);
7324 static const char *const reload_when_needed_name[] =
7327 "RELOAD_FOR_OUTPUT",
7329 "RELOAD_FOR_INPUT_ADDRESS",
7330 "RELOAD_FOR_INPADDR_ADDRESS",
7331 "RELOAD_FOR_OUTPUT_ADDRESS",
7332 "RELOAD_FOR_OUTADDR_ADDRESS",
7333 "RELOAD_FOR_OPERAND_ADDRESS",
7334 "RELOAD_FOR_OPADDR_ADDR",
7336 "RELOAD_FOR_OTHER_ADDRESS"
7339 /* These functions are used to print the variables set by 'find_reloads' */
7342 debug_reload_to_stream (FILE *f)
7349 for (r = 0; r < n_reloads; r++)
7351 fprintf (f, "Reload %d: ", r);
7355 fprintf (f, "reload_in (%s) = ",
7356 GET_MODE_NAME (rld[r].inmode));
7357 print_inline_rtx (f, rld[r].in, 24);
7358 fprintf (f, "\n\t");
7361 if (rld[r].out != 0)
7363 fprintf (f, "reload_out (%s) = ",
7364 GET_MODE_NAME (rld[r].outmode));
7365 print_inline_rtx (f, rld[r].out, 24);
7366 fprintf (f, "\n\t");
7369 fprintf (f, "%s, ", reg_class_names[(int) rld[r].rclass]);
7371 fprintf (f, "%s (opnum = %d)",
7372 reload_when_needed_name[(int) rld[r].when_needed],
7375 if (rld[r].optional)
7376 fprintf (f, ", optional");
7378 if (rld[r].nongroup)
7379 fprintf (f, ", nongroup");
7381 if (rld[r].inc != 0)
7382 fprintf (f, ", inc by %d", rld[r].inc);
7384 if (rld[r].nocombine)
7385 fprintf (f, ", can't combine");
7387 if (rld[r].secondary_p)
7388 fprintf (f, ", secondary_reload_p");
7390 if (rld[r].in_reg != 0)
7392 fprintf (f, "\n\treload_in_reg: ");
7393 print_inline_rtx (f, rld[r].in_reg, 24);
7396 if (rld[r].out_reg != 0)
7398 fprintf (f, "\n\treload_out_reg: ");
7399 print_inline_rtx (f, rld[r].out_reg, 24);
7402 if (rld[r].reg_rtx != 0)
7404 fprintf (f, "\n\treload_reg_rtx: ");
7405 print_inline_rtx (f, rld[r].reg_rtx, 24);
7409 if (rld[r].secondary_in_reload != -1)
7411 fprintf (f, "%ssecondary_in_reload = %d",
7412 prefix, rld[r].secondary_in_reload);
7416 if (rld[r].secondary_out_reload != -1)
7417 fprintf (f, "%ssecondary_out_reload = %d\n",
7418 prefix, rld[r].secondary_out_reload);
7421 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7423 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7424 insn_data[rld[r].secondary_in_icode].name);
7428 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7429 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7430 insn_data[rld[r].secondary_out_icode].name);
7439 debug_reload_to_stream (stderr);