1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
30 init_reload actually has to be called earlier anyway.
32 To scan an insn, call `find_reloads'. This does two things:
33 1. sets up tables describing which values must be reloaded
34 for this insn, and what kind of hard regs they must be reloaded into;
35 2. optionally record the locations where those values appear in
36 the data, so they can be replaced properly later.
37 This is done only if the second arg to `find_reloads' is nonzero.
39 The third arg to `find_reloads' specifies the number of levels
40 of indirect addressing supported by the machine. If it is zero,
41 indirect addressing is not valid. If it is one, (MEM (REG n))
42 is valid even if (REG n) did not get a hard register; if it is two,
43 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44 hard register, and similarly for higher values.
46 Then you must choose the hard regs to reload those pseudo regs into,
47 and generate appropriate load insns before this insn and perhaps
48 also store insns after this insn. Set up the array `reload_reg_rtx'
49 to contain the REG rtx's for the registers you used. In some
50 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51 for certain reloads. Then that tells you which register to use,
52 so you do not need to allocate one. But you still do need to add extra
53 instructions to copy the value into and out of that register.
55 Finally you must call `subst_reloads' to substitute the reload reg rtx's
56 into the locations already recorded.
60 find_reloads can alter the operands of the instruction it is called on.
62 1. Two operands of any sort may be interchanged, if they are in a
63 commutative instruction.
64 This happens only if find_reloads thinks the instruction will compile
67 2. Pseudo-registers that are equivalent to constants are replaced
68 with those constants if they are not in hard registers.
70 1 happens every time find_reloads is called.
71 2 happens only when REPLACE is 1, which is only when
72 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
90 /* We do not enable this with ENABLE_CHECKING, since it is awfully slow. */
95 #include "coretypes.h"
97 #include "rtl-error.h"
99 #include "insn-config.h"
106 #include "addresses.h"
107 #include "hard-reg-set.h"
110 #include "function.h"
115 /* True if X is a constant that can be forced into the constant pool.
116 MODE is the mode of the operand, or VOIDmode if not known. */
117 #define CONST_POOL_OK_P(MODE, X) \
118 ((MODE) != VOIDmode \
120 && GET_CODE (X) != HIGH \
121 && !targetm.cannot_force_const_mem (MODE, X))
123 /* True if C is a non-empty register class that has too few registers
124 to be safely used as a reload target class. */
127 small_register_class_p (reg_class_t rclass)
129 return (reg_class_size [(int) rclass] == 1
130 || (reg_class_size [(int) rclass] >= 1
131 && targetm.class_likely_spilled_p (rclass)));
135 /* All reloads of the current insn are recorded here. See reload.h for
138 struct reload rld[MAX_RELOADS];
140 /* All the "earlyclobber" operands of the current insn
141 are recorded here. */
143 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
145 int reload_n_operands;
147 /* Replacing reloads.
149 If `replace_reloads' is nonzero, then as each reload is recorded
150 an entry is made for it in the table `replacements'.
151 Then later `subst_reloads' can look through that table and
152 perform all the replacements needed. */
154 /* Nonzero means record the places to replace. */
155 static int replace_reloads;
157 /* Each replacement is recorded with a structure like this. */
160 rtx *where; /* Location to store in */
161 int what; /* which reload this is for */
162 enum machine_mode mode; /* mode it must have */
165 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
167 /* Number of replacements currently recorded. */
168 static int n_replacements;
170 /* Used to track what is modified by an operand. */
173 int reg_flag; /* Nonzero if referencing a register. */
174 int safe; /* Nonzero if this can't conflict with anything. */
175 rtx base; /* Base address for MEM. */
176 HOST_WIDE_INT start; /* Starting offset or register number. */
177 HOST_WIDE_INT end; /* Ending offset or register number. */
180 #ifdef SECONDARY_MEMORY_NEEDED
182 /* Save MEMs needed to copy from one class of registers to another. One MEM
183 is used per mode, but normally only one or two modes are ever used.
185 We keep two versions, before and after register elimination. The one
186 after register elimination is record separately for each operand. This
187 is done in case the address is not valid to be sure that we separately
190 static rtx secondary_memlocs[NUM_MACHINE_MODES];
191 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
192 static int secondary_memlocs_elim_used = 0;
195 /* The instruction we are doing reloads for;
196 so we can test whether a register dies in it. */
197 static rtx this_insn;
199 /* Nonzero if this instruction is a user-specified asm with operands. */
200 static int this_insn_is_asm;
202 /* If hard_regs_live_known is nonzero,
203 we can tell which hard regs are currently live,
204 at least enough to succeed in choosing dummy reloads. */
205 static int hard_regs_live_known;
207 /* Indexed by hard reg number,
208 element is nonnegative if hard reg has been spilled.
209 This vector is passed to `find_reloads' as an argument
210 and is not changed here. */
211 static short *static_reload_reg_p;
213 /* Set to 1 in subst_reg_equivs if it changes anything. */
214 static int subst_reg_equivs_changed;
216 /* On return from push_reload, holds the reload-number for the OUT
217 operand, which can be different for that from the input operand. */
218 static int output_reloadnum;
220 /* Compare two RTX's. */
221 #define MATCHES(x, y) \
222 (x == y || (x != 0 && (REG_P (x) \
223 ? REG_P (y) && REGNO (x) == REGNO (y) \
224 : rtx_equal_p (x, y) && ! side_effects_p (x))))
226 /* Indicates if two reloads purposes are for similar enough things that we
227 can merge their reloads. */
228 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
229 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
230 || ((when1) == (when2) && (op1) == (op2)) \
231 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
232 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
233 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
234 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
235 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
237 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
238 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
239 ((when1) != (when2) \
240 || ! ((op1) == (op2) \
241 || (when1) == RELOAD_FOR_INPUT \
242 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
243 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
245 /* If we are going to reload an address, compute the reload type to
247 #define ADDR_TYPE(type) \
248 ((type) == RELOAD_FOR_INPUT_ADDRESS \
249 ? RELOAD_FOR_INPADDR_ADDRESS \
250 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
251 ? RELOAD_FOR_OUTADDR_ADDRESS \
254 static int push_secondary_reload (int, rtx, int, int, enum reg_class,
255 enum machine_mode, enum reload_type,
256 enum insn_code *, secondary_reload_info *);
257 static enum reg_class find_valid_class (enum machine_mode, enum machine_mode,
259 static void push_replacement (rtx *, int, enum machine_mode);
260 static void dup_replacements (rtx *, rtx *);
261 static void combine_reloads (void);
262 static int find_reusable_reload (rtx *, rtx, enum reg_class,
263 enum reload_type, int, int);
264 static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
265 enum machine_mode, reg_class_t, int, int);
266 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
267 static struct decomposition decompose (rtx);
268 static int immune_p (rtx, rtx, struct decomposition);
269 static bool alternative_allows_const_pool_ref (rtx, const char *, int);
270 static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
272 static rtx make_memloc (rtx, int);
273 static int maybe_memory_address_addr_space_p (enum machine_mode, rtx,
274 addr_space_t, rtx *);
275 static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
276 int, enum reload_type, int, rtx);
277 static rtx subst_reg_equivs (rtx, rtx);
278 static rtx subst_indexed_address (rtx);
279 static void update_auto_inc_notes (rtx, int, int);
280 static int find_reloads_address_1 (enum machine_mode, rtx, int,
281 enum rtx_code, enum rtx_code, rtx *,
282 int, enum reload_type,int, rtx);
283 static void find_reloads_address_part (rtx, rtx *, enum reg_class,
284 enum machine_mode, int,
285 enum reload_type, int);
286 static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
288 static void copy_replacements_1 (rtx *, rtx *, int);
289 static int find_inc_amount (rtx, rtx);
290 static int refers_to_mem_for_reload_p (rtx);
291 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
294 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
298 push_reg_equiv_alt_mem (int regno, rtx mem)
302 for (it = reg_equiv_alt_mem_list (regno); it; it = XEXP (it, 1))
303 if (rtx_equal_p (XEXP (it, 0), mem))
306 reg_equiv_alt_mem_list (regno)
307 = alloc_EXPR_LIST (REG_EQUIV, mem,
308 reg_equiv_alt_mem_list (regno));
311 /* Determine if any secondary reloads are needed for loading (if IN_P is
312 nonzero) or storing (if IN_P is zero) X to or from a reload register of
313 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
314 are needed, push them.
316 Return the reload number of the secondary reload we made, or -1 if
317 we didn't need one. *PICODE is set to the insn_code to use if we do
318 need a secondary reload. */
321 push_secondary_reload (int in_p, rtx x, int opnum, int optional,
322 enum reg_class reload_class,
323 enum machine_mode reload_mode, enum reload_type type,
324 enum insn_code *picode, secondary_reload_info *prev_sri)
326 enum reg_class rclass = NO_REGS;
327 enum reg_class scratch_class;
328 enum machine_mode mode = reload_mode;
329 enum insn_code icode = CODE_FOR_nothing;
330 enum insn_code t_icode = CODE_FOR_nothing;
331 enum reload_type secondary_type;
332 int s_reload, t_reload = -1;
333 const char *scratch_constraint;
335 secondary_reload_info sri;
337 if (type == RELOAD_FOR_INPUT_ADDRESS
338 || type == RELOAD_FOR_OUTPUT_ADDRESS
339 || type == RELOAD_FOR_INPADDR_ADDRESS
340 || type == RELOAD_FOR_OUTADDR_ADDRESS)
341 secondary_type = type;
343 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
345 *picode = CODE_FOR_nothing;
347 /* If X is a paradoxical SUBREG, use the inner value to determine both the
348 mode and object being reloaded. */
349 if (paradoxical_subreg_p (x))
352 reload_mode = GET_MODE (x);
355 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
356 is still a pseudo-register by now, it *must* have an equivalent MEM
357 but we don't want to assume that), use that equivalent when seeing if
358 a secondary reload is needed since whether or not a reload is needed
359 might be sensitive to the form of the MEM. */
361 if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
362 && reg_equiv_mem (REGNO (x)))
363 x = reg_equiv_mem (REGNO (x));
365 sri.icode = CODE_FOR_nothing;
366 sri.prev_sri = prev_sri;
367 rclass = (enum reg_class) targetm.secondary_reload (in_p, x, reload_class,
369 icode = (enum insn_code) sri.icode;
371 /* If we don't need any secondary registers, done. */
372 if (rclass == NO_REGS && icode == CODE_FOR_nothing)
375 if (rclass != NO_REGS)
376 t_reload = push_secondary_reload (in_p, x, opnum, optional, rclass,
377 reload_mode, type, &t_icode, &sri);
379 /* If we will be using an insn, the secondary reload is for a
382 if (icode != CODE_FOR_nothing)
384 /* If IN_P is nonzero, the reload register will be the output in
385 operand 0. If IN_P is zero, the reload register will be the input
386 in operand 1. Outputs should have an initial "=", which we must
389 /* ??? It would be useful to be able to handle only two, or more than
390 three, operands, but for now we can only handle the case of having
391 exactly three: output, input and one temp/scratch. */
392 gcc_assert (insn_data[(int) icode].n_operands == 3);
394 /* ??? We currently have no way to represent a reload that needs
395 an icode to reload from an intermediate tertiary reload register.
396 We should probably have a new field in struct reload to tag a
397 chain of scratch operand reloads onto. */
398 gcc_assert (rclass == NO_REGS);
400 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
401 gcc_assert (*scratch_constraint == '=');
402 scratch_constraint++;
403 if (*scratch_constraint == '&')
404 scratch_constraint++;
405 letter = *scratch_constraint;
406 scratch_class = (letter == 'r' ? GENERAL_REGS
407 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) letter,
408 scratch_constraint));
410 rclass = scratch_class;
411 mode = insn_data[(int) icode].operand[2].mode;
414 /* This case isn't valid, so fail. Reload is allowed to use the same
415 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
416 in the case of a secondary register, we actually need two different
417 registers for correct code. We fail here to prevent the possibility of
418 silently generating incorrect code later.
420 The convention is that secondary input reloads are valid only if the
421 secondary_class is different from class. If you have such a case, you
422 can not use secondary reloads, you must work around the problem some
425 Allow this when a reload_in/out pattern is being used. I.e. assume
426 that the generated code handles this case. */
428 gcc_assert (!in_p || rclass != reload_class || icode != CODE_FOR_nothing
429 || t_icode != CODE_FOR_nothing);
431 /* See if we can reuse an existing secondary reload. */
432 for (s_reload = 0; s_reload < n_reloads; s_reload++)
433 if (rld[s_reload].secondary_p
434 && (reg_class_subset_p (rclass, rld[s_reload].rclass)
435 || reg_class_subset_p (rld[s_reload].rclass, rclass))
436 && ((in_p && rld[s_reload].inmode == mode)
437 || (! in_p && rld[s_reload].outmode == mode))
438 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
439 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
440 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
441 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
442 && (small_register_class_p (rclass)
443 || targetm.small_register_classes_for_mode_p (VOIDmode))
444 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
445 opnum, rld[s_reload].opnum))
448 rld[s_reload].inmode = mode;
450 rld[s_reload].outmode = mode;
452 if (reg_class_subset_p (rclass, rld[s_reload].rclass))
453 rld[s_reload].rclass = rclass;
455 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
456 rld[s_reload].optional &= optional;
457 rld[s_reload].secondary_p = 1;
458 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
459 opnum, rld[s_reload].opnum))
460 rld[s_reload].when_needed = RELOAD_OTHER;
465 if (s_reload == n_reloads)
467 #ifdef SECONDARY_MEMORY_NEEDED
468 /* If we need a memory location to copy between the two reload regs,
469 set it up now. Note that we do the input case before making
470 the reload and the output case after. This is due to the
471 way reloads are output. */
473 if (in_p && icode == CODE_FOR_nothing
474 && SECONDARY_MEMORY_NEEDED (rclass, reload_class, mode))
476 get_secondary_mem (x, reload_mode, opnum, type);
478 /* We may have just added new reloads. Make sure we add
479 the new reload at the end. */
480 s_reload = n_reloads;
484 /* We need to make a new secondary reload for this register class. */
485 rld[s_reload].in = rld[s_reload].out = 0;
486 rld[s_reload].rclass = rclass;
488 rld[s_reload].inmode = in_p ? mode : VOIDmode;
489 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
490 rld[s_reload].reg_rtx = 0;
491 rld[s_reload].optional = optional;
492 rld[s_reload].inc = 0;
493 /* Maybe we could combine these, but it seems too tricky. */
494 rld[s_reload].nocombine = 1;
495 rld[s_reload].in_reg = 0;
496 rld[s_reload].out_reg = 0;
497 rld[s_reload].opnum = opnum;
498 rld[s_reload].when_needed = secondary_type;
499 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
500 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
501 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
502 rld[s_reload].secondary_out_icode
503 = ! in_p ? t_icode : CODE_FOR_nothing;
504 rld[s_reload].secondary_p = 1;
508 #ifdef SECONDARY_MEMORY_NEEDED
509 if (! in_p && icode == CODE_FOR_nothing
510 && SECONDARY_MEMORY_NEEDED (reload_class, rclass, mode))
511 get_secondary_mem (x, mode, opnum, type);
519 /* If a secondary reload is needed, return its class. If both an intermediate
520 register and a scratch register is needed, we return the class of the
521 intermediate register. */
523 secondary_reload_class (bool in_p, reg_class_t rclass, enum machine_mode mode,
526 enum insn_code icode;
527 secondary_reload_info sri;
529 sri.icode = CODE_FOR_nothing;
532 = (enum reg_class) targetm.secondary_reload (in_p, x, rclass, mode, &sri);
533 icode = (enum insn_code) sri.icode;
535 /* If there are no secondary reloads at all, we return NO_REGS.
536 If an intermediate register is needed, we return its class. */
537 if (icode == CODE_FOR_nothing || rclass != NO_REGS)
540 /* No intermediate register is needed, but we have a special reload
541 pattern, which we assume for now needs a scratch register. */
542 return scratch_reload_class (icode);
545 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
546 three operands, verify that operand 2 is an output operand, and return
548 ??? We'd like to be able to handle any pattern with at least 2 operands,
549 for zero or more scratch registers, but that needs more infrastructure. */
551 scratch_reload_class (enum insn_code icode)
553 const char *scratch_constraint;
555 enum reg_class rclass;
557 gcc_assert (insn_data[(int) icode].n_operands == 3);
558 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
559 gcc_assert (*scratch_constraint == '=');
560 scratch_constraint++;
561 if (*scratch_constraint == '&')
562 scratch_constraint++;
563 scratch_letter = *scratch_constraint;
564 if (scratch_letter == 'r')
566 rclass = REG_CLASS_FROM_CONSTRAINT ((unsigned char) scratch_letter,
568 gcc_assert (rclass != NO_REGS);
572 #ifdef SECONDARY_MEMORY_NEEDED
574 /* Return a memory location that will be used to copy X in mode MODE.
575 If we haven't already made a location for this mode in this insn,
576 call find_reloads_address on the location being returned. */
579 get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
580 int opnum, enum reload_type type)
585 /* By default, if MODE is narrower than a word, widen it to a word.
586 This is required because most machines that require these memory
587 locations do not support short load and stores from all registers
588 (e.g., FP registers). */
590 #ifdef SECONDARY_MEMORY_NEEDED_MODE
591 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
593 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
594 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
597 /* If we already have made a MEM for this operand in MODE, return it. */
598 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
599 return secondary_memlocs_elim[(int) mode][opnum];
601 /* If this is the first time we've tried to get a MEM for this mode,
602 allocate a new one. `something_changed' in reload will get set
603 by noticing that the frame size has changed. */
605 if (secondary_memlocs[(int) mode] == 0)
607 #ifdef SECONDARY_MEMORY_NEEDED_RTX
608 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
610 secondary_memlocs[(int) mode]
611 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
615 /* Get a version of the address doing any eliminations needed. If that
616 didn't give us a new MEM, make a new one if it isn't valid. */
618 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
619 mem_valid = strict_memory_address_addr_space_p (mode, XEXP (loc, 0),
620 MEM_ADDR_SPACE (loc));
622 if (! mem_valid && loc == secondary_memlocs[(int) mode])
623 loc = copy_rtx (loc);
625 /* The only time the call below will do anything is if the stack
626 offset is too large. In that case IND_LEVELS doesn't matter, so we
627 can just pass a zero. Adjust the type to be the address of the
628 corresponding object. If the address was valid, save the eliminated
629 address. If it wasn't valid, we need to make a reload each time, so
634 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
635 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
638 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
642 secondary_memlocs_elim[(int) mode][opnum] = loc;
643 if (secondary_memlocs_elim_used <= (int)mode)
644 secondary_memlocs_elim_used = (int)mode + 1;
648 /* Clear any secondary memory locations we've made. */
651 clear_secondary_mem (void)
653 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
655 #endif /* SECONDARY_MEMORY_NEEDED */
658 /* Find the largest class which has at least one register valid in
659 mode INNER, and which for every such register, that register number
660 plus N is also valid in OUTER (if in range) and is cheap to move
661 into REGNO. Such a class must exist. */
663 static enum reg_class
664 find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED,
665 enum machine_mode inner ATTRIBUTE_UNUSED, int n,
666 unsigned int dest_regno ATTRIBUTE_UNUSED)
671 enum reg_class best_class = NO_REGS;
672 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
673 unsigned int best_size = 0;
676 for (rclass = 1; rclass < N_REG_CLASSES; rclass++)
680 for (regno = 0; regno < FIRST_PSEUDO_REGISTER - n && ! bad; regno++)
681 if (TEST_HARD_REG_BIT (reg_class_contents[rclass], regno))
683 if (HARD_REGNO_MODE_OK (regno, inner))
686 if (! TEST_HARD_REG_BIT (reg_class_contents[rclass], regno + n)
687 || ! HARD_REGNO_MODE_OK (regno + n, outer))
694 cost = register_move_cost (outer, (enum reg_class) rclass, dest_class);
696 if ((reg_class_size[rclass] > best_size
697 && (best_cost < 0 || best_cost >= cost))
700 best_class = (enum reg_class) rclass;
701 best_size = reg_class_size[rclass];
702 best_cost = register_move_cost (outer, (enum reg_class) rclass,
707 gcc_assert (best_size != 0);
712 /* Return the number of a previously made reload that can be combined with
713 a new one, or n_reloads if none of the existing reloads can be used.
714 OUT, RCLASS, TYPE and OPNUM are the same arguments as passed to
715 push_reload, they determine the kind of the new reload that we try to
716 combine. P_IN points to the corresponding value of IN, which can be
717 modified by this function.
718 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
721 find_reusable_reload (rtx *p_in, rtx out, enum reg_class rclass,
722 enum reload_type type, int opnum, int dont_share)
726 /* We can't merge two reloads if the output of either one is
729 if (earlyclobber_operand_p (out))
732 /* We can use an existing reload if the class is right
733 and at least one of IN and OUT is a match
734 and the other is at worst neutral.
735 (A zero compared against anything is neutral.)
737 For targets with small register classes, don't use existing reloads
738 unless they are for the same thing since that can cause us to need
739 more reload registers than we otherwise would. */
741 for (i = 0; i < n_reloads; i++)
742 if ((reg_class_subset_p (rclass, rld[i].rclass)
743 || reg_class_subset_p (rld[i].rclass, rclass))
744 /* If the existing reload has a register, it must fit our class. */
745 && (rld[i].reg_rtx == 0
746 || TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
747 true_regnum (rld[i].reg_rtx)))
748 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
749 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
750 || (out != 0 && MATCHES (rld[i].out, out)
751 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
752 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
753 && (small_register_class_p (rclass)
754 || targetm.small_register_classes_for_mode_p (VOIDmode))
755 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
758 /* Reloading a plain reg for input can match a reload to postincrement
759 that reg, since the postincrement's value is the right value.
760 Likewise, it can match a preincrement reload, since we regard
761 the preincrementation as happening before any ref in this insn
763 for (i = 0; i < n_reloads; i++)
764 if ((reg_class_subset_p (rclass, rld[i].rclass)
765 || reg_class_subset_p (rld[i].rclass, rclass))
766 /* If the existing reload has a register, it must fit our
768 && (rld[i].reg_rtx == 0
769 || TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
770 true_regnum (rld[i].reg_rtx)))
771 && out == 0 && rld[i].out == 0 && rld[i].in != 0
773 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC
774 && MATCHES (XEXP (rld[i].in, 0), in))
775 || (REG_P (rld[i].in)
776 && GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC
777 && MATCHES (XEXP (in, 0), rld[i].in)))
778 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
779 && (small_register_class_p (rclass)
780 || targetm.small_register_classes_for_mode_p (VOIDmode))
781 && MERGABLE_RELOADS (type, rld[i].when_needed,
782 opnum, rld[i].opnum))
784 /* Make sure reload_in ultimately has the increment,
785 not the plain register. */
793 /* Return true if X is a SUBREG that will need reloading of its SUBREG_REG
794 expression. MODE is the mode that X will be used in. OUTPUT is true if
795 the function is invoked for the output part of an enclosing reload. */
798 reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, bool output)
802 /* Only SUBREGs are problematical. */
803 if (GET_CODE (x) != SUBREG)
806 inner = SUBREG_REG (x);
808 /* If INNER is a constant or PLUS, then INNER will need reloading. */
809 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
812 /* If INNER is not a hard register, then INNER will not need reloading. */
813 if (!(REG_P (inner) && HARD_REGISTER_P (inner)))
816 /* If INNER is not ok for MODE, then INNER will need reloading. */
817 if (!HARD_REGNO_MODE_OK (subreg_regno (x), mode))
820 /* If this is for an output, and the outer part is a word or smaller,
821 INNER is larger than a word and the number of registers in INNER is
822 not the same as the number of words in INNER, then INNER will need
823 reloading (with an in-out reload). */
825 && GET_MODE_SIZE (mode) <= UNITS_PER_WORD
826 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
827 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
828 != (int) hard_regno_nregs[REGNO (inner)][GET_MODE (inner)]));
831 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
832 requiring an extra reload register. The caller has already found that
833 IN contains some reference to REGNO, so check that we can produce the
834 new value in a single step. E.g. if we have
835 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
836 instruction that adds one to a register, this should succeed.
837 However, if we have something like
838 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
839 needs to be loaded into a register first, we need a separate reload
841 Such PLUS reloads are generated by find_reload_address_part.
842 The out-of-range PLUS expressions are usually introduced in the instruction
843 patterns by register elimination and substituting pseudos without a home
844 by their function-invariant equivalences. */
846 can_reload_into (rtx in, int regno, enum machine_mode mode)
850 struct recog_data save_recog_data;
852 /* For matching constraints, we often get notional input reloads where
853 we want to use the original register as the reload register. I.e.
854 technically this is a non-optional input-output reload, but IN is
855 already a valid register, and has been chosen as the reload register.
856 Speed this up, since it trivially works. */
860 /* To test MEMs properly, we'd have to take into account all the reloads
861 that are already scheduled, which can become quite complicated.
862 And since we've already handled address reloads for this MEM, it
863 should always succeed anyway. */
867 /* If we can make a simple SET insn that does the job, everything should
869 dst = gen_rtx_REG (mode, regno);
870 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
871 save_recog_data = recog_data;
872 if (recog_memoized (test_insn) >= 0)
874 extract_insn (test_insn);
875 r = constrain_operands (1);
877 recog_data = save_recog_data;
881 /* Record one reload that needs to be performed.
882 IN is an rtx saying where the data are to be found before this instruction.
883 OUT says where they must be stored after the instruction.
884 (IN is zero for data not read, and OUT is zero for data not written.)
885 INLOC and OUTLOC point to the places in the instructions where
886 IN and OUT were found.
887 If IN and OUT are both nonzero, it means the same register must be used
888 to reload both IN and OUT.
890 RCLASS is a register class required for the reloaded data.
891 INMODE is the machine mode that the instruction requires
892 for the reg that replaces IN and OUTMODE is likewise for OUT.
894 If IN is zero, then OUT's location and mode should be passed as
897 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
899 OPTIONAL nonzero means this reload does not need to be performed:
900 it can be discarded if that is more convenient.
902 OPNUM and TYPE say what the purpose of this reload is.
904 The return value is the reload-number for this reload.
906 If both IN and OUT are nonzero, in some rare cases we might
907 want to make two separate reloads. (Actually we never do this now.)
908 Therefore, the reload-number for OUT is stored in
909 output_reloadnum when we return; the return value applies to IN.
910 Usually (presently always), when IN and OUT are nonzero,
911 the two reload-numbers are equal, but the caller should be careful to
915 push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
916 enum reg_class rclass, enum machine_mode inmode,
917 enum machine_mode outmode, int strict_low, int optional,
918 int opnum, enum reload_type type)
922 int dont_remove_subreg = 0;
923 #ifdef LIMIT_RELOAD_CLASS
924 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
926 int secondary_in_reload = -1, secondary_out_reload = -1;
927 enum insn_code secondary_in_icode = CODE_FOR_nothing;
928 enum insn_code secondary_out_icode = CODE_FOR_nothing;
930 /* INMODE and/or OUTMODE could be VOIDmode if no mode
931 has been specified for the operand. In that case,
932 use the operand's mode as the mode to reload. */
933 if (inmode == VOIDmode && in != 0)
934 inmode = GET_MODE (in);
935 if (outmode == VOIDmode && out != 0)
936 outmode = GET_MODE (out);
938 /* If find_reloads and friends until now missed to replace a pseudo
939 with a constant of reg_equiv_constant something went wrong
941 Note that it can't simply be done here if we missed it earlier
942 since the constant might need to be pushed into the literal pool
943 and the resulting memref would probably need further
945 if (in != 0 && REG_P (in))
947 int regno = REGNO (in);
949 gcc_assert (regno < FIRST_PSEUDO_REGISTER
950 || reg_renumber[regno] >= 0
951 || reg_equiv_constant (regno) == NULL_RTX);
954 /* reg_equiv_constant only contains constants which are obviously
955 not appropriate as destination. So if we would need to replace
956 the destination pseudo with a constant we are in real
958 if (out != 0 && REG_P (out))
960 int regno = REGNO (out);
962 gcc_assert (regno < FIRST_PSEUDO_REGISTER
963 || reg_renumber[regno] >= 0
964 || reg_equiv_constant (regno) == NULL_RTX);
967 /* If we have a read-write operand with an address side-effect,
968 change either IN or OUT so the side-effect happens only once. */
969 if (in != 0 && out != 0 && MEM_P (in) && rtx_equal_p (in, out))
970 switch (GET_CODE (XEXP (in, 0)))
972 case POST_INC: case POST_DEC: case POST_MODIFY:
973 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
976 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
977 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
984 /* If we are reloading a (SUBREG constant ...), really reload just the
985 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
986 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
987 a pseudo and hence will become a MEM) with M1 wider than M2 and the
988 register is a pseudo, also reload the inside expression.
989 For machines that extend byte loads, do this for any SUBREG of a pseudo
990 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
991 M2 is an integral mode that gets extended when loaded.
992 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
993 where either M1 is not valid for R or M2 is wider than a word but we
994 only need one register to store an M2-sized quantity in R.
995 (However, if OUT is nonzero, we need to reload the reg *and*
996 the subreg, so do nothing here, and let following statement handle it.)
998 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
999 we can't handle it here because CONST_INT does not indicate a mode.
1001 Similarly, we must reload the inside expression if we have a
1002 STRICT_LOW_PART (presumably, in == out in this case).
1004 Also reload the inner expression if it does not require a secondary
1005 reload but the SUBREG does.
1007 Finally, reload the inner expression if it is a register that is in
1008 the class whose registers cannot be referenced in a different size
1009 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
1010 cannot reload just the inside since we might end up with the wrong
1011 register class. But if it is inside a STRICT_LOW_PART, we have
1012 no choice, so we hope we do get the right register class there. */
1014 if (in != 0 && GET_CODE (in) == SUBREG
1015 && (subreg_lowpart_p (in) || strict_low)
1016 #ifdef CANNOT_CHANGE_MODE_CLASS
1017 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, rclass)
1019 && contains_reg_of_mode[(int) rclass][(int) GET_MODE (SUBREG_REG (in))]
1020 && (CONSTANT_P (SUBREG_REG (in))
1021 || GET_CODE (SUBREG_REG (in)) == PLUS
1023 || (((REG_P (SUBREG_REG (in))
1024 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1025 || MEM_P (SUBREG_REG (in)))
1026 && ((GET_MODE_PRECISION (inmode)
1027 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (in))))
1028 #ifdef LOAD_EXTEND_OP
1029 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1030 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1032 && (GET_MODE_PRECISION (inmode)
1033 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (in))))
1034 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
1035 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != UNKNOWN)
1037 #ifdef WORD_REGISTER_OPERATIONS
1038 || ((GET_MODE_PRECISION (inmode)
1039 < GET_MODE_PRECISION (GET_MODE (SUBREG_REG (in))))
1040 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1041 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1045 || (REG_P (SUBREG_REG (in))
1046 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1047 /* The case where out is nonzero
1048 is handled differently in the following statement. */
1049 && (out == 0 || subreg_lowpart_p (in))
1050 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1051 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1053 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1055 != (int) hard_regno_nregs[REGNO (SUBREG_REG (in))]
1056 [GET_MODE (SUBREG_REG (in))]))
1057 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1058 || (secondary_reload_class (1, rclass, inmode, in) != NO_REGS
1059 && (secondary_reload_class (1, rclass, GET_MODE (SUBREG_REG (in)),
1062 #ifdef CANNOT_CHANGE_MODE_CLASS
1063 || (REG_P (SUBREG_REG (in))
1064 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1065 && REG_CANNOT_CHANGE_MODE_P
1066 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1070 #ifdef LIMIT_RELOAD_CLASS
1071 in_subreg_loc = inloc;
1073 inloc = &SUBREG_REG (in);
1075 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1077 /* This is supposed to happen only for paradoxical subregs made by
1078 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1079 gcc_assert (GET_MODE_SIZE (GET_MODE (in)) <= GET_MODE_SIZE (inmode));
1081 inmode = GET_MODE (in);
1084 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1085 where M1 is not valid for R if it was not handled by the code above.
1087 Similar issue for (SUBREG constant ...) if it was not handled by the
1088 code above. This can happen if SUBREG_BYTE != 0.
1090 However, we must reload the inner reg *as well as* the subreg in
1093 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, false))
1095 enum reg_class in_class = rclass;
1097 if (REG_P (SUBREG_REG (in)))
1099 = find_valid_class (inmode, GET_MODE (SUBREG_REG (in)),
1100 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1101 GET_MODE (SUBREG_REG (in)),
1104 REGNO (SUBREG_REG (in)));
1106 /* This relies on the fact that emit_reload_insns outputs the
1107 instructions for input reloads of type RELOAD_OTHER in the same
1108 order as the reloads. Thus if the outer reload is also of type
1109 RELOAD_OTHER, we are guaranteed that this inner reload will be
1110 output before the outer reload. */
1111 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1112 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1113 dont_remove_subreg = 1;
1116 /* Similarly for paradoxical and problematical SUBREGs on the output.
1117 Note that there is no reason we need worry about the previous value
1118 of SUBREG_REG (out); even if wider than out, storing in a subreg is
1119 entitled to clobber it all (except in the case of a word mode subreg
1120 or of a STRICT_LOW_PART, in that latter case the constraint should
1121 label it input-output.) */
1122 if (out != 0 && GET_CODE (out) == SUBREG
1123 && (subreg_lowpart_p (out) || strict_low)
1124 #ifdef CANNOT_CHANGE_MODE_CLASS
1125 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, rclass)
1127 && contains_reg_of_mode[(int) rclass][(int) GET_MODE (SUBREG_REG (out))]
1128 && (CONSTANT_P (SUBREG_REG (out))
1130 || (((REG_P (SUBREG_REG (out))
1131 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1132 || MEM_P (SUBREG_REG (out)))
1133 && ((GET_MODE_PRECISION (outmode)
1134 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (out))))
1135 #ifdef WORD_REGISTER_OPERATIONS
1136 || ((GET_MODE_PRECISION (outmode)
1137 < GET_MODE_PRECISION (GET_MODE (SUBREG_REG (out))))
1138 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1139 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1143 || (REG_P (SUBREG_REG (out))
1144 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1145 /* The case of a word mode subreg
1146 is handled differently in the following statement. */
1147 && ! (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1148 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1150 && ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode))
1151 || (secondary_reload_class (0, rclass, outmode, out) != NO_REGS
1152 && (secondary_reload_class (0, rclass, GET_MODE (SUBREG_REG (out)),
1155 #ifdef CANNOT_CHANGE_MODE_CLASS
1156 || (REG_P (SUBREG_REG (out))
1157 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1158 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1159 GET_MODE (SUBREG_REG (out)),
1164 #ifdef LIMIT_RELOAD_CLASS
1165 out_subreg_loc = outloc;
1167 outloc = &SUBREG_REG (out);
1169 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1170 gcc_assert (!MEM_P (out)
1171 || GET_MODE_SIZE (GET_MODE (out))
1172 <= GET_MODE_SIZE (outmode));
1174 outmode = GET_MODE (out);
1177 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1178 where either M1 is not valid for R or M2 is wider than a word but we
1179 only need one register to store an M2-sized quantity in R.
1181 However, we must reload the inner reg *as well as* the subreg in
1182 that case and the inner reg is an in-out reload. */
1184 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, true))
1186 enum reg_class in_out_class
1187 = find_valid_class (outmode, GET_MODE (SUBREG_REG (out)),
1188 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1189 GET_MODE (SUBREG_REG (out)),
1192 REGNO (SUBREG_REG (out)));
1194 /* This relies on the fact that emit_reload_insns outputs the
1195 instructions for output reloads of type RELOAD_OTHER in reverse
1196 order of the reloads. Thus if the outer reload is also of type
1197 RELOAD_OTHER, we are guaranteed that this inner reload will be
1198 output after the outer reload. */
1199 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1200 &SUBREG_REG (out), in_out_class, VOIDmode, VOIDmode,
1201 0, 0, opnum, RELOAD_OTHER);
1202 dont_remove_subreg = 1;
1205 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1206 if (in != 0 && out != 0 && MEM_P (out)
1207 && (REG_P (in) || MEM_P (in) || GET_CODE (in) == PLUS)
1208 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1211 /* If IN is a SUBREG of a hard register, make a new REG. This
1212 simplifies some of the cases below. */
1214 if (in != 0 && GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))
1215 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1216 && ! dont_remove_subreg)
1217 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1219 /* Similarly for OUT. */
1220 if (out != 0 && GET_CODE (out) == SUBREG
1221 && REG_P (SUBREG_REG (out))
1222 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1223 && ! dont_remove_subreg)
1224 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1226 /* Narrow down the class of register wanted if that is
1227 desirable on this machine for efficiency. */
1229 reg_class_t preferred_class = rclass;
1232 preferred_class = targetm.preferred_reload_class (in, rclass);
1234 /* Output reloads may need analogous treatment, different in detail. */
1237 = targetm.preferred_output_reload_class (out, preferred_class);
1239 /* Discard what the target said if we cannot do it. */
1240 if (preferred_class != NO_REGS
1241 || (optional && type == RELOAD_FOR_OUTPUT))
1242 rclass = (enum reg_class) preferred_class;
1245 /* Make sure we use a class that can handle the actual pseudo
1246 inside any subreg. For example, on the 386, QImode regs
1247 can appear within SImode subregs. Although GENERAL_REGS
1248 can handle SImode, QImode needs a smaller class. */
1249 #ifdef LIMIT_RELOAD_CLASS
1251 rclass = LIMIT_RELOAD_CLASS (inmode, rclass);
1252 else if (in != 0 && GET_CODE (in) == SUBREG)
1253 rclass = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), rclass);
1256 rclass = LIMIT_RELOAD_CLASS (outmode, rclass);
1257 if (out != 0 && GET_CODE (out) == SUBREG)
1258 rclass = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), rclass);
1261 /* Verify that this class is at least possible for the mode that
1263 if (this_insn_is_asm)
1265 enum machine_mode mode;
1266 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1270 if (mode == VOIDmode)
1272 error_for_asm (this_insn, "cannot reload integer constant "
1273 "operand in %<asm%>");
1278 outmode = word_mode;
1280 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1281 if (HARD_REGNO_MODE_OK (i, mode)
1282 && in_hard_reg_set_p (reg_class_contents[(int) rclass], mode, i))
1284 if (i == FIRST_PSEUDO_REGISTER)
1286 error_for_asm (this_insn, "impossible register constraint "
1288 /* Avoid further trouble with this insn. */
1289 PATTERN (this_insn) = gen_rtx_USE (VOIDmode, const0_rtx);
1290 /* We used to continue here setting class to ALL_REGS, but it triggers
1291 sanity check on i386 for:
1292 void foo(long double d)
1296 Returning zero here ought to be safe as we take care in
1297 find_reloads to not process the reloads when instruction was
1304 /* Optional output reloads are always OK even if we have no register class,
1305 since the function of these reloads is only to have spill_reg_store etc.
1306 set, so that the storing insn can be deleted later. */
1307 gcc_assert (rclass != NO_REGS
1308 || (optional != 0 && type == RELOAD_FOR_OUTPUT));
1310 i = find_reusable_reload (&in, out, rclass, type, opnum, dont_share);
1314 /* See if we need a secondary reload register to move between CLASS
1315 and IN or CLASS and OUT. Get the icode and push any required reloads
1316 needed for each of them if so. */
1320 = push_secondary_reload (1, in, opnum, optional, rclass, inmode, type,
1321 &secondary_in_icode, NULL);
1322 if (out != 0 && GET_CODE (out) != SCRATCH)
1323 secondary_out_reload
1324 = push_secondary_reload (0, out, opnum, optional, rclass, outmode,
1325 type, &secondary_out_icode, NULL);
1327 /* We found no existing reload suitable for re-use.
1328 So add an additional reload. */
1330 #ifdef SECONDARY_MEMORY_NEEDED
1331 /* If a memory location is needed for the copy, make one. */
1334 || (GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))))
1335 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1336 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1338 get_secondary_mem (in, inmode, opnum, type);
1344 rld[i].rclass = rclass;
1345 rld[i].inmode = inmode;
1346 rld[i].outmode = outmode;
1348 rld[i].optional = optional;
1350 rld[i].nocombine = 0;
1351 rld[i].in_reg = inloc ? *inloc : 0;
1352 rld[i].out_reg = outloc ? *outloc : 0;
1353 rld[i].opnum = opnum;
1354 rld[i].when_needed = type;
1355 rld[i].secondary_in_reload = secondary_in_reload;
1356 rld[i].secondary_out_reload = secondary_out_reload;
1357 rld[i].secondary_in_icode = secondary_in_icode;
1358 rld[i].secondary_out_icode = secondary_out_icode;
1359 rld[i].secondary_p = 0;
1363 #ifdef SECONDARY_MEMORY_NEEDED
1366 || (GET_CODE (out) == SUBREG && REG_P (SUBREG_REG (out))))
1367 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1368 && SECONDARY_MEMORY_NEEDED (rclass,
1369 REGNO_REG_CLASS (reg_or_subregno (out)),
1371 get_secondary_mem (out, outmode, opnum, type);
1376 /* We are reusing an existing reload,
1377 but we may have additional information for it.
1378 For example, we may now have both IN and OUT
1379 while the old one may have just one of them. */
1381 /* The modes can be different. If they are, we want to reload in
1382 the larger mode, so that the value is valid for both modes. */
1383 if (inmode != VOIDmode
1384 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1385 rld[i].inmode = inmode;
1386 if (outmode != VOIDmode
1387 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1388 rld[i].outmode = outmode;
1391 rtx in_reg = inloc ? *inloc : 0;
1392 /* If we merge reloads for two distinct rtl expressions that
1393 are identical in content, there might be duplicate address
1394 reloads. Remove the extra set now, so that if we later find
1395 that we can inherit this reload, we can get rid of the
1396 address reloads altogether.
1398 Do not do this if both reloads are optional since the result
1399 would be an optional reload which could potentially leave
1400 unresolved address replacements.
1402 It is not sufficient to call transfer_replacements since
1403 choose_reload_regs will remove the replacements for address
1404 reloads of inherited reloads which results in the same
1406 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1407 && ! (rld[i].optional && optional))
1409 /* We must keep the address reload with the lower operand
1411 if (opnum > rld[i].opnum)
1413 remove_address_replacements (in);
1415 in_reg = rld[i].in_reg;
1418 remove_address_replacements (rld[i].in);
1420 /* When emitting reloads we don't necessarily look at the in-
1421 and outmode, but also directly at the operands (in and out).
1422 So we can't simply overwrite them with whatever we have found
1423 for this (to-be-merged) reload, we have to "merge" that too.
1424 Reusing another reload already verified that we deal with the
1425 same operands, just possibly in different modes. So we
1426 overwrite the operands only when the new mode is larger.
1427 See also PR33613. */
1429 || GET_MODE_SIZE (GET_MODE (in))
1430 > GET_MODE_SIZE (GET_MODE (rld[i].in)))
1434 && GET_MODE_SIZE (GET_MODE (in_reg))
1435 > GET_MODE_SIZE (GET_MODE (rld[i].in_reg))))
1436 rld[i].in_reg = in_reg;
1442 && GET_MODE_SIZE (GET_MODE (out))
1443 > GET_MODE_SIZE (GET_MODE (rld[i].out))))
1447 || GET_MODE_SIZE (GET_MODE (*outloc))
1448 > GET_MODE_SIZE (GET_MODE (rld[i].out_reg))))
1449 rld[i].out_reg = *outloc;
1451 if (reg_class_subset_p (rclass, rld[i].rclass))
1452 rld[i].rclass = rclass;
1453 rld[i].optional &= optional;
1454 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1455 opnum, rld[i].opnum))
1456 rld[i].when_needed = RELOAD_OTHER;
1457 rld[i].opnum = MIN (rld[i].opnum, opnum);
1460 /* If the ostensible rtx being reloaded differs from the rtx found
1461 in the location to substitute, this reload is not safe to combine
1462 because we cannot reliably tell whether it appears in the insn. */
1464 if (in != 0 && in != *inloc)
1465 rld[i].nocombine = 1;
1468 /* This was replaced by changes in find_reloads_address_1 and the new
1469 function inc_for_reload, which go with a new meaning of reload_inc. */
1471 /* If this is an IN/OUT reload in an insn that sets the CC,
1472 it must be for an autoincrement. It doesn't work to store
1473 the incremented value after the insn because that would clobber the CC.
1474 So we must do the increment of the value reloaded from,
1475 increment it, store it back, then decrement again. */
1476 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1480 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1481 /* If we did not find a nonzero amount-to-increment-by,
1482 that contradicts the belief that IN is being incremented
1483 in an address in this insn. */
1484 gcc_assert (rld[i].inc != 0);
1488 /* If we will replace IN and OUT with the reload-reg,
1489 record where they are located so that substitution need
1490 not do a tree walk. */
1492 if (replace_reloads)
1496 struct replacement *r = &replacements[n_replacements++];
1501 if (outloc != 0 && outloc != inloc)
1503 struct replacement *r = &replacements[n_replacements++];
1510 /* If this reload is just being introduced and it has both
1511 an incoming quantity and an outgoing quantity that are
1512 supposed to be made to match, see if either one of the two
1513 can serve as the place to reload into.
1515 If one of them is acceptable, set rld[i].reg_rtx
1518 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1520 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1523 earlyclobber_operand_p (out));
1525 /* If the outgoing register already contains the same value
1526 as the incoming one, we can dispense with loading it.
1527 The easiest way to tell the caller that is to give a phony
1528 value for the incoming operand (same as outgoing one). */
1529 if (rld[i].reg_rtx == out
1530 && (REG_P (in) || CONSTANT_P (in))
1531 && 0 != find_equiv_reg (in, this_insn, NO_REGS, REGNO (out),
1532 static_reload_reg_p, i, inmode))
1536 /* If this is an input reload and the operand contains a register that
1537 dies in this insn and is used nowhere else, see if it is the right class
1538 to be used for this reload. Use it if so. (This occurs most commonly
1539 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1540 this if it is also an output reload that mentions the register unless
1541 the output is a SUBREG that clobbers an entire register.
1543 Note that the operand might be one of the spill regs, if it is a
1544 pseudo reg and we are in a block where spilling has not taken place.
1545 But if there is no spilling in this block, that is OK.
1546 An explicitly used hard reg cannot be a spill reg. */
1548 if (rld[i].reg_rtx == 0 && in != 0 && hard_regs_live_known)
1552 enum machine_mode rel_mode = inmode;
1554 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1557 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1558 if (REG_NOTE_KIND (note) == REG_DEAD
1559 && REG_P (XEXP (note, 0))
1560 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1561 && reg_mentioned_p (XEXP (note, 0), in)
1562 /* Check that a former pseudo is valid; see find_dummy_reload. */
1563 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1564 || (! bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR),
1565 ORIGINAL_REGNO (XEXP (note, 0)))
1566 && hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))] == 1))
1567 && ! refers_to_regno_for_reload_p (regno,
1568 end_hard_regno (rel_mode,
1570 PATTERN (this_insn), inloc)
1571 /* If this is also an output reload, IN cannot be used as
1572 the reload register if it is set in this insn unless IN
1574 && (out == 0 || in == out
1575 || ! hard_reg_set_here_p (regno,
1576 end_hard_regno (rel_mode, regno),
1577 PATTERN (this_insn)))
1578 /* ??? Why is this code so different from the previous?
1579 Is there any simple coherent way to describe the two together?
1580 What's going on here. */
1582 || (GET_CODE (in) == SUBREG
1583 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1585 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1586 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1587 /* Make sure the operand fits in the reg that dies. */
1588 && (GET_MODE_SIZE (rel_mode)
1589 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1590 && HARD_REGNO_MODE_OK (regno, inmode)
1591 && HARD_REGNO_MODE_OK (regno, outmode))
1594 unsigned int nregs = MAX (hard_regno_nregs[regno][inmode],
1595 hard_regno_nregs[regno][outmode]);
1597 for (offs = 0; offs < nregs; offs++)
1598 if (fixed_regs[regno + offs]
1599 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
1604 && (! (refers_to_regno_for_reload_p
1605 (regno, end_hard_regno (inmode, regno), in, (rtx *) 0))
1606 || can_reload_into (in, regno, inmode)))
1608 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1615 output_reloadnum = i;
1620 /* Record an additional place we must replace a value
1621 for which we have already recorded a reload.
1622 RELOADNUM is the value returned by push_reload
1623 when the reload was recorded.
1624 This is used in insn patterns that use match_dup. */
1627 push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1629 if (replace_reloads)
1631 struct replacement *r = &replacements[n_replacements++];
1632 r->what = reloadnum;
1638 /* Duplicate any replacement we have recorded to apply at
1639 location ORIG_LOC to also be performed at DUP_LOC.
1640 This is used in insn patterns that use match_dup. */
1643 dup_replacements (rtx *dup_loc, rtx *orig_loc)
1645 int i, n = n_replacements;
1647 for (i = 0; i < n; i++)
1649 struct replacement *r = &replacements[i];
1650 if (r->where == orig_loc)
1651 push_replacement (dup_loc, r->what, r->mode);
1655 /* Transfer all replacements that used to be in reload FROM to be in
1659 transfer_replacements (int to, int from)
1663 for (i = 0; i < n_replacements; i++)
1664 if (replacements[i].what == from)
1665 replacements[i].what = to;
1668 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1669 or a subpart of it. If we have any replacements registered for IN_RTX,
1670 cancel the reloads that were supposed to load them.
1671 Return nonzero if we canceled any reloads. */
1673 remove_address_replacements (rtx in_rtx)
1676 char reload_flags[MAX_RELOADS];
1677 int something_changed = 0;
1679 memset (reload_flags, 0, sizeof reload_flags);
1680 for (i = 0, j = 0; i < n_replacements; i++)
1682 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1683 reload_flags[replacements[i].what] |= 1;
1686 replacements[j++] = replacements[i];
1687 reload_flags[replacements[i].what] |= 2;
1690 /* Note that the following store must be done before the recursive calls. */
1693 for (i = n_reloads - 1; i >= 0; i--)
1695 if (reload_flags[i] == 1)
1697 deallocate_reload_reg (i);
1698 remove_address_replacements (rld[i].in);
1700 something_changed = 1;
1703 return something_changed;
1706 /* If there is only one output reload, and it is not for an earlyclobber
1707 operand, try to combine it with a (logically unrelated) input reload
1708 to reduce the number of reload registers needed.
1710 This is safe if the input reload does not appear in
1711 the value being output-reloaded, because this implies
1712 it is not needed any more once the original insn completes.
1714 If that doesn't work, see we can use any of the registers that
1715 die in this insn as a reload register. We can if it is of the right
1716 class and does not appear in the value being output-reloaded. */
1719 combine_reloads (void)
1722 int output_reload = -1;
1723 int secondary_out = -1;
1726 /* Find the output reload; return unless there is exactly one
1727 and that one is mandatory. */
1729 for (i = 0; i < n_reloads; i++)
1730 if (rld[i].out != 0)
1732 if (output_reload >= 0)
1737 if (output_reload < 0 || rld[output_reload].optional)
1740 /* An input-output reload isn't combinable. */
1742 if (rld[output_reload].in != 0)
1745 /* If this reload is for an earlyclobber operand, we can't do anything. */
1746 if (earlyclobber_operand_p (rld[output_reload].out))
1749 /* If there is a reload for part of the address of this operand, we would
1750 need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1751 its life to the point where doing this combine would not lower the
1752 number of spill registers needed. */
1753 for (i = 0; i < n_reloads; i++)
1754 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1755 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1756 && rld[i].opnum == rld[output_reload].opnum)
1759 /* Check each input reload; can we combine it? */
1761 for (i = 0; i < n_reloads; i++)
1762 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1763 /* Life span of this reload must not extend past main insn. */
1764 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1765 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1766 && rld[i].when_needed != RELOAD_OTHER
1767 && (ira_reg_class_max_nregs [(int)rld[i].rclass][(int) rld[i].inmode]
1768 == ira_reg_class_max_nregs [(int) rld[output_reload].rclass]
1769 [(int) rld[output_reload].outmode])
1771 && rld[i].reg_rtx == 0
1772 #ifdef SECONDARY_MEMORY_NEEDED
1773 /* Don't combine two reloads with different secondary
1774 memory locations. */
1775 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1776 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1777 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1778 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1780 && (targetm.small_register_classes_for_mode_p (VOIDmode)
1781 ? (rld[i].rclass == rld[output_reload].rclass)
1782 : (reg_class_subset_p (rld[i].rclass,
1783 rld[output_reload].rclass)
1784 || reg_class_subset_p (rld[output_reload].rclass,
1786 && (MATCHES (rld[i].in, rld[output_reload].out)
1787 /* Args reversed because the first arg seems to be
1788 the one that we imagine being modified
1789 while the second is the one that might be affected. */
1790 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1792 /* However, if the input is a register that appears inside
1793 the output, then we also can't share.
1794 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1795 If the same reload reg is used for both reg 69 and the
1796 result to be stored in memory, then that result
1797 will clobber the address of the memory ref. */
1798 && ! (REG_P (rld[i].in)
1799 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1800 rld[output_reload].out))))
1801 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1802 rld[i].when_needed != RELOAD_FOR_INPUT)
1803 && (reg_class_size[(int) rld[i].rclass]
1804 || targetm.small_register_classes_for_mode_p (VOIDmode))
1805 /* We will allow making things slightly worse by combining an
1806 input and an output, but no worse than that. */
1807 && (rld[i].when_needed == RELOAD_FOR_INPUT
1808 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1812 /* We have found a reload to combine with! */
1813 rld[i].out = rld[output_reload].out;
1814 rld[i].out_reg = rld[output_reload].out_reg;
1815 rld[i].outmode = rld[output_reload].outmode;
1816 /* Mark the old output reload as inoperative. */
1817 rld[output_reload].out = 0;
1818 /* The combined reload is needed for the entire insn. */
1819 rld[i].when_needed = RELOAD_OTHER;
1820 /* If the output reload had a secondary reload, copy it. */
1821 if (rld[output_reload].secondary_out_reload != -1)
1823 rld[i].secondary_out_reload
1824 = rld[output_reload].secondary_out_reload;
1825 rld[i].secondary_out_icode
1826 = rld[output_reload].secondary_out_icode;
1829 #ifdef SECONDARY_MEMORY_NEEDED
1830 /* Copy any secondary MEM. */
1831 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1832 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1833 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1835 /* If required, minimize the register class. */
1836 if (reg_class_subset_p (rld[output_reload].rclass,
1838 rld[i].rclass = rld[output_reload].rclass;
1840 /* Transfer all replacements from the old reload to the combined. */
1841 for (j = 0; j < n_replacements; j++)
1842 if (replacements[j].what == output_reload)
1843 replacements[j].what = i;
1848 /* If this insn has only one operand that is modified or written (assumed
1849 to be the first), it must be the one corresponding to this reload. It
1850 is safe to use anything that dies in this insn for that output provided
1851 that it does not occur in the output (we already know it isn't an
1852 earlyclobber. If this is an asm insn, give up. */
1854 if (INSN_CODE (this_insn) == -1)
1857 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1858 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1859 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1862 /* See if some hard register that dies in this insn and is not used in
1863 the output is the right class. Only works if the register we pick
1864 up can fully hold our output reload. */
1865 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1866 if (REG_NOTE_KIND (note) == REG_DEAD
1867 && REG_P (XEXP (note, 0))
1868 && !reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1869 rld[output_reload].out)
1870 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1871 && HARD_REGNO_MODE_OK (regno, rld[output_reload].outmode)
1872 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].rclass],
1874 && (hard_regno_nregs[regno][rld[output_reload].outmode]
1875 <= hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))])
1876 /* Ensure that a secondary or tertiary reload for this output
1877 won't want this register. */
1878 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1879 || (!(TEST_HARD_REG_BIT
1880 (reg_class_contents[(int) rld[secondary_out].rclass], regno))
1881 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1882 || !(TEST_HARD_REG_BIT
1883 (reg_class_contents[(int) rld[secondary_out].rclass],
1885 && !fixed_regs[regno]
1886 /* Check that a former pseudo is valid; see find_dummy_reload. */
1887 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1888 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR),
1889 ORIGINAL_REGNO (XEXP (note, 0)))
1890 && hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))] == 1)))
1892 rld[output_reload].reg_rtx
1893 = gen_rtx_REG (rld[output_reload].outmode, regno);
1898 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1899 See if one of IN and OUT is a register that may be used;
1900 this is desirable since a spill-register won't be needed.
1901 If so, return the register rtx that proves acceptable.
1903 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1904 RCLASS is the register class required for the reload.
1906 If FOR_REAL is >= 0, it is the number of the reload,
1907 and in some cases when it can be discovered that OUT doesn't need
1908 to be computed, clear out rld[FOR_REAL].out.
1910 If FOR_REAL is -1, this should not be done, because this call
1911 is just to see if a register can be found, not to find and install it.
1913 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1914 puts an additional constraint on being able to use IN for OUT since
1915 IN must not appear elsewhere in the insn (it is assumed that IN itself
1916 is safe from the earlyclobber). */
1919 find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1920 enum machine_mode inmode, enum machine_mode outmode,
1921 reg_class_t rclass, int for_real, int earlyclobber)
1929 /* If operands exceed a word, we can't use either of them
1930 unless they have the same size. */
1931 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1932 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1933 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1936 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1937 respectively refers to a hard register. */
1939 /* Find the inside of any subregs. */
1940 while (GET_CODE (out) == SUBREG)
1942 if (REG_P (SUBREG_REG (out))
1943 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1944 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1945 GET_MODE (SUBREG_REG (out)),
1948 out = SUBREG_REG (out);
1950 while (GET_CODE (in) == SUBREG)
1952 if (REG_P (SUBREG_REG (in))
1953 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1954 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1955 GET_MODE (SUBREG_REG (in)),
1958 in = SUBREG_REG (in);
1961 /* Narrow down the reg class, the same way push_reload will;
1962 otherwise we might find a dummy now, but push_reload won't. */
1964 reg_class_t preferred_class = targetm.preferred_reload_class (in, rclass);
1965 if (preferred_class != NO_REGS)
1966 rclass = (enum reg_class) preferred_class;
1969 /* See if OUT will do. */
1971 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1973 unsigned int regno = REGNO (out) + out_offset;
1974 unsigned int nwords = hard_regno_nregs[regno][outmode];
1977 /* When we consider whether the insn uses OUT,
1978 ignore references within IN. They don't prevent us
1979 from copying IN into OUT, because those refs would
1980 move into the insn that reloads IN.
1982 However, we only ignore IN in its role as this reload.
1983 If the insn uses IN elsewhere and it contains OUT,
1984 that counts. We can't be sure it's the "same" operand
1985 so it might not go through this reload. */
1987 *inloc = const0_rtx;
1989 if (regno < FIRST_PSEUDO_REGISTER
1990 && HARD_REGNO_MODE_OK (regno, outmode)
1991 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1992 PATTERN (this_insn), outloc))
1996 for (i = 0; i < nwords; i++)
1997 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
2003 if (REG_P (real_out))
2006 value = gen_rtx_REG (outmode, regno);
2013 /* Consider using IN if OUT was not acceptable
2014 or if OUT dies in this insn (like the quotient in a divmod insn).
2015 We can't use IN unless it is dies in this insn,
2016 which means we must know accurately which hard regs are live.
2017 Also, the result can't go in IN if IN is used within OUT,
2018 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
2019 if (hard_regs_live_known
2021 && REGNO (in) < FIRST_PSEUDO_REGISTER
2023 || find_reg_note (this_insn, REG_UNUSED, real_out))
2024 && find_reg_note (this_insn, REG_DEAD, real_in)
2025 && !fixed_regs[REGNO (in)]
2026 && HARD_REGNO_MODE_OK (REGNO (in),
2027 /* The only case where out and real_out might
2028 have different modes is where real_out
2029 is a subreg, and in that case, out
2031 (GET_MODE (out) != VOIDmode
2032 ? GET_MODE (out) : outmode))
2033 && (ORIGINAL_REGNO (in) < FIRST_PSEUDO_REGISTER
2034 /* However only do this if we can be sure that this input
2035 operand doesn't correspond with an uninitialized pseudo.
2036 global can assign some hardreg to it that is the same as
2037 the one assigned to a different, also live pseudo (as it
2038 can ignore the conflict). We must never introduce writes
2039 to such hardregs, as they would clobber the other live
2040 pseudo. See PR 20973. */
2041 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR),
2042 ORIGINAL_REGNO (in))
2043 /* Similarly, only do this if we can be sure that the death
2044 note is still valid. global can assign some hardreg to
2045 the pseudo referenced in the note and simultaneously a
2046 subword of this hardreg to a different, also live pseudo,
2047 because only another subword of the hardreg is actually
2048 used in the insn. This cannot happen if the pseudo has
2049 been assigned exactly one hardreg. See PR 33732. */
2050 && hard_regno_nregs[REGNO (in)][GET_MODE (in)] == 1)))
2052 unsigned int regno = REGNO (in) + in_offset;
2053 unsigned int nwords = hard_regno_nregs[regno][inmode];
2055 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
2056 && ! hard_reg_set_here_p (regno, regno + nwords,
2057 PATTERN (this_insn))
2059 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
2060 PATTERN (this_insn), inloc)))
2064 for (i = 0; i < nwords; i++)
2065 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
2071 /* If we were going to use OUT as the reload reg
2072 and changed our mind, it means OUT is a dummy that
2073 dies here. So don't bother copying value to it. */
2074 if (for_real >= 0 && value == real_out)
2075 rld[for_real].out = 0;
2076 if (REG_P (real_in))
2079 value = gen_rtx_REG (inmode, regno);
2087 /* This page contains subroutines used mainly for determining
2088 whether the IN or an OUT of a reload can serve as the
2091 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2094 earlyclobber_operand_p (rtx x)
2098 for (i = 0; i < n_earlyclobbers; i++)
2099 if (reload_earlyclobbers[i] == x)
2105 /* Return 1 if expression X alters a hard reg in the range
2106 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2107 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2108 X should be the body of an instruction. */
2111 hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2113 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2115 rtx op0 = SET_DEST (x);
2117 while (GET_CODE (op0) == SUBREG)
2118 op0 = SUBREG_REG (op0);
2121 unsigned int r = REGNO (op0);
2123 /* See if this reg overlaps range under consideration. */
2125 && end_hard_regno (GET_MODE (op0), r) > beg_regno)
2129 else if (GET_CODE (x) == PARALLEL)
2131 int i = XVECLEN (x, 0) - 1;
2134 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2141 /* Return 1 if ADDR is a valid memory address for mode MODE
2142 in address space AS, and check that each pseudo reg has the
2143 proper kind of hard reg. */
2146 strict_memory_address_addr_space_p (enum machine_mode mode ATTRIBUTE_UNUSED,
2147 rtx addr, addr_space_t as)
2149 #ifdef GO_IF_LEGITIMATE_ADDRESS
2150 gcc_assert (ADDR_SPACE_GENERIC_P (as));
2151 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2157 return targetm.addr_space.legitimate_address_p (mode, addr, 1, as);
2161 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2162 if they are the same hard reg, and has special hacks for
2163 autoincrement and autodecrement.
2164 This is specifically intended for find_reloads to use
2165 in determining whether two operands match.
2166 X is the operand whose number is the lower of the two.
2168 The value is 2 if Y contains a pre-increment that matches
2169 a non-incrementing address in X. */
2171 /* ??? To be completely correct, we should arrange to pass
2172 for X the output operand and for Y the input operand.
2173 For now, we assume that the output operand has the lower number
2174 because that is natural in (SET output (... input ...)). */
2177 operands_match_p (rtx x, rtx y)
2180 RTX_CODE code = GET_CODE (x);
2186 if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x))))
2187 && (REG_P (y) || (GET_CODE (y) == SUBREG
2188 && REG_P (SUBREG_REG (y)))))
2194 i = REGNO (SUBREG_REG (x));
2195 if (i >= FIRST_PSEUDO_REGISTER)
2197 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2198 GET_MODE (SUBREG_REG (x)),
2205 if (GET_CODE (y) == SUBREG)
2207 j = REGNO (SUBREG_REG (y));
2208 if (j >= FIRST_PSEUDO_REGISTER)
2210 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2211 GET_MODE (SUBREG_REG (y)),
2218 /* On a REG_WORDS_BIG_ENDIAN machine, point to the last register of a
2219 multiple hard register group of scalar integer registers, so that
2220 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2222 if (REG_WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2223 && SCALAR_INT_MODE_P (GET_MODE (x))
2224 && i < FIRST_PSEUDO_REGISTER)
2225 i += hard_regno_nregs[i][GET_MODE (x)] - 1;
2226 if (REG_WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2227 && SCALAR_INT_MODE_P (GET_MODE (y))
2228 && j < FIRST_PSEUDO_REGISTER)
2229 j += hard_regno_nregs[j][GET_MODE (y)] - 1;
2233 /* If two operands must match, because they are really a single
2234 operand of an assembler insn, then two postincrements are invalid
2235 because the assembler insn would increment only once.
2236 On the other hand, a postincrement matches ordinary indexing
2237 if the postincrement is the output operand. */
2238 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2239 return operands_match_p (XEXP (x, 0), y);
2240 /* Two preincrements are invalid
2241 because the assembler insn would increment only once.
2242 On the other hand, a preincrement matches ordinary indexing
2243 if the preincrement is the input operand.
2244 In this case, return 2, since some callers need to do special
2245 things when this happens. */
2246 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2247 || GET_CODE (y) == PRE_MODIFY)
2248 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2252 /* Now we have disposed of all the cases in which different rtx codes
2254 if (code != GET_CODE (y))
2257 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2258 if (GET_MODE (x) != GET_MODE (y))
2261 /* MEMs refering to different address space are not equivalent. */
2262 if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y))
2273 return XEXP (x, 0) == XEXP (y, 0);
2275 return XSTR (x, 0) == XSTR (y, 0);
2281 /* Compare the elements. If any pair of corresponding elements
2282 fail to match, return 0 for the whole things. */
2285 fmt = GET_RTX_FORMAT (code);
2286 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2292 if (XWINT (x, i) != XWINT (y, i))
2297 if (XINT (x, i) != XINT (y, i))
2302 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2305 /* If any subexpression returns 2,
2306 we should return 2 if we are successful. */
2315 if (XVECLEN (x, i) != XVECLEN (y, i))
2317 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2319 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2327 /* It is believed that rtx's at this level will never
2328 contain anything but integers and other rtx's,
2329 except for within LABEL_REFs and SYMBOL_REFs. */
2334 return 1 + success_2;
2337 /* Describe the range of registers or memory referenced by X.
2338 If X is a register, set REG_FLAG and put the first register
2339 number into START and the last plus one into END.
2340 If X is a memory reference, put a base address into BASE
2341 and a range of integer offsets into START and END.
2342 If X is pushing on the stack, we can assume it causes no trouble,
2343 so we set the SAFE field. */
2345 static struct decomposition
2348 struct decomposition val;
2351 memset (&val, 0, sizeof (val));
2353 switch (GET_CODE (x))
2357 rtx base = NULL_RTX, offset = 0;
2358 rtx addr = XEXP (x, 0);
2360 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2361 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2363 val.base = XEXP (addr, 0);
2364 val.start = -GET_MODE_SIZE (GET_MODE (x));
2365 val.end = GET_MODE_SIZE (GET_MODE (x));
2366 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2370 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2372 if (GET_CODE (XEXP (addr, 1)) == PLUS
2373 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2374 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2376 val.base = XEXP (addr, 0);
2377 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2378 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2379 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2384 if (GET_CODE (addr) == CONST)
2386 addr = XEXP (addr, 0);
2389 if (GET_CODE (addr) == PLUS)
2391 if (CONSTANT_P (XEXP (addr, 0)))
2393 base = XEXP (addr, 1);
2394 offset = XEXP (addr, 0);
2396 else if (CONSTANT_P (XEXP (addr, 1)))
2398 base = XEXP (addr, 0);
2399 offset = XEXP (addr, 1);
2406 offset = const0_rtx;
2408 if (GET_CODE (offset) == CONST)
2409 offset = XEXP (offset, 0);
2410 if (GET_CODE (offset) == PLUS)
2412 if (CONST_INT_P (XEXP (offset, 0)))
2414 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2415 offset = XEXP (offset, 0);
2417 else if (CONST_INT_P (XEXP (offset, 1)))
2419 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2420 offset = XEXP (offset, 1);
2424 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2425 offset = const0_rtx;
2428 else if (!CONST_INT_P (offset))
2430 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2431 offset = const0_rtx;
2434 if (all_const && GET_CODE (base) == PLUS)
2435 base = gen_rtx_CONST (GET_MODE (base), base);
2437 gcc_assert (CONST_INT_P (offset));
2439 val.start = INTVAL (offset);
2440 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2447 val.start = true_regnum (x);
2448 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2450 /* A pseudo with no hard reg. */
2451 val.start = REGNO (x);
2452 val.end = val.start + 1;
2456 val.end = end_hard_regno (GET_MODE (x), val.start);
2460 if (!REG_P (SUBREG_REG (x)))
2461 /* This could be more precise, but it's good enough. */
2462 return decompose (SUBREG_REG (x));
2464 val.start = true_regnum (x);
2465 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2466 return decompose (SUBREG_REG (x));
2469 val.end = val.start + subreg_nregs (x);
2473 /* This hasn't been assigned yet, so it can't conflict yet. */
2478 gcc_assert (CONSTANT_P (x));
2485 /* Return 1 if altering Y will not modify the value of X.
2486 Y is also described by YDATA, which should be decompose (Y). */
2489 immune_p (rtx x, rtx y, struct decomposition ydata)
2491 struct decomposition xdata;
2494 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2498 gcc_assert (MEM_P (y));
2499 /* If Y is memory and X is not, Y can't affect X. */
2503 xdata = decompose (x);
2505 if (! rtx_equal_p (xdata.base, ydata.base))
2507 /* If bases are distinct symbolic constants, there is no overlap. */
2508 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2510 /* Constants and stack slots never overlap. */
2511 if (CONSTANT_P (xdata.base)
2512 && (ydata.base == frame_pointer_rtx
2513 || ydata.base == hard_frame_pointer_rtx
2514 || ydata.base == stack_pointer_rtx))
2516 if (CONSTANT_P (ydata.base)
2517 && (xdata.base == frame_pointer_rtx
2518 || xdata.base == hard_frame_pointer_rtx
2519 || xdata.base == stack_pointer_rtx))
2521 /* If either base is variable, we don't know anything. */
2525 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2528 /* Similar, but calls decompose. */
2531 safe_from_earlyclobber (rtx op, rtx clobber)
2533 struct decomposition early_data;
2535 early_data = decompose (clobber);
2536 return immune_p (op, clobber, early_data);
2539 /* Main entry point of this file: search the body of INSN
2540 for values that need reloading and record them with push_reload.
2541 REPLACE nonzero means record also where the values occur
2542 so that subst_reloads can be used.
2544 IND_LEVELS says how many levels of indirection are supported by this
2545 machine; a value of zero means that a memory reference is not a valid
2548 LIVE_KNOWN says we have valid information about which hard
2549 regs are live at each point in the program; this is true when
2550 we are called from global_alloc but false when stupid register
2551 allocation has been done.
2553 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2554 which is nonnegative if the reg has been commandeered for reloading into.
2555 It is copied into STATIC_RELOAD_REG_P and referenced from there
2556 by various subroutines.
2558 Return TRUE if some operands need to be changed, because of swapping
2559 commutative operands, reg_equiv_address substitution, or whatever. */
2562 find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2563 short *reload_reg_p)
2565 int insn_code_number;
2568 /* These start out as the constraints for the insn
2569 and they are chewed up as we consider alternatives. */
2570 const char *constraints[MAX_RECOG_OPERANDS];
2571 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2573 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2574 char pref_or_nothing[MAX_RECOG_OPERANDS];
2575 /* Nonzero for a MEM operand whose entire address needs a reload.
2576 May be -1 to indicate the entire address may or may not need a reload. */
2577 int address_reloaded[MAX_RECOG_OPERANDS];
2578 /* Nonzero for an address operand that needs to be completely reloaded.
2579 May be -1 to indicate the entire operand may or may not need a reload. */
2580 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2581 /* Value of enum reload_type to use for operand. */
2582 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2583 /* Value of enum reload_type to use within address of operand. */
2584 enum reload_type address_type[MAX_RECOG_OPERANDS];
2585 /* Save the usage of each operand. */
2586 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2587 int no_input_reloads = 0, no_output_reloads = 0;
2589 reg_class_t this_alternative[MAX_RECOG_OPERANDS];
2590 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2591 char this_alternative_win[MAX_RECOG_OPERANDS];
2592 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2593 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2594 int this_alternative_matches[MAX_RECOG_OPERANDS];
2596 reg_class_t goal_alternative[MAX_RECOG_OPERANDS];
2597 int this_alternative_number;
2598 int goal_alternative_number = 0;
2599 int operand_reloadnum[MAX_RECOG_OPERANDS];
2600 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2601 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2602 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2603 char goal_alternative_win[MAX_RECOG_OPERANDS];
2604 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2605 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2606 int goal_alternative_swapped;
2609 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2610 rtx substed_operand[MAX_RECOG_OPERANDS];
2611 rtx body = PATTERN (insn);
2612 rtx set = single_set (insn);
2613 int goal_earlyclobber = 0, this_earlyclobber;
2614 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2620 n_earlyclobbers = 0;
2621 replace_reloads = replace;
2622 hard_regs_live_known = live_known;
2623 static_reload_reg_p = reload_reg_p;
2625 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2626 neither are insns that SET cc0. Insns that use CC0 are not allowed
2627 to have any input reloads. */
2628 if (JUMP_P (insn) || CALL_P (insn))
2629 no_output_reloads = 1;
2632 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2633 no_input_reloads = 1;
2634 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2635 no_output_reloads = 1;
2638 #ifdef SECONDARY_MEMORY_NEEDED
2639 /* The eliminated forms of any secondary memory locations are per-insn, so
2640 clear them out here. */
2642 if (secondary_memlocs_elim_used)
2644 memset (secondary_memlocs_elim, 0,
2645 sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2646 secondary_memlocs_elim_used = 0;
2650 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2651 is cheap to move between them. If it is not, there may not be an insn
2652 to do the copy, so we may need a reload. */
2653 if (GET_CODE (body) == SET
2654 && REG_P (SET_DEST (body))
2655 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2656 && REG_P (SET_SRC (body))
2657 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2658 && register_move_cost (GET_MODE (SET_SRC (body)),
2659 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2660 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2663 extract_insn (insn);
2665 noperands = reload_n_operands = recog_data.n_operands;
2666 n_alternatives = recog_data.n_alternatives;
2668 /* Just return "no reloads" if insn has no operands with constraints. */
2669 if (noperands == 0 || n_alternatives == 0)
2672 insn_code_number = INSN_CODE (insn);
2673 this_insn_is_asm = insn_code_number < 0;
2675 memcpy (operand_mode, recog_data.operand_mode,
2676 noperands * sizeof (enum machine_mode));
2677 memcpy (constraints, recog_data.constraints,
2678 noperands * sizeof (const char *));
2682 /* If we will need to know, later, whether some pair of operands
2683 are the same, we must compare them now and save the result.
2684 Reloading the base and index registers will clobber them
2685 and afterward they will fail to match. */
2687 for (i = 0; i < noperands; i++)
2693 substed_operand[i] = recog_data.operand[i];
2696 modified[i] = RELOAD_READ;
2698 /* Scan this operand's constraint to see if it is an output operand,
2699 an in-out operand, is commutative, or should match another. */
2703 p += CONSTRAINT_LEN (c, p);
2707 modified[i] = RELOAD_WRITE;
2710 modified[i] = RELOAD_READ_WRITE;
2714 /* The last operand should not be marked commutative. */
2715 gcc_assert (i != noperands - 1);
2717 /* We currently only support one commutative pair of
2718 operands. Some existing asm code currently uses more
2719 than one pair. Previously, that would usually work,
2720 but sometimes it would crash the compiler. We
2721 continue supporting that case as well as we can by
2722 silently ignoring all but the first pair. In the
2723 future we may handle it correctly. */
2724 if (commutative < 0)
2727 gcc_assert (this_insn_is_asm);
2730 /* Use of ISDIGIT is tempting here, but it may get expensive because
2731 of locale support we don't want. */
2732 case '0': case '1': case '2': case '3': case '4':
2733 case '5': case '6': case '7': case '8': case '9':
2735 c = strtoul (p - 1, &end, 10);
2738 operands_match[c][i]
2739 = operands_match_p (recog_data.operand[c],
2740 recog_data.operand[i]);
2742 /* An operand may not match itself. */
2743 gcc_assert (c != i);
2745 /* If C can be commuted with C+1, and C might need to match I,
2746 then C+1 might also need to match I. */
2747 if (commutative >= 0)
2749 if (c == commutative || c == commutative + 1)
2751 int other = c + (c == commutative ? 1 : -1);
2752 operands_match[other][i]
2753 = operands_match_p (recog_data.operand[other],
2754 recog_data.operand[i]);
2756 if (i == commutative || i == commutative + 1)
2758 int other = i + (i == commutative ? 1 : -1);
2759 operands_match[c][other]
2760 = operands_match_p (recog_data.operand[c],
2761 recog_data.operand[other]);
2763 /* Note that C is supposed to be less than I.
2764 No need to consider altering both C and I because in
2765 that case we would alter one into the other. */
2772 /* Examine each operand that is a memory reference or memory address
2773 and reload parts of the addresses into index registers.
2774 Also here any references to pseudo regs that didn't get hard regs
2775 but are equivalent to constants get replaced in the insn itself
2776 with those constants. Nobody will ever see them again.
2778 Finally, set up the preferred classes of each operand. */
2780 for (i = 0; i < noperands; i++)
2782 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2784 address_reloaded[i] = 0;
2785 address_operand_reloaded[i] = 0;
2786 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2787 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2790 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2791 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2794 if (*constraints[i] == 0)
2795 /* Ignore things like match_operator operands. */
2797 else if (constraints[i][0] == 'p'
2798 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2800 address_operand_reloaded[i]
2801 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2802 recog_data.operand[i],
2803 recog_data.operand_loc[i],
2804 i, operand_type[i], ind_levels, insn);
2806 /* If we now have a simple operand where we used to have a
2807 PLUS or MULT, re-recognize and try again. */
2808 if ((OBJECT_P (*recog_data.operand_loc[i])
2809 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2810 && (GET_CODE (recog_data.operand[i]) == MULT
2811 || GET_CODE (recog_data.operand[i]) == PLUS))
2813 INSN_CODE (insn) = -1;
2814 retval = find_reloads (insn, replace, ind_levels, live_known,
2819 recog_data.operand[i] = *recog_data.operand_loc[i];
2820 substed_operand[i] = recog_data.operand[i];
2822 /* Address operands are reloaded in their existing mode,
2823 no matter what is specified in the machine description. */
2824 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2826 /* If the address is a single CONST_INT pick address mode
2827 instead otherwise we will later not know in which mode
2828 the reload should be performed. */
2829 if (operand_mode[i] == VOIDmode)
2830 operand_mode[i] = Pmode;
2833 else if (code == MEM)
2836 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2837 recog_data.operand_loc[i],
2838 XEXP (recog_data.operand[i], 0),
2839 &XEXP (recog_data.operand[i], 0),
2840 i, address_type[i], ind_levels, insn);
2841 recog_data.operand[i] = *recog_data.operand_loc[i];
2842 substed_operand[i] = recog_data.operand[i];
2844 else if (code == SUBREG)
2846 rtx reg = SUBREG_REG (recog_data.operand[i]);
2848 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2851 && &SET_DEST (set) == recog_data.operand_loc[i],
2853 &address_reloaded[i]);
2855 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2856 that didn't get a hard register, emit a USE with a REG_EQUAL
2857 note in front so that we might inherit a previous, possibly
2863 && (GET_MODE_SIZE (GET_MODE (reg))
2864 >= GET_MODE_SIZE (GET_MODE (op)))
2865 && reg_equiv_constant (REGNO (reg)) == 0)
2866 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2868 REG_EQUAL, reg_equiv_memory_loc (REGNO (reg)));
2870 substed_operand[i] = recog_data.operand[i] = op;
2872 else if (code == PLUS || GET_RTX_CLASS (code) == RTX_UNARY)
2873 /* We can get a PLUS as an "operand" as a result of register
2874 elimination. See eliminate_regs and gen_reload. We handle
2875 a unary operator by reloading the operand. */
2876 substed_operand[i] = recog_data.operand[i]
2877 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2878 ind_levels, 0, insn,
2879 &address_reloaded[i]);
2880 else if (code == REG)
2882 /* This is equivalent to calling find_reloads_toplev.
2883 The code is duplicated for speed.
2884 When we find a pseudo always equivalent to a constant,
2885 we replace it by the constant. We must be sure, however,
2886 that we don't try to replace it in the insn in which it
2888 int regno = REGNO (recog_data.operand[i]);
2889 if (reg_equiv_constant (regno) != 0
2890 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2892 /* Record the existing mode so that the check if constants are
2893 allowed will work when operand_mode isn't specified. */
2895 if (operand_mode[i] == VOIDmode)
2896 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2898 substed_operand[i] = recog_data.operand[i]
2899 = reg_equiv_constant (regno);
2901 if (reg_equiv_memory_loc (regno) != 0
2902 && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
2903 /* We need not give a valid is_set_dest argument since the case
2904 of a constant equivalence was checked above. */
2905 substed_operand[i] = recog_data.operand[i]
2906 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2907 ind_levels, 0, insn,
2908 &address_reloaded[i]);
2910 /* If the operand is still a register (we didn't replace it with an
2911 equivalent), get the preferred class to reload it into. */
2912 code = GET_CODE (recog_data.operand[i]);
2914 = ((code == REG && REGNO (recog_data.operand[i])
2915 >= FIRST_PSEUDO_REGISTER)
2916 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2920 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2921 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2924 /* If this is simply a copy from operand 1 to operand 0, merge the
2925 preferred classes for the operands. */
2926 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2927 && recog_data.operand[1] == SET_SRC (set))
2929 preferred_class[0] = preferred_class[1]
2930 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2931 pref_or_nothing[0] |= pref_or_nothing[1];
2932 pref_or_nothing[1] |= pref_or_nothing[0];
2935 /* Now see what we need for pseudo-regs that didn't get hard regs
2936 or got the wrong kind of hard reg. For this, we must consider
2937 all the operands together against the register constraints. */
2939 best = MAX_RECOG_OPERANDS * 2 + 600;
2942 goal_alternative_swapped = 0;
2945 /* The constraints are made of several alternatives.
2946 Each operand's constraint looks like foo,bar,... with commas
2947 separating the alternatives. The first alternatives for all
2948 operands go together, the second alternatives go together, etc.
2950 First loop over alternatives. */
2952 for (this_alternative_number = 0;
2953 this_alternative_number < n_alternatives;
2954 this_alternative_number++)
2956 /* Loop over operands for one constraint alternative. */
2957 /* LOSERS counts those that don't fit this alternative
2958 and would require loading. */
2960 /* BAD is set to 1 if it some operand can't fit this alternative
2961 even after reloading. */
2963 /* REJECT is a count of how undesirable this alternative says it is
2964 if any reloading is required. If the alternative matches exactly
2965 then REJECT is ignored, but otherwise it gets this much
2966 counted against it in addition to the reloading needed. Each
2967 ? counts three times here since we want the disparaging caused by
2968 a bad register class to only count 1/3 as much. */
2971 if (!recog_data.alternative_enabled_p[this_alternative_number])
2975 for (i = 0; i < recog_data.n_operands; i++)
2976 constraints[i] = skip_alternative (constraints[i]);
2981 this_earlyclobber = 0;
2983 for (i = 0; i < noperands; i++)
2985 const char *p = constraints[i];
2990 /* 0 => this operand can be reloaded somehow for this alternative. */
2992 /* 0 => this operand can be reloaded if the alternative allows regs. */
2996 rtx operand = recog_data.operand[i];
2998 /* Nonzero means this is a MEM that must be reloaded into a reg
2999 regardless of what the constraint says. */
3000 int force_reload = 0;
3002 /* Nonzero if a constant forced into memory would be OK for this
3005 int earlyclobber = 0;
3007 /* If the predicate accepts a unary operator, it means that
3008 we need to reload the operand, but do not do this for
3009 match_operator and friends. */
3010 if (UNARY_P (operand) && *p != 0)
3011 operand = XEXP (operand, 0);
3013 /* If the operand is a SUBREG, extract
3014 the REG or MEM (or maybe even a constant) within.
3015 (Constants can occur as a result of reg_equiv_constant.) */
3017 while (GET_CODE (operand) == SUBREG)
3019 /* Offset only matters when operand is a REG and
3020 it is a hard reg. This is because it is passed
3021 to reg_fits_class_p if it is a REG and all pseudos
3022 return 0 from that function. */
3023 if (REG_P (SUBREG_REG (operand))
3024 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
3026 if (simplify_subreg_regno (REGNO (SUBREG_REG (operand)),
3027 GET_MODE (SUBREG_REG (operand)),
3028 SUBREG_BYTE (operand),
3029 GET_MODE (operand)) < 0)
3031 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
3032 GET_MODE (SUBREG_REG (operand)),
3033 SUBREG_BYTE (operand),
3034 GET_MODE (operand));
3036 operand = SUBREG_REG (operand);
3037 /* Force reload if this is a constant or PLUS or if there may
3038 be a problem accessing OPERAND in the outer mode. */
3039 if (CONSTANT_P (operand)
3040 || GET_CODE (operand) == PLUS
3041 /* We must force a reload of paradoxical SUBREGs
3042 of a MEM because the alignment of the inner value
3043 may not be enough to do the outer reference. On
3044 big-endian machines, it may also reference outside
3047 On machines that extend byte operations and we have a
3048 SUBREG where both the inner and outer modes are no wider
3049 than a word and the inner mode is narrower, is integral,
3050 and gets extended when loaded from memory, combine.c has
3051 made assumptions about the behavior of the machine in such
3052 register access. If the data is, in fact, in memory we
3053 must always load using the size assumed to be in the
3054 register and let the insn do the different-sized
3057 This is doubly true if WORD_REGISTER_OPERATIONS. In
3058 this case eliminate_regs has left non-paradoxical
3059 subregs for push_reload to see. Make sure it does
3060 by forcing the reload.
3062 ??? When is it right at this stage to have a subreg
3063 of a mem that is _not_ to be handled specially? IMO
3064 those should have been reduced to just a mem. */
3065 || ((MEM_P (operand)
3067 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3068 #ifndef WORD_REGISTER_OPERATIONS
3069 && (((GET_MODE_BITSIZE (GET_MODE (operand))
3070 < BIGGEST_ALIGNMENT)
3071 && (GET_MODE_SIZE (operand_mode[i])
3072 > GET_MODE_SIZE (GET_MODE (operand))))
3074 #ifdef LOAD_EXTEND_OP
3075 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3076 && (GET_MODE_SIZE (GET_MODE (operand))
3078 && (GET_MODE_SIZE (operand_mode[i])
3079 > GET_MODE_SIZE (GET_MODE (operand)))
3080 && INTEGRAL_MODE_P (GET_MODE (operand))
3081 && LOAD_EXTEND_OP (GET_MODE (operand)) != UNKNOWN)
3090 this_alternative[i] = NO_REGS;
3091 this_alternative_win[i] = 0;
3092 this_alternative_match_win[i] = 0;
3093 this_alternative_offmemok[i] = 0;
3094 this_alternative_earlyclobber[i] = 0;
3095 this_alternative_matches[i] = -1;
3097 /* An empty constraint or empty alternative
3098 allows anything which matched the pattern. */
3099 if (*p == 0 || *p == ',')
3102 /* Scan this alternative's specs for this operand;
3103 set WIN if the operand fits any letter in this alternative.
3104 Otherwise, clear BADOP if this operand could
3105 fit some letter after reloads,
3106 or set WINREG if this operand could fit after reloads
3107 provided the constraint allows some registers. */
3110 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
3119 case '=': case '+': case '*':
3123 /* We only support one commutative marker, the first
3124 one. We already set commutative above. */
3136 /* Ignore rest of this alternative as far as
3137 reloading is concerned. */
3140 while (*p && *p != ',');
3144 case '0': case '1': case '2': case '3': case '4':
3145 case '5': case '6': case '7': case '8': case '9':
3146 m = strtoul (p, &end, 10);
3150 this_alternative_matches[i] = m;
3151 /* We are supposed to match a previous operand.
3152 If we do, we win if that one did.
3153 If we do not, count both of the operands as losers.
3154 (This is too conservative, since most of the time
3155 only a single reload insn will be needed to make
3156 the two operands win. As a result, this alternative
3157 may be rejected when it is actually desirable.) */
3158 if ((swapped && (m != commutative || i != commutative + 1))
3159 /* If we are matching as if two operands were swapped,
3160 also pretend that operands_match had been computed
3162 But if I is the second of those and C is the first,
3163 don't exchange them, because operands_match is valid
3164 only on one side of its diagonal. */
3166 [(m == commutative || m == commutative + 1)
3167 ? 2 * commutative + 1 - m : m]
3168 [(i == commutative || i == commutative + 1)
3169 ? 2 * commutative + 1 - i : i])
3170 : operands_match[m][i])
3172 /* If we are matching a non-offsettable address where an
3173 offsettable address was expected, then we must reject
3174 this combination, because we can't reload it. */
3175 if (this_alternative_offmemok[m]
3176 && MEM_P (recog_data.operand[m])
3177 && this_alternative[m] == NO_REGS
3178 && ! this_alternative_win[m])
3181 did_match = this_alternative_win[m];
3185 /* Operands don't match. */
3188 /* Retroactively mark the operand we had to match
3189 as a loser, if it wasn't already. */
3190 if (this_alternative_win[m])
3192 this_alternative_win[m] = 0;
3193 if (this_alternative[m] == NO_REGS)
3195 /* But count the pair only once in the total badness of
3196 this alternative, if the pair can be a dummy reload.
3197 The pointers in operand_loc are not swapped; swap
3198 them by hand if necessary. */
3199 if (swapped && i == commutative)
3200 loc1 = commutative + 1;
3201 else if (swapped && i == commutative + 1)
3205 if (swapped && m == commutative)
3206 loc2 = commutative + 1;
3207 else if (swapped && m == commutative + 1)
3212 = find_dummy_reload (recog_data.operand[i],
3213 recog_data.operand[m],
3214 recog_data.operand_loc[loc1],
3215 recog_data.operand_loc[loc2],
3216 operand_mode[i], operand_mode[m],
3217 this_alternative[m], -1,
3218 this_alternative_earlyclobber[m]);
3223 /* This can be fixed with reloads if the operand
3224 we are supposed to match can be fixed with reloads. */
3226 this_alternative[i] = this_alternative[m];
3228 /* If we have to reload this operand and some previous
3229 operand also had to match the same thing as this
3230 operand, we don't know how to do that. So reject this
3232 if (! did_match || force_reload)
3233 for (j = 0; j < i; j++)
3234 if (this_alternative_matches[j]
3235 == this_alternative_matches[i])
3240 /* All necessary reloads for an address_operand
3241 were handled in find_reloads_address. */
3242 this_alternative[i] = base_reg_class (VOIDmode, ADDRESS,
3248 case TARGET_MEM_CONSTRAINT:
3253 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3254 && reg_renumber[REGNO (operand)] < 0))
3256 if (CONST_POOL_OK_P (operand_mode[i], operand))
3263 && ! address_reloaded[i]
3264 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3265 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3271 && ! address_reloaded[i]
3272 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3273 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3277 /* Memory operand whose address is not offsettable. */
3282 && ! (ind_levels ? offsettable_memref_p (operand)
3283 : offsettable_nonstrict_memref_p (operand))
3284 /* Certain mem addresses will become offsettable
3285 after they themselves are reloaded. This is important;
3286 we don't want our own handling of unoffsettables
3287 to override the handling of reg_equiv_address. */
3288 && !(REG_P (XEXP (operand, 0))
3290 || reg_equiv_address (REGNO (XEXP (operand, 0))) != 0)))
3294 /* Memory operand whose address is offsettable. */
3298 if ((MEM_P (operand)
3299 /* If IND_LEVELS, find_reloads_address won't reload a
3300 pseudo that didn't get a hard reg, so we have to
3301 reject that case. */
3302 && ((ind_levels ? offsettable_memref_p (operand)
3303 : offsettable_nonstrict_memref_p (operand))
3304 /* A reloaded address is offsettable because it is now
3305 just a simple register indirect. */
3306 || address_reloaded[i] == 1))
3308 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3309 && reg_renumber[REGNO (operand)] < 0
3310 /* If reg_equiv_address is nonzero, we will be
3311 loading it into a register; hence it will be
3312 offsettable, but we cannot say that reg_equiv_mem
3313 is offsettable without checking. */
3314 && ((reg_equiv_mem (REGNO (operand)) != 0
3315 && offsettable_memref_p (reg_equiv_mem (REGNO (operand))))
3316 || (reg_equiv_address (REGNO (operand)) != 0))))
3318 if (CONST_POOL_OK_P (operand_mode[i], operand)
3326 /* Output operand that is stored before the need for the
3327 input operands (and their index registers) is over. */
3328 earlyclobber = 1, this_earlyclobber = 1;
3333 if (GET_CODE (operand) == CONST_DOUBLE
3334 || (GET_CODE (operand) == CONST_VECTOR
3335 && (GET_MODE_CLASS (GET_MODE (operand))
3336 == MODE_VECTOR_FLOAT)))
3342 if (GET_CODE (operand) == CONST_DOUBLE
3343 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3348 if (CONST_INT_P (operand)
3349 || (GET_CODE (operand) == CONST_DOUBLE
3350 && GET_MODE (operand) == VOIDmode))
3353 if (CONSTANT_P (operand)
3354 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)))
3359 if (CONST_INT_P (operand)
3360 || (GET_CODE (operand) == CONST_DOUBLE
3361 && GET_MODE (operand) == VOIDmode))
3373 if (CONST_INT_P (operand)
3374 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3385 /* A PLUS is never a valid operand, but reload can make
3386 it from a register when eliminating registers. */
3387 && GET_CODE (operand) != PLUS
3388 /* A SCRATCH is not a valid operand. */
3389 && GET_CODE (operand) != SCRATCH
3390 && (! CONSTANT_P (operand)
3392 || LEGITIMATE_PIC_OPERAND_P (operand))
3393 && (GENERAL_REGS == ALL_REGS
3395 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3396 && reg_renumber[REGNO (operand)] < 0)))
3398 /* Drop through into 'r' case. */
3402 = reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3406 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3408 #ifdef EXTRA_CONSTRAINT_STR
3409 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3413 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3415 /* If the address was already reloaded,
3417 else if (MEM_P (operand)
3418 && address_reloaded[i] == 1)
3420 /* Likewise if the address will be reloaded because
3421 reg_equiv_address is nonzero. For reg_equiv_mem
3422 we have to check. */
3423 else if (REG_P (operand)
3424 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3425 && reg_renumber[REGNO (operand)] < 0
3426 && ((reg_equiv_mem (REGNO (operand)) != 0
3427 && EXTRA_CONSTRAINT_STR (reg_equiv_mem (REGNO (operand)), c, p))
3428 || (reg_equiv_address (REGNO (operand)) != 0)))
3431 /* If we didn't already win, we can reload
3432 constants via force_const_mem, and other
3433 MEMs by reloading the address like for 'o'. */
3434 if (CONST_POOL_OK_P (operand_mode[i], operand)
3441 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3443 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3446 /* If we didn't already win, we can reload
3447 the address into a base register. */
3448 this_alternative[i] = base_reg_class (VOIDmode,
3455 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3462 = (reg_class_subunion
3463 [this_alternative[i]]
3464 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3466 if (GET_MODE (operand) == BLKmode)
3470 && reg_fits_class_p (operand, this_alternative[i],
3471 offset, GET_MODE (recog_data.operand[i])))
3475 while ((p += len), c);
3479 /* If this operand could be handled with a reg,
3480 and some reg is allowed, then this operand can be handled. */
3481 if (winreg && this_alternative[i] != NO_REGS
3482 && (win || !class_only_fixed_regs[this_alternative[i]]))
3485 /* Record which operands fit this alternative. */
3486 this_alternative_earlyclobber[i] = earlyclobber;
3487 if (win && ! force_reload)
3488 this_alternative_win[i] = 1;
3489 else if (did_match && ! force_reload)
3490 this_alternative_match_win[i] = 1;
3493 int const_to_mem = 0;
3495 this_alternative_offmemok[i] = offmemok;
3499 /* Alternative loses if it has no regs for a reg operand. */
3501 && this_alternative[i] == NO_REGS
3502 && this_alternative_matches[i] < 0)
3505 /* If this is a constant that is reloaded into the desired
3506 class by copying it to memory first, count that as another
3507 reload. This is consistent with other code and is
3508 required to avoid choosing another alternative when
3509 the constant is moved into memory by this function on
3510 an early reload pass. Note that the test here is
3511 precisely the same as in the code below that calls
3513 if (CONST_POOL_OK_P (operand_mode[i], operand)
3514 && ((targetm.preferred_reload_class (operand,
3515 this_alternative[i])
3517 || no_input_reloads))
3520 if (this_alternative[i] != NO_REGS)
3524 /* Alternative loses if it requires a type of reload not
3525 permitted for this insn. We can always reload SCRATCH
3526 and objects with a REG_UNUSED note. */
3527 if (GET_CODE (operand) != SCRATCH
3528 && modified[i] != RELOAD_READ && no_output_reloads
3529 && ! find_reg_note (insn, REG_UNUSED, operand))
3531 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3535 /* If we can't reload this value at all, reject this
3536 alternative. Note that we could also lose due to
3537 LIMIT_RELOAD_CLASS, but we don't check that
3540 if (! CONSTANT_P (operand) && this_alternative[i] != NO_REGS)
3542 if (targetm.preferred_reload_class (operand, this_alternative[i])
3546 if (operand_type[i] == RELOAD_FOR_OUTPUT
3547 && (targetm.preferred_output_reload_class (operand,
3548 this_alternative[i])
3553 /* We prefer to reload pseudos over reloading other things,
3554 since such reloads may be able to be eliminated later.
3555 If we are reloading a SCRATCH, we won't be generating any
3556 insns, just using a register, so it is also preferred.
3557 So bump REJECT in other cases. Don't do this in the
3558 case where we are forcing a constant into memory and
3559 it will then win since we don't want to have a different
3560 alternative match then. */
3561 if (! (REG_P (operand)
3562 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3563 && GET_CODE (operand) != SCRATCH
3564 && ! (const_to_mem && constmemok))
3567 /* Input reloads can be inherited more often than output
3568 reloads can be removed, so penalize output reloads. */
3569 if (operand_type[i] != RELOAD_FOR_INPUT
3570 && GET_CODE (operand) != SCRATCH)
3574 /* If this operand is a pseudo register that didn't get a hard
3575 reg and this alternative accepts some register, see if the
3576 class that we want is a subset of the preferred class for this
3577 register. If not, but it intersects that class, use the
3578 preferred class instead. If it does not intersect the preferred
3579 class, show that usage of this alternative should be discouraged;
3580 it will be discouraged more still if the register is `preferred
3581 or nothing'. We do this because it increases the chance of
3582 reusing our spill register in a later insn and avoiding a pair
3583 of memory stores and loads.
3585 Don't bother with this if this alternative will accept this
3588 Don't do this for a multiword operand, since it is only a
3589 small win and has the risk of requiring more spill registers,
3590 which could cause a large loss.
3592 Don't do this if the preferred class has only one register
3593 because we might otherwise exhaust the class. */
3595 if (! win && ! did_match
3596 && this_alternative[i] != NO_REGS
3597 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3598 && reg_class_size [(int) preferred_class[i]] > 0
3599 && ! small_register_class_p (preferred_class[i]))
3601 if (! reg_class_subset_p (this_alternative[i],
3602 preferred_class[i]))
3604 /* Since we don't have a way of forming the intersection,
3605 we just do something special if the preferred class
3606 is a subset of the class we have; that's the most
3607 common case anyway. */
3608 if (reg_class_subset_p (preferred_class[i],
3609 this_alternative[i]))
3610 this_alternative[i] = preferred_class[i];
3612 reject += (2 + 2 * pref_or_nothing[i]);
3617 /* Now see if any output operands that are marked "earlyclobber"
3618 in this alternative conflict with any input operands
3619 or any memory addresses. */
3621 for (i = 0; i < noperands; i++)
3622 if (this_alternative_earlyclobber[i]
3623 && (this_alternative_win[i] || this_alternative_match_win[i]))
3625 struct decomposition early_data;
3627 early_data = decompose (recog_data.operand[i]);
3629 gcc_assert (modified[i] != RELOAD_READ);
3631 if (this_alternative[i] == NO_REGS)
3633 this_alternative_earlyclobber[i] = 0;
3634 gcc_assert (this_insn_is_asm);
3635 error_for_asm (this_insn,
3636 "%<&%> constraint used with no register class");
3639 for (j = 0; j < noperands; j++)
3640 /* Is this an input operand or a memory ref? */
3641 if ((MEM_P (recog_data.operand[j])
3642 || modified[j] != RELOAD_WRITE)
3644 /* Ignore things like match_operator operands. */
3645 && !recog_data.is_operator[j]
3646 /* Don't count an input operand that is constrained to match
3647 the early clobber operand. */
3648 && ! (this_alternative_matches[j] == i
3649 && rtx_equal_p (recog_data.operand[i],
3650 recog_data.operand[j]))
3651 /* Is it altered by storing the earlyclobber operand? */
3652 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3655 /* If the output is in a non-empty few-regs class,
3656 it's costly to reload it, so reload the input instead. */
3657 if (small_register_class_p (this_alternative[i])
3658 && (REG_P (recog_data.operand[j])
3659 || GET_CODE (recog_data.operand[j]) == SUBREG))
3662 this_alternative_win[j] = 0;
3663 this_alternative_match_win[j] = 0;
3668 /* If an earlyclobber operand conflicts with something,
3669 it must be reloaded, so request this and count the cost. */
3673 this_alternative_win[i] = 0;
3674 this_alternative_match_win[j] = 0;
3675 for (j = 0; j < noperands; j++)
3676 if (this_alternative_matches[j] == i
3677 && this_alternative_match_win[j])
3679 this_alternative_win[j] = 0;
3680 this_alternative_match_win[j] = 0;
3686 /* If one alternative accepts all the operands, no reload required,
3687 choose that alternative; don't consider the remaining ones. */
3690 /* Unswap these so that they are never swapped at `finish'. */
3691 if (commutative >= 0)
3693 recog_data.operand[commutative] = substed_operand[commutative];
3694 recog_data.operand[commutative + 1]
3695 = substed_operand[commutative + 1];
3697 for (i = 0; i < noperands; i++)
3699 goal_alternative_win[i] = this_alternative_win[i];
3700 goal_alternative_match_win[i] = this_alternative_match_win[i];
3701 goal_alternative[i] = this_alternative[i];
3702 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3703 goal_alternative_matches[i] = this_alternative_matches[i];
3704 goal_alternative_earlyclobber[i]
3705 = this_alternative_earlyclobber[i];
3707 goal_alternative_number = this_alternative_number;
3708 goal_alternative_swapped = swapped;
3709 goal_earlyclobber = this_earlyclobber;
3713 /* REJECT, set by the ! and ? constraint characters and when a register
3714 would be reloaded into a non-preferred class, discourages the use of
3715 this alternative for a reload goal. REJECT is incremented by six
3716 for each ? and two for each non-preferred class. */
3717 losers = losers * 6 + reject;
3719 /* If this alternative can be made to work by reloading,
3720 and it needs less reloading than the others checked so far,
3721 record it as the chosen goal for reloading. */
3726 for (i = 0; i < noperands; i++)
3728 goal_alternative[i] = this_alternative[i];
3729 goal_alternative_win[i] = this_alternative_win[i];
3730 goal_alternative_match_win[i]
3731 = this_alternative_match_win[i];
3732 goal_alternative_offmemok[i]
3733 = this_alternative_offmemok[i];
3734 goal_alternative_matches[i] = this_alternative_matches[i];
3735 goal_alternative_earlyclobber[i]
3736 = this_alternative_earlyclobber[i];
3738 goal_alternative_swapped = swapped;
3740 goal_alternative_number = this_alternative_number;
3741 goal_earlyclobber = this_earlyclobber;
3746 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3747 then we need to try each alternative twice,
3748 the second time matching those two operands
3749 as if we had exchanged them.
3750 To do this, really exchange them in operands.
3752 If we have just tried the alternatives the second time,
3753 return operands to normal and drop through. */
3755 if (commutative >= 0)
3760 enum reg_class tclass;
3763 recog_data.operand[commutative] = substed_operand[commutative + 1];
3764 recog_data.operand[commutative + 1] = substed_operand[commutative];
3765 /* Swap the duplicates too. */
3766 for (i = 0; i < recog_data.n_dups; i++)
3767 if (recog_data.dup_num[i] == commutative
3768 || recog_data.dup_num[i] == commutative + 1)
3769 *recog_data.dup_loc[i]
3770 = recog_data.operand[(int) recog_data.dup_num[i]];
3772 tclass = preferred_class[commutative];
3773 preferred_class[commutative] = preferred_class[commutative + 1];
3774 preferred_class[commutative + 1] = tclass;
3776 t = pref_or_nothing[commutative];
3777 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3778 pref_or_nothing[commutative + 1] = t;
3780 t = address_reloaded[commutative];
3781 address_reloaded[commutative] = address_reloaded[commutative + 1];
3782 address_reloaded[commutative + 1] = t;
3784 memcpy (constraints, recog_data.constraints,
3785 noperands * sizeof (const char *));
3790 recog_data.operand[commutative] = substed_operand[commutative];
3791 recog_data.operand[commutative + 1]
3792 = substed_operand[commutative + 1];
3793 /* Unswap the duplicates too. */
3794 for (i = 0; i < recog_data.n_dups; i++)
3795 if (recog_data.dup_num[i] == commutative
3796 || recog_data.dup_num[i] == commutative + 1)
3797 *recog_data.dup_loc[i]
3798 = recog_data.operand[(int) recog_data.dup_num[i]];
3802 /* The operands don't meet the constraints.
3803 goal_alternative describes the alternative
3804 that we could reach by reloading the fewest operands.
3805 Reload so as to fit it. */
3807 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3809 /* No alternative works with reloads?? */
3810 if (insn_code_number >= 0)
3811 fatal_insn ("unable to generate reloads for:", insn);
3812 error_for_asm (insn, "inconsistent operand constraints in an %<asm%>");
3813 /* Avoid further trouble with this insn. */
3814 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3819 /* Jump to `finish' from above if all operands are valid already.
3820 In that case, goal_alternative_win is all 1. */
3823 /* Right now, for any pair of operands I and J that are required to match,
3825 goal_alternative_matches[J] is I.
3826 Set up goal_alternative_matched as the inverse function:
3827 goal_alternative_matched[I] = J. */
3829 for (i = 0; i < noperands; i++)
3830 goal_alternative_matched[i] = -1;
3832 for (i = 0; i < noperands; i++)
3833 if (! goal_alternative_win[i]
3834 && goal_alternative_matches[i] >= 0)
3835 goal_alternative_matched[goal_alternative_matches[i]] = i;
3837 for (i = 0; i < noperands; i++)
3838 goal_alternative_win[i] |= goal_alternative_match_win[i];
3840 /* If the best alternative is with operands 1 and 2 swapped,
3841 consider them swapped before reporting the reloads. Update the
3842 operand numbers of any reloads already pushed. */
3844 if (goal_alternative_swapped)
3848 tem = substed_operand[commutative];
3849 substed_operand[commutative] = substed_operand[commutative + 1];
3850 substed_operand[commutative + 1] = tem;
3851 tem = recog_data.operand[commutative];
3852 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3853 recog_data.operand[commutative + 1] = tem;
3854 tem = *recog_data.operand_loc[commutative];
3855 *recog_data.operand_loc[commutative]
3856 = *recog_data.operand_loc[commutative + 1];
3857 *recog_data.operand_loc[commutative + 1] = tem;
3859 for (i = 0; i < n_reloads; i++)
3861 if (rld[i].opnum == commutative)
3862 rld[i].opnum = commutative + 1;
3863 else if (rld[i].opnum == commutative + 1)
3864 rld[i].opnum = commutative;
3868 for (i = 0; i < noperands; i++)
3870 operand_reloadnum[i] = -1;
3872 /* If this is an earlyclobber operand, we need to widen the scope.
3873 The reload must remain valid from the start of the insn being
3874 reloaded until after the operand is stored into its destination.
3875 We approximate this with RELOAD_OTHER even though we know that we
3876 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3878 One special case that is worth checking is when we have an
3879 output that is earlyclobber but isn't used past the insn (typically
3880 a SCRATCH). In this case, we only need have the reload live
3881 through the insn itself, but not for any of our input or output
3883 But we must not accidentally narrow the scope of an existing
3884 RELOAD_OTHER reload - leave these alone.
3886 In any case, anything needed to address this operand can remain
3887 however they were previously categorized. */
3889 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3891 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3892 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3895 /* Any constants that aren't allowed and can't be reloaded
3896 into registers are here changed into memory references. */
3897 for (i = 0; i < noperands; i++)
3898 if (! goal_alternative_win[i])
3900 rtx op = recog_data.operand[i];
3901 rtx subreg = NULL_RTX;
3902 rtx plus = NULL_RTX;
3903 enum machine_mode mode = operand_mode[i];
3905 /* Reloads of SUBREGs of CONSTANT RTXs are handled later in
3906 push_reload so we have to let them pass here. */
3907 if (GET_CODE (op) == SUBREG)
3910 op = SUBREG_REG (op);
3911 mode = GET_MODE (op);
3914 if (GET_CODE (op) == PLUS)
3920 if (CONST_POOL_OK_P (mode, op)
3921 && ((targetm.preferred_reload_class (op, goal_alternative[i])
3923 || no_input_reloads))
3925 int this_address_reloaded;
3926 rtx tem = force_const_mem (mode, op);
3928 /* If we stripped a SUBREG or a PLUS above add it back. */
3929 if (plus != NULL_RTX)
3930 tem = gen_rtx_PLUS (mode, XEXP (plus, 0), tem);
3932 if (subreg != NULL_RTX)
3933 tem = gen_rtx_SUBREG (operand_mode[i], tem, SUBREG_BYTE (subreg));
3935 this_address_reloaded = 0;
3936 substed_operand[i] = recog_data.operand[i]
3937 = find_reloads_toplev (tem, i, address_type[i], ind_levels,
3938 0, insn, &this_address_reloaded);
3940 /* If the alternative accepts constant pool refs directly
3941 there will be no reload needed at all. */
3942 if (plus == NULL_RTX
3943 && subreg == NULL_RTX
3944 && alternative_allows_const_pool_ref (this_address_reloaded == 0
3945 ? substed_operand[i]
3947 recog_data.constraints[i],
3948 goal_alternative_number))
3949 goal_alternative_win[i] = 1;
3953 /* Record the values of the earlyclobber operands for the caller. */
3954 if (goal_earlyclobber)
3955 for (i = 0; i < noperands; i++)
3956 if (goal_alternative_earlyclobber[i])
3957 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3959 /* Now record reloads for all the operands that need them. */
3960 for (i = 0; i < noperands; i++)
3961 if (! goal_alternative_win[i])
3963 /* Operands that match previous ones have already been handled. */
3964 if (goal_alternative_matches[i] >= 0)
3966 /* Handle an operand with a nonoffsettable address
3967 appearing where an offsettable address will do
3968 by reloading the address into a base register.
3970 ??? We can also do this when the operand is a register and
3971 reg_equiv_mem is not offsettable, but this is a bit tricky,
3972 so we don't bother with it. It may not be worth doing. */
3973 else if (goal_alternative_matched[i] == -1
3974 && goal_alternative_offmemok[i]
3975 && MEM_P (recog_data.operand[i]))
3977 /* If the address to be reloaded is a VOIDmode constant,
3978 use the default address mode as mode of the reload register,
3979 as would have been done by find_reloads_address. */
3980 enum machine_mode address_mode;
3981 address_mode = GET_MODE (XEXP (recog_data.operand[i], 0));
3982 if (address_mode == VOIDmode)
3984 addr_space_t as = MEM_ADDR_SPACE (recog_data.operand[i]);
3985 address_mode = targetm.addr_space.address_mode (as);
3988 operand_reloadnum[i]
3989 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3990 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3991 base_reg_class (VOIDmode, MEM, SCRATCH),
3993 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3994 rld[operand_reloadnum[i]].inc
3995 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3997 /* If this operand is an output, we will have made any
3998 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3999 now we are treating part of the operand as an input, so
4000 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
4002 if (modified[i] == RELOAD_WRITE)
4004 for (j = 0; j < n_reloads; j++)
4006 if (rld[j].opnum == i)
4008 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
4009 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
4010 else if (rld[j].when_needed
4011 == RELOAD_FOR_OUTADDR_ADDRESS)
4012 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
4017 else if (goal_alternative_matched[i] == -1)
4019 operand_reloadnum[i]
4020 = push_reload ((modified[i] != RELOAD_WRITE
4021 ? recog_data.operand[i] : 0),
4022 (modified[i] != RELOAD_READ
4023 ? recog_data.operand[i] : 0),
4024 (modified[i] != RELOAD_WRITE
4025 ? recog_data.operand_loc[i] : 0),
4026 (modified[i] != RELOAD_READ
4027 ? recog_data.operand_loc[i] : 0),
4028 (enum reg_class) goal_alternative[i],
4029 (modified[i] == RELOAD_WRITE
4030 ? VOIDmode : operand_mode[i]),
4031 (modified[i] == RELOAD_READ
4032 ? VOIDmode : operand_mode[i]),
4033 (insn_code_number < 0 ? 0
4034 : insn_data[insn_code_number].operand[i].strict_low),
4035 0, i, operand_type[i]);
4037 /* In a matching pair of operands, one must be input only
4038 and the other must be output only.
4039 Pass the input operand as IN and the other as OUT. */
4040 else if (modified[i] == RELOAD_READ
4041 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
4043 operand_reloadnum[i]
4044 = push_reload (recog_data.operand[i],
4045 recog_data.operand[goal_alternative_matched[i]],
4046 recog_data.operand_loc[i],
4047 recog_data.operand_loc[goal_alternative_matched[i]],
4048 (enum reg_class) goal_alternative[i],
4050 operand_mode[goal_alternative_matched[i]],
4051 0, 0, i, RELOAD_OTHER);
4052 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
4054 else if (modified[i] == RELOAD_WRITE
4055 && modified[goal_alternative_matched[i]] == RELOAD_READ)
4057 operand_reloadnum[goal_alternative_matched[i]]
4058 = push_reload (recog_data.operand[goal_alternative_matched[i]],
4059 recog_data.operand[i],
4060 recog_data.operand_loc[goal_alternative_matched[i]],
4061 recog_data.operand_loc[i],
4062 (enum reg_class) goal_alternative[i],
4063 operand_mode[goal_alternative_matched[i]],
4065 0, 0, i, RELOAD_OTHER);
4066 operand_reloadnum[i] = output_reloadnum;
4070 gcc_assert (insn_code_number < 0);
4071 error_for_asm (insn, "inconsistent operand constraints "
4073 /* Avoid further trouble with this insn. */
4074 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
4079 else if (goal_alternative_matched[i] < 0
4080 && goal_alternative_matches[i] < 0
4081 && address_operand_reloaded[i] != 1
4084 /* For each non-matching operand that's a MEM or a pseudo-register
4085 that didn't get a hard register, make an optional reload.
4086 This may get done even if the insn needs no reloads otherwise. */
4088 rtx operand = recog_data.operand[i];
4090 while (GET_CODE (operand) == SUBREG)
4091 operand = SUBREG_REG (operand);
4092 if ((MEM_P (operand)
4094 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4095 /* If this is only for an output, the optional reload would not
4096 actually cause us to use a register now, just note that
4097 something is stored here. */
4098 && (goal_alternative[i] != NO_REGS
4099 || modified[i] == RELOAD_WRITE)
4100 && ! no_input_reloads
4101 /* An optional output reload might allow to delete INSN later.
4102 We mustn't make in-out reloads on insns that are not permitted
4104 If this is an asm, we can't delete it; we must not even call
4105 push_reload for an optional output reload in this case,
4106 because we can't be sure that the constraint allows a register,
4107 and push_reload verifies the constraints for asms. */
4108 && (modified[i] == RELOAD_READ
4109 || (! no_output_reloads && ! this_insn_is_asm)))
4110 operand_reloadnum[i]
4111 = push_reload ((modified[i] != RELOAD_WRITE
4112 ? recog_data.operand[i] : 0),
4113 (modified[i] != RELOAD_READ
4114 ? recog_data.operand[i] : 0),
4115 (modified[i] != RELOAD_WRITE
4116 ? recog_data.operand_loc[i] : 0),
4117 (modified[i] != RELOAD_READ
4118 ? recog_data.operand_loc[i] : 0),
4119 (enum reg_class) goal_alternative[i],
4120 (modified[i] == RELOAD_WRITE
4121 ? VOIDmode : operand_mode[i]),
4122 (modified[i] == RELOAD_READ
4123 ? VOIDmode : operand_mode[i]),
4124 (insn_code_number < 0 ? 0
4125 : insn_data[insn_code_number].operand[i].strict_low),
4126 1, i, operand_type[i]);
4127 /* If a memory reference remains (either as a MEM or a pseudo that
4128 did not get a hard register), yet we can't make an optional
4129 reload, check if this is actually a pseudo register reference;
4130 we then need to emit a USE and/or a CLOBBER so that reload
4131 inheritance will do the right thing. */
4135 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
4136 && reg_renumber [REGNO (operand)] < 0)))
4138 operand = *recog_data.operand_loc[i];
4140 while (GET_CODE (operand) == SUBREG)
4141 operand = SUBREG_REG (operand);
4142 if (REG_P (operand))
4144 if (modified[i] != RELOAD_WRITE)
4145 /* We mark the USE with QImode so that we recognize
4146 it as one that can be safely deleted at the end
4148 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
4150 if (modified[i] != RELOAD_READ)
4151 emit_insn_after (gen_clobber (operand), insn);
4155 else if (goal_alternative_matches[i] >= 0
4156 && goal_alternative_win[goal_alternative_matches[i]]
4157 && modified[i] == RELOAD_READ
4158 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
4159 && ! no_input_reloads && ! no_output_reloads
4162 /* Similarly, make an optional reload for a pair of matching
4163 objects that are in MEM or a pseudo that didn't get a hard reg. */
4165 rtx operand = recog_data.operand[i];
4167 while (GET_CODE (operand) == SUBREG)
4168 operand = SUBREG_REG (operand);
4169 if ((MEM_P (operand)
4171 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4172 && (goal_alternative[goal_alternative_matches[i]] != NO_REGS))
4173 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
4174 = push_reload (recog_data.operand[goal_alternative_matches[i]],
4175 recog_data.operand[i],
4176 recog_data.operand_loc[goal_alternative_matches[i]],
4177 recog_data.operand_loc[i],
4178 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
4179 operand_mode[goal_alternative_matches[i]],
4181 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
4184 /* Perform whatever substitutions on the operands we are supposed
4185 to make due to commutativity or replacement of registers
4186 with equivalent constants or memory slots. */
4188 for (i = 0; i < noperands; i++)
4190 /* We only do this on the last pass through reload, because it is
4191 possible for some data (like reg_equiv_address) to be changed during
4192 later passes. Moreover, we lose the opportunity to get a useful
4193 reload_{in,out}_reg when we do these replacements. */
4197 rtx substitution = substed_operand[i];
4199 *recog_data.operand_loc[i] = substitution;
4201 /* If we're replacing an operand with a LABEL_REF, we need to
4202 make sure that there's a REG_LABEL_OPERAND note attached to
4203 this instruction. */
4204 if (GET_CODE (substitution) == LABEL_REF
4205 && !find_reg_note (insn, REG_LABEL_OPERAND,
4206 XEXP (substitution, 0))
4207 /* For a JUMP_P, if it was a branch target it must have
4208 already been recorded as such. */
4210 || !label_is_jump_target_p (XEXP (substitution, 0),
4212 add_reg_note (insn, REG_LABEL_OPERAND, XEXP (substitution, 0));
4215 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4218 /* If this insn pattern contains any MATCH_DUP's, make sure that
4219 they will be substituted if the operands they match are substituted.
4220 Also do now any substitutions we already did on the operands.
4222 Don't do this if we aren't making replacements because we might be
4223 propagating things allocated by frame pointer elimination into places
4224 it doesn't expect. */
4226 if (insn_code_number >= 0 && replace)
4227 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4229 int opno = recog_data.dup_num[i];
4230 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4231 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4235 /* This loses because reloading of prior insns can invalidate the equivalence
4236 (or at least find_equiv_reg isn't smart enough to find it any more),
4237 causing this insn to need more reload regs than it needed before.
4238 It may be too late to make the reload regs available.
4239 Now this optimization is done safely in choose_reload_regs. */
4241 /* For each reload of a reg into some other class of reg,
4242 search for an existing equivalent reg (same value now) in the right class.
4243 We can use it as long as we don't need to change its contents. */
4244 for (i = 0; i < n_reloads; i++)
4245 if (rld[i].reg_rtx == 0
4247 && REG_P (rld[i].in)
4251 = find_equiv_reg (rld[i].in, insn, rld[i].rclass, -1,
4252 static_reload_reg_p, 0, rld[i].inmode);
4253 /* Prevent generation of insn to load the value
4254 because the one we found already has the value. */
4256 rld[i].in = rld[i].reg_rtx;
4260 /* If we detected error and replaced asm instruction by USE, forget about the
4262 if (GET_CODE (PATTERN (insn)) == USE
4263 && CONST_INT_P (XEXP (PATTERN (insn), 0)))
4266 /* Perhaps an output reload can be combined with another
4267 to reduce needs by one. */
4268 if (!goal_earlyclobber)
4271 /* If we have a pair of reloads for parts of an address, they are reloading
4272 the same object, the operands themselves were not reloaded, and they
4273 are for two operands that are supposed to match, merge the reloads and
4274 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4276 for (i = 0; i < n_reloads; i++)
4280 for (j = i + 1; j < n_reloads; j++)
4281 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4282 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4283 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4284 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4285 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4286 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4287 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4288 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4289 && rtx_equal_p (rld[i].in, rld[j].in)
4290 && (operand_reloadnum[rld[i].opnum] < 0
4291 || rld[operand_reloadnum[rld[i].opnum]].optional)
4292 && (operand_reloadnum[rld[j].opnum] < 0
4293 || rld[operand_reloadnum[rld[j].opnum]].optional)
4294 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4295 || (goal_alternative_matches[rld[j].opnum]
4298 for (k = 0; k < n_replacements; k++)
4299 if (replacements[k].what == j)
4300 replacements[k].what = i;
4302 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4303 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4304 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4306 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4311 /* Scan all the reloads and update their type.
4312 If a reload is for the address of an operand and we didn't reload
4313 that operand, change the type. Similarly, change the operand number
4314 of a reload when two operands match. If a reload is optional, treat it
4315 as though the operand isn't reloaded.
4317 ??? This latter case is somewhat odd because if we do the optional
4318 reload, it means the object is hanging around. Thus we need only
4319 do the address reload if the optional reload was NOT done.
4321 Change secondary reloads to be the address type of their operand, not
4324 If an operand's reload is now RELOAD_OTHER, change any
4325 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4326 RELOAD_FOR_OTHER_ADDRESS. */
4328 for (i = 0; i < n_reloads; i++)
4330 if (rld[i].secondary_p
4331 && rld[i].when_needed == operand_type[rld[i].opnum])
4332 rld[i].when_needed = address_type[rld[i].opnum];
4334 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4335 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4336 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4337 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4338 && (operand_reloadnum[rld[i].opnum] < 0
4339 || rld[operand_reloadnum[rld[i].opnum]].optional))
4341 /* If we have a secondary reload to go along with this reload,
4342 change its type to RELOAD_FOR_OPADDR_ADDR. */
4344 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4345 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4346 && rld[i].secondary_in_reload != -1)
4348 int secondary_in_reload = rld[i].secondary_in_reload;
4350 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4352 /* If there's a tertiary reload we have to change it also. */
4353 if (secondary_in_reload > 0
4354 && rld[secondary_in_reload].secondary_in_reload != -1)
4355 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4356 = RELOAD_FOR_OPADDR_ADDR;
4359 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4360 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4361 && rld[i].secondary_out_reload != -1)
4363 int secondary_out_reload = rld[i].secondary_out_reload;
4365 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4367 /* If there's a tertiary reload we have to change it also. */
4368 if (secondary_out_reload
4369 && rld[secondary_out_reload].secondary_out_reload != -1)
4370 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4371 = RELOAD_FOR_OPADDR_ADDR;
4374 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4375 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4376 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4378 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4381 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4382 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4383 && operand_reloadnum[rld[i].opnum] >= 0
4384 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4386 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4388 if (goal_alternative_matches[rld[i].opnum] >= 0)
4389 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4392 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4393 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4394 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4396 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4397 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4398 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4399 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4400 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4401 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4402 This is complicated by the fact that a single operand can have more
4403 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4404 choose_reload_regs without affecting code quality, and cases that
4405 actually fail are extremely rare, so it turns out to be better to fix
4406 the problem here by not generating cases that choose_reload_regs will
4408 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4409 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4411 We can reduce the register pressure by exploiting that a
4412 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4413 does not conflict with any of them, if it is only used for the first of
4414 the RELOAD_FOR_X_ADDRESS reloads. */
4416 int first_op_addr_num = -2;
4417 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4418 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4419 int need_change = 0;
4420 /* We use last_op_addr_reload and the contents of the above arrays
4421 first as flags - -2 means no instance encountered, -1 means exactly
4422 one instance encountered.
4423 If more than one instance has been encountered, we store the reload
4424 number of the first reload of the kind in question; reload numbers
4425 are known to be non-negative. */
4426 for (i = 0; i < noperands; i++)
4427 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4428 for (i = n_reloads - 1; i >= 0; i--)
4430 switch (rld[i].when_needed)
4432 case RELOAD_FOR_OPERAND_ADDRESS:
4433 if (++first_op_addr_num >= 0)
4435 first_op_addr_num = i;
4439 case RELOAD_FOR_INPUT_ADDRESS:
4440 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4442 first_inpaddr_num[rld[i].opnum] = i;
4446 case RELOAD_FOR_OUTPUT_ADDRESS:
4447 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4449 first_outpaddr_num[rld[i].opnum] = i;
4460 for (i = 0; i < n_reloads; i++)
4463 enum reload_type type;
4465 switch (rld[i].when_needed)
4467 case RELOAD_FOR_OPADDR_ADDR:
4468 first_num = first_op_addr_num;
4469 type = RELOAD_FOR_OPERAND_ADDRESS;
4471 case RELOAD_FOR_INPADDR_ADDRESS:
4472 first_num = first_inpaddr_num[rld[i].opnum];
4473 type = RELOAD_FOR_INPUT_ADDRESS;
4475 case RELOAD_FOR_OUTADDR_ADDRESS:
4476 first_num = first_outpaddr_num[rld[i].opnum];
4477 type = RELOAD_FOR_OUTPUT_ADDRESS;
4484 else if (i > first_num)
4485 rld[i].when_needed = type;
4488 /* Check if the only TYPE reload that uses reload I is
4489 reload FIRST_NUM. */
4490 for (j = n_reloads - 1; j > first_num; j--)
4492 if (rld[j].when_needed == type
4493 && (rld[i].secondary_p
4494 ? rld[j].secondary_in_reload == i
4495 : reg_mentioned_p (rld[i].in, rld[j].in)))
4497 rld[i].when_needed = type;
4506 /* See if we have any reloads that are now allowed to be merged
4507 because we've changed when the reload is needed to
4508 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4509 check for the most common cases. */
4511 for (i = 0; i < n_reloads; i++)
4512 if (rld[i].in != 0 && rld[i].out == 0
4513 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4514 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4515 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4516 for (j = 0; j < n_reloads; j++)
4517 if (i != j && rld[j].in != 0 && rld[j].out == 0
4518 && rld[j].when_needed == rld[i].when_needed
4519 && MATCHES (rld[i].in, rld[j].in)
4520 && rld[i].rclass == rld[j].rclass
4521 && !rld[i].nocombine && !rld[j].nocombine
4522 && rld[i].reg_rtx == rld[j].reg_rtx)
4524 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4525 transfer_replacements (i, j);
4530 /* If we made any reloads for addresses, see if they violate a
4531 "no input reloads" requirement for this insn. But loads that we
4532 do after the insn (such as for output addresses) are fine. */
4533 if (no_input_reloads)
4534 for (i = 0; i < n_reloads; i++)
4535 gcc_assert (rld[i].in == 0
4536 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS
4537 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS);
4540 /* Compute reload_mode and reload_nregs. */
4541 for (i = 0; i < n_reloads; i++)
4544 = (rld[i].inmode == VOIDmode
4545 || (GET_MODE_SIZE (rld[i].outmode)
4546 > GET_MODE_SIZE (rld[i].inmode)))
4547 ? rld[i].outmode : rld[i].inmode;
4549 rld[i].nregs = ira_reg_class_max_nregs [rld[i].rclass][rld[i].mode];
4552 /* Special case a simple move with an input reload and a
4553 destination of a hard reg, if the hard reg is ok, use it. */
4554 for (i = 0; i < n_reloads; i++)
4555 if (rld[i].when_needed == RELOAD_FOR_INPUT
4556 && GET_CODE (PATTERN (insn)) == SET
4557 && REG_P (SET_DEST (PATTERN (insn)))
4558 && (SET_SRC (PATTERN (insn)) == rld[i].in
4559 || SET_SRC (PATTERN (insn)) == rld[i].in_reg)
4560 && !elimination_target_reg_p (SET_DEST (PATTERN (insn))))
4562 rtx dest = SET_DEST (PATTERN (insn));
4563 unsigned int regno = REGNO (dest);
4565 if (regno < FIRST_PSEUDO_REGISTER
4566 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno)
4567 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4569 int nr = hard_regno_nregs[regno][rld[i].mode];
4572 for (nri = 1; nri < nr; nri ++)
4573 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno + nri))
4577 rld[i].reg_rtx = dest;
4584 /* Return true if alternative number ALTNUM in constraint-string
4585 CONSTRAINT is guaranteed to accept a reloaded constant-pool reference.
4586 MEM gives the reference if it didn't need any reloads, otherwise it
4590 alternative_allows_const_pool_ref (rtx mem ATTRIBUTE_UNUSED,
4591 const char *constraint, int altnum)
4595 /* Skip alternatives before the one requested. */
4598 while (*constraint++ != ',')
4602 /* Scan the requested alternative for TARGET_MEM_CONSTRAINT or 'o'.
4603 If one of them is present, this alternative accepts the result of
4604 passing a constant-pool reference through find_reloads_toplev.
4606 The same is true of extra memory constraints if the address
4607 was reloaded into a register. However, the target may elect
4608 to disallow the original constant address, forcing it to be
4609 reloaded into a register instead. */
4610 for (; (c = *constraint) && c != ',' && c != '#';
4611 constraint += CONSTRAINT_LEN (c, constraint))
4613 if (c == TARGET_MEM_CONSTRAINT || c == 'o')
4615 #ifdef EXTRA_CONSTRAINT_STR
4616 if (EXTRA_MEMORY_CONSTRAINT (c, constraint)
4617 && (mem == NULL || EXTRA_CONSTRAINT_STR (mem, c, constraint)))
4624 /* Scan X for memory references and scan the addresses for reloading.
4625 Also checks for references to "constant" regs that we want to eliminate
4626 and replaces them with the values they stand for.
4627 We may alter X destructively if it contains a reference to such.
4628 If X is just a constant reg, we return the equivalent value
4631 IND_LEVELS says how many levels of indirect addressing this machine
4634 OPNUM and TYPE identify the purpose of the reload.
4636 IS_SET_DEST is true if X is the destination of a SET, which is not
4637 appropriate to be replaced by a constant.
4639 INSN, if nonzero, is the insn in which we do the reload. It is used
4640 to determine if we may generate output reloads, and where to put USEs
4641 for pseudos that we have to replace with stack slots.
4643 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4644 result of find_reloads_address. */
4647 find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4648 int ind_levels, int is_set_dest, rtx insn,
4649 int *address_reloaded)
4651 RTX_CODE code = GET_CODE (x);
4653 const char *fmt = GET_RTX_FORMAT (code);
4659 /* This code is duplicated for speed in find_reloads. */
4660 int regno = REGNO (x);
4661 if (reg_equiv_constant (regno) != 0 && !is_set_dest)
4662 x = reg_equiv_constant (regno);
4664 /* This creates (subreg (mem...)) which would cause an unnecessary
4665 reload of the mem. */
4666 else if (reg_equiv_mem (regno) != 0)
4667 x = reg_equiv_mem (regno);
4669 else if (reg_equiv_memory_loc (regno)
4670 && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
4672 rtx mem = make_memloc (x, regno);
4673 if (reg_equiv_address (regno)
4674 || ! rtx_equal_p (mem, reg_equiv_mem (regno)))
4676 /* If this is not a toplevel operand, find_reloads doesn't see
4677 this substitution. We have to emit a USE of the pseudo so
4678 that delete_output_reload can see it. */
4679 if (replace_reloads && recog_data.operand[opnum] != x)
4680 /* We mark the USE with QImode so that we recognize it
4681 as one that can be safely deleted at the end of
4683 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4686 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4687 opnum, type, ind_levels, insn);
4688 if (!rtx_equal_p (x, mem))
4689 push_reg_equiv_alt_mem (regno, x);
4690 if (address_reloaded)
4691 *address_reloaded = i;
4700 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4701 opnum, type, ind_levels, insn);
4702 if (address_reloaded)
4703 *address_reloaded = i;
4708 if (code == SUBREG && REG_P (SUBREG_REG (x)))
4710 /* Check for SUBREG containing a REG that's equivalent to a
4711 constant. If the constant has a known value, truncate it
4712 right now. Similarly if we are extracting a single-word of a
4713 multi-word constant. If the constant is symbolic, allow it
4714 to be substituted normally. push_reload will strip the
4715 subreg later. The constant must not be VOIDmode, because we
4716 will lose the mode of the register (this should never happen
4717 because one of the cases above should handle it). */
4719 int regno = REGNO (SUBREG_REG (x));
4722 if (regno >= FIRST_PSEUDO_REGISTER
4723 && reg_renumber[regno] < 0
4724 && reg_equiv_constant (regno) != 0)
4727 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant (regno),
4728 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4730 if (CONSTANT_P (tem)
4731 && !targetm.legitimate_constant_p (GET_MODE (x), tem))
4733 tem = force_const_mem (GET_MODE (x), tem);
4734 i = find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4735 &XEXP (tem, 0), opnum, type,
4737 if (address_reloaded)
4738 *address_reloaded = i;
4743 /* If the subreg contains a reg that will be converted to a mem,
4744 convert the subreg to a narrower memref now.
4745 Otherwise, we would get (subreg (mem ...) ...),
4746 which would force reload of the mem.
4748 We also need to do this if there is an equivalent MEM that is
4749 not offsettable. In that case, alter_subreg would produce an
4750 invalid address on big-endian machines.
4752 For machines that extend byte loads, we must not reload using
4753 a wider mode if we have a paradoxical SUBREG. find_reloads will
4754 force a reload in that case. So we should not do anything here. */
4756 if (regno >= FIRST_PSEUDO_REGISTER
4757 #ifdef LOAD_EXTEND_OP
4758 && !paradoxical_subreg_p (x)
4760 && (reg_equiv_address (regno) != 0
4761 || (reg_equiv_mem (regno) != 0
4762 && (! strict_memory_address_addr_space_p
4763 (GET_MODE (x), XEXP (reg_equiv_mem (regno), 0),
4764 MEM_ADDR_SPACE (reg_equiv_mem (regno)))
4765 || ! offsettable_memref_p (reg_equiv_mem (regno))
4766 || num_not_at_initial_offset))))
4767 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4768 insn, address_reloaded);
4771 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4775 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4776 ind_levels, is_set_dest, insn,
4778 /* If we have replaced a reg with it's equivalent memory loc -
4779 that can still be handled here e.g. if it's in a paradoxical
4780 subreg - we must make the change in a copy, rather than using
4781 a destructive change. This way, find_reloads can still elect
4782 not to do the change. */
4783 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4785 x = shallow_copy_rtx (x);
4788 XEXP (x, i) = new_part;
4794 /* Return a mem ref for the memory equivalent of reg REGNO.
4795 This mem ref is not shared with anything. */
4798 make_memloc (rtx ad, int regno)
4800 /* We must rerun eliminate_regs, in case the elimination
4801 offsets have changed. */
4803 = XEXP (eliminate_regs (reg_equiv_memory_loc (regno), VOIDmode, NULL_RTX),
4806 /* If TEM might contain a pseudo, we must copy it to avoid
4807 modifying it when we do the substitution for the reload. */
4808 if (rtx_varies_p (tem, 0))
4809 tem = copy_rtx (tem);
4811 tem = replace_equiv_address_nv (reg_equiv_memory_loc (regno), tem);
4812 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4814 /* Copy the result if it's still the same as the equivalence, to avoid
4815 modifying it when we do the substitution for the reload. */
4816 if (tem == reg_equiv_memory_loc (regno))
4817 tem = copy_rtx (tem);
4821 /* Returns true if AD could be turned into a valid memory reference
4822 to mode MODE in address space AS by reloading the part pointed to
4823 by PART into a register. */
4826 maybe_memory_address_addr_space_p (enum machine_mode mode, rtx ad,
4827 addr_space_t as, rtx *part)
4831 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4834 retv = memory_address_addr_space_p (mode, ad, as);
4840 /* Record all reloads needed for handling memory address AD
4841 which appears in *LOC in a memory reference to mode MODE
4842 which itself is found in location *MEMREFLOC.
4843 Note that we take shortcuts assuming that no multi-reg machine mode
4844 occurs as part of an address.
4846 OPNUM and TYPE specify the purpose of this reload.
4848 IND_LEVELS says how many levels of indirect addressing this machine
4851 INSN, if nonzero, is the insn in which we do the reload. It is used
4852 to determine if we may generate output reloads, and where to put USEs
4853 for pseudos that we have to replace with stack slots.
4855 Value is one if this address is reloaded or replaced as a whole; it is
4856 zero if the top level of this address was not reloaded or replaced, and
4857 it is -1 if it may or may not have been reloaded or replaced.
4859 Note that there is no verification that the address will be valid after
4860 this routine does its work. Instead, we rely on the fact that the address
4861 was valid when reload started. So we need only undo things that reload
4862 could have broken. These are wrong register types, pseudos not allocated
4863 to a hard register, and frame pointer elimination. */
4866 find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4867 rtx *loc, int opnum, enum reload_type type,
4868 int ind_levels, rtx insn)
4870 addr_space_t as = memrefloc? MEM_ADDR_SPACE (*memrefloc)
4871 : ADDR_SPACE_GENERIC;
4873 int removed_and = 0;
4877 /* If the address is a register, see if it is a legitimate address and
4878 reload if not. We first handle the cases where we need not reload
4879 or where we must reload in a non-standard way. */
4885 if (reg_equiv_constant (regno) != 0)
4887 find_reloads_address_part (reg_equiv_constant (regno), loc,
4888 base_reg_class (mode, MEM, SCRATCH),
4889 GET_MODE (ad), opnum, type, ind_levels);
4893 tem = reg_equiv_memory_loc (regno);
4896 if (reg_equiv_address (regno) != 0 || num_not_at_initial_offset)
4898 tem = make_memloc (ad, regno);
4899 if (! strict_memory_address_addr_space_p (GET_MODE (tem),
4901 MEM_ADDR_SPACE (tem)))
4905 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4906 &XEXP (tem, 0), opnum,
4907 ADDR_TYPE (type), ind_levels, insn);
4908 if (!rtx_equal_p (tem, orig))
4909 push_reg_equiv_alt_mem (regno, tem);
4911 /* We can avoid a reload if the register's equivalent memory
4912 expression is valid as an indirect memory address.
4913 But not all addresses are valid in a mem used as an indirect
4914 address: only reg or reg+constant. */
4917 && strict_memory_address_addr_space_p (mode, tem, as)
4918 && (REG_P (XEXP (tem, 0))
4919 || (GET_CODE (XEXP (tem, 0)) == PLUS
4920 && REG_P (XEXP (XEXP (tem, 0), 0))
4921 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4923 /* TEM is not the same as what we'll be replacing the
4924 pseudo with after reload, put a USE in front of INSN
4925 in the final reload pass. */
4927 && num_not_at_initial_offset
4928 && ! rtx_equal_p (tem, reg_equiv_mem (regno)))
4931 /* We mark the USE with QImode so that we
4932 recognize it as one that can be safely
4933 deleted at the end of reload. */
4934 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4937 /* This doesn't really count as replacing the address
4938 as a whole, since it is still a memory access. */
4946 /* The only remaining case where we can avoid a reload is if this is a
4947 hard register that is valid as a base register and which is not the
4948 subject of a CLOBBER in this insn. */
4950 else if (regno < FIRST_PSEUDO_REGISTER
4951 && regno_ok_for_base_p (regno, mode, MEM, SCRATCH)
4952 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4955 /* If we do not have one of the cases above, we must do the reload. */
4956 push_reload (ad, NULL_RTX, loc, (rtx*) 0, base_reg_class (mode, MEM, SCRATCH),
4957 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4961 if (strict_memory_address_addr_space_p (mode, ad, as))
4963 /* The address appears valid, so reloads are not needed.
4964 But the address may contain an eliminable register.
4965 This can happen because a machine with indirect addressing
4966 may consider a pseudo register by itself a valid address even when
4967 it has failed to get a hard reg.
4968 So do a tree-walk to find and eliminate all such regs. */
4970 /* But first quickly dispose of a common case. */
4971 if (GET_CODE (ad) == PLUS
4972 && CONST_INT_P (XEXP (ad, 1))
4973 && REG_P (XEXP (ad, 0))
4974 && reg_equiv_constant (REGNO (XEXP (ad, 0))) == 0)
4977 subst_reg_equivs_changed = 0;
4978 *loc = subst_reg_equivs (ad, insn);
4980 if (! subst_reg_equivs_changed)
4983 /* Check result for validity after substitution. */
4984 if (strict_memory_address_addr_space_p (mode, ad, as))
4988 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4991 if (memrefloc && ADDR_SPACE_GENERIC_P (as))
4993 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4998 *memrefloc = copy_rtx (*memrefloc);
4999 XEXP (*memrefloc, 0) = ad;
5000 move_replacements (&ad, &XEXP (*memrefloc, 0));
5006 /* The address is not valid. We have to figure out why. First see if
5007 we have an outer AND and remove it if so. Then analyze what's inside. */
5009 if (GET_CODE (ad) == AND)
5012 loc = &XEXP (ad, 0);
5016 /* One possibility for why the address is invalid is that it is itself
5017 a MEM. This can happen when the frame pointer is being eliminated, a
5018 pseudo is not allocated to a hard register, and the offset between the
5019 frame and stack pointers is not its initial value. In that case the
5020 pseudo will have been replaced by a MEM referring to the
5024 /* First ensure that the address in this MEM is valid. Then, unless
5025 indirect addresses are valid, reload the MEM into a register. */
5027 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
5028 opnum, ADDR_TYPE (type),
5029 ind_levels == 0 ? 0 : ind_levels - 1, insn);
5031 /* If tem was changed, then we must create a new memory reference to
5032 hold it and store it back into memrefloc. */
5033 if (tem != ad && memrefloc)
5035 *memrefloc = copy_rtx (*memrefloc);
5036 copy_replacements (tem, XEXP (*memrefloc, 0));
5037 loc = &XEXP (*memrefloc, 0);
5039 loc = &XEXP (*loc, 0);
5042 /* Check similar cases as for indirect addresses as above except
5043 that we can allow pseudos and a MEM since they should have been
5044 taken care of above. */
5047 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
5048 || MEM_P (XEXP (tem, 0))
5049 || ! (REG_P (XEXP (tem, 0))
5050 || (GET_CODE (XEXP (tem, 0)) == PLUS
5051 && REG_P (XEXP (XEXP (tem, 0), 0))
5052 && CONST_INT_P (XEXP (XEXP (tem, 0), 1)))))
5054 /* Must use TEM here, not AD, since it is the one that will
5055 have any subexpressions reloaded, if needed. */
5056 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
5057 base_reg_class (mode, MEM, SCRATCH), GET_MODE (tem),
5060 return ! removed_and;
5066 /* If we have address of a stack slot but it's not valid because the
5067 displacement is too large, compute the sum in a register.
5068 Handle all base registers here, not just fp/ap/sp, because on some
5069 targets (namely SH) we can also get too large displacements from
5070 big-endian corrections. */
5071 else if (GET_CODE (ad) == PLUS
5072 && REG_P (XEXP (ad, 0))
5073 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
5074 && CONST_INT_P (XEXP (ad, 1))
5075 && (regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode, PLUS,
5077 /* Similarly, if we were to reload the base register and the
5078 mem+offset address is still invalid, then we want to reload
5079 the whole address, not just the base register. */
5080 || ! maybe_memory_address_addr_space_p
5081 (mode, ad, as, &(XEXP (ad, 0)))))
5084 /* Unshare the MEM rtx so we can safely alter it. */
5087 *memrefloc = copy_rtx (*memrefloc);
5088 loc = &XEXP (*memrefloc, 0);
5090 loc = &XEXP (*loc, 0);
5093 if (double_reg_address_ok
5094 && regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode,
5097 /* Unshare the sum as well. */
5098 *loc = ad = copy_rtx (ad);
5100 /* Reload the displacement into an index reg.
5101 We assume the frame pointer or arg pointer is a base reg. */
5102 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
5103 INDEX_REG_CLASS, GET_MODE (ad), opnum,
5109 /* If the sum of two regs is not necessarily valid,
5110 reload the sum into a base reg.
5111 That will at least work. */
5112 find_reloads_address_part (ad, loc,
5113 base_reg_class (mode, MEM, SCRATCH),
5114 GET_MODE (ad), opnum, type, ind_levels);
5116 return ! removed_and;
5119 /* If we have an indexed stack slot, there are three possible reasons why
5120 it might be invalid: The index might need to be reloaded, the address
5121 might have been made by frame pointer elimination and hence have a
5122 constant out of range, or both reasons might apply.
5124 We can easily check for an index needing reload, but even if that is the
5125 case, we might also have an invalid constant. To avoid making the
5126 conservative assumption and requiring two reloads, we see if this address
5127 is valid when not interpreted strictly. If it is, the only problem is
5128 that the index needs a reload and find_reloads_address_1 will take care
5131 Handle all base registers here, not just fp/ap/sp, because on some
5132 targets (namely SPARC) we can also get invalid addresses from preventive
5133 subreg big-endian corrections made by find_reloads_toplev. We
5134 can also get expressions involving LO_SUM (rather than PLUS) from
5135 find_reloads_subreg_address.
5137 If we decide to do something, it must be that `double_reg_address_ok'
5138 is true. We generate a reload of the base register + constant and
5139 rework the sum so that the reload register will be added to the index.
5140 This is safe because we know the address isn't shared.
5142 We check for the base register as both the first and second operand of
5143 the innermost PLUS and/or LO_SUM. */
5145 for (op_index = 0; op_index < 2; ++op_index)
5147 rtx operand, addend;
5148 enum rtx_code inner_code;
5150 if (GET_CODE (ad) != PLUS)
5153 inner_code = GET_CODE (XEXP (ad, 0));
5154 if (!(GET_CODE (ad) == PLUS
5155 && CONST_INT_P (XEXP (ad, 1))
5156 && (inner_code == PLUS || inner_code == LO_SUM)))
5159 operand = XEXP (XEXP (ad, 0), op_index);
5160 if (!REG_P (operand) || REGNO (operand) >= FIRST_PSEUDO_REGISTER)
5163 addend = XEXP (XEXP (ad, 0), 1 - op_index);
5165 if ((regno_ok_for_base_p (REGNO (operand), mode, inner_code,
5167 || operand == frame_pointer_rtx
5168 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
5169 || operand == hard_frame_pointer_rtx
5171 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5172 || operand == arg_pointer_rtx
5174 || operand == stack_pointer_rtx)
5175 && ! maybe_memory_address_addr_space_p
5176 (mode, ad, as, &XEXP (XEXP (ad, 0), 1 - op_index)))
5181 offset_reg = plus_constant (operand, INTVAL (XEXP (ad, 1)));
5183 /* Form the adjusted address. */
5184 if (GET_CODE (XEXP (ad, 0)) == PLUS)
5185 ad = gen_rtx_PLUS (GET_MODE (ad),
5186 op_index == 0 ? offset_reg : addend,
5187 op_index == 0 ? addend : offset_reg);
5189 ad = gen_rtx_LO_SUM (GET_MODE (ad),
5190 op_index == 0 ? offset_reg : addend,
5191 op_index == 0 ? addend : offset_reg);
5194 cls = base_reg_class (mode, MEM, GET_CODE (addend));
5195 find_reloads_address_part (XEXP (ad, op_index),
5196 &XEXP (ad, op_index), cls,
5197 GET_MODE (ad), opnum, type, ind_levels);
5198 find_reloads_address_1 (mode,
5199 XEXP (ad, 1 - op_index), 1, GET_CODE (ad),
5200 GET_CODE (XEXP (ad, op_index)),
5201 &XEXP (ad, 1 - op_index), opnum,
5208 /* See if address becomes valid when an eliminable register
5209 in a sum is replaced. */
5212 if (GET_CODE (ad) == PLUS)
5213 tem = subst_indexed_address (ad);
5214 if (tem != ad && strict_memory_address_addr_space_p (mode, tem, as))
5216 /* Ok, we win that way. Replace any additional eliminable
5219 subst_reg_equivs_changed = 0;
5220 tem = subst_reg_equivs (tem, insn);
5222 /* Make sure that didn't make the address invalid again. */
5224 if (! subst_reg_equivs_changed
5225 || strict_memory_address_addr_space_p (mode, tem, as))
5232 /* If constants aren't valid addresses, reload the constant address
5234 if (CONSTANT_P (ad) && ! strict_memory_address_addr_space_p (mode, ad, as))
5236 enum machine_mode address_mode = GET_MODE (ad);
5237 if (address_mode == VOIDmode)
5238 address_mode = targetm.addr_space.address_mode (as);
5240 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5241 Unshare it so we can safely alter it. */
5242 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
5243 && CONSTANT_POOL_ADDRESS_P (ad))
5245 *memrefloc = copy_rtx (*memrefloc);
5246 loc = &XEXP (*memrefloc, 0);
5248 loc = &XEXP (*loc, 0);
5251 find_reloads_address_part (ad, loc, base_reg_class (mode, MEM, SCRATCH),
5252 address_mode, opnum, type, ind_levels);
5253 return ! removed_and;
5256 return find_reloads_address_1 (mode, ad, 0, MEM, SCRATCH, loc, opnum, type,
5260 /* Find all pseudo regs appearing in AD
5261 that are eliminable in favor of equivalent values
5262 and do not have hard regs; replace them by their equivalents.
5263 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5264 front of it for pseudos that we have to replace with stack slots. */
5267 subst_reg_equivs (rtx ad, rtx insn)
5269 RTX_CODE code = GET_CODE (ad);
5289 int regno = REGNO (ad);
5291 if (reg_equiv_constant (regno) != 0)
5293 subst_reg_equivs_changed = 1;
5294 return reg_equiv_constant (regno);
5296 if (reg_equiv_memory_loc (regno) && num_not_at_initial_offset)
5298 rtx mem = make_memloc (ad, regno);
5299 if (! rtx_equal_p (mem, reg_equiv_mem (regno)))
5301 subst_reg_equivs_changed = 1;
5302 /* We mark the USE with QImode so that we recognize it
5303 as one that can be safely deleted at the end of
5305 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5314 /* Quickly dispose of a common case. */
5315 if (XEXP (ad, 0) == frame_pointer_rtx
5316 && CONST_INT_P (XEXP (ad, 1)))
5324 fmt = GET_RTX_FORMAT (code);
5325 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5327 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5331 /* Compute the sum of X and Y, making canonicalizations assumed in an
5332 address, namely: sum constant integers, surround the sum of two
5333 constants with a CONST, put the constant as the second operand, and
5334 group the constant on the outermost sum.
5336 This routine assumes both inputs are already in canonical form. */
5339 form_sum (enum machine_mode mode, rtx x, rtx y)
5343 gcc_assert (GET_MODE (x) == mode || GET_MODE (x) == VOIDmode);
5344 gcc_assert (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode);
5346 if (CONST_INT_P (x))
5347 return plus_constant (y, INTVAL (x));
5348 else if (CONST_INT_P (y))
5349 return plus_constant (x, INTVAL (y));
5350 else if (CONSTANT_P (x))
5351 tem = x, x = y, y = tem;
5353 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5354 return form_sum (mode, XEXP (x, 0), form_sum (mode, XEXP (x, 1), y));
5356 /* Note that if the operands of Y are specified in the opposite
5357 order in the recursive calls below, infinite recursion will occur. */
5358 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5359 return form_sum (mode, form_sum (mode, x, XEXP (y, 0)), XEXP (y, 1));
5361 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5362 constant will have been placed second. */
5363 if (CONSTANT_P (x) && CONSTANT_P (y))
5365 if (GET_CODE (x) == CONST)
5367 if (GET_CODE (y) == CONST)
5370 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5373 return gen_rtx_PLUS (mode, x, y);
5376 /* If ADDR is a sum containing a pseudo register that should be
5377 replaced with a constant (from reg_equiv_constant),
5378 return the result of doing so, and also apply the associative
5379 law so that the result is more likely to be a valid address.
5380 (But it is not guaranteed to be one.)
5382 Note that at most one register is replaced, even if more are
5383 replaceable. Also, we try to put the result into a canonical form
5384 so it is more likely to be a valid address.
5386 In all other cases, return ADDR. */
5389 subst_indexed_address (rtx addr)
5391 rtx op0 = 0, op1 = 0, op2 = 0;
5395 if (GET_CODE (addr) == PLUS)
5397 /* Try to find a register to replace. */
5398 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5400 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5401 && reg_renumber[regno] < 0
5402 && reg_equiv_constant (regno) != 0)
5403 op0 = reg_equiv_constant (regno);
5404 else if (REG_P (op1)
5405 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5406 && reg_renumber[regno] < 0
5407 && reg_equiv_constant (regno) != 0)
5408 op1 = reg_equiv_constant (regno);
5409 else if (GET_CODE (op0) == PLUS
5410 && (tem = subst_indexed_address (op0)) != op0)
5412 else if (GET_CODE (op1) == PLUS
5413 && (tem = subst_indexed_address (op1)) != op1)
5418 /* Pick out up to three things to add. */
5419 if (GET_CODE (op1) == PLUS)
5420 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5421 else if (GET_CODE (op0) == PLUS)
5422 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5424 /* Compute the sum. */
5426 op1 = form_sum (GET_MODE (addr), op1, op2);
5428 op0 = form_sum (GET_MODE (addr), op0, op1);
5435 /* Update the REG_INC notes for an insn. It updates all REG_INC
5436 notes for the instruction which refer to REGNO the to refer
5437 to the reload number.
5439 INSN is the insn for which any REG_INC notes need updating.
5441 REGNO is the register number which has been reloaded.
5443 RELOADNUM is the reload number. */
5446 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5447 int reloadnum ATTRIBUTE_UNUSED)
5452 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5453 if (REG_NOTE_KIND (link) == REG_INC
5454 && (int) REGNO (XEXP (link, 0)) == regno)
5455 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5459 /* Record the pseudo registers we must reload into hard registers in a
5460 subexpression of a would-be memory address, X referring to a value
5461 in mode MODE. (This function is not called if the address we find
5464 CONTEXT = 1 means we are considering regs as index regs,
5465 = 0 means we are considering them as base regs.
5466 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5468 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5469 is the code of the index part of the address. Otherwise, pass SCRATCH
5471 OPNUM and TYPE specify the purpose of any reloads made.
5473 IND_LEVELS says how many levels of indirect addressing are
5474 supported at this point in the address.
5476 INSN, if nonzero, is the insn in which we do the reload. It is used
5477 to determine if we may generate output reloads.
5479 We return nonzero if X, as a whole, is reloaded or replaced. */
5481 /* Note that we take shortcuts assuming that no multi-reg machine mode
5482 occurs as part of an address.
5483 Also, this is not fully machine-customizable; it works for machines
5484 such as VAXen and 68000's and 32000's, but other possible machines
5485 could have addressing modes that this does not handle right.
5486 If you add push_reload calls here, you need to make sure gen_reload
5487 handles those cases gracefully. */
5490 find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
5491 enum rtx_code outer_code, enum rtx_code index_code,
5492 rtx *loc, int opnum, enum reload_type type,
5493 int ind_levels, rtx insn)
5495 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, OUTER, INDEX) \
5497 ? regno_ok_for_base_p (REGNO, MODE, OUTER, INDEX) \
5498 : REGNO_OK_FOR_INDEX_P (REGNO))
5500 enum reg_class context_reg_class;
5501 RTX_CODE code = GET_CODE (x);
5504 context_reg_class = INDEX_REG_CLASS;
5506 context_reg_class = base_reg_class (mode, outer_code, index_code);
5512 rtx orig_op0 = XEXP (x, 0);
5513 rtx orig_op1 = XEXP (x, 1);
5514 RTX_CODE code0 = GET_CODE (orig_op0);
5515 RTX_CODE code1 = GET_CODE (orig_op1);
5519 if (GET_CODE (op0) == SUBREG)
5521 op0 = SUBREG_REG (op0);
5522 code0 = GET_CODE (op0);
5523 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5524 op0 = gen_rtx_REG (word_mode,
5526 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5527 GET_MODE (SUBREG_REG (orig_op0)),
5528 SUBREG_BYTE (orig_op0),
5529 GET_MODE (orig_op0))));
5532 if (GET_CODE (op1) == SUBREG)
5534 op1 = SUBREG_REG (op1);
5535 code1 = GET_CODE (op1);
5536 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5537 /* ??? Why is this given op1's mode and above for
5538 ??? op0 SUBREGs we use word_mode? */
5539 op1 = gen_rtx_REG (GET_MODE (op1),
5541 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5542 GET_MODE (SUBREG_REG (orig_op1)),
5543 SUBREG_BYTE (orig_op1),
5544 GET_MODE (orig_op1))));
5546 /* Plus in the index register may be created only as a result of
5547 register rematerialization for expression like &localvar*4. Reload it.
5548 It may be possible to combine the displacement on the outer level,
5549 but it is probably not worthwhile to do so. */
5552 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5553 opnum, ADDR_TYPE (type), ind_levels, insn);
5554 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5556 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5560 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5561 || code0 == ZERO_EXTEND || code1 == MEM)
5563 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5564 &XEXP (x, 0), opnum, type, ind_levels,
5566 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5567 &XEXP (x, 1), opnum, type, ind_levels,
5571 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5572 || code1 == ZERO_EXTEND || code0 == MEM)
5574 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5575 &XEXP (x, 0), opnum, type, ind_levels,
5577 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5578 &XEXP (x, 1), opnum, type, ind_levels,
5582 else if (code0 == CONST_INT || code0 == CONST
5583 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5584 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5585 &XEXP (x, 1), opnum, type, ind_levels,
5588 else if (code1 == CONST_INT || code1 == CONST
5589 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5590 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5591 &XEXP (x, 0), opnum, type, ind_levels,
5594 else if (code0 == REG && code1 == REG)
5596 if (REGNO_OK_FOR_INDEX_P (REGNO (op1))
5597 && regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5599 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0))
5600 && regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5602 else if (regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5603 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5604 &XEXP (x, 1), opnum, type, ind_levels,
5606 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1)))
5607 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5608 &XEXP (x, 0), opnum, type, ind_levels,
5610 else if (regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5611 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5612 &XEXP (x, 0), opnum, type, ind_levels,
5614 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0)))
5615 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5616 &XEXP (x, 1), opnum, type, ind_levels,
5620 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5621 &XEXP (x, 0), opnum, type, ind_levels,
5623 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5624 &XEXP (x, 1), opnum, type, ind_levels,
5629 else if (code0 == REG)
5631 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5632 &XEXP (x, 0), opnum, type, ind_levels,
5634 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5635 &XEXP (x, 1), opnum, type, ind_levels,
5639 else if (code1 == REG)
5641 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5642 &XEXP (x, 1), opnum, type, ind_levels,
5644 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5645 &XEXP (x, 0), opnum, type, ind_levels,
5655 rtx op0 = XEXP (x, 0);
5656 rtx op1 = XEXP (x, 1);
5657 enum rtx_code index_code;
5661 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5664 /* Currently, we only support {PRE,POST}_MODIFY constructs
5665 where a base register is {inc,dec}remented by the contents
5666 of another register or by a constant value. Thus, these
5667 operands must match. */
5668 gcc_assert (op0 == XEXP (op1, 0));
5670 /* Require index register (or constant). Let's just handle the
5671 register case in the meantime... If the target allows
5672 auto-modify by a constant then we could try replacing a pseudo
5673 register with its equivalent constant where applicable.
5675 We also handle the case where the register was eliminated
5676 resulting in a PLUS subexpression.
5678 If we later decide to reload the whole PRE_MODIFY or
5679 POST_MODIFY, inc_for_reload might clobber the reload register
5680 before reading the index. The index register might therefore
5681 need to live longer than a TYPE reload normally would, so be
5682 conservative and class it as RELOAD_OTHER. */
5683 if ((REG_P (XEXP (op1, 1))
5684 && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5685 || GET_CODE (XEXP (op1, 1)) == PLUS)
5686 find_reloads_address_1 (mode, XEXP (op1, 1), 1, code, SCRATCH,
5687 &XEXP (op1, 1), opnum, RELOAD_OTHER,
5690 gcc_assert (REG_P (XEXP (op1, 0)));
5692 regno = REGNO (XEXP (op1, 0));
5693 index_code = GET_CODE (XEXP (op1, 1));
5695 /* A register that is incremented cannot be constant! */
5696 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5697 || reg_equiv_constant (regno) == 0);
5699 /* Handle a register that is equivalent to a memory location
5700 which cannot be addressed directly. */
5701 if (reg_equiv_memory_loc (regno) != 0
5702 && (reg_equiv_address (regno) != 0
5703 || num_not_at_initial_offset))
5705 rtx tem = make_memloc (XEXP (x, 0), regno);
5707 if (reg_equiv_address (regno)
5708 || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
5712 /* First reload the memory location's address.
5713 We can't use ADDR_TYPE (type) here, because we need to
5714 write back the value after reading it, hence we actually
5715 need two registers. */
5716 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5717 &XEXP (tem, 0), opnum,
5721 if (!rtx_equal_p (tem, orig))
5722 push_reg_equiv_alt_mem (regno, tem);
5724 /* Then reload the memory location into a base
5726 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5728 base_reg_class (mode, code,
5730 GET_MODE (x), GET_MODE (x), 0,
5731 0, opnum, RELOAD_OTHER);
5733 update_auto_inc_notes (this_insn, regno, reloadnum);
5738 if (reg_renumber[regno] >= 0)
5739 regno = reg_renumber[regno];
5741 /* We require a base register here... */
5742 if (!regno_ok_for_base_p (regno, GET_MODE (x), code, index_code))
5744 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5745 &XEXP (op1, 0), &XEXP (x, 0),
5746 base_reg_class (mode, code, index_code),
5747 GET_MODE (x), GET_MODE (x), 0, 0,
5748 opnum, RELOAD_OTHER);
5750 update_auto_inc_notes (this_insn, regno, reloadnum);
5760 if (REG_P (XEXP (x, 0)))
5762 int regno = REGNO (XEXP (x, 0));
5766 /* A register that is incremented cannot be constant! */
5767 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5768 || reg_equiv_constant (regno) == 0);
5770 /* Handle a register that is equivalent to a memory location
5771 which cannot be addressed directly. */
5772 if (reg_equiv_memory_loc (regno) != 0
5773 && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
5775 rtx tem = make_memloc (XEXP (x, 0), regno);
5776 if (reg_equiv_address (regno)
5777 || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
5781 /* First reload the memory location's address.
5782 We can't use ADDR_TYPE (type) here, because we need to
5783 write back the value after reading it, hence we actually
5784 need two registers. */
5785 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5786 &XEXP (tem, 0), opnum, type,
5788 if (!rtx_equal_p (tem, orig))
5789 push_reg_equiv_alt_mem (regno, tem);
5790 /* Put this inside a new increment-expression. */
5791 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5792 /* Proceed to reload that, as if it contained a register. */
5796 /* If we have a hard register that is ok in this incdec context,
5797 don't make a reload. If the register isn't nice enough for
5798 autoincdec, we can reload it. But, if an autoincrement of a
5799 register that we here verified as playing nice, still outside
5800 isn't "valid", it must be that no autoincrement is "valid".
5801 If that is true and something made an autoincrement anyway,
5802 this must be a special context where one is allowed.
5803 (For example, a "push" instruction.)
5804 We can't improve this address, so leave it alone. */
5806 /* Otherwise, reload the autoincrement into a suitable hard reg
5807 and record how much to increment by. */
5809 if (reg_renumber[regno] >= 0)
5810 regno = reg_renumber[regno];
5811 if (regno >= FIRST_PSEUDO_REGISTER
5812 || !REG_OK_FOR_CONTEXT (context, regno, mode, code,
5817 /* If we can output the register afterwards, do so, this
5818 saves the extra update.
5819 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5820 CALL_INSN - and it does not set CC0.
5821 But don't do this if we cannot directly address the
5822 memory location, since this will make it harder to
5823 reuse address reloads, and increases register pressure.
5824 Also don't do this if we can probably update x directly. */
5825 rtx equiv = (MEM_P (XEXP (x, 0))
5827 : reg_equiv_mem (regno));
5828 enum insn_code icode = optab_handler (add_optab, GET_MODE (x));
5829 if (insn && NONJUMP_INSN_P (insn) && equiv
5830 && memory_operand (equiv, GET_MODE (equiv))
5832 && ! sets_cc0_p (PATTERN (insn))
5834 && ! (icode != CODE_FOR_nothing
5835 && insn_operand_matches (icode, 0, equiv)
5836 && insn_operand_matches (icode, 1, equiv)))
5838 /* We use the original pseudo for loc, so that
5839 emit_reload_insns() knows which pseudo this
5840 reload refers to and updates the pseudo rtx, not
5841 its equivalent memory location, as well as the
5842 corresponding entry in reg_last_reload_reg. */
5843 loc = &XEXP (x_orig, 0);
5846 = push_reload (x, x, loc, loc,
5848 GET_MODE (x), GET_MODE (x), 0, 0,
5849 opnum, RELOAD_OTHER);
5854 = push_reload (x, x, loc, (rtx*) 0,
5856 GET_MODE (x), GET_MODE (x), 0, 0,
5859 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5864 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5874 /* Look for parts to reload in the inner expression and reload them
5875 too, in addition to this operation. Reloading all inner parts in
5876 addition to this one shouldn't be necessary, but at this point,
5877 we don't know if we can possibly omit any part that *can* be
5878 reloaded. Targets that are better off reloading just either part
5879 (or perhaps even a different part of an outer expression), should
5880 define LEGITIMIZE_RELOAD_ADDRESS. */
5881 find_reloads_address_1 (GET_MODE (XEXP (x, 0)), XEXP (x, 0),
5882 context, code, SCRATCH, &XEXP (x, 0), opnum,
5883 type, ind_levels, insn);
5884 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5886 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5890 /* This is probably the result of a substitution, by eliminate_regs, of
5891 an equivalent address for a pseudo that was not allocated to a hard
5892 register. Verify that the specified address is valid and reload it
5895 Since we know we are going to reload this item, don't decrement for
5896 the indirection level.
5898 Note that this is actually conservative: it would be slightly more
5899 efficient to use the value of SPILL_INDIRECT_LEVELS from
5902 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5903 opnum, ADDR_TYPE (type), ind_levels, insn);
5904 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5906 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5911 int regno = REGNO (x);
5913 if (reg_equiv_constant (regno) != 0)
5915 find_reloads_address_part (reg_equiv_constant (regno), loc,
5917 GET_MODE (x), opnum, type, ind_levels);
5921 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5922 that feeds this insn. */
5923 if (reg_equiv_mem (regno) != 0)
5925 push_reload (reg_equiv_mem (regno), NULL_RTX, loc, (rtx*) 0,
5927 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5932 if (reg_equiv_memory_loc (regno)
5933 && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
5935 rtx tem = make_memloc (x, regno);
5936 if (reg_equiv_address (regno) != 0
5937 || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
5940 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5941 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5943 if (!rtx_equal_p (x, tem))
5944 push_reg_equiv_alt_mem (regno, x);
5948 if (reg_renumber[regno] >= 0)
5949 regno = reg_renumber[regno];
5951 if (regno >= FIRST_PSEUDO_REGISTER
5952 || !REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5955 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5957 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5961 /* If a register appearing in an address is the subject of a CLOBBER
5962 in this insn, reload it into some other register to be safe.
5963 The CLOBBER is supposed to make the register unavailable
5964 from before this insn to after it. */
5965 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5967 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5969 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5976 if (REG_P (SUBREG_REG (x)))
5978 /* If this is a SUBREG of a hard register and the resulting register
5979 is of the wrong class, reload the whole SUBREG. This avoids
5980 needless copies if SUBREG_REG is multi-word. */
5981 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5983 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5985 if (!REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5988 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5990 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5994 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5995 is larger than the class size, then reload the whole SUBREG. */
5998 enum reg_class rclass = context_reg_class;
5999 if (ira_reg_class_max_nregs [rclass][GET_MODE (SUBREG_REG (x))]
6000 > reg_class_size[(int) rclass])
6002 x = find_reloads_subreg_address (x, 0, opnum,
6004 ind_levels, insn, NULL);
6005 push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass,
6006 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
6018 const char *fmt = GET_RTX_FORMAT (code);
6021 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6024 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
6026 find_reloads_address_1 (mode, XEXP (x, i), context, code, SCRATCH,
6027 &XEXP (x, i), opnum, type, ind_levels, insn);
6031 #undef REG_OK_FOR_CONTEXT
6035 /* X, which is found at *LOC, is a part of an address that needs to be
6036 reloaded into a register of class RCLASS. If X is a constant, or if
6037 X is a PLUS that contains a constant, check that the constant is a
6038 legitimate operand and that we are supposed to be able to load
6039 it into the register.
6041 If not, force the constant into memory and reload the MEM instead.
6043 MODE is the mode to use, in case X is an integer constant.
6045 OPNUM and TYPE describe the purpose of any reloads made.
6047 IND_LEVELS says how many levels of indirect addressing this machine
6051 find_reloads_address_part (rtx x, rtx *loc, enum reg_class rclass,
6052 enum machine_mode mode, int opnum,
6053 enum reload_type type, int ind_levels)
6056 && (!targetm.legitimate_constant_p (mode, x)
6057 || targetm.preferred_reload_class (x, rclass) == NO_REGS))
6059 x = force_const_mem (mode, x);
6060 find_reloads_address (mode, &x, XEXP (x, 0), &XEXP (x, 0),
6061 opnum, type, ind_levels, 0);
6064 else if (GET_CODE (x) == PLUS
6065 && CONSTANT_P (XEXP (x, 1))
6066 && (!targetm.legitimate_constant_p (GET_MODE (x), XEXP (x, 1))
6067 || targetm.preferred_reload_class (XEXP (x, 1), rclass)
6072 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
6073 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
6074 find_reloads_address (mode, &XEXP (x, 1), XEXP (tem, 0), &XEXP (tem, 0),
6075 opnum, type, ind_levels, 0);
6078 push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass,
6079 mode, VOIDmode, 0, 0, opnum, type);
6082 /* X, a subreg of a pseudo, is a part of an address that needs to be
6085 If the pseudo is equivalent to a memory location that cannot be directly
6086 addressed, make the necessary address reloads.
6088 If address reloads have been necessary, or if the address is changed
6089 by register elimination, return the rtx of the memory location;
6090 otherwise, return X.
6092 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
6095 OPNUM and TYPE identify the purpose of the reload.
6097 IND_LEVELS says how many levels of indirect addressing are
6098 supported at this point in the address.
6100 INSN, if nonzero, is the insn in which we do the reload. It is used
6101 to determine where to put USEs for pseudos that we have to replace with
6105 find_reloads_subreg_address (rtx x, int force_replace, int opnum,
6106 enum reload_type type, int ind_levels, rtx insn,
6107 int *address_reloaded)
6109 int regno = REGNO (SUBREG_REG (x));
6112 if (reg_equiv_memory_loc (regno))
6114 /* If the address is not directly addressable, or if the address is not
6115 offsettable, then it must be replaced. */
6117 && (reg_equiv_address (regno)
6118 || ! offsettable_memref_p (reg_equiv_mem (regno))))
6121 if (force_replace || num_not_at_initial_offset)
6123 rtx tem = make_memloc (SUBREG_REG (x), regno);
6125 /* If the address changes because of register elimination, then
6126 it must be replaced. */
6128 || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
6130 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
6131 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
6135 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
6136 hold the correct (negative) byte offset. */
6137 if (BYTES_BIG_ENDIAN && outer_size > inner_size)
6138 offset = inner_size - outer_size;
6140 offset = SUBREG_BYTE (x);
6142 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
6143 PUT_MODE (tem, GET_MODE (x));
6144 if (MEM_OFFSET_KNOWN_P (tem))
6145 set_mem_offset (tem, MEM_OFFSET (tem) + offset);
6146 if (MEM_SIZE_KNOWN_P (tem)
6147 && MEM_SIZE (tem) != (HOST_WIDE_INT) outer_size)
6148 set_mem_size (tem, outer_size);
6150 /* If this was a paradoxical subreg that we replaced, the
6151 resulting memory must be sufficiently aligned to allow
6152 us to widen the mode of the memory. */
6153 if (outer_size > inner_size)
6157 base = XEXP (tem, 0);
6158 if (GET_CODE (base) == PLUS)
6160 if (CONST_INT_P (XEXP (base, 1))
6161 && INTVAL (XEXP (base, 1)) % outer_size != 0)
6163 base = XEXP (base, 0);
6166 || (REGNO_POINTER_ALIGN (REGNO (base))
6167 < outer_size * BITS_PER_UNIT))
6171 reloaded = find_reloads_address (GET_MODE (tem), &tem,
6172 XEXP (tem, 0), &XEXP (tem, 0),
6173 opnum, type, ind_levels, insn);
6174 /* ??? Do we need to handle nonzero offsets somehow? */
6175 if (!offset && !rtx_equal_p (tem, orig))
6176 push_reg_equiv_alt_mem (regno, tem);
6178 /* For some processors an address may be valid in the
6179 original mode but not in a smaller mode. For
6180 example, ARM accepts a scaled index register in
6181 SImode but not in HImode. Note that this is only
6182 a problem if the address in reg_equiv_mem is already
6183 invalid in the new mode; other cases would be fixed
6184 by find_reloads_address as usual.
6186 ??? We attempt to handle such cases here by doing an
6187 additional reload of the full address after the
6188 usual processing by find_reloads_address. Note that
6189 this may not work in the general case, but it seems
6190 to cover the cases where this situation currently
6191 occurs. A more general fix might be to reload the
6192 *value* instead of the address, but this would not
6193 be expected by the callers of this routine as-is.
6195 If find_reloads_address already completed replaced
6196 the address, there is nothing further to do. */
6198 && reg_equiv_mem (regno) != 0
6199 && !strict_memory_address_addr_space_p
6200 (GET_MODE (x), XEXP (reg_equiv_mem (regno), 0),
6201 MEM_ADDR_SPACE (reg_equiv_mem (regno))))
6203 push_reload (XEXP (tem, 0), NULL_RTX, &XEXP (tem, 0), (rtx*) 0,
6204 base_reg_class (GET_MODE (tem), MEM, SCRATCH),
6205 GET_MODE (XEXP (tem, 0)), VOIDmode, 0, 0,
6209 /* If this is not a toplevel operand, find_reloads doesn't see
6210 this substitution. We have to emit a USE of the pseudo so
6211 that delete_output_reload can see it. */
6212 if (replace_reloads && recog_data.operand[opnum] != x)
6213 /* We mark the USE with QImode so that we recognize it
6214 as one that can be safely deleted at the end of
6216 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
6223 if (reloaded && address_reloaded)
6224 *address_reloaded = 1;
6229 /* Substitute into the current INSN the registers into which we have reloaded
6230 the things that need reloading. The array `replacements'
6231 contains the locations of all pointers that must be changed
6232 and says what to replace them with.
6234 Return the rtx that X translates into; usually X, but modified. */
6237 subst_reloads (rtx insn)
6241 for (i = 0; i < n_replacements; i++)
6243 struct replacement *r = &replacements[i];
6244 rtx reloadreg = rld[r->what].reg_rtx;
6248 /* This checking takes a very long time on some platforms
6249 causing the gcc.c-torture/compile/limits-fnargs.c test
6250 to time out during testing. See PR 31850.
6252 Internal consistency test. Check that we don't modify
6253 anything in the equivalence arrays. Whenever something from
6254 those arrays needs to be reloaded, it must be unshared before
6255 being substituted into; the equivalence must not be modified.
6256 Otherwise, if the equivalence is used after that, it will
6257 have been modified, and the thing substituted (probably a
6258 register) is likely overwritten and not a usable equivalence. */
6261 for (check_regno = 0; check_regno < max_regno; check_regno++)
6263 #define CHECK_MODF(ARRAY) \
6264 gcc_assert (!VEC_index (reg_equivs_t, reg_equivs, check_regno).ARRAY \
6265 || !loc_mentioned_in_p (r->where, \
6266 VEC_index (reg_equivs_t, reg_equivs, check_regno).ARRAY))
6268 CHECK_MODF (equiv_constant);
6269 CHECK_MODF (equiv_memory_loc);
6270 CHECK_MODF (equiv_address);
6271 CHECK_MODF (equiv_mem);
6274 #endif /* DEBUG_RELOAD */
6276 /* If we're replacing a LABEL_REF with a register, there must
6277 already be an indication (to e.g. flow) which label this
6278 register refers to. */
6279 gcc_assert (GET_CODE (*r->where) != LABEL_REF
6281 || find_reg_note (insn,
6283 XEXP (*r->where, 0))
6284 || label_is_jump_target_p (XEXP (*r->where, 0), insn));
6286 /* Encapsulate RELOADREG so its machine mode matches what
6287 used to be there. Note that gen_lowpart_common will
6288 do the wrong thing if RELOADREG is multi-word. RELOADREG
6289 will always be a REG here. */
6290 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
6291 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6293 *r->where = reloadreg;
6295 /* If reload got no reg and isn't optional, something's wrong. */
6297 gcc_assert (rld[r->what].optional);
6301 /* Make a copy of any replacements being done into X and move those
6302 copies to locations in Y, a copy of X. */
6305 copy_replacements (rtx x, rtx y)
6307 copy_replacements_1 (&x, &y, n_replacements);
6311 copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6315 struct replacement *r;
6319 for (j = 0; j < orig_replacements; j++)
6320 if (replacements[j].where == px)
6322 r = &replacements[n_replacements++];
6324 r->what = replacements[j].what;
6325 r->mode = replacements[j].mode;
6330 code = GET_CODE (x);
6331 fmt = GET_RTX_FORMAT (code);
6333 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6336 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6337 else if (fmt[i] == 'E')
6338 for (j = XVECLEN (x, i); --j >= 0; )
6339 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6344 /* Change any replacements being done to *X to be done to *Y. */
6347 move_replacements (rtx *x, rtx *y)
6351 for (i = 0; i < n_replacements; i++)
6352 if (replacements[i].where == x)
6353 replacements[i].where = y;
6356 /* If LOC was scheduled to be replaced by something, return the replacement.
6357 Otherwise, return *LOC. */
6360 find_replacement (rtx *loc)
6362 struct replacement *r;
6364 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6366 rtx reloadreg = rld[r->what].reg_rtx;
6368 if (reloadreg && r->where == loc)
6370 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6371 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6375 else if (reloadreg && GET_CODE (*loc) == SUBREG
6376 && r->where == &SUBREG_REG (*loc))
6378 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6379 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6381 return simplify_gen_subreg (GET_MODE (*loc), reloadreg,
6382 GET_MODE (SUBREG_REG (*loc)),
6383 SUBREG_BYTE (*loc));
6387 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6388 what's inside and make a new rtl if so. */
6389 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6390 || GET_CODE (*loc) == MULT)
6392 rtx x = find_replacement (&XEXP (*loc, 0));
6393 rtx y = find_replacement (&XEXP (*loc, 1));
6395 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6396 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6402 /* Return nonzero if register in range [REGNO, ENDREGNO)
6403 appears either explicitly or implicitly in X
6404 other than being stored into (except for earlyclobber operands).
6406 References contained within the substructure at LOC do not count.
6407 LOC may be zero, meaning don't ignore anything.
6409 This is similar to refers_to_regno_p in rtlanal.c except that we
6410 look at equivalences for pseudos that didn't get hard registers. */
6413 refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6425 code = GET_CODE (x);
6432 /* If this is a pseudo, a hard register must not have been allocated.
6433 X must therefore either be a constant or be in memory. */
6434 if (r >= FIRST_PSEUDO_REGISTER)
6436 if (reg_equiv_memory_loc (r))
6437 return refers_to_regno_for_reload_p (regno, endregno,
6438 reg_equiv_memory_loc (r),
6441 gcc_assert (reg_equiv_constant (r) || reg_equiv_invariant (r));
6445 return (endregno > r
6446 && regno < r + (r < FIRST_PSEUDO_REGISTER
6447 ? hard_regno_nregs[r][GET_MODE (x)]
6451 /* If this is a SUBREG of a hard reg, we can see exactly which
6452 registers are being modified. Otherwise, handle normally. */
6453 if (REG_P (SUBREG_REG (x))
6454 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6456 unsigned int inner_regno = subreg_regno (x);
6457 unsigned int inner_endregno
6458 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6459 ? subreg_nregs (x) : 1);
6461 return endregno > inner_regno && regno < inner_endregno;
6467 if (&SET_DEST (x) != loc
6468 /* Note setting a SUBREG counts as referring to the REG it is in for
6469 a pseudo but not for hard registers since we can
6470 treat each word individually. */
6471 && ((GET_CODE (SET_DEST (x)) == SUBREG
6472 && loc != &SUBREG_REG (SET_DEST (x))
6473 && REG_P (SUBREG_REG (SET_DEST (x)))
6474 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6475 && refers_to_regno_for_reload_p (regno, endregno,
6476 SUBREG_REG (SET_DEST (x)),
6478 /* If the output is an earlyclobber operand, this is
6480 || ((!REG_P (SET_DEST (x))
6481 || earlyclobber_operand_p (SET_DEST (x)))
6482 && refers_to_regno_for_reload_p (regno, endregno,
6483 SET_DEST (x), loc))))
6486 if (code == CLOBBER || loc == &SET_SRC (x))
6495 /* X does not match, so try its subexpressions. */
6497 fmt = GET_RTX_FORMAT (code);
6498 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6500 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6508 if (refers_to_regno_for_reload_p (regno, endregno,
6512 else if (fmt[i] == 'E')
6515 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6516 if (loc != &XVECEXP (x, i, j)
6517 && refers_to_regno_for_reload_p (regno, endregno,
6518 XVECEXP (x, i, j), loc))
6525 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6526 we check if any register number in X conflicts with the relevant register
6527 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6528 contains a MEM (we don't bother checking for memory addresses that can't
6529 conflict because we expect this to be a rare case.
6531 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6532 that we look at equivalences for pseudos that didn't get hard registers. */
6535 reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6537 int regno, endregno;
6539 /* Overly conservative. */
6540 if (GET_CODE (x) == STRICT_LOW_PART
6541 || GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
6544 /* If either argument is a constant, then modifying X can not affect IN. */
6545 if (CONSTANT_P (x) || CONSTANT_P (in))
6547 else if (GET_CODE (x) == SUBREG && MEM_P (SUBREG_REG (x)))
6548 return refers_to_mem_for_reload_p (in);
6549 else if (GET_CODE (x) == SUBREG)
6551 regno = REGNO (SUBREG_REG (x));
6552 if (regno < FIRST_PSEUDO_REGISTER)
6553 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6554 GET_MODE (SUBREG_REG (x)),
6557 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6558 ? subreg_nregs (x) : 1);
6560 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6566 /* If this is a pseudo, it must not have been assigned a hard register.
6567 Therefore, it must either be in memory or be a constant. */
6569 if (regno >= FIRST_PSEUDO_REGISTER)
6571 if (reg_equiv_memory_loc (regno))
6572 return refers_to_mem_for_reload_p (in);
6573 gcc_assert (reg_equiv_constant (regno));
6577 endregno = END_HARD_REGNO (x);
6579 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6582 return refers_to_mem_for_reload_p (in);
6583 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6584 || GET_CODE (x) == CC0)
6585 return reg_mentioned_p (x, in);
6588 gcc_assert (GET_CODE (x) == PLUS);
6590 /* We actually want to know if X is mentioned somewhere inside IN.
6591 We must not say that (plus (sp) (const_int 124)) is in
6592 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6593 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6594 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6599 else if (GET_CODE (in) == PLUS)
6600 return (rtx_equal_p (x, in)
6601 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6602 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6603 else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6604 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6610 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6614 refers_to_mem_for_reload_p (rtx x)
6623 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6624 && reg_equiv_memory_loc (REGNO (x)));
6626 fmt = GET_RTX_FORMAT (GET_CODE (x));
6627 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6629 && (MEM_P (XEXP (x, i))
6630 || refers_to_mem_for_reload_p (XEXP (x, i))))
6636 /* Check the insns before INSN to see if there is a suitable register
6637 containing the same value as GOAL.
6638 If OTHER is -1, look for a register in class RCLASS.
6639 Otherwise, just see if register number OTHER shares GOAL's value.
6641 Return an rtx for the register found, or zero if none is found.
6643 If RELOAD_REG_P is (short *)1,
6644 we reject any hard reg that appears in reload_reg_rtx
6645 because such a hard reg is also needed coming into this insn.
6647 If RELOAD_REG_P is any other nonzero value,
6648 it is a vector indexed by hard reg number
6649 and we reject any hard reg whose element in the vector is nonnegative
6650 as well as any that appears in reload_reg_rtx.
6652 If GOAL is zero, then GOALREG is a register number; we look
6653 for an equivalent for that register.
6655 MODE is the machine mode of the value we want an equivalence for.
6656 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6658 This function is used by jump.c as well as in the reload pass.
6660 If GOAL is the sum of the stack pointer and a constant, we treat it
6661 as if it were a constant except that sp is required to be unchanging. */
6664 find_equiv_reg (rtx goal, rtx insn, enum reg_class rclass, int other,
6665 short *reload_reg_p, int goalreg, enum machine_mode mode)
6668 rtx goaltry, valtry, value, where;
6674 int goal_mem_addr_varies = 0;
6675 int need_stable_sp = 0;
6682 else if (REG_P (goal))
6683 regno = REGNO (goal);
6684 else if (MEM_P (goal))
6686 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6687 if (MEM_VOLATILE_P (goal))
6689 if (flag_float_store && SCALAR_FLOAT_MODE_P (GET_MODE (goal)))
6691 /* An address with side effects must be reexecuted. */
6706 else if (CONSTANT_P (goal))
6708 else if (GET_CODE (goal) == PLUS
6709 && XEXP (goal, 0) == stack_pointer_rtx
6710 && CONSTANT_P (XEXP (goal, 1)))
6711 goal_const = need_stable_sp = 1;
6712 else if (GET_CODE (goal) == PLUS
6713 && XEXP (goal, 0) == frame_pointer_rtx
6714 && CONSTANT_P (XEXP (goal, 1)))
6720 /* Scan insns back from INSN, looking for one that copies
6721 a value into or out of GOAL.
6722 Stop and give up if we reach a label. */
6727 if (p && DEBUG_INSN_P (p))
6730 if (p == 0 || LABEL_P (p)
6731 || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6734 /* Don't reuse register contents from before a setjmp-type
6735 function call; on the second return (from the longjmp) it
6736 might have been clobbered by a later reuse. It doesn't
6737 seem worthwhile to actually go and see if it is actually
6738 reused even if that information would be readily available;
6739 just don't reuse it across the setjmp call. */
6740 if (CALL_P (p) && find_reg_note (p, REG_SETJMP, NULL_RTX))
6743 if (NONJUMP_INSN_P (p)
6744 /* If we don't want spill regs ... */
6745 && (! (reload_reg_p != 0
6746 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6747 /* ... then ignore insns introduced by reload; they aren't
6748 useful and can cause results in reload_as_needed to be
6749 different from what they were when calculating the need for
6750 spills. If we notice an input-reload insn here, we will
6751 reject it below, but it might hide a usable equivalent.
6752 That makes bad code. It may even fail: perhaps no reg was
6753 spilled for this insn because it was assumed we would find
6755 || INSN_UID (p) < reload_first_uid))
6758 pat = single_set (p);
6760 /* First check for something that sets some reg equal to GOAL. */
6763 && true_regnum (SET_SRC (pat)) == regno
6764 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6767 && true_regnum (SET_DEST (pat)) == regno
6768 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6770 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6771 /* When looking for stack pointer + const,
6772 make sure we don't use a stack adjust. */
6773 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6774 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6776 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6777 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6779 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6780 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6781 /* If we are looking for a constant,
6782 and something equivalent to that constant was copied
6783 into a reg, we can use that reg. */
6784 || (goal_const && REG_NOTES (p) != 0
6785 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6786 && ((rtx_equal_p (XEXP (tem, 0), goal)
6788 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6789 || (REG_P (SET_DEST (pat))
6790 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6791 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6792 && CONST_INT_P (goal)
6794 = operand_subword (XEXP (tem, 0), 0, 0,
6796 && rtx_equal_p (goal, goaltry)
6798 = operand_subword (SET_DEST (pat), 0, 0,
6800 && (valueno = true_regnum (valtry)) >= 0)))
6801 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6803 && REG_P (SET_DEST (pat))
6804 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6805 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6806 && CONST_INT_P (goal)
6807 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6809 && rtx_equal_p (goal, goaltry)
6811 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6812 && (valueno = true_regnum (valtry)) >= 0)))
6816 if (valueno != other)
6819 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6821 else if (!in_hard_reg_set_p (reg_class_contents[(int) rclass],
6831 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6832 (or copying VALUE into GOAL, if GOAL is also a register).
6833 Now verify that VALUE is really valid. */
6835 /* VALUENO is the register number of VALUE; a hard register. */
6837 /* Don't try to re-use something that is killed in this insn. We want
6838 to be able to trust REG_UNUSED notes. */
6839 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6842 /* If we propose to get the value from the stack pointer or if GOAL is
6843 a MEM based on the stack pointer, we need a stable SP. */
6844 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6845 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6849 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6850 if (GET_MODE (value) != mode)
6853 /* Reject VALUE if it was loaded from GOAL
6854 and is also a register that appears in the address of GOAL. */
6856 if (goal_mem && value == SET_DEST (single_set (where))
6857 && refers_to_regno_for_reload_p (valueno, end_hard_regno (mode, valueno),
6861 /* Reject registers that overlap GOAL. */
6863 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6864 nregs = hard_regno_nregs[regno][mode];
6867 valuenregs = hard_regno_nregs[valueno][mode];
6869 if (!goal_mem && !goal_const
6870 && regno + nregs > valueno && regno < valueno + valuenregs)
6873 /* Reject VALUE if it is one of the regs reserved for reloads.
6874 Reload1 knows how to reuse them anyway, and it would get
6875 confused if we allocated one without its knowledge.
6876 (Now that insns introduced by reload are ignored above,
6877 this case shouldn't happen, but I'm not positive.) */
6879 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6882 for (i = 0; i < valuenregs; ++i)
6883 if (reload_reg_p[valueno + i] >= 0)
6887 /* Reject VALUE if it is a register being used for an input reload
6888 even if it is not one of those reserved. */
6890 if (reload_reg_p != 0)
6893 for (i = 0; i < n_reloads; i++)
6894 if (rld[i].reg_rtx != 0 && rld[i].in)
6896 int regno1 = REGNO (rld[i].reg_rtx);
6897 int nregs1 = hard_regno_nregs[regno1]
6898 [GET_MODE (rld[i].reg_rtx)];
6899 if (regno1 < valueno + valuenregs
6900 && regno1 + nregs1 > valueno)
6906 /* We must treat frame pointer as varying here,
6907 since it can vary--in a nonlocal goto as generated by expand_goto. */
6908 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6910 /* Now verify that the values of GOAL and VALUE remain unaltered
6911 until INSN is reached. */
6920 /* Don't trust the conversion past a function call
6921 if either of the two is in a call-clobbered register, or memory. */
6926 if (goal_mem || need_stable_sp)
6929 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6930 for (i = 0; i < nregs; ++i)
6931 if (call_used_regs[regno + i]
6932 || HARD_REGNO_CALL_PART_CLOBBERED (regno + i, mode))
6935 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6936 for (i = 0; i < valuenregs; ++i)
6937 if (call_used_regs[valueno + i]
6938 || HARD_REGNO_CALL_PART_CLOBBERED (valueno + i, mode))
6946 /* Watch out for unspec_volatile, and volatile asms. */
6947 if (volatile_insn_p (pat))
6950 /* If this insn P stores in either GOAL or VALUE, return 0.
6951 If GOAL is a memory ref and this insn writes memory, return 0.
6952 If GOAL is a memory ref and its address is not constant,
6953 and this insn P changes a register used in GOAL, return 0. */
6955 if (GET_CODE (pat) == COND_EXEC)
6956 pat = COND_EXEC_CODE (pat);
6957 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6959 rtx dest = SET_DEST (pat);
6960 while (GET_CODE (dest) == SUBREG
6961 || GET_CODE (dest) == ZERO_EXTRACT
6962 || GET_CODE (dest) == STRICT_LOW_PART)
6963 dest = XEXP (dest, 0);
6966 int xregno = REGNO (dest);
6968 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6969 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6972 if (xregno < regno + nregs && xregno + xnregs > regno)
6974 if (xregno < valueno + valuenregs
6975 && xregno + xnregs > valueno)
6977 if (goal_mem_addr_varies
6978 && reg_overlap_mentioned_for_reload_p (dest, goal))
6980 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6983 else if (goal_mem && MEM_P (dest)
6984 && ! push_operand (dest, GET_MODE (dest)))
6986 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6987 && reg_equiv_memory_loc (regno) != 0)
6989 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6992 else if (GET_CODE (pat) == PARALLEL)
6995 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6997 rtx v1 = XVECEXP (pat, 0, i);
6998 if (GET_CODE (v1) == COND_EXEC)
6999 v1 = COND_EXEC_CODE (v1);
7000 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
7002 rtx dest = SET_DEST (v1);
7003 while (GET_CODE (dest) == SUBREG
7004 || GET_CODE (dest) == ZERO_EXTRACT
7005 || GET_CODE (dest) == STRICT_LOW_PART)
7006 dest = XEXP (dest, 0);
7009 int xregno = REGNO (dest);
7011 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
7012 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
7015 if (xregno < regno + nregs
7016 && xregno + xnregs > regno)
7018 if (xregno < valueno + valuenregs
7019 && xregno + xnregs > valueno)
7021 if (goal_mem_addr_varies
7022 && reg_overlap_mentioned_for_reload_p (dest,
7025 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
7028 else if (goal_mem && MEM_P (dest)
7029 && ! push_operand (dest, GET_MODE (dest)))
7031 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
7032 && reg_equiv_memory_loc (regno) != 0)
7034 else if (need_stable_sp
7035 && push_operand (dest, GET_MODE (dest)))
7041 if (CALL_P (p) && CALL_INSN_FUNCTION_USAGE (p))
7045 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
7046 link = XEXP (link, 1))
7048 pat = XEXP (link, 0);
7049 if (GET_CODE (pat) == CLOBBER)
7051 rtx dest = SET_DEST (pat);
7055 int xregno = REGNO (dest);
7057 = hard_regno_nregs[xregno][GET_MODE (dest)];
7059 if (xregno < regno + nregs
7060 && xregno + xnregs > regno)
7062 else if (xregno < valueno + valuenregs
7063 && xregno + xnregs > valueno)
7065 else if (goal_mem_addr_varies
7066 && reg_overlap_mentioned_for_reload_p (dest,
7071 else if (goal_mem && MEM_P (dest)
7072 && ! push_operand (dest, GET_MODE (dest)))
7074 else if (need_stable_sp
7075 && push_operand (dest, GET_MODE (dest)))
7082 /* If this insn auto-increments or auto-decrements
7083 either regno or valueno, return 0 now.
7084 If GOAL is a memory ref and its address is not constant,
7085 and this insn P increments a register used in GOAL, return 0. */
7089 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
7090 if (REG_NOTE_KIND (link) == REG_INC
7091 && REG_P (XEXP (link, 0)))
7093 int incno = REGNO (XEXP (link, 0));
7094 if (incno < regno + nregs && incno >= regno)
7096 if (incno < valueno + valuenregs && incno >= valueno)
7098 if (goal_mem_addr_varies
7099 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
7109 /* Find a place where INCED appears in an increment or decrement operator
7110 within X, and return the amount INCED is incremented or decremented by.
7111 The value is always positive. */
7114 find_inc_amount (rtx x, rtx inced)
7116 enum rtx_code code = GET_CODE (x);
7122 rtx addr = XEXP (x, 0);
7123 if ((GET_CODE (addr) == PRE_DEC
7124 || GET_CODE (addr) == POST_DEC
7125 || GET_CODE (addr) == PRE_INC
7126 || GET_CODE (addr) == POST_INC)
7127 && XEXP (addr, 0) == inced)
7128 return GET_MODE_SIZE (GET_MODE (x));
7129 else if ((GET_CODE (addr) == PRE_MODIFY
7130 || GET_CODE (addr) == POST_MODIFY)
7131 && GET_CODE (XEXP (addr, 1)) == PLUS
7132 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
7133 && XEXP (addr, 0) == inced
7134 && CONST_INT_P (XEXP (XEXP (addr, 1), 1)))
7136 i = INTVAL (XEXP (XEXP (addr, 1), 1));
7137 return i < 0 ? -i : i;
7141 fmt = GET_RTX_FORMAT (code);
7142 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7146 int tem = find_inc_amount (XEXP (x, i), inced);
7153 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7155 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
7165 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7166 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7170 reg_inc_found_and_valid_p (unsigned int regno, unsigned int endregno,
7177 if (! INSN_P (insn))
7180 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
7181 if (REG_NOTE_KIND (link) == REG_INC)
7183 unsigned int test = (int) REGNO (XEXP (link, 0));
7184 if (test >= regno && test < endregno)
7191 #define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7195 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7196 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7197 REG_INC. REGNO must refer to a hard register. */
7200 regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
7203 unsigned int nregs, endregno;
7205 /* regno must be a hard register. */
7206 gcc_assert (regno < FIRST_PSEUDO_REGISTER);
7208 nregs = hard_regno_nregs[regno][mode];
7209 endregno = regno + nregs;
7211 if ((GET_CODE (PATTERN (insn)) == CLOBBER
7212 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7213 && REG_P (XEXP (PATTERN (insn), 0)))
7215 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
7217 return test >= regno && test < endregno;
7220 if (sets == 2 && reg_inc_found_and_valid_p (regno, endregno, insn))
7223 if (GET_CODE (PATTERN (insn)) == PARALLEL)
7225 int i = XVECLEN (PATTERN (insn), 0) - 1;
7229 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7230 if ((GET_CODE (elt) == CLOBBER
7231 || (sets == 1 && GET_CODE (elt) == SET))
7232 && REG_P (XEXP (elt, 0)))
7234 unsigned int test = REGNO (XEXP (elt, 0));
7236 if (test >= regno && test < endregno)
7240 && reg_inc_found_and_valid_p (regno, endregno, elt))
7248 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7250 reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
7254 if (GET_MODE (reloadreg) == mode)
7257 regno = REGNO (reloadreg);
7259 if (REG_WORDS_BIG_ENDIAN)
7260 regno += (int) hard_regno_nregs[regno][GET_MODE (reloadreg)]
7261 - (int) hard_regno_nregs[regno][mode];
7263 return gen_rtx_REG (mode, regno);
7266 static const char *const reload_when_needed_name[] =
7269 "RELOAD_FOR_OUTPUT",
7271 "RELOAD_FOR_INPUT_ADDRESS",
7272 "RELOAD_FOR_INPADDR_ADDRESS",
7273 "RELOAD_FOR_OUTPUT_ADDRESS",
7274 "RELOAD_FOR_OUTADDR_ADDRESS",
7275 "RELOAD_FOR_OPERAND_ADDRESS",
7276 "RELOAD_FOR_OPADDR_ADDR",
7278 "RELOAD_FOR_OTHER_ADDRESS"
7281 /* These functions are used to print the variables set by 'find_reloads' */
7284 debug_reload_to_stream (FILE *f)
7291 for (r = 0; r < n_reloads; r++)
7293 fprintf (f, "Reload %d: ", r);
7297 fprintf (f, "reload_in (%s) = ",
7298 GET_MODE_NAME (rld[r].inmode));
7299 print_inline_rtx (f, rld[r].in, 24);
7300 fprintf (f, "\n\t");
7303 if (rld[r].out != 0)
7305 fprintf (f, "reload_out (%s) = ",
7306 GET_MODE_NAME (rld[r].outmode));
7307 print_inline_rtx (f, rld[r].out, 24);
7308 fprintf (f, "\n\t");
7311 fprintf (f, "%s, ", reg_class_names[(int) rld[r].rclass]);
7313 fprintf (f, "%s (opnum = %d)",
7314 reload_when_needed_name[(int) rld[r].when_needed],
7317 if (rld[r].optional)
7318 fprintf (f, ", optional");
7320 if (rld[r].nongroup)
7321 fprintf (f, ", nongroup");
7323 if (rld[r].inc != 0)
7324 fprintf (f, ", inc by %d", rld[r].inc);
7326 if (rld[r].nocombine)
7327 fprintf (f, ", can't combine");
7329 if (rld[r].secondary_p)
7330 fprintf (f, ", secondary_reload_p");
7332 if (rld[r].in_reg != 0)
7334 fprintf (f, "\n\treload_in_reg: ");
7335 print_inline_rtx (f, rld[r].in_reg, 24);
7338 if (rld[r].out_reg != 0)
7340 fprintf (f, "\n\treload_out_reg: ");
7341 print_inline_rtx (f, rld[r].out_reg, 24);
7344 if (rld[r].reg_rtx != 0)
7346 fprintf (f, "\n\treload_reg_rtx: ");
7347 print_inline_rtx (f, rld[r].reg_rtx, 24);
7351 if (rld[r].secondary_in_reload != -1)
7353 fprintf (f, "%ssecondary_in_reload = %d",
7354 prefix, rld[r].secondary_in_reload);
7358 if (rld[r].secondary_out_reload != -1)
7359 fprintf (f, "%ssecondary_out_reload = %d\n",
7360 prefix, rld[r].secondary_out_reload);
7363 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7365 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7366 insn_data[rld[r].secondary_in_icode].name);
7370 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7371 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7372 insn_data[rld[r].secondary_out_icode].name);
7381 debug_reload_to_stream (stderr);