1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation,
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
23 /* This file contains subroutines used only from the file reload1.c.
24 It knows how to scan one insn for operands and values
25 that need to be copied into registers to make valid code.
26 It also finds other operands and values which are valid
27 but for which equivalent values in registers exist and
28 ought to be used instead.
30 Before processing the first insn of the function, call `init_reload'.
31 init_reload actually has to be called earlier anyway.
33 To scan an insn, call `find_reloads'. This does two things:
34 1. sets up tables describing which values must be reloaded
35 for this insn, and what kind of hard regs they must be reloaded into;
36 2. optionally record the locations where those values appear in
37 the data, so they can be replaced properly later.
38 This is done only if the second arg to `find_reloads' is nonzero.
40 The third arg to `find_reloads' specifies the number of levels
41 of indirect addressing supported by the machine. If it is zero,
42 indirect addressing is not valid. If it is one, (MEM (REG n))
43 is valid even if (REG n) did not get a hard register; if it is two,
44 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
45 hard register, and similarly for higher values.
47 Then you must choose the hard regs to reload those pseudo regs into,
48 and generate appropriate load insns before this insn and perhaps
49 also store insns after this insn. Set up the array `reload_reg_rtx'
50 to contain the REG rtx's for the registers you used. In some
51 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
52 for certain reloads. Then that tells you which register to use,
53 so you do not need to allocate one. But you still do need to add extra
54 instructions to copy the value into and out of that register.
56 Finally you must call `subst_reloads' to substitute the reload reg rtx's
57 into the locations already recorded.
61 find_reloads can alter the operands of the instruction it is called on.
63 1. Two operands of any sort may be interchanged, if they are in a
64 commutative instruction.
65 This happens only if find_reloads thinks the instruction will compile
68 2. Pseudo-registers that are equivalent to constants are replaced
69 with those constants if they are not in hard registers.
71 1 happens every time find_reloads is called.
72 2 happens only when REPLACE is 1, which is only when
73 actually doing the reloads, not when just counting them.
75 Using a reload register for several reloads in one insn:
77 When an insn has reloads, it is considered as having three parts:
78 the input reloads, the insn itself after reloading, and the output reloads.
79 Reloads of values used in memory addresses are often needed for only one part.
81 When this is so, reload_when_needed records which part needs the reload.
82 Two reloads for different parts of the insn can share the same reload
85 When a reload is used for addresses in multiple parts, or when it is
86 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
87 a register with any other reload. */
93 #include "coretypes.h"
97 #include "insn-config.h"
103 #include "addresses.h"
104 #include "hard-reg-set.h"
108 #include "function.h"
113 /* True if X is a constant that can be forced into the constant pool. */
114 #define CONST_POOL_OK_P(X) \
116 && GET_CODE (X) != HIGH \
117 && !targetm.cannot_force_const_mem (X))
119 /* True if C is a non-empty register class that has too few registers
120 to be safely used as a reload target class. */
121 #define SMALL_REGISTER_CLASS_P(C) \
122 (reg_class_size [(C)] == 1 \
123 || (reg_class_size [(C)] >= 1 && CLASS_LIKELY_SPILLED_P (C)))
126 /* All reloads of the current insn are recorded here. See reload.h for
129 struct reload rld[MAX_RELOADS];
131 /* All the "earlyclobber" operands of the current insn
132 are recorded here. */
134 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
136 int reload_n_operands;
138 /* Replacing reloads.
140 If `replace_reloads' is nonzero, then as each reload is recorded
141 an entry is made for it in the table `replacements'.
142 Then later `subst_reloads' can look through that table and
143 perform all the replacements needed. */
145 /* Nonzero means record the places to replace. */
146 static int replace_reloads;
148 /* Each replacement is recorded with a structure like this. */
151 rtx *where; /* Location to store in */
152 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
153 a SUBREG; 0 otherwise. */
154 int what; /* which reload this is for */
155 enum machine_mode mode; /* mode it must have */
158 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
160 /* Number of replacements currently recorded. */
161 static int n_replacements;
163 /* Used to track what is modified by an operand. */
166 int reg_flag; /* Nonzero if referencing a register. */
167 int safe; /* Nonzero if this can't conflict with anything. */
168 rtx base; /* Base address for MEM. */
169 HOST_WIDE_INT start; /* Starting offset or register number. */
170 HOST_WIDE_INT end; /* Ending offset or register number. */
173 #ifdef SECONDARY_MEMORY_NEEDED
175 /* Save MEMs needed to copy from one class of registers to another. One MEM
176 is used per mode, but normally only one or two modes are ever used.
178 We keep two versions, before and after register elimination. The one
179 after register elimination is record separately for each operand. This
180 is done in case the address is not valid to be sure that we separately
183 static rtx secondary_memlocs[NUM_MACHINE_MODES];
184 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
185 static int secondary_memlocs_elim_used = 0;
188 /* The instruction we are doing reloads for;
189 so we can test whether a register dies in it. */
190 static rtx this_insn;
192 /* Nonzero if this instruction is a user-specified asm with operands. */
193 static int this_insn_is_asm;
195 /* If hard_regs_live_known is nonzero,
196 we can tell which hard regs are currently live,
197 at least enough to succeed in choosing dummy reloads. */
198 static int hard_regs_live_known;
200 /* Indexed by hard reg number,
201 element is nonnegative if hard reg has been spilled.
202 This vector is passed to `find_reloads' as an argument
203 and is not changed here. */
204 static short *static_reload_reg_p;
206 /* Set to 1 in subst_reg_equivs if it changes anything. */
207 static int subst_reg_equivs_changed;
209 /* On return from push_reload, holds the reload-number for the OUT
210 operand, which can be different for that from the input operand. */
211 static int output_reloadnum;
213 /* Compare two RTX's. */
214 #define MATCHES(x, y) \
215 (x == y || (x != 0 && (REG_P (x) \
216 ? REG_P (y) && REGNO (x) == REGNO (y) \
217 : rtx_equal_p (x, y) && ! side_effects_p (x))))
219 /* Indicates if two reloads purposes are for similar enough things that we
220 can merge their reloads. */
221 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
222 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
223 || ((when1) == (when2) && (op1) == (op2)) \
224 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
225 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
226 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
227 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
228 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
230 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
231 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
232 ((when1) != (when2) \
233 || ! ((op1) == (op2) \
234 || (when1) == RELOAD_FOR_INPUT \
235 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
236 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
238 /* If we are going to reload an address, compute the reload type to
240 #define ADDR_TYPE(type) \
241 ((type) == RELOAD_FOR_INPUT_ADDRESS \
242 ? RELOAD_FOR_INPADDR_ADDRESS \
243 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
244 ? RELOAD_FOR_OUTADDR_ADDRESS \
247 static int push_secondary_reload (int, rtx, int, int, enum reg_class,
248 enum machine_mode, enum reload_type,
249 enum insn_code *, secondary_reload_info *);
250 static enum reg_class find_valid_class (enum machine_mode, enum machine_mode,
252 static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
253 static void push_replacement (rtx *, int, enum machine_mode);
254 static void dup_replacements (rtx *, rtx *);
255 static void combine_reloads (void);
256 static int find_reusable_reload (rtx *, rtx, enum reg_class,
257 enum reload_type, int, int);
258 static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
259 enum machine_mode, enum reg_class, int, int);
260 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
261 static struct decomposition decompose (rtx);
262 static int immune_p (rtx, rtx, struct decomposition);
263 static int alternative_allows_memconst (const char *, int);
264 static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
266 static rtx make_memloc (rtx, int);
267 static int maybe_memory_address_p (enum machine_mode, rtx, rtx *);
268 static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
269 int, enum reload_type, int, rtx);
270 static rtx subst_reg_equivs (rtx, rtx);
271 static rtx subst_indexed_address (rtx);
272 static void update_auto_inc_notes (rtx, int, int);
273 static int find_reloads_address_1 (enum machine_mode, rtx, int,
274 enum rtx_code, enum rtx_code, rtx *,
275 int, enum reload_type,int, rtx);
276 static void find_reloads_address_part (rtx, rtx *, enum reg_class,
277 enum machine_mode, int,
278 enum reload_type, int);
279 static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
281 static void copy_replacements_1 (rtx *, rtx *, int);
282 static int find_inc_amount (rtx, rtx);
283 static int refers_to_mem_for_reload_p (rtx);
284 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
287 /* Determine if any secondary reloads are needed for loading (if IN_P is
288 nonzero) or storing (if IN_P is zero) X to or from a reload register of
289 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
290 are needed, push them.
292 Return the reload number of the secondary reload we made, or -1 if
293 we didn't need one. *PICODE is set to the insn_code to use if we do
294 need a secondary reload. */
297 push_secondary_reload (int in_p, rtx x, int opnum, int optional,
298 enum reg_class reload_class,
299 enum machine_mode reload_mode, enum reload_type type,
300 enum insn_code *picode, secondary_reload_info *prev_sri)
302 enum reg_class class = NO_REGS;
303 enum reg_class scratch_class;
304 enum machine_mode mode = reload_mode;
305 enum insn_code icode = CODE_FOR_nothing;
306 enum insn_code t_icode = CODE_FOR_nothing;
307 enum reload_type secondary_type;
308 int s_reload, t_reload = -1;
309 const char *scratch_constraint;
311 secondary_reload_info sri;
313 if (type == RELOAD_FOR_INPUT_ADDRESS
314 || type == RELOAD_FOR_OUTPUT_ADDRESS
315 || type == RELOAD_FOR_INPADDR_ADDRESS
316 || type == RELOAD_FOR_OUTADDR_ADDRESS)
317 secondary_type = type;
319 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
321 *picode = CODE_FOR_nothing;
323 /* If X is a paradoxical SUBREG, use the inner value to determine both the
324 mode and object being reloaded. */
325 if (GET_CODE (x) == SUBREG
326 && (GET_MODE_SIZE (GET_MODE (x))
327 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
330 reload_mode = GET_MODE (x);
333 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
334 is still a pseudo-register by now, it *must* have an equivalent MEM
335 but we don't want to assume that), use that equivalent when seeing if
336 a secondary reload is needed since whether or not a reload is needed
337 might be sensitive to the form of the MEM. */
339 if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
340 && reg_equiv_mem[REGNO (x)] != 0)
341 x = reg_equiv_mem[REGNO (x)];
343 sri.icode = CODE_FOR_nothing;
344 sri.prev_sri = prev_sri;
345 class = targetm.secondary_reload (in_p, x, reload_class, reload_mode, &sri);
348 /* If we don't need any secondary registers, done. */
349 if (class == NO_REGS && icode == CODE_FOR_nothing)
352 if (class != NO_REGS)
353 t_reload = push_secondary_reload (in_p, x, opnum, optional, class,
354 reload_mode, type, &t_icode, &sri);
356 /* If we will be using an insn, the secondary reload is for a
359 if (icode != CODE_FOR_nothing)
361 /* If IN_P is nonzero, the reload register will be the output in
362 operand 0. If IN_P is zero, the reload register will be the input
363 in operand 1. Outputs should have an initial "=", which we must
366 /* ??? It would be useful to be able to handle only two, or more than
367 three, operands, but for now we can only handle the case of having
368 exactly three: output, input and one temp/scratch. */
369 gcc_assert (insn_data[(int) icode].n_operands == 3);
371 /* ??? We currently have no way to represent a reload that needs
372 an icode to reload from an intermediate tertiary reload register.
373 We should probably have a new field in struct reload to tag a
374 chain of scratch operand reloads onto. */
375 gcc_assert (class == NO_REGS);
377 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
378 gcc_assert (*scratch_constraint == '=');
379 scratch_constraint++;
380 if (*scratch_constraint == '&')
381 scratch_constraint++;
382 letter = *scratch_constraint;
383 scratch_class = (letter == 'r' ? GENERAL_REGS
384 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) letter,
385 scratch_constraint));
387 class = scratch_class;
388 mode = insn_data[(int) icode].operand[2].mode;
391 /* This case isn't valid, so fail. Reload is allowed to use the same
392 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
393 in the case of a secondary register, we actually need two different
394 registers for correct code. We fail here to prevent the possibility of
395 silently generating incorrect code later.
397 The convention is that secondary input reloads are valid only if the
398 secondary_class is different from class. If you have such a case, you
399 can not use secondary reloads, you must work around the problem some
402 Allow this when a reload_in/out pattern is being used. I.e. assume
403 that the generated code handles this case. */
405 gcc_assert (!in_p || class != reload_class || icode != CODE_FOR_nothing
406 || t_icode != CODE_FOR_nothing);
408 /* See if we can reuse an existing secondary reload. */
409 for (s_reload = 0; s_reload < n_reloads; s_reload++)
410 if (rld[s_reload].secondary_p
411 && (reg_class_subset_p (class, rld[s_reload].class)
412 || reg_class_subset_p (rld[s_reload].class, class))
413 && ((in_p && rld[s_reload].inmode == mode)
414 || (! in_p && rld[s_reload].outmode == mode))
415 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
416 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
417 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
418 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
419 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
420 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
421 opnum, rld[s_reload].opnum))
424 rld[s_reload].inmode = mode;
426 rld[s_reload].outmode = mode;
428 if (reg_class_subset_p (class, rld[s_reload].class))
429 rld[s_reload].class = class;
431 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
432 rld[s_reload].optional &= optional;
433 rld[s_reload].secondary_p = 1;
434 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
435 opnum, rld[s_reload].opnum))
436 rld[s_reload].when_needed = RELOAD_OTHER;
439 if (s_reload == n_reloads)
441 #ifdef SECONDARY_MEMORY_NEEDED
442 /* If we need a memory location to copy between the two reload regs,
443 set it up now. Note that we do the input case before making
444 the reload and the output case after. This is due to the
445 way reloads are output. */
447 if (in_p && icode == CODE_FOR_nothing
448 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
450 get_secondary_mem (x, reload_mode, opnum, type);
452 /* We may have just added new reloads. Make sure we add
453 the new reload at the end. */
454 s_reload = n_reloads;
458 /* We need to make a new secondary reload for this register class. */
459 rld[s_reload].in = rld[s_reload].out = 0;
460 rld[s_reload].class = class;
462 rld[s_reload].inmode = in_p ? mode : VOIDmode;
463 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
464 rld[s_reload].reg_rtx = 0;
465 rld[s_reload].optional = optional;
466 rld[s_reload].inc = 0;
467 /* Maybe we could combine these, but it seems too tricky. */
468 rld[s_reload].nocombine = 1;
469 rld[s_reload].in_reg = 0;
470 rld[s_reload].out_reg = 0;
471 rld[s_reload].opnum = opnum;
472 rld[s_reload].when_needed = secondary_type;
473 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
474 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
475 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
476 rld[s_reload].secondary_out_icode
477 = ! in_p ? t_icode : CODE_FOR_nothing;
478 rld[s_reload].secondary_p = 1;
482 #ifdef SECONDARY_MEMORY_NEEDED
483 if (! in_p && icode == CODE_FOR_nothing
484 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
485 get_secondary_mem (x, mode, opnum, type);
493 /* If a secondary reload is needed, return its class. If both an intermediate
494 register and a scratch register is needed, we return the class of the
495 intermediate register. */
497 secondary_reload_class (bool in_p, enum reg_class class,
498 enum machine_mode mode, rtx x)
500 enum insn_code icode;
501 secondary_reload_info sri;
503 sri.icode = CODE_FOR_nothing;
505 class = targetm.secondary_reload (in_p, x, class, mode, &sri);
508 /* If there are no secondary reloads at all, we return NO_REGS.
509 If an intermediate register is needed, we return its class. */
510 if (icode == CODE_FOR_nothing || class != NO_REGS)
513 /* No intermediate register is needed, but we have a special reload
514 pattern, which we assume for now needs a scratch register. */
515 return scratch_reload_class (icode);
518 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
519 three operands, verify that operand 2 is an output operand, and return
521 ??? We'd like to be able to handle any pattern with at least 2 operands,
522 for zero or more scratch registers, but that needs more infrastructure. */
524 scratch_reload_class (enum insn_code icode)
526 const char *scratch_constraint;
528 enum reg_class class;
530 gcc_assert (insn_data[(int) icode].n_operands == 3);
531 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
532 gcc_assert (*scratch_constraint == '=');
533 scratch_constraint++;
534 if (*scratch_constraint == '&')
535 scratch_constraint++;
536 scratch_letter = *scratch_constraint;
537 if (scratch_letter == 'r')
539 class = REG_CLASS_FROM_CONSTRAINT ((unsigned char) scratch_letter,
541 gcc_assert (class != NO_REGS);
545 #ifdef SECONDARY_MEMORY_NEEDED
547 /* Return a memory location that will be used to copy X in mode MODE.
548 If we haven't already made a location for this mode in this insn,
549 call find_reloads_address on the location being returned. */
552 get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
553 int opnum, enum reload_type type)
558 /* By default, if MODE is narrower than a word, widen it to a word.
559 This is required because most machines that require these memory
560 locations do not support short load and stores from all registers
561 (e.g., FP registers). */
563 #ifdef SECONDARY_MEMORY_NEEDED_MODE
564 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
566 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
567 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
570 /* If we already have made a MEM for this operand in MODE, return it. */
571 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
572 return secondary_memlocs_elim[(int) mode][opnum];
574 /* If this is the first time we've tried to get a MEM for this mode,
575 allocate a new one. `something_changed' in reload will get set
576 by noticing that the frame size has changed. */
578 if (secondary_memlocs[(int) mode] == 0)
580 #ifdef SECONDARY_MEMORY_NEEDED_RTX
581 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
583 secondary_memlocs[(int) mode]
584 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
588 /* Get a version of the address doing any eliminations needed. If that
589 didn't give us a new MEM, make a new one if it isn't valid. */
591 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
592 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
594 if (! mem_valid && loc == secondary_memlocs[(int) mode])
595 loc = copy_rtx (loc);
597 /* The only time the call below will do anything is if the stack
598 offset is too large. In that case IND_LEVELS doesn't matter, so we
599 can just pass a zero. Adjust the type to be the address of the
600 corresponding object. If the address was valid, save the eliminated
601 address. If it wasn't valid, we need to make a reload each time, so
606 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
607 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
610 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
614 secondary_memlocs_elim[(int) mode][opnum] = loc;
615 if (secondary_memlocs_elim_used <= (int)mode)
616 secondary_memlocs_elim_used = (int)mode + 1;
620 /* Clear any secondary memory locations we've made. */
623 clear_secondary_mem (void)
625 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
627 #endif /* SECONDARY_MEMORY_NEEDED */
630 /* Find the largest class which has at least one register valid in
631 mode INNER, and which for every such register, that register number
632 plus N is also valid in OUTER (if in range) and is cheap to move
633 into REGNO. Such a class must exist. */
635 static enum reg_class
636 find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED,
637 enum machine_mode inner ATTRIBUTE_UNUSED, int n,
638 unsigned int dest_regno ATTRIBUTE_UNUSED)
643 enum reg_class best_class = NO_REGS;
644 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
645 unsigned int best_size = 0;
648 for (class = 1; class < N_REG_CLASSES; class++)
652 for (regno = 0; regno < FIRST_PSEUDO_REGISTER - n && ! bad; regno++)
653 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno))
655 if (HARD_REGNO_MODE_OK (regno, inner))
658 if (! TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
659 || ! HARD_REGNO_MODE_OK (regno + n, outer))
666 cost = REGISTER_MOVE_COST (outer, class, dest_class);
668 if ((reg_class_size[class] > best_size
669 && (best_cost < 0 || best_cost >= cost))
673 best_size = reg_class_size[class];
674 best_cost = REGISTER_MOVE_COST (outer, class, dest_class);
678 gcc_assert (best_size != 0);
683 /* Return the number of a previously made reload that can be combined with
684 a new one, or n_reloads if none of the existing reloads can be used.
685 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
686 push_reload, they determine the kind of the new reload that we try to
687 combine. P_IN points to the corresponding value of IN, which can be
688 modified by this function.
689 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
692 find_reusable_reload (rtx *p_in, rtx out, enum reg_class class,
693 enum reload_type type, int opnum, int dont_share)
697 /* We can't merge two reloads if the output of either one is
700 if (earlyclobber_operand_p (out))
703 /* We can use an existing reload if the class is right
704 and at least one of IN and OUT is a match
705 and the other is at worst neutral.
706 (A zero compared against anything is neutral.)
708 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
709 for the same thing since that can cause us to need more reload registers
710 than we otherwise would. */
712 for (i = 0; i < n_reloads; i++)
713 if ((reg_class_subset_p (class, rld[i].class)
714 || reg_class_subset_p (rld[i].class, class))
715 /* If the existing reload has a register, it must fit our class. */
716 && (rld[i].reg_rtx == 0
717 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
718 true_regnum (rld[i].reg_rtx)))
719 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
720 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
721 || (out != 0 && MATCHES (rld[i].out, out)
722 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
723 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
724 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
725 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
728 /* Reloading a plain reg for input can match a reload to postincrement
729 that reg, since the postincrement's value is the right value.
730 Likewise, it can match a preincrement reload, since we regard
731 the preincrementation as happening before any ref in this insn
733 for (i = 0; i < n_reloads; i++)
734 if ((reg_class_subset_p (class, rld[i].class)
735 || reg_class_subset_p (rld[i].class, class))
736 /* If the existing reload has a register, it must fit our
738 && (rld[i].reg_rtx == 0
739 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
740 true_regnum (rld[i].reg_rtx)))
741 && out == 0 && rld[i].out == 0 && rld[i].in != 0
743 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC
744 && MATCHES (XEXP (rld[i].in, 0), in))
745 || (REG_P (rld[i].in)
746 && GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC
747 && MATCHES (XEXP (in, 0), rld[i].in)))
748 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
749 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
750 && MERGABLE_RELOADS (type, rld[i].when_needed,
751 opnum, rld[i].opnum))
753 /* Make sure reload_in ultimately has the increment,
754 not the plain register. */
762 /* Return nonzero if X is a SUBREG which will require reloading of its
763 SUBREG_REG expression. */
766 reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
770 /* Only SUBREGs are problematical. */
771 if (GET_CODE (x) != SUBREG)
774 inner = SUBREG_REG (x);
776 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
777 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
780 /* If INNER is not a hard register, then INNER will not need to
783 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
786 /* If INNER is not ok for MODE, then INNER will need reloading. */
787 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
790 /* If the outer part is a word or smaller, INNER larger than a
791 word and the number of regs for INNER is not the same as the
792 number of words in INNER, then INNER will need reloading. */
793 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
795 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
796 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
797 != (int) hard_regno_nregs[REGNO (inner)][GET_MODE (inner)]));
800 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
801 requiring an extra reload register. The caller has already found that
802 IN contains some reference to REGNO, so check that we can produce the
803 new value in a single step. E.g. if we have
804 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
805 instruction that adds one to a register, this should succeed.
806 However, if we have something like
807 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
808 needs to be loaded into a register first, we need a separate reload
810 Such PLUS reloads are generated by find_reload_address_part.
811 The out-of-range PLUS expressions are usually introduced in the instruction
812 patterns by register elimination and substituting pseudos without a home
813 by their function-invariant equivalences. */
815 can_reload_into (rtx in, int regno, enum machine_mode mode)
819 struct recog_data save_recog_data;
821 /* For matching constraints, we often get notional input reloads where
822 we want to use the original register as the reload register. I.e.
823 technically this is a non-optional input-output reload, but IN is
824 already a valid register, and has been chosen as the reload register.
825 Speed this up, since it trivially works. */
829 /* To test MEMs properly, we'd have to take into account all the reloads
830 that are already scheduled, which can become quite complicated.
831 And since we've already handled address reloads for this MEM, it
832 should always succeed anyway. */
836 /* If we can make a simple SET insn that does the job, everything should
838 dst = gen_rtx_REG (mode, regno);
839 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
840 save_recog_data = recog_data;
841 if (recog_memoized (test_insn) >= 0)
843 extract_insn (test_insn);
844 r = constrain_operands (1);
846 recog_data = save_recog_data;
850 /* Record one reload that needs to be performed.
851 IN is an rtx saying where the data are to be found before this instruction.
852 OUT says where they must be stored after the instruction.
853 (IN is zero for data not read, and OUT is zero for data not written.)
854 INLOC and OUTLOC point to the places in the instructions where
855 IN and OUT were found.
856 If IN and OUT are both nonzero, it means the same register must be used
857 to reload both IN and OUT.
859 CLASS is a register class required for the reloaded data.
860 INMODE is the machine mode that the instruction requires
861 for the reg that replaces IN and OUTMODE is likewise for OUT.
863 If IN is zero, then OUT's location and mode should be passed as
866 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
868 OPTIONAL nonzero means this reload does not need to be performed:
869 it can be discarded if that is more convenient.
871 OPNUM and TYPE say what the purpose of this reload is.
873 The return value is the reload-number for this reload.
875 If both IN and OUT are nonzero, in some rare cases we might
876 want to make two separate reloads. (Actually we never do this now.)
877 Therefore, the reload-number for OUT is stored in
878 output_reloadnum when we return; the return value applies to IN.
879 Usually (presently always), when IN and OUT are nonzero,
880 the two reload-numbers are equal, but the caller should be careful to
884 push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
885 enum reg_class class, enum machine_mode inmode,
886 enum machine_mode outmode, int strict_low, int optional,
887 int opnum, enum reload_type type)
891 int dont_remove_subreg = 0;
892 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
893 int secondary_in_reload = -1, secondary_out_reload = -1;
894 enum insn_code secondary_in_icode = CODE_FOR_nothing;
895 enum insn_code secondary_out_icode = CODE_FOR_nothing;
897 /* INMODE and/or OUTMODE could be VOIDmode if no mode
898 has been specified for the operand. In that case,
899 use the operand's mode as the mode to reload. */
900 if (inmode == VOIDmode && in != 0)
901 inmode = GET_MODE (in);
902 if (outmode == VOIDmode && out != 0)
903 outmode = GET_MODE (out);
905 /* If IN is a pseudo register everywhere-equivalent to a constant, and
906 it is not in a hard register, reload straight from the constant,
907 since we want to get rid of such pseudo registers.
908 Often this is done earlier, but not always in find_reloads_address. */
909 if (in != 0 && REG_P (in))
911 int regno = REGNO (in);
913 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
914 && reg_equiv_constant[regno] != 0)
915 in = reg_equiv_constant[regno];
918 /* Likewise for OUT. Of course, OUT will never be equivalent to
919 an actual constant, but it might be equivalent to a memory location
920 (in the case of a parameter). */
921 if (out != 0 && REG_P (out))
923 int regno = REGNO (out);
925 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
926 && reg_equiv_constant[regno] != 0)
927 out = reg_equiv_constant[regno];
930 /* If we have a read-write operand with an address side-effect,
931 change either IN or OUT so the side-effect happens only once. */
932 if (in != 0 && out != 0 && MEM_P (in) && rtx_equal_p (in, out))
933 switch (GET_CODE (XEXP (in, 0)))
935 case POST_INC: case POST_DEC: case POST_MODIFY:
936 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
939 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
940 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
947 /* If we are reloading a (SUBREG constant ...), really reload just the
948 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
949 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
950 a pseudo and hence will become a MEM) with M1 wider than M2 and the
951 register is a pseudo, also reload the inside expression.
952 For machines that extend byte loads, do this for any SUBREG of a pseudo
953 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
954 M2 is an integral mode that gets extended when loaded.
955 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
956 either M1 is not valid for R or M2 is wider than a word but we only
957 need one word to store an M2-sized quantity in R.
958 (However, if OUT is nonzero, we need to reload the reg *and*
959 the subreg, so do nothing here, and let following statement handle it.)
961 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
962 we can't handle it here because CONST_INT does not indicate a mode.
964 Similarly, we must reload the inside expression if we have a
965 STRICT_LOW_PART (presumably, in == out in the cas).
967 Also reload the inner expression if it does not require a secondary
968 reload but the SUBREG does.
970 Finally, reload the inner expression if it is a register that is in
971 the class whose registers cannot be referenced in a different size
972 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
973 cannot reload just the inside since we might end up with the wrong
974 register class. But if it is inside a STRICT_LOW_PART, we have
975 no choice, so we hope we do get the right register class there. */
977 if (in != 0 && GET_CODE (in) == SUBREG
978 && (subreg_lowpart_p (in) || strict_low)
979 #ifdef CANNOT_CHANGE_MODE_CLASS
980 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
982 && (CONSTANT_P (SUBREG_REG (in))
983 || GET_CODE (SUBREG_REG (in)) == PLUS
985 || (((REG_P (SUBREG_REG (in))
986 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
987 || MEM_P (SUBREG_REG (in)))
988 && ((GET_MODE_SIZE (inmode)
989 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
990 #ifdef LOAD_EXTEND_OP
991 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
992 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
994 && (GET_MODE_SIZE (inmode)
995 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
996 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
997 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != UNKNOWN)
999 #ifdef WORD_REGISTER_OPERATIONS
1000 || ((GET_MODE_SIZE (inmode)
1001 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1002 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1003 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1007 || (REG_P (SUBREG_REG (in))
1008 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1009 /* The case where out is nonzero
1010 is handled differently in the following statement. */
1011 && (out == 0 || subreg_lowpart_p (in))
1012 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1013 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1015 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1017 != (int) hard_regno_nregs[REGNO (SUBREG_REG (in))]
1018 [GET_MODE (SUBREG_REG (in))]))
1019 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1020 || (secondary_reload_class (1, class, inmode, in) != NO_REGS
1021 && (secondary_reload_class (1, class, GET_MODE (SUBREG_REG (in)),
1024 #ifdef CANNOT_CHANGE_MODE_CLASS
1025 || (REG_P (SUBREG_REG (in))
1026 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1027 && REG_CANNOT_CHANGE_MODE_P
1028 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1032 in_subreg_loc = inloc;
1033 inloc = &SUBREG_REG (in);
1035 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1037 /* This is supposed to happen only for paradoxical subregs made by
1038 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1039 gcc_assert (GET_MODE_SIZE (GET_MODE (in)) <= GET_MODE_SIZE (inmode));
1041 inmode = GET_MODE (in);
1044 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1045 either M1 is not valid for R or M2 is wider than a word but we only
1046 need one word to store an M2-sized quantity in R.
1048 However, we must reload the inner reg *as well as* the subreg in
1051 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1052 code above. This can happen if SUBREG_BYTE != 0. */
1054 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1056 enum reg_class in_class = class;
1058 if (REG_P (SUBREG_REG (in)))
1060 = find_valid_class (inmode, GET_MODE (SUBREG_REG (in)),
1061 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1062 GET_MODE (SUBREG_REG (in)),
1065 REGNO (SUBREG_REG (in)));
1067 /* This relies on the fact that emit_reload_insns outputs the
1068 instructions for input reloads of type RELOAD_OTHER in the same
1069 order as the reloads. Thus if the outer reload is also of type
1070 RELOAD_OTHER, we are guaranteed that this inner reload will be
1071 output before the outer reload. */
1072 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1073 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1074 dont_remove_subreg = 1;
1077 /* Similarly for paradoxical and problematical SUBREGs on the output.
1078 Note that there is no reason we need worry about the previous value
1079 of SUBREG_REG (out); even if wider than out,
1080 storing in a subreg is entitled to clobber it all
1081 (except in the case of STRICT_LOW_PART,
1082 and in that case the constraint should label it input-output.) */
1083 if (out != 0 && GET_CODE (out) == SUBREG
1084 && (subreg_lowpart_p (out) || strict_low)
1085 #ifdef CANNOT_CHANGE_MODE_CLASS
1086 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
1088 && (CONSTANT_P (SUBREG_REG (out))
1090 || (((REG_P (SUBREG_REG (out))
1091 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1092 || MEM_P (SUBREG_REG (out)))
1093 && ((GET_MODE_SIZE (outmode)
1094 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1095 #ifdef WORD_REGISTER_OPERATIONS
1096 || ((GET_MODE_SIZE (outmode)
1097 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1098 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1099 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1103 || (REG_P (SUBREG_REG (out))
1104 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1105 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1106 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1108 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1110 != (int) hard_regno_nregs[REGNO (SUBREG_REG (out))]
1111 [GET_MODE (SUBREG_REG (out))]))
1112 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1113 || (secondary_reload_class (0, class, outmode, out) != NO_REGS
1114 && (secondary_reload_class (0, class, GET_MODE (SUBREG_REG (out)),
1117 #ifdef CANNOT_CHANGE_MODE_CLASS
1118 || (REG_P (SUBREG_REG (out))
1119 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1120 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1121 GET_MODE (SUBREG_REG (out)),
1126 out_subreg_loc = outloc;
1127 outloc = &SUBREG_REG (out);
1129 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1130 gcc_assert (!MEM_P (out)
1131 || GET_MODE_SIZE (GET_MODE (out))
1132 <= GET_MODE_SIZE (outmode));
1134 outmode = GET_MODE (out);
1137 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1138 either M1 is not valid for R or M2 is wider than a word but we only
1139 need one word to store an M2-sized quantity in R.
1141 However, we must reload the inner reg *as well as* the subreg in
1142 that case. In this case, the inner reg is an in-out reload. */
1144 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1146 /* This relies on the fact that emit_reload_insns outputs the
1147 instructions for output reloads of type RELOAD_OTHER in reverse
1148 order of the reloads. Thus if the outer reload is also of type
1149 RELOAD_OTHER, we are guaranteed that this inner reload will be
1150 output after the outer reload. */
1151 dont_remove_subreg = 1;
1152 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1154 find_valid_class (outmode, GET_MODE (SUBREG_REG (out)),
1155 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1156 GET_MODE (SUBREG_REG (out)),
1159 REGNO (SUBREG_REG (out))),
1160 VOIDmode, VOIDmode, 0, 0,
1161 opnum, RELOAD_OTHER);
1164 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1165 if (in != 0 && out != 0 && MEM_P (out)
1166 && (REG_P (in) || MEM_P (in))
1167 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1170 /* If IN is a SUBREG of a hard register, make a new REG. This
1171 simplifies some of the cases below. */
1173 if (in != 0 && GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))
1174 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1175 && ! dont_remove_subreg)
1176 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1178 /* Similarly for OUT. */
1179 if (out != 0 && GET_CODE (out) == SUBREG
1180 && REG_P (SUBREG_REG (out))
1181 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1182 && ! dont_remove_subreg)
1183 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1185 /* Narrow down the class of register wanted if that is
1186 desirable on this machine for efficiency. */
1188 enum reg_class preferred_class = class;
1191 preferred_class = PREFERRED_RELOAD_CLASS (in, class);
1193 /* Output reloads may need analogous treatment, different in detail. */
1194 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1196 preferred_class = PREFERRED_OUTPUT_RELOAD_CLASS (out, preferred_class);
1199 /* Discard what the target said if we cannot do it. */
1200 if (preferred_class != NO_REGS
1201 || (optional && type == RELOAD_FOR_OUTPUT))
1202 class = preferred_class;
1205 /* Make sure we use a class that can handle the actual pseudo
1206 inside any subreg. For example, on the 386, QImode regs
1207 can appear within SImode subregs. Although GENERAL_REGS
1208 can handle SImode, QImode needs a smaller class. */
1209 #ifdef LIMIT_RELOAD_CLASS
1211 class = LIMIT_RELOAD_CLASS (inmode, class);
1212 else if (in != 0 && GET_CODE (in) == SUBREG)
1213 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1216 class = LIMIT_RELOAD_CLASS (outmode, class);
1217 if (out != 0 && GET_CODE (out) == SUBREG)
1218 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1221 /* Verify that this class is at least possible for the mode that
1223 if (this_insn_is_asm)
1225 enum machine_mode mode;
1226 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1230 if (mode == VOIDmode)
1232 error_for_asm (this_insn, "cannot reload integer constant "
1233 "operand in %<asm%>");
1238 outmode = word_mode;
1240 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1241 if (HARD_REGNO_MODE_OK (i, mode)
1242 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1244 int nregs = hard_regno_nregs[i][mode];
1247 for (j = 1; j < nregs; j++)
1248 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1253 if (i == FIRST_PSEUDO_REGISTER)
1255 error_for_asm (this_insn, "impossible register constraint "
1261 /* Optional output reloads are always OK even if we have no register class,
1262 since the function of these reloads is only to have spill_reg_store etc.
1263 set, so that the storing insn can be deleted later. */
1264 gcc_assert (class != NO_REGS
1265 || (optional != 0 && type == RELOAD_FOR_OUTPUT));
1267 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1271 /* See if we need a secondary reload register to move between CLASS
1272 and IN or CLASS and OUT. Get the icode and push any required reloads
1273 needed for each of them if so. */
1277 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1278 &secondary_in_icode, NULL);
1279 if (out != 0 && GET_CODE (out) != SCRATCH)
1280 secondary_out_reload
1281 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1282 type, &secondary_out_icode, NULL);
1284 /* We found no existing reload suitable for re-use.
1285 So add an additional reload. */
1287 #ifdef SECONDARY_MEMORY_NEEDED
1288 /* If a memory location is needed for the copy, make one. */
1291 || (GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))))
1292 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1293 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1295 get_secondary_mem (in, inmode, opnum, type);
1301 rld[i].class = class;
1302 rld[i].inmode = inmode;
1303 rld[i].outmode = outmode;
1305 rld[i].optional = optional;
1307 rld[i].nocombine = 0;
1308 rld[i].in_reg = inloc ? *inloc : 0;
1309 rld[i].out_reg = outloc ? *outloc : 0;
1310 rld[i].opnum = opnum;
1311 rld[i].when_needed = type;
1312 rld[i].secondary_in_reload = secondary_in_reload;
1313 rld[i].secondary_out_reload = secondary_out_reload;
1314 rld[i].secondary_in_icode = secondary_in_icode;
1315 rld[i].secondary_out_icode = secondary_out_icode;
1316 rld[i].secondary_p = 0;
1320 #ifdef SECONDARY_MEMORY_NEEDED
1323 || (GET_CODE (out) == SUBREG && REG_P (SUBREG_REG (out))))
1324 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1325 && SECONDARY_MEMORY_NEEDED (class,
1326 REGNO_REG_CLASS (reg_or_subregno (out)),
1328 get_secondary_mem (out, outmode, opnum, type);
1333 /* We are reusing an existing reload,
1334 but we may have additional information for it.
1335 For example, we may now have both IN and OUT
1336 while the old one may have just one of them. */
1338 /* The modes can be different. If they are, we want to reload in
1339 the larger mode, so that the value is valid for both modes. */
1340 if (inmode != VOIDmode
1341 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1342 rld[i].inmode = inmode;
1343 if (outmode != VOIDmode
1344 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1345 rld[i].outmode = outmode;
1348 rtx in_reg = inloc ? *inloc : 0;
1349 /* If we merge reloads for two distinct rtl expressions that
1350 are identical in content, there might be duplicate address
1351 reloads. Remove the extra set now, so that if we later find
1352 that we can inherit this reload, we can get rid of the
1353 address reloads altogether.
1355 Do not do this if both reloads are optional since the result
1356 would be an optional reload which could potentially leave
1357 unresolved address replacements.
1359 It is not sufficient to call transfer_replacements since
1360 choose_reload_regs will remove the replacements for address
1361 reloads of inherited reloads which results in the same
1363 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1364 && ! (rld[i].optional && optional))
1366 /* We must keep the address reload with the lower operand
1368 if (opnum > rld[i].opnum)
1370 remove_address_replacements (in);
1372 in_reg = rld[i].in_reg;
1375 remove_address_replacements (rld[i].in);
1378 rld[i].in_reg = in_reg;
1383 rld[i].out_reg = outloc ? *outloc : 0;
1385 if (reg_class_subset_p (class, rld[i].class))
1386 rld[i].class = class;
1387 rld[i].optional &= optional;
1388 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1389 opnum, rld[i].opnum))
1390 rld[i].when_needed = RELOAD_OTHER;
1391 rld[i].opnum = MIN (rld[i].opnum, opnum);
1394 /* If the ostensible rtx being reloaded differs from the rtx found
1395 in the location to substitute, this reload is not safe to combine
1396 because we cannot reliably tell whether it appears in the insn. */
1398 if (in != 0 && in != *inloc)
1399 rld[i].nocombine = 1;
1402 /* This was replaced by changes in find_reloads_address_1 and the new
1403 function inc_for_reload, which go with a new meaning of reload_inc. */
1405 /* If this is an IN/OUT reload in an insn that sets the CC,
1406 it must be for an autoincrement. It doesn't work to store
1407 the incremented value after the insn because that would clobber the CC.
1408 So we must do the increment of the value reloaded from,
1409 increment it, store it back, then decrement again. */
1410 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1414 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1415 /* If we did not find a nonzero amount-to-increment-by,
1416 that contradicts the belief that IN is being incremented
1417 in an address in this insn. */
1418 gcc_assert (rld[i].inc != 0);
1422 /* If we will replace IN and OUT with the reload-reg,
1423 record where they are located so that substitution need
1424 not do a tree walk. */
1426 if (replace_reloads)
1430 struct replacement *r = &replacements[n_replacements++];
1432 r->subreg_loc = in_subreg_loc;
1436 if (outloc != 0 && outloc != inloc)
1438 struct replacement *r = &replacements[n_replacements++];
1441 r->subreg_loc = out_subreg_loc;
1446 /* If this reload is just being introduced and it has both
1447 an incoming quantity and an outgoing quantity that are
1448 supposed to be made to match, see if either one of the two
1449 can serve as the place to reload into.
1451 If one of them is acceptable, set rld[i].reg_rtx
1454 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1456 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1459 earlyclobber_operand_p (out));
1461 /* If the outgoing register already contains the same value
1462 as the incoming one, we can dispense with loading it.
1463 The easiest way to tell the caller that is to give a phony
1464 value for the incoming operand (same as outgoing one). */
1465 if (rld[i].reg_rtx == out
1466 && (REG_P (in) || CONSTANT_P (in))
1467 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1468 static_reload_reg_p, i, inmode))
1472 /* If this is an input reload and the operand contains a register that
1473 dies in this insn and is used nowhere else, see if it is the right class
1474 to be used for this reload. Use it if so. (This occurs most commonly
1475 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1476 this if it is also an output reload that mentions the register unless
1477 the output is a SUBREG that clobbers an entire register.
1479 Note that the operand might be one of the spill regs, if it is a
1480 pseudo reg and we are in a block where spilling has not taken place.
1481 But if there is no spilling in this block, that is OK.
1482 An explicitly used hard reg cannot be a spill reg. */
1484 if (rld[i].reg_rtx == 0 && in != 0 && hard_regs_live_known)
1488 enum machine_mode rel_mode = inmode;
1490 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1493 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1494 if (REG_NOTE_KIND (note) == REG_DEAD
1495 && REG_P (XEXP (note, 0))
1496 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1497 && reg_mentioned_p (XEXP (note, 0), in)
1498 /* Check that we don't use a hardreg for an uninitialized
1499 pseudo. See also find_dummy_reload(). */
1500 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1501 || ! bitmap_bit_p (ENTRY_BLOCK_PTR->il.rtl->global_live_at_end,
1502 ORIGINAL_REGNO (XEXP (note, 0))))
1503 && ! refers_to_regno_for_reload_p (regno,
1505 + hard_regno_nregs[regno]
1507 PATTERN (this_insn), inloc)
1508 /* If this is also an output reload, IN cannot be used as
1509 the reload register if it is set in this insn unless IN
1511 && (out == 0 || in == out
1512 || ! hard_reg_set_here_p (regno,
1514 + hard_regno_nregs[regno]
1516 PATTERN (this_insn)))
1517 /* ??? Why is this code so different from the previous?
1518 Is there any simple coherent way to describe the two together?
1519 What's going on here. */
1521 || (GET_CODE (in) == SUBREG
1522 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1524 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1525 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1526 /* Make sure the operand fits in the reg that dies. */
1527 && (GET_MODE_SIZE (rel_mode)
1528 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1529 && HARD_REGNO_MODE_OK (regno, inmode)
1530 && HARD_REGNO_MODE_OK (regno, outmode))
1533 unsigned int nregs = MAX (hard_regno_nregs[regno][inmode],
1534 hard_regno_nregs[regno][outmode]);
1536 for (offs = 0; offs < nregs; offs++)
1537 if (fixed_regs[regno + offs]
1538 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1543 && (! (refers_to_regno_for_reload_p
1544 (regno, (regno + hard_regno_nregs[regno][inmode]),
1546 || can_reload_into (in, regno, inmode)))
1548 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1555 output_reloadnum = i;
1560 /* Record an additional place we must replace a value
1561 for which we have already recorded a reload.
1562 RELOADNUM is the value returned by push_reload
1563 when the reload was recorded.
1564 This is used in insn patterns that use match_dup. */
1567 push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1569 if (replace_reloads)
1571 struct replacement *r = &replacements[n_replacements++];
1572 r->what = reloadnum;
1579 /* Duplicate any replacement we have recorded to apply at
1580 location ORIG_LOC to also be performed at DUP_LOC.
1581 This is used in insn patterns that use match_dup. */
1584 dup_replacements (rtx *dup_loc, rtx *orig_loc)
1586 int i, n = n_replacements;
1588 for (i = 0; i < n; i++)
1590 struct replacement *r = &replacements[i];
1591 if (r->where == orig_loc)
1592 push_replacement (dup_loc, r->what, r->mode);
1596 /* Transfer all replacements that used to be in reload FROM to be in
1600 transfer_replacements (int to, int from)
1604 for (i = 0; i < n_replacements; i++)
1605 if (replacements[i].what == from)
1606 replacements[i].what = to;
1609 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1610 or a subpart of it. If we have any replacements registered for IN_RTX,
1611 cancel the reloads that were supposed to load them.
1612 Return nonzero if we canceled any reloads. */
1614 remove_address_replacements (rtx in_rtx)
1617 char reload_flags[MAX_RELOADS];
1618 int something_changed = 0;
1620 memset (reload_flags, 0, sizeof reload_flags);
1621 for (i = 0, j = 0; i < n_replacements; i++)
1623 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1624 reload_flags[replacements[i].what] |= 1;
1627 replacements[j++] = replacements[i];
1628 reload_flags[replacements[i].what] |= 2;
1631 /* Note that the following store must be done before the recursive calls. */
1634 for (i = n_reloads - 1; i >= 0; i--)
1636 if (reload_flags[i] == 1)
1638 deallocate_reload_reg (i);
1639 remove_address_replacements (rld[i].in);
1641 something_changed = 1;
1644 return something_changed;
1647 /* If there is only one output reload, and it is not for an earlyclobber
1648 operand, try to combine it with a (logically unrelated) input reload
1649 to reduce the number of reload registers needed.
1651 This is safe if the input reload does not appear in
1652 the value being output-reloaded, because this implies
1653 it is not needed any more once the original insn completes.
1655 If that doesn't work, see we can use any of the registers that
1656 die in this insn as a reload register. We can if it is of the right
1657 class and does not appear in the value being output-reloaded. */
1660 combine_reloads (void)
1663 int output_reload = -1;
1664 int secondary_out = -1;
1667 /* Find the output reload; return unless there is exactly one
1668 and that one is mandatory. */
1670 for (i = 0; i < n_reloads; i++)
1671 if (rld[i].out != 0)
1673 if (output_reload >= 0)
1678 if (output_reload < 0 || rld[output_reload].optional)
1681 /* An input-output reload isn't combinable. */
1683 if (rld[output_reload].in != 0)
1686 /* If this reload is for an earlyclobber operand, we can't do anything. */
1687 if (earlyclobber_operand_p (rld[output_reload].out))
1690 /* If there is a reload for part of the address of this operand, we would
1691 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1692 its life to the point where doing this combine would not lower the
1693 number of spill registers needed. */
1694 for (i = 0; i < n_reloads; i++)
1695 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1696 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1697 && rld[i].opnum == rld[output_reload].opnum)
1700 /* Check each input reload; can we combine it? */
1702 for (i = 0; i < n_reloads; i++)
1703 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1704 /* Life span of this reload must not extend past main insn. */
1705 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1706 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1707 && rld[i].when_needed != RELOAD_OTHER
1708 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1709 == CLASS_MAX_NREGS (rld[output_reload].class,
1710 rld[output_reload].outmode))
1712 && rld[i].reg_rtx == 0
1713 #ifdef SECONDARY_MEMORY_NEEDED
1714 /* Don't combine two reloads with different secondary
1715 memory locations. */
1716 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1717 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1718 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1719 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1721 && (SMALL_REGISTER_CLASSES
1722 ? (rld[i].class == rld[output_reload].class)
1723 : (reg_class_subset_p (rld[i].class,
1724 rld[output_reload].class)
1725 || reg_class_subset_p (rld[output_reload].class,
1727 && (MATCHES (rld[i].in, rld[output_reload].out)
1728 /* Args reversed because the first arg seems to be
1729 the one that we imagine being modified
1730 while the second is the one that might be affected. */
1731 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1733 /* However, if the input is a register that appears inside
1734 the output, then we also can't share.
1735 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1736 If the same reload reg is used for both reg 69 and the
1737 result to be stored in memory, then that result
1738 will clobber the address of the memory ref. */
1739 && ! (REG_P (rld[i].in)
1740 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1741 rld[output_reload].out))))
1742 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1743 rld[i].when_needed != RELOAD_FOR_INPUT)
1744 && (reg_class_size[(int) rld[i].class]
1745 || SMALL_REGISTER_CLASSES)
1746 /* We will allow making things slightly worse by combining an
1747 input and an output, but no worse than that. */
1748 && (rld[i].when_needed == RELOAD_FOR_INPUT
1749 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1753 /* We have found a reload to combine with! */
1754 rld[i].out = rld[output_reload].out;
1755 rld[i].out_reg = rld[output_reload].out_reg;
1756 rld[i].outmode = rld[output_reload].outmode;
1757 /* Mark the old output reload as inoperative. */
1758 rld[output_reload].out = 0;
1759 /* The combined reload is needed for the entire insn. */
1760 rld[i].when_needed = RELOAD_OTHER;
1761 /* If the output reload had a secondary reload, copy it. */
1762 if (rld[output_reload].secondary_out_reload != -1)
1764 rld[i].secondary_out_reload
1765 = rld[output_reload].secondary_out_reload;
1766 rld[i].secondary_out_icode
1767 = rld[output_reload].secondary_out_icode;
1770 #ifdef SECONDARY_MEMORY_NEEDED
1771 /* Copy any secondary MEM. */
1772 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1773 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1774 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1776 /* If required, minimize the register class. */
1777 if (reg_class_subset_p (rld[output_reload].class,
1779 rld[i].class = rld[output_reload].class;
1781 /* Transfer all replacements from the old reload to the combined. */
1782 for (j = 0; j < n_replacements; j++)
1783 if (replacements[j].what == output_reload)
1784 replacements[j].what = i;
1789 /* If this insn has only one operand that is modified or written (assumed
1790 to be the first), it must be the one corresponding to this reload. It
1791 is safe to use anything that dies in this insn for that output provided
1792 that it does not occur in the output (we already know it isn't an
1793 earlyclobber. If this is an asm insn, give up. */
1795 if (INSN_CODE (this_insn) == -1)
1798 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1799 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1800 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1803 /* See if some hard register that dies in this insn and is not used in
1804 the output is the right class. Only works if the register we pick
1805 up can fully hold our output reload. */
1806 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1807 if (REG_NOTE_KIND (note) == REG_DEAD
1808 && REG_P (XEXP (note, 0))
1809 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1810 rld[output_reload].out)
1811 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1812 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1813 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1814 REGNO (XEXP (note, 0)))
1815 && (hard_regno_nregs[REGNO (XEXP (note, 0))][rld[output_reload].outmode]
1816 <= hard_regno_nregs[REGNO (XEXP (note, 0))][GET_MODE (XEXP (note, 0))])
1817 /* Ensure that a secondary or tertiary reload for this output
1818 won't want this register. */
1819 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1820 || (! (TEST_HARD_REG_BIT
1821 (reg_class_contents[(int) rld[secondary_out].class],
1822 REGNO (XEXP (note, 0))))
1823 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1824 || ! (TEST_HARD_REG_BIT
1825 (reg_class_contents[(int) rld[secondary_out].class],
1826 REGNO (XEXP (note, 0)))))))
1827 && ! fixed_regs[REGNO (XEXP (note, 0))])
1829 rld[output_reload].reg_rtx
1830 = gen_rtx_REG (rld[output_reload].outmode,
1831 REGNO (XEXP (note, 0)));
1836 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1837 See if one of IN and OUT is a register that may be used;
1838 this is desirable since a spill-register won't be needed.
1839 If so, return the register rtx that proves acceptable.
1841 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1842 CLASS is the register class required for the reload.
1844 If FOR_REAL is >= 0, it is the number of the reload,
1845 and in some cases when it can be discovered that OUT doesn't need
1846 to be computed, clear out rld[FOR_REAL].out.
1848 If FOR_REAL is -1, this should not be done, because this call
1849 is just to see if a register can be found, not to find and install it.
1851 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1852 puts an additional constraint on being able to use IN for OUT since
1853 IN must not appear elsewhere in the insn (it is assumed that IN itself
1854 is safe from the earlyclobber). */
1857 find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1858 enum machine_mode inmode, enum machine_mode outmode,
1859 enum reg_class class, int for_real, int earlyclobber)
1867 /* If operands exceed a word, we can't use either of them
1868 unless they have the same size. */
1869 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1870 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1871 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1874 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1875 respectively refers to a hard register. */
1877 /* Find the inside of any subregs. */
1878 while (GET_CODE (out) == SUBREG)
1880 if (REG_P (SUBREG_REG (out))
1881 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1882 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1883 GET_MODE (SUBREG_REG (out)),
1886 out = SUBREG_REG (out);
1888 while (GET_CODE (in) == SUBREG)
1890 if (REG_P (SUBREG_REG (in))
1891 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1892 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1893 GET_MODE (SUBREG_REG (in)),
1896 in = SUBREG_REG (in);
1899 /* Narrow down the reg class, the same way push_reload will;
1900 otherwise we might find a dummy now, but push_reload won't. */
1902 enum reg_class preferred_class = PREFERRED_RELOAD_CLASS (in, class);
1903 if (preferred_class != NO_REGS)
1904 class = preferred_class;
1907 /* See if OUT will do. */
1909 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1911 unsigned int regno = REGNO (out) + out_offset;
1912 unsigned int nwords = hard_regno_nregs[regno][outmode];
1915 /* When we consider whether the insn uses OUT,
1916 ignore references within IN. They don't prevent us
1917 from copying IN into OUT, because those refs would
1918 move into the insn that reloads IN.
1920 However, we only ignore IN in its role as this reload.
1921 If the insn uses IN elsewhere and it contains OUT,
1922 that counts. We can't be sure it's the "same" operand
1923 so it might not go through this reload. */
1925 *inloc = const0_rtx;
1927 if (regno < FIRST_PSEUDO_REGISTER
1928 && HARD_REGNO_MODE_OK (regno, outmode)
1929 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1930 PATTERN (this_insn), outloc))
1934 for (i = 0; i < nwords; i++)
1935 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1941 if (REG_P (real_out))
1944 value = gen_rtx_REG (outmode, regno);
1951 /* Consider using IN if OUT was not acceptable
1952 or if OUT dies in this insn (like the quotient in a divmod insn).
1953 We can't use IN unless it is dies in this insn,
1954 which means we must know accurately which hard regs are live.
1955 Also, the result can't go in IN if IN is used within OUT,
1956 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1957 if (hard_regs_live_known
1959 && REGNO (in) < FIRST_PSEUDO_REGISTER
1961 || find_reg_note (this_insn, REG_UNUSED, real_out))
1962 && find_reg_note (this_insn, REG_DEAD, real_in)
1963 && !fixed_regs[REGNO (in)]
1964 && HARD_REGNO_MODE_OK (REGNO (in),
1965 /* The only case where out and real_out might
1966 have different modes is where real_out
1967 is a subreg, and in that case, out
1969 (GET_MODE (out) != VOIDmode
1970 ? GET_MODE (out) : outmode))
1971 /* But only do all this if we can be sure, that this input
1972 operand doesn't correspond with an uninitialized pseudoreg.
1973 global can assign some hardreg to it, which is the same as
1974 a different pseudo also currently live (as it can ignore the
1975 conflict). So we never must introduce writes to such hardregs,
1976 as they would clobber the other live pseudo using the same.
1977 See also PR20973. */
1978 && (ORIGINAL_REGNO (in) < FIRST_PSEUDO_REGISTER
1979 || ! bitmap_bit_p (ENTRY_BLOCK_PTR->il.rtl->global_live_at_end,
1980 ORIGINAL_REGNO (in))))
1982 unsigned int regno = REGNO (in) + in_offset;
1983 unsigned int nwords = hard_regno_nregs[regno][inmode];
1985 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
1986 && ! hard_reg_set_here_p (regno, regno + nwords,
1987 PATTERN (this_insn))
1989 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1990 PATTERN (this_insn), inloc)))
1994 for (i = 0; i < nwords; i++)
1995 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
2001 /* If we were going to use OUT as the reload reg
2002 and changed our mind, it means OUT is a dummy that
2003 dies here. So don't bother copying value to it. */
2004 if (for_real >= 0 && value == real_out)
2005 rld[for_real].out = 0;
2006 if (REG_P (real_in))
2009 value = gen_rtx_REG (inmode, regno);
2017 /* This page contains subroutines used mainly for determining
2018 whether the IN or an OUT of a reload can serve as the
2021 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2024 earlyclobber_operand_p (rtx x)
2028 for (i = 0; i < n_earlyclobbers; i++)
2029 if (reload_earlyclobbers[i] == x)
2035 /* Return 1 if expression X alters a hard reg in the range
2036 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2037 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2038 X should be the body of an instruction. */
2041 hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2043 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2045 rtx op0 = SET_DEST (x);
2047 while (GET_CODE (op0) == SUBREG)
2048 op0 = SUBREG_REG (op0);
2051 unsigned int r = REGNO (op0);
2053 /* See if this reg overlaps range under consideration. */
2055 && r + hard_regno_nregs[r][GET_MODE (op0)] > beg_regno)
2059 else if (GET_CODE (x) == PARALLEL)
2061 int i = XVECLEN (x, 0) - 1;
2064 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2071 /* Return 1 if ADDR is a valid memory address for mode MODE,
2072 and check that each pseudo reg has the proper kind of
2076 strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx addr)
2078 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2085 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2086 if they are the same hard reg, and has special hacks for
2087 autoincrement and autodecrement.
2088 This is specifically intended for find_reloads to use
2089 in determining whether two operands match.
2090 X is the operand whose number is the lower of the two.
2092 The value is 2 if Y contains a pre-increment that matches
2093 a non-incrementing address in X. */
2095 /* ??? To be completely correct, we should arrange to pass
2096 for X the output operand and for Y the input operand.
2097 For now, we assume that the output operand has the lower number
2098 because that is natural in (SET output (... input ...)). */
2101 operands_match_p (rtx x, rtx y)
2104 RTX_CODE code = GET_CODE (x);
2110 if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x))))
2111 && (REG_P (y) || (GET_CODE (y) == SUBREG
2112 && REG_P (SUBREG_REG (y)))))
2118 i = REGNO (SUBREG_REG (x));
2119 if (i >= FIRST_PSEUDO_REGISTER)
2121 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2122 GET_MODE (SUBREG_REG (x)),
2129 if (GET_CODE (y) == SUBREG)
2131 j = REGNO (SUBREG_REG (y));
2132 if (j >= FIRST_PSEUDO_REGISTER)
2134 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2135 GET_MODE (SUBREG_REG (y)),
2142 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2143 multiple hard register group of scalar integer registers, so that
2144 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2146 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2147 && SCALAR_INT_MODE_P (GET_MODE (x))
2148 && i < FIRST_PSEUDO_REGISTER)
2149 i += hard_regno_nregs[i][GET_MODE (x)] - 1;
2150 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2151 && SCALAR_INT_MODE_P (GET_MODE (y))
2152 && j < FIRST_PSEUDO_REGISTER)
2153 j += hard_regno_nregs[j][GET_MODE (y)] - 1;
2157 /* If two operands must match, because they are really a single
2158 operand of an assembler insn, then two postincrements are invalid
2159 because the assembler insn would increment only once.
2160 On the other hand, a postincrement matches ordinary indexing
2161 if the postincrement is the output operand. */
2162 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2163 return operands_match_p (XEXP (x, 0), y);
2164 /* Two preincrements are invalid
2165 because the assembler insn would increment only once.
2166 On the other hand, a preincrement matches ordinary indexing
2167 if the preincrement is the input operand.
2168 In this case, return 2, since some callers need to do special
2169 things when this happens. */
2170 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2171 || GET_CODE (y) == PRE_MODIFY)
2172 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2176 /* Now we have disposed of all the cases in which different rtx codes
2178 if (code != GET_CODE (y))
2181 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2182 if (GET_MODE (x) != GET_MODE (y))
2192 return XEXP (x, 0) == XEXP (y, 0);
2194 return XSTR (x, 0) == XSTR (y, 0);
2200 /* Compare the elements. If any pair of corresponding elements
2201 fail to match, return 0 for the whole things. */
2204 fmt = GET_RTX_FORMAT (code);
2205 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2211 if (XWINT (x, i) != XWINT (y, i))
2216 if (XINT (x, i) != XINT (y, i))
2221 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2224 /* If any subexpression returns 2,
2225 we should return 2 if we are successful. */
2234 if (XVECLEN (x, i) != XVECLEN (y, i))
2236 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2238 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2246 /* It is believed that rtx's at this level will never
2247 contain anything but integers and other rtx's,
2248 except for within LABEL_REFs and SYMBOL_REFs. */
2253 return 1 + success_2;
2256 /* Describe the range of registers or memory referenced by X.
2257 If X is a register, set REG_FLAG and put the first register
2258 number into START and the last plus one into END.
2259 If X is a memory reference, put a base address into BASE
2260 and a range of integer offsets into START and END.
2261 If X is pushing on the stack, we can assume it causes no trouble,
2262 so we set the SAFE field. */
2264 static struct decomposition
2267 struct decomposition val;
2270 memset (&val, 0, sizeof (val));
2272 switch (GET_CODE (x))
2276 rtx base = NULL_RTX, offset = 0;
2277 rtx addr = XEXP (x, 0);
2279 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2280 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2282 val.base = XEXP (addr, 0);
2283 val.start = -GET_MODE_SIZE (GET_MODE (x));
2284 val.end = GET_MODE_SIZE (GET_MODE (x));
2285 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2289 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2291 if (GET_CODE (XEXP (addr, 1)) == PLUS
2292 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2293 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2295 val.base = XEXP (addr, 0);
2296 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2297 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2298 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2303 if (GET_CODE (addr) == CONST)
2305 addr = XEXP (addr, 0);
2308 if (GET_CODE (addr) == PLUS)
2310 if (CONSTANT_P (XEXP (addr, 0)))
2312 base = XEXP (addr, 1);
2313 offset = XEXP (addr, 0);
2315 else if (CONSTANT_P (XEXP (addr, 1)))
2317 base = XEXP (addr, 0);
2318 offset = XEXP (addr, 1);
2325 offset = const0_rtx;
2327 if (GET_CODE (offset) == CONST)
2328 offset = XEXP (offset, 0);
2329 if (GET_CODE (offset) == PLUS)
2331 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2333 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2334 offset = XEXP (offset, 0);
2336 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2338 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2339 offset = XEXP (offset, 1);
2343 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2344 offset = const0_rtx;
2347 else if (GET_CODE (offset) != CONST_INT)
2349 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2350 offset = const0_rtx;
2353 if (all_const && GET_CODE (base) == PLUS)
2354 base = gen_rtx_CONST (GET_MODE (base), base);
2356 gcc_assert (GET_CODE (offset) == CONST_INT);
2358 val.start = INTVAL (offset);
2359 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2366 val.start = true_regnum (x);
2367 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2369 /* A pseudo with no hard reg. */
2370 val.start = REGNO (x);
2371 val.end = val.start + 1;
2375 val.end = val.start + hard_regno_nregs[val.start][GET_MODE (x)];
2379 if (!REG_P (SUBREG_REG (x)))
2380 /* This could be more precise, but it's good enough. */
2381 return decompose (SUBREG_REG (x));
2383 val.start = true_regnum (x);
2384 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2385 return decompose (SUBREG_REG (x));
2388 val.end = val.start + hard_regno_nregs[val.start][GET_MODE (x)];
2392 /* This hasn't been assigned yet, so it can't conflict yet. */
2397 gcc_assert (CONSTANT_P (x));
2404 /* Return 1 if altering Y will not modify the value of X.
2405 Y is also described by YDATA, which should be decompose (Y). */
2408 immune_p (rtx x, rtx y, struct decomposition ydata)
2410 struct decomposition xdata;
2413 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2417 gcc_assert (MEM_P (y));
2418 /* If Y is memory and X is not, Y can't affect X. */
2422 xdata = decompose (x);
2424 if (! rtx_equal_p (xdata.base, ydata.base))
2426 /* If bases are distinct symbolic constants, there is no overlap. */
2427 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2429 /* Constants and stack slots never overlap. */
2430 if (CONSTANT_P (xdata.base)
2431 && (ydata.base == frame_pointer_rtx
2432 || ydata.base == hard_frame_pointer_rtx
2433 || ydata.base == stack_pointer_rtx))
2435 if (CONSTANT_P (ydata.base)
2436 && (xdata.base == frame_pointer_rtx
2437 || xdata.base == hard_frame_pointer_rtx
2438 || xdata.base == stack_pointer_rtx))
2440 /* If either base is variable, we don't know anything. */
2444 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2447 /* Similar, but calls decompose. */
2450 safe_from_earlyclobber (rtx op, rtx clobber)
2452 struct decomposition early_data;
2454 early_data = decompose (clobber);
2455 return immune_p (op, clobber, early_data);
2458 /* Main entry point of this file: search the body of INSN
2459 for values that need reloading and record them with push_reload.
2460 REPLACE nonzero means record also where the values occur
2461 so that subst_reloads can be used.
2463 IND_LEVELS says how many levels of indirection are supported by this
2464 machine; a value of zero means that a memory reference is not a valid
2467 LIVE_KNOWN says we have valid information about which hard
2468 regs are live at each point in the program; this is true when
2469 we are called from global_alloc but false when stupid register
2470 allocation has been done.
2472 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2473 which is nonnegative if the reg has been commandeered for reloading into.
2474 It is copied into STATIC_RELOAD_REG_P and referenced from there
2475 by various subroutines.
2477 Return TRUE if some operands need to be changed, because of swapping
2478 commutative operands, reg_equiv_address substitution, or whatever. */
2481 find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2482 short *reload_reg_p)
2484 int insn_code_number;
2487 /* These start out as the constraints for the insn
2488 and they are chewed up as we consider alternatives. */
2489 char *constraints[MAX_RECOG_OPERANDS];
2490 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2492 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2493 char pref_or_nothing[MAX_RECOG_OPERANDS];
2494 /* Nonzero for a MEM operand whose entire address needs a reload.
2495 May be -1 to indicate the entire address may or may not need a reload. */
2496 int address_reloaded[MAX_RECOG_OPERANDS];
2497 /* Nonzero for an address operand that needs to be completely reloaded.
2498 May be -1 to indicate the entire operand may or may not need a reload. */
2499 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2500 /* Value of enum reload_type to use for operand. */
2501 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2502 /* Value of enum reload_type to use within address of operand. */
2503 enum reload_type address_type[MAX_RECOG_OPERANDS];
2504 /* Save the usage of each operand. */
2505 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2506 int no_input_reloads = 0, no_output_reloads = 0;
2508 int this_alternative[MAX_RECOG_OPERANDS];
2509 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2510 char this_alternative_win[MAX_RECOG_OPERANDS];
2511 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2512 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2513 int this_alternative_matches[MAX_RECOG_OPERANDS];
2515 int goal_alternative[MAX_RECOG_OPERANDS];
2516 int this_alternative_number;
2517 int goal_alternative_number = 0;
2518 int operand_reloadnum[MAX_RECOG_OPERANDS];
2519 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2520 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2521 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2522 char goal_alternative_win[MAX_RECOG_OPERANDS];
2523 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2524 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2525 int goal_alternative_swapped;
2528 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2529 rtx substed_operand[MAX_RECOG_OPERANDS];
2530 rtx body = PATTERN (insn);
2531 rtx set = single_set (insn);
2532 int goal_earlyclobber = 0, this_earlyclobber;
2533 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2539 n_earlyclobbers = 0;
2540 replace_reloads = replace;
2541 hard_regs_live_known = live_known;
2542 static_reload_reg_p = reload_reg_p;
2544 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2545 neither are insns that SET cc0. Insns that use CC0 are not allowed
2546 to have any input reloads. */
2547 if (JUMP_P (insn) || CALL_P (insn))
2548 no_output_reloads = 1;
2551 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2552 no_input_reloads = 1;
2553 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2554 no_output_reloads = 1;
2557 #ifdef SECONDARY_MEMORY_NEEDED
2558 /* The eliminated forms of any secondary memory locations are per-insn, so
2559 clear them out here. */
2561 if (secondary_memlocs_elim_used)
2563 memset (secondary_memlocs_elim, 0,
2564 sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2565 secondary_memlocs_elim_used = 0;
2569 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2570 is cheap to move between them. If it is not, there may not be an insn
2571 to do the copy, so we may need a reload. */
2572 if (GET_CODE (body) == SET
2573 && REG_P (SET_DEST (body))
2574 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2575 && REG_P (SET_SRC (body))
2576 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2577 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2578 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2579 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2582 extract_insn (insn);
2584 noperands = reload_n_operands = recog_data.n_operands;
2585 n_alternatives = recog_data.n_alternatives;
2587 /* Just return "no reloads" if insn has no operands with constraints. */
2588 if (noperands == 0 || n_alternatives == 0)
2591 insn_code_number = INSN_CODE (insn);
2592 this_insn_is_asm = insn_code_number < 0;
2594 memcpy (operand_mode, recog_data.operand_mode,
2595 noperands * sizeof (enum machine_mode));
2596 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2600 /* If we will need to know, later, whether some pair of operands
2601 are the same, we must compare them now and save the result.
2602 Reloading the base and index registers will clobber them
2603 and afterward they will fail to match. */
2605 for (i = 0; i < noperands; i++)
2610 substed_operand[i] = recog_data.operand[i];
2613 modified[i] = RELOAD_READ;
2615 /* Scan this operand's constraint to see if it is an output operand,
2616 an in-out operand, is commutative, or should match another. */
2620 p += CONSTRAINT_LEN (c, p);
2624 modified[i] = RELOAD_WRITE;
2627 modified[i] = RELOAD_READ_WRITE;
2631 /* The last operand should not be marked commutative. */
2632 gcc_assert (i != noperands - 1);
2634 /* We currently only support one commutative pair of
2635 operands. Some existing asm code currently uses more
2636 than one pair. Previously, that would usually work,
2637 but sometimes it would crash the compiler. We
2638 continue supporting that case as well as we can by
2639 silently ignoring all but the first pair. In the
2640 future we may handle it correctly. */
2641 if (commutative < 0)
2644 gcc_assert (this_insn_is_asm);
2647 /* Use of ISDIGIT is tempting here, but it may get expensive because
2648 of locale support we don't want. */
2649 case '0': case '1': case '2': case '3': case '4':
2650 case '5': case '6': case '7': case '8': case '9':
2652 c = strtoul (p - 1, &p, 10);
2654 operands_match[c][i]
2655 = operands_match_p (recog_data.operand[c],
2656 recog_data.operand[i]);
2658 /* An operand may not match itself. */
2659 gcc_assert (c != i);
2661 /* If C can be commuted with C+1, and C might need to match I,
2662 then C+1 might also need to match I. */
2663 if (commutative >= 0)
2665 if (c == commutative || c == commutative + 1)
2667 int other = c + (c == commutative ? 1 : -1);
2668 operands_match[other][i]
2669 = operands_match_p (recog_data.operand[other],
2670 recog_data.operand[i]);
2672 if (i == commutative || i == commutative + 1)
2674 int other = i + (i == commutative ? 1 : -1);
2675 operands_match[c][other]
2676 = operands_match_p (recog_data.operand[c],
2677 recog_data.operand[other]);
2679 /* Note that C is supposed to be less than I.
2680 No need to consider altering both C and I because in
2681 that case we would alter one into the other. */
2688 /* Examine each operand that is a memory reference or memory address
2689 and reload parts of the addresses into index registers.
2690 Also here any references to pseudo regs that didn't get hard regs
2691 but are equivalent to constants get replaced in the insn itself
2692 with those constants. Nobody will ever see them again.
2694 Finally, set up the preferred classes of each operand. */
2696 for (i = 0; i < noperands; i++)
2698 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2700 address_reloaded[i] = 0;
2701 address_operand_reloaded[i] = 0;
2702 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2703 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2706 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2707 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2710 if (*constraints[i] == 0)
2711 /* Ignore things like match_operator operands. */
2713 else if (constraints[i][0] == 'p'
2714 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2716 address_operand_reloaded[i]
2717 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2718 recog_data.operand[i],
2719 recog_data.operand_loc[i],
2720 i, operand_type[i], ind_levels, insn);
2722 /* If we now have a simple operand where we used to have a
2723 PLUS or MULT, re-recognize and try again. */
2724 if ((OBJECT_P (*recog_data.operand_loc[i])
2725 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2726 && (GET_CODE (recog_data.operand[i]) == MULT
2727 || GET_CODE (recog_data.operand[i]) == PLUS))
2729 INSN_CODE (insn) = -1;
2730 retval = find_reloads (insn, replace, ind_levels, live_known,
2735 recog_data.operand[i] = *recog_data.operand_loc[i];
2736 substed_operand[i] = recog_data.operand[i];
2738 /* Address operands are reloaded in their existing mode,
2739 no matter what is specified in the machine description. */
2740 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2742 else if (code == MEM)
2745 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2746 recog_data.operand_loc[i],
2747 XEXP (recog_data.operand[i], 0),
2748 &XEXP (recog_data.operand[i], 0),
2749 i, address_type[i], ind_levels, insn);
2750 recog_data.operand[i] = *recog_data.operand_loc[i];
2751 substed_operand[i] = recog_data.operand[i];
2753 else if (code == SUBREG)
2755 rtx reg = SUBREG_REG (recog_data.operand[i]);
2757 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2760 && &SET_DEST (set) == recog_data.operand_loc[i],
2762 &address_reloaded[i]);
2764 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2765 that didn't get a hard register, emit a USE with a REG_EQUAL
2766 note in front so that we might inherit a previous, possibly
2772 && (GET_MODE_SIZE (GET_MODE (reg))
2773 >= GET_MODE_SIZE (GET_MODE (op))))
2774 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2776 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2778 substed_operand[i] = recog_data.operand[i] = op;
2780 else if (code == PLUS || GET_RTX_CLASS (code) == RTX_UNARY)
2781 /* We can get a PLUS as an "operand" as a result of register
2782 elimination. See eliminate_regs and gen_reload. We handle
2783 a unary operator by reloading the operand. */
2784 substed_operand[i] = recog_data.operand[i]
2785 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2786 ind_levels, 0, insn,
2787 &address_reloaded[i]);
2788 else if (code == REG)
2790 /* This is equivalent to calling find_reloads_toplev.
2791 The code is duplicated for speed.
2792 When we find a pseudo always equivalent to a constant,
2793 we replace it by the constant. We must be sure, however,
2794 that we don't try to replace it in the insn in which it
2796 int regno = REGNO (recog_data.operand[i]);
2797 if (reg_equiv_constant[regno] != 0
2798 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2800 /* Record the existing mode so that the check if constants are
2801 allowed will work when operand_mode isn't specified. */
2803 if (operand_mode[i] == VOIDmode)
2804 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2806 substed_operand[i] = recog_data.operand[i]
2807 = reg_equiv_constant[regno];
2809 if (reg_equiv_memory_loc[regno] != 0
2810 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2811 /* We need not give a valid is_set_dest argument since the case
2812 of a constant equivalence was checked above. */
2813 substed_operand[i] = recog_data.operand[i]
2814 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2815 ind_levels, 0, insn,
2816 &address_reloaded[i]);
2818 /* If the operand is still a register (we didn't replace it with an
2819 equivalent), get the preferred class to reload it into. */
2820 code = GET_CODE (recog_data.operand[i]);
2822 = ((code == REG && REGNO (recog_data.operand[i])
2823 >= FIRST_PSEUDO_REGISTER)
2824 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2828 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2829 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2832 /* If this is simply a copy from operand 1 to operand 0, merge the
2833 preferred classes for the operands. */
2834 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2835 && recog_data.operand[1] == SET_SRC (set))
2837 preferred_class[0] = preferred_class[1]
2838 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2839 pref_or_nothing[0] |= pref_or_nothing[1];
2840 pref_or_nothing[1] |= pref_or_nothing[0];
2843 /* Now see what we need for pseudo-regs that didn't get hard regs
2844 or got the wrong kind of hard reg. For this, we must consider
2845 all the operands together against the register constraints. */
2847 best = MAX_RECOG_OPERANDS * 2 + 600;
2850 goal_alternative_swapped = 0;
2853 /* The constraints are made of several alternatives.
2854 Each operand's constraint looks like foo,bar,... with commas
2855 separating the alternatives. The first alternatives for all
2856 operands go together, the second alternatives go together, etc.
2858 First loop over alternatives. */
2860 for (this_alternative_number = 0;
2861 this_alternative_number < n_alternatives;
2862 this_alternative_number++)
2864 /* Loop over operands for one constraint alternative. */
2865 /* LOSERS counts those that don't fit this alternative
2866 and would require loading. */
2868 /* BAD is set to 1 if it some operand can't fit this alternative
2869 even after reloading. */
2871 /* REJECT is a count of how undesirable this alternative says it is
2872 if any reloading is required. If the alternative matches exactly
2873 then REJECT is ignored, but otherwise it gets this much
2874 counted against it in addition to the reloading needed. Each
2875 ? counts three times here since we want the disparaging caused by
2876 a bad register class to only count 1/3 as much. */
2879 this_earlyclobber = 0;
2881 for (i = 0; i < noperands; i++)
2883 char *p = constraints[i];
2888 /* 0 => this operand can be reloaded somehow for this alternative. */
2890 /* 0 => this operand can be reloaded if the alternative allows regs. */
2894 rtx operand = recog_data.operand[i];
2896 /* Nonzero means this is a MEM that must be reloaded into a reg
2897 regardless of what the constraint says. */
2898 int force_reload = 0;
2900 /* Nonzero if a constant forced into memory would be OK for this
2903 int earlyclobber = 0;
2905 /* If the predicate accepts a unary operator, it means that
2906 we need to reload the operand, but do not do this for
2907 match_operator and friends. */
2908 if (UNARY_P (operand) && *p != 0)
2909 operand = XEXP (operand, 0);
2911 /* If the operand is a SUBREG, extract
2912 the REG or MEM (or maybe even a constant) within.
2913 (Constants can occur as a result of reg_equiv_constant.) */
2915 while (GET_CODE (operand) == SUBREG)
2917 /* Offset only matters when operand is a REG and
2918 it is a hard reg. This is because it is passed
2919 to reg_fits_class_p if it is a REG and all pseudos
2920 return 0 from that function. */
2921 if (REG_P (SUBREG_REG (operand))
2922 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2924 if (!subreg_offset_representable_p
2925 (REGNO (SUBREG_REG (operand)),
2926 GET_MODE (SUBREG_REG (operand)),
2927 SUBREG_BYTE (operand),
2928 GET_MODE (operand)))
2930 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2931 GET_MODE (SUBREG_REG (operand)),
2932 SUBREG_BYTE (operand),
2933 GET_MODE (operand));
2935 operand = SUBREG_REG (operand);
2936 /* Force reload if this is a constant or PLUS or if there may
2937 be a problem accessing OPERAND in the outer mode. */
2938 if (CONSTANT_P (operand)
2939 || GET_CODE (operand) == PLUS
2940 /* We must force a reload of paradoxical SUBREGs
2941 of a MEM because the alignment of the inner value
2942 may not be enough to do the outer reference. On
2943 big-endian machines, it may also reference outside
2946 On machines that extend byte operations and we have a
2947 SUBREG where both the inner and outer modes are no wider
2948 than a word and the inner mode is narrower, is integral,
2949 and gets extended when loaded from memory, combine.c has
2950 made assumptions about the behavior of the machine in such
2951 register access. If the data is, in fact, in memory we
2952 must always load using the size assumed to be in the
2953 register and let the insn do the different-sized
2956 This is doubly true if WORD_REGISTER_OPERATIONS. In
2957 this case eliminate_regs has left non-paradoxical
2958 subregs for push_reload to see. Make sure it does
2959 by forcing the reload.
2961 ??? When is it right at this stage to have a subreg
2962 of a mem that is _not_ to be handled specially? IMO
2963 those should have been reduced to just a mem. */
2964 || ((MEM_P (operand)
2966 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2967 #ifndef WORD_REGISTER_OPERATIONS
2968 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2969 < BIGGEST_ALIGNMENT)
2970 && (GET_MODE_SIZE (operand_mode[i])
2971 > GET_MODE_SIZE (GET_MODE (operand))))
2973 #ifdef LOAD_EXTEND_OP
2974 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2975 && (GET_MODE_SIZE (GET_MODE (operand))
2977 && (GET_MODE_SIZE (operand_mode[i])
2978 > GET_MODE_SIZE (GET_MODE (operand)))
2979 && INTEGRAL_MODE_P (GET_MODE (operand))
2980 && LOAD_EXTEND_OP (GET_MODE (operand)) != UNKNOWN)
2989 this_alternative[i] = (int) NO_REGS;
2990 this_alternative_win[i] = 0;
2991 this_alternative_match_win[i] = 0;
2992 this_alternative_offmemok[i] = 0;
2993 this_alternative_earlyclobber[i] = 0;
2994 this_alternative_matches[i] = -1;
2996 /* An empty constraint or empty alternative
2997 allows anything which matched the pattern. */
2998 if (*p == 0 || *p == ',')
3001 /* Scan this alternative's specs for this operand;
3002 set WIN if the operand fits any letter in this alternative.
3003 Otherwise, clear BADOP if this operand could
3004 fit some letter after reloads,
3005 or set WINREG if this operand could fit after reloads
3006 provided the constraint allows some registers. */
3009 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
3018 case '=': case '+': case '*':
3022 /* We only support one commutative marker, the first
3023 one. We already set commutative above. */
3035 /* Ignore rest of this alternative as far as
3036 reloading is concerned. */
3039 while (*p && *p != ',');
3043 case '0': case '1': case '2': case '3': case '4':
3044 case '5': case '6': case '7': case '8': case '9':
3045 m = strtoul (p, &end, 10);
3049 this_alternative_matches[i] = m;
3050 /* We are supposed to match a previous operand.
3051 If we do, we win if that one did.
3052 If we do not, count both of the operands as losers.
3053 (This is too conservative, since most of the time
3054 only a single reload insn will be needed to make
3055 the two operands win. As a result, this alternative
3056 may be rejected when it is actually desirable.) */
3057 if ((swapped && (m != commutative || i != commutative + 1))
3058 /* If we are matching as if two operands were swapped,
3059 also pretend that operands_match had been computed
3061 But if I is the second of those and C is the first,
3062 don't exchange them, because operands_match is valid
3063 only on one side of its diagonal. */
3065 [(m == commutative || m == commutative + 1)
3066 ? 2 * commutative + 1 - m : m]
3067 [(i == commutative || i == commutative + 1)
3068 ? 2 * commutative + 1 - i : i])
3069 : operands_match[m][i])
3071 /* If we are matching a non-offsettable address where an
3072 offsettable address was expected, then we must reject
3073 this combination, because we can't reload it. */
3074 if (this_alternative_offmemok[m]
3075 && MEM_P (recog_data.operand[m])
3076 && this_alternative[m] == (int) NO_REGS
3077 && ! this_alternative_win[m])
3080 did_match = this_alternative_win[m];
3084 /* Operands don't match. */
3087 /* Retroactively mark the operand we had to match
3088 as a loser, if it wasn't already. */
3089 if (this_alternative_win[m])
3091 this_alternative_win[m] = 0;
3092 if (this_alternative[m] == (int) NO_REGS)
3094 /* But count the pair only once in the total badness of
3095 this alternative, if the pair can be a dummy reload.
3096 The pointers in operand_loc are not swapped; swap
3097 them by hand if necessary. */
3098 if (swapped && i == commutative)
3099 loc1 = commutative + 1;
3100 else if (swapped && i == commutative + 1)
3104 if (swapped && m == commutative)
3105 loc2 = commutative + 1;
3106 else if (swapped && m == commutative + 1)
3111 = find_dummy_reload (recog_data.operand[i],
3112 recog_data.operand[m],
3113 recog_data.operand_loc[loc1],
3114 recog_data.operand_loc[loc2],
3115 operand_mode[i], operand_mode[m],
3116 this_alternative[m], -1,
3117 this_alternative_earlyclobber[m]);
3122 /* This can be fixed with reloads if the operand
3123 we are supposed to match can be fixed with reloads. */
3125 this_alternative[i] = this_alternative[m];
3127 /* If we have to reload this operand and some previous
3128 operand also had to match the same thing as this
3129 operand, we don't know how to do that. So reject this
3131 if (! did_match || force_reload)
3132 for (j = 0; j < i; j++)
3133 if (this_alternative_matches[j]
3134 == this_alternative_matches[i])
3139 /* All necessary reloads for an address_operand
3140 were handled in find_reloads_address. */
3142 = (int) base_reg_class (VOIDmode, ADDRESS, SCRATCH);
3152 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3153 && reg_renumber[REGNO (operand)] < 0))
3155 if (CONST_POOL_OK_P (operand))
3162 && ! address_reloaded[i]
3163 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3164 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3170 && ! address_reloaded[i]
3171 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3172 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3176 /* Memory operand whose address is not offsettable. */
3181 && ! (ind_levels ? offsettable_memref_p (operand)
3182 : offsettable_nonstrict_memref_p (operand))
3183 /* Certain mem addresses will become offsettable
3184 after they themselves are reloaded. This is important;
3185 we don't want our own handling of unoffsettables
3186 to override the handling of reg_equiv_address. */
3187 && !(REG_P (XEXP (operand, 0))
3189 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3193 /* Memory operand whose address is offsettable. */
3197 if ((MEM_P (operand)
3198 /* If IND_LEVELS, find_reloads_address won't reload a
3199 pseudo that didn't get a hard reg, so we have to
3200 reject that case. */
3201 && ((ind_levels ? offsettable_memref_p (operand)
3202 : offsettable_nonstrict_memref_p (operand))
3203 /* A reloaded address is offsettable because it is now
3204 just a simple register indirect. */
3205 || address_reloaded[i] == 1))
3207 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3208 && reg_renumber[REGNO (operand)] < 0
3209 /* If reg_equiv_address is nonzero, we will be
3210 loading it into a register; hence it will be
3211 offsettable, but we cannot say that reg_equiv_mem
3212 is offsettable without checking. */
3213 && ((reg_equiv_mem[REGNO (operand)] != 0
3214 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3215 || (reg_equiv_address[REGNO (operand)] != 0))))
3217 if (CONST_POOL_OK_P (operand)
3225 /* Output operand that is stored before the need for the
3226 input operands (and their index registers) is over. */
3227 earlyclobber = 1, this_earlyclobber = 1;
3232 if (GET_CODE (operand) == CONST_DOUBLE
3233 || (GET_CODE (operand) == CONST_VECTOR
3234 && (GET_MODE_CLASS (GET_MODE (operand))
3235 == MODE_VECTOR_FLOAT)))
3241 if (GET_CODE (operand) == CONST_DOUBLE
3242 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3247 if (GET_CODE (operand) == CONST_INT
3248 || (GET_CODE (operand) == CONST_DOUBLE
3249 && GET_MODE (operand) == VOIDmode))
3252 if (CONSTANT_P (operand)
3253 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)))
3258 if (GET_CODE (operand) == CONST_INT
3259 || (GET_CODE (operand) == CONST_DOUBLE
3260 && GET_MODE (operand) == VOIDmode))
3272 if (GET_CODE (operand) == CONST_INT
3273 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3284 /* A PLUS is never a valid operand, but reload can make
3285 it from a register when eliminating registers. */
3286 && GET_CODE (operand) != PLUS
3287 /* A SCRATCH is not a valid operand. */
3288 && GET_CODE (operand) != SCRATCH
3289 && (! CONSTANT_P (operand)
3291 || LEGITIMATE_PIC_OPERAND_P (operand))
3292 && (GENERAL_REGS == ALL_REGS
3294 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3295 && reg_renumber[REGNO (operand)] < 0)))
3297 /* Drop through into 'r' case. */
3301 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3305 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3307 #ifdef EXTRA_CONSTRAINT_STR
3308 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3312 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3314 /* If the address was already reloaded,
3316 else if (MEM_P (operand)
3317 && address_reloaded[i] == 1)
3319 /* Likewise if the address will be reloaded because
3320 reg_equiv_address is nonzero. For reg_equiv_mem
3321 we have to check. */
3322 else if (REG_P (operand)
3323 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3324 && reg_renumber[REGNO (operand)] < 0
3325 && ((reg_equiv_mem[REGNO (operand)] != 0
3326 && EXTRA_CONSTRAINT_STR (reg_equiv_mem[REGNO (operand)], c, p))
3327 || (reg_equiv_address[REGNO (operand)] != 0)))
3330 /* If we didn't already win, we can reload
3331 constants via force_const_mem, and other
3332 MEMs by reloading the address like for 'o'. */
3333 if (CONST_POOL_OK_P (operand)
3340 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3342 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3345 /* If we didn't already win, we can reload
3346 the address into a base register. */
3348 = (int) base_reg_class (VOIDmode, ADDRESS, SCRATCH);
3353 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3360 = (int) (reg_class_subunion
3361 [this_alternative[i]]
3362 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3364 if (GET_MODE (operand) == BLKmode)
3368 && reg_fits_class_p (operand, this_alternative[i],
3369 offset, GET_MODE (recog_data.operand[i])))
3373 while ((p += len), c);
3377 /* If this operand could be handled with a reg,
3378 and some reg is allowed, then this operand can be handled. */
3379 if (winreg && this_alternative[i] != (int) NO_REGS)
3382 /* Record which operands fit this alternative. */
3383 this_alternative_earlyclobber[i] = earlyclobber;
3384 if (win && ! force_reload)
3385 this_alternative_win[i] = 1;
3386 else if (did_match && ! force_reload)
3387 this_alternative_match_win[i] = 1;
3390 int const_to_mem = 0;
3392 this_alternative_offmemok[i] = offmemok;
3396 /* Alternative loses if it has no regs for a reg operand. */
3398 && this_alternative[i] == (int) NO_REGS
3399 && this_alternative_matches[i] < 0)
3402 /* If this is a constant that is reloaded into the desired
3403 class by copying it to memory first, count that as another
3404 reload. This is consistent with other code and is
3405 required to avoid choosing another alternative when
3406 the constant is moved into memory by this function on
3407 an early reload pass. Note that the test here is
3408 precisely the same as in the code below that calls
3410 if (CONST_POOL_OK_P (operand)
3411 && ((PREFERRED_RELOAD_CLASS (operand,
3412 (enum reg_class) this_alternative[i])
3414 || no_input_reloads)
3415 && operand_mode[i] != VOIDmode)
3418 if (this_alternative[i] != (int) NO_REGS)
3422 /* Alternative loses if it requires a type of reload not
3423 permitted for this insn. We can always reload SCRATCH
3424 and objects with a REG_UNUSED note. */
3425 if (GET_CODE (operand) != SCRATCH
3426 && modified[i] != RELOAD_READ && no_output_reloads
3427 && ! find_reg_note (insn, REG_UNUSED, operand))
3429 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3433 /* If we can't reload this value at all, reject this
3434 alternative. Note that we could also lose due to
3435 LIMIT_RELOAD_CLASS, but we don't check that
3438 if (! CONSTANT_P (operand)
3439 && (enum reg_class) this_alternative[i] != NO_REGS)
3441 if (PREFERRED_RELOAD_CLASS
3442 (operand, (enum reg_class) this_alternative[i])
3446 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
3447 if (operand_type[i] == RELOAD_FOR_OUTPUT
3448 && PREFERRED_OUTPUT_RELOAD_CLASS
3449 (operand, (enum reg_class) this_alternative[i])
3455 /* We prefer to reload pseudos over reloading other things,
3456 since such reloads may be able to be eliminated later.
3457 If we are reloading a SCRATCH, we won't be generating any
3458 insns, just using a register, so it is also preferred.
3459 So bump REJECT in other cases. Don't do this in the
3460 case where we are forcing a constant into memory and
3461 it will then win since we don't want to have a different
3462 alternative match then. */
3463 if (! (REG_P (operand)
3464 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3465 && GET_CODE (operand) != SCRATCH
3466 && ! (const_to_mem && constmemok))
3469 /* Input reloads can be inherited more often than output
3470 reloads can be removed, so penalize output reloads. */
3471 if (operand_type[i] != RELOAD_FOR_INPUT
3472 && GET_CODE (operand) != SCRATCH)
3476 /* If this operand is a pseudo register that didn't get a hard
3477 reg and this alternative accepts some register, see if the
3478 class that we want is a subset of the preferred class for this
3479 register. If not, but it intersects that class, use the
3480 preferred class instead. If it does not intersect the preferred
3481 class, show that usage of this alternative should be discouraged;
3482 it will be discouraged more still if the register is `preferred
3483 or nothing'. We do this because it increases the chance of
3484 reusing our spill register in a later insn and avoiding a pair
3485 of memory stores and loads.
3487 Don't bother with this if this alternative will accept this
3490 Don't do this for a multiword operand, since it is only a
3491 small win and has the risk of requiring more spill registers,
3492 which could cause a large loss.
3494 Don't do this if the preferred class has only one register
3495 because we might otherwise exhaust the class. */
3497 if (! win && ! did_match
3498 && this_alternative[i] != (int) NO_REGS
3499 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3500 && reg_class_size [(int) preferred_class[i]] > 0
3501 && ! SMALL_REGISTER_CLASS_P (preferred_class[i]))
3503 if (! reg_class_subset_p (this_alternative[i],
3504 preferred_class[i]))
3506 /* Since we don't have a way of forming the intersection,
3507 we just do something special if the preferred class
3508 is a subset of the class we have; that's the most
3509 common case anyway. */
3510 if (reg_class_subset_p (preferred_class[i],
3511 this_alternative[i]))
3512 this_alternative[i] = (int) preferred_class[i];
3514 reject += (2 + 2 * pref_or_nothing[i]);
3519 /* Now see if any output operands that are marked "earlyclobber"
3520 in this alternative conflict with any input operands
3521 or any memory addresses. */
3523 for (i = 0; i < noperands; i++)
3524 if (this_alternative_earlyclobber[i]
3525 && (this_alternative_win[i] || this_alternative_match_win[i]))
3527 struct decomposition early_data;
3529 early_data = decompose (recog_data.operand[i]);
3531 gcc_assert (modified[i] != RELOAD_READ);
3533 if (this_alternative[i] == NO_REGS)
3535 this_alternative_earlyclobber[i] = 0;
3536 gcc_assert (this_insn_is_asm);
3537 error_for_asm (this_insn,
3538 "%<&%> constraint used with no register class");
3541 for (j = 0; j < noperands; j++)
3542 /* Is this an input operand or a memory ref? */
3543 if ((MEM_P (recog_data.operand[j])
3544 || modified[j] != RELOAD_WRITE)
3546 /* Ignore things like match_operator operands. */
3547 && *recog_data.constraints[j] != 0
3548 /* Don't count an input operand that is constrained to match
3549 the early clobber operand. */
3550 && ! (this_alternative_matches[j] == i
3551 && rtx_equal_p (recog_data.operand[i],
3552 recog_data.operand[j]))
3553 /* Is it altered by storing the earlyclobber operand? */
3554 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3557 /* If the output is in a non-empty few-regs class,
3558 it's costly to reload it, so reload the input instead. */
3559 if (SMALL_REGISTER_CLASS_P (this_alternative[i])
3560 && (REG_P (recog_data.operand[j])
3561 || GET_CODE (recog_data.operand[j]) == SUBREG))
3564 this_alternative_win[j] = 0;
3565 this_alternative_match_win[j] = 0;
3570 /* If an earlyclobber operand conflicts with something,
3571 it must be reloaded, so request this and count the cost. */
3575 this_alternative_win[i] = 0;
3576 this_alternative_match_win[j] = 0;
3577 for (j = 0; j < noperands; j++)
3578 if (this_alternative_matches[j] == i
3579 && this_alternative_match_win[j])
3581 this_alternative_win[j] = 0;
3582 this_alternative_match_win[j] = 0;
3588 /* If one alternative accepts all the operands, no reload required,
3589 choose that alternative; don't consider the remaining ones. */
3592 /* Unswap these so that they are never swapped at `finish'. */
3593 if (commutative >= 0)
3595 recog_data.operand[commutative] = substed_operand[commutative];
3596 recog_data.operand[commutative + 1]
3597 = substed_operand[commutative + 1];
3599 for (i = 0; i < noperands; i++)
3601 goal_alternative_win[i] = this_alternative_win[i];
3602 goal_alternative_match_win[i] = this_alternative_match_win[i];
3603 goal_alternative[i] = this_alternative[i];
3604 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3605 goal_alternative_matches[i] = this_alternative_matches[i];
3606 goal_alternative_earlyclobber[i]
3607 = this_alternative_earlyclobber[i];
3609 goal_alternative_number = this_alternative_number;
3610 goal_alternative_swapped = swapped;
3611 goal_earlyclobber = this_earlyclobber;
3615 /* REJECT, set by the ! and ? constraint characters and when a register
3616 would be reloaded into a non-preferred class, discourages the use of
3617 this alternative for a reload goal. REJECT is incremented by six
3618 for each ? and two for each non-preferred class. */
3619 losers = losers * 6 + reject;
3621 /* If this alternative can be made to work by reloading,
3622 and it needs less reloading than the others checked so far,
3623 record it as the chosen goal for reloading. */
3624 if (! bad && best > losers)
3626 for (i = 0; i < noperands; i++)
3628 goal_alternative[i] = this_alternative[i];
3629 goal_alternative_win[i] = this_alternative_win[i];
3630 goal_alternative_match_win[i] = this_alternative_match_win[i];
3631 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3632 goal_alternative_matches[i] = this_alternative_matches[i];
3633 goal_alternative_earlyclobber[i]
3634 = this_alternative_earlyclobber[i];
3636 goal_alternative_swapped = swapped;
3638 goal_alternative_number = this_alternative_number;
3639 goal_earlyclobber = this_earlyclobber;
3643 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3644 then we need to try each alternative twice,
3645 the second time matching those two operands
3646 as if we had exchanged them.
3647 To do this, really exchange them in operands.
3649 If we have just tried the alternatives the second time,
3650 return operands to normal and drop through. */
3652 if (commutative >= 0)
3657 enum reg_class tclass;
3660 recog_data.operand[commutative] = substed_operand[commutative + 1];
3661 recog_data.operand[commutative + 1] = substed_operand[commutative];
3662 /* Swap the duplicates too. */
3663 for (i = 0; i < recog_data.n_dups; i++)
3664 if (recog_data.dup_num[i] == commutative
3665 || recog_data.dup_num[i] == commutative + 1)
3666 *recog_data.dup_loc[i]
3667 = recog_data.operand[(int) recog_data.dup_num[i]];
3669 tclass = preferred_class[commutative];
3670 preferred_class[commutative] = preferred_class[commutative + 1];
3671 preferred_class[commutative + 1] = tclass;
3673 t = pref_or_nothing[commutative];
3674 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3675 pref_or_nothing[commutative + 1] = t;
3677 t = address_reloaded[commutative];
3678 address_reloaded[commutative] = address_reloaded[commutative + 1];
3679 address_reloaded[commutative + 1] = t;
3681 memcpy (constraints, recog_data.constraints,
3682 noperands * sizeof (char *));
3687 recog_data.operand[commutative] = substed_operand[commutative];
3688 recog_data.operand[commutative + 1]
3689 = substed_operand[commutative + 1];
3690 /* Unswap the duplicates too. */
3691 for (i = 0; i < recog_data.n_dups; i++)
3692 if (recog_data.dup_num[i] == commutative
3693 || recog_data.dup_num[i] == commutative + 1)
3694 *recog_data.dup_loc[i]
3695 = recog_data.operand[(int) recog_data.dup_num[i]];
3699 /* The operands don't meet the constraints.
3700 goal_alternative describes the alternative
3701 that we could reach by reloading the fewest operands.
3702 Reload so as to fit it. */
3704 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3706 /* No alternative works with reloads?? */
3707 if (insn_code_number >= 0)
3708 fatal_insn ("unable to generate reloads for:", insn);
3709 error_for_asm (insn, "inconsistent operand constraints in an %<asm%>");
3710 /* Avoid further trouble with this insn. */
3711 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3716 /* Jump to `finish' from above if all operands are valid already.
3717 In that case, goal_alternative_win is all 1. */
3720 /* Right now, for any pair of operands I and J that are required to match,
3722 goal_alternative_matches[J] is I.
3723 Set up goal_alternative_matched as the inverse function:
3724 goal_alternative_matched[I] = J. */
3726 for (i = 0; i < noperands; i++)
3727 goal_alternative_matched[i] = -1;
3729 for (i = 0; i < noperands; i++)
3730 if (! goal_alternative_win[i]
3731 && goal_alternative_matches[i] >= 0)
3732 goal_alternative_matched[goal_alternative_matches[i]] = i;
3734 for (i = 0; i < noperands; i++)
3735 goal_alternative_win[i] |= goal_alternative_match_win[i];
3737 /* If the best alternative is with operands 1 and 2 swapped,
3738 consider them swapped before reporting the reloads. Update the
3739 operand numbers of any reloads already pushed. */
3741 if (goal_alternative_swapped)
3745 tem = substed_operand[commutative];
3746 substed_operand[commutative] = substed_operand[commutative + 1];
3747 substed_operand[commutative + 1] = tem;
3748 tem = recog_data.operand[commutative];
3749 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3750 recog_data.operand[commutative + 1] = tem;
3751 tem = *recog_data.operand_loc[commutative];
3752 *recog_data.operand_loc[commutative]
3753 = *recog_data.operand_loc[commutative + 1];
3754 *recog_data.operand_loc[commutative + 1] = tem;
3756 for (i = 0; i < n_reloads; i++)
3758 if (rld[i].opnum == commutative)
3759 rld[i].opnum = commutative + 1;
3760 else if (rld[i].opnum == commutative + 1)
3761 rld[i].opnum = commutative;
3765 for (i = 0; i < noperands; i++)
3767 operand_reloadnum[i] = -1;
3769 /* If this is an earlyclobber operand, we need to widen the scope.
3770 The reload must remain valid from the start of the insn being
3771 reloaded until after the operand is stored into its destination.
3772 We approximate this with RELOAD_OTHER even though we know that we
3773 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3775 One special case that is worth checking is when we have an
3776 output that is earlyclobber but isn't used past the insn (typically
3777 a SCRATCH). In this case, we only need have the reload live
3778 through the insn itself, but not for any of our input or output
3780 But we must not accidentally narrow the scope of an existing
3781 RELOAD_OTHER reload - leave these alone.
3783 In any case, anything needed to address this operand can remain
3784 however they were previously categorized. */
3786 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3788 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3789 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3792 /* Any constants that aren't allowed and can't be reloaded
3793 into registers are here changed into memory references. */
3794 for (i = 0; i < noperands; i++)
3795 if (! goal_alternative_win[i]
3796 && CONST_POOL_OK_P (recog_data.operand[i])
3797 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3798 (enum reg_class) goal_alternative[i])
3800 || no_input_reloads)
3801 && operand_mode[i] != VOIDmode)
3803 substed_operand[i] = recog_data.operand[i]
3804 = find_reloads_toplev (force_const_mem (operand_mode[i],
3805 recog_data.operand[i]),
3806 i, address_type[i], ind_levels, 0, insn,
3808 if (alternative_allows_memconst (recog_data.constraints[i],
3809 goal_alternative_number))
3810 goal_alternative_win[i] = 1;
3813 /* Likewise any invalid constants appearing as operand of a PLUS
3814 that is to be reloaded. */
3815 for (i = 0; i < noperands; i++)
3816 if (! goal_alternative_win[i]
3817 && GET_CODE (recog_data.operand[i]) == PLUS
3818 && CONST_POOL_OK_P (XEXP (recog_data.operand[i], 1))
3819 && (PREFERRED_RELOAD_CLASS (XEXP (recog_data.operand[i], 1),
3820 (enum reg_class) goal_alternative[i])
3822 && operand_mode[i] != VOIDmode)
3824 rtx tem = force_const_mem (operand_mode[i],
3825 XEXP (recog_data.operand[i], 1));
3826 tem = gen_rtx_PLUS (operand_mode[i],
3827 XEXP (recog_data.operand[i], 0), tem);
3829 substed_operand[i] = recog_data.operand[i]
3830 = find_reloads_toplev (tem, i, address_type[i],
3831 ind_levels, 0, insn, NULL);
3834 /* Record the values of the earlyclobber operands for the caller. */
3835 if (goal_earlyclobber)
3836 for (i = 0; i < noperands; i++)
3837 if (goal_alternative_earlyclobber[i])
3838 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3840 /* Now record reloads for all the operands that need them. */
3841 for (i = 0; i < noperands; i++)
3842 if (! goal_alternative_win[i])
3844 /* Operands that match previous ones have already been handled. */
3845 if (goal_alternative_matches[i] >= 0)
3847 /* Handle an operand with a nonoffsettable address
3848 appearing where an offsettable address will do
3849 by reloading the address into a base register.
3851 ??? We can also do this when the operand is a register and
3852 reg_equiv_mem is not offsettable, but this is a bit tricky,
3853 so we don't bother with it. It may not be worth doing. */
3854 else if (goal_alternative_matched[i] == -1
3855 && goal_alternative_offmemok[i]
3856 && MEM_P (recog_data.operand[i]))
3858 /* If the address to be reloaded is a VOIDmode constant,
3859 use Pmode as mode of the reload register, as would have
3860 been done by find_reloads_address. */
3861 enum machine_mode address_mode;
3862 address_mode = GET_MODE (XEXP (recog_data.operand[i], 0));
3863 if (address_mode == VOIDmode)
3864 address_mode = Pmode;
3866 operand_reloadnum[i]
3867 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3868 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3869 base_reg_class (VOIDmode, MEM, SCRATCH),
3871 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3872 rld[operand_reloadnum[i]].inc
3873 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3875 /* If this operand is an output, we will have made any
3876 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3877 now we are treating part of the operand as an input, so
3878 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3880 if (modified[i] == RELOAD_WRITE)
3882 for (j = 0; j < n_reloads; j++)
3884 if (rld[j].opnum == i)
3886 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3887 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3888 else if (rld[j].when_needed
3889 == RELOAD_FOR_OUTADDR_ADDRESS)
3890 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3895 else if (goal_alternative_matched[i] == -1)
3897 operand_reloadnum[i]
3898 = push_reload ((modified[i] != RELOAD_WRITE
3899 ? recog_data.operand[i] : 0),
3900 (modified[i] != RELOAD_READ
3901 ? recog_data.operand[i] : 0),
3902 (modified[i] != RELOAD_WRITE
3903 ? recog_data.operand_loc[i] : 0),
3904 (modified[i] != RELOAD_READ
3905 ? recog_data.operand_loc[i] : 0),
3906 (enum reg_class) goal_alternative[i],
3907 (modified[i] == RELOAD_WRITE
3908 ? VOIDmode : operand_mode[i]),
3909 (modified[i] == RELOAD_READ
3910 ? VOIDmode : operand_mode[i]),
3911 (insn_code_number < 0 ? 0
3912 : insn_data[insn_code_number].operand[i].strict_low),
3913 0, i, operand_type[i]);
3915 /* In a matching pair of operands, one must be input only
3916 and the other must be output only.
3917 Pass the input operand as IN and the other as OUT. */
3918 else if (modified[i] == RELOAD_READ
3919 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3921 operand_reloadnum[i]
3922 = push_reload (recog_data.operand[i],
3923 recog_data.operand[goal_alternative_matched[i]],
3924 recog_data.operand_loc[i],
3925 recog_data.operand_loc[goal_alternative_matched[i]],
3926 (enum reg_class) goal_alternative[i],
3928 operand_mode[goal_alternative_matched[i]],
3929 0, 0, i, RELOAD_OTHER);
3930 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3932 else if (modified[i] == RELOAD_WRITE
3933 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3935 operand_reloadnum[goal_alternative_matched[i]]
3936 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3937 recog_data.operand[i],
3938 recog_data.operand_loc[goal_alternative_matched[i]],
3939 recog_data.operand_loc[i],
3940 (enum reg_class) goal_alternative[i],
3941 operand_mode[goal_alternative_matched[i]],
3943 0, 0, i, RELOAD_OTHER);
3944 operand_reloadnum[i] = output_reloadnum;
3948 gcc_assert (insn_code_number < 0);
3949 error_for_asm (insn, "inconsistent operand constraints "
3951 /* Avoid further trouble with this insn. */
3952 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3957 else if (goal_alternative_matched[i] < 0
3958 && goal_alternative_matches[i] < 0
3959 && address_operand_reloaded[i] != 1
3962 /* For each non-matching operand that's a MEM or a pseudo-register
3963 that didn't get a hard register, make an optional reload.
3964 This may get done even if the insn needs no reloads otherwise. */
3966 rtx operand = recog_data.operand[i];
3968 while (GET_CODE (operand) == SUBREG)
3969 operand = SUBREG_REG (operand);
3970 if ((MEM_P (operand)
3972 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3973 /* If this is only for an output, the optional reload would not
3974 actually cause us to use a register now, just note that
3975 something is stored here. */
3976 && ((enum reg_class) goal_alternative[i] != NO_REGS
3977 || modified[i] == RELOAD_WRITE)
3978 && ! no_input_reloads
3979 /* An optional output reload might allow to delete INSN later.
3980 We mustn't make in-out reloads on insns that are not permitted
3982 If this is an asm, we can't delete it; we must not even call
3983 push_reload for an optional output reload in this case,
3984 because we can't be sure that the constraint allows a register,
3985 and push_reload verifies the constraints for asms. */
3986 && (modified[i] == RELOAD_READ
3987 || (! no_output_reloads && ! this_insn_is_asm)))
3988 operand_reloadnum[i]
3989 = push_reload ((modified[i] != RELOAD_WRITE
3990 ? recog_data.operand[i] : 0),
3991 (modified[i] != RELOAD_READ
3992 ? recog_data.operand[i] : 0),
3993 (modified[i] != RELOAD_WRITE
3994 ? recog_data.operand_loc[i] : 0),
3995 (modified[i] != RELOAD_READ
3996 ? recog_data.operand_loc[i] : 0),
3997 (enum reg_class) goal_alternative[i],
3998 (modified[i] == RELOAD_WRITE
3999 ? VOIDmode : operand_mode[i]),
4000 (modified[i] == RELOAD_READ
4001 ? VOIDmode : operand_mode[i]),
4002 (insn_code_number < 0 ? 0
4003 : insn_data[insn_code_number].operand[i].strict_low),
4004 1, i, operand_type[i]);
4005 /* If a memory reference remains (either as a MEM or a pseudo that
4006 did not get a hard register), yet we can't make an optional
4007 reload, check if this is actually a pseudo register reference;
4008 we then need to emit a USE and/or a CLOBBER so that reload
4009 inheritance will do the right thing. */
4013 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
4014 && reg_renumber [REGNO (operand)] < 0)))
4016 operand = *recog_data.operand_loc[i];
4018 while (GET_CODE (operand) == SUBREG)
4019 operand = SUBREG_REG (operand);
4020 if (REG_P (operand))
4022 if (modified[i] != RELOAD_WRITE)
4023 /* We mark the USE with QImode so that we recognize
4024 it as one that can be safely deleted at the end
4026 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
4028 if (modified[i] != RELOAD_READ)
4029 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
4033 else if (goal_alternative_matches[i] >= 0
4034 && goal_alternative_win[goal_alternative_matches[i]]
4035 && modified[i] == RELOAD_READ
4036 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
4037 && ! no_input_reloads && ! no_output_reloads
4040 /* Similarly, make an optional reload for a pair of matching
4041 objects that are in MEM or a pseudo that didn't get a hard reg. */
4043 rtx operand = recog_data.operand[i];
4045 while (GET_CODE (operand) == SUBREG)
4046 operand = SUBREG_REG (operand);
4047 if ((MEM_P (operand)
4049 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4050 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
4052 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
4053 = push_reload (recog_data.operand[goal_alternative_matches[i]],
4054 recog_data.operand[i],
4055 recog_data.operand_loc[goal_alternative_matches[i]],
4056 recog_data.operand_loc[i],
4057 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
4058 operand_mode[goal_alternative_matches[i]],
4060 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
4063 /* Perform whatever substitutions on the operands we are supposed
4064 to make due to commutativity or replacement of registers
4065 with equivalent constants or memory slots. */
4067 for (i = 0; i < noperands; i++)
4069 /* We only do this on the last pass through reload, because it is
4070 possible for some data (like reg_equiv_address) to be changed during
4071 later passes. Moreover, we lose the opportunity to get a useful
4072 reload_{in,out}_reg when we do these replacements. */
4076 rtx substitution = substed_operand[i];
4078 *recog_data.operand_loc[i] = substitution;
4080 /* If we're replacing an operand with a LABEL_REF, we need
4081 to make sure that there's a REG_LABEL note attached to
4082 this instruction. */
4084 && GET_CODE (substitution) == LABEL_REF
4085 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
4086 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
4087 XEXP (substitution, 0),
4091 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4094 /* If this insn pattern contains any MATCH_DUP's, make sure that
4095 they will be substituted if the operands they match are substituted.
4096 Also do now any substitutions we already did on the operands.
4098 Don't do this if we aren't making replacements because we might be
4099 propagating things allocated by frame pointer elimination into places
4100 it doesn't expect. */
4102 if (insn_code_number >= 0 && replace)
4103 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4105 int opno = recog_data.dup_num[i];
4106 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4107 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4111 /* This loses because reloading of prior insns can invalidate the equivalence
4112 (or at least find_equiv_reg isn't smart enough to find it any more),
4113 causing this insn to need more reload regs than it needed before.
4114 It may be too late to make the reload regs available.
4115 Now this optimization is done safely in choose_reload_regs. */
4117 /* For each reload of a reg into some other class of reg,
4118 search for an existing equivalent reg (same value now) in the right class.
4119 We can use it as long as we don't need to change its contents. */
4120 for (i = 0; i < n_reloads; i++)
4121 if (rld[i].reg_rtx == 0
4123 && REG_P (rld[i].in)
4127 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
4128 static_reload_reg_p, 0, rld[i].inmode);
4129 /* Prevent generation of insn to load the value
4130 because the one we found already has the value. */
4132 rld[i].in = rld[i].reg_rtx;
4136 /* Perhaps an output reload can be combined with another
4137 to reduce needs by one. */
4138 if (!goal_earlyclobber)
4141 /* If we have a pair of reloads for parts of an address, they are reloading
4142 the same object, the operands themselves were not reloaded, and they
4143 are for two operands that are supposed to match, merge the reloads and
4144 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4146 for (i = 0; i < n_reloads; i++)
4150 for (j = i + 1; j < n_reloads; j++)
4151 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4152 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4153 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4154 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4155 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4156 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4157 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4158 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4159 && rtx_equal_p (rld[i].in, rld[j].in)
4160 && (operand_reloadnum[rld[i].opnum] < 0
4161 || rld[operand_reloadnum[rld[i].opnum]].optional)
4162 && (operand_reloadnum[rld[j].opnum] < 0
4163 || rld[operand_reloadnum[rld[j].opnum]].optional)
4164 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4165 || (goal_alternative_matches[rld[j].opnum]
4168 for (k = 0; k < n_replacements; k++)
4169 if (replacements[k].what == j)
4170 replacements[k].what = i;
4172 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4173 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4174 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4176 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4181 /* Scan all the reloads and update their type.
4182 If a reload is for the address of an operand and we didn't reload
4183 that operand, change the type. Similarly, change the operand number
4184 of a reload when two operands match. If a reload is optional, treat it
4185 as though the operand isn't reloaded.
4187 ??? This latter case is somewhat odd because if we do the optional
4188 reload, it means the object is hanging around. Thus we need only
4189 do the address reload if the optional reload was NOT done.
4191 Change secondary reloads to be the address type of their operand, not
4194 If an operand's reload is now RELOAD_OTHER, change any
4195 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4196 RELOAD_FOR_OTHER_ADDRESS. */
4198 for (i = 0; i < n_reloads; i++)
4200 if (rld[i].secondary_p
4201 && rld[i].when_needed == operand_type[rld[i].opnum])
4202 rld[i].when_needed = address_type[rld[i].opnum];
4204 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4205 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4206 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4207 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4208 && (operand_reloadnum[rld[i].opnum] < 0
4209 || rld[operand_reloadnum[rld[i].opnum]].optional))
4211 /* If we have a secondary reload to go along with this reload,
4212 change its type to RELOAD_FOR_OPADDR_ADDR. */
4214 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4215 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4216 && rld[i].secondary_in_reload != -1)
4218 int secondary_in_reload = rld[i].secondary_in_reload;
4220 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4222 /* If there's a tertiary reload we have to change it also. */
4223 if (secondary_in_reload > 0
4224 && rld[secondary_in_reload].secondary_in_reload != -1)
4225 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4226 = RELOAD_FOR_OPADDR_ADDR;
4229 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4230 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4231 && rld[i].secondary_out_reload != -1)
4233 int secondary_out_reload = rld[i].secondary_out_reload;
4235 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4237 /* If there's a tertiary reload we have to change it also. */
4238 if (secondary_out_reload
4239 && rld[secondary_out_reload].secondary_out_reload != -1)
4240 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4241 = RELOAD_FOR_OPADDR_ADDR;
4244 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4245 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4246 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4248 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4251 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4252 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4253 && operand_reloadnum[rld[i].opnum] >= 0
4254 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4256 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4258 if (goal_alternative_matches[rld[i].opnum] >= 0)
4259 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4262 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4263 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4264 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4266 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4267 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4268 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4269 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4270 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4271 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4272 This is complicated by the fact that a single operand can have more
4273 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4274 choose_reload_regs without affecting code quality, and cases that
4275 actually fail are extremely rare, so it turns out to be better to fix
4276 the problem here by not generating cases that choose_reload_regs will
4278 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4279 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4281 We can reduce the register pressure by exploiting that a
4282 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4283 does not conflict with any of them, if it is only used for the first of
4284 the RELOAD_FOR_X_ADDRESS reloads. */
4286 int first_op_addr_num = -2;
4287 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4288 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4289 int need_change = 0;
4290 /* We use last_op_addr_reload and the contents of the above arrays
4291 first as flags - -2 means no instance encountered, -1 means exactly
4292 one instance encountered.
4293 If more than one instance has been encountered, we store the reload
4294 number of the first reload of the kind in question; reload numbers
4295 are known to be non-negative. */
4296 for (i = 0; i < noperands; i++)
4297 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4298 for (i = n_reloads - 1; i >= 0; i--)
4300 switch (rld[i].when_needed)
4302 case RELOAD_FOR_OPERAND_ADDRESS:
4303 if (++first_op_addr_num >= 0)
4305 first_op_addr_num = i;
4309 case RELOAD_FOR_INPUT_ADDRESS:
4310 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4312 first_inpaddr_num[rld[i].opnum] = i;
4316 case RELOAD_FOR_OUTPUT_ADDRESS:
4317 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4319 first_outpaddr_num[rld[i].opnum] = i;
4330 for (i = 0; i < n_reloads; i++)
4333 enum reload_type type;
4335 switch (rld[i].when_needed)
4337 case RELOAD_FOR_OPADDR_ADDR:
4338 first_num = first_op_addr_num;
4339 type = RELOAD_FOR_OPERAND_ADDRESS;
4341 case RELOAD_FOR_INPADDR_ADDRESS:
4342 first_num = first_inpaddr_num[rld[i].opnum];
4343 type = RELOAD_FOR_INPUT_ADDRESS;
4345 case RELOAD_FOR_OUTADDR_ADDRESS:
4346 first_num = first_outpaddr_num[rld[i].opnum];
4347 type = RELOAD_FOR_OUTPUT_ADDRESS;
4354 else if (i > first_num)
4355 rld[i].when_needed = type;
4358 /* Check if the only TYPE reload that uses reload I is
4359 reload FIRST_NUM. */
4360 for (j = n_reloads - 1; j > first_num; j--)
4362 if (rld[j].when_needed == type
4363 && (rld[i].secondary_p
4364 ? rld[j].secondary_in_reload == i
4365 : reg_mentioned_p (rld[i].in, rld[j].in)))
4367 rld[i].when_needed = type;
4376 /* See if we have any reloads that are now allowed to be merged
4377 because we've changed when the reload is needed to
4378 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4379 check for the most common cases. */
4381 for (i = 0; i < n_reloads; i++)
4382 if (rld[i].in != 0 && rld[i].out == 0
4383 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4384 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4385 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4386 for (j = 0; j < n_reloads; j++)
4387 if (i != j && rld[j].in != 0 && rld[j].out == 0
4388 && rld[j].when_needed == rld[i].when_needed
4389 && MATCHES (rld[i].in, rld[j].in)
4390 && rld[i].class == rld[j].class
4391 && !rld[i].nocombine && !rld[j].nocombine
4392 && rld[i].reg_rtx == rld[j].reg_rtx)
4394 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4395 transfer_replacements (i, j);
4400 /* If we made any reloads for addresses, see if they violate a
4401 "no input reloads" requirement for this insn. But loads that we
4402 do after the insn (such as for output addresses) are fine. */
4403 if (no_input_reloads)
4404 for (i = 0; i < n_reloads; i++)
4405 gcc_assert (rld[i].in == 0
4406 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS
4407 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS);
4410 /* Compute reload_mode and reload_nregs. */
4411 for (i = 0; i < n_reloads; i++)
4414 = (rld[i].inmode == VOIDmode
4415 || (GET_MODE_SIZE (rld[i].outmode)
4416 > GET_MODE_SIZE (rld[i].inmode)))
4417 ? rld[i].outmode : rld[i].inmode;
4419 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4422 /* Special case a simple move with an input reload and a
4423 destination of a hard reg, if the hard reg is ok, use it. */
4424 for (i = 0; i < n_reloads; i++)
4425 if (rld[i].when_needed == RELOAD_FOR_INPUT
4426 && GET_CODE (PATTERN (insn)) == SET
4427 && REG_P (SET_DEST (PATTERN (insn)))
4428 && SET_SRC (PATTERN (insn)) == rld[i].in)
4430 rtx dest = SET_DEST (PATTERN (insn));
4431 unsigned int regno = REGNO (dest);
4433 if (regno < FIRST_PSEUDO_REGISTER
4434 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4435 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4437 int nr = hard_regno_nregs[regno][rld[i].mode];
4440 for (nri = 1; nri < nr; nri ++)
4441 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno + nri))
4445 rld[i].reg_rtx = dest;
4452 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4453 accepts a memory operand with constant address. */
4456 alternative_allows_memconst (const char *constraint, int altnum)
4459 /* Skip alternatives before the one requested. */
4462 while (*constraint++ != ',');
4465 /* Scan the requested alternative for 'm' or 'o'.
4466 If one of them is present, this alternative accepts memory constants. */
4467 for (; (c = *constraint) && c != ',' && c != '#';
4468 constraint += CONSTRAINT_LEN (c, constraint))
4469 if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c, constraint))
4474 /* Scan X for memory references and scan the addresses for reloading.
4475 Also checks for references to "constant" regs that we want to eliminate
4476 and replaces them with the values they stand for.
4477 We may alter X destructively if it contains a reference to such.
4478 If X is just a constant reg, we return the equivalent value
4481 IND_LEVELS says how many levels of indirect addressing this machine
4484 OPNUM and TYPE identify the purpose of the reload.
4486 IS_SET_DEST is true if X is the destination of a SET, which is not
4487 appropriate to be replaced by a constant.
4489 INSN, if nonzero, is the insn in which we do the reload. It is used
4490 to determine if we may generate output reloads, and where to put USEs
4491 for pseudos that we have to replace with stack slots.
4493 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4494 result of find_reloads_address. */
4497 find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4498 int ind_levels, int is_set_dest, rtx insn,
4499 int *address_reloaded)
4501 RTX_CODE code = GET_CODE (x);
4503 const char *fmt = GET_RTX_FORMAT (code);
4509 /* This code is duplicated for speed in find_reloads. */
4510 int regno = REGNO (x);
4511 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4512 x = reg_equiv_constant[regno];
4514 /* This creates (subreg (mem...)) which would cause an unnecessary
4515 reload of the mem. */
4516 else if (reg_equiv_mem[regno] != 0)
4517 x = reg_equiv_mem[regno];
4519 else if (reg_equiv_memory_loc[regno]
4520 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4522 rtx mem = make_memloc (x, regno);
4523 if (reg_equiv_address[regno]
4524 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4526 /* If this is not a toplevel operand, find_reloads doesn't see
4527 this substitution. We have to emit a USE of the pseudo so
4528 that delete_output_reload can see it. */
4529 if (replace_reloads && recog_data.operand[opnum] != x)
4530 /* We mark the USE with QImode so that we recognize it
4531 as one that can be safely deleted at the end of
4533 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4536 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4537 opnum, type, ind_levels, insn);
4538 if (address_reloaded)
4539 *address_reloaded = i;
4548 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4549 opnum, type, ind_levels, insn);
4550 if (address_reloaded)
4551 *address_reloaded = i;
4556 if (code == SUBREG && REG_P (SUBREG_REG (x)))
4558 /* Check for SUBREG containing a REG that's equivalent to a
4559 constant. If the constant has a known value, truncate it
4560 right now. Similarly if we are extracting a single-word of a
4561 multi-word constant. If the constant is symbolic, allow it
4562 to be substituted normally. push_reload will strip the
4563 subreg later. The constant must not be VOIDmode, because we
4564 will lose the mode of the register (this should never happen
4565 because one of the cases above should handle it). */
4567 int regno = REGNO (SUBREG_REG (x));
4570 if (subreg_lowpart_p (x)
4571 && regno >= FIRST_PSEUDO_REGISTER
4572 && reg_renumber[regno] < 0
4573 && reg_equiv_constant[regno] != 0
4574 && (tem = gen_lowpart_common (GET_MODE (x),
4575 reg_equiv_constant[regno])) != 0)
4578 if (regno >= FIRST_PSEUDO_REGISTER
4579 && reg_renumber[regno] < 0
4580 && reg_equiv_constant[regno] != 0)
4583 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4584 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4589 /* If the subreg contains a reg that will be converted to a mem,
4590 convert the subreg to a narrower memref now.
4591 Otherwise, we would get (subreg (mem ...) ...),
4592 which would force reload of the mem.
4594 We also need to do this if there is an equivalent MEM that is
4595 not offsettable. In that case, alter_subreg would produce an
4596 invalid address on big-endian machines.
4598 For machines that extend byte loads, we must not reload using
4599 a wider mode if we have a paradoxical SUBREG. find_reloads will
4600 force a reload in that case. So we should not do anything here. */
4602 if (regno >= FIRST_PSEUDO_REGISTER
4603 #ifdef LOAD_EXTEND_OP
4604 && (GET_MODE_SIZE (GET_MODE (x))
4605 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4607 && (reg_equiv_address[regno] != 0
4608 || (reg_equiv_mem[regno] != 0
4609 && (! strict_memory_address_p (GET_MODE (x),
4610 XEXP (reg_equiv_mem[regno], 0))
4611 || ! offsettable_memref_p (reg_equiv_mem[regno])
4612 || num_not_at_initial_offset))))
4613 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4617 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4621 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4622 ind_levels, is_set_dest, insn,
4624 /* If we have replaced a reg with it's equivalent memory loc -
4625 that can still be handled here e.g. if it's in a paradoxical
4626 subreg - we must make the change in a copy, rather than using
4627 a destructive change. This way, find_reloads can still elect
4628 not to do the change. */
4629 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4631 x = shallow_copy_rtx (x);
4634 XEXP (x, i) = new_part;
4640 /* Return a mem ref for the memory equivalent of reg REGNO.
4641 This mem ref is not shared with anything. */
4644 make_memloc (rtx ad, int regno)
4646 /* We must rerun eliminate_regs, in case the elimination
4647 offsets have changed. */
4649 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4651 /* If TEM might contain a pseudo, we must copy it to avoid
4652 modifying it when we do the substitution for the reload. */
4653 if (rtx_varies_p (tem, 0))
4654 tem = copy_rtx (tem);
4656 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4657 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4659 /* Copy the result if it's still the same as the equivalence, to avoid
4660 modifying it when we do the substitution for the reload. */
4661 if (tem == reg_equiv_memory_loc[regno])
4662 tem = copy_rtx (tem);
4666 /* Returns true if AD could be turned into a valid memory reference
4667 to mode MODE by reloading the part pointed to by PART into a
4671 maybe_memory_address_p (enum machine_mode mode, rtx ad, rtx *part)
4675 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4678 retv = memory_address_p (mode, ad);
4684 /* Record all reloads needed for handling memory address AD
4685 which appears in *LOC in a memory reference to mode MODE
4686 which itself is found in location *MEMREFLOC.
4687 Note that we take shortcuts assuming that no multi-reg machine mode
4688 occurs as part of an address.
4690 OPNUM and TYPE specify the purpose of this reload.
4692 IND_LEVELS says how many levels of indirect addressing this machine
4695 INSN, if nonzero, is the insn in which we do the reload. It is used
4696 to determine if we may generate output reloads, and where to put USEs
4697 for pseudos that we have to replace with stack slots.
4699 Value is one if this address is reloaded or replaced as a whole; it is
4700 zero if the top level of this address was not reloaded or replaced, and
4701 it is -1 if it may or may not have been reloaded or replaced.
4703 Note that there is no verification that the address will be valid after
4704 this routine does its work. Instead, we rely on the fact that the address
4705 was valid when reload started. So we need only undo things that reload
4706 could have broken. These are wrong register types, pseudos not allocated
4707 to a hard register, and frame pointer elimination. */
4710 find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4711 rtx *loc, int opnum, enum reload_type type,
4712 int ind_levels, rtx insn)
4715 int removed_and = 0;
4719 /* If the address is a register, see if it is a legitimate address and
4720 reload if not. We first handle the cases where we need not reload
4721 or where we must reload in a non-standard way. */
4727 /* If the register is equivalent to an invariant expression, substitute
4728 the invariant, and eliminate any eliminable register references. */
4729 tem = reg_equiv_constant[regno];
4731 && (tem = eliminate_regs (tem, mode, insn))
4732 && strict_memory_address_p (mode, tem))
4738 tem = reg_equiv_memory_loc[regno];
4741 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4743 tem = make_memloc (ad, regno);
4744 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4746 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4747 &XEXP (tem, 0), opnum,
4748 ADDR_TYPE (type), ind_levels, insn);
4750 /* We can avoid a reload if the register's equivalent memory
4751 expression is valid as an indirect memory address.
4752 But not all addresses are valid in a mem used as an indirect
4753 address: only reg or reg+constant. */
4756 && strict_memory_address_p (mode, tem)
4757 && (REG_P (XEXP (tem, 0))
4758 || (GET_CODE (XEXP (tem, 0)) == PLUS
4759 && REG_P (XEXP (XEXP (tem, 0), 0))
4760 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4762 /* TEM is not the same as what we'll be replacing the
4763 pseudo with after reload, put a USE in front of INSN
4764 in the final reload pass. */
4766 && num_not_at_initial_offset
4767 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4770 /* We mark the USE with QImode so that we
4771 recognize it as one that can be safely
4772 deleted at the end of reload. */
4773 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4776 /* This doesn't really count as replacing the address
4777 as a whole, since it is still a memory access. */
4785 /* The only remaining case where we can avoid a reload is if this is a
4786 hard register that is valid as a base register and which is not the
4787 subject of a CLOBBER in this insn. */
4789 else if (regno < FIRST_PSEUDO_REGISTER
4790 && regno_ok_for_base_p (regno, mode, MEM, SCRATCH)
4791 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4794 /* If we do not have one of the cases above, we must do the reload. */
4795 push_reload (ad, NULL_RTX, loc, (rtx*) 0, base_reg_class (mode, MEM, SCRATCH),
4796 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4800 if (strict_memory_address_p (mode, ad))
4802 /* The address appears valid, so reloads are not needed.
4803 But the address may contain an eliminable register.
4804 This can happen because a machine with indirect addressing
4805 may consider a pseudo register by itself a valid address even when
4806 it has failed to get a hard reg.
4807 So do a tree-walk to find and eliminate all such regs. */
4809 /* But first quickly dispose of a common case. */
4810 if (GET_CODE (ad) == PLUS
4811 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4812 && REG_P (XEXP (ad, 0))
4813 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4816 subst_reg_equivs_changed = 0;
4817 *loc = subst_reg_equivs (ad, insn);
4819 if (! subst_reg_equivs_changed)
4822 /* Check result for validity after substitution. */
4823 if (strict_memory_address_p (mode, ad))
4827 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4832 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4837 *memrefloc = copy_rtx (*memrefloc);
4838 XEXP (*memrefloc, 0) = ad;
4839 move_replacements (&ad, &XEXP (*memrefloc, 0));
4845 /* The address is not valid. We have to figure out why. First see if
4846 we have an outer AND and remove it if so. Then analyze what's inside. */
4848 if (GET_CODE (ad) == AND)
4851 loc = &XEXP (ad, 0);
4855 /* One possibility for why the address is invalid is that it is itself
4856 a MEM. This can happen when the frame pointer is being eliminated, a
4857 pseudo is not allocated to a hard register, and the offset between the
4858 frame and stack pointers is not its initial value. In that case the
4859 pseudo will have been replaced by a MEM referring to the
4863 /* First ensure that the address in this MEM is valid. Then, unless
4864 indirect addresses are valid, reload the MEM into a register. */
4866 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4867 opnum, ADDR_TYPE (type),
4868 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4870 /* If tem was changed, then we must create a new memory reference to
4871 hold it and store it back into memrefloc. */
4872 if (tem != ad && memrefloc)
4874 *memrefloc = copy_rtx (*memrefloc);
4875 copy_replacements (tem, XEXP (*memrefloc, 0));
4876 loc = &XEXP (*memrefloc, 0);
4878 loc = &XEXP (*loc, 0);
4881 /* Check similar cases as for indirect addresses as above except
4882 that we can allow pseudos and a MEM since they should have been
4883 taken care of above. */
4886 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4887 || MEM_P (XEXP (tem, 0))
4888 || ! (REG_P (XEXP (tem, 0))
4889 || (GET_CODE (XEXP (tem, 0)) == PLUS
4890 && REG_P (XEXP (XEXP (tem, 0), 0))
4891 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4893 /* Must use TEM here, not AD, since it is the one that will
4894 have any subexpressions reloaded, if needed. */
4895 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
4896 base_reg_class (mode, MEM, SCRATCH), GET_MODE (tem),
4899 return ! removed_and;
4905 /* If we have address of a stack slot but it's not valid because the
4906 displacement is too large, compute the sum in a register.
4907 Handle all base registers here, not just fp/ap/sp, because on some
4908 targets (namely SH) we can also get too large displacements from
4909 big-endian corrections. */
4910 else if (GET_CODE (ad) == PLUS
4911 && REG_P (XEXP (ad, 0))
4912 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4913 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4914 && regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode, PLUS,
4918 /* Unshare the MEM rtx so we can safely alter it. */
4921 *memrefloc = copy_rtx (*memrefloc);
4922 loc = &XEXP (*memrefloc, 0);
4924 loc = &XEXP (*loc, 0);
4927 if (double_reg_address_ok)
4929 /* Unshare the sum as well. */
4930 *loc = ad = copy_rtx (ad);
4932 /* Reload the displacement into an index reg.
4933 We assume the frame pointer or arg pointer is a base reg. */
4934 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4935 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4941 /* If the sum of two regs is not necessarily valid,
4942 reload the sum into a base reg.
4943 That will at least work. */
4944 find_reloads_address_part (ad, loc,
4945 base_reg_class (mode, MEM, SCRATCH),
4946 Pmode, opnum, type, ind_levels);
4948 return ! removed_and;
4951 /* If we have an indexed stack slot, there are three possible reasons why
4952 it might be invalid: The index might need to be reloaded, the address
4953 might have been made by frame pointer elimination and hence have a
4954 constant out of range, or both reasons might apply.
4956 We can easily check for an index needing reload, but even if that is the
4957 case, we might also have an invalid constant. To avoid making the
4958 conservative assumption and requiring two reloads, we see if this address
4959 is valid when not interpreted strictly. If it is, the only problem is
4960 that the index needs a reload and find_reloads_address_1 will take care
4963 Handle all base registers here, not just fp/ap/sp, because on some
4964 targets (namely SPARC) we can also get invalid addresses from preventive
4965 subreg big-endian corrections made by find_reloads_toplev. We
4966 can also get expressions involving LO_SUM (rather than PLUS) from
4967 find_reloads_subreg_address.
4969 If we decide to do something, it must be that `double_reg_address_ok'
4970 is true. We generate a reload of the base register + constant and
4971 rework the sum so that the reload register will be added to the index.
4972 This is safe because we know the address isn't shared.
4974 We check for the base register as both the first and second operand of
4975 the innermost PLUS and/or LO_SUM. */
4977 for (op_index = 0; op_index < 2; ++op_index)
4979 rtx operand, addend;
4980 enum rtx_code inner_code;
4982 if (GET_CODE (ad) != PLUS)
4985 inner_code = GET_CODE (XEXP (ad, 0));
4986 if (!(GET_CODE (ad) == PLUS
4987 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4988 && (inner_code == PLUS || inner_code == LO_SUM)))
4991 operand = XEXP (XEXP (ad, 0), op_index);
4992 if (!REG_P (operand) || REGNO (operand) >= FIRST_PSEUDO_REGISTER)
4995 addend = XEXP (XEXP (ad, 0), 1 - op_index);
4997 if ((regno_ok_for_base_p (REGNO (operand), mode, inner_code,
4999 || operand == frame_pointer_rtx
5000 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
5001 || operand == hard_frame_pointer_rtx
5003 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5004 || operand == arg_pointer_rtx
5006 || operand == stack_pointer_rtx)
5007 && ! maybe_memory_address_p (mode, ad,
5008 &XEXP (XEXP (ad, 0), 1 - op_index)))
5013 offset_reg = plus_constant (operand, INTVAL (XEXP (ad, 1)));
5015 /* Form the adjusted address. */
5016 if (GET_CODE (XEXP (ad, 0)) == PLUS)
5017 ad = gen_rtx_PLUS (GET_MODE (ad),
5018 op_index == 0 ? offset_reg : addend,
5019 op_index == 0 ? addend : offset_reg);
5021 ad = gen_rtx_LO_SUM (GET_MODE (ad),
5022 op_index == 0 ? offset_reg : addend,
5023 op_index == 0 ? addend : offset_reg);
5026 cls = base_reg_class (mode, MEM, GET_CODE (addend));
5027 find_reloads_address_part (XEXP (ad, op_index),
5028 &XEXP (ad, op_index), cls,
5029 GET_MODE (ad), opnum, type, ind_levels);
5030 find_reloads_address_1 (mode,
5031 XEXP (ad, 1 - op_index), 1, GET_CODE (ad),
5032 GET_CODE (XEXP (ad, op_index)),
5033 &XEXP (ad, 1 - op_index), opnum,
5040 /* See if address becomes valid when an eliminable register
5041 in a sum is replaced. */
5044 if (GET_CODE (ad) == PLUS)
5045 tem = subst_indexed_address (ad);
5046 if (tem != ad && strict_memory_address_p (mode, tem))
5048 /* Ok, we win that way. Replace any additional eliminable
5051 subst_reg_equivs_changed = 0;
5052 tem = subst_reg_equivs (tem, insn);
5054 /* Make sure that didn't make the address invalid again. */
5056 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
5063 /* If constants aren't valid addresses, reload the constant address
5065 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
5067 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5068 Unshare it so we can safely alter it. */
5069 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
5070 && CONSTANT_POOL_ADDRESS_P (ad))
5072 *memrefloc = copy_rtx (*memrefloc);
5073 loc = &XEXP (*memrefloc, 0);
5075 loc = &XEXP (*loc, 0);
5078 find_reloads_address_part (ad, loc, base_reg_class (mode, MEM, SCRATCH),
5079 Pmode, opnum, type, ind_levels);
5080 return ! removed_and;
5083 return find_reloads_address_1 (mode, ad, 0, MEM, SCRATCH, loc, opnum, type,
5087 /* Find all pseudo regs appearing in AD
5088 that are eliminable in favor of equivalent values
5089 and do not have hard regs; replace them by their equivalents.
5090 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5091 front of it for pseudos that we have to replace with stack slots. */
5094 subst_reg_equivs (rtx ad, rtx insn)
5096 RTX_CODE code = GET_CODE (ad);
5115 int regno = REGNO (ad);
5117 if (reg_equiv_constant[regno] != 0)
5119 subst_reg_equivs_changed = 1;
5120 return reg_equiv_constant[regno];
5122 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5124 rtx mem = make_memloc (ad, regno);
5125 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5127 subst_reg_equivs_changed = 1;
5128 /* We mark the USE with QImode so that we recognize it
5129 as one that can be safely deleted at the end of
5131 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5140 /* Quickly dispose of a common case. */
5141 if (XEXP (ad, 0) == frame_pointer_rtx
5142 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5150 fmt = GET_RTX_FORMAT (code);
5151 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5153 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5157 /* Compute the sum of X and Y, making canonicalizations assumed in an
5158 address, namely: sum constant integers, surround the sum of two
5159 constants with a CONST, put the constant as the second operand, and
5160 group the constant on the outermost sum.
5162 This routine assumes both inputs are already in canonical form. */
5165 form_sum (rtx x, rtx y)
5168 enum machine_mode mode = GET_MODE (x);
5170 if (mode == VOIDmode)
5171 mode = GET_MODE (y);
5173 if (mode == VOIDmode)
5176 if (GET_CODE (x) == CONST_INT)
5177 return plus_constant (y, INTVAL (x));
5178 else if (GET_CODE (y) == CONST_INT)
5179 return plus_constant (x, INTVAL (y));
5180 else if (CONSTANT_P (x))
5181 tem = x, x = y, y = tem;
5183 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5184 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5186 /* Note that if the operands of Y are specified in the opposite
5187 order in the recursive calls below, infinite recursion will occur. */
5188 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5189 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5191 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5192 constant will have been placed second. */
5193 if (CONSTANT_P (x) && CONSTANT_P (y))
5195 if (GET_CODE (x) == CONST)
5197 if (GET_CODE (y) == CONST)
5200 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5203 return gen_rtx_PLUS (mode, x, y);
5206 /* If ADDR is a sum containing a pseudo register that should be
5207 replaced with a constant (from reg_equiv_constant),
5208 return the result of doing so, and also apply the associative
5209 law so that the result is more likely to be a valid address.
5210 (But it is not guaranteed to be one.)
5212 Note that at most one register is replaced, even if more are
5213 replaceable. Also, we try to put the result into a canonical form
5214 so it is more likely to be a valid address.
5216 In all other cases, return ADDR. */
5219 subst_indexed_address (rtx addr)
5221 rtx op0 = 0, op1 = 0, op2 = 0;
5225 if (GET_CODE (addr) == PLUS)
5227 /* Try to find a register to replace. */
5228 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5230 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5231 && reg_renumber[regno] < 0
5232 && reg_equiv_constant[regno] != 0)
5233 op0 = reg_equiv_constant[regno];
5234 else if (REG_P (op1)
5235 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5236 && reg_renumber[regno] < 0
5237 && reg_equiv_constant[regno] != 0)
5238 op1 = reg_equiv_constant[regno];
5239 else if (GET_CODE (op0) == PLUS
5240 && (tem = subst_indexed_address (op0)) != op0)
5242 else if (GET_CODE (op1) == PLUS
5243 && (tem = subst_indexed_address (op1)) != op1)
5248 /* Pick out up to three things to add. */
5249 if (GET_CODE (op1) == PLUS)
5250 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5251 else if (GET_CODE (op0) == PLUS)
5252 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5254 /* Compute the sum. */
5256 op1 = form_sum (op1, op2);
5258 op0 = form_sum (op0, op1);
5265 /* Update the REG_INC notes for an insn. It updates all REG_INC
5266 notes for the instruction which refer to REGNO the to refer
5267 to the reload number.
5269 INSN is the insn for which any REG_INC notes need updating.
5271 REGNO is the register number which has been reloaded.
5273 RELOADNUM is the reload number. */
5276 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5277 int reloadnum ATTRIBUTE_UNUSED)
5282 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5283 if (REG_NOTE_KIND (link) == REG_INC
5284 && (int) REGNO (XEXP (link, 0)) == regno)
5285 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5289 /* Record the pseudo registers we must reload into hard registers in a
5290 subexpression of a would-be memory address, X referring to a value
5291 in mode MODE. (This function is not called if the address we find
5294 CONTEXT = 1 means we are considering regs as index regs,
5295 = 0 means we are considering them as base regs.
5296 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5298 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5299 is the code of the index part of the address. Otherwise, pass SCRATCH
5301 OPNUM and TYPE specify the purpose of any reloads made.
5303 IND_LEVELS says how many levels of indirect addressing are
5304 supported at this point in the address.
5306 INSN, if nonzero, is the insn in which we do the reload. It is used
5307 to determine if we may generate output reloads.
5309 We return nonzero if X, as a whole, is reloaded or replaced. */
5311 /* Note that we take shortcuts assuming that no multi-reg machine mode
5312 occurs as part of an address.
5313 Also, this is not fully machine-customizable; it works for machines
5314 such as VAXen and 68000's and 32000's, but other possible machines
5315 could have addressing modes that this does not handle right.
5316 If you add push_reload calls here, you need to make sure gen_reload
5317 handles those cases gracefully. */
5320 find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
5321 enum rtx_code outer_code, enum rtx_code index_code,
5322 rtx *loc, int opnum, enum reload_type type,
5323 int ind_levels, rtx insn)
5325 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, OUTER, INDEX) \
5327 ? regno_ok_for_base_p (REGNO, MODE, OUTER, INDEX) \
5328 : REGNO_OK_FOR_INDEX_P (REGNO))
5330 enum reg_class context_reg_class;
5331 RTX_CODE code = GET_CODE (x);
5334 context_reg_class = INDEX_REG_CLASS;
5336 context_reg_class = base_reg_class (mode, outer_code, index_code);
5342 rtx orig_op0 = XEXP (x, 0);
5343 rtx orig_op1 = XEXP (x, 1);
5344 RTX_CODE code0 = GET_CODE (orig_op0);
5345 RTX_CODE code1 = GET_CODE (orig_op1);
5349 if (GET_CODE (op0) == SUBREG)
5351 op0 = SUBREG_REG (op0);
5352 code0 = GET_CODE (op0);
5353 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5354 op0 = gen_rtx_REG (word_mode,
5356 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5357 GET_MODE (SUBREG_REG (orig_op0)),
5358 SUBREG_BYTE (orig_op0),
5359 GET_MODE (orig_op0))));
5362 if (GET_CODE (op1) == SUBREG)
5364 op1 = SUBREG_REG (op1);
5365 code1 = GET_CODE (op1);
5366 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5367 /* ??? Why is this given op1's mode and above for
5368 ??? op0 SUBREGs we use word_mode? */
5369 op1 = gen_rtx_REG (GET_MODE (op1),
5371 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5372 GET_MODE (SUBREG_REG (orig_op1)),
5373 SUBREG_BYTE (orig_op1),
5374 GET_MODE (orig_op1))));
5376 /* Plus in the index register may be created only as a result of
5377 register rematerialization for expression like &localvar*4. Reload it.
5378 It may be possible to combine the displacement on the outer level,
5379 but it is probably not worthwhile to do so. */
5382 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5383 opnum, ADDR_TYPE (type), ind_levels, insn);
5384 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5386 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5390 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5391 || code0 == ZERO_EXTEND || code1 == MEM)
5393 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5394 &XEXP (x, 0), opnum, type, ind_levels,
5396 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5397 &XEXP (x, 1), opnum, type, ind_levels,
5401 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5402 || code1 == ZERO_EXTEND || code0 == MEM)
5404 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5405 &XEXP (x, 0), opnum, type, ind_levels,
5407 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5408 &XEXP (x, 1), opnum, type, ind_levels,
5412 else if (code0 == CONST_INT || code0 == CONST
5413 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5414 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5415 &XEXP (x, 1), opnum, type, ind_levels,
5418 else if (code1 == CONST_INT || code1 == CONST
5419 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5420 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5421 &XEXP (x, 0), opnum, type, ind_levels,
5424 else if (code0 == REG && code1 == REG)
5426 if (REGNO_OK_FOR_INDEX_P (REGNO (op0))
5427 && regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5429 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1))
5430 && regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5432 else if (regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5433 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5434 &XEXP (x, 0), opnum, type, ind_levels,
5436 else if (regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5437 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5438 &XEXP (x, 1), opnum, type, ind_levels,
5440 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1)))
5441 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5442 &XEXP (x, 0), opnum, type, ind_levels,
5444 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0)))
5445 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5446 &XEXP (x, 1), opnum, type, ind_levels,
5450 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5451 &XEXP (x, 0), opnum, type, ind_levels,
5453 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5454 &XEXP (x, 1), opnum, type, ind_levels,
5459 else if (code0 == REG)
5461 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5462 &XEXP (x, 0), opnum, type, ind_levels,
5464 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5465 &XEXP (x, 1), opnum, type, ind_levels,
5469 else if (code1 == REG)
5471 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5472 &XEXP (x, 1), opnum, type, ind_levels,
5474 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5475 &XEXP (x, 0), opnum, type, ind_levels,
5485 rtx op0 = XEXP (x, 0);
5486 rtx op1 = XEXP (x, 1);
5487 enum rtx_code index_code;
5491 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5494 /* Currently, we only support {PRE,POST}_MODIFY constructs
5495 where a base register is {inc,dec}remented by the contents
5496 of another register or by a constant value. Thus, these
5497 operands must match. */
5498 gcc_assert (op0 == XEXP (op1, 0));
5500 /* Require index register (or constant). Let's just handle the
5501 register case in the meantime... If the target allows
5502 auto-modify by a constant then we could try replacing a pseudo
5503 register with its equivalent constant where applicable. */
5504 if (REG_P (XEXP (op1, 1)))
5505 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5506 find_reloads_address_1 (mode, XEXP (op1, 1), 1, code, SCRATCH,
5507 &XEXP (op1, 1), opnum, type, ind_levels,
5510 gcc_assert (REG_P (XEXP (op1, 0)));
5512 regno = REGNO (XEXP (op1, 0));
5513 index_code = GET_CODE (XEXP (op1, 1));
5515 /* A register that is incremented cannot be constant! */
5516 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5517 || reg_equiv_constant[regno] == 0);
5519 /* Handle a register that is equivalent to a memory location
5520 which cannot be addressed directly. */
5521 if (reg_equiv_memory_loc[regno] != 0
5522 && (reg_equiv_address[regno] != 0
5523 || num_not_at_initial_offset))
5525 rtx tem = make_memloc (XEXP (x, 0), regno);
5527 if (reg_equiv_address[regno]
5528 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5530 /* First reload the memory location's address.
5531 We can't use ADDR_TYPE (type) here, because we need to
5532 write back the value after reading it, hence we actually
5533 need two registers. */
5534 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5535 &XEXP (tem, 0), opnum,
5539 /* Then reload the memory location into a base
5541 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5543 base_reg_class (mode, code,
5545 GET_MODE (x), GET_MODE (x), 0,
5546 0, opnum, RELOAD_OTHER);
5548 update_auto_inc_notes (this_insn, regno, reloadnum);
5553 if (reg_renumber[regno] >= 0)
5554 regno = reg_renumber[regno];
5556 /* We require a base register here... */
5557 if (!regno_ok_for_base_p (regno, GET_MODE (x), code, index_code))
5559 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5560 &XEXP (op1, 0), &XEXP (x, 0),
5561 base_reg_class (mode, code, index_code),
5562 GET_MODE (x), GET_MODE (x), 0, 0,
5563 opnum, RELOAD_OTHER);
5565 update_auto_inc_notes (this_insn, regno, reloadnum);
5575 if (REG_P (XEXP (x, 0)))
5577 int regno = REGNO (XEXP (x, 0));
5581 /* A register that is incremented cannot be constant! */
5582 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5583 || reg_equiv_constant[regno] == 0);
5585 /* Handle a register that is equivalent to a memory location
5586 which cannot be addressed directly. */
5587 if (reg_equiv_memory_loc[regno] != 0
5588 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5590 rtx tem = make_memloc (XEXP (x, 0), regno);
5591 if (reg_equiv_address[regno]
5592 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5594 /* First reload the memory location's address.
5595 We can't use ADDR_TYPE (type) here, because we need to
5596 write back the value after reading it, hence we actually
5597 need two registers. */
5598 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5599 &XEXP (tem, 0), opnum, type,
5601 /* Put this inside a new increment-expression. */
5602 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5603 /* Proceed to reload that, as if it contained a register. */
5607 /* If we have a hard register that is ok as an index,
5608 don't make a reload. If an autoincrement of a nice register
5609 isn't "valid", it must be that no autoincrement is "valid".
5610 If that is true and something made an autoincrement anyway,
5611 this must be a special context where one is allowed.
5612 (For example, a "push" instruction.)
5613 We can't improve this address, so leave it alone. */
5615 /* Otherwise, reload the autoincrement into a suitable hard reg
5616 and record how much to increment by. */
5618 if (reg_renumber[regno] >= 0)
5619 regno = reg_renumber[regno];
5620 if (regno >= FIRST_PSEUDO_REGISTER
5621 || !REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5626 /* If we can output the register afterwards, do so, this
5627 saves the extra update.
5628 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5629 CALL_INSN - and it does not set CC0.
5630 But don't do this if we cannot directly address the
5631 memory location, since this will make it harder to
5632 reuse address reloads, and increases register pressure.
5633 Also don't do this if we can probably update x directly. */
5634 rtx equiv = (MEM_P (XEXP (x, 0))
5636 : reg_equiv_mem[regno]);
5637 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5638 if (insn && NONJUMP_INSN_P (insn) && equiv
5639 && memory_operand (equiv, GET_MODE (equiv))
5641 && ! sets_cc0_p (PATTERN (insn))
5643 && ! (icode != CODE_FOR_nothing
5644 && ((*insn_data[icode].operand[0].predicate)
5646 && ((*insn_data[icode].operand[1].predicate)
5649 /* We use the original pseudo for loc, so that
5650 emit_reload_insns() knows which pseudo this
5651 reload refers to and updates the pseudo rtx, not
5652 its equivalent memory location, as well as the
5653 corresponding entry in reg_last_reload_reg. */
5654 loc = &XEXP (x_orig, 0);
5657 = push_reload (x, x, loc, loc,
5659 GET_MODE (x), GET_MODE (x), 0, 0,
5660 opnum, RELOAD_OTHER);
5665 = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5667 GET_MODE (x), GET_MODE (x), 0, 0,
5670 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5675 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5681 else if (MEM_P (XEXP (x, 0)))
5683 /* This is probably the result of a substitution, by eliminate_regs,
5684 of an equivalent address for a pseudo that was not allocated to a
5685 hard register. Verify that the specified address is valid and
5686 reload it into a register. */
5687 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5688 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5692 /* Since we know we are going to reload this item, don't decrement
5693 for the indirection level.
5695 Note that this is actually conservative: it would be slightly
5696 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5698 /* We can't use ADDR_TYPE (type) here, because we need to
5699 write back the value after reading it, hence we actually
5700 need two registers. */
5701 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5702 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5703 opnum, type, ind_levels, insn);
5705 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5707 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5709 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5711 link = FIND_REG_INC_NOTE (this_insn, tem);
5713 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5722 /* Look for parts to reload in the inner expression and reload them
5723 too, in addition to this operation. Reloading all inner parts in
5724 addition to this one shouldn't be necessary, but at this point,
5725 we don't know if we can possibly omit any part that *can* be
5726 reloaded. Targets that are better off reloading just either part
5727 (or perhaps even a different part of an outer expression), should
5728 define LEGITIMIZE_RELOAD_ADDRESS. */
5729 find_reloads_address_1 (GET_MODE (XEXP (x, 0)), XEXP (x, 0),
5730 context, code, SCRATCH, &XEXP (x, 0), opnum,
5731 type, ind_levels, insn);
5732 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5734 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5738 /* This is probably the result of a substitution, by eliminate_regs, of
5739 an equivalent address for a pseudo that was not allocated to a hard
5740 register. Verify that the specified address is valid and reload it
5743 Since we know we are going to reload this item, don't decrement for
5744 the indirection level.
5746 Note that this is actually conservative: it would be slightly more
5747 efficient to use the value of SPILL_INDIRECT_LEVELS from
5750 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5751 opnum, ADDR_TYPE (type), ind_levels, insn);
5752 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5754 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5759 int regno = REGNO (x);
5761 if (reg_equiv_constant[regno] != 0)
5763 find_reloads_address_part (reg_equiv_constant[regno], loc,
5765 GET_MODE (x), opnum, type, ind_levels);
5769 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5770 that feeds this insn. */
5771 if (reg_equiv_mem[regno] != 0)
5773 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5775 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5780 if (reg_equiv_memory_loc[regno]
5781 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5783 rtx tem = make_memloc (x, regno);
5784 if (reg_equiv_address[regno] != 0
5785 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5788 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5789 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5794 if (reg_renumber[regno] >= 0)
5795 regno = reg_renumber[regno];
5797 if (regno >= FIRST_PSEUDO_REGISTER
5798 || !REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5801 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5803 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5807 /* If a register appearing in an address is the subject of a CLOBBER
5808 in this insn, reload it into some other register to be safe.
5809 The CLOBBER is supposed to make the register unavailable
5810 from before this insn to after it. */
5811 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5813 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5815 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5822 if (REG_P (SUBREG_REG (x)))
5824 /* If this is a SUBREG of a hard register and the resulting register
5825 is of the wrong class, reload the whole SUBREG. This avoids
5826 needless copies if SUBREG_REG is multi-word. */
5827 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5829 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5831 if (!REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5834 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5836 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5840 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5841 is larger than the class size, then reload the whole SUBREG. */
5844 enum reg_class class = context_reg_class;
5845 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5846 > reg_class_size[class])
5848 x = find_reloads_subreg_address (x, 0, opnum,
5851 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5852 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5864 const char *fmt = GET_RTX_FORMAT (code);
5867 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5870 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
5872 find_reloads_address_1 (mode, XEXP (x, i), context, code, SCRATCH,
5873 &XEXP (x, i), opnum, type, ind_levels, insn);
5877 #undef REG_OK_FOR_CONTEXT
5881 /* X, which is found at *LOC, is a part of an address that needs to be
5882 reloaded into a register of class CLASS. If X is a constant, or if
5883 X is a PLUS that contains a constant, check that the constant is a
5884 legitimate operand and that we are supposed to be able to load
5885 it into the register.
5887 If not, force the constant into memory and reload the MEM instead.
5889 MODE is the mode to use, in case X is an integer constant.
5891 OPNUM and TYPE describe the purpose of any reloads made.
5893 IND_LEVELS says how many levels of indirect addressing this machine
5897 find_reloads_address_part (rtx x, rtx *loc, enum reg_class class,
5898 enum machine_mode mode, int opnum,
5899 enum reload_type type, int ind_levels)
5902 && (! LEGITIMATE_CONSTANT_P (x)
5903 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5907 tem = x = force_const_mem (mode, x);
5908 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5909 opnum, type, ind_levels, 0);
5912 else if (GET_CODE (x) == PLUS
5913 && CONSTANT_P (XEXP (x, 1))
5914 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5915 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5919 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5920 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5921 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5922 opnum, type, ind_levels, 0);
5925 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5926 mode, VOIDmode, 0, 0, opnum, type);
5929 /* X, a subreg of a pseudo, is a part of an address that needs to be
5932 If the pseudo is equivalent to a memory location that cannot be directly
5933 addressed, make the necessary address reloads.
5935 If address reloads have been necessary, or if the address is changed
5936 by register elimination, return the rtx of the memory location;
5937 otherwise, return X.
5939 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5942 OPNUM and TYPE identify the purpose of the reload.
5944 IND_LEVELS says how many levels of indirect addressing are
5945 supported at this point in the address.
5947 INSN, if nonzero, is the insn in which we do the reload. It is used
5948 to determine where to put USEs for pseudos that we have to replace with
5952 find_reloads_subreg_address (rtx x, int force_replace, int opnum,
5953 enum reload_type type, int ind_levels, rtx insn)
5955 int regno = REGNO (SUBREG_REG (x));
5957 if (reg_equiv_memory_loc[regno])
5959 /* If the address is not directly addressable, or if the address is not
5960 offsettable, then it must be replaced. */
5962 && (reg_equiv_address[regno]
5963 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5966 if (force_replace || num_not_at_initial_offset)
5968 rtx tem = make_memloc (SUBREG_REG (x), regno);
5970 /* If the address changes because of register elimination, then
5971 it must be replaced. */
5973 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5975 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
5976 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5979 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
5980 hold the correct (negative) byte offset. */
5981 if (BYTES_BIG_ENDIAN && outer_size > inner_size)
5982 offset = inner_size - outer_size;
5984 offset = SUBREG_BYTE (x);
5986 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5987 PUT_MODE (tem, GET_MODE (x));
5989 /* If this was a paradoxical subreg that we replaced, the
5990 resulting memory must be sufficiently aligned to allow
5991 us to widen the mode of the memory. */
5992 if (outer_size > inner_size)
5996 base = XEXP (tem, 0);
5997 if (GET_CODE (base) == PLUS)
5999 if (GET_CODE (XEXP (base, 1)) == CONST_INT
6000 && INTVAL (XEXP (base, 1)) % outer_size != 0)
6002 base = XEXP (base, 0);
6005 || (REGNO_POINTER_ALIGN (REGNO (base))
6006 < outer_size * BITS_PER_UNIT))
6010 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
6011 &XEXP (tem, 0), opnum, type,
6014 /* If this is not a toplevel operand, find_reloads doesn't see
6015 this substitution. We have to emit a USE of the pseudo so
6016 that delete_output_reload can see it. */
6017 if (replace_reloads && recog_data.operand[opnum] != x)
6018 /* We mark the USE with QImode so that we recognize it
6019 as one that can be safely deleted at the end of
6021 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
6031 /* Substitute into the current INSN the registers into which we have reloaded
6032 the things that need reloading. The array `replacements'
6033 contains the locations of all pointers that must be changed
6034 and says what to replace them with.
6036 Return the rtx that X translates into; usually X, but modified. */
6039 subst_reloads (rtx insn)
6043 for (i = 0; i < n_replacements; i++)
6045 struct replacement *r = &replacements[i];
6046 rtx reloadreg = rld[r->what].reg_rtx;
6049 #ifdef ENABLE_CHECKING
6050 /* Internal consistency test. Check that we don't modify
6051 anything in the equivalence arrays. Whenever something from
6052 those arrays needs to be reloaded, it must be unshared before
6053 being substituted into; the equivalence must not be modified.
6054 Otherwise, if the equivalence is used after that, it will
6055 have been modified, and the thing substituted (probably a
6056 register) is likely overwritten and not a usable equivalence. */
6059 for (check_regno = 0; check_regno < max_regno; check_regno++)
6061 #define CHECK_MODF(ARRAY) \
6062 gcc_assert (!ARRAY[check_regno] \
6063 || !loc_mentioned_in_p (r->where, \
6064 ARRAY[check_regno]))
6066 CHECK_MODF (reg_equiv_constant);
6067 CHECK_MODF (reg_equiv_memory_loc);
6068 CHECK_MODF (reg_equiv_address);
6069 CHECK_MODF (reg_equiv_mem);
6072 #endif /* ENABLE_CHECKING */
6074 /* If we're replacing a LABEL_REF with a register, add a
6075 REG_LABEL note to indicate to flow which label this
6076 register refers to. */
6077 if (GET_CODE (*r->where) == LABEL_REF
6080 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
6081 XEXP (*r->where, 0),
6083 JUMP_LABEL (insn) = XEXP (*r->where, 0);
6086 /* Encapsulate RELOADREG so its machine mode matches what
6087 used to be there. Note that gen_lowpart_common will
6088 do the wrong thing if RELOADREG is multi-word. RELOADREG
6089 will always be a REG here. */
6090 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
6091 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6093 /* If we are putting this into a SUBREG and RELOADREG is a
6094 SUBREG, we would be making nested SUBREGs, so we have to fix
6095 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
6097 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
6099 if (GET_MODE (*r->subreg_loc)
6100 == GET_MODE (SUBREG_REG (reloadreg)))
6101 *r->subreg_loc = SUBREG_REG (reloadreg);
6105 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
6107 /* When working with SUBREGs the rule is that the byte
6108 offset must be a multiple of the SUBREG's mode. */
6109 final_offset = (final_offset /
6110 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6111 final_offset = (final_offset *
6112 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6114 *r->where = SUBREG_REG (reloadreg);
6115 SUBREG_BYTE (*r->subreg_loc) = final_offset;
6119 *r->where = reloadreg;
6121 /* If reload got no reg and isn't optional, something's wrong. */
6123 gcc_assert (rld[r->what].optional);
6127 /* Make a copy of any replacements being done into X and move those
6128 copies to locations in Y, a copy of X. */
6131 copy_replacements (rtx x, rtx y)
6133 /* We can't support X being a SUBREG because we might then need to know its
6134 location if something inside it was replaced. */
6135 gcc_assert (GET_CODE (x) != SUBREG);
6137 copy_replacements_1 (&x, &y, n_replacements);
6141 copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6145 struct replacement *r;
6149 for (j = 0; j < orig_replacements; j++)
6151 if (replacements[j].subreg_loc == px)
6153 r = &replacements[n_replacements++];
6154 r->where = replacements[j].where;
6156 r->what = replacements[j].what;
6157 r->mode = replacements[j].mode;
6159 else if (replacements[j].where == px)
6161 r = &replacements[n_replacements++];
6164 r->what = replacements[j].what;
6165 r->mode = replacements[j].mode;
6171 code = GET_CODE (x);
6172 fmt = GET_RTX_FORMAT (code);
6174 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6177 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6178 else if (fmt[i] == 'E')
6179 for (j = XVECLEN (x, i); --j >= 0; )
6180 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6185 /* Change any replacements being done to *X to be done to *Y. */
6188 move_replacements (rtx *x, rtx *y)
6192 for (i = 0; i < n_replacements; i++)
6193 if (replacements[i].subreg_loc == x)
6194 replacements[i].subreg_loc = y;
6195 else if (replacements[i].where == x)
6197 replacements[i].where = y;
6198 replacements[i].subreg_loc = 0;
6202 /* If LOC was scheduled to be replaced by something, return the replacement.
6203 Otherwise, return *LOC. */
6206 find_replacement (rtx *loc)
6208 struct replacement *r;
6210 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6212 rtx reloadreg = rld[r->what].reg_rtx;
6214 if (reloadreg && r->where == loc)
6216 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6217 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6221 else if (reloadreg && r->subreg_loc == loc)
6223 /* RELOADREG must be either a REG or a SUBREG.
6225 ??? Is it actually still ever a SUBREG? If so, why? */
6227 if (REG_P (reloadreg))
6228 return gen_rtx_REG (GET_MODE (*loc),
6229 (REGNO (reloadreg) +
6230 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6231 GET_MODE (SUBREG_REG (*loc)),
6234 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6238 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6240 /* When working with SUBREGs the rule is that the byte
6241 offset must be a multiple of the SUBREG's mode. */
6242 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6243 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6244 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6250 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6251 what's inside and make a new rtl if so. */
6252 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6253 || GET_CODE (*loc) == MULT)
6255 rtx x = find_replacement (&XEXP (*loc, 0));
6256 rtx y = find_replacement (&XEXP (*loc, 1));
6258 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6259 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6265 /* Return nonzero if register in range [REGNO, ENDREGNO)
6266 appears either explicitly or implicitly in X
6267 other than being stored into (except for earlyclobber operands).
6269 References contained within the substructure at LOC do not count.
6270 LOC may be zero, meaning don't ignore anything.
6272 This is similar to refers_to_regno_p in rtlanal.c except that we
6273 look at equivalences for pseudos that didn't get hard registers. */
6276 refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6288 code = GET_CODE (x);
6295 /* If this is a pseudo, a hard register must not have been allocated.
6296 X must therefore either be a constant or be in memory. */
6297 if (r >= FIRST_PSEUDO_REGISTER)
6299 if (reg_equiv_memory_loc[r])
6300 return refers_to_regno_for_reload_p (regno, endregno,
6301 reg_equiv_memory_loc[r],
6304 gcc_assert (reg_equiv_constant[r] || reg_equiv_invariant[r]);
6308 return (endregno > r
6309 && regno < r + (r < FIRST_PSEUDO_REGISTER
6310 ? hard_regno_nregs[r][GET_MODE (x)]
6314 /* If this is a SUBREG of a hard reg, we can see exactly which
6315 registers are being modified. Otherwise, handle normally. */
6316 if (REG_P (SUBREG_REG (x))
6317 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6319 unsigned int inner_regno = subreg_regno (x);
6320 unsigned int inner_endregno
6321 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6322 ? hard_regno_nregs[inner_regno][GET_MODE (x)] : 1);
6324 return endregno > inner_regno && regno < inner_endregno;
6330 if (&SET_DEST (x) != loc
6331 /* Note setting a SUBREG counts as referring to the REG it is in for
6332 a pseudo but not for hard registers since we can
6333 treat each word individually. */
6334 && ((GET_CODE (SET_DEST (x)) == SUBREG
6335 && loc != &SUBREG_REG (SET_DEST (x))
6336 && REG_P (SUBREG_REG (SET_DEST (x)))
6337 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6338 && refers_to_regno_for_reload_p (regno, endregno,
6339 SUBREG_REG (SET_DEST (x)),
6341 /* If the output is an earlyclobber operand, this is
6343 || ((!REG_P (SET_DEST (x))
6344 || earlyclobber_operand_p (SET_DEST (x)))
6345 && refers_to_regno_for_reload_p (regno, endregno,
6346 SET_DEST (x), loc))))
6349 if (code == CLOBBER || loc == &SET_SRC (x))
6358 /* X does not match, so try its subexpressions. */
6360 fmt = GET_RTX_FORMAT (code);
6361 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6363 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6371 if (refers_to_regno_for_reload_p (regno, endregno,
6375 else if (fmt[i] == 'E')
6378 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6379 if (loc != &XVECEXP (x, i, j)
6380 && refers_to_regno_for_reload_p (regno, endregno,
6381 XVECEXP (x, i, j), loc))
6388 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6389 we check if any register number in X conflicts with the relevant register
6390 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6391 contains a MEM (we don't bother checking for memory addresses that can't
6392 conflict because we expect this to be a rare case.
6394 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6395 that we look at equivalences for pseudos that didn't get hard registers. */
6398 reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6400 int regno, endregno;
6402 /* Overly conservative. */
6403 if (GET_CODE (x) == STRICT_LOW_PART
6404 || GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
6407 /* If either argument is a constant, then modifying X can not affect IN. */
6408 if (CONSTANT_P (x) || CONSTANT_P (in))
6410 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == MEM)
6411 return refers_to_mem_for_reload_p (in);
6412 else if (GET_CODE (x) == SUBREG)
6414 regno = REGNO (SUBREG_REG (x));
6415 if (regno < FIRST_PSEUDO_REGISTER)
6416 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6417 GET_MODE (SUBREG_REG (x)),
6425 /* If this is a pseudo, it must not have been assigned a hard register.
6426 Therefore, it must either be in memory or be a constant. */
6428 if (regno >= FIRST_PSEUDO_REGISTER)
6430 if (reg_equiv_memory_loc[regno])
6431 return refers_to_mem_for_reload_p (in);
6432 gcc_assert (reg_equiv_constant[regno]);
6437 return refers_to_mem_for_reload_p (in);
6438 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6439 || GET_CODE (x) == CC0)
6440 return reg_mentioned_p (x, in);
6443 gcc_assert (GET_CODE (x) == PLUS);
6445 /* We actually want to know if X is mentioned somewhere inside IN.
6446 We must not say that (plus (sp) (const_int 124)) is in
6447 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6448 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6449 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6454 else if (GET_CODE (in) == PLUS)
6455 return (reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6456 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6457 else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6458 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6461 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6462 ? hard_regno_nregs[regno][GET_MODE (x)] : 1);
6464 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6467 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6471 refers_to_mem_for_reload_p (rtx x)
6480 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6481 && reg_equiv_memory_loc[REGNO (x)]);
6483 fmt = GET_RTX_FORMAT (GET_CODE (x));
6484 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6486 && (MEM_P (XEXP (x, i))
6487 || refers_to_mem_for_reload_p (XEXP (x, i))))
6493 /* Check the insns before INSN to see if there is a suitable register
6494 containing the same value as GOAL.
6495 If OTHER is -1, look for a register in class CLASS.
6496 Otherwise, just see if register number OTHER shares GOAL's value.
6498 Return an rtx for the register found, or zero if none is found.
6500 If RELOAD_REG_P is (short *)1,
6501 we reject any hard reg that appears in reload_reg_rtx
6502 because such a hard reg is also needed coming into this insn.
6504 If RELOAD_REG_P is any other nonzero value,
6505 it is a vector indexed by hard reg number
6506 and we reject any hard reg whose element in the vector is nonnegative
6507 as well as any that appears in reload_reg_rtx.
6509 If GOAL is zero, then GOALREG is a register number; we look
6510 for an equivalent for that register.
6512 MODE is the machine mode of the value we want an equivalence for.
6513 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6515 This function is used by jump.c as well as in the reload pass.
6517 If GOAL is the sum of the stack pointer and a constant, we treat it
6518 as if it were a constant except that sp is required to be unchanging. */
6521 find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other,
6522 short *reload_reg_p, int goalreg, enum machine_mode mode)
6525 rtx goaltry, valtry, value, where;
6531 int goal_mem_addr_varies = 0;
6532 int need_stable_sp = 0;
6539 else if (REG_P (goal))
6540 regno = REGNO (goal);
6541 else if (MEM_P (goal))
6543 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6544 if (MEM_VOLATILE_P (goal))
6546 if (flag_float_store && SCALAR_FLOAT_MODE_P (GET_MODE (goal)))
6548 /* An address with side effects must be reexecuted. */
6563 else if (CONSTANT_P (goal))
6565 else if (GET_CODE (goal) == PLUS
6566 && XEXP (goal, 0) == stack_pointer_rtx
6567 && CONSTANT_P (XEXP (goal, 1)))
6568 goal_const = need_stable_sp = 1;
6569 else if (GET_CODE (goal) == PLUS
6570 && XEXP (goal, 0) == frame_pointer_rtx
6571 && CONSTANT_P (XEXP (goal, 1)))
6577 /* Scan insns back from INSN, looking for one that copies
6578 a value into or out of GOAL.
6579 Stop and give up if we reach a label. */
6585 if (p == 0 || LABEL_P (p)
6586 || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6589 if (NONJUMP_INSN_P (p)
6590 /* If we don't want spill regs ... */
6591 && (! (reload_reg_p != 0
6592 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6593 /* ... then ignore insns introduced by reload; they aren't
6594 useful and can cause results in reload_as_needed to be
6595 different from what they were when calculating the need for
6596 spills. If we notice an input-reload insn here, we will
6597 reject it below, but it might hide a usable equivalent.
6598 That makes bad code. It may even fail: perhaps no reg was
6599 spilled for this insn because it was assumed we would find
6601 || INSN_UID (p) < reload_first_uid))
6604 pat = single_set (p);
6606 /* First check for something that sets some reg equal to GOAL. */
6609 && true_regnum (SET_SRC (pat)) == regno
6610 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6613 && true_regnum (SET_DEST (pat)) == regno
6614 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6616 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6617 /* When looking for stack pointer + const,
6618 make sure we don't use a stack adjust. */
6619 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6620 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6622 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6623 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6625 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6626 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6627 /* If we are looking for a constant,
6628 and something equivalent to that constant was copied
6629 into a reg, we can use that reg. */
6630 || (goal_const && REG_NOTES (p) != 0
6631 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6632 && ((rtx_equal_p (XEXP (tem, 0), goal)
6634 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6635 || (REG_P (SET_DEST (pat))
6636 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6637 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6638 && GET_CODE (goal) == CONST_INT
6640 = operand_subword (XEXP (tem, 0), 0, 0,
6642 && rtx_equal_p (goal, goaltry)
6644 = operand_subword (SET_DEST (pat), 0, 0,
6646 && (valueno = true_regnum (valtry)) >= 0)))
6647 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6649 && REG_P (SET_DEST (pat))
6650 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6651 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6652 && GET_CODE (goal) == CONST_INT
6653 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6655 && rtx_equal_p (goal, goaltry)
6657 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6658 && (valueno = true_regnum (valtry)) >= 0)))
6662 if (valueno != other)
6665 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6671 for (i = hard_regno_nregs[valueno][mode] - 1; i >= 0; i--)
6672 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6685 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6686 (or copying VALUE into GOAL, if GOAL is also a register).
6687 Now verify that VALUE is really valid. */
6689 /* VALUENO is the register number of VALUE; a hard register. */
6691 /* Don't try to re-use something that is killed in this insn. We want
6692 to be able to trust REG_UNUSED notes. */
6693 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6696 /* If we propose to get the value from the stack pointer or if GOAL is
6697 a MEM based on the stack pointer, we need a stable SP. */
6698 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6699 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6703 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6704 if (GET_MODE (value) != mode)
6707 /* Reject VALUE if it was loaded from GOAL
6708 and is also a register that appears in the address of GOAL. */
6710 if (goal_mem && value == SET_DEST (single_set (where))
6711 && refers_to_regno_for_reload_p (valueno,
6713 + hard_regno_nregs[valueno][mode]),
6717 /* Reject registers that overlap GOAL. */
6719 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6720 nregs = hard_regno_nregs[regno][mode];
6723 valuenregs = hard_regno_nregs[valueno][mode];
6725 if (!goal_mem && !goal_const
6726 && regno + nregs > valueno && regno < valueno + valuenregs)
6729 /* Reject VALUE if it is one of the regs reserved for reloads.
6730 Reload1 knows how to reuse them anyway, and it would get
6731 confused if we allocated one without its knowledge.
6732 (Now that insns introduced by reload are ignored above,
6733 this case shouldn't happen, but I'm not positive.) */
6735 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6738 for (i = 0; i < valuenregs; ++i)
6739 if (reload_reg_p[valueno + i] >= 0)
6743 /* Reject VALUE if it is a register being used for an input reload
6744 even if it is not one of those reserved. */
6746 if (reload_reg_p != 0)
6749 for (i = 0; i < n_reloads; i++)
6750 if (rld[i].reg_rtx != 0 && rld[i].in)
6752 int regno1 = REGNO (rld[i].reg_rtx);
6753 int nregs1 = hard_regno_nregs[regno1]
6754 [GET_MODE (rld[i].reg_rtx)];
6755 if (regno1 < valueno + valuenregs
6756 && regno1 + nregs1 > valueno)
6762 /* We must treat frame pointer as varying here,
6763 since it can vary--in a nonlocal goto as generated by expand_goto. */
6764 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6766 /* Now verify that the values of GOAL and VALUE remain unaltered
6767 until INSN is reached. */
6776 /* Don't trust the conversion past a function call
6777 if either of the two is in a call-clobbered register, or memory. */
6782 if (goal_mem || need_stable_sp)
6785 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6786 for (i = 0; i < nregs; ++i)
6787 if (call_used_regs[regno + i]
6788 || HARD_REGNO_CALL_PART_CLOBBERED (regno + i, mode))
6791 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6792 for (i = 0; i < valuenregs; ++i)
6793 if (call_used_regs[valueno + i]
6794 || HARD_REGNO_CALL_PART_CLOBBERED (valueno + i, mode))
6802 /* Watch out for unspec_volatile, and volatile asms. */
6803 if (volatile_insn_p (pat))
6806 /* If this insn P stores in either GOAL or VALUE, return 0.
6807 If GOAL is a memory ref and this insn writes memory, return 0.
6808 If GOAL is a memory ref and its address is not constant,
6809 and this insn P changes a register used in GOAL, return 0. */
6811 if (GET_CODE (pat) == COND_EXEC)
6812 pat = COND_EXEC_CODE (pat);
6813 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6815 rtx dest = SET_DEST (pat);
6816 while (GET_CODE (dest) == SUBREG
6817 || GET_CODE (dest) == ZERO_EXTRACT
6818 || GET_CODE (dest) == STRICT_LOW_PART)
6819 dest = XEXP (dest, 0);
6822 int xregno = REGNO (dest);
6824 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6825 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6828 if (xregno < regno + nregs && xregno + xnregs > regno)
6830 if (xregno < valueno + valuenregs
6831 && xregno + xnregs > valueno)
6833 if (goal_mem_addr_varies
6834 && reg_overlap_mentioned_for_reload_p (dest, goal))
6836 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6839 else if (goal_mem && MEM_P (dest)
6840 && ! push_operand (dest, GET_MODE (dest)))
6842 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6843 && reg_equiv_memory_loc[regno] != 0)
6845 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6848 else if (GET_CODE (pat) == PARALLEL)
6851 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6853 rtx v1 = XVECEXP (pat, 0, i);
6854 if (GET_CODE (v1) == COND_EXEC)
6855 v1 = COND_EXEC_CODE (v1);
6856 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6858 rtx dest = SET_DEST (v1);
6859 while (GET_CODE (dest) == SUBREG
6860 || GET_CODE (dest) == ZERO_EXTRACT
6861 || GET_CODE (dest) == STRICT_LOW_PART)
6862 dest = XEXP (dest, 0);
6865 int xregno = REGNO (dest);
6867 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6868 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6871 if (xregno < regno + nregs
6872 && xregno + xnregs > regno)
6874 if (xregno < valueno + valuenregs
6875 && xregno + xnregs > valueno)
6877 if (goal_mem_addr_varies
6878 && reg_overlap_mentioned_for_reload_p (dest,
6881 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6884 else if (goal_mem && MEM_P (dest)
6885 && ! push_operand (dest, GET_MODE (dest)))
6887 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6888 && reg_equiv_memory_loc[regno] != 0)
6890 else if (need_stable_sp
6891 && push_operand (dest, GET_MODE (dest)))
6897 if (CALL_P (p) && CALL_INSN_FUNCTION_USAGE (p))
6901 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6902 link = XEXP (link, 1))
6904 pat = XEXP (link, 0);
6905 if (GET_CODE (pat) == CLOBBER)
6907 rtx dest = SET_DEST (pat);
6911 int xregno = REGNO (dest);
6913 = hard_regno_nregs[xregno][GET_MODE (dest)];
6915 if (xregno < regno + nregs
6916 && xregno + xnregs > regno)
6918 else if (xregno < valueno + valuenregs
6919 && xregno + xnregs > valueno)
6921 else if (goal_mem_addr_varies
6922 && reg_overlap_mentioned_for_reload_p (dest,
6927 else if (goal_mem && MEM_P (dest)
6928 && ! push_operand (dest, GET_MODE (dest)))
6930 else if (need_stable_sp
6931 && push_operand (dest, GET_MODE (dest)))
6938 /* If this insn auto-increments or auto-decrements
6939 either regno or valueno, return 0 now.
6940 If GOAL is a memory ref and its address is not constant,
6941 and this insn P increments a register used in GOAL, return 0. */
6945 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6946 if (REG_NOTE_KIND (link) == REG_INC
6947 && REG_P (XEXP (link, 0)))
6949 int incno = REGNO (XEXP (link, 0));
6950 if (incno < regno + nregs && incno >= regno)
6952 if (incno < valueno + valuenregs && incno >= valueno)
6954 if (goal_mem_addr_varies
6955 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6965 /* Find a place where INCED appears in an increment or decrement operator
6966 within X, and return the amount INCED is incremented or decremented by.
6967 The value is always positive. */
6970 find_inc_amount (rtx x, rtx inced)
6972 enum rtx_code code = GET_CODE (x);
6978 rtx addr = XEXP (x, 0);
6979 if ((GET_CODE (addr) == PRE_DEC
6980 || GET_CODE (addr) == POST_DEC
6981 || GET_CODE (addr) == PRE_INC
6982 || GET_CODE (addr) == POST_INC)
6983 && XEXP (addr, 0) == inced)
6984 return GET_MODE_SIZE (GET_MODE (x));
6985 else if ((GET_CODE (addr) == PRE_MODIFY
6986 || GET_CODE (addr) == POST_MODIFY)
6987 && GET_CODE (XEXP (addr, 1)) == PLUS
6988 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
6989 && XEXP (addr, 0) == inced
6990 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
6992 i = INTVAL (XEXP (XEXP (addr, 1), 1));
6993 return i < 0 ? -i : i;
6997 fmt = GET_RTX_FORMAT (code);
6998 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7002 int tem = find_inc_amount (XEXP (x, i), inced);
7009 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7011 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
7021 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7022 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7026 reg_inc_found_and_valid_p (unsigned int regno, unsigned int endregno,
7033 if (! INSN_P (insn))
7036 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
7037 if (REG_NOTE_KIND (link) == REG_INC)
7039 unsigned int test = (int) REGNO (XEXP (link, 0));
7040 if (test >= regno && test < endregno)
7047 #define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7051 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7052 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7053 REG_INC. REGNO must refer to a hard register. */
7056 regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
7059 unsigned int nregs, endregno;
7061 /* regno must be a hard register. */
7062 gcc_assert (regno < FIRST_PSEUDO_REGISTER);
7064 nregs = hard_regno_nregs[regno][mode];
7065 endregno = regno + nregs;
7067 if ((GET_CODE (PATTERN (insn)) == CLOBBER
7068 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7069 && REG_P (XEXP (PATTERN (insn), 0)))
7071 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
7073 return test >= regno && test < endregno;
7076 if (sets == 2 && reg_inc_found_and_valid_p (regno, endregno, insn))
7079 if (GET_CODE (PATTERN (insn)) == PARALLEL)
7081 int i = XVECLEN (PATTERN (insn), 0) - 1;
7085 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7086 if ((GET_CODE (elt) == CLOBBER
7087 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7088 && REG_P (XEXP (elt, 0)))
7090 unsigned int test = REGNO (XEXP (elt, 0));
7092 if (test >= regno && test < endregno)
7096 && reg_inc_found_and_valid_p (regno, endregno, elt))
7104 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7106 reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
7110 if (GET_MODE (reloadreg) == mode)
7113 regno = REGNO (reloadreg);
7115 if (WORDS_BIG_ENDIAN)
7116 regno += (int) hard_regno_nregs[regno][GET_MODE (reloadreg)]
7117 - (int) hard_regno_nregs[regno][mode];
7119 return gen_rtx_REG (mode, regno);
7122 static const char *const reload_when_needed_name[] =
7125 "RELOAD_FOR_OUTPUT",
7127 "RELOAD_FOR_INPUT_ADDRESS",
7128 "RELOAD_FOR_INPADDR_ADDRESS",
7129 "RELOAD_FOR_OUTPUT_ADDRESS",
7130 "RELOAD_FOR_OUTADDR_ADDRESS",
7131 "RELOAD_FOR_OPERAND_ADDRESS",
7132 "RELOAD_FOR_OPADDR_ADDR",
7134 "RELOAD_FOR_OTHER_ADDRESS"
7137 /* These functions are used to print the variables set by 'find_reloads' */
7140 debug_reload_to_stream (FILE *f)
7147 for (r = 0; r < n_reloads; r++)
7149 fprintf (f, "Reload %d: ", r);
7153 fprintf (f, "reload_in (%s) = ",
7154 GET_MODE_NAME (rld[r].inmode));
7155 print_inline_rtx (f, rld[r].in, 24);
7156 fprintf (f, "\n\t");
7159 if (rld[r].out != 0)
7161 fprintf (f, "reload_out (%s) = ",
7162 GET_MODE_NAME (rld[r].outmode));
7163 print_inline_rtx (f, rld[r].out, 24);
7164 fprintf (f, "\n\t");
7167 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
7169 fprintf (f, "%s (opnum = %d)",
7170 reload_when_needed_name[(int) rld[r].when_needed],
7173 if (rld[r].optional)
7174 fprintf (f, ", optional");
7176 if (rld[r].nongroup)
7177 fprintf (f, ", nongroup");
7179 if (rld[r].inc != 0)
7180 fprintf (f, ", inc by %d", rld[r].inc);
7182 if (rld[r].nocombine)
7183 fprintf (f, ", can't combine");
7185 if (rld[r].secondary_p)
7186 fprintf (f, ", secondary_reload_p");
7188 if (rld[r].in_reg != 0)
7190 fprintf (f, "\n\treload_in_reg: ");
7191 print_inline_rtx (f, rld[r].in_reg, 24);
7194 if (rld[r].out_reg != 0)
7196 fprintf (f, "\n\treload_out_reg: ");
7197 print_inline_rtx (f, rld[r].out_reg, 24);
7200 if (rld[r].reg_rtx != 0)
7202 fprintf (f, "\n\treload_reg_rtx: ");
7203 print_inline_rtx (f, rld[r].reg_rtx, 24);
7207 if (rld[r].secondary_in_reload != -1)
7209 fprintf (f, "%ssecondary_in_reload = %d",
7210 prefix, rld[r].secondary_in_reload);
7214 if (rld[r].secondary_out_reload != -1)
7215 fprintf (f, "%ssecondary_out_reload = %d\n",
7216 prefix, rld[r].secondary_out_reload);
7219 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7221 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7222 insn_data[rld[r].secondary_in_icode].name);
7226 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7227 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7228 insn_data[rld[r].secondary_out_icode].name);
7237 debug_reload_to_stream (stderr);