1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92-5, 1996 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
93 #include "insn-config.h"
94 #include "insn-codes.h"
98 #include "hard-reg-set.h"
103 #ifndef REGISTER_MOVE_COST
104 #define REGISTER_MOVE_COST(x, y) 2
107 /* The variables set up by `find_reloads' are:
109 n_reloads number of distinct reloads needed; max reload # + 1
110 tables indexed by reload number
111 reload_in rtx for value to reload from
112 reload_out rtx for where to store reload-reg afterward if nec
113 (often the same as reload_in)
114 reload_reg_class enum reg_class, saying what regs to reload into
115 reload_inmode enum machine_mode; mode this operand should have
116 when reloaded, on input.
117 reload_outmode enum machine_mode; mode this operand should have
118 when reloaded, on output.
119 reload_optional char, nonzero for an optional reload.
120 Optional reloads are ignored unless the
121 value is already sitting in a register.
122 reload_inc int, positive amount to increment or decrement by if
123 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
124 Ignored otherwise (don't assume it is zero).
125 reload_in_reg rtx. A reg for which reload_in is the equivalent.
126 If reload_in is a symbol_ref which came from
127 reg_equiv_constant, then this is the pseudo
128 which has that symbol_ref as equivalent.
129 reload_reg_rtx rtx. This is the register to reload into.
130 If it is zero when `find_reloads' returns,
131 you must find a suitable register in the class
132 specified by reload_reg_class, and store here
133 an rtx for that register with mode from
134 reload_inmode or reload_outmode.
135 reload_nocombine char, nonzero if this reload shouldn't be
136 combined with another reload.
137 reload_opnum int, operand number being reloaded. This is
138 used to group related reloads and need not always
139 be equal to the actual operand number in the insn,
140 though it current will be; for in-out operands, it
141 is one of the two operand numbers.
142 reload_when_needed enum, classifies reload as needed either for
143 addressing an input reload, addressing an output,
144 for addressing a non-reloaded mem ref,
145 or for unspecified purposes (i.e., more than one
147 reload_secondary_p int, 1 if this is a secondary register for one
149 reload_secondary_in_reload
150 reload_secondary_out_reload
151 int, gives the reload number of a secondary
152 reload, when needed; otherwise -1
153 reload_secondary_in_icode
154 reload_secondary_out_icode
155 enum insn_code, if a secondary reload is required,
156 gives the INSN_CODE that uses the secondary
157 reload as a scratch register, or CODE_FOR_nothing
158 if the secondary reload register is to be an
159 intermediate register. */
162 rtx reload_in[MAX_RELOADS];
163 rtx reload_out[MAX_RELOADS];
164 enum reg_class reload_reg_class[MAX_RELOADS];
165 enum machine_mode reload_inmode[MAX_RELOADS];
166 enum machine_mode reload_outmode[MAX_RELOADS];
167 rtx reload_reg_rtx[MAX_RELOADS];
168 char reload_optional[MAX_RELOADS];
169 int reload_inc[MAX_RELOADS];
170 rtx reload_in_reg[MAX_RELOADS];
171 char reload_nocombine[MAX_RELOADS];
172 int reload_opnum[MAX_RELOADS];
173 enum reload_type reload_when_needed[MAX_RELOADS];
174 int reload_secondary_p[MAX_RELOADS];
175 int reload_secondary_in_reload[MAX_RELOADS];
176 int reload_secondary_out_reload[MAX_RELOADS];
177 enum insn_code reload_secondary_in_icode[MAX_RELOADS];
178 enum insn_code reload_secondary_out_icode[MAX_RELOADS];
180 /* All the "earlyclobber" operands of the current insn
181 are recorded here. */
183 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
185 int reload_n_operands;
187 /* Replacing reloads.
189 If `replace_reloads' is nonzero, then as each reload is recorded
190 an entry is made for it in the table `replacements'.
191 Then later `subst_reloads' can look through that table and
192 perform all the replacements needed. */
194 /* Nonzero means record the places to replace. */
195 static int replace_reloads;
197 /* Each replacement is recorded with a structure like this. */
200 rtx *where; /* Location to store in */
201 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
202 a SUBREG; 0 otherwise. */
203 int what; /* which reload this is for */
204 enum machine_mode mode; /* mode it must have */
207 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
209 /* Number of replacements currently recorded. */
210 static int n_replacements;
212 /* Used to track what is modified by an operand. */
215 int reg_flag; /* Nonzero if referencing a register. */
216 int safe; /* Nonzero if this can't conflict with anything. */
217 rtx base; /* Base address for MEM. */
218 HOST_WIDE_INT start; /* Starting offset or register number. */
219 HOST_WIDE_INT end; /* Ending offset or register number. */
222 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
223 (see reg_equiv_address). */
224 static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
225 static int n_memlocs;
227 #ifdef SECONDARY_MEMORY_NEEDED
229 /* Save MEMs needed to copy from one class of registers to another. One MEM
230 is used per mode, but normally only one or two modes are ever used.
232 We keep two versions, before and after register elimination. The one
233 after register elimination is record separately for each operand. This
234 is done in case the address is not valid to be sure that we separately
237 static rtx secondary_memlocs[NUM_MACHINE_MODES];
238 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
241 /* The instruction we are doing reloads for;
242 so we can test whether a register dies in it. */
243 static rtx this_insn;
245 /* Nonzero if this instruction is a user-specified asm with operands. */
246 static int this_insn_is_asm;
248 /* If hard_regs_live_known is nonzero,
249 we can tell which hard regs are currently live,
250 at least enough to succeed in choosing dummy reloads. */
251 static int hard_regs_live_known;
253 /* Indexed by hard reg number,
254 element is nonegative if hard reg has been spilled.
255 This vector is passed to `find_reloads' as an argument
256 and is not changed here. */
257 static short *static_reload_reg_p;
259 /* Set to 1 in subst_reg_equivs if it changes anything. */
260 static int subst_reg_equivs_changed;
262 /* On return from push_reload, holds the reload-number for the OUT
263 operand, which can be different for that from the input operand. */
264 static int output_reloadnum;
266 /* Compare two RTX's. */
267 #define MATCHES(x, y) \
268 (x == y || (x != 0 && (GET_CODE (x) == REG \
269 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
270 : rtx_equal_p (x, y) && ! side_effects_p (x))))
272 /* Indicates if two reloads purposes are for similar enough things that we
273 can merge their reloads. */
274 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
275 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
276 || ((when1) == (when2) && (op1) == (op2)) \
277 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
278 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
279 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
280 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
281 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
283 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
284 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
285 ((when1) != (when2) \
286 || ! ((op1) == (op2) \
287 || (when1) == RELOAD_FOR_INPUT \
288 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
289 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
291 static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
292 enum machine_mode, enum reload_type,
294 static enum reg_class find_valid_class PROTO((enum machine_mode, int));
295 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
296 enum machine_mode, enum machine_mode,
297 int, int, int, enum reload_type));
298 static void push_replacement PROTO((rtx *, int, enum machine_mode));
299 static void combine_reloads PROTO((void));
300 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
301 enum machine_mode, enum machine_mode,
302 enum reg_class, int));
303 static int earlyclobber_operand_p PROTO((rtx));
304 static int hard_reg_set_here_p PROTO((int, int, rtx));
305 static struct decomposition decompose PROTO((rtx));
306 static int immune_p PROTO((rtx, rtx, struct decomposition));
307 static int alternative_allows_memconst PROTO((char *, int));
308 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int));
309 static rtx make_memloc PROTO((rtx, int));
310 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
311 int, enum reload_type, int));
312 static rtx subst_reg_equivs PROTO((rtx));
313 static rtx subst_indexed_address PROTO((rtx));
314 static int find_reloads_address_1 PROTO((rtx, int, rtx *, int,
315 enum reload_type,int));
316 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
317 enum machine_mode, int,
318 enum reload_type, int));
319 static int find_inc_amount PROTO((rtx, rtx));
321 #ifdef HAVE_SECONDARY_RELOADS
323 /* Determine if any secondary reloads are needed for loading (if IN_P is
324 non-zero) or storing (if IN_P is zero) X to or from a reload register of
325 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
326 are needed, push them.
328 Return the reload number of the secondary reload we made, or -1 if
329 we didn't need one. *PICODE is set to the insn_code to use if we do
330 need a secondary reload. */
333 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
339 enum reg_class reload_class;
340 enum machine_mode reload_mode;
341 enum reload_type type;
342 enum insn_code *picode;
344 enum reg_class class = NO_REGS;
345 enum machine_mode mode = reload_mode;
346 enum insn_code icode = CODE_FOR_nothing;
347 enum reg_class t_class = NO_REGS;
348 enum machine_mode t_mode = VOIDmode;
349 enum insn_code t_icode = CODE_FOR_nothing;
350 enum reload_type secondary_type;
352 int s_reload, t_reload = -1;
354 if (type == RELOAD_FOR_INPUT_ADDRESS || type == RELOAD_FOR_OUTPUT_ADDRESS)
355 secondary_type = type;
357 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
359 *picode = CODE_FOR_nothing;
361 /* If X is a paradoxical SUBREG, use the inner value to determine both the
362 mode and object being reloaded. */
363 if (GET_CODE (x) == SUBREG
364 && (GET_MODE_SIZE (GET_MODE (x))
365 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
368 reload_mode = GET_MODE (x);
371 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
372 is still a pseudo-register by now, it *must* have an equivalent MEM
373 but we don't want to assume that), use that equivalent when seeing if
374 a secondary reload is needed since whether or not a reload is needed
375 might be sensitive to the form of the MEM. */
377 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
378 && reg_equiv_mem[REGNO (x)] != 0)
379 x = reg_equiv_mem[REGNO (x)];
381 #ifdef SECONDARY_INPUT_RELOAD_CLASS
383 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
386 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
388 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
391 /* If we don't need any secondary registers, done. */
392 if (class == NO_REGS)
395 /* Get a possible insn to use. If the predicate doesn't accept X, don't
398 icode = (in_p ? reload_in_optab[(int) reload_mode]
399 : reload_out_optab[(int) reload_mode]);
401 if (icode != CODE_FOR_nothing
402 && insn_operand_predicate[(int) icode][in_p]
403 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
404 icode = CODE_FOR_nothing;
406 /* If we will be using an insn, see if it can directly handle the reload
407 register we will be using. If it can, the secondary reload is for a
408 scratch register. If it can't, we will use the secondary reload for
409 an intermediate register and require a tertiary reload for the scratch
412 if (icode != CODE_FOR_nothing)
414 /* If IN_P is non-zero, the reload register will be the output in
415 operand 0. If IN_P is zero, the reload register will be the input
416 in operand 1. Outputs should have an initial "=", which we must
419 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
420 enum reg_class insn_class
421 = (insn_letter == 'r' ? GENERAL_REGS
422 : REG_CLASS_FROM_LETTER (insn_letter));
424 if (insn_class == NO_REGS
425 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
426 /* The scratch register's constraint must start with "=&". */
427 || insn_operand_constraint[(int) icode][2][0] != '='
428 || insn_operand_constraint[(int) icode][2][1] != '&')
431 if (reg_class_subset_p (reload_class, insn_class))
432 mode = insn_operand_mode[(int) icode][2];
435 char t_letter = insn_operand_constraint[(int) icode][2][2];
437 t_mode = insn_operand_mode[(int) icode][2];
438 t_class = (t_letter == 'r' ? GENERAL_REGS
439 : REG_CLASS_FROM_LETTER (t_letter));
441 icode = CODE_FOR_nothing;
445 /* This case isn't valid, so fail. Reload is allowed to use the same
446 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
447 in the case of a secondary register, we actually need two different
448 registers for correct code. We fail here to prevent the possibility of
449 silently generating incorrect code later.
451 The convention is that secondary input reloads are valid only if the
452 secondary_class is different from class. If you have such a case, you
453 can not use secondary reloads, you must work around the problem some
456 Allow this when MODE is not reload_mode and assume that the generated
457 code handles this case (it does on the Alpha, which is the only place
458 this currently happens). */
460 if (in_p && class == reload_class && mode == reload_mode)
463 /* If we need a tertiary reload, see if we have one we can reuse or else
466 if (t_class != NO_REGS)
468 for (t_reload = 0; t_reload < n_reloads; t_reload++)
469 if (reload_secondary_p[t_reload]
470 && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
471 || reg_class_subset_p (reload_reg_class[t_reload], t_class))
472 && ((in_p && reload_inmode[t_reload] == t_mode)
473 || (! in_p && reload_outmode[t_reload] == t_mode))
474 && ((in_p && (reload_secondary_in_icode[t_reload]
475 == CODE_FOR_nothing))
476 || (! in_p &&(reload_secondary_out_icode[t_reload]
477 == CODE_FOR_nothing)))
478 && (reg_class_size[(int) t_class] == 1
479 #ifdef SMALL_REGISTER_CLASSES
483 && MERGABLE_RELOADS (secondary_type,
484 reload_when_needed[t_reload],
485 opnum, reload_opnum[t_reload]))
488 reload_inmode[t_reload] = t_mode;
490 reload_outmode[t_reload] = t_mode;
492 if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
493 reload_reg_class[t_reload] = t_class;
495 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
496 reload_optional[t_reload] &= optional;
497 reload_secondary_p[t_reload] = 1;
498 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
499 opnum, reload_opnum[t_reload]))
500 reload_when_needed[t_reload] = RELOAD_OTHER;
503 if (t_reload == n_reloads)
505 /* We need to make a new tertiary reload for this register class. */
506 reload_in[t_reload] = reload_out[t_reload] = 0;
507 reload_reg_class[t_reload] = t_class;
508 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
509 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
510 reload_reg_rtx[t_reload] = 0;
511 reload_optional[t_reload] = optional;
512 reload_inc[t_reload] = 0;
513 /* Maybe we could combine these, but it seems too tricky. */
514 reload_nocombine[t_reload] = 1;
515 reload_in_reg[t_reload] = 0;
516 reload_opnum[t_reload] = opnum;
517 reload_when_needed[t_reload] = secondary_type;
518 reload_secondary_in_reload[t_reload] = -1;
519 reload_secondary_out_reload[t_reload] = -1;
520 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
521 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
522 reload_secondary_p[t_reload] = 1;
528 /* See if we can reuse an existing secondary reload. */
529 for (s_reload = 0; s_reload < n_reloads; s_reload++)
530 if (reload_secondary_p[s_reload]
531 && (reg_class_subset_p (class, reload_reg_class[s_reload])
532 || reg_class_subset_p (reload_reg_class[s_reload], class))
533 && ((in_p && reload_inmode[s_reload] == mode)
534 || (! in_p && reload_outmode[s_reload] == mode))
535 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
536 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
537 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
538 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
539 && (reg_class_size[(int) class] == 1
540 #ifdef SMALL_REGISTER_CLASSES
544 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
545 opnum, reload_opnum[s_reload]))
548 reload_inmode[s_reload] = mode;
550 reload_outmode[s_reload] = mode;
552 if (reg_class_subset_p (class, reload_reg_class[s_reload]))
553 reload_reg_class[s_reload] = class;
555 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
556 reload_optional[s_reload] &= optional;
557 reload_secondary_p[s_reload] = 1;
558 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
559 opnum, reload_opnum[s_reload]))
560 reload_when_needed[s_reload] = RELOAD_OTHER;
563 if (s_reload == n_reloads)
565 /* We need to make a new secondary reload for this register class. */
566 reload_in[s_reload] = reload_out[s_reload] = 0;
567 reload_reg_class[s_reload] = class;
569 reload_inmode[s_reload] = in_p ? mode : VOIDmode;
570 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
571 reload_reg_rtx[s_reload] = 0;
572 reload_optional[s_reload] = optional;
573 reload_inc[s_reload] = 0;
574 /* Maybe we could combine these, but it seems too tricky. */
575 reload_nocombine[s_reload] = 1;
576 reload_in_reg[s_reload] = 0;
577 reload_opnum[s_reload] = opnum;
578 reload_when_needed[s_reload] = secondary_type;
579 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
580 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
581 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
582 reload_secondary_out_icode[s_reload]
583 = ! in_p ? t_icode : CODE_FOR_nothing;
584 reload_secondary_p[s_reload] = 1;
588 #ifdef SECONDARY_MEMORY_NEEDED
589 /* If we need a memory location to copy between the two reload regs,
592 if (in_p && icode == CODE_FOR_nothing
593 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
594 get_secondary_mem (x, mode, opnum, type);
596 if (! in_p && icode == CODE_FOR_nothing
597 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
598 get_secondary_mem (x, mode, opnum, type);
605 #endif /* HAVE_SECONDARY_RELOADS */
607 #ifdef SECONDARY_MEMORY_NEEDED
609 /* Return a memory location that will be used to copy X in mode MODE.
610 If we haven't already made a location for this mode in this insn,
611 call find_reloads_address on the location being returned. */
614 get_secondary_mem (x, mode, opnum, type)
616 enum machine_mode mode;
618 enum reload_type type;
623 /* By default, if MODE is narrower than a word, widen it to a word.
624 This is required because most machines that require these memory
625 locations do not support short load and stores from all registers
626 (e.g., FP registers). */
628 #ifdef SECONDARY_MEMORY_NEEDED_MODE
629 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
631 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
632 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
635 /* If we already have made a MEM for this operand in MODE, return it. */
636 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
637 return secondary_memlocs_elim[(int) mode][opnum];
639 /* If this is the first time we've tried to get a MEM for this mode,
640 allocate a new one. `something_changed' in reload will get set
641 by noticing that the frame size has changed. */
643 if (secondary_memlocs[(int) mode] == 0)
645 #ifdef SECONDARY_MEMORY_NEEDED_RTX
646 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
648 secondary_memlocs[(int) mode]
649 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
653 /* Get a version of the address doing any eliminations needed. If that
654 didn't give us a new MEM, make a new one if it isn't valid. */
656 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
657 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
659 if (! mem_valid && loc == secondary_memlocs[(int) mode])
660 loc = copy_rtx (loc);
662 /* The only time the call below will do anything is if the stack
663 offset is too large. In that case IND_LEVELS doesn't matter, so we
664 can just pass a zero. Adjust the type to be the address of the
665 corresponding object. If the address was valid, save the eliminated
666 address. If it wasn't valid, we need to make a reload each time, so
671 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
672 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
675 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
679 secondary_memlocs_elim[(int) mode][opnum] = loc;
683 /* Clear any secondary memory locations we've made. */
686 clear_secondary_mem ()
688 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
690 #endif /* SECONDARY_MEMORY_NEEDED */
692 /* Find the largest class for which every register number plus N is valid in
693 M1 (if in range). Abort if no such class exists. */
695 static enum reg_class
696 find_valid_class (m1, n)
697 enum machine_mode m1;
702 enum reg_class best_class;
705 for (class = 1; class < N_REG_CLASSES; class++)
708 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
709 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
710 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
711 && ! HARD_REGNO_MODE_OK (regno + n, m1))
714 if (! bad && reg_class_size[class] > best_size)
715 best_class = class, best_size = reg_class_size[class];
724 /* Record one reload that needs to be performed.
725 IN is an rtx saying where the data are to be found before this instruction.
726 OUT says where they must be stored after the instruction.
727 (IN is zero for data not read, and OUT is zero for data not written.)
728 INLOC and OUTLOC point to the places in the instructions where
729 IN and OUT were found.
730 If IN and OUT are both non-zero, it means the same register must be used
731 to reload both IN and OUT.
733 CLASS is a register class required for the reloaded data.
734 INMODE is the machine mode that the instruction requires
735 for the reg that replaces IN and OUTMODE is likewise for OUT.
737 If IN is zero, then OUT's location and mode should be passed as
740 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
742 OPTIONAL nonzero means this reload does not need to be performed:
743 it can be discarded if that is more convenient.
745 OPNUM and TYPE say what the purpose of this reload is.
747 The return value is the reload-number for this reload.
749 If both IN and OUT are nonzero, in some rare cases we might
750 want to make two separate reloads. (Actually we never do this now.)
751 Therefore, the reload-number for OUT is stored in
752 output_reloadnum when we return; the return value applies to IN.
753 Usually (presently always), when IN and OUT are nonzero,
754 the two reload-numbers are equal, but the caller should be careful to
758 push_reload (in, out, inloc, outloc, class,
759 inmode, outmode, strict_low, optional, opnum, type)
760 register rtx in, out;
762 enum reg_class class;
763 enum machine_mode inmode, outmode;
767 enum reload_type type;
771 int dont_remove_subreg = 0;
772 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
773 int secondary_in_reload = -1, secondary_out_reload = -1;
774 enum insn_code secondary_in_icode = CODE_FOR_nothing;
775 enum insn_code secondary_out_icode = CODE_FOR_nothing;
777 /* INMODE and/or OUTMODE could be VOIDmode if no mode
778 has been specified for the operand. In that case,
779 use the operand's mode as the mode to reload. */
780 if (inmode == VOIDmode && in != 0)
781 inmode = GET_MODE (in);
782 if (outmode == VOIDmode && out != 0)
783 outmode = GET_MODE (out);
785 /* If IN is a pseudo register everywhere-equivalent to a constant, and
786 it is not in a hard register, reload straight from the constant,
787 since we want to get rid of such pseudo registers.
788 Often this is done earlier, but not always in find_reloads_address. */
789 if (in != 0 && GET_CODE (in) == REG)
791 register int regno = REGNO (in);
793 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
794 && reg_equiv_constant[regno] != 0)
795 in = reg_equiv_constant[regno];
798 /* Likewise for OUT. Of course, OUT will never be equivalent to
799 an actual constant, but it might be equivalent to a memory location
800 (in the case of a parameter). */
801 if (out != 0 && GET_CODE (out) == REG)
803 register int regno = REGNO (out);
805 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
806 && reg_equiv_constant[regno] != 0)
807 out = reg_equiv_constant[regno];
810 /* If we have a read-write operand with an address side-effect,
811 change either IN or OUT so the side-effect happens only once. */
812 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
814 if (GET_CODE (XEXP (in, 0)) == POST_INC
815 || GET_CODE (XEXP (in, 0)) == POST_DEC)
816 in = gen_rtx (MEM, GET_MODE (in), XEXP (XEXP (in, 0), 0));
817 if (GET_CODE (XEXP (in, 0)) == PRE_INC
818 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
819 out = gen_rtx (MEM, GET_MODE (out), XEXP (XEXP (out, 0), 0));
822 /* If we are reloading a (SUBREG constant ...), really reload just the
823 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
824 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
825 a pseudo and hence will become a MEM) with M1 wider than M2 and the
826 register is a pseudo, also reload the inside expression.
827 For machines that extend byte loads, do this for any SUBREG of a pseudo
828 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
829 M2 is an integral mode that gets extended when loaded.
830 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
831 either M1 is not valid for R or M2 is wider than a word but we only
832 need one word to store an M2-sized quantity in R.
833 (However, if OUT is nonzero, we need to reload the reg *and*
834 the subreg, so do nothing here, and let following statement handle it.)
836 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
837 we can't handle it here because CONST_INT does not indicate a mode.
839 Similarly, we must reload the inside expression if we have a
840 STRICT_LOW_PART (presumably, in == out in the cas).
842 Also reload the inner expression if it does not require a secondary
843 reload but the SUBREG does.
845 Finally, reload the inner expression if it is a register that is in
846 the class whose registers cannot be referenced in a different size
847 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
848 cannot reload just the inside since we might end up with the wrong
851 if (in != 0 && GET_CODE (in) == SUBREG && SUBREG_WORD (in) == 0
852 #ifdef CLASS_CANNOT_CHANGE_SIZE
853 && class != CLASS_CANNOT_CHANGE_SIZE
855 && (CONSTANT_P (SUBREG_REG (in))
856 || GET_CODE (SUBREG_REG (in)) == PLUS
858 || (((GET_CODE (SUBREG_REG (in)) == REG
859 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
860 || GET_CODE (SUBREG_REG (in)) == MEM)
861 && ((GET_MODE_SIZE (inmode)
862 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
863 #ifdef LOAD_EXTEND_OP
864 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
865 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
867 && (GET_MODE_SIZE (inmode)
868 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
869 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
870 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
873 || (GET_CODE (SUBREG_REG (in)) == REG
874 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
875 /* The case where out is nonzero
876 is handled differently in the following statement. */
877 && (out == 0 || SUBREG_WORD (in) == 0)
878 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
879 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
881 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
883 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
884 GET_MODE (SUBREG_REG (in)))))
885 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
888 #ifdef SECONDARY_INPUT_RELOAD_CLASS
889 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
890 && (SECONDARY_INPUT_RELOAD_CLASS (class,
891 GET_MODE (SUBREG_REG (in)),
895 #ifdef CLASS_CANNOT_CHANGE_SIZE
896 || (GET_CODE (SUBREG_REG (in)) == REG
897 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
898 && (TEST_HARD_REG_BIT
899 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
900 REGNO (SUBREG_REG (in))))
901 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
902 != GET_MODE_SIZE (inmode)))
906 in_subreg_loc = inloc;
907 inloc = &SUBREG_REG (in);
909 #ifndef LOAD_EXTEND_OP
910 if (GET_CODE (in) == MEM)
911 /* This is supposed to happen only for paradoxical subregs made by
912 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
913 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
916 inmode = GET_MODE (in);
919 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
920 either M1 is not valid for R or M2 is wider than a word but we only
921 need one word to store an M2-sized quantity in R.
923 However, we must reload the inner reg *as well as* the subreg in
926 /* Similar issue for (SUBREG constant ...) if it was not handled by the
927 code above. This can happen if SUBREG_WORD != 0. */
929 if (in != 0 && GET_CODE (in) == SUBREG
930 && (CONSTANT_P (SUBREG_REG (in))
931 || (GET_CODE (SUBREG_REG (in)) == REG
932 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
933 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in))
936 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
937 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
939 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
941 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
942 GET_MODE (SUBREG_REG (in)))))))))
944 /* This relies on the fact that emit_reload_insns outputs the
945 instructions for input reloads of type RELOAD_OTHER in the same
946 order as the reloads. Thus if the outer reload is also of type
947 RELOAD_OTHER, we are guaranteed that this inner reload will be
948 output before the outer reload. */
949 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
950 find_valid_class (inmode, SUBREG_WORD (in)),
951 VOIDmode, VOIDmode, 0, 0, opnum, type);
952 dont_remove_subreg = 1;
955 /* Similarly for paradoxical and problematical SUBREGs on the output.
956 Note that there is no reason we need worry about the previous value
957 of SUBREG_REG (out); even if wider than out,
958 storing in a subreg is entitled to clobber it all
959 (except in the case of STRICT_LOW_PART,
960 and in that case the constraint should label it input-output.) */
961 if (out != 0 && GET_CODE (out) == SUBREG && SUBREG_WORD (out) == 0
962 #ifdef CLASS_CANNOT_CHANGE_SIZE
963 && class != CLASS_CANNOT_CHANGE_SIZE
965 && (CONSTANT_P (SUBREG_REG (out))
967 || (((GET_CODE (SUBREG_REG (out)) == REG
968 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
969 || GET_CODE (SUBREG_REG (out)) == MEM)
970 && ((GET_MODE_SIZE (outmode)
971 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))))
972 || (GET_CODE (SUBREG_REG (out)) == REG
973 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
974 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
975 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
977 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
979 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
980 GET_MODE (SUBREG_REG (out)))))
981 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
982 + SUBREG_WORD (out)),
984 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
985 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
986 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
987 GET_MODE (SUBREG_REG (out)),
991 #ifdef CLASS_CANNOT_CHANGE_SIZE
992 || (GET_CODE (SUBREG_REG (out)) == REG
993 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
994 && (TEST_HARD_REG_BIT
995 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
996 REGNO (SUBREG_REG (out))))
997 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
998 != GET_MODE_SIZE (outmode)))
1002 out_subreg_loc = outloc;
1003 outloc = &SUBREG_REG (out);
1005 #ifndef LOAD_EXTEND_OP
1006 if (GET_CODE (out) == MEM
1007 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1010 outmode = GET_MODE (out);
1013 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1014 either M1 is not valid for R or M2 is wider than a word but we only
1015 need one word to store an M2-sized quantity in R.
1017 However, we must reload the inner reg *as well as* the subreg in
1018 that case. In this case, the inner reg is an in-out reload. */
1020 if (out != 0 && GET_CODE (out) == SUBREG
1021 && GET_CODE (SUBREG_REG (out)) == REG
1022 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1023 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out),
1025 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1026 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1028 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1030 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1031 GET_MODE (SUBREG_REG (out)))))))
1033 /* This relies on the fact that emit_reload_insns outputs the
1034 instructions for output reloads of type RELOAD_OTHER in reverse
1035 order of the reloads. Thus if the outer reload is also of type
1036 RELOAD_OTHER, we are guaranteed that this inner reload will be
1037 output after the outer reload. */
1038 dont_remove_subreg = 1;
1039 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1041 find_valid_class (outmode, SUBREG_WORD (out)),
1042 VOIDmode, VOIDmode, 0, 0,
1043 opnum, RELOAD_OTHER);
1046 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1047 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1048 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1049 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1052 /* If IN is a SUBREG of a hard register, make a new REG. This
1053 simplifies some of the cases below. */
1055 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1056 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1057 && ! dont_remove_subreg)
1058 in = gen_rtx (REG, GET_MODE (in),
1059 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
1061 /* Similarly for OUT. */
1062 if (out != 0 && GET_CODE (out) == SUBREG
1063 && GET_CODE (SUBREG_REG (out)) == REG
1064 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1065 && ! dont_remove_subreg)
1066 out = gen_rtx (REG, GET_MODE (out),
1067 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
1069 /* Narrow down the class of register wanted if that is
1070 desirable on this machine for efficiency. */
1072 class = PREFERRED_RELOAD_CLASS (in, class);
1074 /* Output reloads may need analogous treatment, different in detail. */
1075 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1077 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1080 /* Make sure we use a class that can handle the actual pseudo
1081 inside any subreg. For example, on the 386, QImode regs
1082 can appear within SImode subregs. Although GENERAL_REGS
1083 can handle SImode, QImode needs a smaller class. */
1084 #ifdef LIMIT_RELOAD_CLASS
1086 class = LIMIT_RELOAD_CLASS (inmode, class);
1087 else if (in != 0 && GET_CODE (in) == SUBREG)
1088 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1091 class = LIMIT_RELOAD_CLASS (outmode, class);
1092 if (out != 0 && GET_CODE (out) == SUBREG)
1093 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1096 /* Verify that this class is at least possible for the mode that
1098 if (this_insn_is_asm)
1100 enum machine_mode mode;
1101 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1105 if (mode == VOIDmode)
1107 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1112 outmode = word_mode;
1114 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1115 if (HARD_REGNO_MODE_OK (i, mode)
1116 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1118 int nregs = HARD_REGNO_NREGS (i, mode);
1121 for (j = 1; j < nregs; j++)
1122 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1127 if (i == FIRST_PSEUDO_REGISTER)
1129 error_for_asm (this_insn, "impossible register constraint in `asm'");
1134 if (class == NO_REGS)
1137 /* We can use an existing reload if the class is right
1138 and at least one of IN and OUT is a match
1139 and the other is at worst neutral.
1140 (A zero compared against anything is neutral.)
1142 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
1143 for the same thing since that can cause us to need more reload registers
1144 than we otherwise would. */
1146 for (i = 0; i < n_reloads; i++)
1147 if ((reg_class_subset_p (class, reload_reg_class[i])
1148 || reg_class_subset_p (reload_reg_class[i], class))
1149 /* If the existing reload has a register, it must fit our class. */
1150 && (reload_reg_rtx[i] == 0
1151 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1152 true_regnum (reload_reg_rtx[i])))
1153 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
1154 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
1156 (out != 0 && MATCHES (reload_out[i], out)
1157 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
1158 && (reg_class_size[(int) class] == 1
1159 #ifdef SMALL_REGISTER_CLASSES
1163 && MERGABLE_RELOADS (type, reload_when_needed[i],
1164 opnum, reload_opnum[i]))
1167 /* Reloading a plain reg for input can match a reload to postincrement
1168 that reg, since the postincrement's value is the right value.
1169 Likewise, it can match a preincrement reload, since we regard
1170 the preincrementation as happening before any ref in this insn
1171 to that register. */
1173 for (i = 0; i < n_reloads; i++)
1174 if ((reg_class_subset_p (class, reload_reg_class[i])
1175 || reg_class_subset_p (reload_reg_class[i], class))
1176 /* If the existing reload has a register, it must fit our class. */
1177 && (reload_reg_rtx[i] == 0
1178 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1179 true_regnum (reload_reg_rtx[i])))
1180 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
1181 && ((GET_CODE (in) == REG
1182 && (GET_CODE (reload_in[i]) == POST_INC
1183 || GET_CODE (reload_in[i]) == POST_DEC
1184 || GET_CODE (reload_in[i]) == PRE_INC
1185 || GET_CODE (reload_in[i]) == PRE_DEC)
1186 && MATCHES (XEXP (reload_in[i], 0), in))
1188 (GET_CODE (reload_in[i]) == REG
1189 && (GET_CODE (in) == POST_INC
1190 || GET_CODE (in) == POST_DEC
1191 || GET_CODE (in) == PRE_INC
1192 || GET_CODE (in) == PRE_DEC)
1193 && MATCHES (XEXP (in, 0), reload_in[i])))
1194 && (reg_class_size[(int) class] == 1
1195 #ifdef SMALL_REGISTER_CLASSES
1199 && MERGABLE_RELOADS (type, reload_when_needed[i],
1200 opnum, reload_opnum[i]))
1202 /* Make sure reload_in ultimately has the increment,
1203 not the plain register. */
1204 if (GET_CODE (in) == REG)
1211 /* See if we need a secondary reload register to move between CLASS
1212 and IN or CLASS and OUT. Get the icode and push any required reloads
1213 needed for each of them if so. */
1215 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1218 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1219 &secondary_in_icode);
1222 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1223 if (out != 0 && GET_CODE (out) != SCRATCH)
1224 secondary_out_reload
1225 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1226 type, &secondary_out_icode);
1229 /* We found no existing reload suitable for re-use.
1230 So add an additional reload. */
1234 reload_out[i] = out;
1235 reload_reg_class[i] = class;
1236 reload_inmode[i] = inmode;
1237 reload_outmode[i] = outmode;
1238 reload_reg_rtx[i] = 0;
1239 reload_optional[i] = optional;
1241 reload_nocombine[i] = 0;
1242 reload_in_reg[i] = inloc ? *inloc : 0;
1243 reload_opnum[i] = opnum;
1244 reload_when_needed[i] = type;
1245 reload_secondary_in_reload[i] = secondary_in_reload;
1246 reload_secondary_out_reload[i] = secondary_out_reload;
1247 reload_secondary_in_icode[i] = secondary_in_icode;
1248 reload_secondary_out_icode[i] = secondary_out_icode;
1249 reload_secondary_p[i] = 0;
1253 #ifdef SECONDARY_MEMORY_NEEDED
1254 /* If a memory location is needed for the copy, make one. */
1255 if (in != 0 && GET_CODE (in) == REG
1256 && REGNO (in) < FIRST_PSEUDO_REGISTER
1257 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1259 get_secondary_mem (in, inmode, opnum, type);
1261 if (out != 0 && GET_CODE (out) == REG
1262 && REGNO (out) < FIRST_PSEUDO_REGISTER
1263 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1265 get_secondary_mem (out, outmode, opnum, type);
1270 /* We are reusing an existing reload,
1271 but we may have additional information for it.
1272 For example, we may now have both IN and OUT
1273 while the old one may have just one of them. */
1275 /* The modes can be different. If they are, we want to reload in
1276 the larger mode, so that the value is valid for both modes. */
1277 if (inmode != VOIDmode
1278 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (reload_inmode[i]))
1279 reload_inmode[i] = inmode;
1280 if (outmode != VOIDmode
1281 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (reload_outmode[i]))
1282 reload_outmode[i] = outmode;
1286 reload_out[i] = out;
1287 if (reg_class_subset_p (class, reload_reg_class[i]))
1288 reload_reg_class[i] = class;
1289 reload_optional[i] &= optional;
1290 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1291 opnum, reload_opnum[i]))
1292 reload_when_needed[i] = RELOAD_OTHER;
1293 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1296 /* If the ostensible rtx being reload differs from the rtx found
1297 in the location to substitute, this reload is not safe to combine
1298 because we cannot reliably tell whether it appears in the insn. */
1300 if (in != 0 && in != *inloc)
1301 reload_nocombine[i] = 1;
1304 /* This was replaced by changes in find_reloads_address_1 and the new
1305 function inc_for_reload, which go with a new meaning of reload_inc. */
1307 /* If this is an IN/OUT reload in an insn that sets the CC,
1308 it must be for an autoincrement. It doesn't work to store
1309 the incremented value after the insn because that would clobber the CC.
1310 So we must do the increment of the value reloaded from,
1311 increment it, store it back, then decrement again. */
1312 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1316 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1317 /* If we did not find a nonzero amount-to-increment-by,
1318 that contradicts the belief that IN is being incremented
1319 in an address in this insn. */
1320 if (reload_inc[i] == 0)
1325 /* If we will replace IN and OUT with the reload-reg,
1326 record where they are located so that substitution need
1327 not do a tree walk. */
1329 if (replace_reloads)
1333 register struct replacement *r = &replacements[n_replacements++];
1335 r->subreg_loc = in_subreg_loc;
1339 if (outloc != 0 && outloc != inloc)
1341 register struct replacement *r = &replacements[n_replacements++];
1344 r->subreg_loc = out_subreg_loc;
1349 /* If this reload is just being introduced and it has both
1350 an incoming quantity and an outgoing quantity that are
1351 supposed to be made to match, see if either one of the two
1352 can serve as the place to reload into.
1354 If one of them is acceptable, set reload_reg_rtx[i]
1357 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1359 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1361 reload_reg_class[i], i);
1363 /* If the outgoing register already contains the same value
1364 as the incoming one, we can dispense with loading it.
1365 The easiest way to tell the caller that is to give a phony
1366 value for the incoming operand (same as outgoing one). */
1367 if (reload_reg_rtx[i] == out
1368 && (GET_CODE (in) == REG || CONSTANT_P (in))
1369 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1370 static_reload_reg_p, i, inmode))
1374 /* If this is an input reload and the operand contains a register that
1375 dies in this insn and is used nowhere else, see if it is the right class
1376 to be used for this reload. Use it if so. (This occurs most commonly
1377 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1378 this if it is also an output reload that mentions the register unless
1379 the output is a SUBREG that clobbers an entire register.
1381 Note that the operand might be one of the spill regs, if it is a
1382 pseudo reg and we are in a block where spilling has not taken place.
1383 But if there is no spilling in this block, that is OK.
1384 An explicitly used hard reg cannot be a spill reg. */
1386 if (reload_reg_rtx[i] == 0 && in != 0)
1391 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1392 if (REG_NOTE_KIND (note) == REG_DEAD
1393 && GET_CODE (XEXP (note, 0)) == REG
1394 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1395 && reg_mentioned_p (XEXP (note, 0), in)
1396 && ! refers_to_regno_for_reload_p (regno,
1398 + HARD_REGNO_NREGS (regno,
1400 PATTERN (this_insn), inloc)
1401 /* If this is also an output reload, IN cannot be used as
1402 the reload register if it is set in this insn unless IN
1404 && (out == 0 || in == out
1405 || ! hard_reg_set_here_p (regno,
1407 + HARD_REGNO_NREGS (regno,
1409 PATTERN (this_insn)))
1410 /* ??? Why is this code so different from the previous?
1411 Is there any simple coherent way to describe the two together?
1412 What's going on here. */
1414 || (GET_CODE (in) == SUBREG
1415 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1417 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1418 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1419 /* Make sure the operand fits in the reg that dies. */
1420 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1421 && HARD_REGNO_MODE_OK (regno, inmode)
1422 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1423 && HARD_REGNO_MODE_OK (regno, outmode)
1424 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1425 && !fixed_regs[regno])
1427 reload_reg_rtx[i] = gen_rtx (REG, inmode, regno);
1433 output_reloadnum = i;
1438 /* Record an additional place we must replace a value
1439 for which we have already recorded a reload.
1440 RELOADNUM is the value returned by push_reload
1441 when the reload was recorded.
1442 This is used in insn patterns that use match_dup. */
1445 push_replacement (loc, reloadnum, mode)
1448 enum machine_mode mode;
1450 if (replace_reloads)
1452 register struct replacement *r = &replacements[n_replacements++];
1453 r->what = reloadnum;
1460 /* Transfer all replacements that used to be in reload FROM to be in
1464 transfer_replacements (to, from)
1469 for (i = 0; i < n_replacements; i++)
1470 if (replacements[i].what == from)
1471 replacements[i].what = to;
1474 /* If there is only one output reload, and it is not for an earlyclobber
1475 operand, try to combine it with a (logically unrelated) input reload
1476 to reduce the number of reload registers needed.
1478 This is safe if the input reload does not appear in
1479 the value being output-reloaded, because this implies
1480 it is not needed any more once the original insn completes.
1482 If that doesn't work, see we can use any of the registers that
1483 die in this insn as a reload register. We can if it is of the right
1484 class and does not appear in the value being output-reloaded. */
1490 int output_reload = -1;
1491 int secondary_out = -1;
1494 /* Find the output reload; return unless there is exactly one
1495 and that one is mandatory. */
1497 for (i = 0; i < n_reloads; i++)
1498 if (reload_out[i] != 0)
1500 if (output_reload >= 0)
1505 if (output_reload < 0 || reload_optional[output_reload])
1508 /* An input-output reload isn't combinable. */
1510 if (reload_in[output_reload] != 0)
1513 /* If this reload is for an earlyclobber operand, we can't do anything. */
1514 if (earlyclobber_operand_p (reload_out[output_reload]))
1517 /* Check each input reload; can we combine it? */
1519 for (i = 0; i < n_reloads; i++)
1520 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1521 /* Life span of this reload must not extend past main insn. */
1522 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1523 && reload_when_needed[i] != RELOAD_OTHER
1524 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1525 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1526 reload_outmode[output_reload]))
1527 && reload_inc[i] == 0
1528 && reload_reg_rtx[i] == 0
1529 #ifdef SECONDARY_MEMORY_NEEDED
1530 /* Don't combine two reloads with different secondary
1531 memory locations. */
1532 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1533 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1534 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1535 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1537 #ifdef SMALL_REGISTER_CLASSES
1538 && reload_reg_class[i] == reload_reg_class[output_reload]
1540 && (reg_class_subset_p (reload_reg_class[i],
1541 reload_reg_class[output_reload])
1542 || reg_class_subset_p (reload_reg_class[output_reload],
1543 reload_reg_class[i]))
1545 && (MATCHES (reload_in[i], reload_out[output_reload])
1546 /* Args reversed because the first arg seems to be
1547 the one that we imagine being modified
1548 while the second is the one that might be affected. */
1549 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1551 /* However, if the input is a register that appears inside
1552 the output, then we also can't share.
1553 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1554 If the same reload reg is used for both reg 69 and the
1555 result to be stored in memory, then that result
1556 will clobber the address of the memory ref. */
1557 && ! (GET_CODE (reload_in[i]) == REG
1558 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1559 reload_out[output_reload]))))
1560 && (reg_class_size[(int) reload_reg_class[i]]
1561 #ifdef SMALL_REGISTER_CLASSES
1565 /* We will allow making things slightly worse by combining an
1566 input and an output, but no worse than that. */
1567 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1568 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1572 /* We have found a reload to combine with! */
1573 reload_out[i] = reload_out[output_reload];
1574 reload_outmode[i] = reload_outmode[output_reload];
1575 /* Mark the old output reload as inoperative. */
1576 reload_out[output_reload] = 0;
1577 /* The combined reload is needed for the entire insn. */
1578 reload_when_needed[i] = RELOAD_OTHER;
1579 /* If the output reload had a secondary reload, copy it. */
1580 if (reload_secondary_out_reload[output_reload] != -1)
1582 reload_secondary_out_reload[i]
1583 = reload_secondary_out_reload[output_reload];
1584 reload_secondary_out_icode[i]
1585 = reload_secondary_out_icode[output_reload];
1588 #ifdef SECONDARY_MEMORY_NEEDED
1589 /* Copy any secondary MEM. */
1590 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1591 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1592 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1594 /* If required, minimize the register class. */
1595 if (reg_class_subset_p (reload_reg_class[output_reload],
1596 reload_reg_class[i]))
1597 reload_reg_class[i] = reload_reg_class[output_reload];
1599 /* Transfer all replacements from the old reload to the combined. */
1600 for (j = 0; j < n_replacements; j++)
1601 if (replacements[j].what == output_reload)
1602 replacements[j].what = i;
1607 /* If this insn has only one operand that is modified or written (assumed
1608 to be the first), it must be the one corresponding to this reload. It
1609 is safe to use anything that dies in this insn for that output provided
1610 that it does not occur in the output (we already know it isn't an
1611 earlyclobber. If this is an asm insn, give up. */
1613 if (INSN_CODE (this_insn) == -1)
1616 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1617 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1618 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1621 /* See if some hard register that dies in this insn and is not used in
1622 the output is the right class. Only works if the register we pick
1623 up can fully hold our output reload. */
1624 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1625 if (REG_NOTE_KIND (note) == REG_DEAD
1626 && GET_CODE (XEXP (note, 0)) == REG
1627 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1628 reload_out[output_reload])
1629 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1630 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1631 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1632 REGNO (XEXP (note, 0)))
1633 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1634 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1635 /* Ensure that a secondary or tertiary reload for this output
1636 won't want this register. */
1637 && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1
1638 || (! (TEST_HARD_REG_BIT
1639 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1640 REGNO (XEXP (note, 0))))
1641 && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1
1642 || ! (TEST_HARD_REG_BIT
1643 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1644 REGNO (XEXP (note, 0)))))))
1645 && ! fixed_regs[REGNO (XEXP (note, 0))])
1647 reload_reg_rtx[output_reload] = gen_rtx (REG,
1648 reload_outmode[output_reload],
1649 REGNO (XEXP (note, 0)));
1654 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1655 See if one of IN and OUT is a register that may be used;
1656 this is desirable since a spill-register won't be needed.
1657 If so, return the register rtx that proves acceptable.
1659 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1660 CLASS is the register class required for the reload.
1662 If FOR_REAL is >= 0, it is the number of the reload,
1663 and in some cases when it can be discovered that OUT doesn't need
1664 to be computed, clear out reload_out[FOR_REAL].
1666 If FOR_REAL is -1, this should not be done, because this call
1667 is just to see if a register can be found, not to find and install it. */
1670 find_dummy_reload (real_in, real_out, inloc, outloc,
1671 inmode, outmode, class, for_real)
1672 rtx real_in, real_out;
1673 rtx *inloc, *outloc;
1674 enum machine_mode inmode, outmode;
1675 enum reg_class class;
1684 /* If operands exceed a word, we can't use either of them
1685 unless they have the same size. */
1686 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1687 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1688 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1691 /* Find the inside of any subregs. */
1692 while (GET_CODE (out) == SUBREG)
1694 out_offset = SUBREG_WORD (out);
1695 out = SUBREG_REG (out);
1697 while (GET_CODE (in) == SUBREG)
1699 in_offset = SUBREG_WORD (in);
1700 in = SUBREG_REG (in);
1703 /* Narrow down the reg class, the same way push_reload will;
1704 otherwise we might find a dummy now, but push_reload won't. */
1705 class = PREFERRED_RELOAD_CLASS (in, class);
1707 /* See if OUT will do. */
1708 if (GET_CODE (out) == REG
1709 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1711 register int regno = REGNO (out) + out_offset;
1712 int nwords = HARD_REGNO_NREGS (regno, outmode);
1715 /* When we consider whether the insn uses OUT,
1716 ignore references within IN. They don't prevent us
1717 from copying IN into OUT, because those refs would
1718 move into the insn that reloads IN.
1720 However, we only ignore IN in its role as this reload.
1721 If the insn uses IN elsewhere and it contains OUT,
1722 that counts. We can't be sure it's the "same" operand
1723 so it might not go through this reload. */
1725 *inloc = const0_rtx;
1727 if (regno < FIRST_PSEUDO_REGISTER
1728 /* A fixed reg that can overlap other regs better not be used
1729 for reloading in any way. */
1730 #ifdef OVERLAPPING_REGNO_P
1731 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1733 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1734 PATTERN (this_insn), outloc))
1737 for (i = 0; i < nwords; i++)
1738 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1744 if (GET_CODE (real_out) == REG)
1747 value = gen_rtx (REG, outmode, regno);
1754 /* Consider using IN if OUT was not acceptable
1755 or if OUT dies in this insn (like the quotient in a divmod insn).
1756 We can't use IN unless it is dies in this insn,
1757 which means we must know accurately which hard regs are live.
1758 Also, the result can't go in IN if IN is used within OUT. */
1759 if (hard_regs_live_known
1760 && GET_CODE (in) == REG
1761 && REGNO (in) < FIRST_PSEUDO_REGISTER
1763 || find_reg_note (this_insn, REG_UNUSED, real_out))
1764 && find_reg_note (this_insn, REG_DEAD, real_in)
1765 && !fixed_regs[REGNO (in)]
1766 && HARD_REGNO_MODE_OK (REGNO (in),
1767 /* The only case where out and real_out might
1768 have different modes is where real_out
1769 is a subreg, and in that case, out
1771 (GET_MODE (out) != VOIDmode
1772 ? GET_MODE (out) : outmode)))
1774 register int regno = REGNO (in) + in_offset;
1775 int nwords = HARD_REGNO_NREGS (regno, inmode);
1777 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1778 && ! hard_reg_set_here_p (regno, regno + nwords,
1779 PATTERN (this_insn)))
1782 for (i = 0; i < nwords; i++)
1783 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1789 /* If we were going to use OUT as the reload reg
1790 and changed our mind, it means OUT is a dummy that
1791 dies here. So don't bother copying value to it. */
1792 if (for_real >= 0 && value == real_out)
1793 reload_out[for_real] = 0;
1794 if (GET_CODE (real_in) == REG)
1797 value = gen_rtx (REG, inmode, regno);
1805 /* This page contains subroutines used mainly for determining
1806 whether the IN or an OUT of a reload can serve as the
1809 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1812 earlyclobber_operand_p (x)
1817 for (i = 0; i < n_earlyclobbers; i++)
1818 if (reload_earlyclobbers[i] == x)
1824 /* Return 1 if expression X alters a hard reg in the range
1825 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1826 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1827 X should be the body of an instruction. */
1830 hard_reg_set_here_p (beg_regno, end_regno, x)
1831 register int beg_regno, end_regno;
1834 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1836 register rtx op0 = SET_DEST (x);
1837 while (GET_CODE (op0) == SUBREG)
1838 op0 = SUBREG_REG (op0);
1839 if (GET_CODE (op0) == REG)
1841 register int r = REGNO (op0);
1842 /* See if this reg overlaps range under consideration. */
1844 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1848 else if (GET_CODE (x) == PARALLEL)
1850 register int i = XVECLEN (x, 0) - 1;
1852 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1859 /* Return 1 if ADDR is a valid memory address for mode MODE,
1860 and check that each pseudo reg has the proper kind of
1864 strict_memory_address_p (mode, addr)
1865 enum machine_mode mode;
1868 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1875 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1876 if they are the same hard reg, and has special hacks for
1877 autoincrement and autodecrement.
1878 This is specifically intended for find_reloads to use
1879 in determining whether two operands match.
1880 X is the operand whose number is the lower of the two.
1882 The value is 2 if Y contains a pre-increment that matches
1883 a non-incrementing address in X. */
1885 /* ??? To be completely correct, we should arrange to pass
1886 for X the output operand and for Y the input operand.
1887 For now, we assume that the output operand has the lower number
1888 because that is natural in (SET output (... input ...)). */
1891 operands_match_p (x, y)
1895 register RTX_CODE code = GET_CODE (x);
1901 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
1902 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
1903 && GET_CODE (SUBREG_REG (y)) == REG)))
1909 i = REGNO (SUBREG_REG (x));
1910 if (i >= FIRST_PSEUDO_REGISTER)
1912 i += SUBREG_WORD (x);
1917 if (GET_CODE (y) == SUBREG)
1919 j = REGNO (SUBREG_REG (y));
1920 if (j >= FIRST_PSEUDO_REGISTER)
1922 j += SUBREG_WORD (y);
1927 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1928 multiple hard register group, so that for example (reg:DI 0) and
1929 (reg:SI 1) will be considered the same register. */
1930 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
1931 && i < FIRST_PSEUDO_REGISTER)
1932 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
1933 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
1934 && j < FIRST_PSEUDO_REGISTER)
1935 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
1939 /* If two operands must match, because they are really a single
1940 operand of an assembler insn, then two postincrements are invalid
1941 because the assembler insn would increment only once.
1942 On the other hand, an postincrement matches ordinary indexing
1943 if the postincrement is the output operand. */
1944 if (code == POST_DEC || code == POST_INC)
1945 return operands_match_p (XEXP (x, 0), y);
1946 /* Two preincrements are invalid
1947 because the assembler insn would increment only once.
1948 On the other hand, an preincrement matches ordinary indexing
1949 if the preincrement is the input operand.
1950 In this case, return 2, since some callers need to do special
1951 things when this happens. */
1952 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
1953 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
1957 /* Now we have disposed of all the cases
1958 in which different rtx codes can match. */
1959 if (code != GET_CODE (y))
1961 if (code == LABEL_REF)
1962 return XEXP (x, 0) == XEXP (y, 0);
1963 if (code == SYMBOL_REF)
1964 return XSTR (x, 0) == XSTR (y, 0);
1966 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1968 if (GET_MODE (x) != GET_MODE (y))
1971 /* Compare the elements. If any pair of corresponding elements
1972 fail to match, return 0 for the whole things. */
1975 fmt = GET_RTX_FORMAT (code);
1976 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1982 if (XWINT (x, i) != XWINT (y, i))
1987 if (XINT (x, i) != XINT (y, i))
1992 val = operands_match_p (XEXP (x, i), XEXP (y, i));
1995 /* If any subexpression returns 2,
1996 we should return 2 if we are successful. */
2004 /* It is believed that rtx's at this level will never
2005 contain anything but integers and other rtx's,
2006 except for within LABEL_REFs and SYMBOL_REFs. */
2011 return 1 + success_2;
2014 /* Return the number of times character C occurs in string S. */
2017 n_occurrences (c, s)
2027 /* Describe the range of registers or memory referenced by X.
2028 If X is a register, set REG_FLAG and put the first register
2029 number into START and the last plus one into END.
2030 If X is a memory reference, put a base address into BASE
2031 and a range of integer offsets into START and END.
2032 If X is pushing on the stack, we can assume it causes no trouble,
2033 so we set the SAFE field. */
2035 static struct decomposition
2039 struct decomposition val;
2044 if (GET_CODE (x) == MEM)
2046 rtx base, offset = 0;
2047 rtx addr = XEXP (x, 0);
2049 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2050 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2052 val.base = XEXP (addr, 0);
2053 val.start = - GET_MODE_SIZE (GET_MODE (x));
2054 val.end = GET_MODE_SIZE (GET_MODE (x));
2055 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2059 if (GET_CODE (addr) == CONST)
2061 addr = XEXP (addr, 0);
2064 if (GET_CODE (addr) == PLUS)
2066 if (CONSTANT_P (XEXP (addr, 0)))
2068 base = XEXP (addr, 1);
2069 offset = XEXP (addr, 0);
2071 else if (CONSTANT_P (XEXP (addr, 1)))
2073 base = XEXP (addr, 0);
2074 offset = XEXP (addr, 1);
2081 offset = const0_rtx;
2083 if (GET_CODE (offset) == CONST)
2084 offset = XEXP (offset, 0);
2085 if (GET_CODE (offset) == PLUS)
2087 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2089 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 1));
2090 offset = XEXP (offset, 0);
2092 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2094 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 0));
2095 offset = XEXP (offset, 1);
2099 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
2100 offset = const0_rtx;
2103 else if (GET_CODE (offset) != CONST_INT)
2105 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
2106 offset = const0_rtx;
2109 if (all_const && GET_CODE (base) == PLUS)
2110 base = gen_rtx (CONST, GET_MODE (base), base);
2112 if (GET_CODE (offset) != CONST_INT)
2115 val.start = INTVAL (offset);
2116 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2120 else if (GET_CODE (x) == REG)
2123 val.start = true_regnum (x);
2126 /* A pseudo with no hard reg. */
2127 val.start = REGNO (x);
2128 val.end = val.start + 1;
2132 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2134 else if (GET_CODE (x) == SUBREG)
2136 if (GET_CODE (SUBREG_REG (x)) != REG)
2137 /* This could be more precise, but it's good enough. */
2138 return decompose (SUBREG_REG (x));
2140 val.start = true_regnum (x);
2142 return decompose (SUBREG_REG (x));
2145 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2147 else if (CONSTANT_P (x)
2148 /* This hasn't been assigned yet, so it can't conflict yet. */
2149 || GET_CODE (x) == SCRATCH)
2156 /* Return 1 if altering Y will not modify the value of X.
2157 Y is also described by YDATA, which should be decompose (Y). */
2160 immune_p (x, y, ydata)
2162 struct decomposition ydata;
2164 struct decomposition xdata;
2167 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2171 if (GET_CODE (y) != MEM)
2173 /* If Y is memory and X is not, Y can't affect X. */
2174 if (GET_CODE (x) != MEM)
2177 xdata = decompose (x);
2179 if (! rtx_equal_p (xdata.base, ydata.base))
2181 /* If bases are distinct symbolic constants, there is no overlap. */
2182 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2184 /* Constants and stack slots never overlap. */
2185 if (CONSTANT_P (xdata.base)
2186 && (ydata.base == frame_pointer_rtx
2187 || ydata.base == hard_frame_pointer_rtx
2188 || ydata.base == stack_pointer_rtx))
2190 if (CONSTANT_P (ydata.base)
2191 && (xdata.base == frame_pointer_rtx
2192 || xdata.base == hard_frame_pointer_rtx
2193 || xdata.base == stack_pointer_rtx))
2195 /* If either base is variable, we don't know anything. */
2200 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2203 /* Similar, but calls decompose. */
2206 safe_from_earlyclobber (op, clobber)
2209 struct decomposition early_data;
2211 early_data = decompose (clobber);
2212 return immune_p (op, clobber, early_data);
2215 /* Main entry point of this file: search the body of INSN
2216 for values that need reloading and record them with push_reload.
2217 REPLACE nonzero means record also where the values occur
2218 so that subst_reloads can be used.
2220 IND_LEVELS says how many levels of indirection are supported by this
2221 machine; a value of zero means that a memory reference is not a valid
2224 LIVE_KNOWN says we have valid information about which hard
2225 regs are live at each point in the program; this is true when
2226 we are called from global_alloc but false when stupid register
2227 allocation has been done.
2229 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2230 which is nonnegative if the reg has been commandeered for reloading into.
2231 It is copied into STATIC_RELOAD_REG_P and referenced from there
2232 by various subroutines. */
2235 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2237 int replace, ind_levels;
2239 short *reload_reg_p;
2241 #ifdef REGISTER_CONSTRAINTS
2243 register int insn_code_number;
2246 /* These are the constraints for the insn. We don't change them. */
2247 char *constraints1[MAX_RECOG_OPERANDS];
2248 /* These start out as the constraints for the insn
2249 and they are chewed up as we consider alternatives. */
2250 char *constraints[MAX_RECOG_OPERANDS];
2251 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2253 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2254 char pref_or_nothing[MAX_RECOG_OPERANDS];
2255 /* Nonzero for a MEM operand whose entire address needs a reload. */
2256 int address_reloaded[MAX_RECOG_OPERANDS];
2257 /* Value of enum reload_type to use for operand. */
2258 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2259 /* Value of enum reload_type to use within address of operand. */
2260 enum reload_type address_type[MAX_RECOG_OPERANDS];
2261 /* Save the usage of each operand. */
2262 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2263 int no_input_reloads = 0, no_output_reloads = 0;
2265 int this_alternative[MAX_RECOG_OPERANDS];
2266 char this_alternative_win[MAX_RECOG_OPERANDS];
2267 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2268 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2269 int this_alternative_matches[MAX_RECOG_OPERANDS];
2271 int goal_alternative[MAX_RECOG_OPERANDS];
2272 int this_alternative_number;
2273 int goal_alternative_number;
2274 int operand_reloadnum[MAX_RECOG_OPERANDS];
2275 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2276 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2277 char goal_alternative_win[MAX_RECOG_OPERANDS];
2278 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2279 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2280 int goal_alternative_swapped;
2283 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2284 rtx substed_operand[MAX_RECOG_OPERANDS];
2285 rtx body = PATTERN (insn);
2286 rtx set = single_set (insn);
2287 int goal_earlyclobber, this_earlyclobber;
2288 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2291 this_insn_is_asm = 0; /* Tentative. */
2295 n_earlyclobbers = 0;
2296 replace_reloads = replace;
2297 hard_regs_live_known = live_known;
2298 static_reload_reg_p = reload_reg_p;
2300 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2301 neither are insns that SET cc0. Insns that use CC0 are not allowed
2302 to have any input reloads. */
2303 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2304 no_output_reloads = 1;
2307 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2308 no_input_reloads = 1;
2309 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2310 no_output_reloads = 1;
2313 #ifdef SECONDARY_MEMORY_NEEDED
2314 /* The eliminated forms of any secondary memory locations are per-insn, so
2315 clear them out here. */
2317 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2320 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2321 Make OPERANDS point to a vector of operand values.
2322 Make OPERAND_LOCS point to a vector of pointers to
2323 where the operands were found.
2324 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2325 constraint-strings for this insn.
2326 Return if the insn needs no reload processing. */
2328 switch (GET_CODE (body))
2338 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2339 is cheap to move between them. If it is not, there may not be an insn
2340 to do the copy, so we may need a reload. */
2341 if (GET_CODE (SET_DEST (body)) == REG
2342 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2343 && GET_CODE (SET_SRC (body)) == REG
2344 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2345 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2346 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2350 reload_n_operands = noperands = asm_noperands (body);
2353 /* This insn is an `asm' with operands. */
2355 insn_code_number = -1;
2356 this_insn_is_asm = 1;
2358 /* expand_asm_operands makes sure there aren't too many operands. */
2359 if (noperands > MAX_RECOG_OPERANDS)
2362 /* Now get the operand values and constraints out of the insn. */
2364 decode_asm_operands (body, recog_operand, recog_operand_loc,
2365 constraints, operand_mode);
2368 bcopy ((char *) constraints, (char *) constraints1,
2369 noperands * sizeof (char *));
2370 n_alternatives = n_occurrences (',', constraints[0]) + 1;
2371 for (i = 1; i < noperands; i++)
2372 if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
2374 error_for_asm (insn, "operand constraints differ in number of alternatives");
2375 /* Avoid further trouble with this insn. */
2376 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2385 /* Ordinary insn: recognize it, get the operands via insn_extract
2386 and get the constraints. */
2388 insn_code_number = recog_memoized (insn);
2389 if (insn_code_number < 0)
2390 fatal_insn_not_found (insn);
2392 reload_n_operands = noperands = insn_n_operands[insn_code_number];
2393 n_alternatives = insn_n_alternatives[insn_code_number];
2394 /* Just return "no reloads" if insn has no operands with constraints. */
2395 if (n_alternatives == 0)
2397 insn_extract (insn);
2398 for (i = 0; i < noperands; i++)
2400 constraints[i] = constraints1[i]
2401 = insn_operand_constraint[insn_code_number][i];
2402 operand_mode[i] = insn_operand_mode[insn_code_number][i];
2411 /* If we will need to know, later, whether some pair of operands
2412 are the same, we must compare them now and save the result.
2413 Reloading the base and index registers will clobber them
2414 and afterward they will fail to match. */
2416 for (i = 0; i < noperands; i++)
2421 substed_operand[i] = recog_operand[i];
2424 modified[i] = RELOAD_READ;
2426 /* Scan this operand's constraint to see if it is an output operand,
2427 an in-out operand, is commutative, or should match another. */
2432 modified[i] = RELOAD_WRITE;
2434 modified[i] = RELOAD_READ_WRITE;
2437 /* The last operand should not be marked commutative. */
2438 if (i == noperands - 1)
2440 if (this_insn_is_asm)
2441 warning_for_asm (this_insn,
2442 "`%%' constraint used with last operand");
2449 else if (c >= '0' && c <= '9')
2452 operands_match[c][i]
2453 = operands_match_p (recog_operand[c], recog_operand[i]);
2455 /* An operand may not match itself. */
2458 if (this_insn_is_asm)
2459 warning_for_asm (this_insn,
2460 "operand %d has constraint %d", i, c);
2465 /* If C can be commuted with C+1, and C might need to match I,
2466 then C+1 might also need to match I. */
2467 if (commutative >= 0)
2469 if (c == commutative || c == commutative + 1)
2471 int other = c + (c == commutative ? 1 : -1);
2472 operands_match[other][i]
2473 = operands_match_p (recog_operand[other], recog_operand[i]);
2475 if (i == commutative || i == commutative + 1)
2477 int other = i + (i == commutative ? 1 : -1);
2478 operands_match[c][other]
2479 = operands_match_p (recog_operand[c], recog_operand[other]);
2481 /* Note that C is supposed to be less than I.
2482 No need to consider altering both C and I because in
2483 that case we would alter one into the other. */
2489 /* Examine each operand that is a memory reference or memory address
2490 and reload parts of the addresses into index registers.
2491 Also here any references to pseudo regs that didn't get hard regs
2492 but are equivalent to constants get replaced in the insn itself
2493 with those constants. Nobody will ever see them again.
2495 Finally, set up the preferred classes of each operand. */
2497 for (i = 0; i < noperands; i++)
2499 register RTX_CODE code = GET_CODE (recog_operand[i]);
2501 address_reloaded[i] = 0;
2502 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2503 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2506 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2507 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2510 if (*constraints[i] == 0)
2511 /* Ignore things like match_operator operands. */
2513 else if (constraints[i][0] == 'p')
2515 find_reloads_address (VOIDmode, NULL_PTR,
2516 recog_operand[i], recog_operand_loc[i],
2517 i, operand_type[i], ind_levels);
2518 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2520 else if (code == MEM)
2522 if (find_reloads_address (GET_MODE (recog_operand[i]),
2523 recog_operand_loc[i],
2524 XEXP (recog_operand[i], 0),
2525 &XEXP (recog_operand[i], 0),
2526 i, address_type[i], ind_levels))
2527 address_reloaded[i] = 1;
2528 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2530 else if (code == SUBREG)
2531 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2532 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2535 && &SET_DEST (set) == recog_operand_loc[i]);
2536 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2537 /* We can get a PLUS as an "operand" as a result of register
2538 elimination. See eliminate_regs and gen_reload. We handle
2539 a unary operator by reloading the operand. */
2540 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2541 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2543 else if (code == REG)
2545 /* This is equivalent to calling find_reloads_toplev.
2546 The code is duplicated for speed.
2547 When we find a pseudo always equivalent to a constant,
2548 we replace it by the constant. We must be sure, however,
2549 that we don't try to replace it in the insn in which it
2551 register int regno = REGNO (recog_operand[i]);
2552 if (reg_equiv_constant[regno] != 0
2553 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2554 substed_operand[i] = recog_operand[i]
2555 = reg_equiv_constant[regno];
2556 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2557 that feeds this insn. */
2558 if (reg_equiv_mem[regno] != 0)
2559 substed_operand[i] = recog_operand[i]
2560 = reg_equiv_mem[regno];
2562 if (reg_equiv_address[regno] != 0)
2564 /* If reg_equiv_address is not a constant address, copy it,
2565 since it may be shared. */
2566 /* We must rerun eliminate_regs, in case the elimination
2567 offsets have changed. */
2568 rtx address = XEXP (eliminate_regs (reg_equiv_memory_loc[regno],
2572 if (rtx_varies_p (address))
2573 address = copy_rtx (address);
2575 /* If this is an output operand, we must output a CLOBBER
2576 after INSN so find_equiv_reg knows REGNO is being written.
2577 Mark this insn specially, do we can put our output reloads
2580 if (modified[i] != RELOAD_READ)
2581 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER, VOIDmode,
2586 *recog_operand_loc[i] = recog_operand[i]
2587 = gen_rtx (MEM, GET_MODE (recog_operand[i]), address);
2588 RTX_UNCHANGING_P (recog_operand[i])
2589 = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
2590 find_reloads_address (GET_MODE (recog_operand[i]),
2591 recog_operand_loc[i],
2592 XEXP (recog_operand[i], 0),
2593 &XEXP (recog_operand[i], 0),
2594 i, address_type[i], ind_levels);
2595 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2598 /* If the operand is still a register (we didn't replace it with an
2599 equivalent), get the preferred class to reload it into. */
2600 code = GET_CODE (recog_operand[i]);
2602 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2603 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2605 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2606 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2609 /* If this is simply a copy from operand 1 to operand 0, merge the
2610 preferred classes for the operands. */
2611 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2612 && recog_operand[1] == SET_SRC (set))
2614 preferred_class[0] = preferred_class[1]
2615 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2616 pref_or_nothing[0] |= pref_or_nothing[1];
2617 pref_or_nothing[1] |= pref_or_nothing[0];
2620 /* Now see what we need for pseudo-regs that didn't get hard regs
2621 or got the wrong kind of hard reg. For this, we must consider
2622 all the operands together against the register constraints. */
2624 best = MAX_RECOG_OPERANDS + 300;
2627 goal_alternative_swapped = 0;
2630 /* The constraints are made of several alternatives.
2631 Each operand's constraint looks like foo,bar,... with commas
2632 separating the alternatives. The first alternatives for all
2633 operands go together, the second alternatives go together, etc.
2635 First loop over alternatives. */
2637 for (this_alternative_number = 0;
2638 this_alternative_number < n_alternatives;
2639 this_alternative_number++)
2641 /* Loop over operands for one constraint alternative. */
2642 /* LOSERS counts those that don't fit this alternative
2643 and would require loading. */
2645 /* BAD is set to 1 if it some operand can't fit this alternative
2646 even after reloading. */
2648 /* REJECT is a count of how undesirable this alternative says it is
2649 if any reloading is required. If the alternative matches exactly
2650 then REJECT is ignored, but otherwise it gets this much
2651 counted against it in addition to the reloading needed. Each
2652 ? counts three times here since we want the disparaging caused by
2653 a bad register class to only count 1/3 as much. */
2656 this_earlyclobber = 0;
2658 for (i = 0; i < noperands; i++)
2660 register char *p = constraints[i];
2661 register int win = 0;
2662 /* 0 => this operand can be reloaded somehow for this alternative */
2664 /* 0 => this operand can be reloaded if the alternative allows regs. */
2667 register rtx operand = recog_operand[i];
2669 /* Nonzero means this is a MEM that must be reloaded into a reg
2670 regardless of what the constraint says. */
2671 int force_reload = 0;
2673 /* Nonzero if a constant forced into memory would be OK for this
2676 int earlyclobber = 0;
2678 /* If the predicate accepts a unary operator, it means that
2679 we need to reload the operand. */
2680 if (GET_RTX_CLASS (GET_CODE (operand)) == '1')
2681 operand = XEXP (operand, 0);
2683 /* If the operand is a SUBREG, extract
2684 the REG or MEM (or maybe even a constant) within.
2685 (Constants can occur as a result of reg_equiv_constant.) */
2687 while (GET_CODE (operand) == SUBREG)
2689 offset += SUBREG_WORD (operand);
2690 operand = SUBREG_REG (operand);
2691 /* Force reload if this is a constant or PLUS or if there may may
2692 be a problem accessing OPERAND in the outer mode. */
2693 if (CONSTANT_P (operand)
2694 || GET_CODE (operand) == PLUS
2695 /* We must force a reload of paradoxical SUBREGs
2696 of a MEM because the alignment of the inner value
2697 may not be enough to do the outer reference. On
2698 big-endian machines, it may also reference outside
2701 On machines that extend byte operations and we have a
2702 SUBREG where both the inner and outer modes are no wider
2703 than a word and the inner mode is narrower, is integral,
2704 and gets extended when loaded from memory, combine.c has
2705 made assumptions about the behavior of the machine in such
2706 register access. If the data is, in fact, in memory we
2707 must always load using the size assumed to be in the
2708 register and let the insn do the different-sized
2710 || ((GET_CODE (operand) == MEM
2711 || (GET_CODE (operand)== REG
2712 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2713 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2714 < BIGGEST_ALIGNMENT)
2715 && (GET_MODE_SIZE (operand_mode[i])
2716 > GET_MODE_SIZE (GET_MODE (operand))))
2717 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2718 #ifdef LOAD_EXTEND_OP
2719 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2720 && (GET_MODE_SIZE (GET_MODE (operand))
2722 && (GET_MODE_SIZE (operand_mode[i])
2723 > GET_MODE_SIZE (GET_MODE (operand)))
2724 && INTEGRAL_MODE_P (GET_MODE (operand))
2725 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2728 /* Subreg of a hard reg which can't handle the subreg's mode
2729 or which would handle that mode in the wrong number of
2730 registers for subregging to work. */
2731 || (GET_CODE (operand) == REG
2732 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2733 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2734 && (GET_MODE_SIZE (GET_MODE (operand))
2736 && ((GET_MODE_SIZE (GET_MODE (operand))
2738 != HARD_REGNO_NREGS (REGNO (operand),
2739 GET_MODE (operand))))
2740 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2745 this_alternative[i] = (int) NO_REGS;
2746 this_alternative_win[i] = 0;
2747 this_alternative_offmemok[i] = 0;
2748 this_alternative_earlyclobber[i] = 0;
2749 this_alternative_matches[i] = -1;
2751 /* An empty constraint or empty alternative
2752 allows anything which matched the pattern. */
2753 if (*p == 0 || *p == ',')
2756 /* Scan this alternative's specs for this operand;
2757 set WIN if the operand fits any letter in this alternative.
2758 Otherwise, clear BADOP if this operand could
2759 fit some letter after reloads,
2760 or set WINREG if this operand could fit after reloads
2761 provided the constraint allows some registers. */
2763 while (*p && (c = *p++) != ',')
2772 /* The last operand should not be marked commutative. */
2773 if (i != noperands - 1)
2786 /* Ignore rest of this alternative as far as
2787 reloading is concerned. */
2788 while (*p && *p != ',') p++;
2797 this_alternative_matches[i] = c;
2798 /* We are supposed to match a previous operand.
2799 If we do, we win if that one did.
2800 If we do not, count both of the operands as losers.
2801 (This is too conservative, since most of the time
2802 only a single reload insn will be needed to make
2803 the two operands win. As a result, this alternative
2804 may be rejected when it is actually desirable.) */
2805 if ((swapped && (c != commutative || i != commutative + 1))
2806 /* If we are matching as if two operands were swapped,
2807 also pretend that operands_match had been computed
2809 But if I is the second of those and C is the first,
2810 don't exchange them, because operands_match is valid
2811 only on one side of its diagonal. */
2813 [(c == commutative || c == commutative + 1)
2814 ? 2*commutative + 1 - c : c]
2815 [(i == commutative || i == commutative + 1)
2816 ? 2*commutative + 1 - i : i])
2817 : operands_match[c][i])
2818 win = this_alternative_win[c];
2821 /* Operands don't match. */
2823 /* Retroactively mark the operand we had to match
2824 as a loser, if it wasn't already. */
2825 if (this_alternative_win[c])
2827 this_alternative_win[c] = 0;
2828 if (this_alternative[c] == (int) NO_REGS)
2830 /* But count the pair only once in the total badness of
2831 this alternative, if the pair can be a dummy reload. */
2833 = find_dummy_reload (recog_operand[i], recog_operand[c],
2834 recog_operand_loc[i], recog_operand_loc[c],
2835 operand_mode[i], operand_mode[c],
2836 this_alternative[c], -1);
2841 /* This can be fixed with reloads if the operand
2842 we are supposed to match can be fixed with reloads. */
2844 this_alternative[i] = this_alternative[c];
2846 /* If we have to reload this operand and some previous
2847 operand also had to match the same thing as this
2848 operand, we don't know how to do that. So reject this
2850 if (! win || force_reload)
2851 for (j = 0; j < i; j++)
2852 if (this_alternative_matches[j]
2853 == this_alternative_matches[i])
2859 /* All necessary reloads for an address_operand
2860 were handled in find_reloads_address. */
2861 this_alternative[i] = (int) BASE_REG_CLASS;
2868 if (GET_CODE (operand) == MEM
2869 || (GET_CODE (operand) == REG
2870 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2871 && reg_renumber[REGNO (operand)] < 0))
2873 if (CONSTANT_P (operand))
2879 if (GET_CODE (operand) == MEM
2880 && ! address_reloaded[i]
2881 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2882 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2887 if (GET_CODE (operand) == MEM
2888 && ! address_reloaded[i]
2889 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2890 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2894 /* Memory operand whose address is not offsettable. */
2898 if (GET_CODE (operand) == MEM
2899 && ! (ind_levels ? offsettable_memref_p (operand)
2900 : offsettable_nonstrict_memref_p (operand))
2901 /* Certain mem addresses will become offsettable
2902 after they themselves are reloaded. This is important;
2903 we don't want our own handling of unoffsettables
2904 to override the handling of reg_equiv_address. */
2905 && !(GET_CODE (XEXP (operand, 0)) == REG
2907 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
2911 /* Memory operand whose address is offsettable. */
2915 if ((GET_CODE (operand) == MEM
2916 /* If IND_LEVELS, find_reloads_address won't reload a
2917 pseudo that didn't get a hard reg, so we have to
2918 reject that case. */
2919 && (ind_levels ? offsettable_memref_p (operand)
2920 : offsettable_nonstrict_memref_p (operand)))
2921 /* A reloaded auto-increment address is offsettable,
2922 because it is now just a simple register indirect. */
2923 || (GET_CODE (operand) == MEM
2924 && address_reloaded[i]
2925 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2926 || GET_CODE (XEXP (operand, 0)) == PRE_DEC
2927 || GET_CODE (XEXP (operand, 0)) == POST_INC
2928 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2929 /* Certain mem addresses will become offsettable
2930 after they themselves are reloaded. This is important;
2931 we don't want our own handling of unoffsettables
2932 to override the handling of reg_equiv_address. */
2933 || (GET_CODE (operand) == MEM
2934 && GET_CODE (XEXP (operand, 0)) == REG
2936 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
2937 || (GET_CODE (operand) == REG
2938 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2939 && reg_renumber[REGNO (operand)] < 0
2940 /* If reg_equiv_address is nonzero, we will be
2941 loading it into a register; hence it will be
2942 offsettable, but we cannot say that reg_equiv_mem
2943 is offsettable without checking. */
2944 && ((reg_equiv_mem[REGNO (operand)] != 0
2945 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
2946 || (reg_equiv_address[REGNO (operand)] != 0))))
2948 if (CONSTANT_P (operand) || GET_CODE (operand) == MEM)
2955 /* Output operand that is stored before the need for the
2956 input operands (and their index registers) is over. */
2957 earlyclobber = 1, this_earlyclobber = 1;
2961 #ifndef REAL_ARITHMETIC
2962 /* Match any floating double constant, but only if
2963 we can examine the bits of it reliably. */
2964 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
2965 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
2966 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
2969 if (GET_CODE (operand) == CONST_DOUBLE)
2974 if (GET_CODE (operand) == CONST_DOUBLE)
2980 if (GET_CODE (operand) == CONST_DOUBLE
2981 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
2986 if (GET_CODE (operand) == CONST_INT
2987 || (GET_CODE (operand) == CONST_DOUBLE
2988 && GET_MODE (operand) == VOIDmode))
2991 if (CONSTANT_P (operand)
2992 #ifdef LEGITIMATE_PIC_OPERAND_P
2993 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3000 if (GET_CODE (operand) == CONST_INT
3001 || (GET_CODE (operand) == CONST_DOUBLE
3002 && GET_MODE (operand) == VOIDmode))
3014 if (GET_CODE (operand) == CONST_INT
3015 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3025 /* A PLUS is never a valid operand, but reload can make
3026 it from a register when eliminating registers. */
3027 && GET_CODE (operand) != PLUS
3028 /* A SCRATCH is not a valid operand. */
3029 && GET_CODE (operand) != SCRATCH
3030 #ifdef LEGITIMATE_PIC_OPERAND_P
3031 && (! CONSTANT_P (operand)
3033 || LEGITIMATE_PIC_OPERAND_P (operand))
3035 && (GENERAL_REGS == ALL_REGS
3036 || GET_CODE (operand) != REG
3037 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3038 && reg_renumber[REGNO (operand)] < 0)))
3040 /* Drop through into 'r' case */
3044 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3047 #ifdef EXTRA_CONSTRAINT
3053 if (EXTRA_CONSTRAINT (operand, c))
3060 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3063 if (GET_MODE (operand) == BLKmode)
3066 if (GET_CODE (operand) == REG
3067 && reg_fits_class_p (operand, this_alternative[i],
3068 offset, GET_MODE (recog_operand[i])))
3075 /* If this operand could be handled with a reg,
3076 and some reg is allowed, then this operand can be handled. */
3077 if (winreg && this_alternative[i] != (int) NO_REGS)
3080 /* Record which operands fit this alternative. */
3081 this_alternative_earlyclobber[i] = earlyclobber;
3082 if (win && ! force_reload)
3083 this_alternative_win[i] = 1;
3086 int const_to_mem = 0;
3088 this_alternative_offmemok[i] = offmemok;
3092 /* Alternative loses if it has no regs for a reg operand. */
3093 if (GET_CODE (operand) == REG
3094 && this_alternative[i] == (int) NO_REGS
3095 && this_alternative_matches[i] < 0)
3098 /* Alternative loses if it requires a type of reload not
3099 permitted for this insn. We can always reload SCRATCH
3100 and objects with a REG_UNUSED note. */
3101 if (GET_CODE (operand) != SCRATCH
3102 && modified[i] != RELOAD_READ && no_output_reloads
3103 && ! find_reg_note (insn, REG_UNUSED, operand))
3105 else if (modified[i] != RELOAD_WRITE && no_input_reloads)
3108 /* If this is a constant that is reloaded into the desired
3109 class by copying it to memory first, count that as another
3110 reload. This is consistent with other code and is
3111 required to avoid choosing another alternative when
3112 the constant is moved into memory by this function on
3113 an early reload pass. Note that the test here is
3114 precisely the same as in the code below that calls
3116 if (CONSTANT_P (operand)
3117 /* force_const_mem does not accept HIGH. */
3118 && GET_CODE (operand) != HIGH
3119 && (PREFERRED_RELOAD_CLASS (operand,
3120 (enum reg_class) this_alternative[i])
3122 && operand_mode[i] != VOIDmode)
3125 if (this_alternative[i] != (int) NO_REGS)
3129 /* If we can't reload this value at all, reject this
3130 alternative. Note that we could also lose due to
3131 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3134 if (! CONSTANT_P (operand)
3135 && (enum reg_class) this_alternative[i] != NO_REGS
3136 && (PREFERRED_RELOAD_CLASS (operand,
3137 (enum reg_class) this_alternative[i])
3141 /* We prefer to reload pseudos over reloading other things,
3142 since such reloads may be able to be eliminated later.
3143 If we are reloading a SCRATCH, we won't be generating any
3144 insns, just using a register, so it is also preferred.
3145 So bump REJECT in other cases. Don't do this in the
3146 case where we are forcing a constant into memory and
3147 it will then win since we don't want to have a different
3148 alternative match then. */
3149 if (! (GET_CODE (operand) == REG
3150 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3151 && GET_CODE (operand) != SCRATCH
3152 && ! (const_to_mem && constmemok))
3156 /* If this operand is a pseudo register that didn't get a hard
3157 reg and this alternative accepts some register, see if the
3158 class that we want is a subset of the preferred class for this
3159 register. If not, but it intersects that class, use the
3160 preferred class instead. If it does not intersect the preferred
3161 class, show that usage of this alternative should be discouraged;
3162 it will be discouraged more still if the register is `preferred
3163 or nothing'. We do this because it increases the chance of
3164 reusing our spill register in a later insn and avoiding a pair
3165 of memory stores and loads.
3167 Don't bother with this if this alternative will accept this
3170 Don't do this for a multiword operand, since it is only a
3171 small win and has the risk of requiring more spill registers,
3172 which could cause a large loss.
3174 Don't do this if the preferred class has only one register
3175 because we might otherwise exhaust the class. */
3178 if (! win && this_alternative[i] != (int) NO_REGS
3179 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3180 && reg_class_size[(int) preferred_class[i]] > 1)
3182 if (! reg_class_subset_p (this_alternative[i],
3183 preferred_class[i]))
3185 /* Since we don't have a way of forming the intersection,
3186 we just do something special if the preferred class
3187 is a subset of the class we have; that's the most
3188 common case anyway. */
3189 if (reg_class_subset_p (preferred_class[i],
3190 this_alternative[i]))
3191 this_alternative[i] = (int) preferred_class[i];
3193 reject += (1 + pref_or_nothing[i]);
3198 /* Now see if any output operands that are marked "earlyclobber"
3199 in this alternative conflict with any input operands
3200 or any memory addresses. */
3202 for (i = 0; i < noperands; i++)
3203 if (this_alternative_earlyclobber[i]
3204 && this_alternative_win[i])
3206 struct decomposition early_data;
3208 early_data = decompose (recog_operand[i]);
3210 if (modified[i] == RELOAD_READ)
3212 if (this_insn_is_asm)
3213 warning_for_asm (this_insn,
3214 "`&' constraint used with input operand");
3220 if (this_alternative[i] == NO_REGS)
3222 this_alternative_earlyclobber[i] = 0;
3223 if (this_insn_is_asm)
3224 error_for_asm (this_insn,
3225 "`&' constraint used with no register class");
3230 for (j = 0; j < noperands; j++)
3231 /* Is this an input operand or a memory ref? */
3232 if ((GET_CODE (recog_operand[j]) == MEM
3233 || modified[j] != RELOAD_WRITE)
3235 /* Ignore things like match_operator operands. */
3236 && *constraints1[j] != 0
3237 /* Don't count an input operand that is constrained to match
3238 the early clobber operand. */
3239 && ! (this_alternative_matches[j] == i
3240 && rtx_equal_p (recog_operand[i], recog_operand[j]))
3241 /* Is it altered by storing the earlyclobber operand? */
3242 && !immune_p (recog_operand[j], recog_operand[i], early_data))
3244 /* If the output is in a single-reg class,
3245 it's costly to reload it, so reload the input instead. */
3246 if (reg_class_size[this_alternative[i]] == 1
3247 && (GET_CODE (recog_operand[j]) == REG
3248 || GET_CODE (recog_operand[j]) == SUBREG))
3251 this_alternative_win[j] = 0;
3256 /* If an earlyclobber operand conflicts with something,
3257 it must be reloaded, so request this and count the cost. */
3261 this_alternative_win[i] = 0;
3262 for (j = 0; j < noperands; j++)
3263 if (this_alternative_matches[j] == i
3264 && this_alternative_win[j])
3266 this_alternative_win[j] = 0;
3272 /* If one alternative accepts all the operands, no reload required,
3273 choose that alternative; don't consider the remaining ones. */
3276 /* Unswap these so that they are never swapped at `finish'. */
3277 if (commutative >= 0)
3279 recog_operand[commutative] = substed_operand[commutative];
3280 recog_operand[commutative + 1]
3281 = substed_operand[commutative + 1];
3283 for (i = 0; i < noperands; i++)
3285 goal_alternative_win[i] = 1;
3286 goal_alternative[i] = this_alternative[i];
3287 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3288 goal_alternative_matches[i] = this_alternative_matches[i];
3289 goal_alternative_earlyclobber[i]
3290 = this_alternative_earlyclobber[i];
3292 goal_alternative_number = this_alternative_number;
3293 goal_alternative_swapped = swapped;
3294 goal_earlyclobber = this_earlyclobber;
3298 /* REJECT, set by the ! and ? constraint characters and when a register
3299 would be reloaded into a non-preferred class, discourages the use of
3300 this alternative for a reload goal. REJECT is incremented by three
3301 for each ? and one for each non-preferred class. */
3302 losers = losers * 3 + reject;
3304 /* If this alternative can be made to work by reloading,
3305 and it needs less reloading than the others checked so far,
3306 record it as the chosen goal for reloading. */
3307 if (! bad && best > losers)
3309 for (i = 0; i < noperands; i++)
3311 goal_alternative[i] = this_alternative[i];
3312 goal_alternative_win[i] = this_alternative_win[i];
3313 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3314 goal_alternative_matches[i] = this_alternative_matches[i];
3315 goal_alternative_earlyclobber[i]
3316 = this_alternative_earlyclobber[i];
3318 goal_alternative_swapped = swapped;
3320 goal_alternative_number = this_alternative_number;
3321 goal_earlyclobber = this_earlyclobber;
3325 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3326 then we need to try each alternative twice,
3327 the second time matching those two operands
3328 as if we had exchanged them.
3329 To do this, really exchange them in operands.
3331 If we have just tried the alternatives the second time,
3332 return operands to normal and drop through. */
3334 if (commutative >= 0)
3339 register enum reg_class tclass;
3342 recog_operand[commutative] = substed_operand[commutative + 1];
3343 recog_operand[commutative + 1] = substed_operand[commutative];
3345 tclass = preferred_class[commutative];
3346 preferred_class[commutative] = preferred_class[commutative + 1];
3347 preferred_class[commutative + 1] = tclass;
3349 t = pref_or_nothing[commutative];
3350 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3351 pref_or_nothing[commutative + 1] = t;
3353 bcopy ((char *) constraints1, (char *) constraints,
3354 noperands * sizeof (char *));
3359 recog_operand[commutative] = substed_operand[commutative];
3360 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3364 /* The operands don't meet the constraints.
3365 goal_alternative describes the alternative
3366 that we could reach by reloading the fewest operands.
3367 Reload so as to fit it. */
3369 if (best == MAX_RECOG_OPERANDS + 300)
3371 /* No alternative works with reloads?? */
3372 if (insn_code_number >= 0)
3374 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3375 /* Avoid further trouble with this insn. */
3376 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3381 /* Jump to `finish' from above if all operands are valid already.
3382 In that case, goal_alternative_win is all 1. */
3385 /* Right now, for any pair of operands I and J that are required to match,
3387 goal_alternative_matches[J] is I.
3388 Set up goal_alternative_matched as the inverse function:
3389 goal_alternative_matched[I] = J. */
3391 for (i = 0; i < noperands; i++)
3392 goal_alternative_matched[i] = -1;
3394 for (i = 0; i < noperands; i++)
3395 if (! goal_alternative_win[i]
3396 && goal_alternative_matches[i] >= 0)
3397 goal_alternative_matched[goal_alternative_matches[i]] = i;
3399 /* If the best alternative is with operands 1 and 2 swapped,
3400 consider them swapped before reporting the reloads. Update the
3401 operand numbers of any reloads already pushed. */
3403 if (goal_alternative_swapped)
3407 tem = substed_operand[commutative];
3408 substed_operand[commutative] = substed_operand[commutative + 1];
3409 substed_operand[commutative + 1] = tem;
3410 tem = recog_operand[commutative];
3411 recog_operand[commutative] = recog_operand[commutative + 1];
3412 recog_operand[commutative + 1] = tem;
3414 for (i = 0; i < n_reloads; i++)
3416 if (reload_opnum[i] == commutative)
3417 reload_opnum[i] = commutative + 1;
3418 else if (reload_opnum[i] == commutative + 1)
3419 reload_opnum[i] = commutative;
3423 /* Perform whatever substitutions on the operands we are supposed
3424 to make due to commutativity or replacement of registers
3425 with equivalent constants or memory slots. */
3427 for (i = 0; i < noperands; i++)
3429 *recog_operand_loc[i] = substed_operand[i];
3430 /* While we are looping on operands, initialize this. */
3431 operand_reloadnum[i] = -1;
3433 /* If this is an earlyclobber operand, we need to widen the scope.
3434 The reload must remain valid from the start of the insn being
3435 reloaded until after the operand is stored into its destination.
3436 We approximate this with RELOAD_OTHER even though we know that we
3437 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3439 One special case that is worth checking is when we have an
3440 output that is earlyclobber but isn't used past the insn (typically
3441 a SCRATCH). In this case, we only need have the reload live
3442 through the insn itself, but not for any of our input or output
3445 In any case, anything needed to address this operand can remain
3446 however they were previously categorized. */
3448 if (goal_alternative_earlyclobber[i])
3450 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3451 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3454 /* Any constants that aren't allowed and can't be reloaded
3455 into registers are here changed into memory references. */
3456 for (i = 0; i < noperands; i++)
3457 if (! goal_alternative_win[i]
3458 && CONSTANT_P (recog_operand[i])
3459 /* force_const_mem does not accept HIGH. */
3460 && GET_CODE (recog_operand[i]) != HIGH
3461 && (PREFERRED_RELOAD_CLASS (recog_operand[i],
3462 (enum reg_class) goal_alternative[i])
3464 && operand_mode[i] != VOIDmode)
3466 *recog_operand_loc[i] = recog_operand[i]
3467 = find_reloads_toplev (force_const_mem (operand_mode[i],
3469 i, address_type[i], ind_levels, 0);
3470 if (alternative_allows_memconst (constraints1[i],
3471 goal_alternative_number))
3472 goal_alternative_win[i] = 1;
3475 /* Record the values of the earlyclobber operands for the caller. */
3476 if (goal_earlyclobber)
3477 for (i = 0; i < noperands; i++)
3478 if (goal_alternative_earlyclobber[i])
3479 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3481 /* Now record reloads for all the operands that need them. */
3482 for (i = 0; i < noperands; i++)
3483 if (! goal_alternative_win[i])
3485 /* Operands that match previous ones have already been handled. */
3486 if (goal_alternative_matches[i] >= 0)
3488 /* Handle an operand with a nonoffsettable address
3489 appearing where an offsettable address will do
3490 by reloading the address into a base register.
3492 ??? We can also do this when the operand is a register and
3493 reg_equiv_mem is not offsettable, but this is a bit tricky,
3494 so we don't bother with it. It may not be worth doing. */
3495 else if (goal_alternative_matched[i] == -1
3496 && goal_alternative_offmemok[i]
3497 && GET_CODE (recog_operand[i]) == MEM)
3499 operand_reloadnum[i]
3500 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3501 &XEXP (recog_operand[i], 0), NULL_PTR,
3502 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3503 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3504 reload_inc[operand_reloadnum[i]]
3505 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3507 /* If this operand is an output, we will have made any
3508 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3509 now we are treating part of the operand as an input, so
3510 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3512 if (modified[i] == RELOAD_WRITE)
3513 for (j = 0; j < n_reloads; j++)
3514 if (reload_opnum[j] == i
3515 && reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3516 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3518 else if (goal_alternative_matched[i] == -1)
3519 operand_reloadnum[i] =
3520 push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3521 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3522 (modified[i] != RELOAD_WRITE ?
3523 recog_operand_loc[i] : 0),
3524 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3525 (enum reg_class) goal_alternative[i],
3526 (modified[i] == RELOAD_WRITE
3527 ? VOIDmode : operand_mode[i]),
3528 (modified[i] == RELOAD_READ
3529 ? VOIDmode : operand_mode[i]),
3530 (insn_code_number < 0 ? 0
3531 : insn_operand_strict_low[insn_code_number][i]),
3532 0, i, operand_type[i]);
3533 /* In a matching pair of operands, one must be input only
3534 and the other must be output only.
3535 Pass the input operand as IN and the other as OUT. */
3536 else if (modified[i] == RELOAD_READ
3537 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3539 operand_reloadnum[i]
3540 = push_reload (recog_operand[i],
3541 recog_operand[goal_alternative_matched[i]],
3542 recog_operand_loc[i],
3543 recog_operand_loc[goal_alternative_matched[i]],
3544 (enum reg_class) goal_alternative[i],
3546 operand_mode[goal_alternative_matched[i]],
3547 0, 0, i, RELOAD_OTHER);
3548 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3550 else if (modified[i] == RELOAD_WRITE
3551 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3553 operand_reloadnum[goal_alternative_matched[i]]
3554 = push_reload (recog_operand[goal_alternative_matched[i]],
3556 recog_operand_loc[goal_alternative_matched[i]],
3557 recog_operand_loc[i],
3558 (enum reg_class) goal_alternative[i],
3559 operand_mode[goal_alternative_matched[i]],
3561 0, 0, i, RELOAD_OTHER);
3562 operand_reloadnum[i] = output_reloadnum;
3564 else if (insn_code_number >= 0)
3568 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3569 /* Avoid further trouble with this insn. */
3570 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3575 else if (goal_alternative_matched[i] < 0
3576 && goal_alternative_matches[i] < 0
3579 /* For each non-matching operand that's a MEM or a pseudo-register
3580 that didn't get a hard register, make an optional reload.
3581 This may get done even if the insn needs no reloads otherwise. */
3583 rtx operand = recog_operand[i];
3585 while (GET_CODE (operand) == SUBREG)
3586 operand = XEXP (operand, 0);
3587 if ((GET_CODE (operand) == MEM
3588 || (GET_CODE (operand) == REG
3589 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3590 && (enum reg_class) goal_alternative[i] != NO_REGS
3591 && ! no_input_reloads
3592 /* Optional output reloads don't do anything and we mustn't
3593 make in-out reloads on insns that are not permitted output
3595 && (modified[i] == RELOAD_READ
3596 || (modified[i] == RELOAD_READ_WRITE && ! no_output_reloads)))
3597 operand_reloadnum[i]
3598 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3599 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3600 (modified[i] != RELOAD_WRITE
3601 ? recog_operand_loc[i] : 0),
3602 (modified[i] != RELOAD_READ
3603 ? recog_operand_loc[i] : 0),
3604 (enum reg_class) goal_alternative[i],
3605 (modified[i] == RELOAD_WRITE
3606 ? VOIDmode : operand_mode[i]),
3607 (modified[i] == RELOAD_READ
3608 ? VOIDmode : operand_mode[i]),
3609 (insn_code_number < 0 ? 0
3610 : insn_operand_strict_low[insn_code_number][i]),
3611 1, i, operand_type[i]);
3613 else if (goal_alternative_matches[i] >= 0
3614 && goal_alternative_win[goal_alternative_matches[i]]
3615 && modified[i] == RELOAD_READ
3616 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3617 && ! no_input_reloads && ! no_output_reloads
3620 /* Similarly, make an optional reload for a pair of matching
3621 objects that are in MEM or a pseudo that didn't get a hard reg. */
3623 rtx operand = recog_operand[i];
3625 while (GET_CODE (operand) == SUBREG)
3626 operand = XEXP (operand, 0);
3627 if ((GET_CODE (operand) == MEM
3628 || (GET_CODE (operand) == REG
3629 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3630 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3632 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3633 = push_reload (recog_operand[goal_alternative_matches[i]],
3635 recog_operand_loc[goal_alternative_matches[i]],
3636 recog_operand_loc[i],
3637 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3638 operand_mode[goal_alternative_matches[i]],
3640 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3643 /* If this insn pattern contains any MATCH_DUP's, make sure that
3644 they will be substituted if the operands they match are substituted.
3645 Also do now any substitutions we already did on the operands.
3647 Don't do this if we aren't making replacements because we might be
3648 propagating things allocated by frame pointer elimination into places
3649 it doesn't expect. */
3651 if (insn_code_number >= 0 && replace)
3652 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3654 int opno = recog_dup_num[i];
3655 *recog_dup_loc[i] = *recog_operand_loc[opno];
3656 if (operand_reloadnum[opno] >= 0)
3657 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3658 insn_operand_mode[insn_code_number][opno]);
3662 /* This loses because reloading of prior insns can invalidate the equivalence
3663 (or at least find_equiv_reg isn't smart enough to find it any more),
3664 causing this insn to need more reload regs than it needed before.
3665 It may be too late to make the reload regs available.
3666 Now this optimization is done safely in choose_reload_regs. */
3668 /* For each reload of a reg into some other class of reg,
3669 search for an existing equivalent reg (same value now) in the right class.
3670 We can use it as long as we don't need to change its contents. */
3671 for (i = 0; i < n_reloads; i++)
3672 if (reload_reg_rtx[i] == 0
3673 && reload_in[i] != 0
3674 && GET_CODE (reload_in[i]) == REG
3675 && reload_out[i] == 0)
3678 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3679 static_reload_reg_p, 0, reload_inmode[i]);
3680 /* Prevent generation of insn to load the value
3681 because the one we found already has the value. */
3682 if (reload_reg_rtx[i])
3683 reload_in[i] = reload_reg_rtx[i];
3687 /* Perhaps an output reload can be combined with another
3688 to reduce needs by one. */
3689 if (!goal_earlyclobber)
3692 /* If we have a pair of reloads for parts of an address, they are reloading
3693 the same object, the operands themselves were not reloaded, and they
3694 are for two operands that are supposed to match, merge the reloads and
3695 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3697 for (i = 0; i < n_reloads; i++)
3701 for (j = i + 1; j < n_reloads; j++)
3702 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3703 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3704 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3705 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3706 && rtx_equal_p (reload_in[i], reload_in[j])
3707 && (operand_reloadnum[reload_opnum[i]] < 0
3708 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3709 && (operand_reloadnum[reload_opnum[j]] < 0
3710 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3711 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3712 || (goal_alternative_matches[reload_opnum[j]]
3713 == reload_opnum[i])))
3715 for (k = 0; k < n_replacements; k++)
3716 if (replacements[k].what == j)
3717 replacements[k].what = i;
3719 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3724 /* Scan all the reloads and update their type.
3725 If a reload is for the address of an operand and we didn't reload
3726 that operand, change the type. Similarly, change the operand number
3727 of a reload when two operands match. If a reload is optional, treat it
3728 as though the operand isn't reloaded.
3730 ??? This latter case is somewhat odd because if we do the optional
3731 reload, it means the object is hanging around. Thus we need only
3732 do the address reload if the optional reload was NOT done.
3734 Change secondary reloads to be the address type of their operand, not
3737 If an operand's reload is now RELOAD_OTHER, change any
3738 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3739 RELOAD_FOR_OTHER_ADDRESS. */
3741 for (i = 0; i < n_reloads; i++)
3743 if (reload_secondary_p[i]
3744 && reload_when_needed[i] == operand_type[reload_opnum[i]])
3745 reload_when_needed[i] = address_type[reload_opnum[i]];
3747 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3748 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3749 && (operand_reloadnum[reload_opnum[i]] < 0
3750 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
3752 /* If we have a secondary reload to go along with this reload,
3753 change its type to RELOAD_FOR_OPADDR_ADDR. */
3755 if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3756 && reload_secondary_in_reload[i] != -1)
3758 int secondary_in_reload = reload_secondary_in_reload[i];
3760 reload_when_needed[secondary_in_reload] =
3761 RELOAD_FOR_OPADDR_ADDR;
3763 /* If there's a tertiary reload we have to change it also. */
3764 if (secondary_in_reload > 0
3765 && reload_secondary_in_reload[secondary_in_reload] != -1)
3766 reload_when_needed[reload_secondary_in_reload[secondary_in_reload]]
3767 = RELOAD_FOR_OPADDR_ADDR;
3770 if (reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3771 && reload_secondary_out_reload[i] != -1)
3773 int secondary_out_reload = reload_secondary_out_reload[i];
3775 reload_when_needed[secondary_out_reload] =
3776 RELOAD_FOR_OPADDR_ADDR;
3778 /* If there's a tertiary reload we have to change it also. */
3779 if (secondary_out_reload
3780 && reload_secondary_out_reload[secondary_out_reload] != -1)
3781 reload_when_needed[reload_secondary_out_reload[secondary_out_reload]]
3782 = RELOAD_FOR_OPADDR_ADDR;
3784 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3787 if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3788 && operand_reloadnum[reload_opnum[i]] >= 0
3789 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
3791 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
3793 if (goal_alternative_matches[reload_opnum[i]] >= 0)
3794 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
3797 /* See if we have any reloads that are now allowed to be merged
3798 because we've changed when the reload is needed to
3799 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3800 check for the most common cases. */
3802 for (i = 0; i < n_reloads; i++)
3803 if (reload_in[i] != 0 && reload_out[i] == 0
3804 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
3805 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
3806 for (j = 0; j < n_reloads; j++)
3807 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
3808 && reload_when_needed[j] == reload_when_needed[i]
3809 && MATCHES (reload_in[i], reload_in[j])
3810 && reload_reg_class[i] == reload_reg_class[j]
3811 && !reload_nocombine[i] && !reload_nocombine[j]
3812 && reload_reg_rtx[i] == reload_reg_rtx[j])
3814 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
3815 transfer_replacements (i, j);
3819 #else /* no REGISTER_CONSTRAINTS */
3821 int insn_code_number;
3822 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
3824 rtx body = PATTERN (insn);
3828 n_earlyclobbers = 0;
3829 replace_reloads = replace;
3832 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3833 Store the operand values in RECOG_OPERAND and the locations
3834 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3835 Return if the insn needs no reload processing. */
3837 switch (GET_CODE (body))
3848 noperands = asm_noperands (body);
3851 /* This insn is an `asm' with operands.
3852 First, find out how many operands, and allocate space. */
3854 insn_code_number = -1;
3855 /* ??? This is a bug! ???
3856 Give up and delete this insn if it has too many operands. */
3857 if (noperands > MAX_RECOG_OPERANDS)
3860 /* Now get the operand values out of the insn. */
3862 decode_asm_operands (body, recog_operand, recog_operand_loc,
3863 NULL_PTR, NULL_PTR);
3868 /* Ordinary insn: recognize it, allocate space for operands and
3869 constraints, and get them out via insn_extract. */
3871 insn_code_number = recog_memoized (insn);
3872 noperands = insn_n_operands[insn_code_number];
3873 insn_extract (insn);
3879 for (i = 0; i < noperands; i++)
3881 register RTX_CODE code = GET_CODE (recog_operand[i]);
3882 int is_set_dest = GET_CODE (body) == SET && (i == 0);
3884 if (insn_code_number >= 0)
3885 if (insn_operand_address_p[insn_code_number][i])
3886 find_reloads_address (VOIDmode, NULL_PTR,
3887 recog_operand[i], recog_operand_loc[i],
3888 i, RELOAD_FOR_INPUT, ind_levels);
3890 /* In these cases, we can't tell if the operand is an input
3891 or an output, so be conservative. In practice it won't be
3895 find_reloads_address (GET_MODE (recog_operand[i]),
3896 recog_operand_loc[i],
3897 XEXP (recog_operand[i], 0),
3898 &XEXP (recog_operand[i], 0),
3899 i, RELOAD_OTHER, ind_levels);
3901 recog_operand[i] = *recog_operand_loc[i]
3902 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
3903 ind_levels, is_set_dest);
3906 register int regno = REGNO (recog_operand[i]);
3907 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3908 recog_operand[i] = *recog_operand_loc[i]
3909 = reg_equiv_constant[regno];
3910 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3911 that feeds this insn. */
3912 if (reg_equiv_mem[regno] != 0)
3913 recog_operand[i] = *recog_operand_loc[i]
3914 = reg_equiv_mem[regno];
3919 /* Perhaps an output reload can be combined with another
3920 to reduce needs by one. */
3921 if (!goal_earlyclobber)
3923 #endif /* no REGISTER_CONSTRAINTS */
3926 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3927 accepts a memory operand with constant address. */
3930 alternative_allows_memconst (constraint, altnum)
3935 /* Skip alternatives before the one requested. */
3938 while (*constraint++ != ',');
3941 /* Scan the requested alternative for 'm' or 'o'.
3942 If one of them is present, this alternative accepts memory constants. */
3943 while ((c = *constraint++) && c != ',' && c != '#')
3944 if (c == 'm' || c == 'o')
3949 /* Scan X for memory references and scan the addresses for reloading.
3950 Also checks for references to "constant" regs that we want to eliminate
3951 and replaces them with the values they stand for.
3952 We may alter X destructively if it contains a reference to such.
3953 If X is just a constant reg, we return the equivalent value
3956 IND_LEVELS says how many levels of indirect addressing this machine
3959 OPNUM and TYPE identify the purpose of the reload.
3961 IS_SET_DEST is true if X is the destination of a SET, which is not
3962 appropriate to be replaced by a constant. */
3965 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest)
3968 enum reload_type type;
3972 register RTX_CODE code = GET_CODE (x);
3974 register char *fmt = GET_RTX_FORMAT (code);
3979 /* This code is duplicated for speed in find_reloads. */
3980 register int regno = REGNO (x);
3981 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3982 x = reg_equiv_constant[regno];
3984 /* This creates (subreg (mem...)) which would cause an unnecessary
3985 reload of the mem. */
3986 else if (reg_equiv_mem[regno] != 0)
3987 x = reg_equiv_mem[regno];
3989 else if (reg_equiv_address[regno] != 0)
3991 /* If reg_equiv_address varies, it may be shared, so copy it. */
3992 /* We must rerun eliminate_regs, in case the elimination
3993 offsets have changed. */
3994 rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
3998 if (rtx_varies_p (addr))
3999 addr = copy_rtx (addr);
4001 x = gen_rtx (MEM, GET_MODE (x), addr);
4002 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4003 find_reloads_address (GET_MODE (x), NULL_PTR,
4005 &XEXP (x, 0), opnum, type, ind_levels);
4012 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4013 opnum, type, ind_levels);
4017 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4019 /* Check for SUBREG containing a REG that's equivalent to a constant.
4020 If the constant has a known value, truncate it right now.
4021 Similarly if we are extracting a single-word of a multi-word
4022 constant. If the constant is symbolic, allow it to be substituted
4023 normally. push_reload will strip the subreg later. If the
4024 constant is VOIDmode, abort because we will lose the mode of
4025 the register (this should never happen because one of the cases
4026 above should handle it). */
4028 register int regno = REGNO (SUBREG_REG (x));
4031 if (subreg_lowpart_p (x)
4032 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4033 && reg_equiv_constant[regno] != 0
4034 && (tem = gen_lowpart_common (GET_MODE (x),
4035 reg_equiv_constant[regno])) != 0)
4038 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4039 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4040 && reg_equiv_constant[regno] != 0
4041 && (tem = operand_subword (reg_equiv_constant[regno],
4043 GET_MODE (SUBREG_REG (x)))) != 0)
4046 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4047 && reg_equiv_constant[regno] != 0
4048 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4051 /* If the subreg contains a reg that will be converted to a mem,
4052 convert the subreg to a narrower memref now.
4053 Otherwise, we would get (subreg (mem ...) ...),
4054 which would force reload of the mem.
4056 We also need to do this if there is an equivalent MEM that is
4057 not offsettable. In that case, alter_subreg would produce an
4058 invalid address on big-endian machines.
4060 For machines that extend byte loads, we must not reload using
4061 a wider mode if we have a paradoxical SUBREG. find_reloads will
4062 force a reload in that case. So we should not do anything here. */
4064 else if (regno >= FIRST_PSEUDO_REGISTER
4065 #ifdef LOAD_EXTEND_OP
4066 && (GET_MODE_SIZE (GET_MODE (x))
4067 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4069 && (reg_equiv_address[regno] != 0
4070 || (reg_equiv_mem[regno] != 0
4071 && (! strict_memory_address_p (GET_MODE (x),
4072 XEXP (reg_equiv_mem[regno], 0))
4073 || ! offsettable_memref_p (reg_equiv_mem[regno])))))
4075 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
4076 /* We must rerun eliminate_regs, in case the elimination
4077 offsets have changed. */
4078 rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
4081 if (BYTES_BIG_ENDIAN)
4084 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
4085 offset += MIN (size, UNITS_PER_WORD);
4086 size = GET_MODE_SIZE (GET_MODE (x));
4087 offset -= MIN (size, UNITS_PER_WORD);
4089 addr = plus_constant (addr, offset);
4090 x = gen_rtx (MEM, GET_MODE (x), addr);
4091 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4092 find_reloads_address (GET_MODE (x), NULL_PTR,
4094 &XEXP (x, 0), opnum, type, ind_levels);
4099 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4102 XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
4103 ind_levels, is_set_dest);
4108 /* Return a mem ref for the memory equivalent of reg REGNO.
4109 This mem ref is not shared with anything. */
4112 make_memloc (ad, regno)
4117 /* We must rerun eliminate_regs, in case the elimination
4118 offsets have changed. */
4119 rtx tem = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX),
4122 #if 0 /* We cannot safely reuse a memloc made here;
4123 if the pseudo appears twice, and its mem needs a reload,
4124 it gets two separate reloads assigned, but it only
4125 gets substituted with the second of them;
4126 then it can get used before that reload reg gets loaded up. */
4127 for (i = 0; i < n_memlocs; i++)
4128 if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
4132 /* If TEM might contain a pseudo, we must copy it to avoid
4133 modifying it when we do the substitution for the reload. */
4134 if (rtx_varies_p (tem))
4135 tem = copy_rtx (tem);
4137 tem = gen_rtx (MEM, GET_MODE (ad), tem);
4138 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4139 memlocs[n_memlocs++] = tem;
4143 /* Record all reloads needed for handling memory address AD
4144 which appears in *LOC in a memory reference to mode MODE
4145 which itself is found in location *MEMREFLOC.
4146 Note that we take shortcuts assuming that no multi-reg machine mode
4147 occurs as part of an address.
4149 OPNUM and TYPE specify the purpose of this reload.
4151 IND_LEVELS says how many levels of indirect addressing this machine
4154 Value is nonzero if this address is reloaded or replaced as a whole.
4155 This is interesting to the caller if the address is an autoincrement.
4157 Note that there is no verification that the address will be valid after
4158 this routine does its work. Instead, we rely on the fact that the address
4159 was valid when reload started. So we need only undo things that reload
4160 could have broken. These are wrong register types, pseudos not allocated
4161 to a hard register, and frame pointer elimination. */
4164 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels)
4165 enum machine_mode mode;
4170 enum reload_type type;
4176 /* If the address is a register, see if it is a legitimate address and
4177 reload if not. We first handle the cases where we need not reload
4178 or where we must reload in a non-standard way. */
4180 if (GET_CODE (ad) == REG)
4184 if (reg_equiv_constant[regno] != 0
4185 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4187 *loc = ad = reg_equiv_constant[regno];
4191 else if (reg_equiv_address[regno] != 0)
4193 tem = make_memloc (ad, regno);
4194 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4195 &XEXP (tem, 0), opnum, type, ind_levels);
4196 push_reload (tem, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4197 GET_MODE (ad), VOIDmode, 0, 0,
4202 /* We can avoid a reload if the register's equivalent memory expression
4203 is valid as an indirect memory address.
4204 But not all addresses are valid in a mem used as an indirect address:
4205 only reg or reg+constant. */
4207 else if (reg_equiv_mem[regno] != 0 && ind_levels > 0
4208 && strict_memory_address_p (mode, reg_equiv_mem[regno])
4209 && (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == REG
4210 || (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == PLUS
4211 && GET_CODE (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)) == REG
4212 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem[regno], 0), 1)))))
4215 /* The only remaining case where we can avoid a reload is if this is a
4216 hard register that is valid as a base register and which is not the
4217 subject of a CLOBBER in this insn. */
4219 else if (regno < FIRST_PSEUDO_REGISTER && REGNO_OK_FOR_BASE_P (regno)
4220 && ! regno_clobbered_p (regno, this_insn))
4223 /* If we do not have one of the cases above, we must do the reload. */
4224 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4225 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4229 if (strict_memory_address_p (mode, ad))
4231 /* The address appears valid, so reloads are not needed.
4232 But the address may contain an eliminable register.
4233 This can happen because a machine with indirect addressing
4234 may consider a pseudo register by itself a valid address even when
4235 it has failed to get a hard reg.
4236 So do a tree-walk to find and eliminate all such regs. */
4238 /* But first quickly dispose of a common case. */
4239 if (GET_CODE (ad) == PLUS
4240 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4241 && GET_CODE (XEXP (ad, 0)) == REG
4242 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4245 subst_reg_equivs_changed = 0;
4246 *loc = subst_reg_equivs (ad);
4248 if (! subst_reg_equivs_changed)
4251 /* Check result for validity after substitution. */
4252 if (strict_memory_address_p (mode, ad))
4256 /* The address is not valid. We have to figure out why. One possibility
4257 is that it is itself a MEM. This can happen when the frame pointer is
4258 being eliminated, a pseudo is not allocated to a hard register, and the
4259 offset between the frame and stack pointers is not its initial value.
4260 In that case the pseudo will have been replaced by a MEM referring to
4261 the stack pointer. */
4262 if (GET_CODE (ad) == MEM)
4264 /* First ensure that the address in this MEM is valid. Then, unless
4265 indirect addresses are valid, reload the MEM into a register. */
4267 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4268 opnum, type, ind_levels == 0 ? 0 : ind_levels - 1);
4270 /* If tem was changed, then we must create a new memory reference to
4271 hold it and store it back into memrefloc. */
4272 if (tem != ad && memrefloc)
4274 *memrefloc = copy_rtx (*memrefloc);
4275 copy_replacements (tem, XEXP (*memrefloc, 0));
4276 loc = &XEXP (*memrefloc, 0);
4279 /* Check similar cases as for indirect addresses as above except
4280 that we can allow pseudos and a MEM since they should have been
4281 taken care of above. */
4284 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4285 || GET_CODE (XEXP (tem, 0)) == MEM
4286 || ! (GET_CODE (XEXP (tem, 0)) == REG
4287 || (GET_CODE (XEXP (tem, 0)) == PLUS
4288 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4289 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4291 /* Must use TEM here, not AD, since it is the one that will
4292 have any subexpressions reloaded, if needed. */
4293 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4294 BASE_REG_CLASS, GET_MODE (tem), VOIDmode, 0,
4302 /* If we have address of a stack slot but it's not valid because the
4303 displacement is too large, compute the sum in a register.
4304 Handle all base registers here, not just fp/ap/sp, because on some
4305 targets (namely SH) we can also get too large displacements from
4306 big-endian corrections. */
4307 else if (GET_CODE (ad) == PLUS
4308 && GET_CODE (XEXP (ad, 0)) == REG
4309 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4310 && REG_OK_FOR_BASE_P (XEXP (ad, 0))
4311 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4313 /* Unshare the MEM rtx so we can safely alter it. */
4316 *memrefloc = copy_rtx (*memrefloc);
4317 loc = &XEXP (*memrefloc, 0);
4319 if (double_reg_address_ok)
4321 /* Unshare the sum as well. */
4322 *loc = ad = copy_rtx (ad);
4323 /* Reload the displacement into an index reg.
4324 We assume the frame pointer or arg pointer is a base reg. */
4325 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4326 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4331 /* If the sum of two regs is not necessarily valid,
4332 reload the sum into a base reg.
4333 That will at least work. */
4334 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode,
4335 opnum, type, ind_levels);
4340 /* If we have an indexed stack slot, there are three possible reasons why
4341 it might be invalid: The index might need to be reloaded, the address
4342 might have been made by frame pointer elimination and hence have a
4343 constant out of range, or both reasons might apply.
4345 We can easily check for an index needing reload, but even if that is the
4346 case, we might also have an invalid constant. To avoid making the
4347 conservative assumption and requiring two reloads, we see if this address
4348 is valid when not interpreted strictly. If it is, the only problem is
4349 that the index needs a reload and find_reloads_address_1 will take care
4352 There is still a case when we might generate an extra reload,
4353 however. In certain cases eliminate_regs will return a MEM for a REG
4354 (see the code there for details). In those cases, memory_address_p
4355 applied to our address will return 0 so we will think that our offset
4356 must be too large. But it might indeed be valid and the only problem
4357 is that a MEM is present where a REG should be. This case should be
4358 very rare and there doesn't seem to be any way to avoid it.
4360 If we decide to do something here, it must be that
4361 `double_reg_address_ok' is true and that this address rtl was made by
4362 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4363 rework the sum so that the reload register will be added to the index.
4364 This is safe because we know the address isn't shared.
4366 We check for fp/ap/sp as both the first and second operand of the
4369 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4370 && GET_CODE (XEXP (ad, 0)) == PLUS
4371 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4372 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4373 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4375 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4376 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4378 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4379 && ! memory_address_p (mode, ad))
4381 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4382 plus_constant (XEXP (XEXP (ad, 0), 0),
4383 INTVAL (XEXP (ad, 1))),
4384 XEXP (XEXP (ad, 0), 1));
4385 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4386 GET_MODE (ad), opnum, type, ind_levels);
4387 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0);
4392 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4393 && GET_CODE (XEXP (ad, 0)) == PLUS
4394 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4395 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4396 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4398 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4399 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4401 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4402 && ! memory_address_p (mode, ad))
4404 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4405 XEXP (XEXP (ad, 0), 0),
4406 plus_constant (XEXP (XEXP (ad, 0), 1),
4407 INTVAL (XEXP (ad, 1))));
4408 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS,
4409 GET_MODE (ad), opnum, type, ind_levels);
4410 find_reloads_address_1 (XEXP (ad, 0), 1, &XEXP (ad, 0), opnum, type, 0);
4415 /* See if address becomes valid when an eliminable register
4416 in a sum is replaced. */
4419 if (GET_CODE (ad) == PLUS)
4420 tem = subst_indexed_address (ad);
4421 if (tem != ad && strict_memory_address_p (mode, tem))
4423 /* Ok, we win that way. Replace any additional eliminable
4426 subst_reg_equivs_changed = 0;
4427 tem = subst_reg_equivs (tem);
4429 /* Make sure that didn't make the address invalid again. */
4431 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4438 /* If constants aren't valid addresses, reload the constant address
4440 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4442 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4443 Unshare it so we can safely alter it. */
4444 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4445 && CONSTANT_POOL_ADDRESS_P (ad))
4447 *memrefloc = copy_rtx (*memrefloc);
4448 loc = &XEXP (*memrefloc, 0);
4451 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4456 return find_reloads_address_1 (ad, 0, loc, opnum, type, ind_levels);
4459 /* Find all pseudo regs appearing in AD
4460 that are eliminable in favor of equivalent values
4461 and do not have hard regs; replace them by their equivalents. */
4464 subst_reg_equivs (ad)
4467 register RTX_CODE code = GET_CODE (ad);
4485 register int regno = REGNO (ad);
4487 if (reg_equiv_constant[regno] != 0)
4489 subst_reg_equivs_changed = 1;
4490 return reg_equiv_constant[regno];
4496 /* Quickly dispose of a common case. */
4497 if (XEXP (ad, 0) == frame_pointer_rtx
4498 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4502 fmt = GET_RTX_FORMAT (code);
4503 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4505 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
4509 /* Compute the sum of X and Y, making canonicalizations assumed in an
4510 address, namely: sum constant integers, surround the sum of two
4511 constants with a CONST, put the constant as the second operand, and
4512 group the constant on the outermost sum.
4514 This routine assumes both inputs are already in canonical form. */
4521 enum machine_mode mode = GET_MODE (x);
4523 if (mode == VOIDmode)
4524 mode = GET_MODE (y);
4526 if (mode == VOIDmode)
4529 if (GET_CODE (x) == CONST_INT)
4530 return plus_constant (y, INTVAL (x));
4531 else if (GET_CODE (y) == CONST_INT)
4532 return plus_constant (x, INTVAL (y));
4533 else if (CONSTANT_P (x))
4534 tem = x, x = y, y = tem;
4536 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
4537 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
4539 /* Note that if the operands of Y are specified in the opposite
4540 order in the recursive calls below, infinite recursion will occur. */
4541 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
4542 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
4544 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4545 constant will have been placed second. */
4546 if (CONSTANT_P (x) && CONSTANT_P (y))
4548 if (GET_CODE (x) == CONST)
4550 if (GET_CODE (y) == CONST)
4553 return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, mode, x, y));
4556 return gen_rtx (PLUS, mode, x, y);
4559 /* If ADDR is a sum containing a pseudo register that should be
4560 replaced with a constant (from reg_equiv_constant),
4561 return the result of doing so, and also apply the associative
4562 law so that the result is more likely to be a valid address.
4563 (But it is not guaranteed to be one.)
4565 Note that at most one register is replaced, even if more are
4566 replaceable. Also, we try to put the result into a canonical form
4567 so it is more likely to be a valid address.
4569 In all other cases, return ADDR. */
4572 subst_indexed_address (addr)
4575 rtx op0 = 0, op1 = 0, op2 = 0;
4579 if (GET_CODE (addr) == PLUS)
4581 /* Try to find a register to replace. */
4582 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
4583 if (GET_CODE (op0) == REG
4584 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
4585 && reg_renumber[regno] < 0
4586 && reg_equiv_constant[regno] != 0)
4587 op0 = reg_equiv_constant[regno];
4588 else if (GET_CODE (op1) == REG
4589 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
4590 && reg_renumber[regno] < 0
4591 && reg_equiv_constant[regno] != 0)
4592 op1 = reg_equiv_constant[regno];
4593 else if (GET_CODE (op0) == PLUS
4594 && (tem = subst_indexed_address (op0)) != op0)
4596 else if (GET_CODE (op1) == PLUS
4597 && (tem = subst_indexed_address (op1)) != op1)
4602 /* Pick out up to three things to add. */
4603 if (GET_CODE (op1) == PLUS)
4604 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
4605 else if (GET_CODE (op0) == PLUS)
4606 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4608 /* Compute the sum. */
4610 op1 = form_sum (op1, op2);
4612 op0 = form_sum (op0, op1);
4619 /* Record the pseudo registers we must reload into hard registers
4620 in a subexpression of a would-be memory address, X.
4621 (This function is not called if the address we find is strictly valid.)
4622 CONTEXT = 1 means we are considering regs as index regs,
4623 = 0 means we are considering them as base regs.
4625 OPNUM and TYPE specify the purpose of any reloads made.
4627 IND_LEVELS says how many levels of indirect addressing are
4628 supported at this point in the address.
4630 We return nonzero if X, as a whole, is reloaded or replaced. */
4632 /* Note that we take shortcuts assuming that no multi-reg machine mode
4633 occurs as part of an address.
4634 Also, this is not fully machine-customizable; it works for machines
4635 such as vaxes and 68000's and 32000's, but other possible machines
4636 could have addressing modes that this does not handle right. */
4639 find_reloads_address_1 (x, context, loc, opnum, type, ind_levels)
4644 enum reload_type type;
4647 register RTX_CODE code = GET_CODE (x);
4653 register rtx orig_op0 = XEXP (x, 0);
4654 register rtx orig_op1 = XEXP (x, 1);
4655 register RTX_CODE code0 = GET_CODE (orig_op0);
4656 register RTX_CODE code1 = GET_CODE (orig_op1);
4657 register rtx op0 = orig_op0;
4658 register rtx op1 = orig_op1;
4660 if (GET_CODE (op0) == SUBREG)
4662 op0 = SUBREG_REG (op0);
4663 code0 = GET_CODE (op0);
4664 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
4665 op0 = gen_rtx (REG, word_mode,
4666 REGNO (op0) + SUBREG_WORD (orig_op0));
4669 if (GET_CODE (op1) == SUBREG)
4671 op1 = SUBREG_REG (op1);
4672 code1 = GET_CODE (op1);
4673 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
4674 op1 = gen_rtx (REG, GET_MODE (op1),
4675 REGNO (op1) + SUBREG_WORD (orig_op1));
4678 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
4679 || code0 == ZERO_EXTEND || code1 == MEM)
4681 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4683 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4687 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
4688 || code1 == ZERO_EXTEND || code0 == MEM)
4690 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4692 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4696 else if (code0 == CONST_INT || code0 == CONST
4697 || code0 == SYMBOL_REF || code0 == LABEL_REF)
4698 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4701 else if (code1 == CONST_INT || code1 == CONST
4702 || code1 == SYMBOL_REF || code1 == LABEL_REF)
4703 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4706 else if (code0 == REG && code1 == REG)
4708 if (REG_OK_FOR_INDEX_P (op0)
4709 && REG_OK_FOR_BASE_P (op1))
4711 else if (REG_OK_FOR_INDEX_P (op1)
4712 && REG_OK_FOR_BASE_P (op0))
4714 else if (REG_OK_FOR_BASE_P (op1))
4715 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4717 else if (REG_OK_FOR_BASE_P (op0))
4718 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4720 else if (REG_OK_FOR_INDEX_P (op1))
4721 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4723 else if (REG_OK_FOR_INDEX_P (op0))
4724 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4728 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4730 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4735 else if (code0 == REG)
4737 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4739 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4743 else if (code1 == REG)
4745 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4747 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4758 if (GET_CODE (XEXP (x, 0)) == REG)
4760 register int regno = REGNO (XEXP (x, 0));
4764 /* A register that is incremented cannot be constant! */
4765 if (regno >= FIRST_PSEUDO_REGISTER
4766 && reg_equiv_constant[regno] != 0)
4769 /* Handle a register that is equivalent to a memory location
4770 which cannot be addressed directly. */
4771 if (reg_equiv_address[regno] != 0)
4773 rtx tem = make_memloc (XEXP (x, 0), regno);
4774 /* First reload the memory location's address. */
4775 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
4776 &XEXP (tem, 0), opnum, type, ind_levels);
4777 /* Put this inside a new increment-expression. */
4778 x = gen_rtx (GET_CODE (x), GET_MODE (x), tem);
4779 /* Proceed to reload that, as if it contained a register. */
4782 /* If we have a hard register that is ok as an index,
4783 don't make a reload. If an autoincrement of a nice register
4784 isn't "valid", it must be that no autoincrement is "valid".
4785 If that is true and something made an autoincrement anyway,
4786 this must be a special context where one is allowed.
4787 (For example, a "push" instruction.)
4788 We can't improve this address, so leave it alone. */
4790 /* Otherwise, reload the autoincrement into a suitable hard reg
4791 and record how much to increment by. */
4793 if (reg_renumber[regno] >= 0)
4794 regno = reg_renumber[regno];
4795 if ((regno >= FIRST_PSEUDO_REGISTER
4796 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4797 : REGNO_OK_FOR_BASE_P (regno))))
4802 = push_reload (x, NULL_RTX, loc, NULL_PTR,
4803 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4804 GET_MODE (x), GET_MODE (x), VOIDmode, 0,
4806 reload_inc[reloadnum]
4807 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
4812 /* Update the REG_INC notes. */
4814 for (link = REG_NOTES (this_insn);
4815 link; link = XEXP (link, 1))
4816 if (REG_NOTE_KIND (link) == REG_INC
4817 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
4818 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4824 else if (GET_CODE (XEXP (x, 0)) == MEM)
4826 /* This is probably the result of a substitution, by eliminate_regs,
4827 of an equivalent address for a pseudo that was not allocated to a
4828 hard register. Verify that the specified address is valid and
4829 reload it into a register. */
4830 rtx tem = XEXP (x, 0);
4834 /* Since we know we are going to reload this item, don't decrement
4835 for the indirection level.
4837 Note that this is actually conservative: it would be slightly
4838 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4840 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
4841 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
4842 opnum, type, ind_levels);
4844 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
4845 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4846 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4847 reload_inc[reloadnum]
4848 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
4850 link = FIND_REG_INC_NOTE (this_insn, tem);
4852 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4859 /* This is probably the result of a substitution, by eliminate_regs, of
4860 an equivalent address for a pseudo that was not allocated to a hard
4861 register. Verify that the specified address is valid and reload it
4864 Since we know we are going to reload this item, don't decrement for
4865 the indirection level.
4867 Note that this is actually conservative: it would be slightly more
4868 efficient to use the value of SPILL_INDIRECT_LEVELS from
4871 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
4872 opnum, type, ind_levels);
4873 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
4874 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4875 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4880 register int regno = REGNO (x);
4882 if (reg_equiv_constant[regno] != 0)
4884 find_reloads_address_part (reg_equiv_constant[regno], loc,
4885 (context ? INDEX_REG_CLASS
4887 GET_MODE (x), opnum, type, ind_levels);
4891 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4892 that feeds this insn. */
4893 if (reg_equiv_mem[regno] != 0)
4895 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
4896 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4897 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4902 if (reg_equiv_address[regno] != 0)
4904 x = make_memloc (x, regno);
4905 find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
4906 opnum, type, ind_levels);
4909 if (reg_renumber[regno] >= 0)
4910 regno = reg_renumber[regno];
4912 if ((regno >= FIRST_PSEUDO_REGISTER
4913 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4914 : REGNO_OK_FOR_BASE_P (regno))))
4916 push_reload (x, NULL_RTX, loc, NULL_PTR,
4917 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4918 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4922 /* If a register appearing in an address is the subject of a CLOBBER
4923 in this insn, reload it into some other register to be safe.
4924 The CLOBBER is supposed to make the register unavailable
4925 from before this insn to after it. */
4926 if (regno_clobbered_p (regno, this_insn))
4928 push_reload (x, NULL_RTX, loc, NULL_PTR,
4929 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4930 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4937 if (GET_CODE (SUBREG_REG (x)) == REG)
4939 /* If this is a SUBREG of a hard register and the resulting register
4940 is of the wrong class, reload the whole SUBREG. This avoids
4941 needless copies if SUBREG_REG is multi-word. */
4942 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
4944 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
4946 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
4947 : REGNO_OK_FOR_BASE_P (regno)))
4949 push_reload (x, NULL_RTX, loc, NULL_PTR,
4950 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4951 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4955 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
4956 is larger than the class size, then reload the whole SUBREG. */
4959 enum reg_class class = (context
4960 ? INDEX_REG_CLASS : BASE_REG_CLASS);
4961 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
4962 > reg_class_size[class])
4964 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
4965 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4974 register char *fmt = GET_RTX_FORMAT (code);
4977 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4980 find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i),
4981 opnum, type, ind_levels);
4988 /* X, which is found at *LOC, is a part of an address that needs to be
4989 reloaded into a register of class CLASS. If X is a constant, or if
4990 X is a PLUS that contains a constant, check that the constant is a
4991 legitimate operand and that we are supposed to be able to load
4992 it into the register.
4994 If not, force the constant into memory and reload the MEM instead.
4996 MODE is the mode to use, in case X is an integer constant.
4998 OPNUM and TYPE describe the purpose of any reloads made.
5000 IND_LEVELS says how many levels of indirect addressing this machine
5004 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5007 enum reg_class class;
5008 enum machine_mode mode;
5010 enum reload_type type;
5014 && (! LEGITIMATE_CONSTANT_P (x)
5015 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5017 rtx tem = x = force_const_mem (mode, x);
5018 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5019 opnum, type, ind_levels);
5022 else if (GET_CODE (x) == PLUS
5023 && CONSTANT_P (XEXP (x, 1))
5024 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5025 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5027 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5029 x = gen_rtx (PLUS, GET_MODE (x), XEXP (x, 0), tem);
5030 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5031 opnum, type, ind_levels);
5034 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5035 mode, VOIDmode, 0, 0, opnum, type);
5038 /* Substitute into the current INSN the registers into which we have reloaded
5039 the things that need reloading. The array `replacements'
5040 says contains the locations of all pointers that must be changed
5041 and says what to replace them with.
5043 Return the rtx that X translates into; usually X, but modified. */
5050 for (i = 0; i < n_replacements; i++)
5052 register struct replacement *r = &replacements[i];
5053 register rtx reloadreg = reload_reg_rtx[r->what];
5056 /* Encapsulate RELOADREG so its machine mode matches what
5057 used to be there. Note that gen_lowpart_common will
5058 do the wrong thing if RELOADREG is multi-word. RELOADREG
5059 will always be a REG here. */
5060 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5061 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
5063 /* If we are putting this into a SUBREG and RELOADREG is a
5064 SUBREG, we would be making nested SUBREGs, so we have to fix
5065 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5067 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5069 if (GET_MODE (*r->subreg_loc)
5070 == GET_MODE (SUBREG_REG (reloadreg)))
5071 *r->subreg_loc = SUBREG_REG (reloadreg);
5074 *r->where = SUBREG_REG (reloadreg);
5075 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
5079 *r->where = reloadreg;
5081 /* If reload got no reg and isn't optional, something's wrong. */
5082 else if (! reload_optional[r->what])
5087 /* Make a copy of any replacements being done into X and move those copies
5088 to locations in Y, a copy of X. We only look at the highest level of
5092 copy_replacements (x, y)
5097 enum rtx_code code = GET_CODE (x);
5098 char *fmt = GET_RTX_FORMAT (code);
5099 struct replacement *r;
5101 /* We can't support X being a SUBREG because we might then need to know its
5102 location if something inside it was replaced. */
5106 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5108 for (j = 0; j < n_replacements; j++)
5110 if (replacements[j].subreg_loc == &XEXP (x, i))
5112 r = &replacements[n_replacements++];
5113 r->where = replacements[j].where;
5114 r->subreg_loc = &XEXP (y, i);
5115 r->what = replacements[j].what;
5116 r->mode = replacements[j].mode;
5118 else if (replacements[j].where == &XEXP (x, i))
5120 r = &replacements[n_replacements++];
5121 r->where = &XEXP (y, i);
5123 r->what = replacements[j].what;
5124 r->mode = replacements[j].mode;
5129 /* If LOC was scheduled to be replaced by something, return the replacement.
5130 Otherwise, return *LOC. */
5133 find_replacement (loc)
5136 struct replacement *r;
5138 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5140 rtx reloadreg = reload_reg_rtx[r->what];
5142 if (reloadreg && r->where == loc)
5144 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5145 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
5149 else if (reloadreg && r->subreg_loc == loc)
5151 /* RELOADREG must be either a REG or a SUBREG.
5153 ??? Is it actually still ever a SUBREG? If so, why? */
5155 if (GET_CODE (reloadreg) == REG)
5156 return gen_rtx (REG, GET_MODE (*loc),
5157 REGNO (reloadreg) + SUBREG_WORD (*loc));
5158 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5161 return gen_rtx (SUBREG, GET_MODE (*loc), SUBREG_REG (reloadreg),
5162 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5169 /* Return nonzero if register in range [REGNO, ENDREGNO)
5170 appears either explicitly or implicitly in X
5171 other than being stored into (except for earlyclobber operands).
5173 References contained within the substructure at LOC do not count.
5174 LOC may be zero, meaning don't ignore anything.
5176 This is similar to refers_to_regno_p in rtlanal.c except that we
5177 look at equivalences for pseudos that didn't get hard registers. */
5180 refers_to_regno_for_reload_p (regno, endregno, x, loc)
5181 int regno, endregno;
5186 register RTX_CODE code;
5193 code = GET_CODE (x);
5200 /* If this is a pseudo, a hard register must not have been allocated.
5201 X must therefore either be a constant or be in memory. */
5202 if (i >= FIRST_PSEUDO_REGISTER)
5204 if (reg_equiv_memory_loc[i])
5205 return refers_to_regno_for_reload_p (regno, endregno,
5206 reg_equiv_memory_loc[i],
5209 if (reg_equiv_constant[i])
5215 return (endregno > i
5216 && regno < i + (i < FIRST_PSEUDO_REGISTER
5217 ? HARD_REGNO_NREGS (i, GET_MODE (x))
5221 /* If this is a SUBREG of a hard reg, we can see exactly which
5222 registers are being modified. Otherwise, handle normally. */
5223 if (GET_CODE (SUBREG_REG (x)) == REG
5224 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5226 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5228 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5229 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5231 return endregno > inner_regno && regno < inner_endregno;
5237 if (&SET_DEST (x) != loc
5238 /* Note setting a SUBREG counts as referring to the REG it is in for
5239 a pseudo but not for hard registers since we can
5240 treat each word individually. */
5241 && ((GET_CODE (SET_DEST (x)) == SUBREG
5242 && loc != &SUBREG_REG (SET_DEST (x))
5243 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5244 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5245 && refers_to_regno_for_reload_p (regno, endregno,
5246 SUBREG_REG (SET_DEST (x)),
5248 /* If the output is an earlyclobber operand, this is
5250 || ((GET_CODE (SET_DEST (x)) != REG
5251 || earlyclobber_operand_p (SET_DEST (x)))
5252 && refers_to_regno_for_reload_p (regno, endregno,
5253 SET_DEST (x), loc))))
5256 if (code == CLOBBER || loc == &SET_SRC (x))
5262 /* X does not match, so try its subexpressions. */
5264 fmt = GET_RTX_FORMAT (code);
5265 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5267 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5275 if (refers_to_regno_for_reload_p (regno, endregno,
5279 else if (fmt[i] == 'E')
5282 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5283 if (loc != &XVECEXP (x, i, j)
5284 && refers_to_regno_for_reload_p (regno, endregno,
5285 XVECEXP (x, i, j), loc))
5292 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5293 we check if any register number in X conflicts with the relevant register
5294 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5295 contains a MEM (we don't bother checking for memory addresses that can't
5296 conflict because we expect this to be a rare case.
5298 This function is similar to reg_overlap_mention_p in rtlanal.c except
5299 that we look at equivalences for pseudos that didn't get hard registers. */
5302 reg_overlap_mentioned_for_reload_p (x, in)
5305 int regno, endregno;
5307 if (GET_CODE (x) == SUBREG)
5309 regno = REGNO (SUBREG_REG (x));
5310 if (regno < FIRST_PSEUDO_REGISTER)
5311 regno += SUBREG_WORD (x);
5313 else if (GET_CODE (x) == REG)
5317 /* If this is a pseudo, it must not have been assigned a hard register.
5318 Therefore, it must either be in memory or be a constant. */
5320 if (regno >= FIRST_PSEUDO_REGISTER)
5322 if (reg_equiv_memory_loc[regno])
5323 return refers_to_mem_for_reload_p (in);
5324 else if (reg_equiv_constant[regno])
5329 else if (CONSTANT_P (x))
5331 else if (GET_CODE (x) == MEM)
5332 return refers_to_mem_for_reload_p (in);
5333 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
5334 || GET_CODE (x) == CC0)
5335 return reg_mentioned_p (x, in);
5339 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
5340 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5342 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
5345 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5349 refers_to_mem_for_reload_p (x)
5355 if (GET_CODE (x) == MEM)
5358 if (GET_CODE (x) == REG)
5359 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
5360 && reg_equiv_memory_loc[REGNO (x)]);
5362 fmt = GET_RTX_FORMAT (GET_CODE (x));
5363 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
5365 && (GET_CODE (XEXP (x, i)) == MEM
5366 || refers_to_mem_for_reload_p (XEXP (x, i))))
5372 /* Check the insns before INSN to see if there is a suitable register
5373 containing the same value as GOAL.
5374 If OTHER is -1, look for a register in class CLASS.
5375 Otherwise, just see if register number OTHER shares GOAL's value.
5377 Return an rtx for the register found, or zero if none is found.
5379 If RELOAD_REG_P is (short *)1,
5380 we reject any hard reg that appears in reload_reg_rtx
5381 because such a hard reg is also needed coming into this insn.
5383 If RELOAD_REG_P is any other nonzero value,
5384 it is a vector indexed by hard reg number
5385 and we reject any hard reg whose element in the vector is nonnegative
5386 as well as any that appears in reload_reg_rtx.
5388 If GOAL is zero, then GOALREG is a register number; we look
5389 for an equivalent for that register.
5391 MODE is the machine mode of the value we want an equivalence for.
5392 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5394 This function is used by jump.c as well as in the reload pass.
5396 If GOAL is the sum of the stack pointer and a constant, we treat it
5397 as if it were a constant except that sp is required to be unchanging. */
5400 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
5403 enum reg_class class;
5405 short *reload_reg_p;
5407 enum machine_mode mode;
5409 register rtx p = insn;
5410 rtx goaltry, valtry, value, where;
5412 register int regno = -1;
5416 int goal_mem_addr_varies = 0;
5417 int need_stable_sp = 0;
5423 else if (GET_CODE (goal) == REG)
5424 regno = REGNO (goal);
5425 else if (GET_CODE (goal) == MEM)
5427 enum rtx_code code = GET_CODE (XEXP (goal, 0));
5428 if (MEM_VOLATILE_P (goal))
5430 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
5432 /* An address with side effects must be reexecuted. */
5443 else if (CONSTANT_P (goal))
5445 else if (GET_CODE (goal) == PLUS
5446 && XEXP (goal, 0) == stack_pointer_rtx
5447 && CONSTANT_P (XEXP (goal, 1)))
5448 goal_const = need_stable_sp = 1;
5452 /* On some machines, certain regs must always be rejected
5453 because they don't behave the way ordinary registers do. */
5455 #ifdef OVERLAPPING_REGNO_P
5456 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5457 && OVERLAPPING_REGNO_P (regno))
5461 /* Scan insns back from INSN, looking for one that copies
5462 a value into or out of GOAL.
5463 Stop and give up if we reach a label. */
5468 if (p == 0 || GET_CODE (p) == CODE_LABEL)
5470 if (GET_CODE (p) == INSN
5471 /* If we don't want spill regs ... */
5472 && (! (reload_reg_p != 0
5473 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
5474 /* ... then ignore insns introduced by reload; they aren't useful
5475 and can cause results in reload_as_needed to be different
5476 from what they were when calculating the need for spills.
5477 If we notice an input-reload insn here, we will reject it below,
5478 but it might hide a usable equivalent. That makes bad code.
5479 It may even abort: perhaps no reg was spilled for this insn
5480 because it was assumed we would find that equivalent. */
5481 || INSN_UID (p) < reload_first_uid))
5484 pat = single_set (p);
5485 /* First check for something that sets some reg equal to GOAL. */
5488 && true_regnum (SET_SRC (pat)) == regno
5489 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5492 && true_regnum (SET_DEST (pat)) == regno
5493 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
5495 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
5496 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5498 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
5499 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
5501 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
5502 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
5503 /* If we are looking for a constant,
5504 and something equivalent to that constant was copied
5505 into a reg, we can use that reg. */
5506 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5508 && rtx_equal_p (XEXP (tem, 0), goal)
5509 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5510 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5512 && GET_CODE (SET_DEST (pat)) == REG
5513 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5514 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5515 && GET_CODE (goal) == CONST_INT
5516 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
5518 && rtx_equal_p (goal, goaltry)
5519 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
5521 && (valueno = true_regnum (valtry)) >= 0)
5522 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5524 && GET_CODE (SET_DEST (pat)) == REG
5525 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5526 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5527 && GET_CODE (goal) == CONST_INT
5528 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
5530 && rtx_equal_p (goal, goaltry)
5532 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
5533 && (valueno = true_regnum (valtry)) >= 0)))
5536 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
5537 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
5547 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5548 (or copying VALUE into GOAL, if GOAL is also a register).
5549 Now verify that VALUE is really valid. */
5551 /* VALUENO is the register number of VALUE; a hard register. */
5553 /* Don't try to re-use something that is killed in this insn. We want
5554 to be able to trust REG_UNUSED notes. */
5555 if (find_reg_note (where, REG_UNUSED, value))
5558 /* If we propose to get the value from the stack pointer or if GOAL is
5559 a MEM based on the stack pointer, we need a stable SP. */
5560 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
5561 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
5565 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5566 if (GET_MODE (value) != mode)
5569 /* Reject VALUE if it was loaded from GOAL
5570 and is also a register that appears in the address of GOAL. */
5572 if (goal_mem && value == SET_DEST (single_set (where))
5573 && refers_to_regno_for_reload_p (valueno,
5575 + HARD_REGNO_NREGS (valueno, mode)),
5579 /* Reject registers that overlap GOAL. */
5581 if (!goal_mem && !goal_const
5582 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
5583 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
5586 /* Reject VALUE if it is one of the regs reserved for reloads.
5587 Reload1 knows how to reuse them anyway, and it would get
5588 confused if we allocated one without its knowledge.
5589 (Now that insns introduced by reload are ignored above,
5590 this case shouldn't happen, but I'm not positive.) */
5592 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
5593 && reload_reg_p[valueno] >= 0)
5596 /* On some machines, certain regs must always be rejected
5597 because they don't behave the way ordinary registers do. */
5599 #ifdef OVERLAPPING_REGNO_P
5600 if (OVERLAPPING_REGNO_P (valueno))
5604 nregs = HARD_REGNO_NREGS (regno, mode);
5605 valuenregs = HARD_REGNO_NREGS (valueno, mode);
5607 /* Reject VALUE if it is a register being used for an input reload
5608 even if it is not one of those reserved. */
5610 if (reload_reg_p != 0)
5613 for (i = 0; i < n_reloads; i++)
5614 if (reload_reg_rtx[i] != 0 && reload_in[i])
5616 int regno1 = REGNO (reload_reg_rtx[i]);
5617 int nregs1 = HARD_REGNO_NREGS (regno1,
5618 GET_MODE (reload_reg_rtx[i]));
5619 if (regno1 < valueno + valuenregs
5620 && regno1 + nregs1 > valueno)
5626 /* We must treat frame pointer as varying here,
5627 since it can vary--in a nonlocal goto as generated by expand_goto. */
5628 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
5630 /* Now verify that the values of GOAL and VALUE remain unaltered
5631 until INSN is reached. */
5640 /* Don't trust the conversion past a function call
5641 if either of the two is in a call-clobbered register, or memory. */
5642 if (GET_CODE (p) == CALL_INSN
5643 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5644 && call_used_regs[regno])
5646 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5647 && call_used_regs[valueno])
5653 #ifdef NON_SAVING_SETJMP
5654 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
5655 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
5659 #ifdef INSN_CLOBBERS_REGNO_P
5660 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5661 && INSN_CLOBBERS_REGNO_P (p, valueno))
5662 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5663 && INSN_CLOBBERS_REGNO_P (p, regno)))
5667 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
5669 /* If this insn P stores in either GOAL or VALUE, return 0.
5670 If GOAL is a memory ref and this insn writes memory, return 0.
5671 If GOAL is a memory ref and its address is not constant,
5672 and this insn P changes a register used in GOAL, return 0. */
5675 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
5677 register rtx dest = SET_DEST (pat);
5678 while (GET_CODE (dest) == SUBREG
5679 || GET_CODE (dest) == ZERO_EXTRACT
5680 || GET_CODE (dest) == SIGN_EXTRACT
5681 || GET_CODE (dest) == STRICT_LOW_PART)
5682 dest = XEXP (dest, 0);
5683 if (GET_CODE (dest) == REG)
5685 register int xregno = REGNO (dest);
5687 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5688 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5691 if (xregno < regno + nregs && xregno + xnregs > regno)
5693 if (xregno < valueno + valuenregs
5694 && xregno + xnregs > valueno)
5696 if (goal_mem_addr_varies
5697 && reg_overlap_mentioned_for_reload_p (dest, goal))
5700 else if (goal_mem && GET_CODE (dest) == MEM
5701 && ! push_operand (dest, GET_MODE (dest)))
5703 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
5704 && reg_equiv_memory_loc[regno] != 0)
5706 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
5709 else if (GET_CODE (pat) == PARALLEL)
5712 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
5714 register rtx v1 = XVECEXP (pat, 0, i);
5715 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
5717 register rtx dest = SET_DEST (v1);
5718 while (GET_CODE (dest) == SUBREG
5719 || GET_CODE (dest) == ZERO_EXTRACT
5720 || GET_CODE (dest) == SIGN_EXTRACT
5721 || GET_CODE (dest) == STRICT_LOW_PART)
5722 dest = XEXP (dest, 0);
5723 if (GET_CODE (dest) == REG)
5725 register int xregno = REGNO (dest);
5727 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5728 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5731 if (xregno < regno + nregs
5732 && xregno + xnregs > regno)
5734 if (xregno < valueno + valuenregs
5735 && xregno + xnregs > valueno)
5737 if (goal_mem_addr_varies
5738 && reg_overlap_mentioned_for_reload_p (dest,
5742 else if (goal_mem && GET_CODE (dest) == MEM
5743 && ! push_operand (dest, GET_MODE (dest)))
5745 else if (need_stable_sp
5746 && push_operand (dest, GET_MODE (dest)))
5752 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
5756 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
5757 link = XEXP (link, 1))
5759 pat = XEXP (link, 0);
5760 if (GET_CODE (pat) == CLOBBER)
5762 register rtx dest = SET_DEST (pat);
5763 while (GET_CODE (dest) == SUBREG
5764 || GET_CODE (dest) == ZERO_EXTRACT
5765 || GET_CODE (dest) == SIGN_EXTRACT
5766 || GET_CODE (dest) == STRICT_LOW_PART)
5767 dest = XEXP (dest, 0);
5768 if (GET_CODE (dest) == REG)
5770 register int xregno = REGNO (dest);
5772 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5773 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5776 if (xregno < regno + nregs
5777 && xregno + xnregs > regno)
5779 if (xregno < valueno + valuenregs
5780 && xregno + xnregs > valueno)
5782 if (goal_mem_addr_varies
5783 && reg_overlap_mentioned_for_reload_p (dest,
5787 else if (goal_mem && GET_CODE (dest) == MEM
5788 && ! push_operand (dest, GET_MODE (dest)))
5790 else if (need_stable_sp
5791 && push_operand (dest, GET_MODE (dest)))
5798 /* If this insn auto-increments or auto-decrements
5799 either regno or valueno, return 0 now.
5800 If GOAL is a memory ref and its address is not constant,
5801 and this insn P increments a register used in GOAL, return 0. */
5805 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
5806 if (REG_NOTE_KIND (link) == REG_INC
5807 && GET_CODE (XEXP (link, 0)) == REG)
5809 register int incno = REGNO (XEXP (link, 0));
5810 if (incno < regno + nregs && incno >= regno)
5812 if (incno < valueno + valuenregs && incno >= valueno)
5814 if (goal_mem_addr_varies
5815 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
5825 /* Find a place where INCED appears in an increment or decrement operator
5826 within X, and return the amount INCED is incremented or decremented by.
5827 The value is always positive. */
5830 find_inc_amount (x, inced)
5833 register enum rtx_code code = GET_CODE (x);
5839 register rtx addr = XEXP (x, 0);
5840 if ((GET_CODE (addr) == PRE_DEC
5841 || GET_CODE (addr) == POST_DEC
5842 || GET_CODE (addr) == PRE_INC
5843 || GET_CODE (addr) == POST_INC)
5844 && XEXP (addr, 0) == inced)
5845 return GET_MODE_SIZE (GET_MODE (x));
5848 fmt = GET_RTX_FORMAT (code);
5849 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5853 register int tem = find_inc_amount (XEXP (x, i), inced);
5860 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5862 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
5872 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5875 regno_clobbered_p (regno, insn)
5879 if (GET_CODE (PATTERN (insn)) == CLOBBER
5880 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
5881 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
5883 if (GET_CODE (PATTERN (insn)) == PARALLEL)
5885 int i = XVECLEN (PATTERN (insn), 0) - 1;
5889 rtx elt = XVECEXP (PATTERN (insn), 0, i);
5890 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
5891 && REGNO (XEXP (elt, 0)) == regno)
5899 static char *reload_when_needed_name[] =
5902 "RELOAD_FOR_OUTPUT",
5904 "RELOAD_FOR_INPUT_ADDRESS",
5905 "RELOAD_FOR_OUTPUT_ADDRESS",
5906 "RELOAD_FOR_OPERAND_ADDRESS",
5907 "RELOAD_FOR_OPADDR_ADDR",
5909 "RELOAD_FOR_OTHER_ADDRESS"
5912 static char *reg_class_names[] = REG_CLASS_NAMES;
5914 /* This function is used to print the variables set by 'find_reloads' */
5921 fprintf (stderr, "\nn_reloads = %d\n", n_reloads);
5923 for (r = 0; r < n_reloads; r++)
5925 fprintf (stderr, "\nRELOAD %d\n", r);
5929 fprintf (stderr, "\nreload_in (%s) = ",
5930 GET_MODE_NAME (reload_inmode[r]));
5931 debug_rtx (reload_in[r]);
5936 fprintf (stderr, "\nreload_out (%s) = ",
5937 GET_MODE_NAME (reload_outmode[r]));
5938 debug_rtx (reload_out[r]);
5941 fprintf (stderr, "%s, ", reg_class_names[(int) reload_reg_class[r]]);
5943 fprintf (stderr, "%s (opnum = %d)",
5944 reload_when_needed_name[(int)reload_when_needed[r]],
5947 if (reload_optional[r])
5948 fprintf (stderr, ", optional");
5951 fprintf (stderr, ", inc by %d\n", reload_inc[r]);
5953 if (reload_nocombine[r])
5954 fprintf (stderr, ", can't combine", reload_nocombine[r]);
5956 if (reload_secondary_p[r])
5957 fprintf (stderr, ", secondary_reload_p");
5959 if (reload_in_reg[r])
5961 fprintf (stderr, "\nreload_in_reg:\t\t\t");
5962 debug_rtx (reload_in_reg[r]);
5965 if (reload_reg_rtx[r])
5967 fprintf (stderr, "\nreload_reg_rtx:\t\t\t");
5968 debug_rtx (reload_reg_rtx[r]);
5971 if (reload_secondary_in_reload[r] != -1)
5973 fprintf (stderr, "\nsecondary_in_reload = ");
5974 fprintf (stderr, "%d ", reload_secondary_in_reload[r]);
5977 if (reload_secondary_out_reload[r] != -1)
5979 if (reload_secondary_in_reload[r] != -1)
5980 fprintf (stderr, ", secondary_out_reload = ");
5982 fprintf (stderr, "\nsecondary_out_reload = ");
5984 fprintf (stderr, "%d", reload_secondary_out_reload[r]);
5988 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
5990 fprintf (stderr, "\nsecondary_in_icode = ");
5991 fprintf (stderr, "%s", insn_name[r]);
5994 if (reload_secondary_out_icode[r] != CODE_FOR_nothing)
5996 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
5997 fprintf (stderr, ", secondary_out_icode = ");
5999 fprintf (stderr, "\nsecondary_out_icode = ");
6001 fprintf (stderr, "%s ", insn_name[r]);
6003 fprintf (stderr, "\n");
6006 fprintf (stderr, "\n");
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