1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 88, 89, 92-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This module looks for cases where matching constraints would force
23 an instruction to need a reload, and this reload would be a register
24 to register move. It then attempts to change the registers used by the
25 instruction to avoid the move instruction. */
29 #include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
31 #include "insn-config.h"
36 #include "hard-reg-set.h"
40 #include "insn-flags.h"
41 #include "basic-block.h"
44 static int optimize_reg_copy_1 PROTO((rtx, rtx, rtx));
45 static void optimize_reg_copy_2 PROTO((rtx, rtx, rtx));
46 static void optimize_reg_copy_3 PROTO((rtx, rtx, rtx));
47 static rtx gen_add3_insn PROTO((rtx, rtx, rtx));
48 static void copy_src_to_dest PROTO((rtx, rtx, rtx, int));
49 static int *regmove_bb_head;
52 int with[MAX_RECOG_OPERANDS];
53 enum { READ, WRITE, READWRITE } use[MAX_RECOG_OPERANDS];
54 int commutative[MAX_RECOG_OPERANDS];
55 int early_clobber[MAX_RECOG_OPERANDS];
58 static rtx discover_flags_reg PROTO((void));
59 static void mark_flags_life_zones PROTO((rtx));
60 static void flags_set_1 PROTO((rtx, rtx, void *));
62 static int try_auto_increment PROTO((rtx, rtx, rtx, rtx, HOST_WIDE_INT, int));
63 static int find_matches PROTO((rtx, struct match *));
64 static int fixup_match_1 PROTO((rtx, rtx, rtx, rtx, rtx, int, int, int, FILE *))
66 static int reg_is_remote_constant_p PROTO((rtx, rtx, rtx));
67 static int stable_and_no_regs_but_for_p PROTO((rtx, rtx, rtx));
68 static int regclass_compatible_p PROTO((int, int));
69 static int replacement_quality PROTO((rtx));
70 static int fixup_match_2 PROTO((rtx, rtx, rtx, rtx, FILE *));
72 /* Return non-zero if registers with CLASS1 and CLASS2 can be merged without
73 causing too much register allocation problems. */
75 regclass_compatible_p (class0, class1)
78 return (class0 == class1
79 || (reg_class_subset_p (class0, class1)
80 && ! CLASS_LIKELY_SPILLED_P (class0))
81 || (reg_class_subset_p (class1, class0)
82 && ! CLASS_LIKELY_SPILLED_P (class1)));
85 /* Generate and return an insn body to add r1 and c,
86 storing the result in r0. */
88 gen_add3_insn (r0, r1, c)
91 int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code;
93 if (icode == CODE_FOR_nothing
94 || ! ((*insn_data[icode].operand[0].predicate)
95 (r0, insn_data[icode].operand[0].mode))
96 || ! ((*insn_data[icode].operand[1].predicate)
97 (r1, insn_data[icode].operand[1].mode))
98 || ! ((*insn_data[icode].operand[2].predicate)
99 (c, insn_data[icode].operand[2].mode)))
102 return (GEN_FCN (icode) (r0, r1, c));
106 /* INC_INSN is an instruction that adds INCREMENT to REG.
107 Try to fold INC_INSN as a post/pre in/decrement into INSN.
108 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
109 Return nonzero for success. */
111 try_auto_increment (insn, inc_insn, inc_insn_set, reg, increment, pre)
112 rtx reg, insn, inc_insn ,inc_insn_set;
113 HOST_WIDE_INT increment;
116 enum rtx_code inc_code;
118 rtx pset = single_set (insn);
121 /* Can't use the size of SET_SRC, we might have something like
122 (sign_extend:SI (mem:QI ... */
123 rtx use = find_use_as_address (pset, reg, 0);
124 if (use != 0 && use != (rtx) 1)
126 int size = GET_MODE_SIZE (GET_MODE (use));
128 || (HAVE_POST_INCREMENT
129 && pre == 0 && (inc_code = POST_INC, increment == size))
130 || (HAVE_PRE_INCREMENT
131 && pre == 1 && (inc_code = PRE_INC, increment == size))
132 || (HAVE_POST_DECREMENT
133 && pre == 0 && (inc_code = POST_DEC, increment == -size))
134 || (HAVE_PRE_DECREMENT
135 && pre == 1 && (inc_code = PRE_DEC, increment == -size))
141 &SET_SRC (inc_insn_set),
142 XEXP (SET_SRC (inc_insn_set), 0), 1);
143 validate_change (insn, &XEXP (use, 0),
144 gen_rtx_fmt_e (inc_code, Pmode, reg), 1);
145 if (apply_change_group ())
148 = gen_rtx_EXPR_LIST (REG_INC,
149 reg, REG_NOTES (insn));
152 PUT_CODE (inc_insn, NOTE);
153 NOTE_LINE_NUMBER (inc_insn) = NOTE_INSN_DELETED;
154 NOTE_SOURCE_FILE (inc_insn) = 0;
164 /* Determine if the pattern generated by add_optab has a clobber,
165 such as might be issued for a flags hard register. To make the
166 code elsewhere simpler, we handle cc0 in this same framework.
168 Return the register if one was discovered. Return NULL_RTX if
169 if no flags were found. Return pc_rtx if we got confused. */
172 discover_flags_reg ()
175 tmp = gen_rtx_REG (word_mode, 10000);
176 tmp = gen_add3_insn (tmp, tmp, GEN_INT (2));
178 /* If we get something that isn't a simple set, or a
179 [(set ..) (clobber ..)], this whole function will go wrong. */
180 if (GET_CODE (tmp) == SET)
182 else if (GET_CODE (tmp) == PARALLEL)
186 if (XVECLEN (tmp, 0) != 2)
188 tmp = XVECEXP (tmp, 0, 1);
189 if (GET_CODE (tmp) != CLOBBER)
193 /* Don't do anything foolish if the md wanted to clobber a
194 scratch or something. We only care about hard regs.
195 Moreover we don't like the notion of subregs of hard regs. */
196 if (GET_CODE (tmp) == SUBREG
197 && GET_CODE (SUBREG_REG (tmp)) == REG
198 && REGNO (SUBREG_REG (tmp)) < FIRST_PSEUDO_REGISTER)
200 found = (GET_CODE (tmp) == REG && REGNO (tmp) < FIRST_PSEUDO_REGISTER);
202 return (found ? tmp : NULL_RTX);
208 /* It is a tedious task identifying when the flags register is live and
209 when it is safe to optimize. Since we process the instruction stream
210 multiple times, locate and record these live zones by marking the
211 mode of the instructions --
213 QImode is used on the instruction at which the flags becomes live.
215 HImode is used within the range (exclusive) that the flags are
216 live. Thus the user of the flags is not marked.
218 All other instructions are cleared to VOIDmode. */
220 /* Used to communicate with flags_set_1. */
221 static rtx flags_set_1_rtx;
222 static int flags_set_1_set;
225 mark_flags_life_zones (flags)
233 /* If we found a flags register on a cc0 host, bail. */
234 if (flags == NULL_RTX)
236 else if (flags != cc0_rtx)
240 /* Simple cases first: if no flags, clear all modes. If confusing,
241 mark the entire function as being in a flags shadow. */
242 if (flags == NULL_RTX || flags == pc_rtx)
244 enum machine_mode mode = (flags ? HImode : VOIDmode);
246 for (insn = get_insns(); insn; insn = NEXT_INSN (insn))
247 PUT_MODE (insn, mode);
255 flags_regno = REGNO (flags);
256 flags_nregs = HARD_REGNO_NREGS (flags_regno, GET_MODE (flags));
258 flags_set_1_rtx = flags;
260 /* Process each basic block. */
261 for (block = n_basic_blocks - 1; block >= 0; block--)
266 insn = BLOCK_HEAD (block);
267 end = BLOCK_END (block);
269 /* Look out for the (unlikely) case of flags being live across
270 basic block boundaries. */
275 for (i = 0; i < flags_nregs; ++i)
276 live |= REGNO_REG_SET_P (BASIC_BLOCK (block)->global_live_at_start,
283 /* Process liveness in reverse order of importance --
284 alive, death, birth. This lets more important info
285 overwrite the mode of lesser info. */
287 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
290 /* In the cc0 case, death is not marked in reg notes,
291 but is instead the mere use of cc0 when it is alive. */
292 if (live && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
295 /* In the hard reg case, we watch death notes. */
296 if (live && find_regno_note (insn, REG_DEAD, flags_regno))
299 PUT_MODE (insn, (live ? HImode : VOIDmode));
301 /* In either case, birth is denoted simply by it's presence
302 as the destination of a set. */
304 note_stores (PATTERN (insn), flags_set_1, NULL);
308 PUT_MODE (insn, QImode);
312 PUT_MODE (insn, (live ? HImode : VOIDmode));
316 insn = NEXT_INSN (insn);
321 /* A subroutine of mark_flags_life_zones, called through note_stores. */
324 flags_set_1 (x, pat, data)
326 void *data ATTRIBUTE_UNUSED;
328 if (GET_CODE (pat) == SET
329 && reg_overlap_mentioned_p (x, flags_set_1_rtx))
333 static int *regno_src_regno;
335 /* Indicate how good a choice REG (which appears as a source) is to replace
336 a destination register with. The higher the returned value, the better
337 the choice. The main objective is to avoid using a register that is
338 a candidate for tying to a hard register, since the output might in
339 turn be a candidate to be tied to a different hard register. */
341 replacement_quality(reg)
346 /* Bad if this isn't a register at all. */
347 if (GET_CODE (reg) != REG)
350 /* If this register is not meant to get a hard register,
351 it is a poor choice. */
352 if (REG_LIVE_LENGTH (REGNO (reg)) < 0)
355 src_regno = regno_src_regno[REGNO (reg)];
357 /* If it was not copied from another register, it is fine. */
361 /* Copied from a hard register? */
362 if (src_regno < FIRST_PSEUDO_REGISTER)
365 /* Copied from a pseudo register - not as bad as from a hard register,
366 yet still cumbersome, since the register live length will be lengthened
367 when the registers get tied. */
371 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
374 Search forward to see if SRC dies before either it or DEST is modified,
375 but don't scan past the end of a basic block. If so, we can replace SRC
376 with DEST and let SRC die in INSN.
378 This will reduce the number of registers live in that range and may enable
379 DEST to be tied to SRC, thus often saving one register in addition to a
380 register-register copy. */
383 optimize_reg_copy_1 (insn, dest, src)
391 int sregno = REGNO (src);
392 int dregno = REGNO (dest);
394 /* We don't want to mess with hard regs if register classes are small. */
396 || (SMALL_REGISTER_CLASSES
397 && (sregno < FIRST_PSEUDO_REGISTER
398 || dregno < FIRST_PSEUDO_REGISTER))
399 /* We don't see all updates to SP if they are in an auto-inc memory
400 reference, so we must disallow this optimization on them. */
401 || sregno == STACK_POINTER_REGNUM || dregno == STACK_POINTER_REGNUM)
404 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
406 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
407 || (GET_CODE (p) == NOTE
408 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
409 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
412 /* ??? We can't scan past the end of a basic block without updating
413 the register lifetime info (REG_DEAD/basic_block_live_at_start).
414 A CALL_INSN might be the last insn of a basic block, if it is inside
415 an EH region. There is no easy way to tell, so we just always break
416 when we see a CALL_INSN if flag_exceptions is nonzero. */
417 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
420 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
423 if (reg_set_p (src, p) || reg_set_p (dest, p)
424 /* Don't change a USE of a register. */
425 || (GET_CODE (PATTERN (p)) == USE
426 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
429 /* See if all of SRC dies in P. This test is slightly more
430 conservative than it needs to be. */
431 if ((note = find_regno_note (p, REG_DEAD, sregno)) != 0
432 && GET_MODE (XEXP (note, 0)) == GET_MODE (src))
440 /* We can do the optimization. Scan forward from INSN again,
441 replacing regs as we go. Set FAILED if a replacement can't
442 be done. In that case, we can't move the death note for SRC.
443 This should be rare. */
445 /* Set to stop at next insn. */
446 for (q = next_real_insn (insn);
447 q != next_real_insn (p);
448 q = next_real_insn (q))
450 if (reg_overlap_mentioned_p (src, PATTERN (q)))
452 /* If SRC is a hard register, we might miss some
453 overlapping registers with validate_replace_rtx,
454 so we would have to undo it. We can't if DEST is
455 present in the insn, so fail in that combination
457 if (sregno < FIRST_PSEUDO_REGISTER
458 && reg_mentioned_p (dest, PATTERN (q)))
461 /* Replace all uses and make sure that the register
462 isn't still present. */
463 else if (validate_replace_rtx (src, dest, q)
464 && (sregno >= FIRST_PSEUDO_REGISTER
465 || ! reg_overlap_mentioned_p (src,
470 validate_replace_rtx (dest, src, q);
475 /* For SREGNO, count the total number of insns scanned.
476 For DREGNO, count the total number of insns scanned after
477 passing the death note for DREGNO. */
482 /* If the insn in which SRC dies is a CALL_INSN, don't count it
483 as a call that has been crossed. Otherwise, count it. */
484 if (q != p && GET_CODE (q) == CALL_INSN)
486 /* Similarly, total calls for SREGNO, total calls beyond
487 the death note for DREGNO. */
493 /* If DEST dies here, remove the death note and save it for
494 later. Make sure ALL of DEST dies here; again, this is
495 overly conservative. */
497 && (dest_death = find_regno_note (q, REG_DEAD, dregno)) != 0)
499 if (GET_MODE (XEXP (dest_death, 0)) != GET_MODE (dest))
500 failed = 1, dest_death = 0;
502 remove_note (q, dest_death);
508 /* These counters need to be updated if and only if we are
509 going to move the REG_DEAD note. */
510 if (sregno >= FIRST_PSEUDO_REGISTER)
512 if (REG_LIVE_LENGTH (sregno) >= 0)
514 REG_LIVE_LENGTH (sregno) -= s_length;
515 /* REG_LIVE_LENGTH is only an approximation after
516 combine if sched is not run, so make sure that we
517 still have a reasonable value. */
518 if (REG_LIVE_LENGTH (sregno) < 2)
519 REG_LIVE_LENGTH (sregno) = 2;
522 REG_N_CALLS_CROSSED (sregno) -= s_n_calls;
525 /* Move death note of SRC from P to INSN. */
526 remove_note (p, note);
527 XEXP (note, 1) = REG_NOTES (insn);
528 REG_NOTES (insn) = note;
531 /* DEST is also dead if INSN has a REG_UNUSED note for DEST. */
533 && (dest_death = find_regno_note (insn, REG_UNUSED, dregno)))
535 PUT_REG_NOTE_KIND (dest_death, REG_DEAD);
536 remove_note (insn, dest_death);
539 /* Put death note of DEST on P if we saw it die. */
542 XEXP (dest_death, 1) = REG_NOTES (p);
543 REG_NOTES (p) = dest_death;
545 if (dregno >= FIRST_PSEUDO_REGISTER)
547 /* If and only if we are moving the death note for DREGNO,
548 then we need to update its counters. */
549 if (REG_LIVE_LENGTH (dregno) >= 0)
550 REG_LIVE_LENGTH (dregno) += d_length;
551 REG_N_CALLS_CROSSED (dregno) += d_n_calls;
558 /* If SRC is a hard register which is set or killed in some other
559 way, we can't do this optimization. */
560 else if (sregno < FIRST_PSEUDO_REGISTER
561 && dead_or_set_p (p, src))
567 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
568 a sequence of insns that modify DEST followed by an insn that sets
569 SRC to DEST in which DEST dies, with no prior modification of DEST.
570 (There is no need to check if the insns in between actually modify
571 DEST. We should not have cases where DEST is not modified, but
572 the optimization is safe if no such modification is detected.)
573 In that case, we can replace all uses of DEST, starting with INSN and
574 ending with the set of SRC to DEST, with SRC. We do not do this
575 optimization if a CALL_INSN is crossed unless SRC already crosses a
576 call or if DEST dies before the copy back to SRC.
578 It is assumed that DEST and SRC are pseudos; it is too complicated to do
579 this for hard registers since the substitutions we may make might fail. */
582 optimize_reg_copy_2 (insn, dest, src)
589 int sregno = REGNO (src);
590 int dregno = REGNO (dest);
592 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
594 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
595 || (GET_CODE (p) == NOTE
596 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
597 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
600 /* ??? We can't scan past the end of a basic block without updating
601 the register lifetime info (REG_DEAD/basic_block_live_at_start).
602 A CALL_INSN might be the last insn of a basic block, if it is inside
603 an EH region. There is no easy way to tell, so we just always break
604 when we see a CALL_INSN if flag_exceptions is nonzero. */
605 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
608 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
611 set = single_set (p);
612 if (set && SET_SRC (set) == dest && SET_DEST (set) == src
613 && find_reg_note (p, REG_DEAD, dest))
615 /* We can do the optimization. Scan forward from INSN again,
616 replacing regs as we go. */
618 /* Set to stop at next insn. */
619 for (q = insn; q != NEXT_INSN (p); q = NEXT_INSN (q))
620 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
622 if (reg_mentioned_p (dest, PATTERN (q)))
623 PATTERN (q) = replace_rtx (PATTERN (q), dest, src);
626 if (GET_CODE (q) == CALL_INSN)
628 REG_N_CALLS_CROSSED (dregno)--;
629 REG_N_CALLS_CROSSED (sregno)++;
633 remove_note (p, find_reg_note (p, REG_DEAD, dest));
634 REG_N_DEATHS (dregno)--;
635 remove_note (insn, find_reg_note (insn, REG_DEAD, src));
636 REG_N_DEATHS (sregno)--;
640 if (reg_set_p (src, p)
641 || find_reg_note (p, REG_DEAD, dest)
642 || (GET_CODE (p) == CALL_INSN && REG_N_CALLS_CROSSED (sregno) == 0))
646 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
647 Look if SRC dies there, and if it is only set once, by loading
648 it from memory. If so, try to encorporate the zero/sign extension
649 into the memory read, change SRC to the mode of DEST, and alter
650 the remaining accesses to use the appropriate SUBREG. This allows
651 SRC and DEST to be tied later. */
653 optimize_reg_copy_3 (insn, dest, src)
658 rtx src_reg = XEXP (src, 0);
659 int src_no = REGNO (src_reg);
660 int dst_no = REGNO (dest);
662 enum machine_mode old_mode;
664 if (src_no < FIRST_PSEUDO_REGISTER
665 || dst_no < FIRST_PSEUDO_REGISTER
666 || ! find_reg_note (insn, REG_DEAD, src_reg)
667 || REG_N_SETS (src_no) != 1)
669 for (p = PREV_INSN (insn); p && ! reg_set_p (src_reg, p); p = PREV_INSN (p))
671 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
672 || (GET_CODE (p) == NOTE
673 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
674 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
677 /* ??? We can't scan past the end of a basic block without updating
678 the register lifetime info (REG_DEAD/basic_block_live_at_start).
679 A CALL_INSN might be the last insn of a basic block, if it is inside
680 an EH region. There is no easy way to tell, so we just always break
681 when we see a CALL_INSN if flag_exceptions is nonzero. */
682 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
685 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
691 if (! (set = single_set (p))
692 || GET_CODE (SET_SRC (set)) != MEM
693 || SET_DEST (set) != src_reg)
696 /* Be conserative: although this optimization is also valid for
697 volatile memory references, that could cause trouble in later passes. */
698 if (MEM_VOLATILE_P (SET_SRC (set)))
701 /* Do not use a SUBREG to truncate from one mode to another if truncation
703 if (GET_MODE_BITSIZE (GET_MODE (src_reg)) <= GET_MODE_BITSIZE (GET_MODE (src))
704 && !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (src)),
705 GET_MODE_BITSIZE (GET_MODE (src_reg))))
708 old_mode = GET_MODE (src_reg);
709 PUT_MODE (src_reg, GET_MODE (src));
710 XEXP (src, 0) = SET_SRC (set);
712 /* Include this change in the group so that it's easily undone if
713 one of the changes in the group is invalid. */
714 validate_change (p, &SET_SRC (set), src, 1);
716 /* Now walk forward making additional replacements. We want to be able
717 to undo all the changes if a later substitution fails. */
718 subreg = gen_rtx_SUBREG (old_mode, src_reg, 0);
719 while (p = NEXT_INSN (p), p != insn)
721 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
724 /* Make a tenative change. */
725 validate_replace_rtx_group (src_reg, subreg, p);
728 validate_replace_rtx_group (src, src_reg, insn);
730 /* Now see if all the changes are valid. */
731 if (! apply_change_group ())
733 /* One or more changes were no good. Back out everything. */
734 PUT_MODE (src_reg, old_mode);
735 XEXP (src, 0) = src_reg;
740 /* If we were not able to update the users of src to use dest directly, try
741 instead moving the value to dest directly before the operation. */
744 copy_src_to_dest (insn, src, dest, old_max_uid)
763 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
764 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
765 parameter when there is no frame pointer that is not allocated a register.
766 For now, we just reject them, rather than incrementing the live length. */
768 if (GET_CODE (src) == REG
769 && REG_LIVE_LENGTH (REGNO (src)) > 0
770 && GET_CODE (dest) == REG
771 && REG_LIVE_LENGTH (REGNO (dest)) > 0
772 && (set = single_set (insn)) != NULL_RTX
773 && !reg_mentioned_p (dest, SET_SRC (set))
774 && GET_MODE (src) == GET_MODE (dest))
776 int old_num_regs = reg_rtx_no;
778 /* Generate the src->dest move. */
780 emit_move_insn (dest, src);
781 seq = gen_sequence ();
783 /* If this sequence uses new registers, we may not use it. */
784 if (old_num_regs != reg_rtx_no
785 || ! validate_replace_rtx (src, dest, insn))
787 /* We have to restore reg_rtx_no to its old value, lest
788 recompute_reg_usage will try to compute the usage of the
789 new regs, yet reg_n_info is not valid for them. */
790 reg_rtx_no = old_num_regs;
793 emit_insn_before (seq, insn);
794 move_insn = PREV_INSN (insn);
795 p_move_notes = ®_NOTES (move_insn);
796 p_insn_notes = ®_NOTES (insn);
798 /* Move any notes mentioning src to the move instruction */
799 for (link = REG_NOTES (insn); link != NULL_RTX; link = next)
801 next = XEXP (link, 1);
802 if (XEXP (link, 0) == src)
804 *p_move_notes = link;
805 p_move_notes = &XEXP (link, 1);
809 *p_insn_notes = link;
810 p_insn_notes = &XEXP (link, 1);
814 *p_move_notes = NULL_RTX;
815 *p_insn_notes = NULL_RTX;
817 /* Is the insn the head of a basic block? If so extend it */
818 insn_uid = INSN_UID (insn);
819 move_uid = INSN_UID (move_insn);
820 if (insn_uid < old_max_uid)
822 bb = regmove_bb_head[insn_uid];
825 BLOCK_HEAD (bb) = move_insn;
826 regmove_bb_head[insn_uid] = -1;
830 /* Update the various register tables. */
831 dest_regno = REGNO (dest);
832 REG_N_SETS (dest_regno) ++;
833 REG_LIVE_LENGTH (dest_regno)++;
834 if (REGNO_FIRST_UID (dest_regno) == insn_uid)
835 REGNO_FIRST_UID (dest_regno) = move_uid;
837 src_regno = REGNO (src);
838 if (! find_reg_note (move_insn, REG_DEAD, src))
839 REG_LIVE_LENGTH (src_regno)++;
841 if (REGNO_FIRST_UID (src_regno) == insn_uid)
842 REGNO_FIRST_UID (src_regno) = move_uid;
844 if (REGNO_LAST_UID (src_regno) == insn_uid)
845 REGNO_LAST_UID (src_regno) = move_uid;
847 if (REGNO_LAST_NOTE_UID (src_regno) == insn_uid)
848 REGNO_LAST_NOTE_UID (src_regno) = move_uid;
853 /* Return whether REG is set in only one location, and is set to a
854 constant, but is set in a different basic block from INSN (an
855 instructions which uses REG). In this case REG is equivalent to a
856 constant, and we don't want to break that equivalence, because that
857 may increase register pressure and make reload harder. If REG is
858 set in the same basic block as INSN, we don't worry about it,
859 because we'll probably need a register anyhow (??? but what if REG
860 is used in a different basic block as well as this one?). FIRST is
861 the first insn in the function. */
864 reg_is_remote_constant_p (reg, insn, first)
871 if (REG_N_SETS (REGNO (reg)) != 1)
874 /* Look for the set. */
875 for (p = LOG_LINKS (insn); p; p = XEXP (p, 1))
879 if (REG_NOTE_KIND (p) != 0)
881 s = single_set (XEXP (p, 0));
883 && GET_CODE (SET_DEST (s)) == REG
884 && REGNO (SET_DEST (s)) == REGNO (reg))
886 /* The register is set in the same basic block. */
891 for (p = first; p && p != insn; p = NEXT_INSN (p))
895 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
899 && GET_CODE (SET_DEST (s)) == REG
900 && REGNO (SET_DEST (s)) == REGNO (reg))
902 /* This is the instruction which sets REG. If there is a
903 REG_EQUAL note, then REG is equivalent to a constant. */
904 if (find_reg_note (p, REG_EQUAL, NULL_RTX))
913 /* INSN is adding a CONST_INT to a REG. We search backwards looking for
914 another add immediate instruction with the same source and dest registers,
915 and if we find one, we change INSN to an increment, and return 1. If
916 no changes are made, we return 0.
919 (set (reg100) (plus reg1 offset1))
921 (set (reg100) (plus reg1 offset2))
923 (set (reg100) (plus reg1 offset1))
925 (set (reg100) (plus reg100 offset2-offset1)) */
927 /* ??? What does this comment mean? */
928 /* cse disrupts preincrement / postdecrement squences when it finds a
929 hard register as ultimate source, like the frame pointer. */
932 fixup_match_2 (insn, dst, src, offset, regmove_dump_file)
933 rtx insn, dst, src, offset;
934 FILE *regmove_dump_file;
936 rtx p, dst_death = 0;
937 int length, num_calls = 0;
939 /* If SRC dies in INSN, we'd have to move the death note. This is
940 considered to be very unlikely, so we just skip the optimization
942 if (find_regno_note (insn, REG_DEAD, REGNO (src)))
945 /* Scan backward to find the first instruction that sets DST. */
947 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
951 if (GET_CODE (p) == CODE_LABEL
952 || GET_CODE (p) == JUMP_INSN
953 || (GET_CODE (p) == NOTE
954 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
955 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
958 /* ??? We can't scan past the end of a basic block without updating
959 the register lifetime info (REG_DEAD/basic_block_live_at_start).
960 A CALL_INSN might be the last insn of a basic block, if it is inside
961 an EH region. There is no easy way to tell, so we just always break
962 when we see a CALL_INSN if flag_exceptions is nonzero. */
963 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
966 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
969 if (find_regno_note (p, REG_DEAD, REGNO (dst)))
974 pset = single_set (p);
975 if (pset && SET_DEST (pset) == dst
976 && GET_CODE (SET_SRC (pset)) == PLUS
977 && XEXP (SET_SRC (pset), 0) == src
978 && GET_CODE (XEXP (SET_SRC (pset), 1)) == CONST_INT)
980 HOST_WIDE_INT newconst
981 = INTVAL (offset) - INTVAL (XEXP (SET_SRC (pset), 1));
982 rtx add = gen_add3_insn (dst, dst, GEN_INT (newconst));
984 if (add && validate_change (insn, &PATTERN (insn), add, 0))
986 /* Remove the death note for DST from DST_DEATH. */
989 remove_death (REGNO (dst), dst_death);
990 REG_LIVE_LENGTH (REGNO (dst)) += length;
991 REG_N_CALLS_CROSSED (REGNO (dst)) += num_calls;
994 if (regmove_dump_file)
995 fprintf (regmove_dump_file,
996 "Fixed operand of insn %d.\n",
1000 for (p = PREV_INSN (insn); p; p = PREV_INSN (p))
1002 if (GET_CODE (p) == CODE_LABEL
1003 || GET_CODE (p) == JUMP_INSN
1004 || (GET_CODE (p) == NOTE
1005 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1006 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1008 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1010 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1012 if (try_auto_increment (p, insn, 0, dst, newconst, 0))
1017 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
1019 if (GET_CODE (p) == CODE_LABEL
1020 || GET_CODE (p) == JUMP_INSN
1021 || (GET_CODE (p) == NOTE
1022 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1023 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1025 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1027 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1029 try_auto_increment (p, insn, 0, dst, newconst, 1);
1038 if (reg_set_p (dst, PATTERN (p)))
1041 /* If we have passed a call instruction, and the
1042 pseudo-reg SRC is not already live across a call,
1043 then don't perform the optimization. */
1044 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
1045 hard regs are clobbered. Thus, we only use it for src for
1047 if (GET_CODE (p) == CALL_INSN)
1052 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
1055 if (call_used_regs [REGNO (dst)]
1056 || find_reg_fusage (p, CLOBBER, dst))
1059 else if (reg_set_p (src, PATTERN (p)))
1067 regmove_optimize (f, nregs, regmove_dump_file)
1070 FILE *regmove_dump_file;
1072 int old_max_uid = get_max_uid ();
1077 rtx copy_src, copy_dst;
1079 /* Find out where a potential flags register is live, and so that we
1080 can supress some optimizations in those zones. */
1081 mark_flags_life_zones (discover_flags_reg ());
1083 regno_src_regno = (int *) xmalloc (sizeof *regno_src_regno * nregs);
1084 for (i = nregs; --i >= 0; ) regno_src_regno[i] = -1;
1086 regmove_bb_head = (int *) xmalloc (sizeof (int) * (old_max_uid + 1));
1087 for (i = old_max_uid; i >= 0; i--) regmove_bb_head[i] = -1;
1088 for (i = 0; i < n_basic_blocks; i++)
1089 regmove_bb_head[INSN_UID (BLOCK_HEAD (i))] = i;
1091 /* A forward/backward pass. Replace output operands with input operands. */
1093 for (pass = 0; pass <= 2; pass++)
1095 if (! flag_regmove && pass >= flag_expensive_optimizations)
1098 if (regmove_dump_file)
1099 fprintf (regmove_dump_file, "Starting %s pass...\n",
1100 pass ? "backward" : "forward");
1102 for (insn = pass ? get_last_insn () : f; insn;
1103 insn = pass ? PREV_INSN (insn) : NEXT_INSN (insn))
1106 int op_no, match_no;
1108 set = single_set (insn);
1112 if (flag_expensive_optimizations && ! pass
1113 && (GET_CODE (SET_SRC (set)) == SIGN_EXTEND
1114 || GET_CODE (SET_SRC (set)) == ZERO_EXTEND)
1115 && GET_CODE (XEXP (SET_SRC (set), 0)) == REG
1116 && GET_CODE (SET_DEST(set)) == REG)
1117 optimize_reg_copy_3 (insn, SET_DEST (set), SET_SRC (set));
1119 if (flag_expensive_optimizations && ! pass
1120 && GET_CODE (SET_SRC (set)) == REG
1121 && GET_CODE (SET_DEST(set)) == REG)
1123 /* If this is a register-register copy where SRC is not dead,
1124 see if we can optimize it. If this optimization succeeds,
1125 it will become a copy where SRC is dead. */
1126 if ((find_reg_note (insn, REG_DEAD, SET_SRC (set))
1127 || optimize_reg_copy_1 (insn, SET_DEST (set), SET_SRC (set)))
1128 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
1130 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
1131 if (REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER)
1132 optimize_reg_copy_2 (insn, SET_DEST (set), SET_SRC (set));
1133 if (regno_src_regno[REGNO (SET_DEST (set))] < 0
1134 && SET_SRC (set) != SET_DEST (set))
1136 int srcregno = REGNO (SET_SRC(set));
1137 if (regno_src_regno[srcregno] >= 0)
1138 srcregno = regno_src_regno[srcregno];
1139 regno_src_regno[REGNO (SET_DEST (set))] = srcregno;
1146 if (! find_matches (insn, &match))
1149 /* Now scan through the operands looking for a source operand
1150 which is supposed to match the destination operand.
1151 Then scan forward for an instruction which uses the dest
1153 If it dies there, then replace the dest in both operands with
1154 the source operand. */
1156 for (op_no = 0; op_no < recog_data.n_operands; op_no++)
1158 rtx src, dst, src_subreg;
1159 enum reg_class src_class, dst_class;
1161 match_no = match.with[op_no];
1163 /* Nothing to do if the two operands aren't supposed to match. */
1167 src = recog_data.operand[op_no];
1168 dst = recog_data.operand[match_no];
1170 if (GET_CODE (src) != REG)
1174 if (GET_CODE (dst) == SUBREG
1175 && GET_MODE_SIZE (GET_MODE (dst))
1176 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst))))
1179 = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst)),
1180 src, SUBREG_WORD (dst));
1181 dst = SUBREG_REG (dst);
1183 if (GET_CODE (dst) != REG
1184 || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1187 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1189 if (match.commutative[op_no] < op_no)
1190 regno_src_regno[REGNO (dst)] = REGNO (src);
1194 if (REG_LIVE_LENGTH (REGNO (src)) < 0)
1197 /* op_no/src must be a read-only operand, and
1198 match_operand/dst must be a write-only operand. */
1199 if (match.use[op_no] != READ
1200 || match.use[match_no] != WRITE)
1203 if (match.early_clobber[match_no]
1204 && count_occurrences (PATTERN (insn), src) > 1)
1207 /* Make sure match_operand is the destination. */
1208 if (recog_data.operand[match_no] != SET_DEST (set))
1211 /* If the operands already match, then there is nothing to do. */
1212 if (operands_match_p (src, dst))
1215 /* But in the commutative case, we might find a better match. */
1216 if (match.commutative[op_no] >= 0)
1218 rtx comm = recog_data.operand[match.commutative[op_no]];
1219 if (operands_match_p (comm, dst)
1220 && (replacement_quality (comm)
1221 >= replacement_quality (src)))
1225 src_class = reg_preferred_class (REGNO (src));
1226 dst_class = reg_preferred_class (REGNO (dst));
1227 if (! regclass_compatible_p (src_class, dst_class))
1230 if (fixup_match_1 (insn, set, src, src_subreg, dst, pass,
1238 /* A backward pass. Replace input operands with output operands. */
1240 if (regmove_dump_file)
1241 fprintf (regmove_dump_file, "Starting backward pass...\n");
1243 for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
1245 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1247 int op_no, match_no;
1250 if (! find_matches (insn, &match))
1253 /* Now scan through the operands looking for a destination operand
1254 which is supposed to match a source operand.
1255 Then scan backward for an instruction which sets the source
1256 operand. If safe, then replace the source operand with the
1257 dest operand in both instructions. */
1259 copy_src = NULL_RTX;
1260 copy_dst = NULL_RTX;
1261 for (op_no = 0; op_no < recog_data.n_operands; op_no++)
1263 rtx set, p, src, dst;
1264 rtx src_note, dst_note;
1266 enum reg_class src_class, dst_class;
1269 match_no = match.with[op_no];
1271 /* Nothing to do if the two operands aren't supposed to match. */
1275 dst = recog_data.operand[match_no];
1276 src = recog_data.operand[op_no];
1278 if (GET_CODE (src) != REG)
1281 if (GET_CODE (dst) != REG
1282 || REGNO (dst) < FIRST_PSEUDO_REGISTER
1283 || REG_LIVE_LENGTH (REGNO (dst)) < 0)
1286 /* If the operands already match, then there is nothing to do. */
1287 if (operands_match_p (src, dst))
1290 if (match.commutative[op_no] >= 0)
1292 rtx comm = recog_data.operand[match.commutative[op_no]];
1293 if (operands_match_p (comm, dst))
1297 set = single_set (insn);
1301 /* match_no/dst must be a write-only operand, and
1302 operand_operand/src must be a read-only operand. */
1303 if (match.use[op_no] != READ
1304 || match.use[match_no] != WRITE)
1307 if (match.early_clobber[match_no]
1308 && count_occurrences (PATTERN (insn), src) > 1)
1311 /* Make sure match_no is the destination. */
1312 if (recog_data.operand[match_no] != SET_DEST (set))
1315 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1317 if (GET_CODE (SET_SRC (set)) == PLUS
1318 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT
1319 && XEXP (SET_SRC (set), 0) == src
1320 && fixup_match_2 (insn, dst, src,
1321 XEXP (SET_SRC (set), 1),
1326 src_class = reg_preferred_class (REGNO (src));
1327 dst_class = reg_preferred_class (REGNO (dst));
1328 if (! regclass_compatible_p (src_class, dst_class))
1338 /* Can not modify an earlier insn to set dst if this insn
1339 uses an old value in the source. */
1340 if (reg_overlap_mentioned_p (dst, SET_SRC (set)))
1350 if (! (src_note = find_reg_note (insn, REG_DEAD, src)))
1361 /* If src is set once in a different basic block,
1362 and is set equal to a constant, then do not use
1363 it for this optimization, as this would make it
1364 no longer equivalent to a constant. */
1366 if (reg_is_remote_constant_p (src, insn, f))
1377 if (regmove_dump_file)
1378 fprintf (regmove_dump_file,
1379 "Could fix operand %d of insn %d matching operand %d.\n",
1380 op_no, INSN_UID (insn), match_no);
1382 /* Scan backward to find the first instruction that uses
1383 the input operand. If the operand is set here, then
1384 replace it in both instructions with match_no. */
1386 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
1390 if (GET_CODE (p) == CODE_LABEL
1391 || GET_CODE (p) == JUMP_INSN
1392 || (GET_CODE (p) == NOTE
1393 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1394 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1397 /* ??? We can't scan past the end of a basic block without
1398 updating the register lifetime info
1399 (REG_DEAD/basic_block_live_at_start).
1400 A CALL_INSN might be the last insn of a basic block, if
1401 it is inside an EH region. There is no easy way to tell,
1402 so we just always break when we see a CALL_INSN if
1403 flag_exceptions is nonzero. */
1404 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
1407 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1412 /* ??? See if all of SRC is set in P. This test is much
1413 more conservative than it needs to be. */
1414 pset = single_set (p);
1415 if (pset && SET_DEST (pset) == src)
1417 /* We use validate_replace_rtx, in case there
1418 are multiple identical source operands. All of
1419 them have to be changed at the same time. */
1420 if (validate_replace_rtx (src, dst, insn))
1422 if (validate_change (p, &SET_DEST (pset),
1427 /* Change all source operands back.
1428 This modifies the dst as a side-effect. */
1429 validate_replace_rtx (dst, src, insn);
1430 /* Now make sure the dst is right. */
1431 validate_change (insn,
1432 recog_data.operand_loc[match_no],
1439 if (reg_overlap_mentioned_p (src, PATTERN (p))
1440 || reg_overlap_mentioned_p (dst, PATTERN (p)))
1443 /* If we have passed a call instruction, and the
1444 pseudo-reg DST is not already live across a call,
1445 then don't perform the optimization. */
1446 if (GET_CODE (p) == CALL_INSN)
1450 if (REG_N_CALLS_CROSSED (REGNO (dst)) == 0)
1459 /* Remove the death note for SRC from INSN. */
1460 remove_note (insn, src_note);
1461 /* Move the death note for SRC to P if it is used
1463 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1465 XEXP (src_note, 1) = REG_NOTES (p);
1466 REG_NOTES (p) = src_note;
1468 /* If there is a REG_DEAD note for DST on P, then remove
1469 it, because DST is now set there. */
1470 if ((dst_note = find_reg_note (p, REG_DEAD, dst)))
1471 remove_note (p, dst_note);
1473 dstno = REGNO (dst);
1474 srcno = REGNO (src);
1476 REG_N_SETS (dstno)++;
1477 REG_N_SETS (srcno)--;
1479 REG_N_CALLS_CROSSED (dstno) += num_calls;
1480 REG_N_CALLS_CROSSED (srcno) -= num_calls;
1482 REG_LIVE_LENGTH (dstno) += length;
1483 if (REG_LIVE_LENGTH (srcno) >= 0)
1485 REG_LIVE_LENGTH (srcno) -= length;
1486 /* REG_LIVE_LENGTH is only an approximation after
1487 combine if sched is not run, so make sure that we
1488 still have a reasonable value. */
1489 if (REG_LIVE_LENGTH (srcno) < 2)
1490 REG_LIVE_LENGTH (srcno) = 2;
1493 if (regmove_dump_file)
1494 fprintf (regmove_dump_file,
1495 "Fixed operand %d of insn %d matching operand %d.\n",
1496 op_no, INSN_UID (insn), match_no);
1502 /* If we weren't able to replace any of the alternatives, try an
1503 alternative appoach of copying the source to the destination. */
1504 if (!success && copy_src != NULL_RTX)
1505 copy_src_to_dest (insn, copy_src, copy_dst, old_max_uid);
1510 /* In fixup_match_1, some insns may have been inserted after basic block
1511 ends. Fix that here. */
1512 for (i = 0; i < n_basic_blocks; i++)
1514 rtx end = BLOCK_END (i);
1516 rtx next = NEXT_INSN (new);
1517 while (next != 0 && INSN_UID (next) >= old_max_uid
1518 && (i == n_basic_blocks - 1 || BLOCK_HEAD (i + 1) != next))
1519 new = next, next = NEXT_INSN (new);
1520 BLOCK_END (i) = new;
1525 free (regno_src_regno);
1526 free (regmove_bb_head);
1529 /* Returns nonzero if INSN's pattern has matching constraints for any operand.
1530 Returns 0 if INSN can't be recognized, or if the alternative can't be
1533 Initialize the info in MATCHP based on the constraints. */
1536 find_matches (insn, matchp)
1538 struct match *matchp;
1540 int likely_spilled[MAX_RECOG_OPERANDS];
1542 int any_matches = 0;
1544 extract_insn (insn);
1545 if (! constrain_operands (0))
1548 /* Must initialize this before main loop, because the code for
1549 the commutative case may set matches for operands other than
1551 for (op_no = recog_data.n_operands; --op_no >= 0; )
1552 matchp->with[op_no] = matchp->commutative[op_no] = -1;
1554 for (op_no = 0; op_no < recog_data.n_operands; op_no++)
1560 p = recog_data.constraints[op_no];
1562 likely_spilled[op_no] = 0;
1563 matchp->use[op_no] = READ;
1564 matchp->early_clobber[op_no] = 0;
1566 matchp->use[op_no] = WRITE;
1568 matchp->use[op_no] = READWRITE;
1570 for (;*p && i < which_alternative; p++)
1574 while ((c = *p++) != '\0' && c != ',')
1582 matchp->early_clobber[op_no] = 1;
1585 matchp->commutative[op_no] = op_no + 1;
1586 matchp->commutative[op_no + 1] = op_no;
1588 case '0': case '1': case '2': case '3': case '4':
1589 case '5': case '6': case '7': case '8': case '9':
1591 if (c < op_no && likely_spilled[(unsigned char) c])
1593 matchp->with[op_no] = c;
1595 if (matchp->commutative[op_no] >= 0)
1596 matchp->with[matchp->commutative[op_no]] = c;
1598 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1599 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1600 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1601 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1602 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER ((unsigned char)c)))
1603 likely_spilled[op_no] = 1;
1610 /* Try to replace output operand DST in SET, with input operand SRC. SET is
1611 the only set in INSN. INSN has just been recognized and constrained.
1612 SRC is operand number OPERAND_NUMBER in INSN.
1613 DST is operand number MATCH_NUMBER in INSN.
1614 If BACKWARD is nonzero, we have been called in a backward pass.
1615 Return nonzero for success. */
1617 fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number,
1618 match_number, regmove_dump_file)
1619 rtx insn, set, src, src_subreg, dst;
1620 int backward, operand_number, match_number;
1621 FILE *regmove_dump_file;
1624 rtx post_inc = 0, post_inc_set = 0, search_end = 0;
1626 int num_calls = 0, s_num_calls = 0;
1627 enum rtx_code code = NOTE;
1628 HOST_WIDE_INT insn_const, newconst;
1629 rtx overlap = 0; /* need to move insn ? */
1630 rtx src_note = find_reg_note (insn, REG_DEAD, src), dst_note;
1631 int length, s_length;
1633 /* If SRC is marked as unchanging, we may not change it.
1634 ??? Maybe we could get better code by removing the unchanging bit
1635 instead, and changing it back if we don't succeed? */
1636 if (RTX_UNCHANGING_P (src))
1641 /* Look for (set (regX) (op regA constX))
1642 (set (regY) (op regA constY))
1644 (set (regA) (op regA constX)).
1645 (set (regY) (op regA constY-constX)).
1646 This works for add and shift operations, if
1647 regA is dead after or set by the second insn. */
1649 code = GET_CODE (SET_SRC (set));
1650 if ((code == PLUS || code == LSHIFTRT
1651 || code == ASHIFT || code == ASHIFTRT)
1652 && XEXP (SET_SRC (set), 0) == src
1653 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT)
1654 insn_const = INTVAL (XEXP (SET_SRC (set), 1));
1655 else if (! stable_and_no_regs_but_for_p (SET_SRC (set), src, dst))
1658 /* We might find a src_note while scanning. */
1662 if (regmove_dump_file)
1663 fprintf (regmove_dump_file,
1664 "Could fix operand %d of insn %d matching operand %d.\n",
1665 operand_number, INSN_UID (insn), match_number);
1667 /* If SRC is equivalent to a constant set in a different basic block,
1668 then do not use it for this optimization. We want the equivalence
1669 so that if we have to reload this register, we can reload the
1670 constant, rather than extending the lifespan of the register. */
1671 if (reg_is_remote_constant_p (src, insn, get_insns ()))
1674 /* Scan forward to find the next instruction that
1675 uses the output operand. If the operand dies here,
1676 then replace it in both instructions with
1679 for (length = s_length = 0, p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
1681 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
1682 || (GET_CODE (p) == NOTE
1683 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1684 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1687 /* ??? We can't scan past the end of a basic block without updating
1688 the register lifetime info (REG_DEAD/basic_block_live_at_start).
1689 A CALL_INSN might be the last insn of a basic block, if it is
1690 inside an EH region. There is no easy way to tell, so we just
1691 always break when we see a CALL_INSN if flag_exceptions is nonzero. */
1692 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
1695 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1702 if (reg_set_p (src, p) || reg_set_p (dst, p)
1703 || (GET_CODE (PATTERN (p)) == USE
1704 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
1707 /* See if all of DST dies in P. This test is
1708 slightly more conservative than it needs to be. */
1709 if ((dst_note = find_regno_note (p, REG_DEAD, REGNO (dst)))
1710 && (GET_MODE (XEXP (dst_note, 0)) == GET_MODE (dst)))
1712 /* If we would be moving INSN, check that we won't move it
1713 into the shadow of a live a live flags register. */
1714 /* ??? We only try to move it in front of P, although
1715 we could move it anywhere between OVERLAP and P. */
1716 if (overlap && GET_MODE (PREV_INSN (p)) != VOIDmode)
1724 /* If an optimization is done, the value of SRC while P
1725 is executed will be changed. Check that this is OK. */
1726 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1728 for (q = p; q; q = NEXT_INSN (q))
1730 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1731 || (GET_CODE (q) == NOTE
1732 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1733 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1739 /* ??? We can't scan past the end of a basic block without
1740 updating the register lifetime info
1741 (REG_DEAD/basic_block_live_at_start).
1742 A CALL_INSN might be the last insn of a basic block, if
1743 it is inside an EH region. There is no easy way to tell,
1744 so we just always break when we see a CALL_INSN if
1745 flag_exceptions is nonzero. */
1746 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1752 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1754 if (reg_overlap_mentioned_p (src, PATTERN (q))
1755 || reg_set_p (src, q))
1759 set2 = single_set (q);
1760 if (! q || ! set2 || GET_CODE (SET_SRC (set2)) != code
1761 || XEXP (SET_SRC (set2), 0) != src
1762 || GET_CODE (XEXP (SET_SRC (set2), 1)) != CONST_INT
1763 || (SET_DEST (set2) != src
1764 && ! find_reg_note (q, REG_DEAD, src)))
1766 /* If this is a PLUS, we can still save a register by doing
1769 src -= insn_const; .
1770 This also gives opportunities for subsequent
1771 optimizations in the backward pass, so do it there. */
1772 if (code == PLUS && backward
1773 /* Don't do this if we can likely tie DST to SET_DEST
1774 of P later; we can't do this tying here if we got a
1776 && ! (dst_note && ! REG_N_CALLS_CROSSED (REGNO (dst))
1778 && GET_CODE (SET_DEST (single_set (p))) == REG
1779 && (REGNO (SET_DEST (single_set (p)))
1780 < FIRST_PSEUDO_REGISTER))
1781 /* We may only emit an insn directly after P if we
1782 are not in the shadow of a live flags register. */
1783 && GET_MODE (p) == VOIDmode)
1788 newconst = -insn_const;
1796 newconst = INTVAL (XEXP (SET_SRC (set2), 1)) - insn_const;
1797 /* Reject out of range shifts. */
1801 >= GET_MODE_BITSIZE (GET_MODE (SET_SRC (set2))))))
1806 if (SET_DEST (set2) != src)
1807 post_inc_set = set2;
1810 /* We use 1 as last argument to validate_change so that all
1811 changes are accepted or rejected together by apply_change_group
1812 when it is called by validate_replace_rtx . */
1813 validate_change (q, &XEXP (SET_SRC (set2), 1),
1814 GEN_INT (newconst), 1);
1816 validate_change (insn, recog_data.operand_loc[match_number], src, 1);
1817 if (validate_replace_rtx (dst, src_subreg, p))
1822 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1824 if (! src_note && reg_overlap_mentioned_p (src, PATTERN (p)))
1826 /* INSN was already checked to be movable wrt. the registers that it
1827 sets / uses when we found no REG_DEAD note for src on it, but it
1828 still might clobber the flags register. We'll have to check that
1829 we won't insert it into the shadow of a live flags register when
1830 we finally know where we are to move it. */
1832 src_note = find_reg_note (p, REG_DEAD, src);
1835 /* If we have passed a call instruction, and the pseudo-reg SRC is not
1836 already live across a call, then don't perform the optimization. */
1837 if (GET_CODE (p) == CALL_INSN)
1839 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
1853 /* Remove the death note for DST from P. */
1854 remove_note (p, dst_note);
1857 post_inc = emit_insn_after (copy_rtx (PATTERN (insn)), p);
1858 if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT)
1860 && try_auto_increment (search_end, post_inc, 0, src, newconst, 1))
1862 validate_change (insn, &XEXP (SET_SRC (set), 1), GEN_INT (insn_const), 0);
1863 REG_N_SETS (REGNO (src))++;
1864 REG_LIVE_LENGTH (REGNO (src))++;
1868 /* The lifetime of src and dest overlap,
1869 but we can change this by moving insn. */
1870 rtx pat = PATTERN (insn);
1872 remove_note (overlap, src_note);
1873 if ((HAVE_POST_INCREMENT || HAVE_POST_DECREMENT)
1875 && try_auto_increment (overlap, insn, 0, src, insn_const, 0))
1879 rtx notes = REG_NOTES (insn);
1881 emit_insn_after_with_line_notes (pat, PREV_INSN (p), insn);
1882 PUT_CODE (insn, NOTE);
1883 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1884 NOTE_SOURCE_FILE (insn) = 0;
1885 /* emit_insn_after_with_line_notes has no
1886 return value, so search for the new insn. */
1888 while (GET_RTX_CLASS (GET_CODE (insn)) != 'i'
1889 || PATTERN (insn) != pat)
1890 insn = PREV_INSN (insn);
1892 REG_NOTES (insn) = notes;
1895 /* Sometimes we'd generate src = const; src += n;
1896 if so, replace the instruction that set src
1897 in the first place. */
1899 if (! overlap && (code == PLUS || code == MINUS))
1901 rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
1903 int num_calls2 = 0, s_length2 = 0;
1905 if (note && CONSTANT_P (XEXP (note, 0)))
1907 for (q = PREV_INSN (insn); q; q = PREV_INSN(q))
1909 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1910 || (GET_CODE (q) == NOTE
1911 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1912 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1918 /* ??? We can't scan past the end of a basic block without
1919 updating the register lifetime info
1920 (REG_DEAD/basic_block_live_at_start).
1921 A CALL_INSN might be the last insn of a basic block, if
1922 it is inside an EH region. There is no easy way to tell,
1923 so we just always break when we see a CALL_INSN if
1924 flag_exceptions is nonzero. */
1925 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1931 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1934 if (reg_set_p (src, q))
1936 set2 = single_set (q);
1939 if (reg_overlap_mentioned_p (src, PATTERN (q)))
1944 if (GET_CODE (p) == CALL_INSN)
1947 if (q && set2 && SET_DEST (set2) == src && CONSTANT_P (SET_SRC (set2))
1948 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
1951 NOTE_LINE_NUMBER (q) = NOTE_INSN_DELETED;
1952 NOTE_SOURCE_FILE (q) = 0;
1953 REG_N_SETS (REGNO (src))--;
1954 REG_N_CALLS_CROSSED (REGNO (src)) -= num_calls2;
1955 REG_LIVE_LENGTH (REGNO (src)) -= s_length2;
1961 if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT)
1962 && (code == PLUS || code == MINUS) && insn_const
1963 && try_auto_increment (p, insn, 0, src, insn_const, 1))
1965 else if ((HAVE_POST_INCREMENT || HAVE_POST_DECREMENT)
1967 && try_auto_increment (p, post_inc, post_inc_set, src, newconst, 0))
1969 /* If post_inc still prevails, try to find an
1970 insn where it can be used as a pre-in/decrement.
1971 If code is MINUS, this was already tried. */
1972 if (post_inc && code == PLUS
1973 /* Check that newconst is likely to be usable
1974 in a pre-in/decrement before starting the search. */
1975 && ((HAVE_PRE_INCREMENT && newconst > 0 && newconst <= MOVE_MAX)
1976 || (HAVE_PRE_DECREMENT && newconst < 0 && newconst >= -MOVE_MAX))
1977 && exact_log2 (newconst))
1981 inc_dest = post_inc_set ? SET_DEST (post_inc_set) : src;
1982 for (q = post_inc; (q = NEXT_INSN (q)); )
1984 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1985 || (GET_CODE (q) == NOTE
1986 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1987 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1990 /* ??? We can't scan past the end of a basic block without updating
1991 the register lifetime info (REG_DEAD/basic_block_live_at_start).
1992 A CALL_INSN might be the last insn of a basic block, if it
1993 is inside an EH region. There is no easy way to tell so we
1994 just always break when we see a CALL_INSN if flag_exceptions
1996 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1999 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
2001 if (src != inc_dest && (reg_overlap_mentioned_p (src, PATTERN (q))
2002 || reg_set_p (src, q)))
2004 if (reg_set_p (inc_dest, q))
2006 if (reg_overlap_mentioned_p (inc_dest, PATTERN (q)))
2008 try_auto_increment (q, post_inc,
2009 post_inc_set, inc_dest, newconst, 1);
2014 /* Move the death note for DST to INSN if it is used
2016 if (reg_overlap_mentioned_p (dst, PATTERN (insn)))
2018 XEXP (dst_note, 1) = REG_NOTES (insn);
2019 REG_NOTES (insn) = dst_note;
2024 /* Move the death note for SRC from INSN to P. */
2026 remove_note (insn, src_note);
2027 XEXP (src_note, 1) = REG_NOTES (p);
2028 REG_NOTES (p) = src_note;
2030 REG_N_CALLS_CROSSED (REGNO (src)) += s_num_calls;
2033 REG_N_SETS (REGNO (src))++;
2034 REG_N_SETS (REGNO (dst))--;
2036 REG_N_CALLS_CROSSED (REGNO (dst)) -= num_calls;
2038 REG_LIVE_LENGTH (REGNO (src)) += s_length;
2039 if (REG_LIVE_LENGTH (REGNO (dst)) >= 0)
2041 REG_LIVE_LENGTH (REGNO (dst)) -= length;
2042 /* REG_LIVE_LENGTH is only an approximation after
2043 combine if sched is not run, so make sure that we
2044 still have a reasonable value. */
2045 if (REG_LIVE_LENGTH (REGNO (dst)) < 2)
2046 REG_LIVE_LENGTH (REGNO (dst)) = 2;
2048 if (regmove_dump_file)
2049 fprintf (regmove_dump_file,
2050 "Fixed operand %d of insn %d matching operand %d.\n",
2051 operand_number, INSN_UID (insn), match_number);
2056 /* return nonzero if X is stable and mentions no regsiters but for
2057 mentioning SRC or mentioning / changing DST . If in doubt, presume
2059 The rationale is that we want to check if we can move an insn easily
2060 while just paying attention to SRC and DST. A register is considered
2061 stable if it has the RTX_UNCHANGING_P bit set, but that would still
2062 leave the burden to update REG_DEAD / REG_UNUSED notes, so we don't
2063 want any registers but SRC and DST. */
2065 stable_and_no_regs_but_for_p (x, src, dst)
2068 RTX_CODE code = GET_CODE (x);
2069 switch (GET_RTX_CLASS (code))
2071 case '<': case '1': case 'c': case '2': case 'b': case '3':
2074 const char *fmt = GET_RTX_FORMAT (code);
2075 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2077 && ! stable_and_no_regs_but_for_p (XEXP (x, i), src, dst))
2083 return x == src || x == dst;
2084 /* If this is a MEM, look inside - there might be a register hidden in
2085 the address of an unchanging MEM. */
2087 && ! stable_and_no_regs_but_for_p (XEXP (x, 0), src, dst))
2091 return ! rtx_unstable_p (x);