1 /* Compute different info about registers.
2 Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996
3 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
4 2009 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* This file contains regscan pass of the compiler and passes for
24 dealing with info about modes of pseudo-registers inside
25 subregisters. It also defines some tables of information about the
26 hardware registers, function init_reg_sets to initialize the
27 tables, and other auxiliary functions to deal with info about
28 registers and their classes. */
32 #include "coretypes.h"
34 #include "hard-reg-set.h"
39 #include "basic-block.h"
41 #include "addresses.h"
43 #include "insn-config.h"
52 #include "tree-pass.h"
56 /* Maximum register number used in this function, plus one. */
61 /* Register tables used by many passes. */
63 /* Indexed by hard register number, contains 1 for registers
64 that are fixed use (stack pointer, pc, frame pointer, etc.).
65 These are the registers that cannot be used to allocate
66 a pseudo reg for general use. */
67 char fixed_regs[FIRST_PSEUDO_REGISTER];
69 /* Same info as a HARD_REG_SET. */
70 HARD_REG_SET fixed_reg_set;
72 /* Data for initializing the above. */
73 static const char initial_fixed_regs[] = FIXED_REGISTERS;
75 /* Indexed by hard register number, contains 1 for registers
76 that are fixed use or are clobbered by function calls.
77 These are the registers that cannot be used to allocate
78 a pseudo reg whose life crosses calls unless we are able
79 to save/restore them across the calls. */
80 char call_used_regs[FIRST_PSEUDO_REGISTER];
82 /* Same info as a HARD_REG_SET. */
83 HARD_REG_SET call_used_reg_set;
85 /* Data for initializing the above. */
86 static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
88 /* This is much like call_used_regs, except it doesn't have to
89 be a superset of FIXED_REGISTERS. This vector indicates
90 what is really call clobbered, and is used when defining
91 regs_invalidated_by_call. */
92 #ifdef CALL_REALLY_USED_REGISTERS
93 char call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
96 #ifdef CALL_REALLY_USED_REGISTERS
97 #define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X]
99 #define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X]
103 /* Contains registers that are fixed use -- i.e. in fixed_reg_set -- or
104 a function value return register or TARGET_STRUCT_VALUE_RTX or
105 STATIC_CHAIN_REGNUM. These are the registers that cannot hold quantities
106 across calls even if we are willing to save and restore them. */
108 HARD_REG_SET call_fixed_reg_set;
110 /* Indexed by hard register number, contains 1 for registers
111 that are being used for global register decls.
112 These must be exempt from ordinary flow analysis
113 and are also considered fixed. */
114 char global_regs[FIRST_PSEUDO_REGISTER];
116 /* Contains 1 for registers that are set or clobbered by calls. */
117 /* ??? Ideally, this would be just call_used_regs plus global_regs, but
118 for someone's bright idea to have call_used_regs strictly include
119 fixed_regs. Which leaves us guessing as to the set of fixed_regs
120 that are actually preserved. We know for sure that those associated
121 with the local stack frame are safe, but scant others. */
122 HARD_REG_SET regs_invalidated_by_call;
124 /* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used
125 in dataflow more conveniently. */
126 regset regs_invalidated_by_call_regset;
128 /* The bitmap_obstack is used to hold some static variables that
129 should not be reset after each function is compiled. */
130 static bitmap_obstack persistent_obstack;
132 /* Table of register numbers in the order in which to try to use them. */
133 #ifdef REG_ALLOC_ORDER
134 int reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
136 /* The inverse of reg_alloc_order. */
137 int inv_reg_alloc_order[FIRST_PSEUDO_REGISTER];
140 /* For each reg class, a HARD_REG_SET saying which registers are in it. */
141 HARD_REG_SET reg_class_contents[N_REG_CLASSES];
143 /* The same information, but as an array of unsigned ints. We copy from
144 these unsigned ints to the table above. We do this so the tm.h files
145 do not have to be aware of the wordsize for machines with <= 64 regs.
146 Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
148 ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
150 static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
151 = REG_CLASS_CONTENTS;
153 /* For each reg class, number of regs it contains. */
154 unsigned int reg_class_size[N_REG_CLASSES];
156 /* For each reg class, table listing all the classes contained in it. */
157 enum reg_class reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
159 /* For each pair of reg classes,
160 a largest reg class contained in their union. */
161 enum reg_class reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
163 /* For each pair of reg classes,
164 the smallest reg class containing their union. */
165 enum reg_class reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
167 /* Array containing all of the register names. */
168 const char * reg_names[] = REGISTER_NAMES;
170 /* Array containing all of the register class names. */
171 const char * reg_class_names[] = REG_CLASS_NAMES;
173 /* For each hard register, the widest mode object that it can contain.
174 This will be a MODE_INT mode if the register can hold integers. Otherwise
175 it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
177 enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];
179 /* 1 if there is a register of given mode. */
180 bool have_regs_of_mode [MAX_MACHINE_MODE];
182 /* 1 if class does contain register of given mode. */
183 char contains_reg_of_mode [N_REG_CLASSES] [MAX_MACHINE_MODE];
185 /* Maximum cost of moving from a register in one class to a register in
186 another class. Based on TARGET_REGISTER_MOVE_COST. */
187 move_table *move_cost[MAX_MACHINE_MODE];
189 /* Similar, but here we don't have to move if the first index is a subset
190 of the second so in that case the cost is zero. */
191 move_table *may_move_in_cost[MAX_MACHINE_MODE];
193 /* Similar, but here we don't have to move if the first index is a superset
194 of the second so in that case the cost is zero. */
195 move_table *may_move_out_cost[MAX_MACHINE_MODE];
197 /* Keep track of the last mode we initialized move costs for. */
198 static int last_mode_for_init_move_cost;
200 /* Sample MEM values for use by memory_move_secondary_cost. */
201 static GTY(()) rtx top_of_stack[MAX_MACHINE_MODE];
203 /* No more global register variables may be declared; true once
204 reginfo has been initialized. */
205 static int no_global_reg_vars = 0;
207 /* Specify number of hard registers given machine mode occupy. */
208 unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
210 /* Given a register bitmap, turn on the bits in a HARD_REG_SET that
211 correspond to the hard registers, if any, set in that map. This
212 could be done far more efficiently by having all sorts of special-cases
213 with moving single words, but probably isn't worth the trouble. */
215 reg_set_to_hard_reg_set (HARD_REG_SET *to, const_bitmap from)
220 EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi)
222 if (i >= FIRST_PSEUDO_REGISTER)
224 SET_HARD_REG_BIT (*to, i);
228 /* Function called only once to initialize the above data on reg usage.
229 Once this is done, various switches may override. */
235 /* First copy the register information from the initial int form into
238 for (i = 0; i < N_REG_CLASSES; i++)
240 CLEAR_HARD_REG_SET (reg_class_contents[i]);
242 /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
243 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
244 if (int_reg_class_contents[i][j / 32]
245 & ((unsigned) 1 << (j % 32)))
246 SET_HARD_REG_BIT (reg_class_contents[i], j);
249 /* Sanity check: make sure the target macros FIXED_REGISTERS and
250 CALL_USED_REGISTERS had the right number of initializers. */
251 gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
252 gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
254 memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
255 memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
256 memset (global_regs, 0, sizeof global_regs);
259 /* Initialize may_move_cost and friends for mode M. */
261 init_move_cost (enum machine_mode m)
263 static unsigned short last_move_cost[N_REG_CLASSES][N_REG_CLASSES];
264 bool all_match = true;
267 gcc_assert (have_regs_of_mode[m]);
268 for (i = 0; i < N_REG_CLASSES; i++)
269 if (contains_reg_of_mode[i][m])
270 for (j = 0; j < N_REG_CLASSES; j++)
273 if (!contains_reg_of_mode[j][m])
277 cost = register_move_cost (m, (enum reg_class) i,
279 gcc_assert (cost < 65535);
281 all_match &= (last_move_cost[i][j] == cost);
282 last_move_cost[i][j] = cost;
284 if (all_match && last_mode_for_init_move_cost != -1)
286 move_cost[m] = move_cost[last_mode_for_init_move_cost];
287 may_move_in_cost[m] = may_move_in_cost[last_mode_for_init_move_cost];
288 may_move_out_cost[m] = may_move_out_cost[last_mode_for_init_move_cost];
291 last_mode_for_init_move_cost = m;
292 move_cost[m] = (move_table *)xmalloc (sizeof (move_table)
294 may_move_in_cost[m] = (move_table *)xmalloc (sizeof (move_table)
296 may_move_out_cost[m] = (move_table *)xmalloc (sizeof (move_table)
298 for (i = 0; i < N_REG_CLASSES; i++)
299 if (contains_reg_of_mode[i][m])
300 for (j = 0; j < N_REG_CLASSES; j++)
303 enum reg_class *p1, *p2;
305 if (last_move_cost[i][j] == 65535)
307 move_cost[m][i][j] = 65535;
308 may_move_in_cost[m][i][j] = 65535;
309 may_move_out_cost[m][i][j] = 65535;
313 cost = last_move_cost[i][j];
315 for (p2 = ®_class_subclasses[j][0];
316 *p2 != LIM_REG_CLASSES; p2++)
317 if (*p2 != i && contains_reg_of_mode[*p2][m])
318 cost = MAX (cost, move_cost[m][i][*p2]);
320 for (p1 = ®_class_subclasses[i][0];
321 *p1 != LIM_REG_CLASSES; p1++)
322 if (*p1 != j && contains_reg_of_mode[*p1][m])
323 cost = MAX (cost, move_cost[m][*p1][j]);
325 gcc_assert (cost <= 65535);
326 move_cost[m][i][j] = cost;
328 if (reg_class_subset_p ((enum reg_class) i, (enum reg_class) j))
329 may_move_in_cost[m][i][j] = 0;
331 may_move_in_cost[m][i][j] = cost;
333 if (reg_class_subset_p ((enum reg_class) j, (enum reg_class) i))
334 may_move_out_cost[m][i][j] = 0;
336 may_move_out_cost[m][i][j] = cost;
340 for (j = 0; j < N_REG_CLASSES; j++)
342 move_cost[m][i][j] = 65535;
343 may_move_in_cost[m][i][j] = 65535;
344 may_move_out_cost[m][i][j] = 65535;
348 /* We need to save copies of some of the register information which
349 can be munged by command-line switches so we can restore it during
350 subsequent back-end reinitialization. */
351 static char saved_fixed_regs[FIRST_PSEUDO_REGISTER];
352 static char saved_call_used_regs[FIRST_PSEUDO_REGISTER];
353 #ifdef CALL_REALLY_USED_REGISTERS
354 static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER];
356 static const char *saved_reg_names[FIRST_PSEUDO_REGISTER];
358 /* Save the register information. */
360 save_register_info (void)
362 /* Sanity check: make sure the target macros FIXED_REGISTERS and
363 CALL_USED_REGISTERS had the right number of initializers. */
364 gcc_assert (sizeof fixed_regs == sizeof saved_fixed_regs);
365 gcc_assert (sizeof call_used_regs == sizeof saved_call_used_regs);
366 memcpy (saved_fixed_regs, fixed_regs, sizeof fixed_regs);
367 memcpy (saved_call_used_regs, call_used_regs, sizeof call_used_regs);
369 /* Likewise for call_really_used_regs. */
370 #ifdef CALL_REALLY_USED_REGISTERS
371 gcc_assert (sizeof call_really_used_regs
372 == sizeof saved_call_really_used_regs);
373 memcpy (saved_call_really_used_regs, call_really_used_regs,
374 sizeof call_really_used_regs);
377 /* And similarly for reg_names. */
378 gcc_assert (sizeof reg_names == sizeof saved_reg_names);
379 memcpy (saved_reg_names, reg_names, sizeof reg_names);
382 /* Restore the register information. */
384 restore_register_info (void)
386 memcpy (fixed_regs, saved_fixed_regs, sizeof fixed_regs);
387 memcpy (call_used_regs, saved_call_used_regs, sizeof call_used_regs);
389 #ifdef CALL_REALLY_USED_REGISTERS
390 memcpy (call_really_used_regs, saved_call_really_used_regs,
391 sizeof call_really_used_regs);
394 memcpy (reg_names, saved_reg_names, sizeof reg_names);
397 /* After switches have been processed, which perhaps alter
398 `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
400 init_reg_sets_1 (void)
403 unsigned int /* enum machine_mode */ m;
405 restore_register_info ();
407 #ifdef REG_ALLOC_ORDER
408 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
409 inv_reg_alloc_order[reg_alloc_order[i]] = i;
412 /* This macro allows the fixed or call-used registers
413 and the register classes to depend on target flags. */
415 #ifdef CONDITIONAL_REGISTER_USAGE
416 CONDITIONAL_REGISTER_USAGE;
419 /* Compute number of hard regs in each class. */
421 memset (reg_class_size, 0, sizeof reg_class_size);
422 for (i = 0; i < N_REG_CLASSES; i++)
423 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
424 if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
427 /* Initialize the table of subunions.
428 reg_class_subunion[I][J] gets the largest-numbered reg-class
429 that is contained in the union of classes I and J. */
431 memset (reg_class_subunion, 0, sizeof reg_class_subunion);
432 for (i = 0; i < N_REG_CLASSES; i++)
434 for (j = 0; j < N_REG_CLASSES; j++)
439 COPY_HARD_REG_SET (c, reg_class_contents[i]);
440 IOR_HARD_REG_SET (c, reg_class_contents[j]);
441 for (k = 0; k < N_REG_CLASSES; k++)
442 if (hard_reg_set_subset_p (reg_class_contents[k], c)
443 && !hard_reg_set_subset_p (reg_class_contents[k],
445 [(int) reg_class_subunion[i][j]]))
446 reg_class_subunion[i][j] = (enum reg_class) k;
450 /* Initialize the table of superunions.
451 reg_class_superunion[I][J] gets the smallest-numbered reg-class
452 containing the union of classes I and J. */
454 memset (reg_class_superunion, 0, sizeof reg_class_superunion);
455 for (i = 0; i < N_REG_CLASSES; i++)
457 for (j = 0; j < N_REG_CLASSES; j++)
462 COPY_HARD_REG_SET (c, reg_class_contents[i]);
463 IOR_HARD_REG_SET (c, reg_class_contents[j]);
464 for (k = 0; k < N_REG_CLASSES; k++)
465 if (hard_reg_set_subset_p (c, reg_class_contents[k]))
468 reg_class_superunion[i][j] = (enum reg_class) k;
472 /* Initialize the tables of subclasses and superclasses of each reg class.
473 First clear the whole table, then add the elements as they are found. */
475 for (i = 0; i < N_REG_CLASSES; i++)
477 for (j = 0; j < N_REG_CLASSES; j++)
478 reg_class_subclasses[i][j] = LIM_REG_CLASSES;
481 for (i = 0; i < N_REG_CLASSES; i++)
483 if (i == (int) NO_REGS)
486 for (j = i + 1; j < N_REG_CLASSES; j++)
487 if (hard_reg_set_subset_p (reg_class_contents[i],
488 reg_class_contents[j]))
490 /* Reg class I is a subclass of J.
491 Add J to the table of superclasses of I. */
494 /* Add I to the table of superclasses of J. */
495 p = ®_class_subclasses[j][0];
496 while (*p != LIM_REG_CLASSES) p++;
497 *p = (enum reg_class) i;
501 /* Initialize "constant" tables. */
503 CLEAR_HARD_REG_SET (fixed_reg_set);
504 CLEAR_HARD_REG_SET (call_used_reg_set);
505 CLEAR_HARD_REG_SET (call_fixed_reg_set);
506 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
507 if (!regs_invalidated_by_call_regset)
509 bitmap_obstack_initialize (&persistent_obstack);
510 regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack);
513 CLEAR_REG_SET (regs_invalidated_by_call_regset);
515 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
517 /* call_used_regs must include fixed_regs. */
518 gcc_assert (!fixed_regs[i] || call_used_regs[i]);
519 #ifdef CALL_REALLY_USED_REGISTERS
520 /* call_used_regs must include call_really_used_regs. */
521 gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
525 SET_HARD_REG_BIT (fixed_reg_set, i);
527 if (call_used_regs[i])
528 SET_HARD_REG_BIT (call_used_reg_set, i);
530 /* There are a couple of fixed registers that we know are safe to
531 exclude from being clobbered by calls:
533 The frame pointer is always preserved across calls. The arg
534 pointer is if it is fixed. The stack pointer usually is,
535 unless TARGET_RETURN_POPS_ARGS, in which case an explicit
536 CLOBBER will be present. If we are generating PIC code, the
537 PIC offset table register is preserved across calls, though the
538 target can override that. */
540 if (i == STACK_POINTER_REGNUM)
542 else if (global_regs[i])
544 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
545 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
547 else if (i == FRAME_POINTER_REGNUM)
549 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
550 else if (i == HARD_FRAME_POINTER_REGNUM)
553 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
554 else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
557 #ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
558 else if (i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
561 else if (CALL_REALLY_USED_REGNO_P (i))
563 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
564 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
568 COPY_HARD_REG_SET(call_fixed_reg_set, fixed_reg_set);
570 /* Preserve global registers if called more than once. */
571 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
575 fixed_regs[i] = call_used_regs[i] = 1;
576 SET_HARD_REG_BIT (fixed_reg_set, i);
577 SET_HARD_REG_BIT (call_used_reg_set, i);
578 SET_HARD_REG_BIT (call_fixed_reg_set, i);
582 memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
583 memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
584 for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
586 HARD_REG_SET ok_regs;
587 CLEAR_HARD_REG_SET (ok_regs);
588 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
589 if (!fixed_regs [j] && HARD_REGNO_MODE_OK (j, (enum machine_mode) m))
590 SET_HARD_REG_BIT (ok_regs, j);
592 for (i = 0; i < N_REG_CLASSES; i++)
593 if (((unsigned) CLASS_MAX_NREGS ((enum reg_class) i,
594 (enum machine_mode) m)
595 <= reg_class_size[i])
596 && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i]))
598 contains_reg_of_mode [i][m] = 1;
599 have_regs_of_mode [m] = 1;
603 /* Reset move_cost and friends, making sure we only free shared
604 table entries once. */
605 for (i = 0; i < MAX_MACHINE_MODE; i++)
608 for (j = 0; j < i && move_cost[i] != move_cost[j]; j++)
613 free (may_move_in_cost[i]);
614 free (may_move_out_cost[i]);
617 memset (move_cost, 0, sizeof move_cost);
618 memset (may_move_in_cost, 0, sizeof may_move_in_cost);
619 memset (may_move_out_cost, 0, sizeof may_move_out_cost);
620 last_mode_for_init_move_cost = -1;
623 /* Compute the table of register modes.
624 These values are used to record death information for individual registers
625 (as opposed to a multi-register mode).
626 This function might be invoked more than once, if the target has support
627 for changing register usage conventions on a per-function basis.
630 init_reg_modes_target (void)
634 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
635 for (j = 0; j < MAX_MACHINE_MODE; j++)
636 hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j);
638 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
640 reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
642 /* If we couldn't find a valid mode, just use the previous mode.
643 ??? One situation in which we need to do this is on the mips where
644 HARD_REGNO_NREGS (fpreg, [SD]Fmode) returns 2. Ideally we'd like
645 to use DF mode for the even registers and VOIDmode for the odd
646 (for the cpu models where the odd ones are inaccessible). */
647 if (reg_raw_mode[i] == VOIDmode)
648 reg_raw_mode[i] = i == 0 ? word_mode : reg_raw_mode[i-1];
652 /* Finish initializing the register sets and initialize the register modes.
653 This function might be invoked more than once, if the target has support
654 for changing register usage conventions on a per-function basis.
659 /* This finishes what was started by init_reg_sets, but couldn't be done
660 until after register usage was specified. */
664 /* The same as previous function plus initializing IRA. */
669 /* caller_save needs to be re-initialized. */
670 caller_save_initialized_p = false;
674 /* Initialize some fake stack-frame MEM references for use in
675 memory_move_secondary_cost. */
677 init_fake_stack_mems (void)
681 for (i = 0; i < MAX_MACHINE_MODE; i++)
682 top_of_stack[i] = gen_rtx_MEM ((enum machine_mode) i, stack_pointer_rtx);
686 /* Compute cost of moving data from a register of class FROM to one of
690 register_move_cost (enum machine_mode mode, enum reg_class from,
693 return targetm.register_move_cost (mode, from, to);
696 /* Compute cost of moving registers to/from memory. */
698 memory_move_cost (enum machine_mode mode, enum reg_class rclass, bool in)
700 return targetm.memory_move_cost (mode, rclass, in);
703 /* Compute extra cost of moving registers to/from memory due to reloads.
704 Only needed if secondary reloads are required for memory moves. */
706 memory_move_secondary_cost (enum machine_mode mode, enum reg_class rclass,
709 enum reg_class altclass;
710 int partial_cost = 0;
711 /* We need a memory reference to feed to SECONDARY... macros. */
712 /* mem may be unused even if the SECONDARY_ macros are defined. */
713 rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
715 altclass = secondary_reload_class (in ? 1 : 0, rclass, mode, mem);
717 if (altclass == NO_REGS)
721 partial_cost = register_move_cost (mode, altclass, rclass);
723 partial_cost = register_move_cost (mode, rclass, altclass);
725 if (rclass == altclass)
726 /* This isn't simply a copy-to-temporary situation. Can't guess
727 what it is, so TARGET_MEMORY_MOVE_COST really ought not to be
728 calling here in that case.
730 I'm tempted to put in an assert here, but returning this will
731 probably only give poor estimates, which is what we would've
732 had before this code anyways. */
735 /* Check if the secondary reload register will also need a
737 return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
740 /* Return a machine mode that is legitimate for hard reg REGNO and large
741 enough to save nregs. If we can't find one, return VOIDmode.
742 If CALL_SAVED is true, only consider modes that are call saved. */
744 choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
745 unsigned int nregs, bool call_saved)
747 unsigned int /* enum machine_mode */ m;
748 enum machine_mode found_mode = VOIDmode, mode;
750 /* We first look for the largest integer mode that can be validly
751 held in REGNO. If none, we look for the largest floating-point mode.
752 If we still didn't find a valid mode, try CCmode. */
754 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
756 mode = GET_MODE_WIDER_MODE (mode))
757 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
758 && HARD_REGNO_MODE_OK (regno, mode)
759 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
762 if (found_mode != VOIDmode)
765 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
767 mode = GET_MODE_WIDER_MODE (mode))
768 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
769 && HARD_REGNO_MODE_OK (regno, mode)
770 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
773 if (found_mode != VOIDmode)
776 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
778 mode = GET_MODE_WIDER_MODE (mode))
779 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
780 && HARD_REGNO_MODE_OK (regno, mode)
781 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
784 if (found_mode != VOIDmode)
787 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
789 mode = GET_MODE_WIDER_MODE (mode))
790 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
791 && HARD_REGNO_MODE_OK (regno, mode)
792 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
795 if (found_mode != VOIDmode)
798 /* Iterate over all of the CCmodes. */
799 for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
801 mode = (enum machine_mode) m;
802 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
803 && HARD_REGNO_MODE_OK (regno, mode)
804 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
808 /* We can't find a mode valid for this register. */
812 /* Specify the usage characteristics of the register named NAME.
813 It should be a fixed register if FIXED and a
814 call-used register if CALL_USED. */
816 fix_register (const char *name, int fixed, int call_used)
820 /* Decode the name and update the primary form of
821 the register info. */
823 if ((i = decode_reg_name (name)) >= 0)
825 if ((i == STACK_POINTER_REGNUM
826 #ifdef HARD_FRAME_POINTER_REGNUM
827 || i == HARD_FRAME_POINTER_REGNUM
829 || i == FRAME_POINTER_REGNUM
832 && (fixed == 0 || call_used == 0))
834 static const char * const what_option[2][2] = {
835 { "call-saved", "call-used" },
836 { "no-such-option", "fixed" }};
838 error ("can't use '%s' as a %s register", name,
839 what_option[fixed][call_used]);
843 fixed_regs[i] = fixed;
844 call_used_regs[i] = call_used;
845 #ifdef CALL_REALLY_USED_REGISTERS
847 call_really_used_regs[i] = call_used;
853 warning (0, "unknown register name: %s", name);
857 /* Mark register number I as global. */
859 globalize_reg (int i)
861 if (fixed_regs[i] == 0 && no_global_reg_vars)
862 error ("global register variable follows a function definition");
866 warning (0, "register used for two global register variables");
870 if (call_used_regs[i] && ! fixed_regs[i])
871 warning (0, "call-clobbered register used for global register variable");
875 /* If we're globalizing the frame pointer, we need to set the
876 appropriate regs_invalidated_by_call bit, even if it's already
877 set in fixed_regs. */
878 if (i != STACK_POINTER_REGNUM)
880 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
881 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
884 /* If already fixed, nothing else to do. */
888 fixed_regs[i] = call_used_regs[i] = 1;
889 #ifdef CALL_REALLY_USED_REGISTERS
890 call_really_used_regs[i] = 1;
893 SET_HARD_REG_BIT (fixed_reg_set, i);
894 SET_HARD_REG_BIT (call_used_reg_set, i);
895 SET_HARD_REG_BIT (call_fixed_reg_set, i);
901 /* Structure used to record preferences of given pseudo. */
904 /* (enum reg_class) prefclass is the preferred class. May be
905 NO_REGS if no class is better than memory. */
908 /* altclass is a register class that we should use for allocating
909 pseudo if no register in the preferred class is available.
910 If no register in this class is available, memory is preferred.
912 It might appear to be more general to have a bitmask of classes here,
913 but since it is recommended that there be a class corresponding to the
914 union of most major pair of classes, that generality is not required. */
917 /* coverclass is a register class that IRA uses for allocating
922 /* Record preferences of each pseudo. This is available after RA is
924 static struct reg_pref *reg_pref;
926 /* Current size of reg_info. */
927 static int reg_info_size;
929 /* Return the reg_class in which pseudo reg number REGNO is best allocated.
930 This function is sometimes called before the info has been computed.
931 When that happens, just return GENERAL_REGS, which is innocuous. */
933 reg_preferred_class (int regno)
938 return (enum reg_class) reg_pref[regno].prefclass;
942 reg_alternate_class (int regno)
947 return (enum reg_class) reg_pref[regno].altclass;
950 /* Return the reg_class which is used by IRA for its allocation. */
952 reg_cover_class (int regno)
957 return (enum reg_class) reg_pref[regno].coverclass;
962 /* Allocate space for reg info. */
964 allocate_reg_info (void)
966 reg_info_size = max_reg_num ();
967 gcc_assert (! reg_pref && ! reg_renumber);
968 reg_renumber = XNEWVEC (short, reg_info_size);
969 reg_pref = XCNEWVEC (struct reg_pref, reg_info_size);
970 memset (reg_renumber, -1, reg_info_size * sizeof (short));
974 /* Resize reg info. The new elements will be uninitialized. Return
975 TRUE if new elements (for new pseudos) were added. */
977 resize_reg_info (void)
981 if (reg_pref == NULL)
983 allocate_reg_info ();
986 if (reg_info_size == max_reg_num ())
989 reg_info_size = max_reg_num ();
990 gcc_assert (reg_pref && reg_renumber);
991 reg_renumber = XRESIZEVEC (short, reg_renumber, reg_info_size);
992 reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, reg_info_size);
993 memset (reg_pref + old, -1,
994 (reg_info_size - old) * sizeof (struct reg_pref));
995 memset (reg_renumber + old, -1, (reg_info_size - old) * sizeof (short));
1000 /* Free up the space allocated by allocate_reg_info. */
1002 free_reg_info (void)
1012 free (reg_renumber);
1013 reg_renumber = NULL;
1017 /* Initialize some global data for this pass. */
1022 df_compute_regs_ever_live (true);
1024 /* This prevents dump_flow_info from losing if called
1025 before reginfo is run. */
1027 /* No more global register variables may be declared. */
1028 no_global_reg_vars = 1;
1032 struct rtl_opt_pass pass_reginfo_init =
1036 "reginfo", /* name */
1038 reginfo_init, /* execute */
1041 0, /* static_pass_number */
1042 TV_NONE, /* tv_id */
1043 0, /* properties_required */
1044 0, /* properties_provided */
1045 0, /* properties_destroyed */
1046 0, /* todo_flags_start */
1047 0 /* todo_flags_finish */
1053 /* Set up preferred, alternate, and cover classes for REGNO as
1054 PREFCLASS, ALTCLASS, and COVERCLASS. */
1056 setup_reg_classes (int regno,
1057 enum reg_class prefclass, enum reg_class altclass,
1058 enum reg_class coverclass)
1060 if (reg_pref == NULL)
1062 gcc_assert (reg_info_size == max_reg_num ());
1063 reg_pref[regno].prefclass = prefclass;
1064 reg_pref[regno].altclass = altclass;
1065 reg_pref[regno].coverclass = coverclass;
1069 /* This is the `regscan' pass of the compiler, run just before cse and
1070 again just before loop. It finds the first and last use of each
1073 static void reg_scan_mark_refs (rtx, rtx);
1076 reg_scan (rtx f, unsigned int nregs ATTRIBUTE_UNUSED)
1080 timevar_push (TV_REG_SCAN);
1082 for (insn = f; insn; insn = NEXT_INSN (insn))
1085 reg_scan_mark_refs (PATTERN (insn), insn);
1086 if (REG_NOTES (insn))
1087 reg_scan_mark_refs (REG_NOTES (insn), insn);
1090 timevar_pop (TV_REG_SCAN);
1094 /* X is the expression to scan. INSN is the insn it appears in.
1095 NOTE_FLAG is nonzero if X is from INSN's notes rather than its body.
1096 We should only record information for REGs with numbers
1097 greater than or equal to MIN_REGNO. */
1099 reg_scan_mark_refs (rtx x, rtx insn)
1107 code = GET_CODE (x);
1126 reg_scan_mark_refs (XEXP (x, 0), insn);
1128 reg_scan_mark_refs (XEXP (x, 1), insn);
1133 reg_scan_mark_refs (XEXP (x, 1), insn);
1137 if (MEM_P (XEXP (x, 0)))
1138 reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn);
1142 /* Count a set of the destination if it is a register. */
1143 for (dest = SET_DEST (x);
1144 GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
1145 || GET_CODE (dest) == ZERO_EXTEND;
1146 dest = XEXP (dest, 0))
1149 /* If this is setting a pseudo from another pseudo or the sum of a
1150 pseudo and a constant integer and the other pseudo is known to be
1151 a pointer, set the destination to be a pointer as well.
1153 Likewise if it is setting the destination from an address or from a
1154 value equivalent to an address or to the sum of an address and
1157 But don't do any of this if the pseudo corresponds to a user
1158 variable since it should have already been set as a pointer based
1161 if (REG_P (SET_DEST (x))
1162 && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
1163 /* If the destination pseudo is set more than once, then other
1164 sets might not be to a pointer value (consider access to a
1165 union in two threads of control in the presence of global
1166 optimizations). So only set REG_POINTER on the destination
1167 pseudo if this is the only set of that pseudo. */
1168 && DF_REG_DEF_COUNT (REGNO (SET_DEST (x))) == 1
1169 && ! REG_USERVAR_P (SET_DEST (x))
1170 && ! REG_POINTER (SET_DEST (x))
1171 && ((REG_P (SET_SRC (x))
1172 && REG_POINTER (SET_SRC (x)))
1173 || ((GET_CODE (SET_SRC (x)) == PLUS
1174 || GET_CODE (SET_SRC (x)) == LO_SUM)
1175 && CONST_INT_P (XEXP (SET_SRC (x), 1))
1176 && REG_P (XEXP (SET_SRC (x), 0))
1177 && REG_POINTER (XEXP (SET_SRC (x), 0)))
1178 || GET_CODE (SET_SRC (x)) == CONST
1179 || GET_CODE (SET_SRC (x)) == SYMBOL_REF
1180 || GET_CODE (SET_SRC (x)) == LABEL_REF
1181 || (GET_CODE (SET_SRC (x)) == HIGH
1182 && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
1183 || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
1184 || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
1185 || ((GET_CODE (SET_SRC (x)) == PLUS
1186 || GET_CODE (SET_SRC (x)) == LO_SUM)
1187 && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
1188 || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
1189 || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
1190 || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1191 && (GET_CODE (XEXP (note, 0)) == CONST
1192 || GET_CODE (XEXP (note, 0)) == SYMBOL_REF
1193 || GET_CODE (XEXP (note, 0)) == LABEL_REF))))
1194 REG_POINTER (SET_DEST (x)) = 1;
1196 /* If this is setting a register from a register or from a simple
1197 conversion of a register, propagate REG_EXPR. */
1198 if (REG_P (dest) && !REG_ATTRS (dest))
1200 rtx src = SET_SRC (x);
1202 while (GET_CODE (src) == SIGN_EXTEND
1203 || GET_CODE (src) == ZERO_EXTEND
1204 || GET_CODE (src) == TRUNCATE
1205 || (GET_CODE (src) == SUBREG && subreg_lowpart_p (src)))
1206 src = XEXP (src, 0);
1208 set_reg_attrs_from_value (dest, src);
1211 /* ... fall through ... */
1215 const char *fmt = GET_RTX_FORMAT (code);
1217 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1220 reg_scan_mark_refs (XEXP (x, i), insn);
1221 else if (fmt[i] == 'E' && XVEC (x, i) != 0)
1224 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1225 reg_scan_mark_refs (XVECEXP (x, i, j), insn);
1233 /* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
1236 reg_class_subset_p (enum reg_class c1, enum reg_class c2)
1240 || hard_reg_set_subset_p (reg_class_contents[(int) c1],
1241 reg_class_contents[(int) c2]));
1244 /* Return nonzero if there is a register that is in both C1 and C2. */
1246 reg_classes_intersect_p (enum reg_class c1, enum reg_class c2)
1251 || hard_reg_set_intersect_p (reg_class_contents[(int) c1],
1252 reg_class_contents[(int) c2]));
1257 /* Passes for keeping and updating info about modes of registers
1258 inside subregisters. */
1260 #ifdef CANNOT_CHANGE_MODE_CLASS
1262 struct subregs_of_mode_node
1265 unsigned char modes[MAX_MACHINE_MODE];
1268 static htab_t subregs_of_mode;
1271 som_hash (const void *x)
1273 const struct subregs_of_mode_node *const a =
1274 (const struct subregs_of_mode_node *) x;
1279 som_eq (const void *x, const void *y)
1281 const struct subregs_of_mode_node *const a =
1282 (const struct subregs_of_mode_node *) x;
1283 const struct subregs_of_mode_node *const b =
1284 (const struct subregs_of_mode_node *) y;
1285 return a->block == b->block;
1289 record_subregs_of_mode (rtx subreg)
1291 struct subregs_of_mode_node dummy, *node;
1292 enum machine_mode mode;
1296 if (!REG_P (SUBREG_REG (subreg)))
1299 regno = REGNO (SUBREG_REG (subreg));
1300 mode = GET_MODE (subreg);
1302 if (regno < FIRST_PSEUDO_REGISTER)
1305 dummy.block = regno & -8;
1306 slot = htab_find_slot_with_hash (subregs_of_mode, &dummy,
1307 dummy.block, INSERT);
1308 node = (struct subregs_of_mode_node *) *slot;
1311 node = XCNEW (struct subregs_of_mode_node);
1312 node->block = regno & -8;
1316 node->modes[mode] |= 1 << (regno & 7);
1319 /* Call record_subregs_of_mode for all the subregs in X. */
1321 find_subregs_of_mode (rtx x)
1323 enum rtx_code code = GET_CODE (x);
1324 const char * const fmt = GET_RTX_FORMAT (code);
1328 record_subregs_of_mode (x);
1330 /* Time for some deep diving. */
1331 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1334 find_subregs_of_mode (XEXP (x, i));
1335 else if (fmt[i] == 'E')
1338 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1339 find_subregs_of_mode (XVECEXP (x, i, j));
1345 init_subregs_of_mode (void)
1350 if (subregs_of_mode)
1351 htab_empty (subregs_of_mode);
1353 subregs_of_mode = htab_create (100, som_hash, som_eq, free);
1356 FOR_BB_INSNS (bb, insn)
1358 find_subregs_of_mode (PATTERN (insn));
1361 /* Return 1 if REGNO has had an invalid mode change in CLASS from FROM
1364 invalid_mode_change_p (unsigned int regno,
1365 enum reg_class rclass ATTRIBUTE_UNUSED,
1366 enum machine_mode from)
1368 struct subregs_of_mode_node dummy, *node;
1372 gcc_assert (subregs_of_mode);
1373 dummy.block = regno & -8;
1374 node = (struct subregs_of_mode_node *)
1375 htab_find_with_hash (subregs_of_mode, &dummy, dummy.block);
1379 mask = 1 << (regno & 7);
1380 for (to = VOIDmode; to < NUM_MACHINE_MODES; to++)
1381 if (node->modes[to] & mask)
1382 if (CANNOT_CHANGE_MODE_CLASS (from, (enum machine_mode) to, rclass))
1389 finish_subregs_of_mode (void)
1391 htab_delete (subregs_of_mode);
1392 subregs_of_mode = 0;
1396 init_subregs_of_mode (void)
1400 finish_subregs_of_mode (void)
1404 #endif /* CANNOT_CHANGE_MODE_CLASS */
1406 #include "gt-reginfo.h"