1 /* Compute different info about registers.
2 Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996
3 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
4 2009 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* This file contains regscan pass of the compiler and passes for
24 dealing with info about modes of pseudo-registers inside
25 subregisters. It also defines some tables of information about the
26 hardware registers, function init_reg_sets to initialize the
27 tables, and other auxiliary functions to deal with info about
28 registers and their classes. */
32 #include "coretypes.h"
34 #include "hard-reg-set.h"
39 #include "basic-block.h"
41 #include "addresses.h"
43 #include "insn-config.h"
47 #include "diagnostic-core.h"
53 #include "tree-pass.h"
57 /* Maximum register number used in this function, plus one. */
62 /* Register tables used by many passes. */
64 /* Indexed by hard register number, contains 1 for registers
65 that are fixed use (stack pointer, pc, frame pointer, etc.).
66 These are the registers that cannot be used to allocate
67 a pseudo reg for general use. */
68 char fixed_regs[FIRST_PSEUDO_REGISTER];
70 /* Same info as a HARD_REG_SET. */
71 HARD_REG_SET fixed_reg_set;
73 /* Data for initializing the above. */
74 static const char initial_fixed_regs[] = FIXED_REGISTERS;
76 /* Indexed by hard register number, contains 1 for registers
77 that are fixed use or are clobbered by function calls.
78 These are the registers that cannot be used to allocate
79 a pseudo reg whose life crosses calls unless we are able
80 to save/restore them across the calls. */
81 char call_used_regs[FIRST_PSEUDO_REGISTER];
83 /* Same info as a HARD_REG_SET. */
84 HARD_REG_SET call_used_reg_set;
86 /* Data for initializing the above. */
87 static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
89 /* This is much like call_used_regs, except it doesn't have to
90 be a superset of FIXED_REGISTERS. This vector indicates
91 what is really call clobbered, and is used when defining
92 regs_invalidated_by_call. */
93 #ifdef CALL_REALLY_USED_REGISTERS
94 char call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
97 #ifdef CALL_REALLY_USED_REGISTERS
98 #define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X]
100 #define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X]
104 /* Contains registers that are fixed use -- i.e. in fixed_reg_set -- or
105 a function value return register or TARGET_STRUCT_VALUE_RTX or
106 STATIC_CHAIN_REGNUM. These are the registers that cannot hold quantities
107 across calls even if we are willing to save and restore them. */
109 HARD_REG_SET call_fixed_reg_set;
111 /* Indexed by hard register number, contains 1 for registers
112 that are being used for global register decls.
113 These must be exempt from ordinary flow analysis
114 and are also considered fixed. */
115 char global_regs[FIRST_PSEUDO_REGISTER];
117 /* Contains 1 for registers that are set or clobbered by calls. */
118 /* ??? Ideally, this would be just call_used_regs plus global_regs, but
119 for someone's bright idea to have call_used_regs strictly include
120 fixed_regs. Which leaves us guessing as to the set of fixed_regs
121 that are actually preserved. We know for sure that those associated
122 with the local stack frame are safe, but scant others. */
123 HARD_REG_SET regs_invalidated_by_call;
125 /* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used
126 in dataflow more conveniently. */
127 regset regs_invalidated_by_call_regset;
129 /* The bitmap_obstack is used to hold some static variables that
130 should not be reset after each function is compiled. */
131 static bitmap_obstack persistent_obstack;
133 /* Table of register numbers in the order in which to try to use them. */
134 #ifdef REG_ALLOC_ORDER
135 int reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
137 /* The inverse of reg_alloc_order. */
138 int inv_reg_alloc_order[FIRST_PSEUDO_REGISTER];
141 /* For each reg class, a HARD_REG_SET saying which registers are in it. */
142 HARD_REG_SET reg_class_contents[N_REG_CLASSES];
144 /* For each reg class, a boolean saying whether the class contains only
146 bool class_only_fixed_regs[N_REG_CLASSES];
148 /* The same information, but as an array of unsigned ints. We copy from
149 these unsigned ints to the table above. We do this so the tm.h files
150 do not have to be aware of the wordsize for machines with <= 64 regs.
151 Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
153 ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
155 static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
156 = REG_CLASS_CONTENTS;
158 /* For each reg class, number of regs it contains. */
159 unsigned int reg_class_size[N_REG_CLASSES];
161 /* For each reg class, table listing all the classes contained in it. */
162 enum reg_class reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
164 /* For each pair of reg classes,
165 a largest reg class contained in their union. */
166 enum reg_class reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
168 /* For each pair of reg classes,
169 the smallest reg class containing their union. */
170 enum reg_class reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
172 /* Array containing all of the register names. */
173 const char * reg_names[] = REGISTER_NAMES;
175 /* Array containing all of the register class names. */
176 const char * reg_class_names[] = REG_CLASS_NAMES;
178 /* For each hard register, the widest mode object that it can contain.
179 This will be a MODE_INT mode if the register can hold integers. Otherwise
180 it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
182 enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];
184 /* 1 if there is a register of given mode. */
185 bool have_regs_of_mode [MAX_MACHINE_MODE];
187 /* 1 if class does contain register of given mode. */
188 char contains_reg_of_mode [N_REG_CLASSES] [MAX_MACHINE_MODE];
190 /* Maximum cost of moving from a register in one class to a register in
191 another class. Based on TARGET_REGISTER_MOVE_COST. */
192 move_table *move_cost[MAX_MACHINE_MODE];
194 /* Similar, but here we don't have to move if the first index is a subset
195 of the second so in that case the cost is zero. */
196 move_table *may_move_in_cost[MAX_MACHINE_MODE];
198 /* Similar, but here we don't have to move if the first index is a superset
199 of the second so in that case the cost is zero. */
200 move_table *may_move_out_cost[MAX_MACHINE_MODE];
202 /* Keep track of the last mode we initialized move costs for. */
203 static int last_mode_for_init_move_cost;
205 /* Sample MEM values for use by memory_move_secondary_cost. */
206 static GTY(()) rtx top_of_stack[MAX_MACHINE_MODE];
208 /* No more global register variables may be declared; true once
209 reginfo has been initialized. */
210 static int no_global_reg_vars = 0;
212 /* Specify number of hard registers given machine mode occupy. */
213 unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
215 /* Given a register bitmap, turn on the bits in a HARD_REG_SET that
216 correspond to the hard registers, if any, set in that map. This
217 could be done far more efficiently by having all sorts of special-cases
218 with moving single words, but probably isn't worth the trouble. */
220 reg_set_to_hard_reg_set (HARD_REG_SET *to, const_bitmap from)
225 EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi)
227 if (i >= FIRST_PSEUDO_REGISTER)
229 SET_HARD_REG_BIT (*to, i);
233 /* Function called only once to initialize the above data on reg usage.
234 Once this is done, various switches may override. */
240 /* First copy the register information from the initial int form into
243 for (i = 0; i < N_REG_CLASSES; i++)
245 CLEAR_HARD_REG_SET (reg_class_contents[i]);
247 /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
248 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
249 if (int_reg_class_contents[i][j / 32]
250 & ((unsigned) 1 << (j % 32)))
251 SET_HARD_REG_BIT (reg_class_contents[i], j);
254 /* Sanity check: make sure the target macros FIXED_REGISTERS and
255 CALL_USED_REGISTERS had the right number of initializers. */
256 gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
257 gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
259 memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
260 memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
261 memset (global_regs, 0, sizeof global_regs);
264 /* Initialize may_move_cost and friends for mode M. */
266 init_move_cost (enum machine_mode m)
268 static unsigned short last_move_cost[N_REG_CLASSES][N_REG_CLASSES];
269 bool all_match = true;
272 gcc_assert (have_regs_of_mode[m]);
273 for (i = 0; i < N_REG_CLASSES; i++)
274 if (contains_reg_of_mode[i][m])
275 for (j = 0; j < N_REG_CLASSES; j++)
278 if (!contains_reg_of_mode[j][m])
282 cost = register_move_cost (m, (enum reg_class) i,
284 gcc_assert (cost < 65535);
286 all_match &= (last_move_cost[i][j] == cost);
287 last_move_cost[i][j] = cost;
289 if (all_match && last_mode_for_init_move_cost != -1)
291 move_cost[m] = move_cost[last_mode_for_init_move_cost];
292 may_move_in_cost[m] = may_move_in_cost[last_mode_for_init_move_cost];
293 may_move_out_cost[m] = may_move_out_cost[last_mode_for_init_move_cost];
296 last_mode_for_init_move_cost = m;
297 move_cost[m] = (move_table *)xmalloc (sizeof (move_table)
299 may_move_in_cost[m] = (move_table *)xmalloc (sizeof (move_table)
301 may_move_out_cost[m] = (move_table *)xmalloc (sizeof (move_table)
303 for (i = 0; i < N_REG_CLASSES; i++)
304 if (contains_reg_of_mode[i][m])
305 for (j = 0; j < N_REG_CLASSES; j++)
308 enum reg_class *p1, *p2;
310 if (last_move_cost[i][j] == 65535)
312 move_cost[m][i][j] = 65535;
313 may_move_in_cost[m][i][j] = 65535;
314 may_move_out_cost[m][i][j] = 65535;
318 cost = last_move_cost[i][j];
320 for (p2 = ®_class_subclasses[j][0];
321 *p2 != LIM_REG_CLASSES; p2++)
322 if (*p2 != i && contains_reg_of_mode[*p2][m])
323 cost = MAX (cost, move_cost[m][i][*p2]);
325 for (p1 = ®_class_subclasses[i][0];
326 *p1 != LIM_REG_CLASSES; p1++)
327 if (*p1 != j && contains_reg_of_mode[*p1][m])
328 cost = MAX (cost, move_cost[m][*p1][j]);
330 gcc_assert (cost <= 65535);
331 move_cost[m][i][j] = cost;
333 if (reg_class_subset_p ((enum reg_class) i, (enum reg_class) j))
334 may_move_in_cost[m][i][j] = 0;
336 may_move_in_cost[m][i][j] = cost;
338 if (reg_class_subset_p ((enum reg_class) j, (enum reg_class) i))
339 may_move_out_cost[m][i][j] = 0;
341 may_move_out_cost[m][i][j] = cost;
345 for (j = 0; j < N_REG_CLASSES; j++)
347 move_cost[m][i][j] = 65535;
348 may_move_in_cost[m][i][j] = 65535;
349 may_move_out_cost[m][i][j] = 65535;
353 /* We need to save copies of some of the register information which
354 can be munged by command-line switches so we can restore it during
355 subsequent back-end reinitialization. */
356 static char saved_fixed_regs[FIRST_PSEUDO_REGISTER];
357 static char saved_call_used_regs[FIRST_PSEUDO_REGISTER];
358 #ifdef CALL_REALLY_USED_REGISTERS
359 static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER];
361 static const char *saved_reg_names[FIRST_PSEUDO_REGISTER];
363 /* Save the register information. */
365 save_register_info (void)
367 /* Sanity check: make sure the target macros FIXED_REGISTERS and
368 CALL_USED_REGISTERS had the right number of initializers. */
369 gcc_assert (sizeof fixed_regs == sizeof saved_fixed_regs);
370 gcc_assert (sizeof call_used_regs == sizeof saved_call_used_regs);
371 memcpy (saved_fixed_regs, fixed_regs, sizeof fixed_regs);
372 memcpy (saved_call_used_regs, call_used_regs, sizeof call_used_regs);
374 /* Likewise for call_really_used_regs. */
375 #ifdef CALL_REALLY_USED_REGISTERS
376 gcc_assert (sizeof call_really_used_regs
377 == sizeof saved_call_really_used_regs);
378 memcpy (saved_call_really_used_regs, call_really_used_regs,
379 sizeof call_really_used_regs);
382 /* And similarly for reg_names. */
383 gcc_assert (sizeof reg_names == sizeof saved_reg_names);
384 memcpy (saved_reg_names, reg_names, sizeof reg_names);
387 /* Restore the register information. */
389 restore_register_info (void)
391 memcpy (fixed_regs, saved_fixed_regs, sizeof fixed_regs);
392 memcpy (call_used_regs, saved_call_used_regs, sizeof call_used_regs);
394 #ifdef CALL_REALLY_USED_REGISTERS
395 memcpy (call_really_used_regs, saved_call_really_used_regs,
396 sizeof call_really_used_regs);
399 memcpy (reg_names, saved_reg_names, sizeof reg_names);
402 /* After switches have been processed, which perhaps alter
403 `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
405 init_reg_sets_1 (void)
408 unsigned int /* enum machine_mode */ m;
410 restore_register_info ();
412 #ifdef REG_ALLOC_ORDER
413 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
414 inv_reg_alloc_order[reg_alloc_order[i]] = i;
417 /* This macro allows the fixed or call-used registers
418 and the register classes to depend on target flags. */
420 #ifdef CONDITIONAL_REGISTER_USAGE
421 CONDITIONAL_REGISTER_USAGE;
424 /* Compute number of hard regs in each class. */
426 memset (reg_class_size, 0, sizeof reg_class_size);
427 for (i = 0; i < N_REG_CLASSES; i++)
429 bool any_nonfixed = false;
430 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
431 if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
437 class_only_fixed_regs[i] = !any_nonfixed;
440 /* Initialize the table of subunions.
441 reg_class_subunion[I][J] gets the largest-numbered reg-class
442 that is contained in the union of classes I and J. */
444 memset (reg_class_subunion, 0, sizeof reg_class_subunion);
445 for (i = 0; i < N_REG_CLASSES; i++)
447 for (j = 0; j < N_REG_CLASSES; j++)
452 COPY_HARD_REG_SET (c, reg_class_contents[i]);
453 IOR_HARD_REG_SET (c, reg_class_contents[j]);
454 for (k = 0; k < N_REG_CLASSES; k++)
455 if (hard_reg_set_subset_p (reg_class_contents[k], c)
456 && !hard_reg_set_subset_p (reg_class_contents[k],
458 [(int) reg_class_subunion[i][j]]))
459 reg_class_subunion[i][j] = (enum reg_class) k;
463 /* Initialize the table of superunions.
464 reg_class_superunion[I][J] gets the smallest-numbered reg-class
465 containing the union of classes I and J. */
467 memset (reg_class_superunion, 0, sizeof reg_class_superunion);
468 for (i = 0; i < N_REG_CLASSES; i++)
470 for (j = 0; j < N_REG_CLASSES; j++)
475 COPY_HARD_REG_SET (c, reg_class_contents[i]);
476 IOR_HARD_REG_SET (c, reg_class_contents[j]);
477 for (k = 0; k < N_REG_CLASSES; k++)
478 if (hard_reg_set_subset_p (c, reg_class_contents[k]))
481 reg_class_superunion[i][j] = (enum reg_class) k;
485 /* Initialize the tables of subclasses and superclasses of each reg class.
486 First clear the whole table, then add the elements as they are found. */
488 for (i = 0; i < N_REG_CLASSES; i++)
490 for (j = 0; j < N_REG_CLASSES; j++)
491 reg_class_subclasses[i][j] = LIM_REG_CLASSES;
494 for (i = 0; i < N_REG_CLASSES; i++)
496 if (i == (int) NO_REGS)
499 for (j = i + 1; j < N_REG_CLASSES; j++)
500 if (hard_reg_set_subset_p (reg_class_contents[i],
501 reg_class_contents[j]))
503 /* Reg class I is a subclass of J.
504 Add J to the table of superclasses of I. */
507 /* Add I to the table of superclasses of J. */
508 p = ®_class_subclasses[j][0];
509 while (*p != LIM_REG_CLASSES) p++;
510 *p = (enum reg_class) i;
514 /* Initialize "constant" tables. */
516 CLEAR_HARD_REG_SET (fixed_reg_set);
517 CLEAR_HARD_REG_SET (call_used_reg_set);
518 CLEAR_HARD_REG_SET (call_fixed_reg_set);
519 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
520 if (!regs_invalidated_by_call_regset)
522 bitmap_obstack_initialize (&persistent_obstack);
523 regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack);
526 CLEAR_REG_SET (regs_invalidated_by_call_regset);
528 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
530 /* call_used_regs must include fixed_regs. */
531 gcc_assert (!fixed_regs[i] || call_used_regs[i]);
532 #ifdef CALL_REALLY_USED_REGISTERS
533 /* call_used_regs must include call_really_used_regs. */
534 gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
538 SET_HARD_REG_BIT (fixed_reg_set, i);
540 if (call_used_regs[i])
541 SET_HARD_REG_BIT (call_used_reg_set, i);
543 /* There are a couple of fixed registers that we know are safe to
544 exclude from being clobbered by calls:
546 The frame pointer is always preserved across calls. The arg
547 pointer is if it is fixed. The stack pointer usually is,
548 unless TARGET_RETURN_POPS_ARGS, in which case an explicit
549 CLOBBER will be present. If we are generating PIC code, the
550 PIC offset table register is preserved across calls, though the
551 target can override that. */
553 if (i == STACK_POINTER_REGNUM)
555 else if (global_regs[i])
557 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
558 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
560 else if (i == FRAME_POINTER_REGNUM)
562 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
563 else if (i == HARD_FRAME_POINTER_REGNUM)
566 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
567 else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
570 #ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
571 else if (i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
574 else if (CALL_REALLY_USED_REGNO_P (i))
576 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
577 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
581 COPY_HARD_REG_SET(call_fixed_reg_set, fixed_reg_set);
583 /* Preserve global registers if called more than once. */
584 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
588 fixed_regs[i] = call_used_regs[i] = 1;
589 SET_HARD_REG_BIT (fixed_reg_set, i);
590 SET_HARD_REG_BIT (call_used_reg_set, i);
591 SET_HARD_REG_BIT (call_fixed_reg_set, i);
595 memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
596 memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
597 for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
599 HARD_REG_SET ok_regs;
600 CLEAR_HARD_REG_SET (ok_regs);
601 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
602 if (!fixed_regs [j] && HARD_REGNO_MODE_OK (j, (enum machine_mode) m))
603 SET_HARD_REG_BIT (ok_regs, j);
605 for (i = 0; i < N_REG_CLASSES; i++)
606 if (((unsigned) CLASS_MAX_NREGS ((enum reg_class) i,
607 (enum machine_mode) m)
608 <= reg_class_size[i])
609 && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i]))
611 contains_reg_of_mode [i][m] = 1;
612 have_regs_of_mode [m] = 1;
616 /* Reset move_cost and friends, making sure we only free shared
617 table entries once. */
618 for (i = 0; i < MAX_MACHINE_MODE; i++)
621 for (j = 0; j < i && move_cost[i] != move_cost[j]; j++)
626 free (may_move_in_cost[i]);
627 free (may_move_out_cost[i]);
630 memset (move_cost, 0, sizeof move_cost);
631 memset (may_move_in_cost, 0, sizeof may_move_in_cost);
632 memset (may_move_out_cost, 0, sizeof may_move_out_cost);
633 last_mode_for_init_move_cost = -1;
636 /* Compute the table of register modes.
637 These values are used to record death information for individual registers
638 (as opposed to a multi-register mode).
639 This function might be invoked more than once, if the target has support
640 for changing register usage conventions on a per-function basis.
643 init_reg_modes_target (void)
647 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
648 for (j = 0; j < MAX_MACHINE_MODE; j++)
649 hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j);
651 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
653 reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
655 /* If we couldn't find a valid mode, just use the previous mode.
656 ??? One situation in which we need to do this is on the mips where
657 HARD_REGNO_NREGS (fpreg, [SD]Fmode) returns 2. Ideally we'd like
658 to use DF mode for the even registers and VOIDmode for the odd
659 (for the cpu models where the odd ones are inaccessible). */
660 if (reg_raw_mode[i] == VOIDmode)
661 reg_raw_mode[i] = i == 0 ? word_mode : reg_raw_mode[i-1];
665 /* Finish initializing the register sets and initialize the register modes.
666 This function might be invoked more than once, if the target has support
667 for changing register usage conventions on a per-function basis.
672 /* This finishes what was started by init_reg_sets, but couldn't be done
673 until after register usage was specified. */
677 /* The same as previous function plus initializing IRA. */
682 /* caller_save needs to be re-initialized. */
683 caller_save_initialized_p = false;
687 /* Initialize some fake stack-frame MEM references for use in
688 memory_move_secondary_cost. */
690 init_fake_stack_mems (void)
694 for (i = 0; i < MAX_MACHINE_MODE; i++)
695 top_of_stack[i] = gen_rtx_MEM ((enum machine_mode) i, stack_pointer_rtx);
699 /* Compute cost of moving data from a register of class FROM to one of
703 register_move_cost (enum machine_mode mode, enum reg_class from,
706 return targetm.register_move_cost (mode, from, to);
709 /* Compute cost of moving registers to/from memory. */
711 memory_move_cost (enum machine_mode mode, enum reg_class rclass, bool in)
713 return targetm.memory_move_cost (mode, rclass, in);
716 /* Compute extra cost of moving registers to/from memory due to reloads.
717 Only needed if secondary reloads are required for memory moves. */
719 memory_move_secondary_cost (enum machine_mode mode, enum reg_class rclass,
722 enum reg_class altclass;
723 int partial_cost = 0;
724 /* We need a memory reference to feed to SECONDARY... macros. */
725 /* mem may be unused even if the SECONDARY_ macros are defined. */
726 rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
728 altclass = secondary_reload_class (in ? 1 : 0, rclass, mode, mem);
730 if (altclass == NO_REGS)
734 partial_cost = register_move_cost (mode, altclass, rclass);
736 partial_cost = register_move_cost (mode, rclass, altclass);
738 if (rclass == altclass)
739 /* This isn't simply a copy-to-temporary situation. Can't guess
740 what it is, so TARGET_MEMORY_MOVE_COST really ought not to be
741 calling here in that case.
743 I'm tempted to put in an assert here, but returning this will
744 probably only give poor estimates, which is what we would've
745 had before this code anyways. */
748 /* Check if the secondary reload register will also need a
750 return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
753 /* Return a machine mode that is legitimate for hard reg REGNO and large
754 enough to save nregs. If we can't find one, return VOIDmode.
755 If CALL_SAVED is true, only consider modes that are call saved. */
757 choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
758 unsigned int nregs, bool call_saved)
760 unsigned int /* enum machine_mode */ m;
761 enum machine_mode found_mode = VOIDmode, mode;
763 /* We first look for the largest integer mode that can be validly
764 held in REGNO. If none, we look for the largest floating-point mode.
765 If we still didn't find a valid mode, try CCmode. */
767 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
769 mode = GET_MODE_WIDER_MODE (mode))
770 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
771 && HARD_REGNO_MODE_OK (regno, mode)
772 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
775 if (found_mode != VOIDmode)
778 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
780 mode = GET_MODE_WIDER_MODE (mode))
781 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
782 && HARD_REGNO_MODE_OK (regno, mode)
783 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
786 if (found_mode != VOIDmode)
789 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
791 mode = GET_MODE_WIDER_MODE (mode))
792 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
793 && HARD_REGNO_MODE_OK (regno, mode)
794 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
797 if (found_mode != VOIDmode)
800 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
802 mode = GET_MODE_WIDER_MODE (mode))
803 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
804 && HARD_REGNO_MODE_OK (regno, mode)
805 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
808 if (found_mode != VOIDmode)
811 /* Iterate over all of the CCmodes. */
812 for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
814 mode = (enum machine_mode) m;
815 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
816 && HARD_REGNO_MODE_OK (regno, mode)
817 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
821 /* We can't find a mode valid for this register. */
825 /* Specify the usage characteristics of the register named NAME.
826 It should be a fixed register if FIXED and a
827 call-used register if CALL_USED. */
829 fix_register (const char *name, int fixed, int call_used)
833 /* Decode the name and update the primary form of
834 the register info. */
836 if ((i = decode_reg_name (name)) >= 0)
838 if ((i == STACK_POINTER_REGNUM
839 #ifdef HARD_FRAME_POINTER_REGNUM
840 || i == HARD_FRAME_POINTER_REGNUM
842 || i == FRAME_POINTER_REGNUM
845 && (fixed == 0 || call_used == 0))
847 static const char * const what_option[2][2] = {
848 { "call-saved", "call-used" },
849 { "no-such-option", "fixed" }};
851 error ("can't use '%s' as a %s register", name,
852 what_option[fixed][call_used]);
856 fixed_regs[i] = fixed;
857 call_used_regs[i] = call_used;
858 #ifdef CALL_REALLY_USED_REGISTERS
860 call_really_used_regs[i] = call_used;
866 warning (0, "unknown register name: %s", name);
870 /* Mark register number I as global. */
872 globalize_reg (int i)
874 if (fixed_regs[i] == 0 && no_global_reg_vars)
875 error ("global register variable follows a function definition");
879 warning (0, "register used for two global register variables");
883 if (call_used_regs[i] && ! fixed_regs[i])
884 warning (0, "call-clobbered register used for global register variable");
888 /* If we're globalizing the frame pointer, we need to set the
889 appropriate regs_invalidated_by_call bit, even if it's already
890 set in fixed_regs. */
891 if (i != STACK_POINTER_REGNUM)
893 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
894 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
897 /* If already fixed, nothing else to do. */
901 fixed_regs[i] = call_used_regs[i] = 1;
902 #ifdef CALL_REALLY_USED_REGISTERS
903 call_really_used_regs[i] = 1;
906 SET_HARD_REG_BIT (fixed_reg_set, i);
907 SET_HARD_REG_BIT (call_used_reg_set, i);
908 SET_HARD_REG_BIT (call_fixed_reg_set, i);
914 /* Structure used to record preferences of given pseudo. */
917 /* (enum reg_class) prefclass is the preferred class. May be
918 NO_REGS if no class is better than memory. */
921 /* altclass is a register class that we should use for allocating
922 pseudo if no register in the preferred class is available.
923 If no register in this class is available, memory is preferred.
925 It might appear to be more general to have a bitmask of classes here,
926 but since it is recommended that there be a class corresponding to the
927 union of most major pair of classes, that generality is not required. */
930 /* coverclass is a register class that IRA uses for allocating
935 /* Record preferences of each pseudo. This is available after RA is
937 static struct reg_pref *reg_pref;
939 /* Current size of reg_info. */
940 static int reg_info_size;
942 /* Return the reg_class in which pseudo reg number REGNO is best allocated.
943 This function is sometimes called before the info has been computed.
944 When that happens, just return GENERAL_REGS, which is innocuous. */
946 reg_preferred_class (int regno)
951 return (enum reg_class) reg_pref[regno].prefclass;
955 reg_alternate_class (int regno)
960 return (enum reg_class) reg_pref[regno].altclass;
963 /* Return the reg_class which is used by IRA for its allocation. */
965 reg_cover_class (int regno)
970 return (enum reg_class) reg_pref[regno].coverclass;
975 /* Allocate space for reg info. */
977 allocate_reg_info (void)
979 reg_info_size = max_reg_num ();
980 gcc_assert (! reg_pref && ! reg_renumber);
981 reg_renumber = XNEWVEC (short, reg_info_size);
982 reg_pref = XCNEWVEC (struct reg_pref, reg_info_size);
983 memset (reg_renumber, -1, reg_info_size * sizeof (short));
987 /* Resize reg info. The new elements will be uninitialized. Return
988 TRUE if new elements (for new pseudos) were added. */
990 resize_reg_info (void)
994 if (reg_pref == NULL)
996 allocate_reg_info ();
999 if (reg_info_size == max_reg_num ())
1001 old = reg_info_size;
1002 reg_info_size = max_reg_num ();
1003 gcc_assert (reg_pref && reg_renumber);
1004 reg_renumber = XRESIZEVEC (short, reg_renumber, reg_info_size);
1005 reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, reg_info_size);
1006 memset (reg_pref + old, -1,
1007 (reg_info_size - old) * sizeof (struct reg_pref));
1008 memset (reg_renumber + old, -1, (reg_info_size - old) * sizeof (short));
1013 /* Free up the space allocated by allocate_reg_info. */
1015 free_reg_info (void)
1025 free (reg_renumber);
1026 reg_renumber = NULL;
1030 /* Initialize some global data for this pass. */
1035 df_compute_regs_ever_live (true);
1037 /* This prevents dump_flow_info from losing if called
1038 before reginfo is run. */
1040 /* No more global register variables may be declared. */
1041 no_global_reg_vars = 1;
1045 struct rtl_opt_pass pass_reginfo_init =
1049 "reginfo", /* name */
1051 reginfo_init, /* execute */
1054 0, /* static_pass_number */
1055 TV_NONE, /* tv_id */
1056 0, /* properties_required */
1057 0, /* properties_provided */
1058 0, /* properties_destroyed */
1059 0, /* todo_flags_start */
1060 0 /* todo_flags_finish */
1066 /* Set up preferred, alternate, and cover classes for REGNO as
1067 PREFCLASS, ALTCLASS, and COVERCLASS. */
1069 setup_reg_classes (int regno,
1070 enum reg_class prefclass, enum reg_class altclass,
1071 enum reg_class coverclass)
1073 if (reg_pref == NULL)
1075 gcc_assert (reg_info_size == max_reg_num ());
1076 reg_pref[regno].prefclass = prefclass;
1077 reg_pref[regno].altclass = altclass;
1078 reg_pref[regno].coverclass = coverclass;
1082 /* This is the `regscan' pass of the compiler, run just before cse and
1083 again just before loop. It finds the first and last use of each
1086 static void reg_scan_mark_refs (rtx, rtx);
1089 reg_scan (rtx f, unsigned int nregs ATTRIBUTE_UNUSED)
1093 timevar_push (TV_REG_SCAN);
1095 for (insn = f; insn; insn = NEXT_INSN (insn))
1098 reg_scan_mark_refs (PATTERN (insn), insn);
1099 if (REG_NOTES (insn))
1100 reg_scan_mark_refs (REG_NOTES (insn), insn);
1103 timevar_pop (TV_REG_SCAN);
1107 /* X is the expression to scan. INSN is the insn it appears in.
1108 NOTE_FLAG is nonzero if X is from INSN's notes rather than its body.
1109 We should only record information for REGs with numbers
1110 greater than or equal to MIN_REGNO. */
1112 reg_scan_mark_refs (rtx x, rtx insn)
1120 code = GET_CODE (x);
1139 reg_scan_mark_refs (XEXP (x, 0), insn);
1141 reg_scan_mark_refs (XEXP (x, 1), insn);
1146 reg_scan_mark_refs (XEXP (x, 1), insn);
1150 if (MEM_P (XEXP (x, 0)))
1151 reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn);
1155 /* Count a set of the destination if it is a register. */
1156 for (dest = SET_DEST (x);
1157 GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
1158 || GET_CODE (dest) == ZERO_EXTEND;
1159 dest = XEXP (dest, 0))
1162 /* If this is setting a pseudo from another pseudo or the sum of a
1163 pseudo and a constant integer and the other pseudo is known to be
1164 a pointer, set the destination to be a pointer as well.
1166 Likewise if it is setting the destination from an address or from a
1167 value equivalent to an address or to the sum of an address and
1170 But don't do any of this if the pseudo corresponds to a user
1171 variable since it should have already been set as a pointer based
1174 if (REG_P (SET_DEST (x))
1175 && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
1176 /* If the destination pseudo is set more than once, then other
1177 sets might not be to a pointer value (consider access to a
1178 union in two threads of control in the presence of global
1179 optimizations). So only set REG_POINTER on the destination
1180 pseudo if this is the only set of that pseudo. */
1181 && DF_REG_DEF_COUNT (REGNO (SET_DEST (x))) == 1
1182 && ! REG_USERVAR_P (SET_DEST (x))
1183 && ! REG_POINTER (SET_DEST (x))
1184 && ((REG_P (SET_SRC (x))
1185 && REG_POINTER (SET_SRC (x)))
1186 || ((GET_CODE (SET_SRC (x)) == PLUS
1187 || GET_CODE (SET_SRC (x)) == LO_SUM)
1188 && CONST_INT_P (XEXP (SET_SRC (x), 1))
1189 && REG_P (XEXP (SET_SRC (x), 0))
1190 && REG_POINTER (XEXP (SET_SRC (x), 0)))
1191 || GET_CODE (SET_SRC (x)) == CONST
1192 || GET_CODE (SET_SRC (x)) == SYMBOL_REF
1193 || GET_CODE (SET_SRC (x)) == LABEL_REF
1194 || (GET_CODE (SET_SRC (x)) == HIGH
1195 && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
1196 || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
1197 || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
1198 || ((GET_CODE (SET_SRC (x)) == PLUS
1199 || GET_CODE (SET_SRC (x)) == LO_SUM)
1200 && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
1201 || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
1202 || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
1203 || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1204 && (GET_CODE (XEXP (note, 0)) == CONST
1205 || GET_CODE (XEXP (note, 0)) == SYMBOL_REF
1206 || GET_CODE (XEXP (note, 0)) == LABEL_REF))))
1207 REG_POINTER (SET_DEST (x)) = 1;
1209 /* If this is setting a register from a register or from a simple
1210 conversion of a register, propagate REG_EXPR. */
1211 if (REG_P (dest) && !REG_ATTRS (dest))
1213 rtx src = SET_SRC (x);
1215 while (GET_CODE (src) == SIGN_EXTEND
1216 || GET_CODE (src) == ZERO_EXTEND
1217 || GET_CODE (src) == TRUNCATE
1218 || (GET_CODE (src) == SUBREG && subreg_lowpart_p (src)))
1219 src = XEXP (src, 0);
1221 set_reg_attrs_from_value (dest, src);
1224 /* ... fall through ... */
1228 const char *fmt = GET_RTX_FORMAT (code);
1230 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1233 reg_scan_mark_refs (XEXP (x, i), insn);
1234 else if (fmt[i] == 'E' && XVEC (x, i) != 0)
1237 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1238 reg_scan_mark_refs (XVECEXP (x, i, j), insn);
1246 /* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
1249 reg_class_subset_p (enum reg_class c1, enum reg_class c2)
1253 || hard_reg_set_subset_p (reg_class_contents[(int) c1],
1254 reg_class_contents[(int) c2]));
1257 /* Return nonzero if there is a register that is in both C1 and C2. */
1259 reg_classes_intersect_p (reg_class_t c1, reg_class_t c2)
1264 || hard_reg_set_intersect_p (reg_class_contents[(int) c1],
1265 reg_class_contents[(int) c2]));
1270 /* Passes for keeping and updating info about modes of registers
1271 inside subregisters. */
1273 #ifdef CANNOT_CHANGE_MODE_CLASS
1275 struct subregs_of_mode_node
1278 unsigned char modes[MAX_MACHINE_MODE];
1281 static htab_t subregs_of_mode;
1284 som_hash (const void *x)
1286 const struct subregs_of_mode_node *const a =
1287 (const struct subregs_of_mode_node *) x;
1292 som_eq (const void *x, const void *y)
1294 const struct subregs_of_mode_node *const a =
1295 (const struct subregs_of_mode_node *) x;
1296 const struct subregs_of_mode_node *const b =
1297 (const struct subregs_of_mode_node *) y;
1298 return a->block == b->block;
1302 record_subregs_of_mode (rtx subreg)
1304 struct subregs_of_mode_node dummy, *node;
1305 enum machine_mode mode;
1309 if (!REG_P (SUBREG_REG (subreg)))
1312 regno = REGNO (SUBREG_REG (subreg));
1313 mode = GET_MODE (subreg);
1315 if (regno < FIRST_PSEUDO_REGISTER)
1318 dummy.block = regno & -8;
1319 slot = htab_find_slot_with_hash (subregs_of_mode, &dummy,
1320 dummy.block, INSERT);
1321 node = (struct subregs_of_mode_node *) *slot;
1324 node = XCNEW (struct subregs_of_mode_node);
1325 node->block = regno & -8;
1329 node->modes[mode] |= 1 << (regno & 7);
1332 /* Call record_subregs_of_mode for all the subregs in X. */
1334 find_subregs_of_mode (rtx x)
1336 enum rtx_code code = GET_CODE (x);
1337 const char * const fmt = GET_RTX_FORMAT (code);
1341 record_subregs_of_mode (x);
1343 /* Time for some deep diving. */
1344 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1347 find_subregs_of_mode (XEXP (x, i));
1348 else if (fmt[i] == 'E')
1351 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1352 find_subregs_of_mode (XVECEXP (x, i, j));
1358 init_subregs_of_mode (void)
1363 if (subregs_of_mode)
1364 htab_empty (subregs_of_mode);
1366 subregs_of_mode = htab_create (100, som_hash, som_eq, free);
1369 FOR_BB_INSNS (bb, insn)
1371 find_subregs_of_mode (PATTERN (insn));
1374 /* Return 1 if REGNO has had an invalid mode change in CLASS from FROM
1377 invalid_mode_change_p (unsigned int regno,
1378 enum reg_class rclass ATTRIBUTE_UNUSED,
1379 enum machine_mode from)
1381 struct subregs_of_mode_node dummy, *node;
1385 gcc_assert (subregs_of_mode);
1386 dummy.block = regno & -8;
1387 node = (struct subregs_of_mode_node *)
1388 htab_find_with_hash (subregs_of_mode, &dummy, dummy.block);
1392 mask = 1 << (regno & 7);
1393 for (to = VOIDmode; to < NUM_MACHINE_MODES; to++)
1394 if (node->modes[to] & mask)
1395 if (CANNOT_CHANGE_MODE_CLASS (from, (enum machine_mode) to, rclass))
1402 finish_subregs_of_mode (void)
1404 htab_delete (subregs_of_mode);
1405 subregs_of_mode = 0;
1409 init_subregs_of_mode (void)
1413 finish_subregs_of_mode (void)
1417 #endif /* CANNOT_CHANGE_MODE_CLASS */
1419 #include "gt-reginfo.h"