1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
25 * The form of the input:
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
45 * The form of the output:
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
105 asm ("foo" : "=t" (a) : "f" (b));
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, ie, the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
116 The asm above would be written as
118 asm ("foo" : "=&t" (a) : "f" (b));
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
156 #include "coretypes.h"
161 #include "function.h"
162 #include "insn-config.h"
164 #include "hard-reg-set.h"
169 #include "basic-block.h"
174 /* We use this array to cache info about insns, because otherwise we
175 spend too much time in stack_regs_mentioned_p.
177 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
178 the insn uses stack registers, two indicates the insn does not use
180 static GTY(()) varray_type stack_regs_mentioned_data;
184 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
186 /* This is the basic stack record. TOP is an index into REG[] such
187 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
189 If TOP is -2, REG[] is not yet initialized. Stack initialization
190 consists of placing each live reg in array `reg' and setting `top'
193 REG_SET indicates which registers are live. */
195 typedef struct stack_def
197 int top; /* index to top stack element */
198 HARD_REG_SET reg_set; /* set of live registers */
199 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
202 /* This is used to carry information about basic blocks. It is
203 attached to the AUX field of the standard CFG block. */
205 typedef struct block_info_def
207 struct stack_def stack_in; /* Input stack configuration. */
208 struct stack_def stack_out; /* Output stack configuration. */
209 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
210 int done; /* True if block already converted. */
211 int predecessors; /* Number of predecessors that needs
215 #define BLOCK_INFO(B) ((block_info) (B)->aux)
217 /* Passed to change_stack to indicate where to emit insns. */
224 /* The block we're currently working on. */
225 static basic_block current_block;
227 /* This is the register file for all register after conversion. */
229 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
231 #define FP_MODE_REG(regno,mode) \
232 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
234 /* Used to initialize uninitialized registers. */
237 /* Forward declarations */
239 static int stack_regs_mentioned_p PARAMS ((rtx pat));
240 static void straighten_stack PARAMS ((rtx, stack));
241 static void pop_stack PARAMS ((stack, int));
242 static rtx *get_true_reg PARAMS ((rtx *));
244 static int check_asm_stack_operands PARAMS ((rtx));
245 static int get_asm_operand_n_inputs PARAMS ((rtx));
246 static rtx stack_result PARAMS ((tree));
247 static void replace_reg PARAMS ((rtx *, int));
248 static void remove_regno_note PARAMS ((rtx, enum reg_note,
250 static int get_hard_regnum PARAMS ((stack, rtx));
251 static rtx emit_pop_insn PARAMS ((rtx, stack, rtx,
253 static void emit_swap_insn PARAMS ((rtx, stack, rtx));
254 static void move_for_stack_reg PARAMS ((rtx, stack, rtx));
255 static int swap_rtx_condition_1 PARAMS ((rtx));
256 static int swap_rtx_condition PARAMS ((rtx));
257 static void compare_for_stack_reg PARAMS ((rtx, stack, rtx));
258 static void subst_stack_regs_pat PARAMS ((rtx, stack, rtx));
259 static void subst_asm_stack_regs PARAMS ((rtx, stack));
260 static void subst_stack_regs PARAMS ((rtx, stack));
261 static void change_stack PARAMS ((rtx, stack, stack,
263 static int convert_regs_entry PARAMS ((void));
264 static void convert_regs_exit PARAMS ((void));
265 static int convert_regs_1 PARAMS ((FILE *, basic_block));
266 static int convert_regs_2 PARAMS ((FILE *, basic_block));
267 static int convert_regs PARAMS ((FILE *));
268 static void print_stack PARAMS ((FILE *, stack));
269 static rtx next_flags_user PARAMS ((rtx));
270 static void record_label_references PARAMS ((rtx, rtx));
271 static bool compensate_edge PARAMS ((edge, FILE *));
273 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
276 stack_regs_mentioned_p (pat)
282 if (STACK_REG_P (pat))
285 fmt = GET_RTX_FORMAT (GET_CODE (pat));
286 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
292 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
293 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
296 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
303 /* Return nonzero if INSN mentions stacked registers, else return zero. */
306 stack_regs_mentioned (insn)
309 unsigned int uid, max;
312 if (! INSN_P (insn) || !stack_regs_mentioned_data)
315 uid = INSN_UID (insn);
316 max = VARRAY_SIZE (stack_regs_mentioned_data);
319 /* Allocate some extra size to avoid too many reallocs, but
320 do not grow too quickly. */
321 max = uid + uid / 20;
322 VARRAY_GROW (stack_regs_mentioned_data, max);
325 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
328 /* This insn has yet to be examined. Do so now. */
329 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
330 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
336 static rtx ix86_flags_rtx;
339 next_flags_user (insn)
342 /* Search forward looking for the first use of this value.
343 Stop at block boundaries. */
345 while (insn != current_block->end)
347 insn = NEXT_INSN (insn);
349 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
352 if (GET_CODE (insn) == CALL_INSN)
358 /* Reorganize the stack into ascending numbers,
362 straighten_stack (insn, regstack)
366 struct stack_def temp_stack;
369 /* If there is only a single register on the stack, then the stack is
370 already in increasing order and no reorganization is needed.
372 Similarly if the stack is empty. */
373 if (regstack->top <= 0)
376 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
378 for (top = temp_stack.top = regstack->top; top >= 0; top--)
379 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
381 change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
384 /* Pop a register from the stack. */
387 pop_stack (regstack, regno)
391 int top = regstack->top;
393 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
395 /* If regno was not at the top of stack then adjust stack. */
396 if (regstack->reg [top] != regno)
399 for (i = regstack->top; i >= 0; i--)
400 if (regstack->reg [i] == regno)
403 for (j = i; j < top; j++)
404 regstack->reg [j] = regstack->reg [j + 1];
410 /* Convert register usage from "flat" register file usage to a "stack
411 register file. FIRST is the first insn in the function, FILE is the
414 Construct a CFG and run life analysis. Then convert each insn one
415 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
416 code duplication created when the converter inserts pop insns on
420 reg_to_stack (first, file)
428 /* Clean up previous run. */
429 stack_regs_mentioned_data = 0;
434 /* See if there is something to do. Flow analysis is quite
435 expensive so we might save some compilation time. */
436 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
437 if (regs_ever_live[i])
439 if (i > LAST_STACK_REG)
442 /* Ok, floating point instructions exist. If not optimizing,
443 build the CFG and run life analysis. */
446 count_or_remove_death_notes (NULL, 1);
447 life_analysis (first, file, PROP_DEATH_NOTES);
449 mark_dfs_back_edges ();
451 /* Set up block info for each basic block. */
452 alloc_aux_for_blocks (sizeof (struct block_info_def));
453 FOR_EACH_BB_REVERSE (bb)
456 for (e = bb->pred; e; e=e->pred_next)
457 if (!(e->flags & EDGE_DFS_BACK)
458 && e->src != ENTRY_BLOCK_PTR)
459 BLOCK_INFO (bb)->predecessors++;
462 /* Create the replacement registers up front. */
463 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
465 enum machine_mode mode;
466 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
468 mode = GET_MODE_WIDER_MODE (mode))
469 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
470 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
472 mode = GET_MODE_WIDER_MODE (mode))
473 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
476 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
478 /* A QNaN for initializing uninitialized variables.
480 ??? We can't load from constant memory in PIC mode, because
481 we're inserting these instructions before the prologue and
482 the PIC register hasn't been set up. In that case, fall back
483 on zero, which we can get from `ldz'. */
486 nan = CONST0_RTX (SFmode);
489 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
490 nan = force_const_mem (SFmode, nan);
493 /* Allocate a cache for stack_regs_mentioned. */
494 max_uid = get_max_uid ();
495 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
496 "stack_regs_mentioned cache");
500 free_aux_for_blocks ();
503 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
504 label's chain of references, and note which insn contains each
508 record_label_references (insn, pat)
511 enum rtx_code code = GET_CODE (pat);
515 if (code == LABEL_REF)
517 rtx label = XEXP (pat, 0);
520 if (GET_CODE (label) != CODE_LABEL)
523 /* If this is an undefined label, LABEL_REFS (label) contains
525 if (INSN_UID (label) == 0)
528 /* Don't make a duplicate in the code_label's chain. */
530 for (ref = LABEL_REFS (label);
532 ref = LABEL_NEXTREF (ref))
533 if (CONTAINING_INSN (ref) == insn)
536 CONTAINING_INSN (pat) = insn;
537 LABEL_NEXTREF (pat) = LABEL_REFS (label);
538 LABEL_REFS (label) = pat;
543 fmt = GET_RTX_FORMAT (code);
544 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
547 record_label_references (insn, XEXP (pat, i));
551 for (j = 0; j < XVECLEN (pat, i); j++)
552 record_label_references (insn, XVECEXP (pat, i, j));
557 /* Return a pointer to the REG expression within PAT. If PAT is not a
558 REG, possible enclosed by a conversion rtx, return the inner part of
559 PAT that stopped the search. */
566 switch (GET_CODE (*pat))
569 /* Eliminate FP subregister accesses in favor of the
570 actual FP register in use. */
573 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
575 int regno_off = subreg_regno_offset (REGNO (subreg),
579 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
588 pat = & XEXP (*pat, 0);
592 /* There are many rules that an asm statement for stack-like regs must
593 follow. Those rules are explained at the top of this file: the rule
594 numbers below refer to that explanation. */
597 check_asm_stack_operands (insn)
602 int malformed_asm = 0;
603 rtx body = PATTERN (insn);
605 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
606 char implicitly_dies[FIRST_PSEUDO_REGISTER];
609 rtx *clobber_reg = 0;
610 int n_inputs, n_outputs;
612 /* Find out what the constraints require. If no constraint
613 alternative matches, this asm is malformed. */
615 constrain_operands (1);
616 alt = which_alternative;
618 preprocess_constraints ();
620 n_inputs = get_asm_operand_n_inputs (body);
621 n_outputs = recog_data.n_operands - n_inputs;
626 /* Avoid further trouble with this insn. */
627 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
631 /* Strip SUBREGs here to make the following code simpler. */
632 for (i = 0; i < recog_data.n_operands; i++)
633 if (GET_CODE (recog_data.operand[i]) == SUBREG
634 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
635 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
637 /* Set up CLOBBER_REG. */
641 if (GET_CODE (body) == PARALLEL)
643 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
645 for (i = 0; i < XVECLEN (body, 0); i++)
646 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
648 rtx clobber = XVECEXP (body, 0, i);
649 rtx reg = XEXP (clobber, 0);
651 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
652 reg = SUBREG_REG (reg);
654 if (STACK_REG_P (reg))
656 clobber_reg[n_clobbers] = reg;
662 /* Enforce rule #4: Output operands must specifically indicate which
663 reg an output appears in after an asm. "=f" is not allowed: the
664 operand constraints must select a class with a single reg.
666 Also enforce rule #5: Output operands must start at the top of
667 the reg-stack: output operands may not "skip" a reg. */
669 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
670 for (i = 0; i < n_outputs; i++)
671 if (STACK_REG_P (recog_data.operand[i]))
673 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
675 error_for_asm (insn, "output constraint %d must specify a single register", i);
682 for (j = 0; j < n_clobbers; j++)
683 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
685 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
686 i, reg_names [REGNO (clobber_reg[j])]);
691 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
696 /* Search for first non-popped reg. */
697 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
698 if (! reg_used_as_output[i])
701 /* If there are any other popped regs, that's an error. */
702 for (; i < LAST_STACK_REG + 1; i++)
703 if (reg_used_as_output[i])
706 if (i != LAST_STACK_REG + 1)
708 error_for_asm (insn, "output regs must be grouped at top of stack");
712 /* Enforce rule #2: All implicitly popped input regs must be closer
713 to the top of the reg-stack than any input that is not implicitly
716 memset (implicitly_dies, 0, sizeof (implicitly_dies));
717 for (i = n_outputs; i < n_outputs + n_inputs; i++)
718 if (STACK_REG_P (recog_data.operand[i]))
720 /* An input reg is implicitly popped if it is tied to an
721 output, or if there is a CLOBBER for it. */
724 for (j = 0; j < n_clobbers; j++)
725 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
728 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
729 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
732 /* Search for first non-popped reg. */
733 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
734 if (! implicitly_dies[i])
737 /* If there are any other popped regs, that's an error. */
738 for (; i < LAST_STACK_REG + 1; i++)
739 if (implicitly_dies[i])
742 if (i != LAST_STACK_REG + 1)
745 "implicitly popped regs must be grouped at top of stack");
749 /* Enforce rule #3: If any input operand uses the "f" constraint, all
750 output constraints must use the "&" earlyclobber.
752 ??? Detect this more deterministically by having constrain_asm_operands
753 record any earlyclobber. */
755 for (i = n_outputs; i < n_outputs + n_inputs; i++)
756 if (recog_op_alt[i][alt].matches == -1)
760 for (j = 0; j < n_outputs; j++)
761 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
764 "output operand %d must use `&' constraint", j);
771 /* Avoid further trouble with this insn. */
772 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
779 /* Calculate the number of inputs and outputs in BODY, an
780 asm_operands. N_OPERANDS is the total number of operands, and
781 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
785 get_asm_operand_n_inputs (body)
788 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
789 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
791 else if (GET_CODE (body) == ASM_OPERANDS)
792 return ASM_OPERANDS_INPUT_LENGTH (body);
794 else if (GET_CODE (body) == PARALLEL
795 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
796 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
798 else if (GET_CODE (body) == PARALLEL
799 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
800 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
805 /* If current function returns its result in an fp stack register,
806 return the REG. Otherwise, return 0. */
814 /* If the value is supposed to be returned in memory, then clearly
815 it is not returned in a stack register. */
816 if (aggregate_value_p (DECL_RESULT (decl)))
819 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
822 #ifdef FUNCTION_OUTGOING_VALUE
824 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
826 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
830 return result != 0 && STACK_REG_P (result) ? result : 0;
835 * This section deals with stack register substitution, and forms the second
839 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
840 the desired hard REGNO. */
843 replace_reg (reg, regno)
847 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
848 || ! STACK_REG_P (*reg))
851 switch (GET_MODE_CLASS (GET_MODE (*reg)))
855 case MODE_COMPLEX_FLOAT:;
858 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
861 /* Remove a note of type NOTE, which must be found, for register
862 number REGNO from INSN. Remove only one such note. */
865 remove_regno_note (insn, note, regno)
870 rtx *note_link, this;
872 note_link = ®_NOTES (insn);
873 for (this = *note_link; this; this = XEXP (this, 1))
874 if (REG_NOTE_KIND (this) == note
875 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
877 *note_link = XEXP (this, 1);
881 note_link = &XEXP (this, 1);
886 /* Find the hard register number of virtual register REG in REGSTACK.
887 The hard register number is relative to the top of the stack. -1 is
888 returned if the register is not found. */
891 get_hard_regnum (regstack, reg)
897 if (! STACK_REG_P (reg))
900 for (i = regstack->top; i >= 0; i--)
901 if (regstack->reg[i] == REGNO (reg))
904 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
907 /* Emit an insn to pop virtual register REG before or after INSN.
908 REGSTACK is the stack state after INSN and is updated to reflect this
909 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
910 is represented as a SET whose destination is the register to be popped
911 and source is the top of stack. A death note for the top of stack
912 cases the movdf pattern to pop. */
915 emit_pop_insn (insn, regstack, reg, where)
919 enum emit_where where;
921 rtx pop_insn, pop_rtx;
924 /* For complex types take care to pop both halves. These may survive in
925 CLOBBER and USE expressions. */
926 if (COMPLEX_MODE_P (GET_MODE (reg)))
928 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
929 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
932 if (get_hard_regnum (regstack, reg1) >= 0)
933 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
934 if (get_hard_regnum (regstack, reg2) >= 0)
935 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
941 hard_regno = get_hard_regnum (regstack, reg);
943 if (hard_regno < FIRST_STACK_REG)
946 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
947 FP_MODE_REG (FIRST_STACK_REG, DFmode));
949 if (where == EMIT_AFTER)
950 pop_insn = emit_insn_after (pop_rtx, insn);
952 pop_insn = emit_insn_before (pop_rtx, insn);
955 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
956 REG_NOTES (pop_insn));
958 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
959 = regstack->reg[regstack->top];
961 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
966 /* Emit an insn before or after INSN to swap virtual register REG with
967 the top of stack. REGSTACK is the stack state before the swap, and
968 is updated to reflect the swap. A swap insn is represented as a
969 PARALLEL of two patterns: each pattern moves one reg to the other.
971 If REG is already at the top of the stack, no insn is emitted. */
974 emit_swap_insn (insn, regstack, reg)
981 int tmp, other_reg; /* swap regno temps */
982 rtx i1; /* the stack-reg insn prior to INSN */
983 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
985 hard_regno = get_hard_regnum (regstack, reg);
987 if (hard_regno < FIRST_STACK_REG)
989 if (hard_regno == FIRST_STACK_REG)
992 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
994 tmp = regstack->reg[other_reg];
995 regstack->reg[other_reg] = regstack->reg[regstack->top];
996 regstack->reg[regstack->top] = tmp;
998 /* Find the previous insn involving stack regs, but don't pass a
1001 if (current_block && insn != current_block->head)
1003 rtx tmp = PREV_INSN (insn);
1004 rtx limit = PREV_INSN (current_block->head);
1005 while (tmp != limit)
1007 if (GET_CODE (tmp) == CODE_LABEL
1008 || GET_CODE (tmp) == CALL_INSN
1009 || NOTE_INSN_BASIC_BLOCK_P (tmp)
1010 || (GET_CODE (tmp) == INSN
1011 && stack_regs_mentioned (tmp)))
1016 tmp = PREV_INSN (tmp);
1021 && (i1set = single_set (i1)) != NULL_RTX)
1023 rtx i1src = *get_true_reg (&SET_SRC (i1set));
1024 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1026 /* If the previous register stack push was from the reg we are to
1027 swap with, omit the swap. */
1029 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
1030 && GET_CODE (i1src) == REG
1031 && REGNO (i1src) == (unsigned) hard_regno - 1
1032 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1035 /* If the previous insn wrote to the reg we are to swap with,
1038 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == (unsigned) hard_regno
1039 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1040 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1044 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
1045 FP_MODE_REG (FIRST_STACK_REG, XFmode));
1048 emit_insn_after (swap_rtx, i1);
1049 else if (current_block)
1050 emit_insn_before (swap_rtx, current_block->head);
1052 emit_insn_before (swap_rtx, insn);
1055 /* Handle a move to or from a stack register in PAT, which is in INSN.
1056 REGSTACK is the current stack. */
1059 move_for_stack_reg (insn, regstack, pat)
1064 rtx *psrc = get_true_reg (&SET_SRC (pat));
1065 rtx *pdest = get_true_reg (&SET_DEST (pat));
1069 src = *psrc; dest = *pdest;
1071 if (STACK_REG_P (src) && STACK_REG_P (dest))
1073 /* Write from one stack reg to another. If SRC dies here, then
1074 just change the register mapping and delete the insn. */
1076 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1081 /* If this is a no-op move, there must not be a REG_DEAD note. */
1082 if (REGNO (src) == REGNO (dest))
1085 for (i = regstack->top; i >= 0; i--)
1086 if (regstack->reg[i] == REGNO (src))
1089 /* The source must be live, and the dest must be dead. */
1090 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1093 /* It is possible that the dest is unused after this insn.
1094 If so, just pop the src. */
1096 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1098 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1104 regstack->reg[i] = REGNO (dest);
1106 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1107 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1114 /* The source reg does not die. */
1116 /* If this appears to be a no-op move, delete it, or else it
1117 will confuse the machine description output patterns. But if
1118 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1119 for REG_UNUSED will not work for deleted insns. */
1121 if (REGNO (src) == REGNO (dest))
1123 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1124 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1130 /* The destination ought to be dead. */
1131 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1134 replace_reg (psrc, get_hard_regnum (regstack, src));
1136 regstack->reg[++regstack->top] = REGNO (dest);
1137 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1138 replace_reg (pdest, FIRST_STACK_REG);
1140 else if (STACK_REG_P (src))
1142 /* Save from a stack reg to MEM, or possibly integer reg. Since
1143 only top of stack may be saved, emit an exchange first if
1146 emit_swap_insn (insn, regstack, src);
1148 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1151 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1153 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1155 else if ((GET_MODE (src) == XFmode || GET_MODE (src) == TFmode)
1156 && regstack->top < REG_STACK_SIZE - 1)
1158 /* A 387 cannot write an XFmode value to a MEM without
1159 clobbering the source reg. The output code can handle
1160 this by reading back the value from the MEM.
1161 But it is more efficient to use a temp register if one is
1162 available. Push the source value here if the register
1163 stack is not full, and then write the value to memory via
1165 rtx push_rtx, push_insn;
1166 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1168 if (GET_MODE (src) == TFmode)
1169 push_rtx = gen_movtf (top_stack_reg, top_stack_reg);
1171 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1172 push_insn = emit_insn_before (push_rtx, insn);
1173 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1177 replace_reg (psrc, FIRST_STACK_REG);
1179 else if (STACK_REG_P (dest))
1181 /* Load from MEM, or possibly integer REG or constant, into the
1182 stack regs. The actual target is always the top of the
1183 stack. The stack mapping is changed to reflect that DEST is
1184 now at top of stack. */
1186 /* The destination ought to be dead. */
1187 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1190 if (regstack->top >= REG_STACK_SIZE)
1193 regstack->reg[++regstack->top] = REGNO (dest);
1194 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1195 replace_reg (pdest, FIRST_STACK_REG);
1201 /* Swap the condition on a branch, if there is one. Return true if we
1202 found a condition to swap. False if the condition was not used as
1206 swap_rtx_condition_1 (pat)
1212 if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1214 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1219 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1220 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1226 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1227 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1229 else if (fmt[i] == 'e')
1230 r |= swap_rtx_condition_1 (XEXP (pat, i));
1238 swap_rtx_condition (insn)
1241 rtx pat = PATTERN (insn);
1243 /* We're looking for a single set to cc0 or an HImode temporary. */
1245 if (GET_CODE (pat) == SET
1246 && GET_CODE (SET_DEST (pat)) == REG
1247 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1249 insn = next_flags_user (insn);
1250 if (insn == NULL_RTX)
1252 pat = PATTERN (insn);
1255 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1256 not doing anything with the cc value right now. We may be able to
1257 search for one though. */
1259 if (GET_CODE (pat) == SET
1260 && GET_CODE (SET_SRC (pat)) == UNSPEC
1261 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1263 rtx dest = SET_DEST (pat);
1265 /* Search forward looking for the first use of this value.
1266 Stop at block boundaries. */
1267 while (insn != current_block->end)
1269 insn = NEXT_INSN (insn);
1270 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1272 if (GET_CODE (insn) == CALL_INSN)
1276 /* So we've found the insn using this value. If it is anything
1277 other than sahf, aka unspec 10, or the value does not die
1278 (meaning we'd have to search further), then we must give up. */
1279 pat = PATTERN (insn);
1280 if (GET_CODE (pat) != SET
1281 || GET_CODE (SET_SRC (pat)) != UNSPEC
1282 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1283 || ! dead_or_set_p (insn, dest))
1286 /* Now we are prepared to handle this as a normal cc0 setter. */
1287 insn = next_flags_user (insn);
1288 if (insn == NULL_RTX)
1290 pat = PATTERN (insn);
1293 if (swap_rtx_condition_1 (pat))
1296 INSN_CODE (insn) = -1;
1297 if (recog_memoized (insn) == -1)
1299 /* In case the flags don't die here, recurse to try fix
1300 following user too. */
1301 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1303 insn = next_flags_user (insn);
1304 if (!insn || !swap_rtx_condition (insn))
1309 swap_rtx_condition_1 (pat);
1317 /* Handle a comparison. Special care needs to be taken to avoid
1318 causing comparisons that a 387 cannot do correctly, such as EQ.
1320 Also, a pop insn may need to be emitted. The 387 does have an
1321 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1322 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1326 compare_for_stack_reg (insn, regstack, pat_src)
1332 rtx src1_note, src2_note;
1335 src1 = get_true_reg (&XEXP (pat_src, 0));
1336 src2 = get_true_reg (&XEXP (pat_src, 1));
1337 flags_user = next_flags_user (insn);
1339 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1340 registers that die in this insn - move those to stack top first. */
1341 if ((! STACK_REG_P (*src1)
1342 || (STACK_REG_P (*src2)
1343 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1344 && swap_rtx_condition (insn))
1347 temp = XEXP (pat_src, 0);
1348 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1349 XEXP (pat_src, 1) = temp;
1351 src1 = get_true_reg (&XEXP (pat_src, 0));
1352 src2 = get_true_reg (&XEXP (pat_src, 1));
1354 INSN_CODE (insn) = -1;
1357 /* We will fix any death note later. */
1359 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1361 if (STACK_REG_P (*src2))
1362 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1364 src2_note = NULL_RTX;
1366 emit_swap_insn (insn, regstack, *src1);
1368 replace_reg (src1, FIRST_STACK_REG);
1370 if (STACK_REG_P (*src2))
1371 replace_reg (src2, get_hard_regnum (regstack, *src2));
1375 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1376 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1379 /* If the second operand dies, handle that. But if the operands are
1380 the same stack register, don't bother, because only one death is
1381 needed, and it was just handled. */
1384 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1385 && REGNO (*src1) == REGNO (*src2)))
1387 /* As a special case, two regs may die in this insn if src2 is
1388 next to top of stack and the top of stack also dies. Since
1389 we have already popped src1, "next to top of stack" is really
1390 at top (FIRST_STACK_REG) now. */
1392 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1395 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1396 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1400 /* The 386 can only represent death of the first operand in
1401 the case handled above. In all other cases, emit a separate
1402 pop and remove the death note from here. */
1404 /* link_cc0_insns (insn); */
1406 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1408 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1414 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1415 is the current register layout. */
1418 subst_stack_regs_pat (insn, regstack, pat)
1425 switch (GET_CODE (pat))
1428 /* Deaths in USE insns can happen in non optimizing compilation.
1429 Handle them by popping the dying register. */
1430 src = get_true_reg (&XEXP (pat, 0));
1431 if (STACK_REG_P (*src)
1432 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1434 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1437 /* ??? Uninitialized USE should not happen. */
1438 else if (get_hard_regnum (regstack, *src) == -1)
1446 dest = get_true_reg (&XEXP (pat, 0));
1447 if (STACK_REG_P (*dest))
1449 note = find_reg_note (insn, REG_DEAD, *dest);
1451 if (pat != PATTERN (insn))
1453 /* The fix_truncdi_1 pattern wants to be able to allocate
1454 it's own scratch register. It does this by clobbering
1455 an fp reg so that it is assured of an empty reg-stack
1456 register. If the register is live, kill it now.
1457 Remove the DEAD/UNUSED note so we don't try to kill it
1461 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1464 note = find_reg_note (insn, REG_UNUSED, *dest);
1468 remove_note (insn, note);
1469 replace_reg (dest, LAST_STACK_REG);
1473 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1474 indicates an uninitialized value. Because reload removed
1475 all other clobbers, this must be due to a function
1476 returning without a value. Load up a NaN. */
1479 && get_hard_regnum (regstack, *dest) == -1)
1481 pat = gen_rtx_SET (VOIDmode,
1482 FP_MODE_REG (REGNO (*dest), SFmode),
1484 PATTERN (insn) = pat;
1485 move_for_stack_reg (insn, regstack, pat);
1487 if (! note && COMPLEX_MODE_P (GET_MODE (*dest))
1488 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1)
1490 pat = gen_rtx_SET (VOIDmode,
1491 FP_MODE_REG (REGNO (*dest) + 1, SFmode),
1493 PATTERN (insn) = pat;
1494 move_for_stack_reg (insn, regstack, pat);
1503 rtx *src1 = (rtx *) 0, *src2;
1504 rtx src1_note, src2_note;
1507 dest = get_true_reg (&SET_DEST (pat));
1508 src = get_true_reg (&SET_SRC (pat));
1509 pat_src = SET_SRC (pat);
1511 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1512 if (STACK_REG_P (*src)
1513 || (STACK_REG_P (*dest)
1514 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1515 || GET_CODE (*src) == CONST_DOUBLE)))
1517 move_for_stack_reg (insn, regstack, pat);
1521 switch (GET_CODE (pat_src))
1524 compare_for_stack_reg (insn, regstack, pat_src);
1530 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
1533 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1534 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1537 replace_reg (dest, FIRST_STACK_REG);
1541 /* This is a `tstM2' case. */
1542 if (*dest != cc0_rtx)
1548 case FLOAT_TRUNCATE:
1552 /* These insns only operate on the top of the stack. DEST might
1553 be cc0_rtx if we're processing a tstM pattern. Also, it's
1554 possible that the tstM case results in a REG_DEAD note on the
1558 src1 = get_true_reg (&XEXP (pat_src, 0));
1560 emit_swap_insn (insn, regstack, *src1);
1562 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1564 if (STACK_REG_P (*dest))
1565 replace_reg (dest, FIRST_STACK_REG);
1569 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1571 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1574 replace_reg (src1, FIRST_STACK_REG);
1579 /* On i386, reversed forms of subM3 and divM3 exist for
1580 MODE_FLOAT, so the same code that works for addM3 and mulM3
1584 /* These insns can accept the top of stack as a destination
1585 from a stack reg or mem, or can use the top of stack as a
1586 source and some other stack register (possibly top of stack)
1587 as a destination. */
1589 src1 = get_true_reg (&XEXP (pat_src, 0));
1590 src2 = get_true_reg (&XEXP (pat_src, 1));
1592 /* We will fix any death note later. */
1594 if (STACK_REG_P (*src1))
1595 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1597 src1_note = NULL_RTX;
1598 if (STACK_REG_P (*src2))
1599 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1601 src2_note = NULL_RTX;
1603 /* If either operand is not a stack register, then the dest
1604 must be top of stack. */
1606 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1607 emit_swap_insn (insn, regstack, *dest);
1610 /* Both operands are REG. If neither operand is already
1611 at the top of stack, choose to make the one that is the dest
1612 the new top of stack. */
1614 int src1_hard_regnum, src2_hard_regnum;
1616 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1617 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1618 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1621 if (src1_hard_regnum != FIRST_STACK_REG
1622 && src2_hard_regnum != FIRST_STACK_REG)
1623 emit_swap_insn (insn, regstack, *dest);
1626 if (STACK_REG_P (*src1))
1627 replace_reg (src1, get_hard_regnum (regstack, *src1));
1628 if (STACK_REG_P (*src2))
1629 replace_reg (src2, get_hard_regnum (regstack, *src2));
1633 rtx src1_reg = XEXP (src1_note, 0);
1635 /* If the register that dies is at the top of stack, then
1636 the destination is somewhere else - merely substitute it.
1637 But if the reg that dies is not at top of stack, then
1638 move the top of stack to the dead reg, as though we had
1639 done the insn and then a store-with-pop. */
1641 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1643 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1644 replace_reg (dest, get_hard_regnum (regstack, *dest));
1648 int regno = get_hard_regnum (regstack, src1_reg);
1650 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1651 replace_reg (dest, regno);
1653 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1654 = regstack->reg[regstack->top];
1657 CLEAR_HARD_REG_BIT (regstack->reg_set,
1658 REGNO (XEXP (src1_note, 0)));
1659 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1664 rtx src2_reg = XEXP (src2_note, 0);
1665 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1667 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1668 replace_reg (dest, get_hard_regnum (regstack, *dest));
1672 int regno = get_hard_regnum (regstack, src2_reg);
1674 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1675 replace_reg (dest, regno);
1677 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1678 = regstack->reg[regstack->top];
1681 CLEAR_HARD_REG_BIT (regstack->reg_set,
1682 REGNO (XEXP (src2_note, 0)));
1683 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1688 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1689 replace_reg (dest, get_hard_regnum (regstack, *dest));
1692 /* Keep operand 1 matching with destination. */
1693 if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c'
1694 && REG_P (*src1) && REG_P (*src2)
1695 && REGNO (*src1) != REGNO (*dest))
1697 int tmp = REGNO (*src1);
1698 replace_reg (src1, REGNO (*src2));
1699 replace_reg (src2, tmp);
1704 switch (XINT (pat_src, 1))
1708 /* These insns only operate on the top of the stack. */
1710 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1712 emit_swap_insn (insn, regstack, *src1);
1714 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1716 if (STACK_REG_P (*dest))
1717 replace_reg (dest, FIRST_STACK_REG);
1721 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1723 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1726 replace_reg (src1, FIRST_STACK_REG);
1730 /* These insns operate on the top two stack slots. */
1732 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1733 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1735 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1736 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1739 struct stack_def temp_stack;
1740 int regno, j, k, temp;
1742 temp_stack = *regstack;
1744 /* Place operand 1 at the top of stack. */
1745 regno = get_hard_regnum (&temp_stack, *src1);
1748 if (regno != FIRST_STACK_REG)
1750 k = temp_stack.top - (regno - FIRST_STACK_REG);
1753 temp = temp_stack.reg[k];
1754 temp_stack.reg[k] = temp_stack.reg[j];
1755 temp_stack.reg[j] = temp;
1758 /* Place operand 2 next on the stack. */
1759 regno = get_hard_regnum (&temp_stack, *src2);
1762 if (regno != FIRST_STACK_REG + 1)
1764 k = temp_stack.top - (regno - FIRST_STACK_REG);
1765 j = temp_stack.top - 1;
1767 temp = temp_stack.reg[k];
1768 temp_stack.reg[k] = temp_stack.reg[j];
1769 temp_stack.reg[j] = temp;
1772 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
1775 replace_reg (src1, FIRST_STACK_REG);
1776 replace_reg (src2, FIRST_STACK_REG + 1);
1779 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1781 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1783 /* Pop both input operands from the stack. */
1784 CLEAR_HARD_REG_BIT (regstack->reg_set,
1785 regstack->reg[regstack->top]);
1786 CLEAR_HARD_REG_BIT (regstack->reg_set,
1787 regstack->reg[regstack->top - 1]);
1790 /* Push the result back onto the stack. */
1791 regstack->reg[++regstack->top] = REGNO (*dest);
1792 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1793 replace_reg (dest, FIRST_STACK_REG);
1797 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1798 The combination matches the PPRO fcomi instruction. */
1800 pat_src = XVECEXP (pat_src, 0, 0);
1801 if (GET_CODE (pat_src) != UNSPEC
1802 || XINT (pat_src, 1) != UNSPEC_FNSTSW)
1807 /* Combined fcomp+fnstsw generated for doing well with
1808 CSE. When optimizing this would have been broken
1811 pat_src = XVECEXP (pat_src, 0, 0);
1812 if (GET_CODE (pat_src) != COMPARE)
1815 compare_for_stack_reg (insn, regstack, pat_src);
1824 /* This insn requires the top of stack to be the destination. */
1826 src1 = get_true_reg (&XEXP (pat_src, 1));
1827 src2 = get_true_reg (&XEXP (pat_src, 2));
1829 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1830 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1832 /* If the comparison operator is an FP comparison operator,
1833 it is handled correctly by compare_for_stack_reg () who
1834 will move the destination to the top of stack. But if the
1835 comparison operator is not an FP comparison operator, we
1836 have to handle it here. */
1837 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1838 && REGNO (*dest) != regstack->reg[regstack->top])
1840 /* In case one of operands is the top of stack and the operands
1841 dies, it is safe to make it the destination operand by
1842 reversing the direction of cmove and avoid fxch. */
1843 if ((REGNO (*src1) == regstack->reg[regstack->top]
1845 || (REGNO (*src2) == regstack->reg[regstack->top]
1848 int idx1 = (get_hard_regnum (regstack, *src1)
1850 int idx2 = (get_hard_regnum (regstack, *src2)
1853 /* Make reg-stack believe that the operands are already
1854 swapped on the stack */
1855 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1856 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1858 /* Reverse condition to compensate the operand swap.
1859 i386 do have comparison always reversible. */
1860 PUT_CODE (XEXP (pat_src, 0),
1861 reversed_comparison_code (XEXP (pat_src, 0), insn));
1864 emit_swap_insn (insn, regstack, *dest);
1872 src_note[1] = src1_note;
1873 src_note[2] = src2_note;
1875 if (STACK_REG_P (*src1))
1876 replace_reg (src1, get_hard_regnum (regstack, *src1));
1877 if (STACK_REG_P (*src2))
1878 replace_reg (src2, get_hard_regnum (regstack, *src2));
1880 for (i = 1; i <= 2; i++)
1883 int regno = REGNO (XEXP (src_note[i], 0));
1885 /* If the register that dies is not at the top of
1886 stack, then move the top of stack to the dead reg */
1887 if (regno != regstack->reg[regstack->top])
1889 remove_regno_note (insn, REG_DEAD, regno);
1890 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1894 /* Top of stack never dies, as it is the
1900 /* Make dest the top of stack. Add dest to regstack if
1902 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1903 regstack->reg[++regstack->top] = REGNO (*dest);
1904 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1905 replace_reg (dest, FIRST_STACK_REG);
1919 /* Substitute hard regnums for any stack regs in INSN, which has
1920 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1921 before the insn, and is updated with changes made here.
1923 There are several requirements and assumptions about the use of
1924 stack-like regs in asm statements. These rules are enforced by
1925 record_asm_stack_regs; see comments there for details. Any
1926 asm_operands left in the RTL at this point may be assume to meet the
1927 requirements, since record_asm_stack_regs removes any problem asm. */
1930 subst_asm_stack_regs (insn, regstack)
1934 rtx body = PATTERN (insn);
1937 rtx *note_reg; /* Array of note contents */
1938 rtx **note_loc; /* Address of REG field of each note */
1939 enum reg_note *note_kind; /* The type of each note */
1941 rtx *clobber_reg = 0;
1942 rtx **clobber_loc = 0;
1944 struct stack_def temp_stack;
1949 int n_inputs, n_outputs;
1951 if (! check_asm_stack_operands (insn))
1954 /* Find out what the constraints required. If no constraint
1955 alternative matches, that is a compiler bug: we should have caught
1956 such an insn in check_asm_stack_operands. */
1957 extract_insn (insn);
1958 constrain_operands (1);
1959 alt = which_alternative;
1961 preprocess_constraints ();
1963 n_inputs = get_asm_operand_n_inputs (body);
1964 n_outputs = recog_data.n_operands - n_inputs;
1969 /* Strip SUBREGs here to make the following code simpler. */
1970 for (i = 0; i < recog_data.n_operands; i++)
1971 if (GET_CODE (recog_data.operand[i]) == SUBREG
1972 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
1974 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1975 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1978 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1980 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1983 note_reg = (rtx *) alloca (i * sizeof (rtx));
1984 note_loc = (rtx **) alloca (i * sizeof (rtx *));
1985 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
1988 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1990 rtx reg = XEXP (note, 0);
1991 rtx *loc = & XEXP (note, 0);
1993 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1995 loc = & SUBREG_REG (reg);
1996 reg = SUBREG_REG (reg);
1999 if (STACK_REG_P (reg)
2000 && (REG_NOTE_KIND (note) == REG_DEAD
2001 || REG_NOTE_KIND (note) == REG_UNUSED))
2003 note_reg[n_notes] = reg;
2004 note_loc[n_notes] = loc;
2005 note_kind[n_notes] = REG_NOTE_KIND (note);
2010 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2014 if (GET_CODE (body) == PARALLEL)
2016 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
2017 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *));
2019 for (i = 0; i < XVECLEN (body, 0); i++)
2020 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2022 rtx clobber = XVECEXP (body, 0, i);
2023 rtx reg = XEXP (clobber, 0);
2024 rtx *loc = & XEXP (clobber, 0);
2026 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2028 loc = & SUBREG_REG (reg);
2029 reg = SUBREG_REG (reg);
2032 if (STACK_REG_P (reg))
2034 clobber_reg[n_clobbers] = reg;
2035 clobber_loc[n_clobbers] = loc;
2041 temp_stack = *regstack;
2043 /* Put the input regs into the desired place in TEMP_STACK. */
2045 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2046 if (STACK_REG_P (recog_data.operand[i])
2047 && reg_class_subset_p (recog_op_alt[i][alt].class,
2049 && recog_op_alt[i][alt].class != FLOAT_REGS)
2051 /* If an operand needs to be in a particular reg in
2052 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2053 these constraints are for single register classes, and
2054 reload guaranteed that operand[i] is already in that class,
2055 we can just use REGNO (recog_data.operand[i]) to know which
2056 actual reg this operand needs to be in. */
2058 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2063 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2065 /* recog_data.operand[i] is not in the right place. Find
2066 it and swap it with whatever is already in I's place.
2067 K is where recog_data.operand[i] is now. J is where it
2071 k = temp_stack.top - (regno - FIRST_STACK_REG);
2073 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2075 temp = temp_stack.reg[k];
2076 temp_stack.reg[k] = temp_stack.reg[j];
2077 temp_stack.reg[j] = temp;
2081 /* Emit insns before INSN to make sure the reg-stack is in the right
2084 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2086 /* Make the needed input register substitutions. Do death notes and
2087 clobbers too, because these are for inputs, not outputs. */
2089 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2090 if (STACK_REG_P (recog_data.operand[i]))
2092 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2097 replace_reg (recog_data.operand_loc[i], regnum);
2100 for (i = 0; i < n_notes; i++)
2101 if (note_kind[i] == REG_DEAD)
2103 int regnum = get_hard_regnum (regstack, note_reg[i]);
2108 replace_reg (note_loc[i], regnum);
2111 for (i = 0; i < n_clobbers; i++)
2113 /* It's OK for a CLOBBER to reference a reg that is not live.
2114 Don't try to replace it in that case. */
2115 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2119 /* Sigh - clobbers always have QImode. But replace_reg knows
2120 that these regs can't be MODE_INT and will abort. Just put
2121 the right reg there without calling replace_reg. */
2123 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2127 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2129 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2130 if (STACK_REG_P (recog_data.operand[i]))
2132 /* An input reg is implicitly popped if it is tied to an
2133 output, or if there is a CLOBBER for it. */
2136 for (j = 0; j < n_clobbers; j++)
2137 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2140 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2142 /* recog_data.operand[i] might not be at the top of stack.
2143 But that's OK, because all we need to do is pop the
2144 right number of regs off of the top of the reg-stack.
2145 record_asm_stack_regs guaranteed that all implicitly
2146 popped regs were grouped at the top of the reg-stack. */
2148 CLEAR_HARD_REG_BIT (regstack->reg_set,
2149 regstack->reg[regstack->top]);
2154 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2155 Note that there isn't any need to substitute register numbers.
2156 ??? Explain why this is true. */
2158 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2160 /* See if there is an output for this hard reg. */
2163 for (j = 0; j < n_outputs; j++)
2164 if (STACK_REG_P (recog_data.operand[j])
2165 && REGNO (recog_data.operand[j]) == (unsigned) i)
2167 regstack->reg[++regstack->top] = i;
2168 SET_HARD_REG_BIT (regstack->reg_set, i);
2173 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2174 input that the asm didn't implicitly pop. If the asm didn't
2175 implicitly pop an input reg, that reg will still be live.
2177 Note that we can't use find_regno_note here: the register numbers
2178 in the death notes have already been substituted. */
2180 for (i = 0; i < n_outputs; i++)
2181 if (STACK_REG_P (recog_data.operand[i]))
2185 for (j = 0; j < n_notes; j++)
2186 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2187 && note_kind[j] == REG_UNUSED)
2189 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2195 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2196 if (STACK_REG_P (recog_data.operand[i]))
2200 for (j = 0; j < n_notes; j++)
2201 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2202 && note_kind[j] == REG_DEAD
2203 && TEST_HARD_REG_BIT (regstack->reg_set,
2204 REGNO (recog_data.operand[i])))
2206 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2213 /* Substitute stack hard reg numbers for stack virtual registers in
2214 INSN. Non-stack register numbers are not changed. REGSTACK is the
2215 current stack content. Insns may be emitted as needed to arrange the
2216 stack for the 387 based on the contents of the insn. */
2219 subst_stack_regs (insn, regstack)
2223 rtx *note_link, note;
2226 if (GET_CODE (insn) == CALL_INSN)
2228 int top = regstack->top;
2230 /* If there are any floating point parameters to be passed in
2231 registers for this call, make sure they are in the right
2236 straighten_stack (PREV_INSN (insn), regstack);
2238 /* Now mark the arguments as dead after the call. */
2240 while (regstack->top >= 0)
2242 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2248 /* Do the actual substitution if any stack regs are mentioned.
2249 Since we only record whether entire insn mentions stack regs, and
2250 subst_stack_regs_pat only works for patterns that contain stack regs,
2251 we must check each pattern in a parallel here. A call_value_pop could
2254 if (stack_regs_mentioned (insn))
2256 int n_operands = asm_noperands (PATTERN (insn));
2257 if (n_operands >= 0)
2259 /* This insn is an `asm' with operands. Decode the operands,
2260 decide how many are inputs, and do register substitution.
2261 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2263 subst_asm_stack_regs (insn, regstack);
2267 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2268 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2270 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2271 subst_stack_regs_pat (insn, regstack,
2272 XVECEXP (PATTERN (insn), 0, i));
2275 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2278 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2279 REG_UNUSED will already have been dealt with, so just return. */
2281 if (GET_CODE (insn) == NOTE || INSN_DELETED_P (insn))
2284 /* If there is a REG_UNUSED note on a stack register on this insn,
2285 the indicated reg must be popped. The REG_UNUSED note is removed,
2286 since the form of the newly emitted pop insn references the reg,
2287 making it no longer `unset'. */
2289 note_link = ®_NOTES (insn);
2290 for (note = *note_link; note; note = XEXP (note, 1))
2291 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2293 *note_link = XEXP (note, 1);
2294 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2297 note_link = &XEXP (note, 1);
2300 /* Change the organization of the stack so that it fits a new basic
2301 block. Some registers might have to be popped, but there can never be
2302 a register live in the new block that is not now live.
2304 Insert any needed insns before or after INSN, as indicated by
2305 WHERE. OLD is the original stack layout, and NEW is the desired
2306 form. OLD is updated to reflect the code emitted, ie, it will be
2307 the same as NEW upon return.
2309 This function will not preserve block_end[]. But that information
2310 is no longer needed once this has executed. */
2313 change_stack (insn, old, new, where)
2317 enum emit_where where;
2322 /* We will be inserting new insns "backwards". If we are to insert
2323 after INSN, find the next insn, and insert before it. */
2325 if (where == EMIT_AFTER)
2327 if (current_block && current_block->end == insn)
2329 insn = NEXT_INSN (insn);
2332 /* Pop any registers that are not needed in the new block. */
2334 for (reg = old->top; reg >= 0; reg--)
2335 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2336 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2341 /* If the new block has never been processed, then it can inherit
2342 the old stack order. */
2344 new->top = old->top;
2345 memcpy (new->reg, old->reg, sizeof (new->reg));
2349 /* This block has been entered before, and we must match the
2350 previously selected stack order. */
2352 /* By now, the only difference should be the order of the stack,
2353 not their depth or liveliness. */
2355 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2358 if (old->top != new->top)
2361 /* If the stack is not empty (new->top != -1), loop here emitting
2362 swaps until the stack is correct.
2364 The worst case number of swaps emitted is N + 2, where N is the
2365 depth of the stack. In some cases, the reg at the top of
2366 stack may be correct, but swapped anyway in order to fix
2367 other regs. But since we never swap any other reg away from
2368 its correct slot, this algorithm will converge. */
2373 /* Swap the reg at top of stack into the position it is
2374 supposed to be in, until the correct top of stack appears. */
2376 while (old->reg[old->top] != new->reg[new->top])
2378 for (reg = new->top; reg >= 0; reg--)
2379 if (new->reg[reg] == old->reg[old->top])
2385 emit_swap_insn (insn, old,
2386 FP_MODE_REG (old->reg[reg], DFmode));
2389 /* See if any regs remain incorrect. If so, bring an
2390 incorrect reg to the top of stack, and let the while loop
2393 for (reg = new->top; reg >= 0; reg--)
2394 if (new->reg[reg] != old->reg[reg])
2396 emit_swap_insn (insn, old,
2397 FP_MODE_REG (old->reg[reg], DFmode));
2402 /* At this point there must be no differences. */
2404 for (reg = old->top; reg >= 0; reg--)
2405 if (old->reg[reg] != new->reg[reg])
2410 current_block->end = PREV_INSN (insn);
2413 /* Print stack configuration. */
2416 print_stack (file, s)
2424 fprintf (file, "uninitialized\n");
2425 else if (s->top == -1)
2426 fprintf (file, "empty\n");
2431 for (i = 0; i <= s->top; ++i)
2432 fprintf (file, "%d ", s->reg[i]);
2433 fputs ("]\n", file);
2437 /* This function was doing life analysis. We now let the regular live
2438 code do it's job, so we only need to check some extra invariants
2439 that reg-stack expects. Primary among these being that all registers
2440 are initialized before use.
2442 The function returns true when code was emitted to CFG edges and
2443 commit_edge_insertions needs to be called. */
2446 convert_regs_entry ()
2452 FOR_EACH_BB_REVERSE (block)
2454 block_info bi = BLOCK_INFO (block);
2457 /* Set current register status at last instruction `uninitialized'. */
2458 bi->stack_in.top = -2;
2460 /* Copy live_at_end and live_at_start into temporaries. */
2461 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
2463 if (REGNO_REG_SET_P (block->global_live_at_end, reg))
2464 SET_HARD_REG_BIT (bi->out_reg_set, reg);
2465 if (REGNO_REG_SET_P (block->global_live_at_start, reg))
2466 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
2470 /* Load something into each stack register live at function entry.
2471 Such live registers can be caused by uninitialized variables or
2472 functions not returning values on all paths. In order to keep
2473 the push/pop code happy, and to not scrog the register stack, we
2474 must put something in these registers. Use a QNaN.
2476 Note that we are inserting converted code here. This code is
2477 never seen by the convert_regs pass. */
2479 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2481 basic_block block = e->dest;
2482 block_info bi = BLOCK_INFO (block);
2485 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2486 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2490 bi->stack_in.reg[++top] = reg;
2492 init = gen_rtx_SET (VOIDmode,
2493 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2495 insert_insn_on_edge (init, e);
2499 bi->stack_in.top = top;
2505 /* Construct the desired stack for function exit. This will either
2506 be `empty', or the function return value at top-of-stack. */
2509 convert_regs_exit ()
2511 int value_reg_low, value_reg_high;
2515 retvalue = stack_result (current_function_decl);
2516 value_reg_low = value_reg_high = -1;
2519 value_reg_low = REGNO (retvalue);
2520 value_reg_high = value_reg_low
2521 + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
2524 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2525 if (value_reg_low == -1)
2526 output_stack->top = -1;
2531 output_stack->top = value_reg_high - value_reg_low;
2532 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2534 output_stack->reg[value_reg_high - reg] = reg;
2535 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2540 /* Adjust the stack of this block on exit to match the stack of the
2541 target block, or copy stack info into the stack of the successor
2542 of the successor hasn't been processed yet. */
2544 compensate_edge (e, file)
2548 basic_block block = e->src, target = e->dest;
2549 block_info bi = BLOCK_INFO (block);
2550 struct stack_def regstack, tmpstack;
2551 stack target_stack = &BLOCK_INFO (target)->stack_in;
2554 current_block = block;
2555 regstack = bi->stack_out;
2557 fprintf (file, "Edge %d->%d: ", block->index, target->index);
2559 if (target_stack->top == -2)
2561 /* The target block hasn't had a stack order selected.
2562 We need merely ensure that no pops are needed. */
2563 for (reg = regstack.top; reg >= 0; --reg)
2564 if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg]))
2570 fprintf (file, "new block; copying stack position\n");
2572 /* change_stack kills values in regstack. */
2573 tmpstack = regstack;
2575 change_stack (block->end, &tmpstack, target_stack, EMIT_AFTER);
2580 fprintf (file, "new block; pops needed\n");
2584 if (target_stack->top == regstack.top)
2586 for (reg = target_stack->top; reg >= 0; --reg)
2587 if (target_stack->reg[reg] != regstack.reg[reg])
2593 fprintf (file, "no changes needed\n");
2600 fprintf (file, "correcting stack to ");
2601 print_stack (file, target_stack);
2605 /* Care for non-call EH edges specially. The normal return path have
2606 values in registers. These will be popped en masse by the unwind
2608 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH)
2609 target_stack->top = -1;
2611 /* Other calls may appear to have values live in st(0), but the
2612 abnormal return path will not have actually loaded the values. */
2613 else if (e->flags & EDGE_ABNORMAL_CALL)
2615 /* Assert that the lifetimes are as we expect -- one value
2616 live at st(0) on the end of the source block, and no
2617 values live at the beginning of the destination block. */
2620 CLEAR_HARD_REG_SET (tmp);
2621 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1);
2625 /* We are sure that there is st(0) live, otherwise we won't compensate.
2626 For complex return values, we may have st(1) live as well. */
2627 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG);
2628 if (TEST_HARD_REG_BIT (regstack.reg_set, FIRST_STACK_REG + 1))
2629 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG + 1);
2630 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
2634 target_stack->top = -1;
2637 /* It is better to output directly to the end of the block
2638 instead of to the edge, because emit_swap can do minimal
2639 insn scheduling. We can do this when there is only one
2640 edge out, and it is not abnormal. */
2641 else if (block->succ->succ_next == NULL && !(e->flags & EDGE_ABNORMAL))
2643 /* change_stack kills values in regstack. */
2644 tmpstack = regstack;
2646 change_stack (block->end, &tmpstack, target_stack,
2647 (GET_CODE (block->end) == JUMP_INSN
2648 ? EMIT_BEFORE : EMIT_AFTER));
2654 /* We don't support abnormal edges. Global takes care to
2655 avoid any live register across them, so we should never
2656 have to insert instructions on such edges. */
2657 if (e->flags & EDGE_ABNORMAL)
2660 current_block = NULL;
2663 /* ??? change_stack needs some point to emit insns after. */
2664 after = emit_note (NULL, NOTE_INSN_DELETED);
2666 tmpstack = regstack;
2667 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
2672 insert_insn_on_edge (seq, e);
2678 /* Convert stack register references in one block. */
2681 convert_regs_1 (file, block)
2685 struct stack_def regstack;
2686 block_info bi = BLOCK_INFO (block);
2689 edge e, beste = NULL;
2693 /* Find the edge we will copy stack from. It should be the most frequent
2694 one as it will get cheapest after compensation code is generated,
2695 if multiple such exists, take one with largest count, prefer critical
2696 one (as splitting critical edges is more expensive), or one with lowest
2697 index, to avoid random changes with different orders of the edges. */
2698 for (e = block->pred; e ; e = e->pred_next)
2700 if (e->flags & EDGE_DFS_BACK)
2704 else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e))
2706 else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e))
2708 else if (beste->count < e->count)
2710 else if (beste->count > e->count)
2712 else if ((EDGE_CRITICAL_P (e) != 0)
2713 != (EDGE_CRITICAL_P (beste) != 0))
2715 if (EDGE_CRITICAL_P (e))
2718 else if (e->src->index < beste->src->index)
2722 /* Entry block does have stack already initialized. */
2723 if (bi->stack_in.top == -2)
2724 inserted |= compensate_edge (beste, file);
2728 current_block = block;
2732 fprintf (file, "\nBasic block %d\nInput stack: ", block->index);
2733 print_stack (file, &bi->stack_in);
2736 /* Process all insns in this block. Keep track of NEXT so that we
2737 don't process insns emitted while substituting in INSN. */
2739 regstack = bi->stack_in;
2743 next = NEXT_INSN (insn);
2745 /* Ensure we have not missed a block boundary. */
2748 if (insn == block->end)
2751 /* Don't bother processing unless there is a stack reg
2752 mentioned or if it's a CALL_INSN. */
2753 if (stack_regs_mentioned (insn)
2754 || GET_CODE (insn) == CALL_INSN)
2758 fprintf (file, " insn %d input stack: ",
2760 print_stack (file, ®stack);
2762 subst_stack_regs (insn, ®stack);
2769 fprintf (file, "Expected live registers [");
2770 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2771 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2772 fprintf (file, " %d", reg);
2773 fprintf (file, " ]\nOutput stack: ");
2774 print_stack (file, ®stack);
2778 if (GET_CODE (insn) == JUMP_INSN)
2779 insn = PREV_INSN (insn);
2781 /* If the function is declared to return a value, but it returns one
2782 in only some cases, some registers might come live here. Emit
2783 necessary moves for them. */
2785 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2787 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2788 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2794 fprintf (file, "Emitting insn initializing reg %d\n",
2798 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode),
2800 insn = emit_insn_after (set, insn);
2801 subst_stack_regs (insn, ®stack);
2805 /* Something failed if the stack lives don't match. */
2806 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2809 bi->stack_out = regstack;
2811 /* Compensate the back edges, as those wasn't visited yet. */
2812 for (e = block->succ; e ; e = e->succ_next)
2814 if (e->flags & EDGE_DFS_BACK
2815 || (e->dest == EXIT_BLOCK_PTR))
2817 if (!BLOCK_INFO (e->dest)->done
2818 && e->dest != block)
2820 inserted |= compensate_edge (e, file);
2823 for (e = block->pred; e ; e = e->pred_next)
2825 if (e != beste && !(e->flags & EDGE_DFS_BACK)
2826 && e->src != ENTRY_BLOCK_PTR)
2828 if (!BLOCK_INFO (e->src)->done)
2830 inserted |= compensate_edge (e, file);
2837 /* Convert registers in all blocks reachable from BLOCK. */
2840 convert_regs_2 (file, block)
2844 basic_block *stack, *sp;
2847 stack = (basic_block *) xmalloc (sizeof (*stack) * n_basic_blocks);
2858 inserted |= convert_regs_1 (file, block);
2859 BLOCK_INFO (block)->done = 1;
2861 for (e = block->succ; e ; e = e->succ_next)
2862 if (! (e->flags & EDGE_DFS_BACK))
2864 BLOCK_INFO (e->dest)->predecessors--;
2865 if (!BLOCK_INFO (e->dest)->predecessors)
2869 while (sp != stack);
2874 /* Traverse all basic blocks in a function, converting the register
2875 references in each insn from the "flat" register file that gcc uses,
2876 to the stack-like registers the 387 uses. */
2886 /* Initialize uninitialized registers on function entry. */
2887 inserted = convert_regs_entry ();
2889 /* Construct the desired stack for function exit. */
2890 convert_regs_exit ();
2891 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
2893 /* ??? Future: process inner loops first, and give them arbitrary
2894 initial stacks which emit_swap_insn can modify. This ought to
2895 prevent double fxch that aften appears at the head of a loop. */
2897 /* Process all blocks reachable from all entry points. */
2898 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2899 inserted |= convert_regs_2 (file, e->dest);
2901 /* ??? Process all unreachable blocks. Though there's no excuse
2902 for keeping these even when not optimizing. */
2905 block_info bi = BLOCK_INFO (b);
2911 /* Create an arbitrary input stack. */
2912 bi->stack_in.top = -1;
2913 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2914 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2915 bi->stack_in.reg[++bi->stack_in.top] = reg;
2917 inserted |= convert_regs_2 (file, b);
2921 fixup_abnormal_edges ();
2923 commit_edge_insertions ();
2930 #endif /* STACK_REGS */
2932 #include "gt-reg-stack.h"