1 /* Decompose multiword subregs.
2 Copyright (C) 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
3 Contributed by Richard Henderson <rth@redhat.com>
4 Ian Lance Taylor <iant@google.com>
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
31 #include "insn-config.h"
33 #include "basic-block.h"
40 #include "tree-pass.h"
43 #ifdef STACK_GROWS_DOWNWARD
44 # undef STACK_GROWS_DOWNWARD
45 # define STACK_GROWS_DOWNWARD 1
47 # define STACK_GROWS_DOWNWARD 0
51 DEF_VEC_ALLOC_P (bitmap,heap);
53 /* Decompose multi-word pseudo-registers into individual
54 pseudo-registers when possible. This is possible when all the uses
55 of a multi-word register are via SUBREG, or are copies of the
56 register to another location. Breaking apart the register permits
57 more CSE and permits better register allocation. */
59 /* Bit N in this bitmap is set if regno N is used in a context in
60 which we can decompose it. */
61 static bitmap decomposable_context;
63 /* Bit N in this bitmap is set if regno N is used in a context in
64 which it can not be decomposed. */
65 static bitmap non_decomposable_context;
67 /* Bit N in this bitmap is set if regno N is used in a subreg
68 which changes the mode but not the size. This typically happens
69 when the register accessed as a floating-point value; we want to
70 avoid generating accesses to its subwords in integer modes. */
71 static bitmap subreg_context;
73 /* Bit N in the bitmap in element M of this array is set if there is a
74 copy from reg M to reg N. */
75 static VEC(bitmap,heap) *reg_copy_graph;
77 /* Return whether X is a simple object which we can take a word_mode
81 simple_move_operand (rtx x)
83 if (GET_CODE (x) == SUBREG)
89 if (GET_CODE (x) == LABEL_REF
90 || GET_CODE (x) == SYMBOL_REF
91 || GET_CODE (x) == HIGH
92 || GET_CODE (x) == CONST)
96 && (MEM_VOLATILE_P (x)
97 || mode_dependent_address_p (XEXP (x, 0))))
103 /* If INSN is a single set between two objects, return the single set.
104 Such an insn can always be decomposed. INSN should have been
105 passed to recog and extract_insn before this is called. */
108 simple_move (rtx insn)
112 enum machine_mode mode;
114 if (recog_data.n_operands != 2)
117 set = single_set (insn);
122 if (x != recog_data.operand[0] && x != recog_data.operand[1])
124 if (!simple_move_operand (x))
128 if (x != recog_data.operand[0] && x != recog_data.operand[1])
130 /* For the src we can handle ASM_OPERANDS, and it is beneficial for
131 things like x86 rdtsc which returns a DImode value. */
132 if (GET_CODE (x) != ASM_OPERANDS
133 && !simple_move_operand (x))
136 /* We try to decompose in integer modes, to avoid generating
137 inefficient code copying between integer and floating point
138 registers. That means that we can't decompose if this is a
139 non-integer mode for which there is no integer mode of the same
141 mode = GET_MODE (SET_SRC (set));
142 if (!SCALAR_INT_MODE_P (mode)
143 && (mode_for_size (GET_MODE_SIZE (mode) * BITS_PER_UNIT, MODE_INT, 0)
147 /* Reject PARTIAL_INT modes. They are used for processor specific
148 purposes and it's probably best not to tamper with them. */
149 if (GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
155 /* If SET is a copy from one multi-word pseudo-register to another,
156 record that in reg_copy_graph. Return whether it is such a
160 find_pseudo_copy (rtx set)
162 rtx dest = SET_DEST (set);
163 rtx src = SET_SRC (set);
167 if (!REG_P (dest) || !REG_P (src))
172 if (HARD_REGISTER_NUM_P (rd) || HARD_REGISTER_NUM_P (rs))
175 if (GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD)
178 b = VEC_index (bitmap, reg_copy_graph, rs);
181 b = BITMAP_ALLOC (NULL);
182 VEC_replace (bitmap, reg_copy_graph, rs, b);
185 bitmap_set_bit (b, rd);
190 /* Look through the registers in DECOMPOSABLE_CONTEXT. For each case
191 where they are copied to another register, add the register to
192 which they are copied to DECOMPOSABLE_CONTEXT. Use
193 NON_DECOMPOSABLE_CONTEXT to limit this--we don't bother to track
194 copies of registers which are in NON_DECOMPOSABLE_CONTEXT. */
197 propagate_pseudo_copies (void)
199 bitmap queue, propagate;
201 queue = BITMAP_ALLOC (NULL);
202 propagate = BITMAP_ALLOC (NULL);
204 bitmap_copy (queue, decomposable_context);
207 bitmap_iterator iter;
210 bitmap_clear (propagate);
212 EXECUTE_IF_SET_IN_BITMAP (queue, 0, i, iter)
214 bitmap b = VEC_index (bitmap, reg_copy_graph, i);
216 bitmap_ior_and_compl_into (propagate, b, non_decomposable_context);
219 bitmap_and_compl (queue, propagate, decomposable_context);
220 bitmap_ior_into (decomposable_context, propagate);
222 while (!bitmap_empty_p (queue));
225 BITMAP_FREE (propagate);
228 /* A pointer to one of these values is passed to
229 find_decomposable_subregs via for_each_rtx. */
231 enum classify_move_insn
233 /* Not a simple move from one location to another. */
235 /* A simple move from one pseudo-register to another. */
236 SIMPLE_PSEUDO_REG_MOVE,
237 /* A simple move involving a non-pseudo-register. */
241 /* This is called via for_each_rtx. If we find a SUBREG which we
242 could use to decompose a pseudo-register, set a bit in
243 DECOMPOSABLE_CONTEXT. If we find an unadorned register which is
244 not a simple pseudo-register copy, DATA will point at the type of
245 move, and we set a bit in DECOMPOSABLE_CONTEXT or
246 NON_DECOMPOSABLE_CONTEXT as appropriate. */
249 find_decomposable_subregs (rtx *px, void *data)
251 enum classify_move_insn *pcmi = (enum classify_move_insn *) data;
257 if (GET_CODE (x) == SUBREG)
259 rtx inner = SUBREG_REG (x);
260 unsigned int regno, outer_size, inner_size, outer_words, inner_words;
265 regno = REGNO (inner);
266 if (HARD_REGISTER_NUM_P (regno))
269 outer_size = GET_MODE_SIZE (GET_MODE (x));
270 inner_size = GET_MODE_SIZE (GET_MODE (inner));
271 outer_words = (outer_size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
272 inner_words = (inner_size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
274 /* We only try to decompose single word subregs of multi-word
275 registers. When we find one, we return -1 to avoid iterating
276 over the inner register.
278 ??? This doesn't allow, e.g., DImode subregs of TImode values
279 on 32-bit targets. We would need to record the way the
280 pseudo-register was used, and only decompose if all the uses
281 were the same number and size of pieces. Hopefully this
282 doesn't happen much. */
284 if (outer_words == 1 && inner_words > 1)
286 bitmap_set_bit (decomposable_context, regno);
290 /* If this is a cast from one mode to another, where the modes
291 have the same size, and they are not tieable, then mark this
292 register as non-decomposable. If we decompose it we are
293 likely to mess up whatever the backend is trying to do. */
295 && outer_size == inner_size
296 && !MODES_TIEABLE_P (GET_MODE (x), GET_MODE (inner)))
298 bitmap_set_bit (non_decomposable_context, regno);
299 bitmap_set_bit (subreg_context, regno);
307 /* We will see an outer SUBREG before we see the inner REG, so
308 when we see a plain REG here it means a direct reference to
311 If this is not a simple copy from one location to another,
312 then we can not decompose this register. If this is a simple
313 copy from one pseudo-register to another, and the mode is right
314 then we mark the register as decomposable.
315 Otherwise we don't say anything about this register --
316 it could be decomposed, but whether that would be
317 profitable depends upon how it is used elsewhere.
319 We only set bits in the bitmap for multi-word
320 pseudo-registers, since those are the only ones we care about
321 and it keeps the size of the bitmaps down. */
324 if (!HARD_REGISTER_NUM_P (regno)
325 && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
329 case NOT_SIMPLE_MOVE:
330 bitmap_set_bit (non_decomposable_context, regno);
332 case SIMPLE_PSEUDO_REG_MOVE:
333 if (MODES_TIEABLE_P (GET_MODE (x), word_mode))
334 bitmap_set_bit (decomposable_context, regno);
345 enum classify_move_insn cmi_mem = NOT_SIMPLE_MOVE;
347 /* Any registers used in a MEM do not participate in a
348 SIMPLE_MOVE or SIMPLE_PSEUDO_REG_MOVE. Do our own recursion
349 here, and return -1 to block the parent's recursion. */
350 for_each_rtx (&XEXP (x, 0), find_decomposable_subregs, &cmi_mem);
357 /* Decompose REGNO into word-sized components. We smash the REG node
358 in place. This ensures that (1) something goes wrong quickly if we
359 fail to make some replacement, and (2) the debug information inside
360 the symbol table is automatically kept up to date. */
363 decompose_register (unsigned int regno)
366 unsigned int words, i;
369 reg = regno_reg_rtx[regno];
371 regno_reg_rtx[regno] = NULL_RTX;
373 words = GET_MODE_SIZE (GET_MODE (reg));
374 words = (words + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
376 v = rtvec_alloc (words);
377 for (i = 0; i < words; ++i)
378 RTVEC_ELT (v, i) = gen_reg_rtx_offset (reg, word_mode, i * UNITS_PER_WORD);
380 PUT_CODE (reg, CONCATN);
385 fprintf (dump_file, "; Splitting reg %u ->", regno);
386 for (i = 0; i < words; ++i)
387 fprintf (dump_file, " %u", REGNO (XVECEXP (reg, 0, i)));
388 fputc ('\n', dump_file);
392 /* Get a SUBREG of a CONCATN. */
395 simplify_subreg_concatn (enum machine_mode outermode, rtx op,
398 unsigned int inner_size;
399 enum machine_mode innermode, partmode;
401 unsigned int final_offset;
403 gcc_assert (GET_CODE (op) == CONCATN);
404 gcc_assert (byte % GET_MODE_SIZE (outermode) == 0);
406 innermode = GET_MODE (op);
407 gcc_assert (byte < GET_MODE_SIZE (innermode));
408 gcc_assert (GET_MODE_SIZE (outermode) <= GET_MODE_SIZE (innermode));
410 inner_size = GET_MODE_SIZE (innermode) / XVECLEN (op, 0);
411 part = XVECEXP (op, 0, byte / inner_size);
412 partmode = GET_MODE (part);
414 /* VECTOR_CSTs in debug expressions are expanded into CONCATN instead of
415 regular CONST_VECTORs. They have vector or integer modes, depending
416 on the capabilities of the target. Cope with them. */
417 if (partmode == VOIDmode && VECTOR_MODE_P (innermode))
418 partmode = GET_MODE_INNER (innermode);
419 else if (partmode == VOIDmode)
421 enum mode_class mclass = GET_MODE_CLASS (innermode);
422 partmode = mode_for_size (inner_size * BITS_PER_UNIT, mclass, 0);
425 final_offset = byte % inner_size;
426 if (final_offset + GET_MODE_SIZE (outermode) > inner_size)
429 return simplify_gen_subreg (outermode, part, partmode, final_offset);
432 /* Wrapper around simplify_gen_subreg which handles CONCATN. */
435 simplify_gen_subreg_concatn (enum machine_mode outermode, rtx op,
436 enum machine_mode innermode, unsigned int byte)
440 /* We have to handle generating a SUBREG of a SUBREG of a CONCATN.
441 If OP is a SUBREG of a CONCATN, then it must be a simple mode
442 change with the same size and offset 0, or it must extract a
443 part. We shouldn't see anything else here. */
444 if (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == CONCATN)
448 if ((GET_MODE_SIZE (GET_MODE (op))
449 == GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))))
450 && SUBREG_BYTE (op) == 0)
451 return simplify_gen_subreg_concatn (outermode, SUBREG_REG (op),
452 GET_MODE (SUBREG_REG (op)), byte);
454 op2 = simplify_subreg_concatn (GET_MODE (op), SUBREG_REG (op),
458 /* We don't handle paradoxical subregs here. */
459 gcc_assert (GET_MODE_SIZE (outermode)
460 <= GET_MODE_SIZE (GET_MODE (op)));
461 gcc_assert (GET_MODE_SIZE (GET_MODE (op))
462 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))));
463 op2 = simplify_subreg_concatn (outermode, SUBREG_REG (op),
464 byte + SUBREG_BYTE (op));
465 gcc_assert (op2 != NULL_RTX);
470 gcc_assert (op != NULL_RTX);
471 gcc_assert (innermode == GET_MODE (op));
474 if (GET_CODE (op) == CONCATN)
475 return simplify_subreg_concatn (outermode, op, byte);
477 ret = simplify_gen_subreg (outermode, op, innermode, byte);
479 /* If we see an insn like (set (reg:DI) (subreg:DI (reg:SI) 0)) then
480 resolve_simple_move will ask for the high part of the paradoxical
481 subreg, which does not have a value. Just return a zero. */
483 && GET_CODE (op) == SUBREG
484 && SUBREG_BYTE (op) == 0
485 && (GET_MODE_SIZE (innermode)
486 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op)))))
487 return CONST0_RTX (outermode);
489 gcc_assert (ret != NULL_RTX);
493 /* Return whether we should resolve X into the registers into which it
497 resolve_reg_p (rtx x)
499 return GET_CODE (x) == CONCATN;
502 /* Return whether X is a SUBREG of a register which we need to
506 resolve_subreg_p (rtx x)
508 if (GET_CODE (x) != SUBREG)
510 return resolve_reg_p (SUBREG_REG (x));
513 /* This is called via for_each_rtx. Look for SUBREGs which need to be
517 resolve_subreg_use (rtx *px, void *data)
519 rtx insn = (rtx) data;
525 if (resolve_subreg_p (x))
527 x = simplify_subreg_concatn (GET_MODE (x), SUBREG_REG (x),
530 /* It is possible for a note to contain a reference which we can
531 decompose. In this case, return 1 to the caller to indicate
532 that the note must be removed. */
539 validate_change (insn, px, x, 1);
543 if (resolve_reg_p (x))
545 /* Return 1 to the caller to indicate that we found a direct
546 reference to a register which is being decomposed. This can
547 happen inside notes, multiword shift or zero-extend
555 /* This is called via for_each_rtx. Look for SUBREGs which can be
556 decomposed and decomposed REGs that need copying. */
559 adjust_decomposed_uses (rtx *px, void *data ATTRIBUTE_UNUSED)
566 if (resolve_subreg_p (x))
568 x = simplify_subreg_concatn (GET_MODE (x), SUBREG_REG (x),
577 if (resolve_reg_p (x))
583 /* Resolve any decomposed registers which appear in register notes on
587 resolve_reg_notes (rtx insn)
591 note = find_reg_equal_equiv_note (insn);
594 int old_count = num_validated_changes ();
595 if (for_each_rtx (&XEXP (note, 0), resolve_subreg_use, NULL))
596 remove_note (insn, note);
598 if (old_count != num_validated_changes ())
599 df_notes_rescan (insn);
602 pnote = ®_NOTES (insn);
603 while (*pnote != NULL_RTX)
608 switch (REG_NOTE_KIND (note))
612 if (resolve_reg_p (XEXP (note, 0)))
621 *pnote = XEXP (note, 1);
623 pnote = &XEXP (note, 1);
627 /* Return whether X can be decomposed into subwords. */
630 can_decompose_p (rtx x)
634 unsigned int regno = REGNO (x);
636 if (HARD_REGISTER_NUM_P (regno))
638 unsigned int byte, num_bytes;
640 num_bytes = GET_MODE_SIZE (GET_MODE (x));
641 for (byte = 0; byte < num_bytes; byte += UNITS_PER_WORD)
642 if (simplify_subreg_regno (regno, GET_MODE (x), byte, word_mode) < 0)
647 return !bitmap_bit_p (subreg_context, regno);
653 /* Decompose the registers used in a simple move SET within INSN. If
654 we don't change anything, return INSN, otherwise return the start
655 of the sequence of moves. */
658 resolve_simple_move (rtx set, rtx insn)
660 rtx src, dest, real_dest, insns;
661 enum machine_mode orig_mode, dest_mode;
666 dest = SET_DEST (set);
667 orig_mode = GET_MODE (dest);
669 words = (GET_MODE_SIZE (orig_mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
675 /* We have to handle copying from a SUBREG of a decomposed reg where
676 the SUBREG is larger than word size. Rather than assume that we
677 can take a word_mode SUBREG of the destination, we copy to a new
678 register and then copy that to the destination. */
680 real_dest = NULL_RTX;
682 if (GET_CODE (src) == SUBREG
683 && resolve_reg_p (SUBREG_REG (src))
684 && (SUBREG_BYTE (src) != 0
685 || (GET_MODE_SIZE (orig_mode)
686 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))))))
689 dest = gen_reg_rtx (orig_mode);
690 if (REG_P (real_dest))
691 REG_ATTRS (dest) = REG_ATTRS (real_dest);
694 /* Similarly if we are copying to a SUBREG of a decomposed reg where
695 the SUBREG is larger than word size. */
697 if (GET_CODE (dest) == SUBREG
698 && resolve_reg_p (SUBREG_REG (dest))
699 && (SUBREG_BYTE (dest) != 0
700 || (GET_MODE_SIZE (orig_mode)
701 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))))
703 rtx reg, minsn, smove;
705 reg = gen_reg_rtx (orig_mode);
706 minsn = emit_move_insn (reg, src);
707 smove = single_set (minsn);
708 gcc_assert (smove != NULL_RTX);
709 resolve_simple_move (smove, minsn);
713 /* If we didn't have any big SUBREGS of decomposed registers, and
714 neither side of the move is a register we are decomposing, then
715 we don't have to do anything here. */
717 if (src == SET_SRC (set)
718 && dest == SET_DEST (set)
719 && !resolve_reg_p (src)
720 && !resolve_subreg_p (src)
721 && !resolve_reg_p (dest)
722 && !resolve_subreg_p (dest))
728 /* It's possible for the code to use a subreg of a decomposed
729 register while forming an address. We need to handle that before
730 passing the address to emit_move_insn. We pass NULL_RTX as the
731 insn parameter to resolve_subreg_use because we can not validate
733 if (MEM_P (src) || MEM_P (dest))
738 for_each_rtx (&XEXP (src, 0), resolve_subreg_use, NULL_RTX);
740 for_each_rtx (&XEXP (dest, 0), resolve_subreg_use, NULL_RTX);
741 acg = apply_change_group ();
745 /* If SRC is a register which we can't decompose, or has side
746 effects, we need to move via a temporary register. */
748 if (!can_decompose_p (src)
749 || side_effects_p (src)
750 || GET_CODE (src) == ASM_OPERANDS)
754 reg = gen_reg_rtx (orig_mode);
755 emit_move_insn (reg, src);
759 /* If DEST is a register which we can't decompose, or has side
760 effects, we need to first move to a temporary register. We
761 handle the common case of pushing an operand directly. We also
762 go through a temporary register if it holds a floating point
763 value. This gives us better code on systems which can't move
764 data easily between integer and floating point registers. */
766 dest_mode = orig_mode;
767 pushing = push_operand (dest, dest_mode);
768 if (!can_decompose_p (dest)
769 || (side_effects_p (dest) && !pushing)
770 || (!SCALAR_INT_MODE_P (dest_mode)
771 && !resolve_reg_p (dest)
772 && !resolve_subreg_p (dest)))
774 if (real_dest == NULL_RTX)
776 if (!SCALAR_INT_MODE_P (dest_mode))
778 dest_mode = mode_for_size (GET_MODE_SIZE (dest_mode) * BITS_PER_UNIT,
780 gcc_assert (dest_mode != BLKmode);
782 dest = gen_reg_rtx (dest_mode);
783 if (REG_P (real_dest))
784 REG_ATTRS (dest) = REG_ATTRS (real_dest);
789 unsigned int i, j, jinc;
791 gcc_assert (GET_MODE_SIZE (orig_mode) % UNITS_PER_WORD == 0);
792 gcc_assert (GET_CODE (XEXP (dest, 0)) != PRE_MODIFY);
793 gcc_assert (GET_CODE (XEXP (dest, 0)) != POST_MODIFY);
795 if (WORDS_BIG_ENDIAN == STACK_GROWS_DOWNWARD)
806 for (i = 0; i < words; ++i, j += jinc)
810 temp = copy_rtx (XEXP (dest, 0));
811 temp = adjust_automodify_address_nv (dest, word_mode, temp,
813 emit_move_insn (temp,
814 simplify_gen_subreg_concatn (word_mode, src,
816 j * UNITS_PER_WORD));
823 if (REG_P (dest) && !HARD_REGISTER_NUM_P (REGNO (dest)))
826 for (i = 0; i < words; ++i)
827 emit_move_insn (simplify_gen_subreg_concatn (word_mode, dest,
830 simplify_gen_subreg_concatn (word_mode, src,
832 i * UNITS_PER_WORD));
835 if (real_dest != NULL_RTX)
837 rtx mdest, minsn, smove;
839 if (dest_mode == orig_mode)
842 mdest = simplify_gen_subreg (orig_mode, dest, GET_MODE (dest), 0);
843 minsn = emit_move_insn (real_dest, mdest);
845 smove = single_set (minsn);
846 gcc_assert (smove != NULL_RTX);
848 resolve_simple_move (smove, minsn);
851 insns = get_insns ();
854 copy_reg_eh_region_note_forward (insn, insns, NULL_RTX);
856 emit_insn_before (insns, insn);
863 /* Change a CLOBBER of a decomposed register into a CLOBBER of the
864 component registers. Return whether we changed something. */
867 resolve_clobber (rtx pat, rtx insn)
870 enum machine_mode orig_mode;
871 unsigned int words, i;
875 if (!resolve_reg_p (reg) && !resolve_subreg_p (reg))
878 orig_mode = GET_MODE (reg);
879 words = GET_MODE_SIZE (orig_mode);
880 words = (words + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
882 ret = validate_change (NULL_RTX, &XEXP (pat, 0),
883 simplify_gen_subreg_concatn (word_mode, reg,
886 df_insn_rescan (insn);
887 gcc_assert (ret != 0);
889 for (i = words - 1; i > 0; --i)
893 x = simplify_gen_subreg_concatn (word_mode, reg, orig_mode,
895 x = gen_rtx_CLOBBER (VOIDmode, x);
896 emit_insn_after (x, insn);
899 resolve_reg_notes (insn);
904 /* A USE of a decomposed register is no longer meaningful. Return
905 whether we changed something. */
908 resolve_use (rtx pat, rtx insn)
910 if (resolve_reg_p (XEXP (pat, 0)) || resolve_subreg_p (XEXP (pat, 0)))
916 resolve_reg_notes (insn);
921 /* A VAR_LOCATION can be simplified. */
924 resolve_debug (rtx insn)
926 for_each_rtx (&PATTERN (insn), adjust_decomposed_uses, NULL_RTX);
928 df_insn_rescan (insn);
930 resolve_reg_notes (insn);
933 /* Checks if INSN is a decomposable multiword-shift or zero-extend and
934 sets the decomposable_context bitmap accordingly. A non-zero value
935 is returned if a decomposable insn has been found. */
938 find_decomposable_shift_zext (rtx insn)
944 set = single_set (insn);
949 if (GET_CODE (op) != ASHIFT
950 && GET_CODE (op) != LSHIFTRT
951 && GET_CODE (op) != ZERO_EXTEND)
954 op_operand = XEXP (op, 0);
955 if (!REG_P (SET_DEST (set)) || !REG_P (op_operand)
956 || HARD_REGISTER_NUM_P (REGNO (SET_DEST (set)))
957 || HARD_REGISTER_NUM_P (REGNO (op_operand))
958 || !SCALAR_INT_MODE_P (GET_MODE (op)))
961 if (GET_CODE (op) == ZERO_EXTEND)
963 if (GET_MODE (op_operand) != word_mode
964 || GET_MODE_BITSIZE (GET_MODE (op)) != 2 * BITS_PER_WORD)
967 else /* left or right shift */
969 if (!CONST_INT_P (XEXP (op, 1))
970 || INTVAL (XEXP (op, 1)) < BITS_PER_WORD
971 || GET_MODE_BITSIZE (GET_MODE (op_operand)) != 2 * BITS_PER_WORD)
975 bitmap_set_bit (decomposable_context, REGNO (SET_DEST (set)));
977 if (GET_CODE (op) != ZERO_EXTEND)
978 bitmap_set_bit (decomposable_context, REGNO (op_operand));
983 /* Decompose a more than word wide shift (in INSN) of a multiword
984 pseudo or a multiword zero-extend of a wordmode pseudo into a move
985 and 'set to zero' insn. Return a pointer to the new insn when a
986 replacement was done. */
989 resolve_shift_zext (rtx insn)
995 rtx src_reg, dest_reg, dest_zero;
996 int src_reg_num, dest_reg_num, offset1, offset2, src_offset;
998 set = single_set (insn);
1003 if (GET_CODE (op) != ASHIFT
1004 && GET_CODE (op) != LSHIFTRT
1005 && GET_CODE (op) != ZERO_EXTEND)
1008 op_operand = XEXP (op, 0);
1010 if (!resolve_reg_p (SET_DEST (set)) && !resolve_reg_p (op_operand))
1013 /* src_reg_num is the number of the word mode register which we
1014 are operating on. For a left shift and a zero_extend on little
1015 endian machines this is register 0. */
1016 src_reg_num = GET_CODE (op) == LSHIFTRT ? 1 : 0;
1018 if (WORDS_BIG_ENDIAN
1019 && GET_MODE_SIZE (GET_MODE (op_operand)) > UNITS_PER_WORD)
1020 src_reg_num = 1 - src_reg_num;
1022 if (GET_CODE (op) == ZERO_EXTEND)
1023 dest_reg_num = WORDS_BIG_ENDIAN ? 1 : 0;
1025 dest_reg_num = 1 - src_reg_num;
1027 offset1 = UNITS_PER_WORD * dest_reg_num;
1028 offset2 = UNITS_PER_WORD * (1 - dest_reg_num);
1029 src_offset = UNITS_PER_WORD * src_reg_num;
1033 dest_reg = simplify_gen_subreg_concatn (word_mode, SET_DEST (set),
1034 GET_MODE (SET_DEST (set)),
1036 dest_zero = simplify_gen_subreg_concatn (word_mode, SET_DEST (set),
1037 GET_MODE (SET_DEST (set)),
1039 src_reg = simplify_gen_subreg_concatn (word_mode, op_operand,
1040 GET_MODE (op_operand),
1042 if (GET_CODE (op) != ZERO_EXTEND)
1044 int shift_count = INTVAL (XEXP (op, 1));
1045 if (shift_count > BITS_PER_WORD)
1046 src_reg = expand_shift (GET_CODE (op) == ASHIFT ?
1047 LSHIFT_EXPR : RSHIFT_EXPR,
1049 shift_count - BITS_PER_WORD,
1053 if (dest_reg != src_reg)
1054 emit_move_insn (dest_reg, src_reg);
1055 emit_move_insn (dest_zero, CONST0_RTX (word_mode));
1056 insns = get_insns ();
1060 emit_insn_before (insns, insn);
1065 fprintf (dump_file, "; Replacing insn: %d with insns: ", INSN_UID (insn));
1066 for (in = insns; in != insn; in = NEXT_INSN (in))
1067 fprintf (dump_file, "%d ", INSN_UID (in));
1068 fprintf (dump_file, "\n");
1075 /* Look for registers which are always accessed via word-sized SUBREGs
1076 or via copies. Decompose these registers into several word-sized
1077 pseudo-registers. */
1080 decompose_multiword_subregs (void)
1086 df_set_flags (DF_DEFER_INSN_RESCAN);
1088 max = max_reg_num ();
1090 /* First see if there are any multi-word pseudo-registers. If there
1091 aren't, there is nothing we can do. This should speed up this
1092 pass in the normal case, since it should be faster than scanning
1097 for (i = FIRST_PSEUDO_REGISTER; i < max; ++i)
1099 if (regno_reg_rtx[i] != NULL
1100 && GET_MODE_SIZE (GET_MODE (regno_reg_rtx[i])) > UNITS_PER_WORD)
1110 /* FIXME: When the dataflow branch is merged, we can change this
1111 code to look for each multi-word pseudo-register and to find each
1112 insn which sets or uses that register. That should be faster
1113 than scanning all the insns. */
1115 decomposable_context = BITMAP_ALLOC (NULL);
1116 non_decomposable_context = BITMAP_ALLOC (NULL);
1117 subreg_context = BITMAP_ALLOC (NULL);
1119 reg_copy_graph = VEC_alloc (bitmap, heap, max);
1120 VEC_safe_grow (bitmap, heap, reg_copy_graph, max);
1121 memset (VEC_address (bitmap, reg_copy_graph), 0, sizeof (bitmap) * max);
1127 FOR_BB_INSNS (bb, insn)
1130 enum classify_move_insn cmi;
1134 || GET_CODE (PATTERN (insn)) == CLOBBER
1135 || GET_CODE (PATTERN (insn)) == USE)
1138 if (find_decomposable_shift_zext (insn))
1141 recog_memoized (insn);
1142 extract_insn (insn);
1144 set = simple_move (insn);
1147 cmi = NOT_SIMPLE_MOVE;
1150 if (find_pseudo_copy (set))
1151 cmi = SIMPLE_PSEUDO_REG_MOVE;
1156 n = recog_data.n_operands;
1157 for (i = 0; i < n; ++i)
1159 for_each_rtx (&recog_data.operand[i],
1160 find_decomposable_subregs,
1163 /* We handle ASM_OPERANDS as a special case to support
1164 things like x86 rdtsc which returns a DImode value.
1165 We can decompose the output, which will certainly be
1166 operand 0, but not the inputs. */
1168 if (cmi == SIMPLE_MOVE
1169 && GET_CODE (SET_SRC (set)) == ASM_OPERANDS)
1171 gcc_assert (i == 0);
1172 cmi = NOT_SIMPLE_MOVE;
1178 bitmap_and_compl_into (decomposable_context, non_decomposable_context);
1179 if (!bitmap_empty_p (decomposable_context))
1183 sbitmap_iterator sbi;
1184 bitmap_iterator iter;
1187 propagate_pseudo_copies ();
1189 sub_blocks = sbitmap_alloc (last_basic_block);
1190 sbitmap_zero (sub_blocks);
1192 EXECUTE_IF_SET_IN_BITMAP (decomposable_context, 0, regno, iter)
1193 decompose_register (regno);
1199 FOR_BB_INSNS (bb, insn)
1206 pat = PATTERN (insn);
1207 if (GET_CODE (pat) == CLOBBER)
1208 resolve_clobber (pat, insn);
1209 else if (GET_CODE (pat) == USE)
1210 resolve_use (pat, insn);
1211 else if (DEBUG_INSN_P (insn))
1212 resolve_debug (insn);
1218 recog_memoized (insn);
1219 extract_insn (insn);
1221 set = simple_move (insn);
1224 rtx orig_insn = insn;
1225 bool cfi = control_flow_insn_p (insn);
1227 /* We can end up splitting loads to multi-word pseudos
1228 into separate loads to machine word size pseudos.
1229 When this happens, we first had one load that can
1230 throw, and after resolve_simple_move we'll have a
1231 bunch of loads (at least two). All those loads may
1232 trap if we can have non-call exceptions, so they
1233 all will end the current basic block. We split the
1234 block after the outer loop over all insns, but we
1235 make sure here that we will be able to split the
1236 basic block and still produce the correct control
1237 flow graph for it. */
1239 || (cfun->can_throw_non_call_exceptions
1240 && can_throw_internal (insn)));
1242 insn = resolve_simple_move (set, insn);
1243 if (insn != orig_insn)
1245 recog_memoized (insn);
1246 extract_insn (insn);
1249 SET_BIT (sub_blocks, bb->index);
1254 rtx decomposed_shift;
1256 decomposed_shift = resolve_shift_zext (insn);
1257 if (decomposed_shift != NULL_RTX)
1259 insn = decomposed_shift;
1260 recog_memoized (insn);
1261 extract_insn (insn);
1265 for (i = recog_data.n_operands - 1; i >= 0; --i)
1266 for_each_rtx (recog_data.operand_loc[i],
1270 resolve_reg_notes (insn);
1272 if (num_validated_changes () > 0)
1274 for (i = recog_data.n_dups - 1; i >= 0; --i)
1276 rtx *pl = recog_data.dup_loc[i];
1277 int dup_num = recog_data.dup_num[i];
1278 rtx *px = recog_data.operand_loc[dup_num];
1280 validate_unshare_change (insn, pl, *px, 1);
1283 i = apply_change_group ();
1290 /* If we had insns to split that caused control flow insns in the middle
1291 of a basic block, split those blocks now. Note that we only handle
1292 the case where splitting a load has caused multiple possibly trapping
1294 EXECUTE_IF_SET_IN_SBITMAP (sub_blocks, 0, i, sbi)
1299 bb = BASIC_BLOCK (i);
1300 insn = BB_HEAD (bb);
1305 if (control_flow_insn_p (insn))
1307 /* Split the block after insn. There will be a fallthru
1308 edge, which is OK so we keep it. We have to create the
1309 exception edges ourselves. */
1310 fallthru = split_block (bb, insn);
1311 rtl_make_eh_edge (NULL, bb, BB_END (bb));
1312 bb = fallthru->dest;
1313 insn = BB_HEAD (bb);
1316 insn = NEXT_INSN (insn);
1320 sbitmap_free (sub_blocks);
1327 FOR_EACH_VEC_ELT (bitmap, reg_copy_graph, i, b)
1332 VEC_free (bitmap, heap, reg_copy_graph);
1334 BITMAP_FREE (decomposable_context);
1335 BITMAP_FREE (non_decomposable_context);
1336 BITMAP_FREE (subreg_context);
1339 /* Gate function for lower subreg pass. */
1342 gate_handle_lower_subreg (void)
1344 return flag_split_wide_types != 0;
1347 /* Implement first lower subreg pass. */
1350 rest_of_handle_lower_subreg (void)
1352 decompose_multiword_subregs ();
1356 /* Implement second lower subreg pass. */
1359 rest_of_handle_lower_subreg2 (void)
1361 decompose_multiword_subregs ();
1365 struct rtl_opt_pass pass_lower_subreg =
1369 "subreg1", /* name */
1370 gate_handle_lower_subreg, /* gate */
1371 rest_of_handle_lower_subreg, /* execute */
1374 0, /* static_pass_number */
1375 TV_LOWER_SUBREG, /* tv_id */
1376 0, /* properties_required */
1377 0, /* properties_provided */
1378 0, /* properties_destroyed */
1379 0, /* todo_flags_start */
1381 TODO_verify_flow /* todo_flags_finish */
1385 struct rtl_opt_pass pass_lower_subreg2 =
1389 "subreg2", /* name */
1390 gate_handle_lower_subreg, /* gate */
1391 rest_of_handle_lower_subreg2, /* execute */
1394 0, /* static_pass_number */
1395 TV_LOWER_SUBREG, /* tv_id */
1396 0, /* properties_required */
1397 0, /* properties_provided */
1398 0, /* properties_destroyed */
1399 0, /* todo_flags_start */
1400 TODO_df_finish | TODO_verify_rtl_sharing |
1402 TODO_verify_flow /* todo_flags_finish */