1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-99, 2000 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
44 #include "basic-block.h"
45 #include "insn-config.h"
46 #include "insn-flags.h"
48 #include "hard-reg-set.h"
56 /* Information about the loop being processed used to compute
57 the number of loop iterations for loop unrolling and doloop
59 static struct loop_info this_loop_info;
61 /* Vector mapping INSN_UIDs to luids.
62 The luids are like uids but increase monotonically always.
63 We use them to see whether a jump comes from outside a given loop. */
67 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
68 number the insn is contained in. */
72 /* 1 + largest uid of any insn. */
76 /* 1 + luid of last insn. */
80 /* Number of loops detected in current function. Used as index to the
83 static int max_loop_num;
85 /* Indexed by loop number, contains the first and last insn of each loop. */
87 static rtx *loop_number_loop_starts, *loop_number_loop_ends;
89 /* Likewise for the continue insn */
90 static rtx *loop_number_loop_cont;
92 /* The first code_label that is reached in every loop iteration.
93 0 when not computed yet, initially const0_rtx if a jump couldn't be
95 Also set to 0 when there is no such label before the NOTE_INSN_LOOP_CONT
96 of this loop, or in verify_dominator, if a jump couldn't be followed. */
97 static rtx *loop_number_cont_dominator;
99 /* For each loop, gives the containing loop number, -1 if none. */
101 int *loop_outer_loop;
103 #ifdef HAVE_decrement_and_branch_on_count
104 /* Records whether resource in use by inner loop. */
106 int *loop_used_count_register;
107 #endif /* HAVE_decrement_and_branch_on_count */
109 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
110 really a loop (an insn outside the loop branches into it). */
112 static char *loop_invalid;
114 /* Indexed by loop number, links together all LABEL_REFs which refer to
115 code labels outside the loop. Used by routines that need to know all
116 loop exits, such as final_biv_value and final_giv_value.
118 This does not include loop exits due to return instructions. This is
119 because all bivs and givs are pseudos, and hence must be dead after a
120 return, so the presense of a return does not affect any of the
121 optimizations that use this info. It is simpler to just not include return
122 instructions on this list. */
124 rtx *loop_number_exit_labels;
126 /* Indexed by loop number, counts the number of LABEL_REFs on
127 loop_number_exit_labels for this loop and all loops nested inside it. */
129 int *loop_number_exit_count;
131 /* Indexed by register number, contains the number of times the reg
132 is set during the loop being scanned.
133 During code motion, a negative value indicates a reg that has been
134 made a candidate; in particular -2 means that it is an candidate that
135 we know is equal to a constant and -1 means that it is an candidate
136 not known equal to a constant.
137 After code motion, regs moved have 0 (which is accurate now)
138 while the failed candidates have the original number of times set.
140 Therefore, at all times, == 0 indicates an invariant register;
141 < 0 a conditionally invariant one. */
143 static varray_type set_in_loop;
145 /* Original value of set_in_loop; same except that this value
146 is not set negative for a reg whose sets have been made candidates
147 and not set to 0 for a reg that is moved. */
149 static varray_type n_times_set;
151 /* Index by register number, 1 indicates that the register
152 cannot be moved or strength reduced. */
154 static varray_type may_not_optimize;
156 /* Contains the insn in which a register was used if it was used
157 exactly once; contains const0_rtx if it was used more than once. */
159 static varray_type reg_single_usage;
161 /* Nonzero means reg N has already been moved out of one loop.
162 This reduces the desire to move it out of another. */
164 static char *moved_once;
166 /* List of MEMs that are stored in this loop. */
168 static rtx loop_store_mems;
170 /* The insn where the first of these was found. */
171 static rtx first_loop_store_insn;
173 typedef struct loop_mem_info {
174 rtx mem; /* The MEM itself. */
175 rtx reg; /* Corresponding pseudo, if any. */
176 int optimize; /* Nonzero if we can optimize access to this MEM. */
179 /* Array of MEMs that are used (read or written) in this loop, but
180 cannot be aliased by anything in this loop, except perhaps
181 themselves. In other words, if loop_mems[i] is altered during the
182 loop, it is altered by an expression that is rtx_equal_p to it. */
184 static loop_mem_info *loop_mems;
186 /* The index of the next available slot in LOOP_MEMS. */
188 static int loop_mems_idx;
190 /* The number of elements allocated in LOOP_MEMs. */
192 static int loop_mems_allocated;
194 /* Nonzero if we don't know what MEMs were changed in the current
195 loop. This happens if the loop contains a call (in which case
196 `loop_info->has_call' will also be set) or if we store into more
197 than NUM_STORES MEMs. */
199 static int unknown_address_altered;
201 /* The above doesn't count any readonly memory locations that are stored.
204 static int unknown_constant_address_altered;
206 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
207 static int num_movables;
209 /* Count of memory write instructions discovered in the loop. */
210 static int num_mem_sets;
212 /* Bound on pseudo register number before loop optimization.
213 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
214 int max_reg_before_loop;
216 /* The value to pass to the next call of reg_scan_update. */
217 static int loop_max_reg;
219 /* This obstack is used in product_cheap_p to allocate its rtl. It
220 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
221 If we used the same obstack that it did, we would be deallocating
224 static struct obstack temp_obstack;
226 /* This is where the pointer to the obstack being used for RTL is stored. */
228 extern struct obstack *rtl_obstack;
230 #define obstack_chunk_alloc xmalloc
231 #define obstack_chunk_free free
233 /* During the analysis of a loop, a chain of `struct movable's
234 is made to record all the movable insns found.
235 Then the entire chain can be scanned to decide which to move. */
239 rtx insn; /* A movable insn */
240 rtx set_src; /* The expression this reg is set from. */
241 rtx set_dest; /* The destination of this SET. */
242 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
243 of any registers used within the LIBCALL. */
244 int consec; /* Number of consecutive following insns
245 that must be moved with this one. */
246 int regno; /* The register it sets */
247 short lifetime; /* lifetime of that register;
248 may be adjusted when matching movables
249 that load the same value are found. */
250 short savings; /* Number of insns we can move for this reg,
251 including other movables that force this
252 or match this one. */
253 unsigned int cond : 1; /* 1 if only conditionally movable */
254 unsigned int force : 1; /* 1 means MUST move this insn */
255 unsigned int global : 1; /* 1 means reg is live outside this loop */
256 /* If PARTIAL is 1, GLOBAL means something different:
257 that the reg is live outside the range from where it is set
258 to the following label. */
259 unsigned int done : 1; /* 1 inhibits further processing of this */
261 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
262 In particular, moving it does not make it
264 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
265 load SRC, rather than copying INSN. */
266 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
267 first insn of a consecutive sets group. */
268 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
269 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
270 that we should avoid changing when clearing
271 the rest of the reg. */
272 struct movable *match; /* First entry for same value */
273 struct movable *forces; /* An insn that must be moved if this is */
274 struct movable *next;
277 static struct movable *the_movables;
279 FILE *loop_dump_stream;
281 /* Forward declarations. */
283 static void verify_dominator PROTO((int));
284 static void find_and_verify_loops PROTO((rtx));
285 static void mark_loop_jump PROTO((rtx, int));
286 static void prescan_loop PROTO((rtx, rtx, struct loop_info *));
287 static int reg_in_basic_block_p PROTO((rtx, rtx));
288 static int consec_sets_invariant_p PROTO((rtx, int, rtx));
289 static int labels_in_range_p PROTO((rtx, int));
290 static void count_one_set PROTO((rtx, rtx, varray_type, rtx *));
292 static void count_loop_regs_set PROTO((rtx, rtx, varray_type, varray_type,
294 static void note_addr_stored PROTO((rtx, rtx, void *));
295 static void note_set_pseudo_multiple_uses PROTO((rtx, rtx, void *));
296 static int loop_reg_used_before_p PROTO((rtx, rtx, rtx, rtx, rtx));
297 static void scan_loop PROTO((rtx, rtx, rtx, int, int));
299 static void replace_call_address PROTO((rtx, rtx, rtx));
301 static rtx skip_consec_insns PROTO((rtx, int));
302 static int libcall_benefit PROTO((rtx));
303 static void ignore_some_movables PROTO((struct movable *));
304 static void force_movables PROTO((struct movable *));
305 static void combine_movables PROTO((struct movable *, int));
306 static int regs_match_p PROTO((rtx, rtx, struct movable *));
307 static int rtx_equal_for_loop_p PROTO((rtx, rtx, struct movable *));
308 static void add_label_notes PROTO((rtx, rtx));
309 static void move_movables PROTO((struct movable *, int, int, rtx, rtx, int));
310 static int count_nonfixed_reads PROTO((rtx));
311 static void strength_reduce PROTO((rtx, rtx, rtx, int, rtx, rtx,
312 struct loop_info *, rtx, int, int));
313 static void find_single_use_in_loop PROTO((rtx, rtx, varray_type));
314 static int valid_initial_value_p PROTO((rtx, rtx, int, rtx));
315 static void find_mem_givs PROTO((rtx, rtx, int, int, rtx, rtx));
316 static void record_biv PROTO((struct induction *, rtx, rtx, rtx, rtx, rtx *, int, int, int));
317 static void check_final_value PROTO((struct induction *, rtx, rtx,
318 unsigned HOST_WIDE_INT));
319 static void record_giv PROTO((struct induction *, rtx, rtx, rtx, rtx, rtx, int, enum g_types, int, int, rtx *, rtx, rtx));
320 static void update_giv_derive PROTO((rtx));
321 static int basic_induction_var PROTO((rtx, enum machine_mode, rtx, rtx, rtx *, rtx *, rtx **, int *));
322 static rtx simplify_giv_expr PROTO((rtx, int *));
323 static int general_induction_var PROTO((rtx, rtx *, rtx *, rtx *, int, int *));
324 static int consec_sets_giv PROTO((int, rtx, rtx, rtx, rtx *, rtx *, rtx *));
325 static int check_dbra_loop PROTO((rtx, int, rtx, struct loop_info *));
326 static rtx express_from_1 PROTO((rtx, rtx, rtx));
327 static rtx combine_givs_p PROTO((struct induction *, struct induction *));
328 static void combine_givs PROTO((struct iv_class *));
329 struct recombine_givs_stats;
330 static int find_life_end PROTO((rtx, struct recombine_givs_stats *, rtx, rtx));
331 static void recombine_givs PROTO((struct iv_class *, rtx, rtx, int));
332 static int product_cheap_p PROTO((rtx, rtx));
333 static int maybe_eliminate_biv PROTO((struct iv_class *, rtx, rtx, int, int, int));
334 static int maybe_eliminate_biv_1 PROTO((rtx, rtx, struct iv_class *, int, rtx));
335 static int last_use_this_basic_block PROTO((rtx, rtx));
336 static void record_initial PROTO((rtx, rtx, void *));
337 static void update_reg_last_use PROTO((rtx, rtx));
338 static rtx next_insn_in_loop PROTO((rtx, rtx, rtx, rtx));
339 static void load_mems_and_recount_loop_regs_set PROTO((rtx, rtx, rtx,
341 static void load_mems PROTO((rtx, rtx, rtx, rtx));
342 static int insert_loop_mem PROTO((rtx *, void *));
343 static int replace_loop_mem PROTO((rtx *, void *));
344 static int replace_loop_reg PROTO((rtx *, void *));
345 static void note_reg_stored PROTO((rtx, rtx, void *));
346 static void try_copy_prop PROTO((rtx, rtx, rtx, rtx, int));
347 static int replace_label PROTO((rtx *, void *));
349 typedef struct rtx_and_int {
354 typedef struct rtx_pair {
359 /* Nonzero iff INSN is between START and END, inclusive. */
360 #define INSN_IN_RANGE_P(INSN, START, END) \
361 (INSN_UID (INSN) < max_uid_for_loop \
362 && INSN_LUID (INSN) >= INSN_LUID (START) \
363 && INSN_LUID (INSN) <= INSN_LUID (END))
365 #ifdef HAVE_decrement_and_branch_on_count
366 /* Test whether BCT applicable and safe. */
367 static void insert_bct PROTO((rtx, rtx, struct loop_info *));
369 /* Auxiliary function that inserts the BCT pattern into the loop. */
370 static void instrument_loop_bct PROTO((rtx, rtx, rtx));
371 #endif /* HAVE_decrement_and_branch_on_count */
373 /* Indirect_jump_in_function is computed once per function. */
374 int indirect_jump_in_function = 0;
375 static int indirect_jump_in_function_p PROTO((rtx));
377 static int compute_luids PROTO((rtx, rtx, int));
379 static int biv_elimination_giv_has_0_offset PROTO((struct induction *,
380 struct induction *, rtx));
382 /* Relative gain of eliminating various kinds of operations. */
385 static int shift_cost;
386 static int mult_cost;
389 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
390 copy the value of the strength reduced giv to its original register. */
391 static int copy_cost;
393 /* Cost of using a register, to normalize the benefits of a giv. */
394 static int reg_address_cost;
400 char *free_point = (char *) oballoc (1);
401 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
403 add_cost = rtx_cost (gen_rtx_PLUS (word_mode, reg, reg), SET);
406 reg_address_cost = ADDRESS_COST (reg);
408 reg_address_cost = rtx_cost (reg, MEM);
411 /* We multiply by 2 to reconcile the difference in scale between
412 these two ways of computing costs. Otherwise the cost of a copy
413 will be far less than the cost of an add. */
417 /* Free the objects we just allocated. */
420 /* Initialize the obstack used for rtl in product_cheap_p. */
421 gcc_obstack_init (&temp_obstack);
424 /* Compute the mapping from uids to luids.
425 LUIDs are numbers assigned to insns, like uids,
426 except that luids increase monotonically through the code.
427 Start at insn START and stop just before END. Assign LUIDs
428 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
430 compute_luids (start, end, prev_luid)
437 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
439 if (INSN_UID (insn) >= max_uid_for_loop)
441 /* Don't assign luids to line-number NOTEs, so that the distance in
442 luids between two insns is not affected by -g. */
443 if (GET_CODE (insn) != NOTE
444 || NOTE_LINE_NUMBER (insn) <= 0)
445 uid_luid[INSN_UID (insn)] = ++i;
447 /* Give a line number note the same luid as preceding insn. */
448 uid_luid[INSN_UID (insn)] = i;
453 /* Entry point of this file. Perform loop optimization
454 on the current function. F is the first insn of the function
455 and DUMPFILE is a stream for output of a trace of actions taken
456 (or 0 if none should be output). */
459 loop_optimize (f, dumpfile, unroll_p, bct_p)
460 /* f is the first instruction of a chain of insns for one function */
468 loop_dump_stream = dumpfile;
470 init_recog_no_volatile ();
472 max_reg_before_loop = max_reg_num ();
473 loop_max_reg = max_reg_before_loop;
477 /* Count the number of loops. */
480 for (insn = f; insn; insn = NEXT_INSN (insn))
482 if (GET_CODE (insn) == NOTE
483 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
487 /* Don't waste time if no loops. */
488 if (max_loop_num == 0)
491 moved_once = (char *) xcalloc (max_reg_before_loop, sizeof (char));
493 /* Get size to use for tables indexed by uids.
494 Leave some space for labels allocated by find_and_verify_loops. */
495 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
497 uid_luid = (int *) xcalloc (max_uid_for_loop, sizeof (int));
498 uid_loop_num = (int *) xcalloc (max_uid_for_loop, sizeof (int));
500 /* Allocate tables for recording each loop. We set each entry, so they need
502 loop_number_loop_starts = (rtx *) xmalloc (max_loop_num * sizeof (rtx));
503 loop_number_loop_ends = (rtx *) xmalloc (max_loop_num * sizeof (rtx));
504 loop_number_loop_cont = (rtx *) xmalloc (max_loop_num * sizeof (rtx));
505 loop_number_cont_dominator = (rtx *) xmalloc (max_loop_num * sizeof (rtx));
506 loop_outer_loop = (int *) xmalloc (max_loop_num * sizeof (int));
507 loop_invalid = (char *) xmalloc (max_loop_num * sizeof (char));
508 loop_number_exit_labels = (rtx *) xmalloc (max_loop_num * sizeof (rtx));
509 loop_number_exit_count = (int *) xmalloc (max_loop_num * sizeof (int));
511 #ifdef HAVE_decrement_and_branch_on_count
512 /* Allocate for BCT optimization */
513 loop_used_count_register = (int *) xcalloc (max_loop_num, sizeof (int));
514 #endif /* HAVE_decrement_and_branch_on_count */
516 /* Find and process each loop.
517 First, find them, and record them in order of their beginnings. */
518 find_and_verify_loops (f);
520 /* Now find all register lifetimes. This must be done after
521 find_and_verify_loops, because it might reorder the insns in the
523 reg_scan (f, max_reg_before_loop, 1);
525 /* This must occur after reg_scan so that registers created by gcse
526 will have entries in the register tables.
528 We could have added a call to reg_scan after gcse_main in toplev.c,
529 but moving this call to init_alias_analysis is more efficient. */
530 init_alias_analysis ();
532 /* See if we went too far. Note that get_max_uid already returns
533 one more that the maximum uid of all insn. */
534 if (get_max_uid () > max_uid_for_loop)
536 /* Now reset it to the actual size we need. See above. */
537 max_uid_for_loop = get_max_uid ();
539 /* find_and_verify_loops has already called compute_luids, but it might
540 have rearranged code afterwards, so we need to recompute the luids now. */
541 max_luid = compute_luids (f, NULL_RTX, 0);
543 /* Don't leave gaps in uid_luid for insns that have been
544 deleted. It is possible that the first or last insn
545 using some register has been deleted by cross-jumping.
546 Make sure that uid_luid for that former insn's uid
547 points to the general area where that insn used to be. */
548 for (i = 0; i < max_uid_for_loop; i++)
550 uid_luid[0] = uid_luid[i];
551 if (uid_luid[0] != 0)
554 for (i = 0; i < max_uid_for_loop; i++)
555 if (uid_luid[i] == 0)
556 uid_luid[i] = uid_luid[i - 1];
558 /* If debugging and unrolling loops, we must replicate the tree
559 nodes corresponding to the BLOCKs inside the loop, so that the
560 original one to one mapping will remain. We sometimes unroll
561 loops even when unroll_p is false, so we must always do this when
563 if (write_symbols != NO_DEBUG)
564 find_loop_tree_blocks ();
566 /* Determine if the function has indirect jump. On some systems
567 this prevents low overhead loop instructions from being used. */
568 indirect_jump_in_function = indirect_jump_in_function_p (f);
570 /* Now scan the loops, last ones first, since this means inner ones are done
571 before outer ones. */
572 for (i = max_loop_num-1; i >= 0; i--)
573 if (! loop_invalid[i] && loop_number_loop_ends[i])
574 scan_loop (loop_number_loop_starts[i], loop_number_loop_ends[i],
575 loop_number_loop_cont[i], unroll_p, bct_p);
577 /* Replicate the BLOCKs. */
578 if (write_symbols != NO_DEBUG)
579 unroll_block_trees ();
581 end_alias_analysis ();
587 free (loop_number_loop_starts);
588 free (loop_number_loop_ends);
589 free (loop_number_loop_cont);
590 free (loop_number_cont_dominator);
591 free (loop_outer_loop);
593 free (loop_number_exit_labels);
594 free (loop_number_exit_count);
595 #ifdef HAVE_decrement_and_branch_on_count
596 free (loop_used_count_register);
597 #endif /* HAVE_decrement_and_branch_on_count */
601 /* Returns the next insn, in execution order, after INSN. START and
602 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
603 respectively. LOOP_TOP, if non-NULL, is the top of the loop in the
604 insn-stream; it is used with loops that are entered near the
608 next_insn_in_loop (insn, start, end, loop_top)
614 insn = NEXT_INSN (insn);
619 /* Go to the top of the loop, and continue there. */
633 /* Optimize one loop whose start is LOOP_START and end is END.
634 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
636 LOOP_CONT is the NOTE_INSN_LOOP_CONT. */
638 /* ??? Could also move memory writes out of loops if the destination address
639 is invariant, the source is invariant, the memory write is not volatile,
640 and if we can prove that no read inside the loop can read this address
641 before the write occurs. If there is a read of this address after the
642 write, then we can also mark the memory read as invariant. */
645 scan_loop (loop_start, end, loop_cont, unroll_p, bct_p)
646 rtx loop_start, end, loop_cont;
651 /* 1 if we are scanning insns that could be executed zero times. */
653 /* 1 if we are scanning insns that might never be executed
654 due to a subroutine call which might exit before they are reached. */
656 /* For a rotated loop that is entered near the bottom,
657 this is the label at the top. Otherwise it is zero. */
659 /* Jump insn that enters the loop, or 0 if control drops in. */
660 rtx loop_entry_jump = 0;
661 /* Place in the loop where control enters. */
663 /* Number of insns in the loop. */
667 rtx temp, update_start, update_end;
668 /* The SET from an insn, if it is the only SET in the insn. */
670 /* Chain describing insns movable in current loop. */
671 struct movable *movables = 0;
672 /* Last element in `movables' -- so we can add elements at the end. */
673 struct movable *last_movable = 0;
674 /* Ratio of extra register life span we can justify
675 for saving an instruction. More if loop doesn't call subroutines
676 since in that case saving an insn makes more difference
677 and more registers are available. */
679 /* Nonzero if we are scanning instructions in a sub-loop. */
682 struct loop_info *loop_info = &this_loop_info;
684 /* Determine whether this loop starts with a jump down to a test at
685 the end. This will occur for a small number of loops with a test
686 that is too complex to duplicate in front of the loop.
688 We search for the first insn or label in the loop, skipping NOTEs.
689 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
690 (because we might have a loop executed only once that contains a
691 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
692 (in case we have a degenerate loop).
694 Note that if we mistakenly think that a loop is entered at the top
695 when, in fact, it is entered at the exit test, the only effect will be
696 slightly poorer optimization. Making the opposite error can generate
697 incorrect code. Since very few loops now start with a jump to the
698 exit test, the code here to detect that case is very conservative. */
700 for (p = NEXT_INSN (loop_start);
702 && GET_CODE (p) != CODE_LABEL && GET_RTX_CLASS (GET_CODE (p)) != 'i'
703 && (GET_CODE (p) != NOTE
704 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
705 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
711 /* Set up variables describing this loop. */
712 prescan_loop (loop_start, end, loop_info);
713 threshold = (loop_info->has_call ? 1 : 2) * (1 + n_non_fixed_regs);
715 /* If loop has a jump before the first label,
716 the true entry is the target of that jump.
717 Start scan from there.
718 But record in LOOP_TOP the place where the end-test jumps
719 back to so we can scan that after the end of the loop. */
720 if (GET_CODE (p) == JUMP_INSN)
724 /* Loop entry must be unconditional jump (and not a RETURN) */
726 && JUMP_LABEL (p) != 0
727 /* Check to see whether the jump actually
728 jumps out of the loop (meaning it's no loop).
729 This case can happen for things like
730 do {..} while (0). If this label was generated previously
731 by loop, we can't tell anything about it and have to reject
733 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, end))
735 loop_top = next_label (scan_start);
736 scan_start = JUMP_LABEL (p);
740 /* If SCAN_START was an insn created by loop, we don't know its luid
741 as required by loop_reg_used_before_p. So skip such loops. (This
742 test may never be true, but it's best to play it safe.)
744 Also, skip loops where we do not start scanning at a label. This
745 test also rejects loops starting with a JUMP_INSN that failed the
748 if (INSN_UID (scan_start) >= max_uid_for_loop
749 || GET_CODE (scan_start) != CODE_LABEL)
751 if (loop_dump_stream)
752 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
753 INSN_UID (loop_start), INSN_UID (end));
757 /* Count number of times each reg is set during this loop.
758 Set VARRAY_CHAR (may_not_optimize, I) if it is not safe to move out
759 the setting of register I. Set VARRAY_RTX (reg_single_usage, I). */
761 /* Allocate extra space for REGS that might be created by
762 load_mems. We allocate a little extra slop as well, in the hopes
763 that even after the moving of movables creates some new registers
764 we won't have to reallocate these arrays. However, we do grow
765 the arrays, if necessary, in load_mems_recount_loop_regs_set. */
766 nregs = max_reg_num () + loop_mems_idx + 16;
767 VARRAY_INT_INIT (set_in_loop, nregs, "set_in_loop");
768 VARRAY_INT_INIT (n_times_set, nregs, "n_times_set");
769 VARRAY_CHAR_INIT (may_not_optimize, nregs, "may_not_optimize");
770 VARRAY_RTX_INIT (reg_single_usage, nregs, "reg_single_usage");
772 count_loop_regs_set (loop_top ? loop_top : loop_start, end,
773 may_not_optimize, reg_single_usage, &insn_count, nregs);
775 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
777 VARRAY_CHAR (may_not_optimize, i) = 1;
778 VARRAY_INT (set_in_loop, i) = 1;
781 #ifdef AVOID_CCMODE_COPIES
782 /* Don't try to move insns which set CC registers if we should not
783 create CCmode register copies. */
784 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
785 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
786 VARRAY_CHAR (may_not_optimize, i) = 1;
789 bcopy ((char *) &set_in_loop->data,
790 (char *) &n_times_set->data, nregs * sizeof (int));
792 if (loop_dump_stream)
794 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
795 INSN_UID (loop_start), INSN_UID (end), insn_count);
797 fprintf (loop_dump_stream, "Continue at insn %d.\n",
798 INSN_UID (loop_info->cont));
801 /* Scan through the loop finding insns that are safe to move.
802 Set set_in_loop negative for the reg being set, so that
803 this reg will be considered invariant for subsequent insns.
804 We consider whether subsequent insns use the reg
805 in deciding whether it is worth actually moving.
807 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
808 and therefore it is possible that the insns we are scanning
809 would never be executed. At such times, we must make sure
810 that it is safe to execute the insn once instead of zero times.
811 When MAYBE_NEVER is 0, all insns will be executed at least once
812 so that is not a problem. */
814 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
816 p = next_insn_in_loop (p, scan_start, end, loop_top))
818 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
819 && find_reg_note (p, REG_LIBCALL, NULL_RTX))
821 else if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
822 && find_reg_note (p, REG_RETVAL, NULL_RTX))
825 if (GET_CODE (p) == INSN
826 && (set = single_set (p))
827 && GET_CODE (SET_DEST (set)) == REG
828 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
833 rtx src = SET_SRC (set);
834 rtx dependencies = 0;
836 /* Figure out what to use as a source of this insn. If a REG_EQUIV
837 note is given or if a REG_EQUAL note with a constant operand is
838 specified, use it as the source and mark that we should move
839 this insn by calling emit_move_insn rather that duplicating the
842 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
844 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
846 src = XEXP (temp, 0), move_insn = 1;
849 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
850 if (temp && CONSTANT_P (XEXP (temp, 0)))
851 src = XEXP (temp, 0), move_insn = 1;
852 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
854 src = XEXP (temp, 0);
855 /* A libcall block can use regs that don't appear in
856 the equivalent expression. To move the libcall,
857 we must move those regs too. */
858 dependencies = libcall_other_reg (p, src);
862 /* Don't try to optimize a register that was made
863 by loop-optimization for an inner loop.
864 We don't know its life-span, so we can't compute the benefit. */
865 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
867 else if (/* The register is used in basic blocks other
868 than the one where it is set (meaning that
869 something after this point in the loop might
870 depend on its value before the set). */
871 ! reg_in_basic_block_p (p, SET_DEST (set))
872 /* And the set is not guaranteed to be executed one
873 the loop starts, or the value before the set is
874 needed before the set occurs...
876 ??? Note we have quadratic behaviour here, mitigated
877 by the fact that the previous test will often fail for
878 large loops. Rather than re-scanning the entire loop
879 each time for register usage, we should build tables
880 of the register usage and use them here instead. */
882 || loop_reg_used_before_p (set, p, loop_start,
884 /* It is unsafe to move the set.
886 This code used to consider it OK to move a set of a variable
887 which was not created by the user and not used in an exit test.
888 That behavior is incorrect and was removed. */
890 else if ((tem = invariant_p (src))
891 && (dependencies == 0
892 || (tem2 = invariant_p (dependencies)) != 0)
893 && (VARRAY_INT (set_in_loop,
894 REGNO (SET_DEST (set))) == 1
896 = consec_sets_invariant_p
898 VARRAY_INT (set_in_loop, REGNO (SET_DEST (set))),
900 /* If the insn can cause a trap (such as divide by zero),
901 can't move it unless it's guaranteed to be executed
902 once loop is entered. Even a function call might
903 prevent the trap insn from being reached
904 (since it might exit!) */
905 && ! ((maybe_never || call_passed)
906 && may_trap_p (src)))
908 register struct movable *m;
909 register int regno = REGNO (SET_DEST (set));
911 /* A potential lossage is where we have a case where two insns
912 can be combined as long as they are both in the loop, but
913 we move one of them outside the loop. For large loops,
914 this can lose. The most common case of this is the address
915 of a function being called.
917 Therefore, if this register is marked as being used exactly
918 once if we are in a loop with calls (a "large loop"), see if
919 we can replace the usage of this register with the source
920 of this SET. If we can, delete this insn.
922 Don't do this if P has a REG_RETVAL note or if we have
923 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
925 if (loop_info->has_call
926 && VARRAY_RTX (reg_single_usage, regno) != 0
927 && VARRAY_RTX (reg_single_usage, regno) != const0_rtx
928 && REGNO_FIRST_UID (regno) == INSN_UID (p)
929 && (REGNO_LAST_UID (regno)
930 == INSN_UID (VARRAY_RTX (reg_single_usage, regno)))
931 && VARRAY_INT (set_in_loop, regno) == 1
932 && ! side_effects_p (SET_SRC (set))
933 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
934 && (! SMALL_REGISTER_CLASSES
935 || (! (GET_CODE (SET_SRC (set)) == REG
936 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
937 /* This test is not redundant; SET_SRC (set) might be
938 a call-clobbered register and the life of REGNO
939 might span a call. */
940 && ! modified_between_p (SET_SRC (set), p,
942 (reg_single_usage, regno))
943 && no_labels_between_p (p, VARRAY_RTX (reg_single_usage, regno))
944 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
946 (reg_single_usage, regno)))
948 /* Replace any usage in a REG_EQUAL note. Must copy the
949 new source, so that we don't get rtx sharing between the
950 SET_SOURCE and REG_NOTES of insn p. */
951 REG_NOTES (VARRAY_RTX (reg_single_usage, regno))
952 = replace_rtx (REG_NOTES (VARRAY_RTX
953 (reg_single_usage, regno)),
954 SET_DEST (set), copy_rtx (SET_SRC (set)));
957 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
958 NOTE_SOURCE_FILE (p) = 0;
959 VARRAY_INT (set_in_loop, regno) = 0;
963 m = (struct movable *) alloca (sizeof (struct movable));
967 m->dependencies = dependencies;
968 m->set_dest = SET_DEST (set);
970 m->consec = VARRAY_INT (set_in_loop,
971 REGNO (SET_DEST (set))) - 1;
975 m->move_insn = move_insn;
976 m->move_insn_first = 0;
977 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
978 m->savemode = VOIDmode;
980 /* Set M->cond if either invariant_p or consec_sets_invariant_p
981 returned 2 (only conditionally invariant). */
982 m->cond = ((tem | tem1 | tem2) > 1);
983 m->global = (uid_luid[REGNO_LAST_UID (regno)] > INSN_LUID (end)
984 || uid_luid[REGNO_FIRST_UID (regno)] < INSN_LUID (loop_start));
986 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
987 - uid_luid[REGNO_FIRST_UID (regno)]);
988 m->savings = VARRAY_INT (n_times_set, regno);
989 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
990 m->savings += libcall_benefit (p);
991 VARRAY_INT (set_in_loop, regno) = move_insn ? -2 : -1;
992 /* Add M to the end of the chain MOVABLES. */
996 last_movable->next = m;
1001 /* It is possible for the first instruction to have a
1002 REG_EQUAL note but a non-invariant SET_SRC, so we must
1003 remember the status of the first instruction in case
1004 the last instruction doesn't have a REG_EQUAL note. */
1005 m->move_insn_first = m->move_insn;
1007 /* Skip this insn, not checking REG_LIBCALL notes. */
1008 p = next_nonnote_insn (p);
1009 /* Skip the consecutive insns, if there are any. */
1010 p = skip_consec_insns (p, m->consec);
1011 /* Back up to the last insn of the consecutive group. */
1012 p = prev_nonnote_insn (p);
1014 /* We must now reset m->move_insn, m->is_equiv, and possibly
1015 m->set_src to correspond to the effects of all the
1017 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
1019 m->set_src = XEXP (temp, 0), m->move_insn = 1;
1022 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
1023 if (temp && CONSTANT_P (XEXP (temp, 0)))
1024 m->set_src = XEXP (temp, 0), m->move_insn = 1;
1029 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
1032 /* If this register is always set within a STRICT_LOW_PART
1033 or set to zero, then its high bytes are constant.
1034 So clear them outside the loop and within the loop
1035 just load the low bytes.
1036 We must check that the machine has an instruction to do so.
1037 Also, if the value loaded into the register
1038 depends on the same register, this cannot be done. */
1039 else if (SET_SRC (set) == const0_rtx
1040 && GET_CODE (NEXT_INSN (p)) == INSN
1041 && (set1 = single_set (NEXT_INSN (p)))
1042 && GET_CODE (set1) == SET
1043 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
1044 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
1045 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
1047 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
1049 register int regno = REGNO (SET_DEST (set));
1050 if (VARRAY_INT (set_in_loop, regno) == 2)
1052 register struct movable *m;
1053 m = (struct movable *) alloca (sizeof (struct movable));
1056 m->set_dest = SET_DEST (set);
1057 m->dependencies = 0;
1063 m->move_insn_first = 0;
1065 /* If the insn may not be executed on some cycles,
1066 we can't clear the whole reg; clear just high part.
1067 Not even if the reg is used only within this loop.
1074 Clearing x before the inner loop could clobber a value
1075 being saved from the last time around the outer loop.
1076 However, if the reg is not used outside this loop
1077 and all uses of the register are in the same
1078 basic block as the store, there is no problem.
1080 If this insn was made by loop, we don't know its
1081 INSN_LUID and hence must make a conservative
1083 m->global = (INSN_UID (p) >= max_uid_for_loop
1084 || (uid_luid[REGNO_LAST_UID (regno)]
1086 || (uid_luid[REGNO_FIRST_UID (regno)]
1088 || (labels_in_range_p
1089 (p, uid_luid[REGNO_FIRST_UID (regno)])));
1090 if (maybe_never && m->global)
1091 m->savemode = GET_MODE (SET_SRC (set1));
1093 m->savemode = VOIDmode;
1097 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
1098 - uid_luid[REGNO_FIRST_UID (regno)]);
1100 VARRAY_INT (set_in_loop, regno) = -1;
1101 /* Add M to the end of the chain MOVABLES. */
1105 last_movable->next = m;
1110 /* Past a call insn, we get to insns which might not be executed
1111 because the call might exit. This matters for insns that trap.
1112 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1113 so they don't count. */
1114 else if (GET_CODE (p) == CALL_INSN && ! in_libcall)
1116 /* Past a label or a jump, we get to insns for which we
1117 can't count on whether or how many times they will be
1118 executed during each iteration. Therefore, we can
1119 only move out sets of trivial variables
1120 (those not used after the loop). */
1121 /* Similar code appears twice in strength_reduce. */
1122 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1123 /* If we enter the loop in the middle, and scan around to the
1124 beginning, don't set maybe_never for that. This must be an
1125 unconditional jump, otherwise the code at the top of the
1126 loop might never be executed. Unconditional jumps are
1127 followed a by barrier then loop end. */
1128 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop_top
1129 && NEXT_INSN (NEXT_INSN (p)) == end
1130 && simplejump_p (p)))
1132 else if (GET_CODE (p) == NOTE)
1134 /* At the virtual top of a converted loop, insns are again known to
1135 be executed: logically, the loop begins here even though the exit
1136 code has been duplicated. */
1137 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1138 maybe_never = call_passed = 0;
1139 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1141 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1146 /* If one movable subsumes another, ignore that other. */
1148 ignore_some_movables (movables);
1150 /* For each movable insn, see if the reg that it loads
1151 leads when it dies right into another conditionally movable insn.
1152 If so, record that the second insn "forces" the first one,
1153 since the second can be moved only if the first is. */
1155 force_movables (movables);
1157 /* See if there are multiple movable insns that load the same value.
1158 If there are, make all but the first point at the first one
1159 through the `match' field, and add the priorities of them
1160 all together as the priority of the first. */
1162 combine_movables (movables, nregs);
1164 /* Now consider each movable insn to decide whether it is worth moving.
1165 Store 0 in set_in_loop for each reg that is moved.
1167 Generally this increases code size, so do not move moveables when
1168 optimizing for code size. */
1170 if (! optimize_size)
1171 move_movables (movables, threshold,
1172 insn_count, loop_start, end, nregs);
1174 /* Now candidates that still are negative are those not moved.
1175 Change set_in_loop to indicate that those are not actually invariant. */
1176 for (i = 0; i < nregs; i++)
1177 if (VARRAY_INT (set_in_loop, i) < 0)
1178 VARRAY_INT (set_in_loop, i) = VARRAY_INT (n_times_set, i);
1180 /* Now that we've moved some things out of the loop, we might be able to
1181 hoist even more memory references. */
1182 load_mems_and_recount_loop_regs_set (scan_start, end, loop_top,
1183 loop_start, &insn_count);
1185 for (update_start = loop_start;
1186 PREV_INSN (update_start) && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1187 update_start = PREV_INSN (update_start))
1189 update_end = NEXT_INSN (end);
1191 reg_scan_update (update_start, update_end, loop_max_reg);
1192 loop_max_reg = max_reg_num ();
1194 if (flag_strength_reduce)
1196 the_movables = movables;
1197 strength_reduce (scan_start, end, loop_top,
1198 insn_count, loop_start, end,
1199 loop_info, loop_cont, unroll_p, bct_p);
1201 reg_scan_update (update_start, update_end, loop_max_reg);
1202 loop_max_reg = max_reg_num ();
1205 VARRAY_FREE (reg_single_usage);
1206 VARRAY_FREE (set_in_loop);
1207 VARRAY_FREE (n_times_set);
1208 VARRAY_FREE (may_not_optimize);
1211 /* Add elements to *OUTPUT to record all the pseudo-regs
1212 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1215 record_excess_regs (in_this, not_in_this, output)
1216 rtx in_this, not_in_this;
1223 code = GET_CODE (in_this);
1237 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1238 && ! reg_mentioned_p (in_this, not_in_this))
1239 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1246 fmt = GET_RTX_FORMAT (code);
1247 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1254 for (j = 0; j < XVECLEN (in_this, i); j++)
1255 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1259 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1265 /* Check what regs are referred to in the libcall block ending with INSN,
1266 aside from those mentioned in the equivalent value.
1267 If there are none, return 0.
1268 If there are one or more, return an EXPR_LIST containing all of them. */
1271 libcall_other_reg (insn, equiv)
1274 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1275 rtx p = XEXP (note, 0);
1278 /* First, find all the regs used in the libcall block
1279 that are not mentioned as inputs to the result. */
1283 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1284 || GET_CODE (p) == CALL_INSN)
1285 record_excess_regs (PATTERN (p), equiv, &output);
1292 /* Return 1 if all uses of REG
1293 are between INSN and the end of the basic block. */
1296 reg_in_basic_block_p (insn, reg)
1299 int regno = REGNO (reg);
1302 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1305 /* Search this basic block for the already recorded last use of the reg. */
1306 for (p = insn; p; p = NEXT_INSN (p))
1308 switch (GET_CODE (p))
1315 /* Ordinary insn: if this is the last use, we win. */
1316 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1321 /* Jump insn: if this is the last use, we win. */
1322 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1324 /* Otherwise, it's the end of the basic block, so we lose. */
1329 /* It's the end of the basic block, so we lose. */
1337 /* The "last use" doesn't follow the "first use"?? */
1341 /* Compute the benefit of eliminating the insns in the block whose
1342 last insn is LAST. This may be a group of insns used to compute a
1343 value directly or can contain a library call. */
1346 libcall_benefit (last)
1352 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1353 insn != last; insn = NEXT_INSN (insn))
1355 if (GET_CODE (insn) == CALL_INSN)
1356 benefit += 10; /* Assume at least this many insns in a library
1358 else if (GET_CODE (insn) == INSN
1359 && GET_CODE (PATTERN (insn)) != USE
1360 && GET_CODE (PATTERN (insn)) != CLOBBER)
1367 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1370 skip_consec_insns (insn, count)
1374 for (; count > 0; count--)
1378 /* If first insn of libcall sequence, skip to end. */
1379 /* Do this at start of loop, since INSN is guaranteed to
1381 if (GET_CODE (insn) != NOTE
1382 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1383 insn = XEXP (temp, 0);
1385 do insn = NEXT_INSN (insn);
1386 while (GET_CODE (insn) == NOTE);
1392 /* Ignore any movable whose insn falls within a libcall
1393 which is part of another movable.
1394 We make use of the fact that the movable for the libcall value
1395 was made later and so appears later on the chain. */
1398 ignore_some_movables (movables)
1399 struct movable *movables;
1401 register struct movable *m, *m1;
1403 for (m = movables; m; m = m->next)
1405 /* Is this a movable for the value of a libcall? */
1406 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1410 /* Check for earlier movables inside that range,
1411 and mark them invalid. We cannot use LUIDs here because
1412 insns created by loop.c for prior loops don't have LUIDs.
1413 Rather than reject all such insns from movables, we just
1414 explicitly check each insn in the libcall (since invariant
1415 libcalls aren't that common). */
1416 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1417 for (m1 = movables; m1 != m; m1 = m1->next)
1418 if (m1->insn == insn)
1424 /* For each movable insn, see if the reg that it loads
1425 leads when it dies right into another conditionally movable insn.
1426 If so, record that the second insn "forces" the first one,
1427 since the second can be moved only if the first is. */
1430 force_movables (movables)
1431 struct movable *movables;
1433 register struct movable *m, *m1;
1434 for (m1 = movables; m1; m1 = m1->next)
1435 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1436 if (!m1->partial && !m1->done)
1438 int regno = m1->regno;
1439 for (m = m1->next; m; m = m->next)
1440 /* ??? Could this be a bug? What if CSE caused the
1441 register of M1 to be used after this insn?
1442 Since CSE does not update regno_last_uid,
1443 this insn M->insn might not be where it dies.
1444 But very likely this doesn't matter; what matters is
1445 that M's reg is computed from M1's reg. */
1446 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1449 if (m != 0 && m->set_src == m1->set_dest
1450 /* If m->consec, m->set_src isn't valid. */
1454 /* Increase the priority of the moving the first insn
1455 since it permits the second to be moved as well. */
1459 m1->lifetime += m->lifetime;
1460 m1->savings += m->savings;
1465 /* Find invariant expressions that are equal and can be combined into
1469 combine_movables (movables, nregs)
1470 struct movable *movables;
1473 register struct movable *m;
1474 char *matched_regs = (char *) xmalloc (nregs);
1475 enum machine_mode mode;
1477 /* Regs that are set more than once are not allowed to match
1478 or be matched. I'm no longer sure why not. */
1479 /* Perhaps testing m->consec_sets would be more appropriate here? */
1481 for (m = movables; m; m = m->next)
1482 if (m->match == 0 && VARRAY_INT (n_times_set, m->regno) == 1 && !m->partial)
1484 register struct movable *m1;
1485 int regno = m->regno;
1487 bzero (matched_regs, nregs);
1488 matched_regs[regno] = 1;
1490 /* We want later insns to match the first one. Don't make the first
1491 one match any later ones. So start this loop at m->next. */
1492 for (m1 = m->next; m1; m1 = m1->next)
1493 if (m != m1 && m1->match == 0 && VARRAY_INT (n_times_set, m1->regno) == 1
1494 /* A reg used outside the loop mustn't be eliminated. */
1496 /* A reg used for zero-extending mustn't be eliminated. */
1498 && (matched_regs[m1->regno]
1501 /* Can combine regs with different modes loaded from the
1502 same constant only if the modes are the same or
1503 if both are integer modes with M wider or the same
1504 width as M1. The check for integer is redundant, but
1505 safe, since the only case of differing destination
1506 modes with equal sources is when both sources are
1507 VOIDmode, i.e., CONST_INT. */
1508 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1509 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1510 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1511 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1512 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1513 /* See if the source of M1 says it matches M. */
1514 && ((GET_CODE (m1->set_src) == REG
1515 && matched_regs[REGNO (m1->set_src)])
1516 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1518 && ((m->dependencies == m1->dependencies)
1519 || rtx_equal_p (m->dependencies, m1->dependencies)))
1521 m->lifetime += m1->lifetime;
1522 m->savings += m1->savings;
1525 matched_regs[m1->regno] = 1;
1529 /* Now combine the regs used for zero-extension.
1530 This can be done for those not marked `global'
1531 provided their lives don't overlap. */
1533 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1534 mode = GET_MODE_WIDER_MODE (mode))
1536 register struct movable *m0 = 0;
1538 /* Combine all the registers for extension from mode MODE.
1539 Don't combine any that are used outside this loop. */
1540 for (m = movables; m; m = m->next)
1541 if (m->partial && ! m->global
1542 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1544 register struct movable *m1;
1545 int first = uid_luid[REGNO_FIRST_UID (m->regno)];
1546 int last = uid_luid[REGNO_LAST_UID (m->regno)];
1550 /* First one: don't check for overlap, just record it. */
1555 /* Make sure they extend to the same mode.
1556 (Almost always true.) */
1557 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1560 /* We already have one: check for overlap with those
1561 already combined together. */
1562 for (m1 = movables; m1 != m; m1 = m1->next)
1563 if (m1 == m0 || (m1->partial && m1->match == m0))
1564 if (! (uid_luid[REGNO_FIRST_UID (m1->regno)] > last
1565 || uid_luid[REGNO_LAST_UID (m1->regno)] < first))
1568 /* No overlap: we can combine this with the others. */
1569 m0->lifetime += m->lifetime;
1570 m0->savings += m->savings;
1579 free (matched_regs);
1582 /* Return 1 if regs X and Y will become the same if moved. */
1585 regs_match_p (x, y, movables)
1587 struct movable *movables;
1591 struct movable *mx, *my;
1593 for (mx = movables; mx; mx = mx->next)
1594 if (mx->regno == xn)
1597 for (my = movables; my; my = my->next)
1598 if (my->regno == yn)
1602 && ((mx->match == my->match && mx->match != 0)
1604 || mx == my->match));
1607 /* Return 1 if X and Y are identical-looking rtx's.
1608 This is the Lisp function EQUAL for rtx arguments.
1610 If two registers are matching movables or a movable register and an
1611 equivalent constant, consider them equal. */
1614 rtx_equal_for_loop_p (x, y, movables)
1616 struct movable *movables;
1620 register struct movable *m;
1621 register enum rtx_code code;
1622 register const char *fmt;
1626 if (x == 0 || y == 0)
1629 code = GET_CODE (x);
1631 /* If we have a register and a constant, they may sometimes be
1633 if (GET_CODE (x) == REG && VARRAY_INT (set_in_loop, REGNO (x)) == -2
1636 for (m = movables; m; m = m->next)
1637 if (m->move_insn && m->regno == REGNO (x)
1638 && rtx_equal_p (m->set_src, y))
1641 else if (GET_CODE (y) == REG && VARRAY_INT (set_in_loop, REGNO (y)) == -2
1644 for (m = movables; m; m = m->next)
1645 if (m->move_insn && m->regno == REGNO (y)
1646 && rtx_equal_p (m->set_src, x))
1650 /* Otherwise, rtx's of different codes cannot be equal. */
1651 if (code != GET_CODE (y))
1654 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1655 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1657 if (GET_MODE (x) != GET_MODE (y))
1660 /* These three types of rtx's can be compared nonrecursively. */
1662 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1664 if (code == LABEL_REF)
1665 return XEXP (x, 0) == XEXP (y, 0);
1666 if (code == SYMBOL_REF)
1667 return XSTR (x, 0) == XSTR (y, 0);
1669 /* Compare the elements. If any pair of corresponding elements
1670 fail to match, return 0 for the whole things. */
1672 fmt = GET_RTX_FORMAT (code);
1673 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1678 if (XWINT (x, i) != XWINT (y, i))
1683 if (XINT (x, i) != XINT (y, i))
1688 /* Two vectors must have the same length. */
1689 if (XVECLEN (x, i) != XVECLEN (y, i))
1692 /* And the corresponding elements must match. */
1693 for (j = 0; j < XVECLEN (x, i); j++)
1694 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j), movables) == 0)
1699 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables) == 0)
1704 if (strcmp (XSTR (x, i), XSTR (y, i)))
1709 /* These are just backpointers, so they don't matter. */
1715 /* It is believed that rtx's at this level will never
1716 contain anything but integers and other rtx's,
1717 except for within LABEL_REFs and SYMBOL_REFs. */
1725 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1726 insns in INSNS which use the reference. */
1729 add_label_notes (x, insns)
1733 enum rtx_code code = GET_CODE (x);
1738 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1740 /* This code used to ignore labels that referred to dispatch tables to
1741 avoid flow generating (slighly) worse code.
1743 We no longer ignore such label references (see LABEL_REF handling in
1744 mark_jump_label for additional information). */
1745 for (insn = insns; insn; insn = NEXT_INSN (insn))
1746 if (reg_mentioned_p (XEXP (x, 0), insn))
1747 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, XEXP (x, 0),
1751 fmt = GET_RTX_FORMAT (code);
1752 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1755 add_label_notes (XEXP (x, i), insns);
1756 else if (fmt[i] == 'E')
1757 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1758 add_label_notes (XVECEXP (x, i, j), insns);
1762 /* Scan MOVABLES, and move the insns that deserve to be moved.
1763 If two matching movables are combined, replace one reg with the
1764 other throughout. */
1767 move_movables (movables, threshold, insn_count, loop_start, end, nregs)
1768 struct movable *movables;
1776 register struct movable *m;
1778 /* Map of pseudo-register replacements to handle combining
1779 when we move several insns that load the same value
1780 into different pseudo-registers. */
1781 rtx *reg_map = (rtx *) xcalloc (nregs, sizeof (rtx));
1782 char *already_moved = (char *) xcalloc (nregs, sizeof (char));
1786 for (m = movables; m; m = m->next)
1788 /* Describe this movable insn. */
1790 if (loop_dump_stream)
1792 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1793 INSN_UID (m->insn), m->regno, m->lifetime);
1795 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1797 fprintf (loop_dump_stream, "cond ");
1799 fprintf (loop_dump_stream, "force ");
1801 fprintf (loop_dump_stream, "global ");
1803 fprintf (loop_dump_stream, "done ");
1805 fprintf (loop_dump_stream, "move-insn ");
1807 fprintf (loop_dump_stream, "matches %d ",
1808 INSN_UID (m->match->insn));
1810 fprintf (loop_dump_stream, "forces %d ",
1811 INSN_UID (m->forces->insn));
1814 /* Count movables. Value used in heuristics in strength_reduce. */
1817 /* Ignore the insn if it's already done (it matched something else).
1818 Otherwise, see if it is now safe to move. */
1822 || (1 == invariant_p (m->set_src)
1823 && (m->dependencies == 0
1824 || 1 == invariant_p (m->dependencies))
1826 || 1 == consec_sets_invariant_p (m->set_dest,
1829 && (! m->forces || m->forces->done))
1833 int savings = m->savings;
1835 /* We have an insn that is safe to move.
1836 Compute its desirability. */
1841 if (loop_dump_stream)
1842 fprintf (loop_dump_stream, "savings %d ", savings);
1844 if (moved_once[regno] && loop_dump_stream)
1845 fprintf (loop_dump_stream, "halved since already moved ");
1847 /* An insn MUST be moved if we already moved something else
1848 which is safe only if this one is moved too: that is,
1849 if already_moved[REGNO] is nonzero. */
1851 /* An insn is desirable to move if the new lifetime of the
1852 register is no more than THRESHOLD times the old lifetime.
1853 If it's not desirable, it means the loop is so big
1854 that moving won't speed things up much,
1855 and it is liable to make register usage worse. */
1857 /* It is also desirable to move if it can be moved at no
1858 extra cost because something else was already moved. */
1860 if (already_moved[regno]
1861 || flag_move_all_movables
1862 || (threshold * savings * m->lifetime) >=
1863 (moved_once[regno] ? insn_count * 2 : insn_count)
1864 || (m->forces && m->forces->done
1865 && VARRAY_INT (n_times_set, m->forces->regno) == 1))
1868 register struct movable *m1;
1869 rtx first = NULL_RTX;
1871 /* Now move the insns that set the reg. */
1873 if (m->partial && m->match)
1877 /* Find the end of this chain of matching regs.
1878 Thus, we load each reg in the chain from that one reg.
1879 And that reg is loaded with 0 directly,
1880 since it has ->match == 0. */
1881 for (m1 = m; m1->match; m1 = m1->match);
1882 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1883 SET_DEST (PATTERN (m1->insn)));
1884 i1 = emit_insn_before (newpat, loop_start);
1886 /* Mark the moved, invariant reg as being allowed to
1887 share a hard reg with the other matching invariant. */
1888 REG_NOTES (i1) = REG_NOTES (m->insn);
1889 r1 = SET_DEST (PATTERN (m->insn));
1890 r2 = SET_DEST (PATTERN (m1->insn));
1892 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1893 gen_rtx_EXPR_LIST (VOIDmode, r2,
1895 delete_insn (m->insn);
1900 if (loop_dump_stream)
1901 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1903 /* If we are to re-generate the item being moved with a
1904 new move insn, first delete what we have and then emit
1905 the move insn before the loop. */
1906 else if (m->move_insn)
1910 for (count = m->consec; count >= 0; count--)
1912 /* If this is the first insn of a library call sequence,
1914 if (GET_CODE (p) != NOTE
1915 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1918 /* If this is the last insn of a libcall sequence, then
1919 delete every insn in the sequence except the last.
1920 The last insn is handled in the normal manner. */
1921 if (GET_CODE (p) != NOTE
1922 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1924 temp = XEXP (temp, 0);
1926 temp = delete_insn (temp);
1930 p = delete_insn (p);
1932 /* simplify_giv_expr expects that it can walk the insns
1933 at m->insn forwards and see this old sequence we are
1934 tossing here. delete_insn does preserve the next
1935 pointers, but when we skip over a NOTE we must fix
1936 it up. Otherwise that code walks into the non-deleted
1938 while (p && GET_CODE (p) == NOTE)
1939 p = NEXT_INSN (temp) = NEXT_INSN (p);
1943 emit_move_insn (m->set_dest, m->set_src);
1944 temp = get_insns ();
1947 add_label_notes (m->set_src, temp);
1949 i1 = emit_insns_before (temp, loop_start);
1950 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1952 = gen_rtx_EXPR_LIST (m->is_equiv ? REG_EQUIV : REG_EQUAL,
1953 m->set_src, REG_NOTES (i1));
1955 if (loop_dump_stream)
1956 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1958 /* The more regs we move, the less we like moving them. */
1963 for (count = m->consec; count >= 0; count--)
1967 /* If first insn of libcall sequence, skip to end. */
1968 /* Do this at start of loop, since p is guaranteed to
1970 if (GET_CODE (p) != NOTE
1971 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1974 /* If last insn of libcall sequence, move all
1975 insns except the last before the loop. The last
1976 insn is handled in the normal manner. */
1977 if (GET_CODE (p) != NOTE
1978 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1982 rtx fn_address_insn = 0;
1985 for (temp = XEXP (temp, 0); temp != p;
1986 temp = NEXT_INSN (temp))
1992 if (GET_CODE (temp) == NOTE)
1995 body = PATTERN (temp);
1997 /* Find the next insn after TEMP,
1998 not counting USE or NOTE insns. */
1999 for (next = NEXT_INSN (temp); next != p;
2000 next = NEXT_INSN (next))
2001 if (! (GET_CODE (next) == INSN
2002 && GET_CODE (PATTERN (next)) == USE)
2003 && GET_CODE (next) != NOTE)
2006 /* If that is the call, this may be the insn
2007 that loads the function address.
2009 Extract the function address from the insn
2010 that loads it into a register.
2011 If this insn was cse'd, we get incorrect code.
2013 So emit a new move insn that copies the
2014 function address into the register that the
2015 call insn will use. flow.c will delete any
2016 redundant stores that we have created. */
2017 if (GET_CODE (next) == CALL_INSN
2018 && GET_CODE (body) == SET
2019 && GET_CODE (SET_DEST (body)) == REG
2020 && (n = find_reg_note (temp, REG_EQUAL,
2023 fn_reg = SET_SRC (body);
2024 if (GET_CODE (fn_reg) != REG)
2025 fn_reg = SET_DEST (body);
2026 fn_address = XEXP (n, 0);
2027 fn_address_insn = temp;
2029 /* We have the call insn.
2030 If it uses the register we suspect it might,
2031 load it with the correct address directly. */
2032 if (GET_CODE (temp) == CALL_INSN
2034 && reg_referenced_p (fn_reg, body))
2035 emit_insn_after (gen_move_insn (fn_reg,
2039 if (GET_CODE (temp) == CALL_INSN)
2041 i1 = emit_call_insn_before (body, loop_start);
2042 /* Because the USAGE information potentially
2043 contains objects other than hard registers
2044 we need to copy it. */
2045 if (CALL_INSN_FUNCTION_USAGE (temp))
2046 CALL_INSN_FUNCTION_USAGE (i1)
2047 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
2050 i1 = emit_insn_before (body, loop_start);
2053 if (temp == fn_address_insn)
2054 fn_address_insn = i1;
2055 REG_NOTES (i1) = REG_NOTES (temp);
2061 if (m->savemode != VOIDmode)
2063 /* P sets REG to zero; but we should clear only
2064 the bits that are not covered by the mode
2066 rtx reg = m->set_dest;
2072 (GET_MODE (reg), and_optab, reg,
2073 GEN_INT ((((HOST_WIDE_INT) 1
2074 << GET_MODE_BITSIZE (m->savemode)))
2076 reg, 1, OPTAB_LIB_WIDEN);
2080 emit_move_insn (reg, tem);
2081 sequence = gen_sequence ();
2083 i1 = emit_insn_before (sequence, loop_start);
2085 else if (GET_CODE (p) == CALL_INSN)
2087 i1 = emit_call_insn_before (PATTERN (p), loop_start);
2088 /* Because the USAGE information potentially
2089 contains objects other than hard registers
2090 we need to copy it. */
2091 if (CALL_INSN_FUNCTION_USAGE (p))
2092 CALL_INSN_FUNCTION_USAGE (i1)
2093 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2095 else if (count == m->consec && m->move_insn_first)
2097 /* The SET_SRC might not be invariant, so we must
2098 use the REG_EQUAL note. */
2100 emit_move_insn (m->set_dest, m->set_src);
2101 temp = get_insns ();
2104 add_label_notes (m->set_src, temp);
2106 i1 = emit_insns_before (temp, loop_start);
2107 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2109 = gen_rtx_EXPR_LIST ((m->is_equiv ? REG_EQUIV
2111 m->set_src, REG_NOTES (i1));
2114 i1 = emit_insn_before (PATTERN (p), loop_start);
2116 if (REG_NOTES (i1) == 0)
2118 REG_NOTES (i1) = REG_NOTES (p);
2120 /* If there is a REG_EQUAL note present whose value
2121 is not loop invariant, then delete it, since it
2122 may cause problems with later optimization passes.
2123 It is possible for cse to create such notes
2124 like this as a result of record_jump_cond. */
2126 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2127 && ! invariant_p (XEXP (temp, 0)))
2128 remove_note (i1, temp);
2134 if (loop_dump_stream)
2135 fprintf (loop_dump_stream, " moved to %d",
2138 /* If library call, now fix the REG_NOTES that contain
2139 insn pointers, namely REG_LIBCALL on FIRST
2140 and REG_RETVAL on I1. */
2141 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2143 XEXP (temp, 0) = first;
2144 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2145 XEXP (temp, 0) = i1;
2152 /* simplify_giv_expr expects that it can walk the insns
2153 at m->insn forwards and see this old sequence we are
2154 tossing here. delete_insn does preserve the next
2155 pointers, but when we skip over a NOTE we must fix
2156 it up. Otherwise that code walks into the non-deleted
2158 while (p && GET_CODE (p) == NOTE)
2159 p = NEXT_INSN (temp) = NEXT_INSN (p);
2162 /* The more regs we move, the less we like moving them. */
2166 /* Any other movable that loads the same register
2168 already_moved[regno] = 1;
2170 /* This reg has been moved out of one loop. */
2171 moved_once[regno] = 1;
2173 /* The reg set here is now invariant. */
2175 VARRAY_INT (set_in_loop, regno) = 0;
2179 /* Change the length-of-life info for the register
2180 to say it lives at least the full length of this loop.
2181 This will help guide optimizations in outer loops. */
2183 if (uid_luid[REGNO_FIRST_UID (regno)] > INSN_LUID (loop_start))
2184 /* This is the old insn before all the moved insns.
2185 We can't use the moved insn because it is out of range
2186 in uid_luid. Only the old insns have luids. */
2187 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2188 if (uid_luid[REGNO_LAST_UID (regno)] < INSN_LUID (end))
2189 REGNO_LAST_UID (regno) = INSN_UID (end);
2191 /* Combine with this moved insn any other matching movables. */
2194 for (m1 = movables; m1; m1 = m1->next)
2199 /* Schedule the reg loaded by M1
2200 for replacement so that shares the reg of M.
2201 If the modes differ (only possible in restricted
2202 circumstances, make a SUBREG.
2204 Note this assumes that the target dependent files
2205 treat REG and SUBREG equally, including within
2206 GO_IF_LEGITIMATE_ADDRESS and in all the
2207 predicates since we never verify that replacing the
2208 original register with a SUBREG results in a
2209 recognizable insn. */
2210 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2211 reg_map[m1->regno] = m->set_dest;
2214 = gen_lowpart_common (GET_MODE (m1->set_dest),
2217 /* Get rid of the matching insn
2218 and prevent further processing of it. */
2221 /* if library call, delete all insn except last, which
2223 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2226 for (temp = XEXP (temp, 0); temp != m1->insn;
2227 temp = NEXT_INSN (temp))
2230 delete_insn (m1->insn);
2232 /* Any other movable that loads the same register
2234 already_moved[m1->regno] = 1;
2236 /* The reg merged here is now invariant,
2237 if the reg it matches is invariant. */
2239 VARRAY_INT (set_in_loop, m1->regno) = 0;
2242 else if (loop_dump_stream)
2243 fprintf (loop_dump_stream, "not desirable");
2245 else if (loop_dump_stream && !m->match)
2246 fprintf (loop_dump_stream, "not safe");
2248 if (loop_dump_stream)
2249 fprintf (loop_dump_stream, "\n");
2253 new_start = loop_start;
2255 /* Go through all the instructions in the loop, making
2256 all the register substitutions scheduled in REG_MAP. */
2257 for (p = new_start; p != end; p = NEXT_INSN (p))
2258 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2259 || GET_CODE (p) == CALL_INSN)
2261 replace_regs (PATTERN (p), reg_map, nregs, 0);
2262 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2268 free (already_moved);
2272 /* Scan X and replace the address of any MEM in it with ADDR.
2273 REG is the address that MEM should have before the replacement. */
2276 replace_call_address (x, reg, addr)
2279 register enum rtx_code code;
2281 register const char *fmt;
2285 code = GET_CODE (x);
2299 /* Short cut for very common case. */
2300 replace_call_address (XEXP (x, 1), reg, addr);
2304 /* Short cut for very common case. */
2305 replace_call_address (XEXP (x, 0), reg, addr);
2309 /* If this MEM uses a reg other than the one we expected,
2310 something is wrong. */
2311 if (XEXP (x, 0) != reg)
2320 fmt = GET_RTX_FORMAT (code);
2321 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2324 replace_call_address (XEXP (x, i), reg, addr);
2325 else if (fmt[i] == 'E')
2328 for (j = 0; j < XVECLEN (x, i); j++)
2329 replace_call_address (XVECEXP (x, i, j), reg, addr);
2335 /* Return the number of memory refs to addresses that vary
2339 count_nonfixed_reads (x)
2342 register enum rtx_code code;
2344 register const char *fmt;
2350 code = GET_CODE (x);
2364 return ((invariant_p (XEXP (x, 0)) != 1)
2365 + count_nonfixed_reads (XEXP (x, 0)));
2372 fmt = GET_RTX_FORMAT (code);
2373 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2376 value += count_nonfixed_reads (XEXP (x, i));
2377 else if (fmt[i] == 'E')
2380 for (j = 0; j < XVECLEN (x, i); j++)
2381 value += count_nonfixed_reads (XVECEXP (x, i, j));
2389 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2390 Replace it with an instruction to load just the low bytes
2391 if the machine supports such an instruction,
2392 and insert above LOOP_START an instruction to clear the register. */
2395 constant_high_bytes (p, loop_start)
2399 register int insn_code_number;
2401 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2402 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2407 gen_rtx_STRICT_LOW_PART
2409 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p)), 0)),
2410 SET_DEST (PATTERN (p)), 0)),
2411 XEXP (SET_SRC (PATTERN (p)), 0));
2413 insn_code_number = recog (new, p);
2415 if (insn_code_number)
2419 /* Clear destination register before the loop. */
2420 emit_insn_before (gen_rtx_SET (VOIDmode,
2421 SET_DEST (PATTERN (p)), const0_rtx),
2424 /* Inside the loop, just load the low part. */
2430 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2431 `has_call', `has_volatile', and `has_tablejump' within LOOP_INFO.
2432 Set the global variables `unknown_address_altered',
2433 `unknown_constant_address_altered', and `num_mem_sets'. Also, fill
2434 in the array `loop_mems' and the list `loop_store_mems'. */
2437 prescan_loop (start, end, loop_info)
2439 struct loop_info *loop_info;
2441 register int level = 1;
2443 /* The label after END. Jumping here is just like falling off the
2444 end of the loop. We use next_nonnote_insn instead of next_label
2445 as a hedge against the (pathological) case where some actual insn
2446 might end up between the two. */
2447 rtx exit_target = next_nonnote_insn (end);
2449 loop_info->num = uid_loop_num [INSN_UID (start)];
2450 loop_info->has_indirect_jump = indirect_jump_in_function;
2451 loop_info->has_call = 0;
2452 loop_info->has_volatile = 0;
2453 loop_info->has_tablejump = 0;
2454 loop_info->loops_enclosed = 1;
2455 loop_info->has_multiple_exit_targets = 0;
2456 loop_info->cont = 0;
2457 loop_info->vtop = 0;
2459 unknown_address_altered = 0;
2460 unknown_constant_address_altered = 0;
2461 loop_store_mems = NULL_RTX;
2462 first_loop_store_insn = NULL_RTX;
2466 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2467 insn = NEXT_INSN (insn))
2469 if (GET_CODE (insn) == NOTE)
2471 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2474 /* Count number of loops contained in this one. */
2475 loop_info->loops_enclosed++;
2477 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2486 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2489 loop_info->cont = insn;
2491 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP)
2493 /* If there is a NOTE_INSN_LOOP_VTOP, then this is a for
2494 or while style loop, with a loop exit test at the
2495 start. Thus, we can assume that the loop condition
2496 was true when the loop was entered. */
2498 loop_info->vtop = insn;
2501 else if (GET_CODE (insn) == CALL_INSN)
2503 if (! CONST_CALL_P (insn))
2504 unknown_address_altered = 1;
2505 loop_info->has_call = 1;
2507 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2509 rtx label1 = NULL_RTX;
2510 rtx label2 = NULL_RTX;
2512 if (volatile_refs_p (PATTERN (insn)))
2513 loop_info->has_volatile = 1;
2515 if (GET_CODE (insn) == JUMP_INSN
2516 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2517 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2518 loop_info->has_tablejump = 1;
2520 note_stores (PATTERN (insn), note_addr_stored, NULL);
2521 if (! first_loop_store_insn && loop_store_mems)
2522 first_loop_store_insn = insn;
2524 if (! loop_info->has_multiple_exit_targets
2525 && GET_CODE (insn) == JUMP_INSN
2526 && GET_CODE (PATTERN (insn)) == SET
2527 && SET_DEST (PATTERN (insn)) == pc_rtx)
2529 if (GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
2531 label1 = XEXP (SET_SRC (PATTERN (insn)), 1);
2532 label2 = XEXP (SET_SRC (PATTERN (insn)), 2);
2536 label1 = SET_SRC (PATTERN (insn));
2540 if (label1 && label1 != pc_rtx)
2542 if (GET_CODE (label1) != LABEL_REF)
2544 /* Something tricky. */
2545 loop_info->has_multiple_exit_targets = 1;
2548 else if (XEXP (label1, 0) != exit_target
2549 && LABEL_OUTSIDE_LOOP_P (label1))
2551 /* A jump outside the current loop. */
2552 loop_info->has_multiple_exit_targets = 1;
2562 else if (GET_CODE (insn) == RETURN)
2563 loop_info->has_multiple_exit_targets = 1;
2566 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2567 if (/* We can't tell what MEMs are aliased by what. */
2568 !unknown_address_altered
2569 /* An exception thrown by a called function might land us
2571 && !loop_info->has_call
2572 /* We don't want loads for MEMs moved to a location before the
2573 one at which their stack memory becomes allocated. (Note
2574 that this is not a problem for malloc, etc., since those
2575 require actual function calls. */
2576 && !current_function_calls_alloca
2577 /* There are ways to leave the loop other than falling off the
2579 && !loop_info->has_multiple_exit_targets)
2580 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2581 insn = NEXT_INSN (insn))
2582 for_each_rtx (&insn, insert_loop_mem, 0);
2585 /* LOOP_NUMBER_CONT_DOMINATOR is now the last label between the loop start
2586 and the continue note that is a the destination of a (cond)jump after
2587 the continue note. If there is any (cond)jump between the loop start
2588 and what we have so far as LOOP_NUMBER_CONT_DOMINATOR that has a
2589 target between LOOP_DOMINATOR and the continue note, move
2590 LOOP_NUMBER_CONT_DOMINATOR forward to that label; if a jump's
2591 destination cannot be determined, clear LOOP_NUMBER_CONT_DOMINATOR. */
2594 verify_dominator (loop_number)
2599 if (! loop_number_cont_dominator[loop_number])
2600 /* This can happen for an empty loop, e.g. in
2601 gcc.c-torture/compile/920410-2.c */
2603 if (loop_number_cont_dominator[loop_number] == const0_rtx)
2605 loop_number_cont_dominator[loop_number] = 0;
2608 for (insn = loop_number_loop_starts[loop_number];
2609 insn != loop_number_cont_dominator[loop_number];
2610 insn = NEXT_INSN (insn))
2612 if (GET_CODE (insn) == JUMP_INSN
2613 && GET_CODE (PATTERN (insn)) != RETURN)
2615 rtx label = JUMP_LABEL (insn);
2618 /* If it is not a jump we can easily understand or for
2619 which we do not have jump target information in the JUMP_LABEL
2620 field (consider ADDR_VEC and ADDR_DIFF_VEC insns), then clear
2621 LOOP_NUMBER_CONT_DOMINATOR. */
2622 if ((! condjump_p (insn)
2623 && ! condjump_in_parallel_p (insn))
2624 || label == NULL_RTX)
2626 loop_number_cont_dominator[loop_number] = NULL_RTX;
2630 label_luid = INSN_LUID (label);
2631 if (label_luid < INSN_LUID (loop_number_loop_cont[loop_number])
2633 > INSN_LUID (loop_number_cont_dominator[loop_number])))
2634 loop_number_cont_dominator[loop_number] = label;
2639 /* Scan the function looking for loops. Record the start and end of each loop.
2640 Also mark as invalid loops any loops that contain a setjmp or are branched
2641 to from outside the loop. */
2644 find_and_verify_loops (f)
2648 int current_loop = -1;
2652 compute_luids (f, NULL_RTX, 0);
2654 /* If there are jumps to undefined labels,
2655 treat them as jumps out of any/all loops.
2656 This also avoids writing past end of tables when there are no loops. */
2657 uid_loop_num[0] = -1;
2659 /* Find boundaries of loops, mark which loops are contained within
2660 loops, and invalidate loops that have setjmp. */
2662 for (insn = f; insn; insn = NEXT_INSN (insn))
2664 if (GET_CODE (insn) == NOTE)
2665 switch (NOTE_LINE_NUMBER (insn))
2667 case NOTE_INSN_LOOP_BEG:
2668 loop_number_loop_starts[++next_loop] = insn;
2669 loop_number_loop_ends[next_loop] = 0;
2670 loop_number_loop_cont[next_loop] = 0;
2671 loop_number_cont_dominator[next_loop] = 0;
2672 loop_outer_loop[next_loop] = current_loop;
2673 loop_invalid[next_loop] = 0;
2674 loop_number_exit_labels[next_loop] = 0;
2675 loop_number_exit_count[next_loop] = 0;
2676 current_loop = next_loop;
2679 case NOTE_INSN_SETJMP:
2680 /* In this case, we must invalidate our current loop and any
2682 for (loop = current_loop; loop != -1; loop = loop_outer_loop[loop])
2684 loop_invalid[loop] = 1;
2685 if (loop_dump_stream)
2686 fprintf (loop_dump_stream,
2687 "\nLoop at %d ignored due to setjmp.\n",
2688 INSN_UID (loop_number_loop_starts[loop]));
2692 case NOTE_INSN_LOOP_CONT:
2693 loop_number_loop_cont[current_loop] = insn;
2695 case NOTE_INSN_LOOP_END:
2696 if (current_loop == -1)
2699 loop_number_loop_ends[current_loop] = insn;
2700 verify_dominator (current_loop);
2701 current_loop = loop_outer_loop[current_loop];
2707 /* If for any loop, this is a jump insn between the NOTE_INSN_LOOP_CONT
2708 and NOTE_INSN_LOOP_END notes, update loop_number_loop_dominator. */
2709 else if (GET_CODE (insn) == JUMP_INSN
2710 && GET_CODE (PATTERN (insn)) != RETURN
2711 && current_loop >= 0)
2714 rtx label = JUMP_LABEL (insn);
2716 if (! condjump_p (insn) && ! condjump_in_parallel_p (insn))
2719 this_loop_num = current_loop;
2722 /* First see if we care about this loop. */
2723 if (loop_number_loop_cont[this_loop_num]
2724 && loop_number_cont_dominator[this_loop_num] != const0_rtx)
2726 /* If the jump destination is not known, invalidate
2727 loop_number_const_dominator. */
2729 loop_number_cont_dominator[this_loop_num] = const0_rtx;
2731 /* Check if the destination is between loop start and
2733 if ((INSN_LUID (label)
2734 < INSN_LUID (loop_number_loop_cont[this_loop_num]))
2735 && (INSN_LUID (label)
2736 > INSN_LUID (loop_number_loop_starts[this_loop_num]))
2737 /* And if there is no later destination already
2739 && (! loop_number_cont_dominator[this_loop_num]
2740 || (INSN_LUID (label)
2741 > INSN_LUID (loop_number_cont_dominator
2743 loop_number_cont_dominator[this_loop_num] = label;
2745 this_loop_num = loop_outer_loop[this_loop_num];
2747 while (this_loop_num >= 0);
2750 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2751 enclosing loop, but this doesn't matter. */
2752 uid_loop_num[INSN_UID (insn)] = current_loop;
2755 /* Any loop containing a label used in an initializer must be invalidated,
2756 because it can be jumped into from anywhere. */
2758 for (label = forced_labels; label; label = XEXP (label, 1))
2762 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2764 loop_num = loop_outer_loop[loop_num])
2765 loop_invalid[loop_num] = 1;
2768 /* Any loop containing a label used for an exception handler must be
2769 invalidated, because it can be jumped into from anywhere. */
2771 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2775 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2777 loop_num = loop_outer_loop[loop_num])
2778 loop_invalid[loop_num] = 1;
2781 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2782 loop that it is not contained within, that loop is marked invalid.
2783 If any INSN or CALL_INSN uses a label's address, then the loop containing
2784 that label is marked invalid, because it could be jumped into from
2787 Also look for blocks of code ending in an unconditional branch that
2788 exits the loop. If such a block is surrounded by a conditional
2789 branch around the block, move the block elsewhere (see below) and
2790 invert the jump to point to the code block. This may eliminate a
2791 label in our loop and will simplify processing by both us and a
2792 possible second cse pass. */
2794 for (insn = f; insn; insn = NEXT_INSN (insn))
2795 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2797 int this_loop_num = uid_loop_num[INSN_UID (insn)];
2799 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2801 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2806 for (loop_num = uid_loop_num[INSN_UID (XEXP (note, 0))];
2808 loop_num = loop_outer_loop[loop_num])
2809 loop_invalid[loop_num] = 1;
2813 if (GET_CODE (insn) != JUMP_INSN)
2816 mark_loop_jump (PATTERN (insn), this_loop_num);
2818 /* See if this is an unconditional branch outside the loop. */
2819 if (this_loop_num != -1
2820 && (GET_CODE (PATTERN (insn)) == RETURN
2821 || (simplejump_p (insn)
2822 && (uid_loop_num[INSN_UID (JUMP_LABEL (insn))]
2824 && get_max_uid () < max_uid_for_loop)
2827 rtx our_next = next_real_insn (insn);
2828 rtx last_insn_to_move = NEXT_INSN (insn);
2830 int outer_loop = -1;
2832 /* Go backwards until we reach the start of the loop, a label,
2834 for (p = PREV_INSN (insn);
2835 GET_CODE (p) != CODE_LABEL
2836 && ! (GET_CODE (p) == NOTE
2837 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2838 && GET_CODE (p) != JUMP_INSN;
2842 /* Check for the case where we have a jump to an inner nested
2843 loop, and do not perform the optimization in that case. */
2845 if (JUMP_LABEL (insn))
2847 dest_loop = uid_loop_num[INSN_UID (JUMP_LABEL (insn))];
2848 if (dest_loop != -1)
2850 for (outer_loop = dest_loop; outer_loop != -1;
2851 outer_loop = loop_outer_loop[outer_loop])
2852 if (outer_loop == this_loop_num)
2857 /* Make sure that the target of P is within the current loop. */
2859 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2860 && uid_loop_num[INSN_UID (JUMP_LABEL (p))] != this_loop_num)
2861 outer_loop = this_loop_num;
2863 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2864 we have a block of code to try to move.
2866 We look backward and then forward from the target of INSN
2867 to find a BARRIER at the same loop depth as the target.
2868 If we find such a BARRIER, we make a new label for the start
2869 of the block, invert the jump in P and point it to that label,
2870 and move the block of code to the spot we found. */
2872 if (outer_loop == -1
2873 && GET_CODE (p) == JUMP_INSN
2874 && JUMP_LABEL (p) != 0
2875 /* Just ignore jumps to labels that were never emitted.
2876 These always indicate compilation errors. */
2877 && INSN_UID (JUMP_LABEL (p)) != 0
2879 && ! simplejump_p (p)
2880 && next_real_insn (JUMP_LABEL (p)) == our_next
2881 /* If it's not safe to move the sequence, then we
2883 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2884 &last_insn_to_move))
2887 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2888 int target_loop_num = uid_loop_num[INSN_UID (target)];
2891 for (loc = target; loc; loc = PREV_INSN (loc))
2892 if (GET_CODE (loc) == BARRIER
2893 /* Don't move things inside a tablejump. */
2894 && ((loc2 = next_nonnote_insn (loc)) == 0
2895 || GET_CODE (loc2) != CODE_LABEL
2896 || (loc2 = next_nonnote_insn (loc2)) == 0
2897 || GET_CODE (loc2) != JUMP_INSN
2898 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2899 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2900 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2904 for (loc = target; loc; loc = NEXT_INSN (loc))
2905 if (GET_CODE (loc) == BARRIER
2906 /* Don't move things inside a tablejump. */
2907 && ((loc2 = next_nonnote_insn (loc)) == 0
2908 || GET_CODE (loc2) != CODE_LABEL
2909 || (loc2 = next_nonnote_insn (loc2)) == 0
2910 || GET_CODE (loc2) != JUMP_INSN
2911 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2912 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2913 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2918 rtx cond_label = JUMP_LABEL (p);
2919 rtx new_label = get_label_after (p);
2921 /* Ensure our label doesn't go away. */
2922 LABEL_NUSES (cond_label)++;
2924 /* Verify that uid_loop_num is large enough and that
2926 if (invert_jump (p, new_label))
2930 /* If no suitable BARRIER was found, create a suitable
2931 one before TARGET. Since TARGET is a fall through
2932 path, we'll need to insert an jump around our block
2933 and a add a BARRIER before TARGET.
2935 This creates an extra unconditional jump outside
2936 the loop. However, the benefits of removing rarely
2937 executed instructions from inside the loop usually
2938 outweighs the cost of the extra unconditional jump
2939 outside the loop. */
2944 temp = gen_jump (JUMP_LABEL (insn));
2945 temp = emit_jump_insn_before (temp, target);
2946 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2947 LABEL_NUSES (JUMP_LABEL (insn))++;
2948 loc = emit_barrier_before (target);
2951 /* Include the BARRIER after INSN and copy the
2953 new_label = squeeze_notes (new_label,
2955 reorder_insns (new_label, last_insn_to_move, loc);
2957 /* All those insns are now in TARGET_LOOP_NUM. */
2959 q != NEXT_INSN (last_insn_to_move);
2961 uid_loop_num[INSN_UID (q)] = target_loop_num;
2963 /* The label jumped to by INSN is no longer a loop exit.
2964 Unless INSN does not have a label (e.g., it is a
2965 RETURN insn), search loop_number_exit_labels to find
2966 its label_ref, and remove it. Also turn off
2967 LABEL_OUTSIDE_LOOP_P bit. */
2968 if (JUMP_LABEL (insn))
2973 r = loop_number_exit_labels[this_loop_num];
2974 r; q = r, r = LABEL_NEXTREF (r))
2975 if (XEXP (r, 0) == JUMP_LABEL (insn))
2977 LABEL_OUTSIDE_LOOP_P (r) = 0;
2979 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2981 loop_number_exit_labels[this_loop_num]
2982 = LABEL_NEXTREF (r);
2986 for (loop_num = this_loop_num;
2987 loop_num != -1 && loop_num != target_loop_num;
2988 loop_num = loop_outer_loop[loop_num])
2989 loop_number_exit_count[loop_num]--;
2991 /* If we didn't find it, then something is wrong. */
2996 /* P is now a jump outside the loop, so it must be put
2997 in loop_number_exit_labels, and marked as such.
2998 The easiest way to do this is to just call
2999 mark_loop_jump again for P. */
3000 mark_loop_jump (PATTERN (p), this_loop_num);
3002 /* If INSN now jumps to the insn after it,
3004 if (JUMP_LABEL (insn) != 0
3005 && (next_real_insn (JUMP_LABEL (insn))
3006 == next_real_insn (insn)))
3010 /* Continue the loop after where the conditional
3011 branch used to jump, since the only branch insn
3012 in the block (if it still remains) is an inter-loop
3013 branch and hence needs no processing. */
3014 insn = NEXT_INSN (cond_label);
3016 if (--LABEL_NUSES (cond_label) == 0)
3017 delete_insn (cond_label);
3019 /* This loop will be continued with NEXT_INSN (insn). */
3020 insn = PREV_INSN (insn);
3027 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
3028 loops it is contained in, mark the target loop invalid.
3030 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
3033 mark_loop_jump (x, loop_num)
3041 switch (GET_CODE (x))
3054 /* There could be a label reference in here. */
3055 mark_loop_jump (XEXP (x, 0), loop_num);
3061 mark_loop_jump (XEXP (x, 0), loop_num);
3062 mark_loop_jump (XEXP (x, 1), loop_num);
3066 /* This may refer to a LABEL_REF or SYMBOL_REF. */
3067 mark_loop_jump (XEXP (x, 1), loop_num);
3072 mark_loop_jump (XEXP (x, 0), loop_num);
3076 dest_loop = uid_loop_num[INSN_UID (XEXP (x, 0))];
3078 /* Link together all labels that branch outside the loop. This
3079 is used by final_[bg]iv_value and the loop unrolling code. Also
3080 mark this LABEL_REF so we know that this branch should predict
3083 /* A check to make sure the label is not in an inner nested loop,
3084 since this does not count as a loop exit. */
3085 if (dest_loop != -1)
3087 for (outer_loop = dest_loop; outer_loop != -1;
3088 outer_loop = loop_outer_loop[outer_loop])
3089 if (outer_loop == loop_num)
3095 if (loop_num != -1 && outer_loop == -1)
3097 LABEL_OUTSIDE_LOOP_P (x) = 1;
3098 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
3099 loop_number_exit_labels[loop_num] = x;
3101 for (outer_loop = loop_num;
3102 outer_loop != -1 && outer_loop != dest_loop;
3103 outer_loop = loop_outer_loop[outer_loop])
3104 loop_number_exit_count[outer_loop]++;
3107 /* If this is inside a loop, but not in the current loop or one enclosed
3108 by it, it invalidates at least one loop. */
3110 if (dest_loop == -1)
3113 /* We must invalidate every nested loop containing the target of this
3114 label, except those that also contain the jump insn. */
3116 for (; dest_loop != -1; dest_loop = loop_outer_loop[dest_loop])
3118 /* Stop when we reach a loop that also contains the jump insn. */
3119 for (outer_loop = loop_num; outer_loop != -1;
3120 outer_loop = loop_outer_loop[outer_loop])
3121 if (dest_loop == outer_loop)
3124 /* If we get here, we know we need to invalidate a loop. */
3125 if (loop_dump_stream && ! loop_invalid[dest_loop])
3126 fprintf (loop_dump_stream,
3127 "\nLoop at %d ignored due to multiple entry points.\n",
3128 INSN_UID (loop_number_loop_starts[dest_loop]));
3130 loop_invalid[dest_loop] = 1;
3135 /* If this is not setting pc, ignore. */
3136 if (SET_DEST (x) == pc_rtx)
3137 mark_loop_jump (SET_SRC (x), loop_num);
3141 mark_loop_jump (XEXP (x, 1), loop_num);
3142 mark_loop_jump (XEXP (x, 2), loop_num);
3147 for (i = 0; i < XVECLEN (x, 0); i++)
3148 mark_loop_jump (XVECEXP (x, 0, i), loop_num);
3152 for (i = 0; i < XVECLEN (x, 1); i++)
3153 mark_loop_jump (XVECEXP (x, 1, i), loop_num);
3157 /* Strictly speaking this is not a jump into the loop, only a possible
3158 jump out of the loop. However, we have no way to link the destination
3159 of this jump onto the list of exit labels. To be safe we mark this
3160 loop and any containing loops as invalid. */
3163 for (outer_loop = loop_num; outer_loop != -1;
3164 outer_loop = loop_outer_loop[outer_loop])
3166 if (loop_dump_stream && ! loop_invalid[outer_loop])
3167 fprintf (loop_dump_stream,
3168 "\nLoop at %d ignored due to unknown exit jump.\n",
3169 INSN_UID (loop_number_loop_starts[outer_loop]));
3170 loop_invalid[outer_loop] = 1;
3177 /* Return nonzero if there is a label in the range from
3178 insn INSN to and including the insn whose luid is END
3179 INSN must have an assigned luid (i.e., it must not have
3180 been previously created by loop.c). */
3183 labels_in_range_p (insn, end)
3187 while (insn && INSN_LUID (insn) <= end)
3189 if (GET_CODE (insn) == CODE_LABEL)
3191 insn = NEXT_INSN (insn);
3197 /* Record that a memory reference X is being set. */
3200 note_addr_stored (x, y, data)
3202 rtx y ATTRIBUTE_UNUSED;
3203 void *data ATTRIBUTE_UNUSED;
3205 if (x == 0 || GET_CODE (x) != MEM)
3208 /* Count number of memory writes.
3209 This affects heuristics in strength_reduce. */
3212 /* BLKmode MEM means all memory is clobbered. */
3213 if (GET_MODE (x) == BLKmode)
3215 if (RTX_UNCHANGING_P (x))
3216 unknown_constant_address_altered = 1;
3218 unknown_address_altered = 1;
3223 loop_store_mems = gen_rtx_EXPR_LIST (VOIDmode, x, loop_store_mems);
3226 /* X is a value modified by an INSN that references a biv inside a loop
3227 exit test (ie, X is somehow related to the value of the biv). If X
3228 is a pseudo that is used more than once, then the biv is (effectively)
3229 used more than once. DATA is really an `int *', and is set if the
3230 biv is used more than once. */
3233 note_set_pseudo_multiple_uses (x, y, data)
3235 rtx y ATTRIBUTE_UNUSED;
3241 while (GET_CODE (x) == STRICT_LOW_PART
3242 || GET_CODE (x) == SIGN_EXTRACT
3243 || GET_CODE (x) == ZERO_EXTRACT
3244 || GET_CODE (x) == SUBREG)
3247 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
3250 /* If we do not have usage information, or if we know the register
3251 is used more than once, note that fact for check_dbra_loop. */
3252 if (REGNO (x) >= max_reg_before_loop
3253 || ! VARRAY_RTX (reg_single_usage, REGNO (x))
3254 || VARRAY_RTX (reg_single_usage, REGNO (x)) == const0_rtx)
3255 *((int *) data) = 1;
3258 /* Return nonzero if the rtx X is invariant over the current loop.
3260 The value is 2 if we refer to something only conditionally invariant.
3262 If `unknown_address_altered' is nonzero, no memory ref is invariant.
3263 Otherwise, a memory ref is invariant if it does not conflict with
3264 anything stored in `loop_store_mems'. */
3271 register enum rtx_code code;
3272 register const char *fmt;
3273 int conditional = 0;
3278 code = GET_CODE (x);
3288 /* A LABEL_REF is normally invariant, however, if we are unrolling
3289 loops, and this label is inside the loop, then it isn't invariant.
3290 This is because each unrolled copy of the loop body will have
3291 a copy of this label. If this was invariant, then an insn loading
3292 the address of this label into a register might get moved outside
3293 the loop, and then each loop body would end up using the same label.
3295 We don't know the loop bounds here though, so just fail for all
3297 if (flag_unroll_loops)
3304 case UNSPEC_VOLATILE:
3308 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3309 since the reg might be set by initialization within the loop. */
3311 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3312 || x == arg_pointer_rtx)
3313 && ! current_function_has_nonlocal_goto)
3316 if (this_loop_info.has_call
3317 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3320 if (VARRAY_INT (set_in_loop, REGNO (x)) < 0)
3323 return VARRAY_INT (set_in_loop, REGNO (x)) == 0;
3326 /* Volatile memory references must be rejected. Do this before
3327 checking for read-only items, so that volatile read-only items
3328 will be rejected also. */
3329 if (MEM_VOLATILE_P (x))
3332 /* If we had a subroutine call, any location in memory could
3333 have been clobbered. We used to test here for volatile and
3334 readonly, but true_dependence knows how to do that better
3336 if (RTX_UNCHANGING_P (x)
3337 ? unknown_constant_address_altered : unknown_address_altered)
3340 /* See if there is any dependence between a store and this load. */
3341 mem_list_entry = loop_store_mems;
3342 while (mem_list_entry)
3344 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3348 mem_list_entry = XEXP (mem_list_entry, 1);
3351 /* It's not invalidated by a store in memory
3352 but we must still verify the address is invariant. */
3356 /* Don't mess with insns declared volatile. */
3357 if (MEM_VOLATILE_P (x))
3365 fmt = GET_RTX_FORMAT (code);
3366 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3370 int tem = invariant_p (XEXP (x, i));
3376 else if (fmt[i] == 'E')
3379 for (j = 0; j < XVECLEN (x, i); j++)
3381 int tem = invariant_p (XVECEXP (x, i, j));
3391 return 1 + conditional;
3395 /* Return nonzero if all the insns in the loop that set REG
3396 are INSN and the immediately following insns,
3397 and if each of those insns sets REG in an invariant way
3398 (not counting uses of REG in them).
3400 The value is 2 if some of these insns are only conditionally invariant.
3402 We assume that INSN itself is the first set of REG
3403 and that its source is invariant. */
3406 consec_sets_invariant_p (reg, n_sets, insn)
3410 register rtx p = insn;
3411 register int regno = REGNO (reg);
3413 /* Number of sets we have to insist on finding after INSN. */
3414 int count = n_sets - 1;
3415 int old = VARRAY_INT (set_in_loop, regno);
3419 /* If N_SETS hit the limit, we can't rely on its value. */
3423 VARRAY_INT (set_in_loop, regno) = 0;
3427 register enum rtx_code code;
3431 code = GET_CODE (p);
3433 /* If library call, skip to end of it. */
3434 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3439 && (set = single_set (p))
3440 && GET_CODE (SET_DEST (set)) == REG
3441 && REGNO (SET_DEST (set)) == regno)
3443 this = invariant_p (SET_SRC (set));
3446 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3448 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3449 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3451 this = (CONSTANT_P (XEXP (temp, 0))
3452 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3453 && invariant_p (XEXP (temp, 0))));
3460 else if (code != NOTE)
3462 VARRAY_INT (set_in_loop, regno) = old;
3467 VARRAY_INT (set_in_loop, regno) = old;
3468 /* If invariant_p ever returned 2, we return 2. */
3469 return 1 + (value & 2);
3473 /* I don't think this condition is sufficient to allow INSN
3474 to be moved, so we no longer test it. */
3476 /* Return 1 if all insns in the basic block of INSN and following INSN
3477 that set REG are invariant according to TABLE. */
3480 all_sets_invariant_p (reg, insn, table)
3484 register rtx p = insn;
3485 register int regno = REGNO (reg);
3489 register enum rtx_code code;
3491 code = GET_CODE (p);
3492 if (code == CODE_LABEL || code == JUMP_INSN)
3494 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3495 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3496 && REGNO (SET_DEST (PATTERN (p))) == regno)
3498 if (!invariant_p (SET_SRC (PATTERN (p)), table))
3505 /* Look at all uses (not sets) of registers in X. For each, if it is
3506 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3507 a different insn, set USAGE[REGNO] to const0_rtx. */
3510 find_single_use_in_loop (insn, x, usage)
3515 enum rtx_code code = GET_CODE (x);
3516 const char *fmt = GET_RTX_FORMAT (code);
3520 VARRAY_RTX (usage, REGNO (x))
3521 = (VARRAY_RTX (usage, REGNO (x)) != 0
3522 && VARRAY_RTX (usage, REGNO (x)) != insn)
3523 ? const0_rtx : insn;
3525 else if (code == SET)
3527 /* Don't count SET_DEST if it is a REG; otherwise count things
3528 in SET_DEST because if a register is partially modified, it won't
3529 show up as a potential movable so we don't care how USAGE is set
3531 if (GET_CODE (SET_DEST (x)) != REG)
3532 find_single_use_in_loop (insn, SET_DEST (x), usage);
3533 find_single_use_in_loop (insn, SET_SRC (x), usage);
3536 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3538 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3539 find_single_use_in_loop (insn, XEXP (x, i), usage);
3540 else if (fmt[i] == 'E')
3541 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3542 find_single_use_in_loop (insn, XVECEXP (x, i, j), usage);
3546 /* Count and record any set in X which is contained in INSN. Update
3547 MAY_NOT_MOVE and LAST_SET for any register set in X. */
3550 count_one_set (insn, x, may_not_move, last_set)
3552 varray_type may_not_move;
3555 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3556 /* Don't move a reg that has an explicit clobber.
3557 It's not worth the pain to try to do it correctly. */
3558 VARRAY_CHAR (may_not_move, REGNO (XEXP (x, 0))) = 1;
3560 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3562 rtx dest = SET_DEST (x);
3563 while (GET_CODE (dest) == SUBREG
3564 || GET_CODE (dest) == ZERO_EXTRACT
3565 || GET_CODE (dest) == SIGN_EXTRACT
3566 || GET_CODE (dest) == STRICT_LOW_PART)
3567 dest = XEXP (dest, 0);
3568 if (GET_CODE (dest) == REG)
3570 register int regno = REGNO (dest);
3571 /* If this is the first setting of this reg
3572 in current basic block, and it was set before,
3573 it must be set in two basic blocks, so it cannot
3574 be moved out of the loop. */
3575 if (VARRAY_INT (set_in_loop, regno) > 0
3576 && last_set[regno] == 0)
3577 VARRAY_CHAR (may_not_move, regno) = 1;
3578 /* If this is not first setting in current basic block,
3579 see if reg was used in between previous one and this.
3580 If so, neither one can be moved. */
3581 if (last_set[regno] != 0
3582 && reg_used_between_p (dest, last_set[regno], insn))
3583 VARRAY_CHAR (may_not_move, regno) = 1;
3584 if (VARRAY_INT (set_in_loop, regno) < 127)
3585 ++VARRAY_INT (set_in_loop, regno);
3586 last_set[regno] = insn;
3591 /* Increment SET_IN_LOOP at the index of each register
3592 that is modified by an insn between FROM and TO.
3593 If the value of an element of SET_IN_LOOP becomes 127 or more,
3594 stop incrementing it, to avoid overflow.
3596 Store in SINGLE_USAGE[I] the single insn in which register I is
3597 used, if it is only used once. Otherwise, it is set to 0 (for no
3598 uses) or const0_rtx for more than one use. This parameter may be zero,
3599 in which case this processing is not done.
3601 Store in *COUNT_PTR the number of actual instruction
3602 in the loop. We use this to decide what is worth moving out. */
3604 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3605 In that case, it is the insn that last set reg n. */
3608 count_loop_regs_set (from, to, may_not_move, single_usage, count_ptr, nregs)
3609 register rtx from, to;
3610 varray_type may_not_move;
3611 varray_type single_usage;
3615 register rtx *last_set = (rtx *) xcalloc (nregs, sizeof (rtx));
3617 register int count = 0;
3619 for (insn = from; insn != to; insn = NEXT_INSN (insn))
3621 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
3625 /* Record registers that have exactly one use. */
3626 find_single_use_in_loop (insn, PATTERN (insn), single_usage);
3628 /* Include uses in REG_EQUAL notes. */
3629 if (REG_NOTES (insn))
3630 find_single_use_in_loop (insn, REG_NOTES (insn), single_usage);
3632 if (GET_CODE (PATTERN (insn)) == SET
3633 || GET_CODE (PATTERN (insn)) == CLOBBER)
3634 count_one_set (insn, PATTERN (insn), may_not_move, last_set);
3635 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3638 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
3639 count_one_set (insn, XVECEXP (PATTERN (insn), 0, i),
3640 may_not_move, last_set);
3644 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3645 bzero ((char *) last_set, nregs * sizeof (rtx));
3653 /* Given a loop that is bounded by LOOP_START and LOOP_END
3654 and that is entered at SCAN_START,
3655 return 1 if the register set in SET contained in insn INSN is used by
3656 any insn that precedes INSN in cyclic order starting
3657 from the loop entry point.
3659 We don't want to use INSN_LUID here because if we restrict INSN to those
3660 that have a valid INSN_LUID, it means we cannot move an invariant out
3661 from an inner loop past two loops. */
3664 loop_reg_used_before_p (set, insn, loop_start, scan_start, loop_end)
3665 rtx set, insn, loop_start, scan_start, loop_end;
3667 rtx reg = SET_DEST (set);
3670 /* Scan forward checking for register usage. If we hit INSN, we
3671 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3672 for (p = scan_start; p != insn; p = NEXT_INSN (p))
3674 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
3675 && reg_overlap_mentioned_p (reg, PATTERN (p)))
3685 /* A "basic induction variable" or biv is a pseudo reg that is set
3686 (within this loop) only by incrementing or decrementing it. */
3687 /* A "general induction variable" or giv is a pseudo reg whose
3688 value is a linear function of a biv. */
3690 /* Bivs are recognized by `basic_induction_var';
3691 Givs by `general_induction_var'. */
3693 /* Indexed by register number, indicates whether or not register is an
3694 induction variable, and if so what type. */
3696 varray_type reg_iv_type;
3698 /* Indexed by register number, contains pointer to `struct induction'
3699 if register is an induction variable. This holds general info for
3700 all induction variables. */
3702 varray_type reg_iv_info;
3704 /* Indexed by register number, contains pointer to `struct iv_class'
3705 if register is a basic induction variable. This holds info describing
3706 the class (a related group) of induction variables that the biv belongs
3709 struct iv_class **reg_biv_class;
3711 /* The head of a list which links together (via the next field)
3712 every iv class for the current loop. */
3714 struct iv_class *loop_iv_list;
3716 /* Givs made from biv increments are always splittable for loop unrolling.
3717 Since there is no regscan info for them, we have to keep track of them
3719 int first_increment_giv, last_increment_giv;
3721 /* Communication with routines called via `note_stores'. */
3723 static rtx note_insn;
3725 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3727 static rtx addr_placeholder;
3729 /* ??? Unfinished optimizations, and possible future optimizations,
3730 for the strength reduction code. */
3732 /* ??? The interaction of biv elimination, and recognition of 'constant'
3733 bivs, may cause problems. */
3735 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3736 performance problems.
3738 Perhaps don't eliminate things that can be combined with an addressing
3739 mode. Find all givs that have the same biv, mult_val, and add_val;
3740 then for each giv, check to see if its only use dies in a following
3741 memory address. If so, generate a new memory address and check to see
3742 if it is valid. If it is valid, then store the modified memory address,
3743 otherwise, mark the giv as not done so that it will get its own iv. */
3745 /* ??? Could try to optimize branches when it is known that a biv is always
3748 /* ??? When replace a biv in a compare insn, we should replace with closest
3749 giv so that an optimized branch can still be recognized by the combiner,
3750 e.g. the VAX acb insn. */
3752 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3753 was rerun in loop_optimize whenever a register was added or moved.
3754 Also, some of the optimizations could be a little less conservative. */
3756 /* Perform strength reduction and induction variable elimination.
3758 Pseudo registers created during this function will be beyond the last
3759 valid index in several tables including n_times_set and regno_last_uid.
3760 This does not cause a problem here, because the added registers cannot be
3761 givs outside of their loop, and hence will never be reconsidered.
3762 But scan_loop must check regnos to make sure they are in bounds.
3764 SCAN_START is the first instruction in the loop, as the loop would
3765 actually be executed. END is the NOTE_INSN_LOOP_END. LOOP_TOP is
3766 the first instruction in the loop, as it is layed out in the
3767 instruction stream. LOOP_START is the NOTE_INSN_LOOP_BEG.
3768 LOOP_CONT is the NOTE_INSN_LOOP_CONT. */
3771 strength_reduce (scan_start, end, loop_top, insn_count,
3772 loop_start, loop_end, loop_info, loop_cont, unroll_p, bct_p)
3779 struct loop_info *loop_info;
3781 int unroll_p, bct_p ATTRIBUTE_UNUSED;
3789 /* This is 1 if current insn is not executed at least once for every loop
3791 int not_every_iteration = 0;
3792 /* This is 1 if current insn may be executed more than once for every
3794 int maybe_multiple = 0;
3795 /* This is 1 if we have past a branch back to the top of the loop
3796 (aka a loop latch). */
3797 int past_loop_latch = 0;
3798 /* Temporary list pointers for traversing loop_iv_list. */
3799 struct iv_class *bl, **backbl;
3800 /* Ratio of extra register life span we can justify
3801 for saving an instruction. More if loop doesn't call subroutines
3802 since in that case saving an insn makes more difference
3803 and more registers are available. */
3804 /* ??? could set this to last value of threshold in move_movables */
3805 int threshold = (loop_info->has_call ? 1 : 2) * (3 + n_non_fixed_regs);
3806 /* Map of pseudo-register replacements. */
3807 rtx *reg_map = NULL;
3811 rtx end_insert_before;
3813 int n_extra_increment;
3814 int unrolled_insn_copies = 0;
3816 /* If scan_start points to the loop exit test, we have to be wary of
3817 subversive use of gotos inside expression statements. */
3818 if (prev_nonnote_insn (scan_start) != prev_nonnote_insn (loop_start))
3819 maybe_multiple = back_branch_in_range_p (scan_start, loop_start, loop_end);
3821 VARRAY_INT_INIT (reg_iv_type, max_reg_before_loop, "reg_iv_type");
3822 VARRAY_GENERIC_PTR_INIT (reg_iv_info, max_reg_before_loop, "reg_iv_info");
3823 reg_biv_class = (struct iv_class **)
3824 xcalloc (max_reg_before_loop, sizeof (struct iv_class *));
3827 addr_placeholder = gen_reg_rtx (Pmode);
3829 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3830 must be put before this insn, so that they will appear in the right
3831 order (i.e. loop order).
3833 If loop_end is the end of the current function, then emit a
3834 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3836 if (NEXT_INSN (loop_end) != 0)
3837 end_insert_before = NEXT_INSN (loop_end);
3839 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop_end);
3841 /* Scan through loop to find all possible bivs. */
3843 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
3845 p = next_insn_in_loop (p, scan_start, end, loop_top))
3847 if (GET_CODE (p) == INSN
3848 && (set = single_set (p))
3849 && GET_CODE (SET_DEST (set)) == REG)
3851 dest_reg = SET_DEST (set);
3852 if (REGNO (dest_reg) < max_reg_before_loop
3853 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
3854 && REG_IV_TYPE (REGNO (dest_reg)) != NOT_BASIC_INDUCT)
3856 int multi_insn_incr = 0;
3858 if (basic_induction_var (SET_SRC (set), GET_MODE (SET_SRC (set)),
3859 dest_reg, p, &inc_val, &mult_val,
3860 &location, &multi_insn_incr))
3862 /* It is a possible basic induction variable.
3863 Create and initialize an induction structure for it. */
3866 = (struct induction *) alloca (sizeof (struct induction));
3868 record_biv (v, p, dest_reg, inc_val, mult_val, location,
3869 not_every_iteration, maybe_multiple,
3871 REG_IV_TYPE (REGNO (dest_reg)) = BASIC_INDUCT;
3873 else if (REGNO (dest_reg) < max_reg_before_loop)
3874 REG_IV_TYPE (REGNO (dest_reg)) = NOT_BASIC_INDUCT;
3878 /* Past CODE_LABEL, we get to insns that may be executed multiple
3879 times. The only way we can be sure that they can't is if every
3880 jump insn between here and the end of the loop either
3881 returns, exits the loop, is a jump to a location that is still
3882 behind the label, or is a jump to the loop start. */
3884 if (GET_CODE (p) == CODE_LABEL)
3892 insn = NEXT_INSN (insn);
3893 if (insn == scan_start)
3901 if (insn == scan_start)
3905 if (GET_CODE (insn) == JUMP_INSN
3906 && GET_CODE (PATTERN (insn)) != RETURN
3907 && (! condjump_p (insn)
3908 || (JUMP_LABEL (insn) != 0
3909 && JUMP_LABEL (insn) != scan_start
3910 && ! loop_insn_first_p (p, JUMP_LABEL (insn)))))
3918 /* Past a jump, we get to insns for which we can't count
3919 on whether they will be executed during each iteration. */
3920 /* This code appears twice in strength_reduce. There is also similar
3921 code in scan_loop. */
3922 if (GET_CODE (p) == JUMP_INSN
3923 /* If we enter the loop in the middle, and scan around to the
3924 beginning, don't set not_every_iteration for that.
3925 This can be any kind of jump, since we want to know if insns
3926 will be executed if the loop is executed. */
3927 && ! (JUMP_LABEL (p) == loop_top
3928 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3929 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
3933 /* If this is a jump outside the loop, then it also doesn't
3934 matter. Check to see if the target of this branch is on the
3935 loop_number_exits_labels list. */
3937 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
3939 label = LABEL_NEXTREF (label))
3940 if (XEXP (label, 0) == JUMP_LABEL (p))
3944 not_every_iteration = 1;
3947 else if (GET_CODE (p) == NOTE)
3949 /* At the virtual top of a converted loop, insns are again known to
3950 be executed each iteration: logically, the loop begins here
3951 even though the exit code has been duplicated.
3953 Insns are also again known to be executed each iteration at
3954 the LOOP_CONT note. */
3955 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
3956 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
3958 not_every_iteration = 0;
3959 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3961 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3965 /* Note if we pass a loop latch. If we do, then we can not clear
3966 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
3967 a loop since a jump before the last CODE_LABEL may have started
3968 a new loop iteration.
3970 Note that LOOP_TOP is only set for rotated loops and we need
3971 this check for all loops, so compare against the CODE_LABEL
3972 which immediately follows LOOP_START. */
3973 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == NEXT_INSN (loop_start))
3974 past_loop_latch = 1;
3976 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3977 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3978 or not an insn is known to be executed each iteration of the
3979 loop, whether or not any iterations are known to occur.
3981 Therefore, if we have just passed a label and have no more labels
3982 between here and the test insn of the loop, and we have not passed
3983 a jump to the top of the loop, then we know these insns will be
3984 executed each iteration. */
3986 if (not_every_iteration
3987 && ! past_loop_latch
3988 && GET_CODE (p) == CODE_LABEL
3989 && no_labels_between_p (p, loop_end)
3990 && loop_insn_first_p (p, loop_cont))
3991 not_every_iteration = 0;
3994 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3995 Make a sanity check against n_times_set. */
3996 for (backbl = &loop_iv_list, bl = *backbl; bl; bl = bl->next)
4000 if (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
4001 /* Above happens if register modified by subreg, etc. */
4002 /* Make sure it is not recognized as a basic induction var: */
4003 || VARRAY_INT (n_times_set, bl->regno) != bl->biv_count
4004 /* If never incremented, it is invariant that we decided not to
4005 move. So leave it alone. */
4006 || ! bl->incremented)
4008 else if (bl->biv_count > 1)
4010 /* ??? If we have multiple increments for this BIV, and any of
4011 them take multiple insns to perform the increment, drop the
4012 BIV, since the bit below that converts the extra increments
4013 into GIVs can't handle the multiple insn increment. */
4015 struct induction *v;
4016 for (v = bl->biv; v ; v = v->next_iv)
4017 if (v->multi_insn_incr)
4023 if (loop_dump_stream)
4024 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
4026 (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
4027 ? "not induction variable"
4028 : (! bl->incremented ? "never incremented"
4031 REG_IV_TYPE (bl->regno) = NOT_BASIC_INDUCT;
4038 if (loop_dump_stream)
4039 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
4043 /* Exit if there are no bivs. */
4046 /* Can still unroll the loop anyways, but indicate that there is no
4047 strength reduction info available. */
4049 unroll_loop (loop_end, insn_count, loop_start, end_insert_before,
4055 /* Find initial value for each biv by searching backwards from loop_start,
4056 halting at first label. Also record any test condition. */
4059 for (p = loop_start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
4063 if (GET_CODE (p) == CALL_INSN)
4066 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4067 || GET_CODE (p) == CALL_INSN)
4068 note_stores (PATTERN (p), record_initial, NULL);
4070 /* Record any test of a biv that branches around the loop if no store
4071 between it and the start of loop. We only care about tests with
4072 constants and registers and only certain of those. */
4073 if (GET_CODE (p) == JUMP_INSN
4074 && JUMP_LABEL (p) != 0
4075 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop_end)
4076 && (test = get_condition_for_loop (p)) != 0
4077 && GET_CODE (XEXP (test, 0)) == REG
4078 && REGNO (XEXP (test, 0)) < max_reg_before_loop
4079 && (bl = reg_biv_class[REGNO (XEXP (test, 0))]) != 0
4080 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop_start)
4081 && bl->init_insn == 0)
4083 /* If an NE test, we have an initial value! */
4084 if (GET_CODE (test) == NE)
4087 bl->init_set = gen_rtx_SET (VOIDmode,
4088 XEXP (test, 0), XEXP (test, 1));
4091 bl->initial_test = test;
4095 /* Look at the each biv and see if we can say anything better about its
4096 initial value from any initializing insns set up above. (This is done
4097 in two passes to avoid missing SETs in a PARALLEL.) */
4098 for (backbl = &loop_iv_list; (bl = *backbl); backbl = &bl->next)
4103 if (! bl->init_insn)
4106 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
4107 is a constant, use the value of that. */
4108 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
4109 && CONSTANT_P (XEXP (note, 0)))
4110 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
4111 && CONSTANT_P (XEXP (note, 0))))
4112 src = XEXP (note, 0);
4114 src = SET_SRC (bl->init_set);
4116 if (loop_dump_stream)
4117 fprintf (loop_dump_stream,
4118 "Biv %d initialized at insn %d: initial value ",
4119 bl->regno, INSN_UID (bl->init_insn));
4121 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
4122 || GET_MODE (src) == VOIDmode)
4123 && valid_initial_value_p (src, bl->init_insn, call_seen, loop_start))
4125 bl->initial_value = src;
4127 if (loop_dump_stream)
4129 if (GET_CODE (src) == CONST_INT)
4131 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (src));
4132 fputc ('\n', loop_dump_stream);
4136 print_rtl (loop_dump_stream, src);
4137 fprintf (loop_dump_stream, "\n");
4143 struct iv_class *bl2 = 0;
4144 rtx increment = NULL_RTX;
4146 /* Biv initial value is not a simple move. If it is the sum of
4147 another biv and a constant, check if both bivs are incremented
4148 in lockstep. Then we are actually looking at a giv.
4149 For simplicity, we only handle the case where there is but a
4150 single increment, and the register is not used elsewhere. */
4151 if (bl->biv_count == 1
4152 && bl->regno < max_reg_before_loop
4153 && uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4154 && GET_CODE (src) == PLUS
4155 && GET_CODE (XEXP (src, 0)) == REG
4156 && CONSTANT_P (XEXP (src, 1))
4157 && ((increment = biv_total_increment (bl, loop_start, loop_end))
4160 int regno = REGNO (XEXP (src, 0));
4162 for (bl2 = loop_iv_list; bl2; bl2 = bl2->next)
4163 if (bl2->regno == regno)
4167 /* Now, can we transform this biv into a giv? */
4169 && bl2->biv_count == 1
4170 && rtx_equal_p (increment,
4171 biv_total_increment (bl2, loop_start, loop_end))
4172 /* init_insn is only set to insns that are before loop_start
4173 without any intervening labels. */
4174 && ! reg_set_between_p (bl2->biv->src_reg,
4175 PREV_INSN (bl->init_insn), loop_start)
4176 /* The register from BL2 must be set before the register from
4177 BL is set, or we must be able to move the latter set after
4178 the former set. Currently there can't be any labels
4179 in-between when biv_total_increment returns nonzero both times
4180 but we test it here in case some day some real cfg analysis
4181 gets used to set always_computable. */
4182 && (loop_insn_first_p (bl2->biv->insn, bl->biv->insn)
4183 ? no_labels_between_p (bl2->biv->insn, bl->biv->insn)
4184 : (! reg_used_between_p (bl->biv->src_reg, bl->biv->insn,
4186 && no_jumps_between_p (bl->biv->insn, bl2->biv->insn)))
4187 && validate_change (bl->biv->insn,
4188 &SET_SRC (single_set (bl->biv->insn)),
4191 int loop_num = uid_loop_num[INSN_UID (loop_start)];
4192 rtx dominator = loop_number_cont_dominator[loop_num];
4193 rtx giv = bl->biv->src_reg;
4194 rtx giv_insn = bl->biv->insn;
4195 rtx after_giv = NEXT_INSN (giv_insn);
4197 if (loop_dump_stream)
4198 fprintf (loop_dump_stream, "is giv of biv %d\n", bl2->regno);
4199 /* Let this giv be discovered by the generic code. */
4200 REG_IV_TYPE (bl->regno) = UNKNOWN_INDUCT;
4201 reg_biv_class[bl->regno] = NULL_PTR;
4202 /* We can get better optimization if we can move the giv setting
4203 before the first giv use. */
4205 && ! loop_insn_first_p (dominator, scan_start)
4206 && ! reg_set_between_p (bl2->biv->src_reg, loop_start,
4208 && ! reg_used_between_p (giv, loop_start, dominator)
4209 && ! reg_used_between_p (giv, giv_insn, loop_end))
4214 for (next = NEXT_INSN (dominator); ; next = NEXT_INSN (next))
4216 if ((GET_RTX_CLASS (GET_CODE (next)) == 'i'
4217 && (reg_mentioned_p (giv, PATTERN (next))
4218 || reg_set_p (bl2->biv->src_reg, next)))
4219 || GET_CODE (next) == JUMP_INSN)
4222 if (GET_RTX_CLASS (GET_CODE (next)) != 'i'
4223 || ! sets_cc0_p (PATTERN (next)))
4227 if (loop_dump_stream)
4228 fprintf (loop_dump_stream, "move after insn %d\n",
4229 INSN_UID (dominator));
4230 /* Avoid problems with luids by actually moving the insn
4231 and adjusting all luids in the range. */
4232 reorder_insns (giv_insn, giv_insn, dominator);
4233 for (p = dominator; INSN_UID (p) >= max_uid_for_loop; )
4235 compute_luids (giv_insn, after_giv, INSN_LUID (p));
4236 /* If the only purpose of the init insn is to initialize
4237 this giv, delete it. */
4238 if (single_set (bl->init_insn)
4239 && ! reg_used_between_p (giv, bl->init_insn, loop_start))
4240 delete_insn (bl->init_insn);
4242 else if (! loop_insn_first_p (bl2->biv->insn, bl->biv->insn))
4244 rtx p = PREV_INSN (giv_insn);
4245 while (INSN_UID (p) >= max_uid_for_loop)
4247 reorder_insns (giv_insn, giv_insn, bl2->biv->insn);
4248 compute_luids (after_giv, NEXT_INSN (giv_insn),
4251 /* Remove this biv from the chain. */
4254 /* We move the following giv from *bl->next into *bl.
4255 We have to update reg_biv_class for that moved biv
4256 to point to its new address. */
4258 reg_biv_class[bl->regno] = bl;
4267 /* If we can't make it a giv,
4268 let biv keep initial value of "itself". */
4269 else if (loop_dump_stream)
4270 fprintf (loop_dump_stream, "is complex\n");
4274 /* If a biv is unconditionally incremented several times in a row, convert
4275 all but the last increment into a giv. */
4277 /* Get an upper bound for the number of registers
4278 we might have after all bivs have been processed. */
4279 first_increment_giv = max_reg_num ();
4280 for (n_extra_increment = 0, bl = loop_iv_list; bl; bl = bl->next)
4281 n_extra_increment += bl->biv_count - 1;
4283 /* If the loop contains volatile memory references do not allow any
4284 replacements to take place, since this could loose the volatile markers. */
4285 if (n_extra_increment && ! loop_info->has_volatile)
4287 int nregs = first_increment_giv + n_extra_increment;
4289 /* Reallocate reg_iv_type and reg_iv_info. */
4290 VARRAY_GROW (reg_iv_type, nregs);
4291 VARRAY_GROW (reg_iv_info, nregs);
4293 for (bl = loop_iv_list; bl; bl = bl->next)
4295 struct induction **vp, *v, *next;
4296 int biv_dead_after_loop = 0;
4298 /* The biv increments lists are in reverse order. Fix this first. */
4299 for (v = bl->biv, bl->biv = 0; v; v = next)
4302 v->next_iv = bl->biv;
4306 /* We must guard against the case that an early exit between v->insn
4307 and next->insn leaves the biv live after the loop, since that
4308 would mean that we'd be missing an increment for the final
4309 value. The following test to set biv_dead_after_loop is like
4310 the first part of the test to set bl->eliminable.
4311 We don't check here if we can calculate the final value, since
4312 this can't succeed if we already know that there is a jump
4313 between v->insn and next->insn, yet next->always_executed is
4314 set and next->maybe_multiple is cleared. Such a combination
4315 implies that the jump destination is outside the loop.
4316 If we want to make this check more sophisticated, we should
4317 check each branch between v->insn and next->insn individually
4318 to see if the biv is dead at its destination. */
4320 if (uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4322 && INSN_UID (bl->init_insn) < max_uid_for_loop
4323 && (uid_luid[REGNO_FIRST_UID (bl->regno)]
4324 >= INSN_LUID (bl->init_insn))
4325 #ifdef HAVE_decrement_and_branch_until_zero
4328 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4329 biv_dead_after_loop = 1;
4331 for (vp = &bl->biv, next = *vp; v = next, next = v->next_iv;)
4333 HOST_WIDE_INT offset;
4334 rtx set, add_val, old_reg, dest_reg, last_use_insn, note;
4335 int old_regno, new_regno;
4337 if (! v->always_executed
4338 || v->maybe_multiple
4339 || GET_CODE (v->add_val) != CONST_INT
4340 || ! next->always_executed
4341 || next->maybe_multiple
4342 || ! CONSTANT_P (next->add_val)
4343 || v->mult_val != const1_rtx
4344 || next->mult_val != const1_rtx
4345 || ! (biv_dead_after_loop
4346 || no_jumps_between_p (v->insn, next->insn)))
4351 offset = INTVAL (v->add_val);
4352 set = single_set (v->insn);
4353 add_val = plus_constant (next->add_val, offset);
4354 old_reg = v->dest_reg;
4355 dest_reg = gen_reg_rtx (v->mode);
4357 /* Unlike reg_iv_type / reg_iv_info, the other three arrays
4358 have been allocated with some slop space, so we may not
4359 actually need to reallocate them. If we do, the following
4360 if statement will be executed just once in this loop. */
4361 if ((unsigned) max_reg_num () > n_times_set->num_elements)
4363 /* Grow all the remaining arrays. */
4364 VARRAY_GROW (set_in_loop, nregs);
4365 VARRAY_GROW (n_times_set, nregs);
4366 VARRAY_GROW (may_not_optimize, nregs);
4367 VARRAY_GROW (reg_single_usage, nregs);
4370 if (! validate_change (next->insn, next->location, add_val, 0))
4376 /* Here we can try to eliminate the increment by combining
4377 it into the uses. */
4379 /* Set last_use_insn so that we can check against it. */
4381 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4383 p = next_insn_in_loop (p, scan_start, end, loop_top))
4385 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
4387 if (reg_mentioned_p (old_reg, PATTERN (p)))
4393 /* If we can't get the LUIDs for the insns, we can't
4394 calculate the lifetime. This is likely from unrolling
4395 of an inner loop, so there is little point in making this
4396 a DEST_REG giv anyways. */
4397 if (INSN_UID (v->insn) >= max_uid_for_loop
4398 || INSN_UID (last_use_insn) >= max_uid_for_loop
4399 || ! validate_change (v->insn, &SET_DEST (set), dest_reg, 0))
4401 /* Change the increment at NEXT back to what it was. */
4402 if (! validate_change (next->insn, next->location,
4408 next->add_val = add_val;
4409 v->dest_reg = dest_reg;
4410 v->giv_type = DEST_REG;
4411 v->location = &SET_SRC (set);
4413 v->combined_with = 0;
4415 v->derive_adjustment = 0;
4421 v->auto_inc_opt = 0;
4424 v->derived_from = 0;
4425 v->always_computable = 1;
4426 v->always_executed = 1;
4428 v->no_const_addval = 0;
4430 old_regno = REGNO (old_reg);
4431 new_regno = REGNO (dest_reg);
4432 VARRAY_INT (set_in_loop, old_regno)--;
4433 VARRAY_INT (set_in_loop, new_regno) = 1;
4434 VARRAY_INT (n_times_set, old_regno)--;
4435 VARRAY_INT (n_times_set, new_regno) = 1;
4436 VARRAY_CHAR (may_not_optimize, new_regno) = 0;
4438 REG_IV_TYPE (new_regno) = GENERAL_INDUCT;
4439 REG_IV_INFO (new_regno) = v;
4441 /* If next_insn has a REG_EQUAL note that mentiones OLD_REG,
4442 it must be replaced. */
4443 note = find_reg_note (next->insn, REG_EQUAL, NULL_RTX);
4444 if (note && reg_mentioned_p (old_reg, XEXP (note, 0)))
4445 XEXP (note, 0) = copy_rtx (SET_SRC (single_set (next->insn)));
4447 /* Remove the increment from the list of biv increments,
4448 and record it as a giv. */
4451 v->next_iv = bl->giv;
4454 v->benefit = rtx_cost (SET_SRC (set), SET);
4455 bl->total_benefit += v->benefit;
4457 /* Now replace the biv with DEST_REG in all insns between
4458 the replaced increment and the next increment, and
4459 remember the last insn that needed a replacement. */
4460 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4462 p = next_insn_in_loop (p, scan_start, end, loop_top))
4466 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
4468 if (reg_mentioned_p (old_reg, PATTERN (p)))
4471 if (! validate_replace_rtx (old_reg, dest_reg, p))
4474 for (note = REG_NOTES (p); note; note = XEXP (note, 1))
4476 if (GET_CODE (note) == EXPR_LIST)
4478 = replace_rtx (XEXP (note, 0), old_reg, dest_reg);
4482 v->last_use = last_use_insn;
4483 v->lifetime = INSN_LUID (last_use_insn) - INSN_LUID (v->insn);
4484 /* If the lifetime is zero, it means that this register is really
4485 a dead store. So mark this as a giv that can be ignored.
4486 This will not prevent the biv from being eliminated. */
4487 if (v->lifetime == 0)
4490 if (loop_dump_stream)
4491 fprintf (loop_dump_stream,
4492 "Increment %d of biv %d converted to giv %d.\n",
4493 INSN_UID (v->insn), old_regno, new_regno);
4497 last_increment_giv = max_reg_num () - 1;
4499 /* Search the loop for general induction variables. */
4501 /* A register is a giv if: it is only set once, it is a function of a
4502 biv and a constant (or invariant), and it is not a biv. */
4504 not_every_iteration = 0;
4511 /* At end of a straight-in loop, we are done.
4512 At end of a loop entered at the bottom, scan the top. */
4513 if (p == scan_start)
4521 if (p == scan_start)
4525 /* Look for a general induction variable in a register. */
4526 if (GET_CODE (p) == INSN
4527 && (set = single_set (p))
4528 && GET_CODE (SET_DEST (set)) == REG
4529 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
4536 rtx last_consec_insn;
4538 dest_reg = SET_DEST (set);
4539 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
4542 if (/* SET_SRC is a giv. */
4543 (general_induction_var (SET_SRC (set), &src_reg, &add_val,
4544 &mult_val, 0, &benefit)
4545 /* Equivalent expression is a giv. */
4546 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
4547 && general_induction_var (XEXP (regnote, 0), &src_reg,
4548 &add_val, &mult_val, 0,
4550 /* Don't try to handle any regs made by loop optimization.
4551 We have nothing on them in regno_first_uid, etc. */
4552 && REGNO (dest_reg) < max_reg_before_loop
4553 /* Don't recognize a BASIC_INDUCT_VAR here. */
4554 && dest_reg != src_reg
4555 /* This must be the only place where the register is set. */
4556 && (VARRAY_INT (n_times_set, REGNO (dest_reg)) == 1
4557 /* or all sets must be consecutive and make a giv. */
4558 || (benefit = consec_sets_giv (benefit, p,
4560 &add_val, &mult_val,
4561 &last_consec_insn))))
4564 = (struct induction *) alloca (sizeof (struct induction));
4566 /* If this is a library call, increase benefit. */
4567 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
4568 benefit += libcall_benefit (p);
4570 /* Skip the consecutive insns, if there are any. */
4571 if (VARRAY_INT (n_times_set, REGNO (dest_reg)) != 1)
4572 p = last_consec_insn;
4574 record_giv (v, p, src_reg, dest_reg, mult_val, add_val, benefit,
4575 DEST_REG, not_every_iteration, maybe_multiple,
4576 NULL_PTR, loop_start, loop_end);
4581 #ifndef DONT_REDUCE_ADDR
4582 /* Look for givs which are memory addresses. */
4583 /* This resulted in worse code on a VAX 8600. I wonder if it
4585 if (GET_CODE (p) == INSN)
4586 find_mem_givs (PATTERN (p), p, not_every_iteration, maybe_multiple,
4587 loop_start, loop_end);
4590 /* Update the status of whether giv can derive other givs. This can
4591 change when we pass a label or an insn that updates a biv. */
4592 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4593 || GET_CODE (p) == CODE_LABEL)
4594 update_giv_derive (p);
4596 /* Past CODE_LABEL, we get to insns that may be executed multiple
4597 times. The only way we can be sure that they can't is if every
4598 every jump insn between here and the end of the loop either
4599 returns, exits the loop, is a forward jump, or is a jump
4600 to the loop start. */
4602 if (GET_CODE (p) == CODE_LABEL)
4610 insn = NEXT_INSN (insn);
4611 if (insn == scan_start)
4619 if (insn == scan_start)
4623 if (GET_CODE (insn) == JUMP_INSN
4624 && GET_CODE (PATTERN (insn)) != RETURN
4625 && (! condjump_p (insn)
4626 || (JUMP_LABEL (insn) != 0
4627 && JUMP_LABEL (insn) != scan_start
4628 && (INSN_UID (JUMP_LABEL (insn)) >= max_uid_for_loop
4629 || INSN_UID (insn) >= max_uid_for_loop
4630 || (INSN_LUID (JUMP_LABEL (insn))
4631 < INSN_LUID (insn))))))
4639 /* Past a jump, we get to insns for which we can't count
4640 on whether they will be executed during each iteration. */
4641 /* This code appears twice in strength_reduce. There is also similar
4642 code in scan_loop. */
4643 if (GET_CODE (p) == JUMP_INSN
4644 /* If we enter the loop in the middle, and scan around to the
4645 beginning, don't set not_every_iteration for that.
4646 This can be any kind of jump, since we want to know if insns
4647 will be executed if the loop is executed. */
4648 && ! (JUMP_LABEL (p) == loop_top
4649 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
4650 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
4654 /* If this is a jump outside the loop, then it also doesn't
4655 matter. Check to see if the target of this branch is on the
4656 loop_number_exits_labels list. */
4658 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
4660 label = LABEL_NEXTREF (label))
4661 if (XEXP (label, 0) == JUMP_LABEL (p))
4665 not_every_iteration = 1;
4668 else if (GET_CODE (p) == NOTE)
4670 /* At the virtual top of a converted loop, insns are again known to
4671 be executed each iteration: logically, the loop begins here
4672 even though the exit code has been duplicated.
4674 Insns are also again known to be executed each iteration at
4675 the LOOP_CONT note. */
4676 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
4677 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
4679 not_every_iteration = 0;
4680 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
4682 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
4686 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4687 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4688 or not an insn is known to be executed each iteration of the
4689 loop, whether or not any iterations are known to occur.
4691 Therefore, if we have just passed a label and have no more labels
4692 between here and the test insn of the loop, we know these insns
4693 will be executed each iteration. */
4695 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
4696 && no_labels_between_p (p, loop_end)
4697 && loop_insn_first_p (p, loop_cont))
4698 not_every_iteration = 0;
4701 /* Try to calculate and save the number of loop iterations. This is
4702 set to zero if the actual number can not be calculated. This must
4703 be called after all giv's have been identified, since otherwise it may
4704 fail if the iteration variable is a giv. */
4706 loop_iterations (loop_start, loop_end, loop_info);
4708 /* Now for each giv for which we still don't know whether or not it is
4709 replaceable, check to see if it is replaceable because its final value
4710 can be calculated. This must be done after loop_iterations is called,
4711 so that final_giv_value will work correctly. */
4713 for (bl = loop_iv_list; bl; bl = bl->next)
4715 struct induction *v;
4717 for (v = bl->giv; v; v = v->next_iv)
4718 if (! v->replaceable && ! v->not_replaceable)
4719 check_final_value (v, loop_start, loop_end, loop_info->n_iterations);
4722 /* Try to prove that the loop counter variable (if any) is always
4723 nonnegative; if so, record that fact with a REG_NONNEG note
4724 so that "decrement and branch until zero" insn can be used. */
4725 check_dbra_loop (loop_end, insn_count, loop_start, loop_info);
4727 /* Create reg_map to hold substitutions for replaceable giv regs.
4728 Some givs might have been made from biv increments, so look at
4729 reg_iv_type for a suitable size. */
4730 reg_map_size = reg_iv_type->num_elements;
4731 reg_map = (rtx *) xcalloc (reg_map_size, sizeof (rtx));
4733 /* Examine each iv class for feasibility of strength reduction/induction
4734 variable elimination. */
4736 for (bl = loop_iv_list; bl; bl = bl->next)
4738 struct induction *v;
4741 rtx final_value = 0;
4744 /* Test whether it will be possible to eliminate this biv
4745 provided all givs are reduced. This is possible if either
4746 the reg is not used outside the loop, or we can compute
4747 what its final value will be.
4749 For architectures with a decrement_and_branch_until_zero insn,
4750 don't do this if we put a REG_NONNEG note on the endtest for
4753 /* Compare against bl->init_insn rather than loop_start.
4754 We aren't concerned with any uses of the biv between
4755 init_insn and loop_start since these won't be affected
4756 by the value of the biv elsewhere in the function, so
4757 long as init_insn doesn't use the biv itself.
4758 March 14, 1989 -- self@bayes.arc.nasa.gov */
4760 if ((uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4762 && INSN_UID (bl->init_insn) < max_uid_for_loop
4763 && uid_luid[REGNO_FIRST_UID (bl->regno)] >= INSN_LUID (bl->init_insn)
4764 #ifdef HAVE_decrement_and_branch_until_zero
4767 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4768 || ((final_value = final_biv_value (bl, loop_start, loop_end,
4769 loop_info->n_iterations))
4770 #ifdef HAVE_decrement_and_branch_until_zero
4774 bl->eliminable = maybe_eliminate_biv (bl, loop_start, end, 0,
4775 threshold, insn_count);
4778 if (loop_dump_stream)
4780 fprintf (loop_dump_stream,
4781 "Cannot eliminate biv %d.\n",
4783 fprintf (loop_dump_stream,
4784 "First use: insn %d, last use: insn %d.\n",
4785 REGNO_FIRST_UID (bl->regno),
4786 REGNO_LAST_UID (bl->regno));
4790 /* Combine all giv's for this iv_class. */
4793 /* This will be true at the end, if all givs which depend on this
4794 biv have been strength reduced.
4795 We can't (currently) eliminate the biv unless this is so. */
4798 /* Check each giv in this class to see if we will benefit by reducing
4799 it. Skip giv's combined with others. */
4800 for (v = bl->giv; v; v = v->next_iv)
4802 struct induction *tv;
4804 if (v->ignore || v->same)
4807 benefit = v->benefit;
4809 /* Reduce benefit if not replaceable, since we will insert
4810 a move-insn to replace the insn that calculates this giv.
4811 Don't do this unless the giv is a user variable, since it
4812 will often be marked non-replaceable because of the duplication
4813 of the exit code outside the loop. In such a case, the copies
4814 we insert are dead and will be deleted. So they don't have
4815 a cost. Similar situations exist. */
4816 /* ??? The new final_[bg]iv_value code does a much better job
4817 of finding replaceable giv's, and hence this code may no longer
4819 if (! v->replaceable && ! bl->eliminable
4820 && REG_USERVAR_P (v->dest_reg))
4821 benefit -= copy_cost;
4823 /* Decrease the benefit to count the add-insns that we will
4824 insert to increment the reduced reg for the giv. */
4825 benefit -= add_cost * bl->biv_count;
4827 /* Decide whether to strength-reduce this giv or to leave the code
4828 unchanged (recompute it from the biv each time it is used).
4829 This decision can be made independently for each giv. */
4832 /* Attempt to guess whether autoincrement will handle some of the
4833 new add insns; if so, increase BENEFIT (undo the subtraction of
4834 add_cost that was done above). */
4835 if (v->giv_type == DEST_ADDR
4836 && GET_CODE (v->mult_val) == CONST_INT)
4838 if (HAVE_POST_INCREMENT
4839 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4840 benefit += add_cost * bl->biv_count;
4841 else if (HAVE_PRE_INCREMENT
4842 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4843 benefit += add_cost * bl->biv_count;
4844 else if (HAVE_POST_DECREMENT
4845 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4846 benefit += add_cost * bl->biv_count;
4847 else if (HAVE_PRE_DECREMENT
4848 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4849 benefit += add_cost * bl->biv_count;
4853 /* If an insn is not to be strength reduced, then set its ignore
4854 flag, and clear all_reduced. */
4856 /* A giv that depends on a reversed biv must be reduced if it is
4857 used after the loop exit, otherwise, it would have the wrong
4858 value after the loop exit. To make it simple, just reduce all
4859 of such giv's whether or not we know they are used after the loop
4862 if ( ! flag_reduce_all_givs && v->lifetime * threshold * benefit < insn_count
4865 if (loop_dump_stream)
4866 fprintf (loop_dump_stream,
4867 "giv of insn %d not worth while, %d vs %d.\n",
4869 v->lifetime * threshold * benefit, insn_count);
4875 /* Check that we can increment the reduced giv without a
4876 multiply insn. If not, reject it. */
4878 for (tv = bl->biv; tv; tv = tv->next_iv)
4879 if (tv->mult_val == const1_rtx
4880 && ! product_cheap_p (tv->add_val, v->mult_val))
4882 if (loop_dump_stream)
4883 fprintf (loop_dump_stream,
4884 "giv of insn %d: would need a multiply.\n",
4885 INSN_UID (v->insn));
4893 /* Check for givs whose first use is their definition and whose
4894 last use is the definition of another giv. If so, it is likely
4895 dead and should not be used to derive another giv nor to
4897 for (v = bl->giv; v; v = v->next_iv)
4900 || (v->same && v->same->ignore))
4905 struct induction *v1;
4907 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4908 if (v->last_use == v1->insn)
4911 else if (v->giv_type == DEST_REG
4912 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4914 struct induction *v1;
4916 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4917 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4922 /* Now that we know which givs will be reduced, try to rearrange the
4923 combinations to reduce register pressure.
4924 recombine_givs calls find_life_end, which needs reg_iv_type and
4925 reg_iv_info to be valid for all pseudos. We do the necessary
4926 reallocation here since it allows to check if there are still
4927 more bivs to process. */
4928 nregs = max_reg_num ();
4929 if (nregs > reg_iv_type->num_elements)
4931 /* If there are still more bivs to process, allocate some slack
4932 space so that we're not constantly reallocating these arrays. */
4935 /* Reallocate reg_iv_type and reg_iv_info. */
4936 VARRAY_GROW (reg_iv_type, nregs);
4937 VARRAY_GROW (reg_iv_info, nregs);
4939 recombine_givs (bl, loop_start, loop_end, unroll_p);
4941 /* Reduce each giv that we decided to reduce. */
4943 for (v = bl->giv; v; v = v->next_iv)
4945 struct induction *tv;
4946 if (! v->ignore && v->same == 0)
4948 int auto_inc_opt = 0;
4950 /* If the code for derived givs immediately below has already
4951 allocated a new_reg, we must keep it. */
4953 v->new_reg = gen_reg_rtx (v->mode);
4955 if (v->derived_from)
4957 struct induction *d = v->derived_from;
4959 /* In case d->dest_reg is not replaceable, we have
4960 to replace it in v->insn now. */
4962 d->new_reg = gen_reg_rtx (d->mode);
4964 = replace_rtx (PATTERN (v->insn), d->dest_reg, d->new_reg);
4966 = replace_rtx (PATTERN (v->insn), v->dest_reg, v->new_reg);
4967 /* For each place where the biv is incremented, add an
4968 insn to set the new, reduced reg for the giv.
4969 We used to do this only for biv_count != 1, but
4970 this fails when there is a giv after a single biv
4971 increment, e.g. when the last giv was expressed as
4973 for (tv = bl->biv; tv; tv = tv->next_iv)
4975 /* We always emit reduced giv increments before the
4976 biv increment when bl->biv_count != 1. So by
4977 emitting the add insns for derived givs after the
4978 biv increment, they pick up the updated value of
4980 If the reduced giv is processed with
4981 auto_inc_opt == 1, then it is incremented earlier
4982 than the biv, hence we'll still pick up the right
4984 If it's processed with auto_inc_opt == -1,
4985 that implies that the biv increment is before the
4986 first reduced giv's use. The derived giv's lifetime
4987 is after the reduced giv's lifetime, hence in this
4988 case, the biv increment doesn't matter. */
4989 emit_insn_after (copy_rtx (PATTERN (v->insn)), tv->insn);
4995 /* If the target has auto-increment addressing modes, and
4996 this is an address giv, then try to put the increment
4997 immediately after its use, so that flow can create an
4998 auto-increment addressing mode. */
4999 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
5000 && bl->biv->always_executed && ! bl->biv->maybe_multiple
5001 /* We don't handle reversed biv's because bl->biv->insn
5002 does not have a valid INSN_LUID. */
5004 && v->always_executed && ! v->maybe_multiple
5005 && INSN_UID (v->insn) < max_uid_for_loop)
5007 /* If other giv's have been combined with this one, then
5008 this will work only if all uses of the other giv's occur
5009 before this giv's insn. This is difficult to check.
5011 We simplify this by looking for the common case where
5012 there is one DEST_REG giv, and this giv's insn is the
5013 last use of the dest_reg of that DEST_REG giv. If the
5014 increment occurs after the address giv, then we can
5015 perform the optimization. (Otherwise, the increment
5016 would have to go before other_giv, and we would not be
5017 able to combine it with the address giv to get an
5018 auto-inc address.) */
5019 if (v->combined_with)
5021 struct induction *other_giv = 0;
5023 for (tv = bl->giv; tv; tv = tv->next_iv)
5031 if (! tv && other_giv
5032 && REGNO (other_giv->dest_reg) < max_reg_before_loop
5033 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
5034 == INSN_UID (v->insn))
5035 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
5038 /* Check for case where increment is before the address
5039 giv. Do this test in "loop order". */
5040 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
5041 && (INSN_LUID (v->insn) < INSN_LUID (scan_start)
5042 || (INSN_LUID (bl->biv->insn)
5043 > INSN_LUID (scan_start))))
5044 || (INSN_LUID (v->insn) < INSN_LUID (scan_start)
5045 && (INSN_LUID (scan_start)
5046 < INSN_LUID (bl->biv->insn))))
5055 /* We can't put an insn immediately after one setting
5056 cc0, or immediately before one using cc0. */
5057 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
5058 || (auto_inc_opt == -1
5059 && (prev = prev_nonnote_insn (v->insn)) != 0
5060 && GET_RTX_CLASS (GET_CODE (prev)) == 'i'
5061 && sets_cc0_p (PATTERN (prev))))
5067 v->auto_inc_opt = 1;
5071 /* For each place where the biv is incremented, add an insn
5072 to increment the new, reduced reg for the giv. */
5073 for (tv = bl->biv; tv; tv = tv->next_iv)
5078 insert_before = tv->insn;
5079 else if (auto_inc_opt == 1)
5080 insert_before = NEXT_INSN (v->insn);
5082 insert_before = v->insn;
5084 if (tv->mult_val == const1_rtx)
5085 emit_iv_add_mult (tv->add_val, v->mult_val,
5086 v->new_reg, v->new_reg, insert_before);
5087 else /* tv->mult_val == const0_rtx */
5088 /* A multiply is acceptable here
5089 since this is presumed to be seldom executed. */
5090 emit_iv_add_mult (tv->add_val, v->mult_val,
5091 v->add_val, v->new_reg, insert_before);
5094 /* Add code at loop start to initialize giv's reduced reg. */
5096 emit_iv_add_mult (bl->initial_value, v->mult_val,
5097 v->add_val, v->new_reg, loop_start);
5101 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
5104 For each giv register that can be reduced now: if replaceable,
5105 substitute reduced reg wherever the old giv occurs;
5106 else add new move insn "giv_reg = reduced_reg". */
5108 for (v = bl->giv; v; v = v->next_iv)
5110 if (v->same && v->same->ignore)
5116 /* Update expression if this was combined, in case other giv was
5119 v->new_reg = replace_rtx (v->new_reg,
5120 v->same->dest_reg, v->same->new_reg);
5122 if (v->giv_type == DEST_ADDR)
5123 /* Store reduced reg as the address in the memref where we found
5125 validate_change (v->insn, v->location, v->new_reg, 0);
5126 else if (v->replaceable)
5128 reg_map[REGNO (v->dest_reg)] = v->new_reg;
5131 /* I can no longer duplicate the original problem. Perhaps
5132 this is unnecessary now? */
5134 /* Replaceable; it isn't strictly necessary to delete the old
5135 insn and emit a new one, because v->dest_reg is now dead.
5137 However, especially when unrolling loops, the special
5138 handling for (set REG0 REG1) in the second cse pass may
5139 make v->dest_reg live again. To avoid this problem, emit
5140 an insn to set the original giv reg from the reduced giv.
5141 We can not delete the original insn, since it may be part
5142 of a LIBCALL, and the code in flow that eliminates dead
5143 libcalls will fail if it is deleted. */
5144 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
5150 /* Not replaceable; emit an insn to set the original giv reg from
5151 the reduced giv, same as above. */
5152 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
5156 /* When a loop is reversed, givs which depend on the reversed
5157 biv, and which are live outside the loop, must be set to their
5158 correct final value. This insn is only needed if the giv is
5159 not replaceable. The correct final value is the same as the
5160 value that the giv starts the reversed loop with. */
5161 if (bl->reversed && ! v->replaceable)
5162 emit_iv_add_mult (bl->initial_value, v->mult_val,
5163 v->add_val, v->dest_reg, end_insert_before);
5164 else if (v->final_value)
5168 /* If the loop has multiple exits, emit the insn before the
5169 loop to ensure that it will always be executed no matter
5170 how the loop exits. Otherwise, emit the insn after the loop,
5171 since this is slightly more efficient. */
5172 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
5173 insert_before = loop_start;
5175 insert_before = end_insert_before;
5176 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
5180 /* If the insn to set the final value of the giv was emitted
5181 before the loop, then we must delete the insn inside the loop
5182 that sets it. If this is a LIBCALL, then we must delete
5183 every insn in the libcall. Note, however, that
5184 final_giv_value will only succeed when there are multiple
5185 exits if the giv is dead at each exit, hence it does not
5186 matter that the original insn remains because it is dead
5188 /* Delete the insn inside the loop that sets the giv since
5189 the giv is now set before (or after) the loop. */
5190 delete_insn (v->insn);
5194 if (loop_dump_stream)
5196 fprintf (loop_dump_stream, "giv at %d reduced to ",
5197 INSN_UID (v->insn));
5198 print_rtl (loop_dump_stream, v->new_reg);
5199 fprintf (loop_dump_stream, "\n");
5203 /* All the givs based on the biv bl have been reduced if they
5206 /* For each giv not marked as maybe dead that has been combined with a
5207 second giv, clear any "maybe dead" mark on that second giv.
5208 v->new_reg will either be or refer to the register of the giv it
5211 Doing this clearing avoids problems in biv elimination where a
5212 giv's new_reg is a complex value that can't be put in the insn but
5213 the giv combined with (with a reg as new_reg) is marked maybe_dead.
5214 Since the register will be used in either case, we'd prefer it be
5215 used from the simpler giv. */
5217 for (v = bl->giv; v; v = v->next_iv)
5218 if (! v->maybe_dead && v->same)
5219 v->same->maybe_dead = 0;
5221 /* Try to eliminate the biv, if it is a candidate.
5222 This won't work if ! all_reduced,
5223 since the givs we planned to use might not have been reduced.
5225 We have to be careful that we didn't initially think we could eliminate
5226 this biv because of a giv that we now think may be dead and shouldn't
5227 be used as a biv replacement.
5229 Also, there is the possibility that we may have a giv that looks
5230 like it can be used to eliminate a biv, but the resulting insn
5231 isn't valid. This can happen, for example, on the 88k, where a
5232 JUMP_INSN can compare a register only with zero. Attempts to
5233 replace it with a compare with a constant will fail.
5235 Note that in cases where this call fails, we may have replaced some
5236 of the occurrences of the biv with a giv, but no harm was done in
5237 doing so in the rare cases where it can occur. */
5239 if (all_reduced == 1 && bl->eliminable
5240 && maybe_eliminate_biv (bl, loop_start, end, 1,
5241 threshold, insn_count))
5244 /* ?? If we created a new test to bypass the loop entirely,
5245 or otherwise drop straight in, based on this test, then
5246 we might want to rewrite it also. This way some later
5247 pass has more hope of removing the initialization of this
5250 /* If final_value != 0, then the biv may be used after loop end
5251 and we must emit an insn to set it just in case.
5253 Reversed bivs already have an insn after the loop setting their
5254 value, so we don't need another one. We can't calculate the
5255 proper final value for such a biv here anyways. */
5256 if (final_value != 0 && ! bl->reversed)
5260 /* If the loop has multiple exits, emit the insn before the
5261 loop to ensure that it will always be executed no matter
5262 how the loop exits. Otherwise, emit the insn after the
5263 loop, since this is slightly more efficient. */
5264 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
5265 insert_before = loop_start;
5267 insert_before = end_insert_before;
5269 emit_insn_before (gen_move_insn (bl->biv->dest_reg, final_value),
5274 /* Delete all of the instructions inside the loop which set
5275 the biv, as they are all dead. If is safe to delete them,
5276 because an insn setting a biv will never be part of a libcall. */
5277 /* However, deleting them will invalidate the regno_last_uid info,
5278 so keeping them around is more convenient. Final_biv_value
5279 will only succeed when there are multiple exits if the biv
5280 is dead at each exit, hence it does not matter that the original
5281 insn remains, because it is dead anyways. */
5282 for (v = bl->biv; v; v = v->next_iv)
5283 delete_insn (v->insn);
5286 if (loop_dump_stream)
5287 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
5292 /* Go through all the instructions in the loop, making all the
5293 register substitutions scheduled in REG_MAP. */
5295 for (p = loop_start; p != end; p = NEXT_INSN (p))
5296 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5297 || GET_CODE (p) == CALL_INSN)
5299 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
5300 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
5304 if (loop_info->n_iterations > 0)
5306 /* When we completely unroll a loop we will likely not need the increment
5307 of the loop BIV and we will not need the conditional branch at the
5309 unrolled_insn_copies = insn_count - 2;
5312 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
5313 need the comparison before the conditional branch at the end of the
5315 unrolled_insn_copies -= 1;
5318 /* We'll need one copy for each loop iteration. */
5319 unrolled_insn_copies *= loop_info->n_iterations;
5321 /* A little slop to account for the ability to remove initialization
5322 code, better CSE, and other secondary benefits of completely
5323 unrolling some loops. */
5324 unrolled_insn_copies -= 1;
5326 /* Clamp the value. */
5327 if (unrolled_insn_copies < 0)
5328 unrolled_insn_copies = 0;
5331 /* Unroll loops from within strength reduction so that we can use the
5332 induction variable information that strength_reduce has already
5333 collected. Always unroll loops that would be as small or smaller
5334 unrolled than when rolled. */
5336 || (loop_info->n_iterations > 0
5337 && unrolled_insn_copies <= insn_count))
5338 unroll_loop (loop_end, insn_count, loop_start, end_insert_before,
5341 #ifdef HAVE_decrement_and_branch_on_count
5342 /* Instrument the loop with BCT insn. */
5343 if (HAVE_decrement_and_branch_on_count && bct_p
5344 && flag_branch_on_count_reg)
5345 insert_bct (loop_start, loop_end, loop_info);
5346 #endif /* HAVE_decrement_and_branch_on_count */
5348 if (loop_dump_stream)
5349 fprintf (loop_dump_stream, "\n");
5352 VARRAY_FREE (reg_iv_type);
5353 VARRAY_FREE (reg_iv_info);
5354 free (reg_biv_class);
5359 /* Return 1 if X is a valid source for an initial value (or as value being
5360 compared against in an initial test).
5362 X must be either a register or constant and must not be clobbered between
5363 the current insn and the start of the loop.
5365 INSN is the insn containing X. */
5368 valid_initial_value_p (x, insn, call_seen, loop_start)
5377 /* Only consider pseudos we know about initialized in insns whose luids
5379 if (GET_CODE (x) != REG
5380 || REGNO (x) >= max_reg_before_loop)
5383 /* Don't use call-clobbered registers across a call which clobbers it. On
5384 some machines, don't use any hard registers at all. */
5385 if (REGNO (x) < FIRST_PSEUDO_REGISTER
5386 && (SMALL_REGISTER_CLASSES
5387 || (call_used_regs[REGNO (x)] && call_seen)))
5390 /* Don't use registers that have been clobbered before the start of the
5392 if (reg_set_between_p (x, insn, loop_start))
5398 /* Scan X for memory refs and check each memory address
5399 as a possible giv. INSN is the insn whose pattern X comes from.
5400 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5401 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
5402 more thanonce in each loop iteration. */
5405 find_mem_givs (x, insn, not_every_iteration, maybe_multiple, loop_start,
5409 int not_every_iteration, maybe_multiple;
5410 rtx loop_start, loop_end;
5413 register enum rtx_code code;
5414 register const char *fmt;
5419 code = GET_CODE (x);
5443 /* This code used to disable creating GIVs with mult_val == 1 and
5444 add_val == 0. However, this leads to lost optimizations when
5445 it comes time to combine a set of related DEST_ADDR GIVs, since
5446 this one would not be seen. */
5448 if (general_induction_var (XEXP (x, 0), &src_reg, &add_val,
5449 &mult_val, 1, &benefit))
5451 /* Found one; record it. */
5453 = (struct induction *) oballoc (sizeof (struct induction));
5455 record_giv (v, insn, src_reg, addr_placeholder, mult_val,
5456 add_val, benefit, DEST_ADDR, not_every_iteration,
5457 maybe_multiple, &XEXP (x, 0), loop_start, loop_end);
5459 v->mem_mode = GET_MODE (x);
5468 /* Recursively scan the subexpressions for other mem refs. */
5470 fmt = GET_RTX_FORMAT (code);
5471 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5473 find_mem_givs (XEXP (x, i), insn, not_every_iteration, maybe_multiple,
5474 loop_start, loop_end);
5475 else if (fmt[i] == 'E')
5476 for (j = 0; j < XVECLEN (x, i); j++)
5477 find_mem_givs (XVECEXP (x, i, j), insn, not_every_iteration,
5478 maybe_multiple, loop_start, loop_end);
5481 /* Fill in the data about one biv update.
5482 V is the `struct induction' in which we record the biv. (It is
5483 allocated by the caller, with alloca.)
5484 INSN is the insn that sets it.
5485 DEST_REG is the biv's reg.
5487 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5488 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5489 being set to INC_VAL.
5491 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5492 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5493 can be executed more than once per iteration. If MAYBE_MULTIPLE
5494 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5495 executed exactly once per iteration. */
5498 record_biv (v, insn, dest_reg, inc_val, mult_val, location,
5499 not_every_iteration, maybe_multiple, multi_insn_incr)
5500 struct induction *v;
5506 int not_every_iteration;
5508 int multi_insn_incr;
5510 struct iv_class *bl;
5513 v->src_reg = dest_reg;
5514 v->dest_reg = dest_reg;
5515 v->mult_val = mult_val;
5516 v->add_val = inc_val;
5517 v->location = location;
5518 v->mode = GET_MODE (dest_reg);
5519 v->always_computable = ! not_every_iteration;
5520 v->always_executed = ! not_every_iteration;
5521 v->maybe_multiple = maybe_multiple;
5522 v->multi_insn_incr = multi_insn_incr;
5524 /* Add this to the reg's iv_class, creating a class
5525 if this is the first incrementation of the reg. */
5527 bl = reg_biv_class[REGNO (dest_reg)];
5530 /* Create and initialize new iv_class. */
5532 bl = (struct iv_class *) oballoc (sizeof (struct iv_class));
5534 bl->regno = REGNO (dest_reg);
5540 /* Set initial value to the reg itself. */
5541 bl->initial_value = dest_reg;
5542 /* We haven't seen the initializing insn yet */
5545 bl->initial_test = 0;
5546 bl->incremented = 0;
5550 bl->total_benefit = 0;
5552 /* Add this class to loop_iv_list. */
5553 bl->next = loop_iv_list;
5556 /* Put it in the array of biv register classes. */
5557 reg_biv_class[REGNO (dest_reg)] = bl;
5560 /* Update IV_CLASS entry for this biv. */
5561 v->next_iv = bl->biv;
5564 if (mult_val == const1_rtx)
5565 bl->incremented = 1;
5567 if (loop_dump_stream)
5569 fprintf (loop_dump_stream,
5570 "Insn %d: possible biv, reg %d,",
5571 INSN_UID (insn), REGNO (dest_reg));
5572 if (GET_CODE (inc_val) == CONST_INT)
5574 fprintf (loop_dump_stream, " const =");
5575 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (inc_val));
5576 fputc ('\n', loop_dump_stream);
5580 fprintf (loop_dump_stream, " const = ");
5581 print_rtl (loop_dump_stream, inc_val);
5582 fprintf (loop_dump_stream, "\n");
5587 /* Fill in the data about one giv.
5588 V is the `struct induction' in which we record the giv. (It is
5589 allocated by the caller, with alloca.)
5590 INSN is the insn that sets it.
5591 BENEFIT estimates the savings from deleting this insn.
5592 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5593 into a register or is used as a memory address.
5595 SRC_REG is the biv reg which the giv is computed from.
5596 DEST_REG is the giv's reg (if the giv is stored in a reg).
5597 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5598 LOCATION points to the place where this giv's value appears in INSN. */
5601 record_giv (v, insn, src_reg, dest_reg, mult_val, add_val, benefit,
5602 type, not_every_iteration, maybe_multiple, location, loop_start,
5604 struct induction *v;
5608 rtx mult_val, add_val;
5611 int not_every_iteration, maybe_multiple;
5613 rtx loop_start, loop_end;
5615 struct induction *b;
5616 struct iv_class *bl;
5617 rtx set = single_set (insn);
5620 v->src_reg = src_reg;
5622 v->dest_reg = dest_reg;
5623 v->mult_val = mult_val;
5624 v->add_val = add_val;
5625 v->benefit = benefit;
5626 v->location = location;
5628 v->combined_with = 0;
5629 v->maybe_multiple = maybe_multiple;
5630 v->multi_insn_incr = 0;
5632 v->derive_adjustment = 0;
5638 v->auto_inc_opt = 0;
5641 v->derived_from = 0;
5644 /* The v->always_computable field is used in update_giv_derive, to
5645 determine whether a giv can be used to derive another giv. For a
5646 DEST_REG giv, INSN computes a new value for the giv, so its value
5647 isn't computable if INSN insn't executed every iteration.
5648 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5649 it does not compute a new value. Hence the value is always computable
5650 regardless of whether INSN is executed each iteration. */
5652 if (type == DEST_ADDR)
5653 v->always_computable = 1;
5655 v->always_computable = ! not_every_iteration;
5657 v->always_executed = ! not_every_iteration;
5659 if (type == DEST_ADDR)
5661 v->mode = GET_MODE (*location);
5664 else /* type == DEST_REG */
5666 v->mode = GET_MODE (SET_DEST (set));
5668 v->lifetime = (uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
5669 - uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))]);
5671 /* If the lifetime is zero, it means that this register is
5672 really a dead store. So mark this as a giv that can be
5673 ignored. This will not prevent the biv from being eliminated. */
5674 if (v->lifetime == 0)
5677 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
5678 REG_IV_INFO (REGNO (dest_reg)) = v;
5681 /* Add the giv to the class of givs computed from one biv. */
5683 bl = reg_biv_class[REGNO (src_reg)];
5686 v->next_iv = bl->giv;
5688 /* Don't count DEST_ADDR. This is supposed to count the number of
5689 insns that calculate givs. */
5690 if (type == DEST_REG)
5692 bl->total_benefit += benefit;
5695 /* Fatal error, biv missing for this giv? */
5698 if (type == DEST_ADDR)
5702 /* The giv can be replaced outright by the reduced register only if all
5703 of the following conditions are true:
5704 - the insn that sets the giv is always executed on any iteration
5705 on which the giv is used at all
5706 (there are two ways to deduce this:
5707 either the insn is executed on every iteration,
5708 or all uses follow that insn in the same basic block),
5709 - the giv is not used outside the loop
5710 - no assignments to the biv occur during the giv's lifetime. */
5712 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5713 /* Previous line always fails if INSN was moved by loop opt. */
5714 && uid_luid[REGNO_LAST_UID (REGNO (dest_reg))] < INSN_LUID (loop_end)
5715 && (! not_every_iteration
5716 || last_use_this_basic_block (dest_reg, insn)))
5718 /* Now check that there are no assignments to the biv within the
5719 giv's lifetime. This requires two separate checks. */
5721 /* Check each biv update, and fail if any are between the first
5722 and last use of the giv.
5724 If this loop contains an inner loop that was unrolled, then
5725 the insn modifying the biv may have been emitted by the loop
5726 unrolling code, and hence does not have a valid luid. Just
5727 mark the biv as not replaceable in this case. It is not very
5728 useful as a biv, because it is used in two different loops.
5729 It is very unlikely that we would be able to optimize the giv
5730 using this biv anyways. */
5733 for (b = bl->biv; b; b = b->next_iv)
5735 if (INSN_UID (b->insn) >= max_uid_for_loop
5736 || ((uid_luid[INSN_UID (b->insn)]
5737 >= uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))])
5738 && (uid_luid[INSN_UID (b->insn)]
5739 <= uid_luid[REGNO_LAST_UID (REGNO (dest_reg))])))
5742 v->not_replaceable = 1;
5747 /* If there are any backwards branches that go from after the
5748 biv update to before it, then this giv is not replaceable. */
5750 for (b = bl->biv; b; b = b->next_iv)
5751 if (back_branch_in_range_p (b->insn, loop_start, loop_end))
5754 v->not_replaceable = 1;
5760 /* May still be replaceable, we don't have enough info here to
5763 v->not_replaceable = 0;
5767 /* Record whether the add_val contains a const_int, for later use by
5772 v->no_const_addval = 1;
5773 if (tem == const0_rtx)
5775 else if (GET_CODE (tem) == CONST_INT)
5776 v->no_const_addval = 0;
5777 else if (GET_CODE (tem) == PLUS)
5781 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5782 tem = XEXP (tem, 0);
5783 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5784 tem = XEXP (tem, 1);
5788 if (GET_CODE (XEXP (tem, 1)) == CONST_INT)
5789 v->no_const_addval = 0;
5793 if (loop_dump_stream)
5795 if (type == DEST_REG)
5796 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
5797 INSN_UID (insn), REGNO (dest_reg));
5799 fprintf (loop_dump_stream, "Insn %d: dest address",
5802 fprintf (loop_dump_stream, " src reg %d benefit %d",
5803 REGNO (src_reg), v->benefit);
5804 fprintf (loop_dump_stream, " lifetime %d",
5808 fprintf (loop_dump_stream, " replaceable");
5810 if (v->no_const_addval)
5811 fprintf (loop_dump_stream, " ncav");
5813 if (GET_CODE (mult_val) == CONST_INT)
5815 fprintf (loop_dump_stream, " mult ");
5816 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (mult_val));
5820 fprintf (loop_dump_stream, " mult ");
5821 print_rtl (loop_dump_stream, mult_val);
5824 if (GET_CODE (add_val) == CONST_INT)
5826 fprintf (loop_dump_stream, " add ");
5827 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (add_val));
5831 fprintf (loop_dump_stream, " add ");
5832 print_rtl (loop_dump_stream, add_val);
5836 if (loop_dump_stream)
5837 fprintf (loop_dump_stream, "\n");
5842 /* All this does is determine whether a giv can be made replaceable because
5843 its final value can be calculated. This code can not be part of record_giv
5844 above, because final_giv_value requires that the number of loop iterations
5845 be known, and that can not be accurately calculated until after all givs
5846 have been identified. */
5849 check_final_value (v, loop_start, loop_end, n_iterations)
5850 struct induction *v;
5851 rtx loop_start, loop_end;
5852 unsigned HOST_WIDE_INT n_iterations;
5854 struct iv_class *bl;
5855 rtx final_value = 0;
5857 bl = reg_biv_class[REGNO (v->src_reg)];
5859 /* DEST_ADDR givs will never reach here, because they are always marked
5860 replaceable above in record_giv. */
5862 /* The giv can be replaced outright by the reduced register only if all
5863 of the following conditions are true:
5864 - the insn that sets the giv is always executed on any iteration
5865 on which the giv is used at all
5866 (there are two ways to deduce this:
5867 either the insn is executed on every iteration,
5868 or all uses follow that insn in the same basic block),
5869 - its final value can be calculated (this condition is different
5870 than the one above in record_giv)
5871 - no assignments to the biv occur during the giv's lifetime. */
5874 /* This is only called now when replaceable is known to be false. */
5875 /* Clear replaceable, so that it won't confuse final_giv_value. */
5879 if ((final_value = final_giv_value (v, loop_start, loop_end, n_iterations))
5880 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5882 int biv_increment_seen = 0;
5888 /* When trying to determine whether or not a biv increment occurs
5889 during the lifetime of the giv, we can ignore uses of the variable
5890 outside the loop because final_value is true. Hence we can not
5891 use regno_last_uid and regno_first_uid as above in record_giv. */
5893 /* Search the loop to determine whether any assignments to the
5894 biv occur during the giv's lifetime. Start with the insn
5895 that sets the giv, and search around the loop until we come
5896 back to that insn again.
5898 Also fail if there is a jump within the giv's lifetime that jumps
5899 to somewhere outside the lifetime but still within the loop. This
5900 catches spaghetti code where the execution order is not linear, and
5901 hence the above test fails. Here we assume that the giv lifetime
5902 does not extend from one iteration of the loop to the next, so as
5903 to make the test easier. Since the lifetime isn't known yet,
5904 this requires two loops. See also record_giv above. */
5906 last_giv_use = v->insn;
5912 p = NEXT_INSN (loop_start);
5916 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5917 || GET_CODE (p) == CALL_INSN)
5919 if (biv_increment_seen)
5921 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5924 v->not_replaceable = 1;
5928 else if (reg_set_p (v->src_reg, PATTERN (p)))
5929 biv_increment_seen = 1;
5930 else if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5935 /* Now that the lifetime of the giv is known, check for branches
5936 from within the lifetime to outside the lifetime if it is still
5946 p = NEXT_INSN (loop_start);
5947 if (p == last_giv_use)
5950 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5951 && LABEL_NAME (JUMP_LABEL (p))
5952 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
5953 && loop_insn_first_p (loop_start, JUMP_LABEL (p)))
5954 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
5955 && loop_insn_first_p (JUMP_LABEL (p), loop_end))))
5958 v->not_replaceable = 1;
5960 if (loop_dump_stream)
5961 fprintf (loop_dump_stream,
5962 "Found branch outside giv lifetime.\n");
5969 /* If it is replaceable, then save the final value. */
5971 v->final_value = final_value;
5974 if (loop_dump_stream && v->replaceable)
5975 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5976 INSN_UID (v->insn), REGNO (v->dest_reg));
5979 /* Update the status of whether a giv can derive other givs.
5981 We need to do something special if there is or may be an update to the biv
5982 between the time the giv is defined and the time it is used to derive
5985 In addition, a giv that is only conditionally set is not allowed to
5986 derive another giv once a label has been passed.
5988 The cases we look at are when a label or an update to a biv is passed. */
5991 update_giv_derive (p)
5994 struct iv_class *bl;
5995 struct induction *biv, *giv;
5999 /* Search all IV classes, then all bivs, and finally all givs.
6001 There are three cases we are concerned with. First we have the situation
6002 of a giv that is only updated conditionally. In that case, it may not
6003 derive any givs after a label is passed.
6005 The second case is when a biv update occurs, or may occur, after the
6006 definition of a giv. For certain biv updates (see below) that are
6007 known to occur between the giv definition and use, we can adjust the
6008 giv definition. For others, or when the biv update is conditional,
6009 we must prevent the giv from deriving any other givs. There are two
6010 sub-cases within this case.
6012 If this is a label, we are concerned with any biv update that is done
6013 conditionally, since it may be done after the giv is defined followed by
6014 a branch here (actually, we need to pass both a jump and a label, but
6015 this extra tracking doesn't seem worth it).
6017 If this is a jump, we are concerned about any biv update that may be
6018 executed multiple times. We are actually only concerned about
6019 backward jumps, but it is probably not worth performing the test
6020 on the jump again here.
6022 If this is a biv update, we must adjust the giv status to show that a
6023 subsequent biv update was performed. If this adjustment cannot be done,
6024 the giv cannot derive further givs. */
6026 for (bl = loop_iv_list; bl; bl = bl->next)
6027 for (biv = bl->biv; biv; biv = biv->next_iv)
6028 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
6031 for (giv = bl->giv; giv; giv = giv->next_iv)
6033 /* If cant_derive is already true, there is no point in
6034 checking all of these conditions again. */
6035 if (giv->cant_derive)
6038 /* If this giv is conditionally set and we have passed a label,
6039 it cannot derive anything. */
6040 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
6041 giv->cant_derive = 1;
6043 /* Skip givs that have mult_val == 0, since
6044 they are really invariants. Also skip those that are
6045 replaceable, since we know their lifetime doesn't contain
6047 else if (giv->mult_val == const0_rtx || giv->replaceable)
6050 /* The only way we can allow this giv to derive another
6051 is if this is a biv increment and we can form the product
6052 of biv->add_val and giv->mult_val. In this case, we will
6053 be able to compute a compensation. */
6054 else if (biv->insn == p)
6058 if (biv->mult_val == const1_rtx)
6059 tem = simplify_giv_expr (gen_rtx_MULT (giv->mode,
6064 if (tem && giv->derive_adjustment)
6065 tem = simplify_giv_expr
6066 (gen_rtx_PLUS (giv->mode, tem, giv->derive_adjustment),
6070 giv->derive_adjustment = tem;
6072 giv->cant_derive = 1;
6074 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
6075 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
6076 giv->cant_derive = 1;
6081 /* Check whether an insn is an increment legitimate for a basic induction var.
6082 X is the source of insn P, or a part of it.
6083 MODE is the mode in which X should be interpreted.
6085 DEST_REG is the putative biv, also the destination of the insn.
6086 We accept patterns of these forms:
6087 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
6088 REG = INVARIANT + REG
6090 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
6091 store the additive term into *INC_VAL, and store the place where
6092 we found the additive term into *LOCATION.
6094 If X is an assignment of an invariant into DEST_REG, we set
6095 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
6097 We also want to detect a BIV when it corresponds to a variable
6098 whose mode was promoted via PROMOTED_MODE. In that case, an increment
6099 of the variable may be a PLUS that adds a SUBREG of that variable to
6100 an invariant and then sign- or zero-extends the result of the PLUS
6103 Most GIVs in such cases will be in the promoted mode, since that is the
6104 probably the natural computation mode (and almost certainly the mode
6105 used for addresses) on the machine. So we view the pseudo-reg containing
6106 the variable as the BIV, as if it were simply incremented.
6108 Note that treating the entire pseudo as a BIV will result in making
6109 simple increments to any GIVs based on it. However, if the variable
6110 overflows in its declared mode but not its promoted mode, the result will
6111 be incorrect. This is acceptable if the variable is signed, since
6112 overflows in such cases are undefined, but not if it is unsigned, since
6113 those overflows are defined. So we only check for SIGN_EXTEND and
6116 If we cannot find a biv, we return 0. */
6119 basic_induction_var (x, mode, dest_reg, p, inc_val, mult_val, location,
6122 enum machine_mode mode;
6128 int *multi_insn_incr;
6130 register enum rtx_code code;
6134 code = GET_CODE (x);
6139 if (rtx_equal_p (XEXP (x, 0), dest_reg)
6140 || (GET_CODE (XEXP (x, 0)) == SUBREG
6141 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
6142 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
6144 argp = &XEXP (x, 1);
6146 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
6147 || (GET_CODE (XEXP (x, 1)) == SUBREG
6148 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
6149 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
6151 argp = &XEXP (x, 0);
6157 if (invariant_p (arg) != 1)
6160 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
6161 *mult_val = const1_rtx;
6166 /* If this is a SUBREG for a promoted variable, check the inner
6168 if (SUBREG_PROMOTED_VAR_P (x))
6169 return basic_induction_var (SUBREG_REG (x), GET_MODE (SUBREG_REG (x)),
6170 dest_reg, p, inc_val, mult_val, location,
6175 /* If this register is assigned in a previous insn, look at its
6176 source, but don't go outside the loop or past a label. */
6182 insn = PREV_INSN (insn);
6183 } while (insn && GET_CODE (insn) == NOTE
6184 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6188 set = single_set (insn);
6192 if ((SET_DEST (set) == x
6193 || (GET_CODE (SET_DEST (set)) == SUBREG
6194 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set)))
6196 && (GET_MODE_CLASS (GET_MODE (SET_DEST (set)))
6198 && SUBREG_REG (SET_DEST (set)) == x))
6199 && basic_induction_var (SET_SRC (set),
6200 (GET_MODE (SET_SRC (set)) == VOIDmode
6202 : GET_MODE (SET_SRC (set))),
6204 inc_val, mult_val, location,
6207 *multi_insn_incr = 1;
6211 /* ... fall through ... */
6213 /* Can accept constant setting of biv only when inside inner most loop.
6214 Otherwise, a biv of an inner loop may be incorrectly recognized
6215 as a biv of the outer loop,
6216 causing code to be moved INTO the inner loop. */
6218 if (invariant_p (x) != 1)
6223 /* convert_modes aborts if we try to convert to or from CCmode, so just
6224 exclude that case. It is very unlikely that a condition code value
6225 would be a useful iterator anyways. */
6226 if (this_loop_info.loops_enclosed == 1
6227 && GET_MODE_CLASS (mode) != MODE_CC
6228 && GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
6230 /* Possible bug here? Perhaps we don't know the mode of X. */
6231 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
6232 *mult_val = const0_rtx;
6239 return basic_induction_var (XEXP (x, 0), GET_MODE (XEXP (x, 0)),
6240 dest_reg, p, inc_val, mult_val, location,
6244 /* Similar, since this can be a sign extension. */
6245 for (insn = PREV_INSN (p);
6246 (insn && GET_CODE (insn) == NOTE
6247 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6248 insn = PREV_INSN (insn))
6252 set = single_set (insn);
6254 if (set && SET_DEST (set) == XEXP (x, 0)
6255 && GET_CODE (XEXP (x, 1)) == CONST_INT
6256 && INTVAL (XEXP (x, 1)) >= 0
6257 && GET_CODE (SET_SRC (set)) == ASHIFT
6258 && XEXP (x, 1) == XEXP (SET_SRC (set), 1)
6259 && basic_induction_var (XEXP (SET_SRC (set), 0),
6260 GET_MODE (XEXP (x, 0)),
6261 dest_reg, insn, inc_val, mult_val,
6262 location, multi_insn_incr))
6264 *multi_insn_incr = 1;
6274 /* A general induction variable (giv) is any quantity that is a linear
6275 function of a basic induction variable,
6276 i.e. giv = biv * mult_val + add_val.
6277 The coefficients can be any loop invariant quantity.
6278 A giv need not be computed directly from the biv;
6279 it can be computed by way of other givs. */
6281 /* Determine whether X computes a giv.
6282 If it does, return a nonzero value
6283 which is the benefit from eliminating the computation of X;
6284 set *SRC_REG to the register of the biv that it is computed from;
6285 set *ADD_VAL and *MULT_VAL to the coefficients,
6286 such that the value of X is biv * mult + add; */
6289 general_induction_var (x, src_reg, add_val, mult_val, is_addr, pbenefit)
6300 /* If this is an invariant, forget it, it isn't a giv. */
6301 if (invariant_p (x) == 1)
6304 /* See if the expression could be a giv and get its form.
6305 Mark our place on the obstack in case we don't find a giv. */
6306 storage = (char *) oballoc (0);
6308 x = simplify_giv_expr (x, pbenefit);
6315 switch (GET_CODE (x))
6319 /* Since this is now an invariant and wasn't before, it must be a giv
6320 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6322 *src_reg = loop_iv_list->biv->dest_reg;
6323 *mult_val = const0_rtx;
6328 /* This is equivalent to a BIV. */
6330 *mult_val = const1_rtx;
6331 *add_val = const0_rtx;
6335 /* Either (plus (biv) (invar)) or
6336 (plus (mult (biv) (invar_1)) (invar_2)). */
6337 if (GET_CODE (XEXP (x, 0)) == MULT)
6339 *src_reg = XEXP (XEXP (x, 0), 0);
6340 *mult_val = XEXP (XEXP (x, 0), 1);
6344 *src_reg = XEXP (x, 0);
6345 *mult_val = const1_rtx;
6347 *add_val = XEXP (x, 1);
6351 /* ADD_VAL is zero. */
6352 *src_reg = XEXP (x, 0);
6353 *mult_val = XEXP (x, 1);
6354 *add_val = const0_rtx;
6361 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6362 unless they are CONST_INT). */
6363 if (GET_CODE (*add_val) == USE)
6364 *add_val = XEXP (*add_val, 0);
6365 if (GET_CODE (*mult_val) == USE)
6366 *mult_val = XEXP (*mult_val, 0);
6371 *pbenefit += ADDRESS_COST (orig_x) - reg_address_cost;
6373 *pbenefit += rtx_cost (orig_x, MEM) - reg_address_cost;
6377 *pbenefit += rtx_cost (orig_x, SET);
6379 /* Always return true if this is a giv so it will be detected as such,
6380 even if the benefit is zero or negative. This allows elimination
6381 of bivs that might otherwise not be eliminated. */
6385 /* Given an expression, X, try to form it as a linear function of a biv.
6386 We will canonicalize it to be of the form
6387 (plus (mult (BIV) (invar_1))
6389 with possible degeneracies.
6391 The invariant expressions must each be of a form that can be used as a
6392 machine operand. We surround then with a USE rtx (a hack, but localized
6393 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6394 routine; it is the caller's responsibility to strip them.
6396 If no such canonicalization is possible (i.e., two biv's are used or an
6397 expression that is neither invariant nor a biv or giv), this routine
6400 For a non-zero return, the result will have a code of CONST_INT, USE,
6401 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6403 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6405 static rtx sge_plus PARAMS ((enum machine_mode, rtx, rtx));
6406 static rtx sge_plus_constant PARAMS ((rtx, rtx));
6407 static int cmp_combine_givs_stats PARAMS ((const PTR, const PTR));
6408 static int cmp_recombine_givs_stats PARAMS ((const PTR, const PTR));
6411 simplify_giv_expr (x, benefit)
6415 enum machine_mode mode = GET_MODE (x);
6419 /* If this is not an integer mode, or if we cannot do arithmetic in this
6420 mode, this can't be a giv. */
6421 if (mode != VOIDmode
6422 && (GET_MODE_CLASS (mode) != MODE_INT
6423 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
6426 switch (GET_CODE (x))
6429 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
6430 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
6431 if (arg0 == 0 || arg1 == 0)
6434 /* Put constant last, CONST_INT last if both constant. */
6435 if ((GET_CODE (arg0) == USE
6436 || GET_CODE (arg0) == CONST_INT)
6437 && ! ((GET_CODE (arg0) == USE
6438 && GET_CODE (arg1) == USE)
6439 || GET_CODE (arg1) == CONST_INT))
6440 tem = arg0, arg0 = arg1, arg1 = tem;
6442 /* Handle addition of zero, then addition of an invariant. */
6443 if (arg1 == const0_rtx)
6445 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
6446 switch (GET_CODE (arg0))
6450 /* Adding two invariants must result in an invariant, so enclose
6451 addition operation inside a USE and return it. */
6452 if (GET_CODE (arg0) == USE)
6453 arg0 = XEXP (arg0, 0);
6454 if (GET_CODE (arg1) == USE)
6455 arg1 = XEXP (arg1, 0);
6457 if (GET_CODE (arg0) == CONST_INT)
6458 tem = arg0, arg0 = arg1, arg1 = tem;
6459 if (GET_CODE (arg1) == CONST_INT)
6460 tem = sge_plus_constant (arg0, arg1);
6462 tem = sge_plus (mode, arg0, arg1);
6464 if (GET_CODE (tem) != CONST_INT)
6465 tem = gen_rtx_USE (mode, tem);
6470 /* biv + invar or mult + invar. Return sum. */
6471 return gen_rtx_PLUS (mode, arg0, arg1);
6474 /* (a + invar_1) + invar_2. Associate. */
6476 simplify_giv_expr (gen_rtx_PLUS (mode,
6487 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6488 MULT to reduce cases. */
6489 if (GET_CODE (arg0) == REG)
6490 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
6491 if (GET_CODE (arg1) == REG)
6492 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
6494 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6495 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6496 Recurse to associate the second PLUS. */
6497 if (GET_CODE (arg1) == MULT)
6498 tem = arg0, arg0 = arg1, arg1 = tem;
6500 if (GET_CODE (arg1) == PLUS)
6502 simplify_giv_expr (gen_rtx_PLUS (mode,
6503 gen_rtx_PLUS (mode, arg0,
6508 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6509 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
6512 if (!rtx_equal_p (arg0, arg1))
6515 return simplify_giv_expr (gen_rtx_MULT (mode,
6523 /* Handle "a - b" as "a + b * (-1)". */
6524 return simplify_giv_expr (gen_rtx_PLUS (mode,
6532 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
6533 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
6534 if (arg0 == 0 || arg1 == 0)
6537 /* Put constant last, CONST_INT last if both constant. */
6538 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
6539 && GET_CODE (arg1) != CONST_INT)
6540 tem = arg0, arg0 = arg1, arg1 = tem;
6542 /* If second argument is not now constant, not giv. */
6543 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
6546 /* Handle multiply by 0 or 1. */
6547 if (arg1 == const0_rtx)
6550 else if (arg1 == const1_rtx)
6553 switch (GET_CODE (arg0))
6556 /* biv * invar. Done. */
6557 return gen_rtx_MULT (mode, arg0, arg1);
6560 /* Product of two constants. */
6561 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6564 /* invar * invar. It is a giv, but very few of these will
6565 actually pay off, so limit to simple registers. */
6566 if (GET_CODE (arg1) != CONST_INT)
6569 arg0 = XEXP (arg0, 0);
6570 if (GET_CODE (arg0) == REG)
6571 tem = gen_rtx_MULT (mode, arg0, arg1);
6572 else if (GET_CODE (arg0) == MULT
6573 && GET_CODE (XEXP (arg0, 0)) == REG
6574 && GET_CODE (XEXP (arg0, 1)) == CONST_INT)
6576 tem = gen_rtx_MULT (mode, XEXP (arg0, 0),
6577 GEN_INT (INTVAL (XEXP (arg0, 1))
6582 return gen_rtx_USE (mode, tem);
6585 /* (a * invar_1) * invar_2. Associate. */
6586 return simplify_giv_expr (gen_rtx_MULT (mode,
6594 /* (a + invar_1) * invar_2. Distribute. */
6595 return simplify_giv_expr (gen_rtx_PLUS (mode,
6609 /* Shift by constant is multiply by power of two. */
6610 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6614 simplify_giv_expr (gen_rtx_MULT (mode,
6616 GEN_INT ((HOST_WIDE_INT) 1
6617 << INTVAL (XEXP (x, 1)))),
6621 /* "-a" is "a * (-1)" */
6622 return simplify_giv_expr (gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6626 /* "~a" is "-a - 1". Silly, but easy. */
6627 return simplify_giv_expr (gen_rtx_MINUS (mode,
6628 gen_rtx_NEG (mode, XEXP (x, 0)),
6633 /* Already in proper form for invariant. */
6637 /* If this is a new register, we can't deal with it. */
6638 if (REGNO (x) >= max_reg_before_loop)
6641 /* Check for biv or giv. */
6642 switch (REG_IV_TYPE (REGNO (x)))
6646 case GENERAL_INDUCT:
6648 struct induction *v = REG_IV_INFO (REGNO (x));
6650 /* Form expression from giv and add benefit. Ensure this giv
6651 can derive another and subtract any needed adjustment if so. */
6652 *benefit += v->benefit;
6656 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode,
6657 v->src_reg, v->mult_val),
6660 if (v->derive_adjustment)
6661 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6662 return simplify_giv_expr (tem, benefit);
6666 /* If it isn't an induction variable, and it is invariant, we
6667 may be able to simplify things further by looking through
6668 the bits we just moved outside the loop. */
6669 if (invariant_p (x) == 1)
6673 for (m = the_movables; m ; m = m->next)
6674 if (rtx_equal_p (x, m->set_dest))
6676 /* Ok, we found a match. Substitute and simplify. */
6678 /* If we match another movable, we must use that, as
6679 this one is going away. */
6681 return simplify_giv_expr (m->match->set_dest, benefit);
6683 /* If consec is non-zero, this is a member of a group of
6684 instructions that were moved together. We handle this
6685 case only to the point of seeking to the last insn and
6686 looking for a REG_EQUAL. Fail if we don't find one. */
6691 do { tem = NEXT_INSN (tem); } while (--i > 0);
6693 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6695 tem = XEXP (tem, 0);
6699 tem = single_set (m->insn);
6701 tem = SET_SRC (tem);
6706 /* What we are most interested in is pointer
6707 arithmetic on invariants -- only take
6708 patterns we may be able to do something with. */
6709 if (GET_CODE (tem) == PLUS
6710 || GET_CODE (tem) == MULT
6711 || GET_CODE (tem) == ASHIFT
6712 || GET_CODE (tem) == CONST_INT
6713 || GET_CODE (tem) == SYMBOL_REF)
6715 tem = simplify_giv_expr (tem, benefit);
6719 else if (GET_CODE (tem) == CONST
6720 && GET_CODE (XEXP (tem, 0)) == PLUS
6721 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6722 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6724 tem = simplify_giv_expr (XEXP (tem, 0), benefit);
6735 /* Fall through to general case. */
6737 /* If invariant, return as USE (unless CONST_INT).
6738 Otherwise, not giv. */
6739 if (GET_CODE (x) == USE)
6742 if (invariant_p (x) == 1)
6744 if (GET_CODE (x) == CONST_INT)
6746 if (GET_CODE (x) == CONST
6747 && GET_CODE (XEXP (x, 0)) == PLUS
6748 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6749 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6751 return gen_rtx_USE (mode, x);
6758 /* This routine folds invariants such that there is only ever one
6759 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6762 sge_plus_constant (x, c)
6765 if (GET_CODE (x) == CONST_INT)
6766 return GEN_INT (INTVAL (x) + INTVAL (c));
6767 else if (GET_CODE (x) != PLUS)
6768 return gen_rtx_PLUS (GET_MODE (x), x, c);
6769 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6771 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6772 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6774 else if (GET_CODE (XEXP (x, 0)) == PLUS
6775 || GET_CODE (XEXP (x, 1)) != PLUS)
6777 return gen_rtx_PLUS (GET_MODE (x),
6778 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6782 return gen_rtx_PLUS (GET_MODE (x),
6783 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6788 sge_plus (mode, x, y)
6789 enum machine_mode mode;
6792 while (GET_CODE (y) == PLUS)
6794 rtx a = XEXP (y, 0);
6795 if (GET_CODE (a) == CONST_INT)
6796 x = sge_plus_constant (x, a);
6798 x = gen_rtx_PLUS (mode, x, a);
6801 if (GET_CODE (y) == CONST_INT)
6802 x = sge_plus_constant (x, y);
6804 x = gen_rtx_PLUS (mode, x, y);
6808 /* Help detect a giv that is calculated by several consecutive insns;
6812 The caller has already identified the first insn P as having a giv as dest;
6813 we check that all other insns that set the same register follow
6814 immediately after P, that they alter nothing else,
6815 and that the result of the last is still a giv.
6817 The value is 0 if the reg set in P is not really a giv.
6818 Otherwise, the value is the amount gained by eliminating
6819 all the consecutive insns that compute the value.
6821 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6822 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6824 The coefficients of the ultimate giv value are stored in
6825 *MULT_VAL and *ADD_VAL. */
6828 consec_sets_giv (first_benefit, p, src_reg, dest_reg,
6829 add_val, mult_val, last_consec_insn)
6836 rtx *last_consec_insn;
6844 /* Indicate that this is a giv so that we can update the value produced in
6845 each insn of the multi-insn sequence.
6847 This induction structure will be used only by the call to
6848 general_induction_var below, so we can allocate it on our stack.
6849 If this is a giv, our caller will replace the induct var entry with
6850 a new induction structure. */
6852 = (struct induction *) alloca (sizeof (struct induction));
6853 v->src_reg = src_reg;
6854 v->mult_val = *mult_val;
6855 v->add_val = *add_val;
6856 v->benefit = first_benefit;
6858 v->derive_adjustment = 0;
6860 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
6861 REG_IV_INFO (REGNO (dest_reg)) = v;
6863 count = VARRAY_INT (n_times_set, REGNO (dest_reg)) - 1;
6868 code = GET_CODE (p);
6870 /* If libcall, skip to end of call sequence. */
6871 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6875 && (set = single_set (p))
6876 && GET_CODE (SET_DEST (set)) == REG
6877 && SET_DEST (set) == dest_reg
6878 && (general_induction_var (SET_SRC (set), &src_reg,
6879 add_val, mult_val, 0, &benefit)
6880 /* Giv created by equivalent expression. */
6881 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6882 && general_induction_var (XEXP (temp, 0), &src_reg,
6883 add_val, mult_val, 0, &benefit)))
6884 && src_reg == v->src_reg)
6886 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6887 benefit += libcall_benefit (p);
6890 v->mult_val = *mult_val;
6891 v->add_val = *add_val;
6892 v->benefit = benefit;
6894 else if (code != NOTE)
6896 /* Allow insns that set something other than this giv to a
6897 constant. Such insns are needed on machines which cannot
6898 include long constants and should not disqualify a giv. */
6900 && (set = single_set (p))
6901 && SET_DEST (set) != dest_reg
6902 && CONSTANT_P (SET_SRC (set)))
6905 REG_IV_TYPE (REGNO (dest_reg)) = UNKNOWN_INDUCT;
6910 *last_consec_insn = p;
6914 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6915 represented by G1. If no such expression can be found, or it is clear that
6916 it cannot possibly be a valid address, 0 is returned.
6918 To perform the computation, we note that
6921 where `v' is the biv.
6923 So G2 = (y/b) * G1 + (b - a*y/x).
6925 Note that MULT = y/x.
6927 Update: A and B are now allowed to be additive expressions such that
6928 B contains all variables in A. That is, computing B-A will not require
6929 subtracting variables. */
6932 express_from_1 (a, b, mult)
6935 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6937 if (mult == const0_rtx)
6940 /* If MULT is not 1, we cannot handle A with non-constants, since we
6941 would then be required to subtract multiples of the registers in A.
6942 This is theoretically possible, and may even apply to some Fortran
6943 constructs, but it is a lot of work and we do not attempt it here. */
6945 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
6948 /* In general these structures are sorted top to bottom (down the PLUS
6949 chain), but not left to right across the PLUS. If B is a higher
6950 order giv than A, we can strip one level and recurse. If A is higher
6951 order, we'll eventually bail out, but won't know that until the end.
6952 If they are the same, we'll strip one level around this loop. */
6954 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
6956 rtx ra, rb, oa, ob, tmp;
6958 ra = XEXP (a, 0), oa = XEXP (a, 1);
6959 if (GET_CODE (ra) == PLUS)
6960 tmp = ra, ra = oa, oa = tmp;
6962 rb = XEXP (b, 0), ob = XEXP (b, 1);
6963 if (GET_CODE (rb) == PLUS)
6964 tmp = rb, rb = ob, ob = tmp;
6966 if (rtx_equal_p (ra, rb))
6967 /* We matched: remove one reg completely. */
6969 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
6970 /* An alternate match. */
6972 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
6973 /* An alternate match. */
6977 /* Indicates an extra register in B. Strip one level from B and
6978 recurse, hoping B was the higher order expression. */
6979 ob = express_from_1 (a, ob, mult);
6982 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
6986 /* Here we are at the last level of A, go through the cases hoping to
6987 get rid of everything but a constant. */
6989 if (GET_CODE (a) == PLUS)
6993 ra = XEXP (a, 0), oa = XEXP (a, 1);
6994 if (rtx_equal_p (oa, b))
6996 else if (!rtx_equal_p (ra, b))
6999 if (GET_CODE (oa) != CONST_INT)
7002 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
7004 else if (GET_CODE (a) == CONST_INT)
7006 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
7008 else if (GET_CODE (b) == PLUS)
7010 if (rtx_equal_p (a, XEXP (b, 0)))
7012 else if (rtx_equal_p (a, XEXP (b, 1)))
7017 else if (rtx_equal_p (a, b))
7024 express_from (g1, g2)
7025 struct induction *g1, *g2;
7029 /* The value that G1 will be multiplied by must be a constant integer. Also,
7030 the only chance we have of getting a valid address is if b*c/a (see above
7031 for notation) is also an integer. */
7032 if (GET_CODE (g1->mult_val) == CONST_INT
7033 && GET_CODE (g2->mult_val) == CONST_INT)
7035 if (g1->mult_val == const0_rtx
7036 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
7038 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
7040 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
7044 /* ??? Find out if the one is a multiple of the other? */
7048 add = express_from_1 (g1->add_val, g2->add_val, mult);
7049 if (add == NULL_RTX)
7051 /* Failed. If we've got a multiplication factor between G1 and G2,
7052 scale G1's addend and try again. */
7053 if (INTVAL (mult) > 1)
7055 rtx g1_add_val = g1->add_val;
7056 if (GET_CODE (g1_add_val) == MULT
7057 && GET_CODE (XEXP (g1_add_val, 1)) == CONST_INT)
7060 m = INTVAL (mult) * INTVAL (XEXP (g1_add_val, 1));
7061 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val),
7062 XEXP (g1_add_val, 0), GEN_INT (m));
7066 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val), g1_add_val,
7070 add = express_from_1 (g1_add_val, g2->add_val, const1_rtx);
7073 if (add == NULL_RTX)
7076 /* Form simplified final result. */
7077 if (mult == const0_rtx)
7079 else if (mult == const1_rtx)
7080 mult = g1->dest_reg;
7082 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
7084 if (add == const0_rtx)
7088 if (GET_CODE (add) == PLUS
7089 && CONSTANT_P (XEXP (add, 1)))
7091 rtx tem = XEXP (add, 1);
7092 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
7096 return gen_rtx_PLUS (g2->mode, mult, add);
7101 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7102 represented by G1. This indicates that G2 should be combined with G1 and
7103 that G2 can use (either directly or via an address expression) a register
7104 used to represent G1. */
7107 combine_givs_p (g1, g2)
7108 struct induction *g1, *g2;
7110 rtx tem = express_from (g1, g2);
7112 /* If these givs are identical, they can be combined. We use the results
7113 of express_from because the addends are not in a canonical form, so
7114 rtx_equal_p is a weaker test. */
7115 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
7116 combination to be the other way round. */
7117 if (tem == g1->dest_reg
7118 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
7120 return g1->dest_reg;
7123 /* If G2 can be expressed as a function of G1 and that function is valid
7124 as an address and no more expensive than using a register for G2,
7125 the expression of G2 in terms of G1 can be used. */
7127 && g2->giv_type == DEST_ADDR
7128 && memory_address_p (g2->mem_mode, tem)
7129 /* ??? Looses, especially with -fforce-addr, where *g2->location
7130 will always be a register, and so anything more complicated
7134 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
7136 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
7147 struct combine_givs_stats
7154 cmp_combine_givs_stats (xp, yp)
7158 const struct combine_givs_stats * const x =
7159 (const struct combine_givs_stats *) xp;
7160 const struct combine_givs_stats * const y =
7161 (const struct combine_givs_stats *) yp;
7163 d = y->total_benefit - x->total_benefit;
7164 /* Stabilize the sort. */
7166 d = x->giv_number - y->giv_number;
7170 /* Check all pairs of givs for iv_class BL and see if any can be combined with
7171 any other. If so, point SAME to the giv combined with and set NEW_REG to
7172 be an expression (in terms of the other giv's DEST_REG) equivalent to the
7173 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
7177 struct iv_class *bl;
7179 /* Additional benefit to add for being combined multiple times. */
7180 const int extra_benefit = 3;
7182 struct induction *g1, *g2, **giv_array;
7183 int i, j, k, giv_count;
7184 struct combine_givs_stats *stats;
7187 /* Count givs, because bl->giv_count is incorrect here. */
7189 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7194 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
7196 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7198 giv_array[i++] = g1;
7200 stats = (struct combine_givs_stats *) xcalloc (giv_count, sizeof (*stats));
7201 can_combine = (rtx *) xcalloc (giv_count, giv_count * sizeof(rtx));
7203 for (i = 0; i < giv_count; i++)
7209 stats[i].giv_number = i;
7211 /* If a DEST_REG GIV is used only once, do not allow it to combine
7212 with anything, for in doing so we will gain nothing that cannot
7213 be had by simply letting the GIV with which we would have combined
7214 to be reduced on its own. The losage shows up in particular with
7215 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7216 be seen elsewhere as well. */
7217 if (g1->giv_type == DEST_REG
7218 && (single_use = VARRAY_RTX (reg_single_usage, REGNO (g1->dest_reg)))
7219 && single_use != const0_rtx)
7222 this_benefit = g1->benefit;
7223 /* Add an additional weight for zero addends. */
7224 if (g1->no_const_addval)
7227 for (j = 0; j < giv_count; j++)
7233 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
7235 can_combine[i*giv_count + j] = this_combine;
7236 this_benefit += g2->benefit + extra_benefit;
7239 stats[i].total_benefit = this_benefit;
7242 /* Iterate, combining until we can't. */
7244 qsort (stats, giv_count, sizeof(*stats), cmp_combine_givs_stats);
7246 if (loop_dump_stream)
7248 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
7249 for (k = 0; k < giv_count; k++)
7251 g1 = giv_array[stats[k].giv_number];
7252 if (!g1->combined_with && !g1->same)
7253 fprintf (loop_dump_stream, " {%d, %d}",
7254 INSN_UID (giv_array[stats[k].giv_number]->insn),
7255 stats[k].total_benefit);
7257 putc ('\n', loop_dump_stream);
7260 for (k = 0; k < giv_count; k++)
7262 int g1_add_benefit = 0;
7264 i = stats[k].giv_number;
7267 /* If it has already been combined, skip. */
7268 if (g1->combined_with || g1->same)
7271 for (j = 0; j < giv_count; j++)
7274 if (g1 != g2 && can_combine[i*giv_count + j]
7275 /* If it has already been combined, skip. */
7276 && ! g2->same && ! g2->combined_with)
7280 g2->new_reg = can_combine[i*giv_count + j];
7282 g1->combined_with++;
7283 g1->lifetime += g2->lifetime;
7285 g1_add_benefit += g2->benefit;
7287 /* ??? The new final_[bg]iv_value code does a much better job
7288 of finding replaceable giv's, and hence this code may no
7289 longer be necessary. */
7290 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
7291 g1_add_benefit -= copy_cost;
7293 /* To help optimize the next set of combinations, remove
7294 this giv from the benefits of other potential mates. */
7295 for (l = 0; l < giv_count; ++l)
7297 int m = stats[l].giv_number;
7298 if (can_combine[m*giv_count + j])
7299 stats[l].total_benefit -= g2->benefit + extra_benefit;
7302 if (loop_dump_stream)
7303 fprintf (loop_dump_stream,
7304 "giv at %d combined with giv at %d\n",
7305 INSN_UID (g2->insn), INSN_UID (g1->insn));
7309 /* To help optimize the next set of combinations, remove
7310 this giv from the benefits of other potential mates. */
7311 if (g1->combined_with)
7313 for (j = 0; j < giv_count; ++j)
7315 int m = stats[j].giv_number;
7316 if (can_combine[m*giv_count + i])
7317 stats[j].total_benefit -= g1->benefit + extra_benefit;
7320 g1->benefit += g1_add_benefit;
7322 /* We've finished with this giv, and everything it touched.
7323 Restart the combination so that proper weights for the
7324 rest of the givs are properly taken into account. */
7325 /* ??? Ideally we would compact the arrays at this point, so
7326 as to not cover old ground. But sanely compacting
7327 can_combine is tricky. */
7337 struct recombine_givs_stats
7340 int start_luid, end_luid;
7343 /* Used below as comparison function for qsort. We want a ascending luid
7344 when scanning the array starting at the end, thus the arguments are
7347 cmp_recombine_givs_stats (xp, yp)
7351 const struct recombine_givs_stats * const x =
7352 (const struct recombine_givs_stats *) xp;
7353 const struct recombine_givs_stats * const y =
7354 (const struct recombine_givs_stats *) yp;
7356 d = y->start_luid - x->start_luid;
7357 /* Stabilize the sort. */
7359 d = y->giv_number - x->giv_number;
7363 /* Scan X, which is a part of INSN, for the end of life of a giv. Also
7364 look for the start of life of a giv where the start has not been seen
7365 yet to unlock the search for the end of its life.
7366 Only consider givs that belong to BIV.
7367 Return the total number of lifetime ends that have been found. */
7369 find_life_end (x, stats, insn, biv)
7371 struct recombine_givs_stats *stats;
7378 code = GET_CODE (x);
7383 rtx reg = SET_DEST (x);
7384 if (GET_CODE (reg) == REG)
7386 int regno = REGNO (reg);
7387 struct induction *v = REG_IV_INFO (regno);
7389 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7391 && v->src_reg == biv
7392 && stats[v->ix].end_luid <= 0)
7394 /* If we see a 0 here for end_luid, it means that we have
7395 scanned the entire loop without finding any use at all.
7396 We must not predicate this code on a start_luid match
7397 since that would make the test fail for givs that have
7398 been hoisted out of inner loops. */
7399 if (stats[v->ix].end_luid == 0)
7401 stats[v->ix].end_luid = stats[v->ix].start_luid;
7402 return 1 + find_life_end (SET_SRC (x), stats, insn, biv);
7404 else if (stats[v->ix].start_luid == INSN_LUID (insn))
7405 stats[v->ix].end_luid = 0;
7407 return find_life_end (SET_SRC (x), stats, insn, biv);
7413 int regno = REGNO (x);
7414 struct induction *v = REG_IV_INFO (regno);
7416 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7418 && v->src_reg == biv
7419 && stats[v->ix].end_luid == 0)
7421 while (INSN_UID (insn) >= max_uid_for_loop)
7422 insn = NEXT_INSN (insn);
7423 stats[v->ix].end_luid = INSN_LUID (insn);
7436 fmt = GET_RTX_FORMAT (code);
7438 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7441 retval += find_life_end (XEXP (x, i), stats, insn, biv);
7443 else if (fmt[i] == 'E')
7444 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7445 retval += find_life_end (XVECEXP (x, i, j), stats, insn, biv);
7450 /* For each giv that has been combined with another, look if
7451 we can combine it with the most recently used one instead.
7452 This tends to shorten giv lifetimes, and helps the next step:
7453 try to derive givs from other givs. */
7455 recombine_givs (bl, loop_start, loop_end, unroll_p)
7456 struct iv_class *bl;
7457 rtx loop_start, loop_end;
7460 struct induction *v, **giv_array, *last_giv;
7461 struct recombine_givs_stats *stats;
7464 int ends_need_computing;
7466 for (giv_count = 0, v = bl->giv; v; v = v->next_iv)
7472 = (struct induction **) xmalloc (giv_count * sizeof (struct induction *));
7473 stats = (struct recombine_givs_stats *) xmalloc (giv_count * sizeof *stats);
7475 /* Initialize stats and set up the ix field for each giv in stats to name
7476 the corresponding index into stats. */
7477 for (i = 0, v = bl->giv; v; v = v->next_iv)
7484 stats[i].giv_number = i;
7485 /* If this giv has been hoisted out of an inner loop, use the luid of
7486 the previous insn. */
7487 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7489 stats[i].start_luid = INSN_LUID (p);
7493 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7495 /* Set up the ix field for each giv in stats to name
7496 the corresponding index into stats, and
7497 do the actual most-recently-used recombination. */
7498 for (last_giv = 0, i = giv_count - 1; i >= 0; i--)
7500 v = giv_array[stats[i].giv_number];
7504 struct induction *old_same = v->same;
7507 /* combine_givs_p actually says if we can make this transformation.
7508 The other tests are here only to avoid keeping a giv alive
7509 that could otherwise be eliminated. */
7511 && ((old_same->maybe_dead && ! old_same->combined_with)
7512 || ! last_giv->maybe_dead
7513 || last_giv->combined_with)
7514 && (new_combine = combine_givs_p (last_giv, v)))
7516 old_same->combined_with--;
7517 v->new_reg = new_combine;
7519 last_giv->combined_with++;
7520 /* No need to update lifetimes / benefits here since we have
7521 already decided what to reduce. */
7523 if (loop_dump_stream)
7525 fprintf (loop_dump_stream,
7526 "giv at %d recombined with giv at %d as ",
7527 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7528 print_rtl (loop_dump_stream, v->new_reg);
7529 putc ('\n', loop_dump_stream);
7535 else if (v->giv_type != DEST_REG)
7538 || (last_giv->maybe_dead && ! last_giv->combined_with)
7540 || v->combined_with)
7544 ends_need_computing = 0;
7545 /* For each DEST_REG giv, compute lifetime starts, and try to compute
7546 lifetime ends from regscan info. */
7547 for (i = giv_count - 1; i >= 0; i--)
7549 v = giv_array[stats[i].giv_number];
7552 if (v->giv_type == DEST_ADDR)
7554 /* Loop unrolling of an inner loop can even create new DEST_REG
7557 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7559 stats[i].start_luid = stats[i].end_luid = INSN_LUID (p);
7561 stats[i].end_luid++;
7563 else /* v->giv_type == DEST_REG */
7567 stats[i].start_luid = INSN_LUID (v->insn);
7568 stats[i].end_luid = INSN_LUID (v->last_use);
7570 else if (INSN_UID (v->insn) >= max_uid_for_loop)
7573 /* This insn has been created by loop optimization on an inner
7574 loop. We don't have a proper start_luid that will match
7575 when we see the first set. But we do know that there will
7576 be no use before the set, so we can set end_luid to 0 so that
7577 we'll start looking for the last use right away. */
7578 for (p = PREV_INSN (v->insn); INSN_UID (p) >= max_uid_for_loop; )
7580 stats[i].start_luid = INSN_LUID (p);
7581 stats[i].end_luid = 0;
7582 ends_need_computing++;
7586 int regno = REGNO (v->dest_reg);
7587 int count = VARRAY_INT (n_times_set, regno) - 1;
7590 /* Find the first insn that sets the giv, so that we can verify
7591 if this giv's lifetime wraps around the loop. We also need
7592 the luid of the first setting insn in order to detect the
7593 last use properly. */
7596 p = prev_nonnote_insn (p);
7597 if (reg_set_p (v->dest_reg, p))
7601 stats[i].start_luid = INSN_LUID (p);
7602 if (stats[i].start_luid > uid_luid[REGNO_FIRST_UID (regno)])
7604 stats[i].end_luid = -1;
7605 ends_need_computing++;
7609 stats[i].end_luid = uid_luid[REGNO_LAST_UID (regno)];
7610 if (stats[i].end_luid > INSN_LUID (loop_end))
7612 stats[i].end_luid = -1;
7613 ends_need_computing++;
7620 /* If the regscan information was unconclusive for one or more DEST_REG
7621 givs, scan the all insn in the loop to find out lifetime ends. */
7622 if (ends_need_computing)
7624 rtx biv = bl->biv->src_reg;
7629 if (p == loop_start)
7632 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
7634 ends_need_computing -= find_life_end (PATTERN (p), stats, p, biv);
7636 while (ends_need_computing);
7639 /* Set start_luid back to the last insn that sets the giv. This allows
7640 more combinations. */
7641 for (i = giv_count - 1; i >= 0; i--)
7643 v = giv_array[stats[i].giv_number];
7646 if (INSN_UID (v->insn) < max_uid_for_loop)
7647 stats[i].start_luid = INSN_LUID (v->insn);
7650 /* Now adjust lifetime ends by taking combined givs into account. */
7651 for (i = giv_count - 1; i >= 0; i--)
7656 v = giv_array[stats[i].giv_number];
7659 if (v->same && ! v->same->ignore)
7662 luid = stats[i].start_luid;
7663 /* Use unsigned arithmetic to model loop wrap-around. */
7664 if (luid - stats[j].start_luid
7665 > (unsigned) stats[j].end_luid - stats[j].start_luid)
7666 stats[j].end_luid = luid;
7670 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7672 /* Try to derive DEST_REG givs from previous DEST_REG givs with the
7673 same mult_val and non-overlapping lifetime. This reduces register
7675 Once we find a DEST_REG giv that is suitable to derive others from,
7676 we set last_giv to this giv, and try to derive as many other DEST_REG
7677 givs from it without joining overlapping lifetimes. If we then
7678 encounter a DEST_REG giv that we can't derive, we set rescan to the
7679 index for this giv (unless rescan is already set).
7680 When we are finished with the current LAST_GIV (i.e. the inner loop
7681 terminates), we start again with rescan, which then becomes the new
7683 for (i = giv_count - 1; i >= 0; i = rescan)
7685 int life_start = 0, life_end = 0;
7687 for (last_giv = 0, rescan = -1; i >= 0; i--)
7691 v = giv_array[stats[i].giv_number];
7692 if (v->giv_type != DEST_REG || v->derived_from || v->same)
7696 /* Don't use a giv that's likely to be dead to derive
7697 others - that would be likely to keep that giv alive. */
7698 if (! v->maybe_dead || v->combined_with)
7701 life_start = stats[i].start_luid;
7702 life_end = stats[i].end_luid;
7706 /* Use unsigned arithmetic to model loop wrap around. */
7707 if (((unsigned) stats[i].start_luid - life_start
7708 >= (unsigned) life_end - life_start)
7709 && ((unsigned) stats[i].end_luid - life_start
7710 > (unsigned) life_end - life_start)
7711 /* Check that the giv insn we're about to use for deriving
7712 precedes all uses of that giv. Note that initializing the
7713 derived giv would defeat the purpose of reducing register
7715 ??? We could arrange to move the insn. */
7716 && ((unsigned) stats[i].end_luid - INSN_LUID (loop_start)
7717 > (unsigned) stats[i].start_luid - INSN_LUID (loop_start))
7718 && rtx_equal_p (last_giv->mult_val, v->mult_val)
7719 /* ??? Could handle libcalls, but would need more logic. */
7720 && ! find_reg_note (v->insn, REG_RETVAL, NULL_RTX)
7721 /* We would really like to know if for any giv that v
7722 is combined with, v->insn or any intervening biv increment
7723 dominates that combined giv. However, we
7724 don't have this detailed control flow information.
7725 N.B. since last_giv will be reduced, it is valid
7726 anywhere in the loop, so we don't need to check the
7727 validity of last_giv.
7728 We rely here on the fact that v->always_executed implies that
7729 there is no jump to someplace else in the loop before the
7730 giv insn, and hence any insn that is executed before the
7731 giv insn in the loop will have a lower luid. */
7732 && (v->always_executed || ! v->combined_with)
7733 && (sum = express_from (last_giv, v))
7734 /* Make sure we don't make the add more expensive. ADD_COST
7735 doesn't take different costs of registers and constants into
7736 account, so compare the cost of the actual SET_SRCs. */
7737 && (rtx_cost (sum, SET)
7738 <= rtx_cost (SET_SRC (single_set (v->insn)), SET))
7739 /* ??? unroll can't understand anything but reg + const_int
7740 sums. It would be cleaner to fix unroll. */
7741 && ((GET_CODE (sum) == PLUS
7742 && GET_CODE (XEXP (sum, 0)) == REG
7743 && GET_CODE (XEXP (sum, 1)) == CONST_INT)
7745 && validate_change (v->insn, &PATTERN (v->insn),
7746 gen_rtx_SET (VOIDmode, v->dest_reg, sum), 0))
7748 v->derived_from = last_giv;
7749 life_end = stats[i].end_luid;
7751 if (loop_dump_stream)
7753 fprintf (loop_dump_stream,
7754 "giv at %d derived from %d as ",
7755 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7756 print_rtl (loop_dump_stream, sum);
7757 putc ('\n', loop_dump_stream);
7760 else if (rescan < 0)
7770 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
7773 emit_iv_add_mult (b, m, a, reg, insert_before)
7774 rtx b; /* initial value of basic induction variable */
7775 rtx m; /* multiplicative constant */
7776 rtx a; /* additive constant */
7777 rtx reg; /* destination register */
7783 /* Prevent unexpected sharing of these rtx. */
7787 /* Increase the lifetime of any invariants moved further in code. */
7788 update_reg_last_use (a, insert_before);
7789 update_reg_last_use (b, insert_before);
7790 update_reg_last_use (m, insert_before);
7793 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
7795 emit_move_insn (reg, result);
7796 seq = gen_sequence ();
7799 emit_insn_before (seq, insert_before);
7801 /* It is entirely possible that the expansion created lots of new
7802 registers. Iterate over the sequence we just created and
7805 if (GET_CODE (seq) == SEQUENCE)
7808 for (i = 0; i < XVECLEN (seq, 0); ++i)
7810 rtx set = single_set (XVECEXP (seq, 0, i));
7811 if (set && GET_CODE (SET_DEST (set)) == REG)
7812 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7815 else if (GET_CODE (seq) == SET
7816 && GET_CODE (SET_DEST (seq)) == REG)
7817 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
7820 /* Test whether A * B can be computed without
7821 an actual multiply insn. Value is 1 if so. */
7824 product_cheap_p (a, b)
7830 struct obstack *old_rtl_obstack = rtl_obstack;
7831 char *storage = (char *) obstack_alloc (&temp_obstack, 0);
7834 /* If only one is constant, make it B. */
7835 if (GET_CODE (a) == CONST_INT)
7836 tmp = a, a = b, b = tmp;
7838 /* If first constant, both constant, so don't need multiply. */
7839 if (GET_CODE (a) == CONST_INT)
7842 /* If second not constant, neither is constant, so would need multiply. */
7843 if (GET_CODE (b) != CONST_INT)
7846 /* One operand is constant, so might not need multiply insn. Generate the
7847 code for the multiply and see if a call or multiply, or long sequence
7848 of insns is generated. */
7850 rtl_obstack = &temp_obstack;
7852 expand_mult (GET_MODE (a), a, b, NULL_RTX, 0);
7853 tmp = gen_sequence ();
7856 if (GET_CODE (tmp) == SEQUENCE)
7858 if (XVEC (tmp, 0) == 0)
7860 else if (XVECLEN (tmp, 0) > 3)
7863 for (i = 0; i < XVECLEN (tmp, 0); i++)
7865 rtx insn = XVECEXP (tmp, 0, i);
7867 if (GET_CODE (insn) != INSN
7868 || (GET_CODE (PATTERN (insn)) == SET
7869 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7870 || (GET_CODE (PATTERN (insn)) == PARALLEL
7871 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7872 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7879 else if (GET_CODE (tmp) == SET
7880 && GET_CODE (SET_SRC (tmp)) == MULT)
7882 else if (GET_CODE (tmp) == PARALLEL
7883 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7884 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7887 /* Free any storage we obtained in generating this multiply and restore rtl
7888 allocation to its normal obstack. */
7889 obstack_free (&temp_obstack, storage);
7890 rtl_obstack = old_rtl_obstack;
7895 /* Check to see if loop can be terminated by a "decrement and branch until
7896 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7897 Also try reversing an increment loop to a decrement loop
7898 to see if the optimization can be performed.
7899 Value is nonzero if optimization was performed. */
7901 /* This is useful even if the architecture doesn't have such an insn,
7902 because it might change a loops which increments from 0 to n to a loop
7903 which decrements from n to 0. A loop that decrements to zero is usually
7904 faster than one that increments from zero. */
7906 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7907 such as approx_final_value, biv_total_increment, loop_iterations, and
7908 final_[bg]iv_value. */
7911 check_dbra_loop (loop_end, insn_count, loop_start, loop_info)
7915 struct loop_info *loop_info;
7917 struct iv_class *bl;
7924 rtx before_comparison;
7928 int compare_and_branch;
7930 /* If last insn is a conditional branch, and the insn before tests a
7931 register value, try to optimize it. Otherwise, we can't do anything. */
7933 jump = PREV_INSN (loop_end);
7934 comparison = get_condition_for_loop (jump);
7935 if (comparison == 0)
7938 /* Try to compute whether the compare/branch at the loop end is one or
7939 two instructions. */
7940 get_condition (jump, &first_compare);
7941 if (first_compare == jump)
7942 compare_and_branch = 1;
7943 else if (first_compare == prev_nonnote_insn (jump))
7944 compare_and_branch = 2;
7948 /* Check all of the bivs to see if the compare uses one of them.
7949 Skip biv's set more than once because we can't guarantee that
7950 it will be zero on the last iteration. Also skip if the biv is
7951 used between its update and the test insn. */
7953 for (bl = loop_iv_list; bl; bl = bl->next)
7955 if (bl->biv_count == 1
7956 && ! bl->biv->maybe_multiple
7957 && bl->biv->dest_reg == XEXP (comparison, 0)
7958 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
7966 /* Look for the case where the basic induction variable is always
7967 nonnegative, and equals zero on the last iteration.
7968 In this case, add a reg_note REG_NONNEG, which allows the
7969 m68k DBRA instruction to be used. */
7971 if (((GET_CODE (comparison) == GT
7972 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
7973 && INTVAL (XEXP (comparison, 1)) == -1)
7974 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
7975 && GET_CODE (bl->biv->add_val) == CONST_INT
7976 && INTVAL (bl->biv->add_val) < 0)
7978 /* Initial value must be greater than 0,
7979 init_val % -dec_value == 0 to ensure that it equals zero on
7980 the last iteration */
7982 if (GET_CODE (bl->initial_value) == CONST_INT
7983 && INTVAL (bl->initial_value) > 0
7984 && (INTVAL (bl->initial_value)
7985 % (-INTVAL (bl->biv->add_val))) == 0)
7987 /* register always nonnegative, add REG_NOTE to branch */
7988 REG_NOTES (PREV_INSN (loop_end))
7989 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7990 REG_NOTES (PREV_INSN (loop_end)));
7996 /* If the decrement is 1 and the value was tested as >= 0 before
7997 the loop, then we can safely optimize. */
7998 for (p = loop_start; p; p = PREV_INSN (p))
8000 if (GET_CODE (p) == CODE_LABEL)
8002 if (GET_CODE (p) != JUMP_INSN)
8005 before_comparison = get_condition_for_loop (p);
8006 if (before_comparison
8007 && XEXP (before_comparison, 0) == bl->biv->dest_reg
8008 && GET_CODE (before_comparison) == LT
8009 && XEXP (before_comparison, 1) == const0_rtx
8010 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
8011 && INTVAL (bl->biv->add_val) == -1)
8013 REG_NOTES (PREV_INSN (loop_end))
8014 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
8015 REG_NOTES (PREV_INSN (loop_end)));
8022 else if (GET_CODE (bl->biv->add_val) == CONST_INT
8023 && INTVAL (bl->biv->add_val) > 0)
8025 /* Try to change inc to dec, so can apply above optimization. */
8027 all registers modified are induction variables or invariant,
8028 all memory references have non-overlapping addresses
8029 (obviously true if only one write)
8030 allow 2 insns for the compare/jump at the end of the loop. */
8031 /* Also, we must avoid any instructions which use both the reversed
8032 biv and another biv. Such instructions will fail if the loop is
8033 reversed. We meet this condition by requiring that either
8034 no_use_except_counting is true, or else that there is only
8036 int num_nonfixed_reads = 0;
8037 /* 1 if the iteration var is used only to count iterations. */
8038 int no_use_except_counting = 0;
8039 /* 1 if the loop has no memory store, or it has a single memory store
8040 which is reversible. */
8041 int reversible_mem_store = 1;
8043 if (bl->giv_count == 0
8044 && ! loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
8046 rtx bivreg = regno_reg_rtx[bl->regno];
8048 /* If there are no givs for this biv, and the only exit is the
8049 fall through at the end of the loop, then
8050 see if perhaps there are no uses except to count. */
8051 no_use_except_counting = 1;
8052 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8053 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
8055 rtx set = single_set (p);
8057 if (set && GET_CODE (SET_DEST (set)) == REG
8058 && REGNO (SET_DEST (set)) == bl->regno)
8059 /* An insn that sets the biv is okay. */
8061 else if ((p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
8062 || p == prev_nonnote_insn (loop_end))
8063 && reg_mentioned_p (bivreg, PATTERN (p)))
8065 /* If either of these insns uses the biv and sets a pseudo
8066 that has more than one usage, then the biv has uses
8067 other than counting since it's used to derive a value
8068 that is used more than one time. */
8069 int note_set_pseudo_multiple_uses_retval = 0;
8070 note_stores (PATTERN (p), note_set_pseudo_multiple_uses,
8071 ¬e_set_pseudo_multiple_uses_retval);
8072 if (note_set_pseudo_multiple_uses_retval)
8074 no_use_except_counting = 0;
8078 else if (reg_mentioned_p (bivreg, PATTERN (p)))
8080 no_use_except_counting = 0;
8086 if (no_use_except_counting)
8087 ; /* no need to worry about MEMs. */
8088 else if (num_mem_sets <= 1)
8090 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8091 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
8092 num_nonfixed_reads += count_nonfixed_reads (PATTERN (p));
8094 /* If the loop has a single store, and the destination address is
8095 invariant, then we can't reverse the loop, because this address
8096 might then have the wrong value at loop exit.
8097 This would work if the source was invariant also, however, in that
8098 case, the insn should have been moved out of the loop. */
8100 if (num_mem_sets == 1)
8102 struct induction *v;
8104 reversible_mem_store
8105 = (! unknown_address_altered
8106 && ! unknown_constant_address_altered
8107 && ! invariant_p (XEXP (XEXP (loop_store_mems, 0), 0)));
8109 /* If the store depends on a register that is set after the
8110 store, it depends on the initial value, and is thus not
8112 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
8114 if (v->giv_type == DEST_REG
8115 && reg_mentioned_p (v->dest_reg,
8116 XEXP (loop_store_mems, 0))
8117 && loop_insn_first_p (first_loop_store_insn, v->insn))
8118 reversible_mem_store = 0;
8125 /* This code only acts for innermost loops. Also it simplifies
8126 the memory address check by only reversing loops with
8127 zero or one memory access.
8128 Two memory accesses could involve parts of the same array,
8129 and that can't be reversed.
8130 If the biv is used only for counting, than we don't need to worry
8131 about all these things. */
8133 if ((num_nonfixed_reads <= 1
8134 && ! loop_info->has_call
8135 && ! loop_info->has_volatile
8136 && reversible_mem_store
8137 && (bl->giv_count + bl->biv_count + num_mem_sets
8138 + num_movables + compare_and_branch == insn_count)
8139 && (bl == loop_iv_list && bl->next == 0))
8140 || no_use_except_counting)
8144 /* Loop can be reversed. */
8145 if (loop_dump_stream)
8146 fprintf (loop_dump_stream, "Can reverse loop\n");
8148 /* Now check other conditions:
8150 The increment must be a constant, as must the initial value,
8151 and the comparison code must be LT.
8153 This test can probably be improved since +/- 1 in the constant
8154 can be obtained by changing LT to LE and vice versa; this is
8158 /* for constants, LE gets turned into LT */
8159 && (GET_CODE (comparison) == LT
8160 || (GET_CODE (comparison) == LE
8161 && no_use_except_counting)))
8163 HOST_WIDE_INT add_val, add_adjust, comparison_val = 0;
8164 rtx initial_value, comparison_value;
8166 enum rtx_code cmp_code;
8167 int comparison_const_width;
8168 unsigned HOST_WIDE_INT comparison_sign_mask;
8170 add_val = INTVAL (bl->biv->add_val);
8171 comparison_value = XEXP (comparison, 1);
8172 if (GET_MODE (comparison_value) == VOIDmode)
8173 comparison_const_width
8174 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
8176 comparison_const_width
8177 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
8178 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
8179 comparison_const_width = HOST_BITS_PER_WIDE_INT;
8180 comparison_sign_mask
8181 = (unsigned HOST_WIDE_INT)1 << (comparison_const_width - 1);
8183 /* If the comparison value is not a loop invariant, then we
8184 can not reverse this loop.
8186 ??? If the insns which initialize the comparison value as
8187 a whole compute an invariant result, then we could move
8188 them out of the loop and proceed with loop reversal. */
8189 if (!invariant_p (comparison_value))
8192 if (GET_CODE (comparison_value) == CONST_INT)
8193 comparison_val = INTVAL (comparison_value);
8194 initial_value = bl->initial_value;
8196 /* Normalize the initial value if it is an integer and
8197 has no other use except as a counter. This will allow
8198 a few more loops to be reversed. */
8199 if (no_use_except_counting
8200 && GET_CODE (comparison_value) == CONST_INT
8201 && GET_CODE (initial_value) == CONST_INT)
8203 comparison_val = comparison_val - INTVAL (bl->initial_value);
8204 /* The code below requires comparison_val to be a multiple
8205 of add_val in order to do the loop reversal, so
8206 round up comparison_val to a multiple of add_val.
8207 Since comparison_value is constant, we know that the
8208 current comparison code is LT. */
8209 comparison_val = comparison_val + add_val - 1;
8211 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
8212 /* We postpone overflow checks for COMPARISON_VAL here;
8213 even if there is an overflow, we might still be able to
8214 reverse the loop, if converting the loop exit test to
8216 initial_value = const0_rtx;
8219 /* First check if we can do a vanilla loop reversal. */
8220 if (initial_value == const0_rtx
8221 /* If we have a decrement_and_branch_on_count,
8222 prefer the NE test, since this will allow that
8223 instruction to be generated. Note that we must
8224 use a vanilla loop reversal if the biv is used to
8225 calculate a giv or has a non-counting use. */
8226 #if ! defined (HAVE_decrement_and_branch_until_zero) \
8227 && defined (HAVE_decrement_and_branch_on_count)
8228 && (! (add_val == 1 && loop_info->vtop
8229 && (bl->biv_count == 0
8230 || no_use_except_counting)))
8232 && GET_CODE (comparison_value) == CONST_INT
8233 /* Now do postponed overflow checks on COMPARISON_VAL. */
8234 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
8235 & comparison_sign_mask))
8237 /* Register will always be nonnegative, with value
8238 0 on last iteration */
8239 add_adjust = add_val;
8243 else if (add_val == 1 && loop_info->vtop
8244 && (bl->biv_count == 0
8245 || no_use_except_counting))
8253 if (GET_CODE (comparison) == LE)
8254 add_adjust -= add_val;
8256 /* If the initial value is not zero, or if the comparison
8257 value is not an exact multiple of the increment, then we
8258 can not reverse this loop. */
8259 if (initial_value == const0_rtx
8260 && GET_CODE (comparison_value) == CONST_INT)
8262 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
8267 if (! no_use_except_counting || add_val != 1)
8271 final_value = comparison_value;
8273 /* Reset these in case we normalized the initial value
8274 and comparison value above. */
8275 if (GET_CODE (comparison_value) == CONST_INT
8276 && GET_CODE (initial_value) == CONST_INT)
8278 comparison_value = GEN_INT (comparison_val);
8280 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
8282 bl->initial_value = initial_value;
8284 /* Save some info needed to produce the new insns. */
8285 reg = bl->biv->dest_reg;
8286 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
8287 if (jump_label == pc_rtx)
8288 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
8289 new_add_val = GEN_INT (- INTVAL (bl->biv->add_val));
8291 /* Set start_value; if this is not a CONST_INT, we need
8293 Initialize biv to start_value before loop start.
8294 The old initializing insn will be deleted as a
8295 dead store by flow.c. */
8296 if (initial_value == const0_rtx
8297 && GET_CODE (comparison_value) == CONST_INT)
8299 start_value = GEN_INT (comparison_val - add_adjust);
8300 emit_insn_before (gen_move_insn (reg, start_value),
8303 else if (GET_CODE (initial_value) == CONST_INT)
8305 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
8306 enum machine_mode mode = GET_MODE (reg);
8307 enum insn_code icode
8308 = add_optab->handlers[(int) mode].insn_code;
8310 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
8311 || ! ((*insn_data[icode].operand[1].predicate)
8312 (comparison_value, mode))
8313 || ! ((*insn_data[icode].operand[2].predicate)
8317 = gen_rtx_PLUS (mode, comparison_value, offset);
8318 emit_insn_before ((GEN_FCN (icode)
8319 (reg, comparison_value, offset)),
8321 if (GET_CODE (comparison) == LE)
8322 final_value = gen_rtx_PLUS (mode, comparison_value,
8325 else if (! add_adjust)
8327 enum machine_mode mode = GET_MODE (reg);
8328 enum insn_code icode
8329 = sub_optab->handlers[(int) mode].insn_code;
8330 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
8331 || ! ((*insn_data[icode].operand[1].predicate)
8332 (comparison_value, mode))
8333 || ! ((*insn_data[icode].operand[2].predicate)
8334 (initial_value, mode)))
8337 = gen_rtx_MINUS (mode, comparison_value, initial_value);
8338 emit_insn_before ((GEN_FCN (icode)
8339 (reg, comparison_value, initial_value)),
8343 /* We could handle the other cases too, but it'll be
8344 better to have a testcase first. */
8347 /* We may not have a single insn which can increment a reg, so
8348 create a sequence to hold all the insns from expand_inc. */
8350 expand_inc (reg, new_add_val);
8351 tem = gen_sequence ();
8354 p = emit_insn_before (tem, bl->biv->insn);
8355 delete_insn (bl->biv->insn);
8357 /* Update biv info to reflect its new status. */
8359 bl->initial_value = start_value;
8360 bl->biv->add_val = new_add_val;
8362 /* Update loop info. */
8363 loop_info->initial_value = reg;
8364 loop_info->initial_equiv_value = reg;
8365 loop_info->final_value = const0_rtx;
8366 loop_info->final_equiv_value = const0_rtx;
8367 loop_info->comparison_value = const0_rtx;
8368 loop_info->comparison_code = cmp_code;
8369 loop_info->increment = new_add_val;
8371 /* Inc LABEL_NUSES so that delete_insn will
8372 not delete the label. */
8373 LABEL_NUSES (XEXP (jump_label, 0)) ++;
8375 /* Emit an insn after the end of the loop to set the biv's
8376 proper exit value if it is used anywhere outside the loop. */
8377 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
8379 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
8380 emit_insn_after (gen_move_insn (reg, final_value),
8383 /* Delete compare/branch at end of loop. */
8384 delete_insn (PREV_INSN (loop_end));
8385 if (compare_and_branch == 2)
8386 delete_insn (first_compare);
8388 /* Add new compare/branch insn at end of loop. */
8390 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
8391 GET_MODE (reg), 0, 0,
8392 XEXP (jump_label, 0));
8393 tem = gen_sequence ();
8395 emit_jump_insn_before (tem, loop_end);
8397 for (tem = PREV_INSN (loop_end);
8398 tem && GET_CODE (tem) != JUMP_INSN;
8399 tem = PREV_INSN (tem))
8403 JUMP_LABEL (tem) = XEXP (jump_label, 0);
8409 /* Increment of LABEL_NUSES done above. */
8410 /* Register is now always nonnegative,
8411 so add REG_NONNEG note to the branch. */
8412 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
8418 /* No insn may reference both the reversed and another biv or it
8419 will fail (see comment near the top of the loop reversal
8421 Earlier on, we have verified that the biv has no use except
8422 counting, or it is the only biv in this function.
8423 However, the code that computes no_use_except_counting does
8424 not verify reg notes. It's possible to have an insn that
8425 references another biv, and has a REG_EQUAL note with an
8426 expression based on the reversed biv. To avoid this case,
8427 remove all REG_EQUAL notes based on the reversed biv
8429 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8430 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
8433 rtx set = single_set (p);
8434 /* If this is a set of a GIV based on the reversed biv, any
8435 REG_EQUAL notes should still be correct. */
8437 || GET_CODE (SET_DEST (set)) != REG
8438 || (size_t) REGNO (SET_DEST (set)) >= reg_iv_type->num_elements
8439 || REG_IV_TYPE (REGNO (SET_DEST (set))) != GENERAL_INDUCT
8440 || REG_IV_INFO (REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
8441 for (pnote = ®_NOTES (p); *pnote;)
8443 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
8444 && reg_mentioned_p (regno_reg_rtx[bl->regno],
8446 *pnote = XEXP (*pnote, 1);
8448 pnote = &XEXP (*pnote, 1);
8452 /* Mark that this biv has been reversed. Each giv which depends
8453 on this biv, and which is also live past the end of the loop
8454 will have to be fixed up. */
8458 if (loop_dump_stream)
8460 fprintf (loop_dump_stream, "Reversed loop");
8462 fprintf (loop_dump_stream, " and added reg_nonneg\n");
8464 fprintf (loop_dump_stream, "\n");
8475 /* Verify whether the biv BL appears to be eliminable,
8476 based on the insns in the loop that refer to it.
8477 LOOP_START is the first insn of the loop, and END is the end insn.
8479 If ELIMINATE_P is non-zero, actually do the elimination.
8481 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8482 determine whether invariant insns should be placed inside or at the
8483 start of the loop. */
8486 maybe_eliminate_biv (bl, loop_start, end, eliminate_p, threshold, insn_count)
8487 struct iv_class *bl;
8491 int threshold, insn_count;
8493 rtx reg = bl->biv->dest_reg;
8496 /* Scan all insns in the loop, stopping if we find one that uses the
8497 biv in a way that we cannot eliminate. */
8499 for (p = loop_start; p != end; p = NEXT_INSN (p))
8501 enum rtx_code code = GET_CODE (p);
8502 rtx where = threshold >= insn_count ? loop_start : p;
8504 /* If this is a libcall that sets a giv, skip ahead to its end. */
8505 if (GET_RTX_CLASS (code) == 'i')
8507 rtx note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
8511 rtx last = XEXP (note, 0);
8512 rtx set = single_set (last);
8514 if (set && GET_CODE (SET_DEST (set)) == REG)
8516 int regno = REGNO (SET_DEST (set));
8518 if (regno < max_reg_before_loop
8519 && REG_IV_TYPE (regno) == GENERAL_INDUCT
8520 && REG_IV_INFO (regno)->src_reg == bl->biv->src_reg)
8525 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
8526 && reg_mentioned_p (reg, PATTERN (p))
8527 && ! maybe_eliminate_biv_1 (PATTERN (p), p, bl, eliminate_p, where))
8529 if (loop_dump_stream)
8530 fprintf (loop_dump_stream,
8531 "Cannot eliminate biv %d: biv used in insn %d.\n",
8532 bl->regno, INSN_UID (p));
8539 if (loop_dump_stream)
8540 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
8541 bl->regno, eliminate_p ? "was" : "can be");
8548 /* INSN and REFERENCE are instructions in the same insn chain.
8549 Return non-zero if INSN is first. */
8552 loop_insn_first_p (insn, reference)
8553 rtx insn, reference;
8557 for (p = insn, q = reference; ;)
8559 /* Start with test for not first so that INSN == REFERENCE yields not
8561 if (q == insn || ! p)
8563 if (p == reference || ! q)
8566 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8567 previous insn, hence the <= comparison below does not work if
8569 if (INSN_UID (p) < max_uid_for_loop
8570 && INSN_UID (q) < max_uid_for_loop
8571 && GET_CODE (p) != NOTE)
8572 return INSN_LUID (p) <= INSN_LUID (q);
8574 if (INSN_UID (p) >= max_uid_for_loop
8575 || GET_CODE (p) == NOTE)
8577 if (INSN_UID (q) >= max_uid_for_loop)
8582 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
8583 the offset that we have to take into account due to auto-increment /
8584 div derivation is zero. */
8586 biv_elimination_giv_has_0_offset (biv, giv, insn)
8587 struct induction *biv, *giv;
8590 /* If the giv V had the auto-inc address optimization applied
8591 to it, and INSN occurs between the giv insn and the biv
8592 insn, then we'd have to adjust the value used here.
8593 This is rare, so we don't bother to make this possible. */
8594 if (giv->auto_inc_opt
8595 && ((loop_insn_first_p (giv->insn, insn)
8596 && loop_insn_first_p (insn, biv->insn))
8597 || (loop_insn_first_p (biv->insn, insn)
8598 && loop_insn_first_p (insn, giv->insn))))
8601 /* If the giv V was derived from another giv, and INSN does
8602 not occur between the giv insn and the biv insn, then we'd
8603 have to adjust the value used here. This is rare, so we don't
8604 bother to make this possible. */
8605 if (giv->derived_from
8606 && ! (giv->always_executed
8607 && loop_insn_first_p (giv->insn, insn)
8608 && loop_insn_first_p (insn, biv->insn)))
8611 && giv->same->derived_from
8612 && ! (giv->same->always_executed
8613 && loop_insn_first_p (giv->same->insn, insn)
8614 && loop_insn_first_p (insn, biv->insn)))
8620 /* If BL appears in X (part of the pattern of INSN), see if we can
8621 eliminate its use. If so, return 1. If not, return 0.
8623 If BIV does not appear in X, return 1.
8625 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
8626 where extra insns should be added. Depending on how many items have been
8627 moved out of the loop, it will either be before INSN or at the start of
8631 maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
8633 struct iv_class *bl;
8637 enum rtx_code code = GET_CODE (x);
8638 rtx reg = bl->biv->dest_reg;
8639 enum machine_mode mode = GET_MODE (reg);
8640 struct induction *v;
8652 /* If we haven't already been able to do something with this BIV,
8653 we can't eliminate it. */
8659 /* If this sets the BIV, it is not a problem. */
8660 if (SET_DEST (x) == reg)
8663 /* If this is an insn that defines a giv, it is also ok because
8664 it will go away when the giv is reduced. */
8665 for (v = bl->giv; v; v = v->next_iv)
8666 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
8670 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
8672 /* Can replace with any giv that was reduced and
8673 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8674 Require a constant for MULT_VAL, so we know it's nonzero.
8675 ??? We disable this optimization to avoid potential
8678 for (v = bl->giv; v; v = v->next_iv)
8679 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8680 && v->add_val == const0_rtx
8681 && ! v->ignore && ! v->maybe_dead && v->always_computable
8685 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8691 /* If the giv has the opposite direction of change,
8692 then reverse the comparison. */
8693 if (INTVAL (v->mult_val) < 0)
8694 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8695 const0_rtx, v->new_reg);
8699 /* We can probably test that giv's reduced reg. */
8700 if (validate_change (insn, &SET_SRC (x), new, 0))
8704 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8705 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8706 Require a constant for MULT_VAL, so we know it's nonzero.
8707 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8708 overflow problem. */
8710 for (v = bl->giv; v; v = v->next_iv)
8711 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8712 && ! v->ignore && ! v->maybe_dead && v->always_computable
8714 && (GET_CODE (v->add_val) == SYMBOL_REF
8715 || GET_CODE (v->add_val) == LABEL_REF
8716 || GET_CODE (v->add_val) == CONST
8717 || (GET_CODE (v->add_val) == REG
8718 && REGNO_POINTER_FLAG (REGNO (v->add_val)))))
8720 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8726 /* If the giv has the opposite direction of change,
8727 then reverse the comparison. */
8728 if (INTVAL (v->mult_val) < 0)
8729 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8732 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8733 copy_rtx (v->add_val));
8735 /* Replace biv with the giv's reduced register. */
8736 update_reg_last_use (v->add_val, insn);
8737 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8740 /* Insn doesn't support that constant or invariant. Copy it
8741 into a register (it will be a loop invariant.) */
8742 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8744 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
8747 /* Substitute the new register for its invariant value in
8748 the compare expression. */
8749 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8750 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8759 case GT: case GE: case GTU: case GEU:
8760 case LT: case LE: case LTU: case LEU:
8761 /* See if either argument is the biv. */
8762 if (XEXP (x, 0) == reg)
8763 arg = XEXP (x, 1), arg_operand = 1;
8764 else if (XEXP (x, 1) == reg)
8765 arg = XEXP (x, 0), arg_operand = 0;
8769 if (CONSTANT_P (arg))
8771 /* First try to replace with any giv that has constant positive
8772 mult_val and constant add_val. We might be able to support
8773 negative mult_val, but it seems complex to do it in general. */
8775 for (v = bl->giv; v; v = v->next_iv)
8776 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8777 && (GET_CODE (v->add_val) == SYMBOL_REF
8778 || GET_CODE (v->add_val) == LABEL_REF
8779 || GET_CODE (v->add_val) == CONST
8780 || (GET_CODE (v->add_val) == REG
8781 && REGNO_POINTER_FLAG (REGNO (v->add_val))))
8782 && ! v->ignore && ! v->maybe_dead && v->always_computable
8785 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8791 /* Replace biv with the giv's reduced reg. */
8792 XEXP (x, 1-arg_operand) = v->new_reg;
8794 /* If all constants are actually constant integers and
8795 the derived constant can be directly placed in the COMPARE,
8797 if (GET_CODE (arg) == CONST_INT
8798 && GET_CODE (v->mult_val) == CONST_INT
8799 && GET_CODE (v->add_val) == CONST_INT
8800 && validate_change (insn, &XEXP (x, arg_operand),
8801 GEN_INT (INTVAL (arg)
8802 * INTVAL (v->mult_val)
8803 + INTVAL (v->add_val)), 0))
8806 /* Otherwise, load it into a register. */
8807 tem = gen_reg_rtx (mode);
8808 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8809 if (validate_change (insn, &XEXP (x, arg_operand), tem, 0))
8812 /* If that failed, put back the change we made above. */
8813 XEXP (x, 1-arg_operand) = reg;
8816 /* Look for giv with positive constant mult_val and nonconst add_val.
8817 Insert insns to calculate new compare value.
8818 ??? Turn this off due to possible overflow. */
8820 for (v = bl->giv; v; v = v->next_iv)
8821 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8822 && ! v->ignore && ! v->maybe_dead && v->always_computable
8828 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8834 tem = gen_reg_rtx (mode);
8836 /* Replace biv with giv's reduced register. */
8837 validate_change (insn, &XEXP (x, 1 - arg_operand),
8840 /* Compute value to compare against. */
8841 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8842 /* Use it in this insn. */
8843 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8844 if (apply_change_group ())
8848 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8850 if (invariant_p (arg) == 1)
8852 /* Look for giv with constant positive mult_val and nonconst
8853 add_val. Insert insns to compute new compare value.
8854 ??? Turn this off due to possible overflow. */
8856 for (v = bl->giv; v; v = v->next_iv)
8857 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8858 && ! v->ignore && ! v->maybe_dead && v->always_computable
8864 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8870 tem = gen_reg_rtx (mode);
8872 /* Replace biv with giv's reduced register. */
8873 validate_change (insn, &XEXP (x, 1 - arg_operand),
8876 /* Compute value to compare against. */
8877 emit_iv_add_mult (arg, v->mult_val, v->add_val,
8879 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8880 if (apply_change_group ())
8885 /* This code has problems. Basically, you can't know when
8886 seeing if we will eliminate BL, whether a particular giv
8887 of ARG will be reduced. If it isn't going to be reduced,
8888 we can't eliminate BL. We can try forcing it to be reduced,
8889 but that can generate poor code.
8891 The problem is that the benefit of reducing TV, below should
8892 be increased if BL can actually be eliminated, but this means
8893 we might have to do a topological sort of the order in which
8894 we try to process biv. It doesn't seem worthwhile to do
8895 this sort of thing now. */
8898 /* Otherwise the reg compared with had better be a biv. */
8899 if (GET_CODE (arg) != REG
8900 || REG_IV_TYPE (REGNO (arg)) != BASIC_INDUCT)
8903 /* Look for a pair of givs, one for each biv,
8904 with identical coefficients. */
8905 for (v = bl->giv; v; v = v->next_iv)
8907 struct induction *tv;
8909 if (v->ignore || v->maybe_dead || v->mode != mode)
8912 for (tv = reg_biv_class[REGNO (arg)]->giv; tv; tv = tv->next_iv)
8913 if (! tv->ignore && ! tv->maybe_dead
8914 && rtx_equal_p (tv->mult_val, v->mult_val)
8915 && rtx_equal_p (tv->add_val, v->add_val)
8916 && tv->mode == mode)
8918 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8924 /* Replace biv with its giv's reduced reg. */
8925 XEXP (x, 1-arg_operand) = v->new_reg;
8926 /* Replace other operand with the other giv's
8928 XEXP (x, arg_operand) = tv->new_reg;
8935 /* If we get here, the biv can't be eliminated. */
8939 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8940 biv is used in it, since it will be replaced. */
8941 for (v = bl->giv; v; v = v->next_iv)
8942 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8950 /* See if any subexpression fails elimination. */
8951 fmt = GET_RTX_FORMAT (code);
8952 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8957 if (! maybe_eliminate_biv_1 (XEXP (x, i), insn, bl,
8958 eliminate_p, where))
8963 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8964 if (! maybe_eliminate_biv_1 (XVECEXP (x, i, j), insn, bl,
8965 eliminate_p, where))
8974 /* Return nonzero if the last use of REG
8975 is in an insn following INSN in the same basic block. */
8978 last_use_this_basic_block (reg, insn)
8984 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
8987 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
8993 /* Called via `note_stores' to record the initial value of a biv. Here we
8994 just record the location of the set and process it later. */
8997 record_initial (dest, set, data)
9000 void *data ATTRIBUTE_UNUSED;
9002 struct iv_class *bl;
9004 if (GET_CODE (dest) != REG
9005 || REGNO (dest) >= max_reg_before_loop
9006 || REG_IV_TYPE (REGNO (dest)) != BASIC_INDUCT)
9009 bl = reg_biv_class[REGNO (dest)];
9011 /* If this is the first set found, record it. */
9012 if (bl->init_insn == 0)
9014 bl->init_insn = note_insn;
9019 /* If any of the registers in X are "old" and currently have a last use earlier
9020 than INSN, update them to have a last use of INSN. Their actual last use
9021 will be the previous insn but it will not have a valid uid_luid so we can't
9025 update_reg_last_use (x, insn)
9029 /* Check for the case where INSN does not have a valid luid. In this case,
9030 there is no need to modify the regno_last_uid, as this can only happen
9031 when code is inserted after the loop_end to set a pseudo's final value,
9032 and hence this insn will never be the last use of x. */
9033 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
9034 && INSN_UID (insn) < max_uid_for_loop
9035 && uid_luid[REGNO_LAST_UID (REGNO (x))] < uid_luid[INSN_UID (insn)])
9036 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
9040 register const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
9041 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
9044 update_reg_last_use (XEXP (x, i), insn);
9045 else if (fmt[i] == 'E')
9046 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9047 update_reg_last_use (XVECEXP (x, i, j), insn);
9052 /* Given a jump insn JUMP, return the condition that will cause it to branch
9053 to its JUMP_LABEL. If the condition cannot be understood, or is an
9054 inequality floating-point comparison which needs to be reversed, 0 will
9057 If EARLIEST is non-zero, it is a pointer to a place where the earliest
9058 insn used in locating the condition was found. If a replacement test
9059 of the condition is desired, it should be placed in front of that
9060 insn and we will be sure that the inputs are still valid.
9062 The condition will be returned in a canonical form to simplify testing by
9063 callers. Specifically:
9065 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
9066 (2) Both operands will be machine operands; (cc0) will have been replaced.
9067 (3) If an operand is a constant, it will be the second operand.
9068 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
9069 for GE, GEU, and LEU. */
9072 get_condition (jump, earliest)
9081 int reverse_code = 0;
9082 int did_reverse_condition = 0;
9083 enum machine_mode mode;
9085 /* If this is not a standard conditional jump, we can't parse it. */
9086 if (GET_CODE (jump) != JUMP_INSN
9087 || ! condjump_p (jump) || simplejump_p (jump))
9090 code = GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 0));
9091 mode = GET_MODE (XEXP (SET_SRC (PATTERN (jump)), 0));
9092 op0 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 0);
9093 op1 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 1);
9098 /* If this branches to JUMP_LABEL when the condition is false, reverse
9100 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 2)) == LABEL_REF
9101 && XEXP (XEXP (SET_SRC (PATTERN (jump)), 2), 0) == JUMP_LABEL (jump))
9102 code = reverse_condition (code), did_reverse_condition ^= 1;
9104 /* If we are comparing a register with zero, see if the register is set
9105 in the previous insn to a COMPARE or a comparison operation. Perform
9106 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
9109 while (GET_RTX_CLASS (code) == '<' && op1 == CONST0_RTX (GET_MODE (op0)))
9111 /* Set non-zero when we find something of interest. */
9115 /* If comparison with cc0, import actual comparison from compare
9119 if ((prev = prev_nonnote_insn (prev)) == 0
9120 || GET_CODE (prev) != INSN
9121 || (set = single_set (prev)) == 0
9122 || SET_DEST (set) != cc0_rtx)
9125 op0 = SET_SRC (set);
9126 op1 = CONST0_RTX (GET_MODE (op0));
9132 /* If this is a COMPARE, pick up the two things being compared. */
9133 if (GET_CODE (op0) == COMPARE)
9135 op1 = XEXP (op0, 1);
9136 op0 = XEXP (op0, 0);
9139 else if (GET_CODE (op0) != REG)
9142 /* Go back to the previous insn. Stop if it is not an INSN. We also
9143 stop if it isn't a single set or if it has a REG_INC note because
9144 we don't want to bother dealing with it. */
9146 if ((prev = prev_nonnote_insn (prev)) == 0
9147 || GET_CODE (prev) != INSN
9148 || FIND_REG_INC_NOTE (prev, 0)
9149 || (set = single_set (prev)) == 0)
9152 /* If this is setting OP0, get what it sets it to if it looks
9154 if (rtx_equal_p (SET_DEST (set), op0))
9156 enum machine_mode inner_mode = GET_MODE (SET_SRC (set));
9158 /* ??? We may not combine comparisons done in a CCmode with
9159 comparisons not done in a CCmode. This is to aid targets
9160 like Alpha that have an IEEE compliant EQ instruction, and
9161 a non-IEEE compliant BEQ instruction. The use of CCmode is
9162 actually artificial, simply to prevent the combination, but
9163 should not affect other platforms.
9165 However, we must allow VOIDmode comparisons to match either
9166 CCmode or non-CCmode comparison, because some ports have
9167 modeless comparisons inside branch patterns.
9169 ??? This mode check should perhaps look more like the mode check
9170 in simplify_comparison in combine. */
9172 if ((GET_CODE (SET_SRC (set)) == COMPARE
9175 && GET_MODE_CLASS (inner_mode) == MODE_INT
9176 && (GET_MODE_BITSIZE (inner_mode)
9177 <= HOST_BITS_PER_WIDE_INT)
9178 && (STORE_FLAG_VALUE
9179 & ((HOST_WIDE_INT) 1
9180 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9181 #ifdef FLOAT_STORE_FLAG_VALUE
9183 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9184 && FLOAT_STORE_FLAG_VALUE < 0)
9187 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
9188 && (((GET_MODE_CLASS (mode) == MODE_CC)
9189 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9190 || mode == VOIDmode || inner_mode == VOIDmode))
9192 else if (((code == EQ
9194 && (GET_MODE_BITSIZE (inner_mode)
9195 <= HOST_BITS_PER_WIDE_INT)
9196 && GET_MODE_CLASS (inner_mode) == MODE_INT
9197 && (STORE_FLAG_VALUE
9198 & ((HOST_WIDE_INT) 1
9199 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9200 #ifdef FLOAT_STORE_FLAG_VALUE
9202 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9203 && FLOAT_STORE_FLAG_VALUE < 0)
9206 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
9207 && (((GET_MODE_CLASS (mode) == MODE_CC)
9208 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9209 || mode == VOIDmode || inner_mode == VOIDmode))
9212 /* We might have reversed a LT to get a GE here. But this wasn't
9213 actually the comparison of data, so we don't flag that we
9214 have had to reverse the condition. */
9215 did_reverse_condition ^= 1;
9223 else if (reg_set_p (op0, prev))
9224 /* If this sets OP0, but not directly, we have to give up. */
9229 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
9230 code = GET_CODE (x);
9233 code = reverse_condition (code);
9234 did_reverse_condition ^= 1;
9238 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
9244 /* If constant is first, put it last. */
9245 if (CONSTANT_P (op0))
9246 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
9248 /* If OP0 is the result of a comparison, we weren't able to find what
9249 was really being compared, so fail. */
9250 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
9253 /* Canonicalize any ordered comparison with integers involving equality
9254 if we can do computations in the relevant mode and we do not
9257 if (GET_CODE (op1) == CONST_INT
9258 && GET_MODE (op0) != VOIDmode
9259 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
9261 HOST_WIDE_INT const_val = INTVAL (op1);
9262 unsigned HOST_WIDE_INT uconst_val = const_val;
9263 unsigned HOST_WIDE_INT max_val
9264 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
9269 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
9270 code = LT, op1 = GEN_INT (const_val + 1);
9273 /* When cross-compiling, const_val might be sign-extended from
9274 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9276 if ((HOST_WIDE_INT) (const_val & max_val)
9277 != (((HOST_WIDE_INT) 1
9278 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
9279 code = GT, op1 = GEN_INT (const_val - 1);
9283 if (uconst_val < max_val)
9284 code = LTU, op1 = GEN_INT (uconst_val + 1);
9288 if (uconst_val != 0)
9289 code = GTU, op1 = GEN_INT (uconst_val - 1);
9297 /* If this was floating-point and we reversed anything other than an
9298 EQ or NE, return zero. */
9299 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
9300 && did_reverse_condition && code != NE && code != EQ
9302 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
9306 /* Never return CC0; return zero instead. */
9311 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
9314 /* Similar to above routine, except that we also put an invariant last
9315 unless both operands are invariants. */
9318 get_condition_for_loop (x)
9321 rtx comparison = get_condition (x, NULL_PTR);
9324 || ! invariant_p (XEXP (comparison, 0))
9325 || invariant_p (XEXP (comparison, 1)))
9328 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
9329 XEXP (comparison, 1), XEXP (comparison, 0));
9332 #ifdef HAVE_decrement_and_branch_on_count
9333 /* Instrument loop for insertion of bct instruction. We distinguish between
9334 loops with compile-time bounds and those with run-time bounds.
9335 Information from loop_iterations() is used to compute compile-time bounds.
9336 Run-time bounds should use loop preconditioning, but currently ignored.
9340 insert_bct (loop_start, loop_end, loop_info)
9341 rtx loop_start, loop_end;
9342 struct loop_info *loop_info;
9345 unsigned HOST_WIDE_INT n_iterations;
9348 int increment_direction, compare_direction;
9350 /* If the loop condition is <= or >=, the number of iteration
9351 is 1 more than the range of the bounds of the loop. */
9352 int add_iteration = 0;
9354 enum machine_mode loop_var_mode = word_mode;
9357 int loop_num = uid_loop_num [INSN_UID (loop_start)];
9359 /* It's impossible to instrument a competely unrolled loop. */
9360 if (loop_info->unroll_number == loop_info->n_iterations)
9363 /* Make sure that the count register is not in use. */
9364 if (loop_used_count_register [loop_num])
9366 if (loop_dump_stream)
9367 fprintf (loop_dump_stream,
9368 "insert_bct %d: BCT instrumentation failed: count register already in use\n",
9373 /* Make sure that the function has no indirect jumps. */
9374 if (indirect_jump_in_function)
9376 if (loop_dump_stream)
9377 fprintf (loop_dump_stream,
9378 "insert_bct %d: BCT instrumentation failed: indirect jump in function\n",
9383 /* Make sure that the last loop insn is a conditional jump. */
9384 if (GET_CODE (PREV_INSN (loop_end)) != JUMP_INSN
9385 || ! condjump_p (PREV_INSN (loop_end))
9386 || simplejump_p (PREV_INSN (loop_end)))
9388 if (loop_dump_stream)
9389 fprintf (loop_dump_stream,
9390 "insert_bct %d: BCT instrumentation failed: invalid jump at loop end\n",
9395 /* Make sure that the loop does not contain a function call
9396 (the count register might be altered by the called function). */
9397 if (loop_info->has_call)
9399 if (loop_dump_stream)
9400 fprintf (loop_dump_stream,
9401 "insert_bct %d: BCT instrumentation failed: function call in loop\n",
9406 /* Make sure that the loop does not jump via a table.
9407 (the count register might be used to perform the branch on table). */
9408 if (loop_info->has_tablejump)
9410 if (loop_dump_stream)
9411 fprintf (loop_dump_stream,
9412 "insert_bct %d: BCT instrumentation failed: computed branch in the loop\n",
9417 /* Account for loop unrolling in instrumented iteration count. */
9418 if (loop_info->unroll_number > 1)
9419 n_iterations = loop_info->n_iterations / loop_info->unroll_number;
9421 n_iterations = loop_info->n_iterations;
9423 if (n_iterations != 0 && n_iterations < 3)
9425 /* Allow an enclosing outer loop to benefit if possible. */
9426 if (loop_dump_stream)
9427 fprintf (loop_dump_stream,
9428 "insert_bct %d: Too few iterations to benefit from BCT optimization\n",
9433 /* Try to instrument the loop. */
9435 /* Handle the simpler case, where the bounds are known at compile time. */
9436 if (n_iterations > 0)
9438 /* Mark all enclosing loops that they cannot use count register. */
9439 for (i = loop_num; i != -1; i = loop_outer_loop[i])
9440 loop_used_count_register[i] = 1;
9441 instrument_loop_bct (loop_start, loop_end, GEN_INT (n_iterations));
9445 /* Handle the more complex case, that the bounds are NOT known
9446 at compile time. In this case we generate run_time calculation
9447 of the number of iterations. */
9449 if (loop_info->iteration_var == 0)
9451 if (loop_dump_stream)
9452 fprintf (loop_dump_stream,
9453 "insert_bct %d: BCT Runtime Instrumentation failed: no loop iteration variable found\n",
9458 if (GET_MODE_CLASS (GET_MODE (loop_info->iteration_var)) != MODE_INT
9459 || GET_MODE_SIZE (GET_MODE (loop_info->iteration_var)) != UNITS_PER_WORD)
9461 if (loop_dump_stream)
9462 fprintf (loop_dump_stream,
9463 "insert_bct %d: BCT Runtime Instrumentation failed: loop variable not integer\n",
9468 /* With runtime bounds, if the compare is of the form '!=' we give up */
9469 if (loop_info->comparison_code == NE)
9471 if (loop_dump_stream)
9472 fprintf (loop_dump_stream,
9473 "insert_bct %d: BCT Runtime Instrumentation failed: runtime bounds with != comparison\n",
9477 /* Use common loop preconditioning code instead. */
9481 /* We rely on the existence of run-time guard to ensure that the
9482 loop executes at least once. */
9484 rtx iterations_num_reg;
9486 unsigned HOST_WIDE_INT increment_value_abs
9487 = INTVAL (increment) * increment_direction;
9489 /* make sure that the increment is a power of two, otherwise (an
9490 expensive) divide is needed. */
9491 if (exact_log2 (increment_value_abs) == -1)
9493 if (loop_dump_stream)
9494 fprintf (loop_dump_stream,
9495 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
9499 /* compute the number of iterations */
9504 /* Again, the number of iterations is calculated by:
9506 ; compare-val - initial-val + (increment -1) + additional-iteration
9507 ; num_iterations = -----------------------------------------------------------------
9510 /* ??? Do we have to call copy_rtx here before passing rtx to
9512 if (compare_direction > 0)
9514 /* <, <= :the loop variable is increasing */
9515 temp_reg = expand_binop (loop_var_mode, sub_optab,
9516 comparison_value, initial_value,
9517 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9521 temp_reg = expand_binop (loop_var_mode, sub_optab,
9522 initial_value, comparison_value,
9523 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9526 if (increment_value_abs - 1 + add_iteration != 0)
9527 temp_reg = expand_binop (loop_var_mode, add_optab, temp_reg,
9528 GEN_INT (increment_value_abs - 1
9530 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9532 if (increment_value_abs != 1)
9533 iterations_num_reg = expand_binop (loop_var_mode, asr_optab,
9535 GEN_INT (exact_log2 (increment_value_abs)),
9536 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9538 iterations_num_reg = temp_reg;
9540 sequence = gen_sequence ();
9542 emit_insn_before (sequence, loop_start);
9543 instrument_loop_bct (loop_start, loop_end, iterations_num_reg);
9547 #endif /* Complex case */
9550 /* Instrument loop by inserting a bct in it as follows:
9551 1. A new counter register is created.
9552 2. In the head of the loop the new variable is initialized to the value
9553 passed in the loop_num_iterations parameter.
9554 3. At the end of the loop, comparison of the register with 0 is generated.
9555 The created comparison follows the pattern defined for the
9556 decrement_and_branch_on_count insn, so this insn will be generated.
9557 4. The branch on the old variable are deleted. The compare must remain
9558 because it might be used elsewhere. If the loop-variable or condition
9559 register are used elsewhere, they will be eliminated by flow. */
9562 instrument_loop_bct (loop_start, loop_end, loop_num_iterations)
9563 rtx loop_start, loop_end;
9564 rtx loop_num_iterations;
9570 if (HAVE_decrement_and_branch_on_count)
9572 if (loop_dump_stream)
9574 fputs ("instrument_bct: Inserting BCT (", loop_dump_stream);
9575 if (GET_CODE (loop_num_iterations) == CONST_INT)
9576 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC,
9577 INTVAL (loop_num_iterations));
9579 fputs ("runtime", loop_dump_stream);
9580 fputs (" iterations)", loop_dump_stream);
9583 /* Discard original jump to continue loop. Original compare result
9584 may still be live, so it cannot be discarded explicitly. */
9585 delete_insn (PREV_INSN (loop_end));
9587 /* Insert the label which will delimit the start of the loop. */
9588 start_label = gen_label_rtx ();
9589 emit_label_after (start_label, loop_start);
9591 /* Insert initialization of the count register into the loop header. */
9593 counter_reg = gen_reg_rtx (word_mode);
9594 emit_insn (gen_move_insn (counter_reg, loop_num_iterations));
9595 sequence = gen_sequence ();
9597 emit_insn_before (sequence, loop_start);
9599 /* Insert new comparison on the count register instead of the
9600 old one, generating the needed BCT pattern (that will be
9601 later recognized by assembly generation phase). */
9602 emit_jump_insn_before (gen_decrement_and_branch_on_count (counter_reg,
9605 LABEL_NUSES (start_label)++;
9609 #endif /* HAVE_decrement_and_branch_on_count */
9611 /* Scan the function and determine whether it has indirect (computed) jumps.
9613 This is taken mostly from flow.c; similar code exists elsewhere
9614 in the compiler. It may be useful to put this into rtlanal.c. */
9616 indirect_jump_in_function_p (start)
9621 for (insn = start; insn; insn = NEXT_INSN (insn))
9622 if (computed_jump_p (insn))
9628 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9629 documentation for LOOP_MEMS for the definition of `appropriate'.
9630 This function is called from prescan_loop via for_each_rtx. */
9633 insert_loop_mem (mem, data)
9635 void *data ATTRIBUTE_UNUSED;
9643 switch (GET_CODE (m))
9649 /* We're not interested in MEMs that are only clobbered. */
9653 /* We're not interested in the MEM associated with a
9654 CONST_DOUBLE, so there's no need to traverse into this. */
9658 /* We're not interested in any MEMs that only appear in notes. */
9662 /* This is not a MEM. */
9666 /* See if we've already seen this MEM. */
9667 for (i = 0; i < loop_mems_idx; ++i)
9668 if (rtx_equal_p (m, loop_mems[i].mem))
9670 if (GET_MODE (m) != GET_MODE (loop_mems[i].mem))
9671 /* The modes of the two memory accesses are different. If
9672 this happens, something tricky is going on, and we just
9673 don't optimize accesses to this MEM. */
9674 loop_mems[i].optimize = 0;
9679 /* Resize the array, if necessary. */
9680 if (loop_mems_idx == loop_mems_allocated)
9682 if (loop_mems_allocated != 0)
9683 loop_mems_allocated *= 2;
9685 loop_mems_allocated = 32;
9687 loop_mems = (loop_mem_info*)
9688 xrealloc (loop_mems,
9689 loop_mems_allocated * sizeof (loop_mem_info));
9692 /* Actually insert the MEM. */
9693 loop_mems[loop_mems_idx].mem = m;
9694 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9695 because we can't put it in a register. We still store it in the
9696 table, though, so that if we see the same address later, but in a
9697 non-BLK mode, we'll not think we can optimize it at that point. */
9698 loop_mems[loop_mems_idx].optimize = (GET_MODE (m) != BLKmode);
9699 loop_mems[loop_mems_idx].reg = NULL_RTX;
9705 /* Like load_mems, but also ensures that SET_IN_LOOP,
9706 MAY_NOT_OPTIMIZE, REG_SINGLE_USAGE, and INSN_COUNT have the correct
9707 values after load_mems. */
9710 load_mems_and_recount_loop_regs_set (scan_start, end, loop_top, start,
9718 int nregs = max_reg_num ();
9720 load_mems (scan_start, end, loop_top, start);
9722 /* Recalculate set_in_loop and friends since load_mems may have
9723 created new registers. */
9724 if (max_reg_num () > nregs)
9730 nregs = max_reg_num ();
9732 if ((unsigned) nregs > set_in_loop->num_elements)
9734 /* Grow all the arrays. */
9735 VARRAY_GROW (set_in_loop, nregs);
9736 VARRAY_GROW (n_times_set, nregs);
9737 VARRAY_GROW (may_not_optimize, nregs);
9738 VARRAY_GROW (reg_single_usage, nregs);
9740 /* Clear the arrays */
9741 bzero ((char *) &set_in_loop->data, nregs * sizeof (int));
9742 bzero ((char *) &may_not_optimize->data, nregs * sizeof (char));
9743 bzero ((char *) ®_single_usage->data, nregs * sizeof (rtx));
9745 count_loop_regs_set (loop_top ? loop_top : start, end,
9746 may_not_optimize, reg_single_usage,
9749 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
9751 VARRAY_CHAR (may_not_optimize, i) = 1;
9752 VARRAY_INT (set_in_loop, i) = 1;
9755 #ifdef AVOID_CCMODE_COPIES
9756 /* Don't try to move insns which set CC registers if we should not
9757 create CCmode register copies. */
9758 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
9759 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
9760 VARRAY_CHAR (may_not_optimize, i) = 1;
9763 /* Set n_times_set for the new registers. */
9764 bcopy ((char *) (&set_in_loop->data.i[0] + old_nregs),
9765 (char *) (&n_times_set->data.i[0] + old_nregs),
9766 (nregs - old_nregs) * sizeof (int));
9770 /* Move MEMs into registers for the duration of the loop. SCAN_START
9771 is the first instruction in the loop (as it is executed). The
9772 other parameters are as for next_insn_in_loop. */
9775 load_mems (scan_start, end, loop_top, start)
9781 int maybe_never = 0;
9784 rtx label = NULL_RTX;
9785 rtx end_label = NULL_RTX;
9786 /* Nonzero if the next instruction may never be executed. */
9787 int next_maybe_never = 0;
9788 int last_max_reg = max_reg_num ();
9790 if (loop_mems_idx == 0)
9793 /* Check to see if it's possible that some instructions in the
9794 loop are never executed. */
9795 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
9796 p != NULL_RTX && !maybe_never;
9797 p = next_insn_in_loop (p, scan_start, end, loop_top))
9799 if (GET_CODE (p) == CODE_LABEL)
9801 else if (GET_CODE (p) == JUMP_INSN
9802 /* If we enter the loop in the middle, and scan
9803 around to the beginning, don't set maybe_never
9804 for that. This must be an unconditional jump,
9805 otherwise the code at the top of the loop might
9806 never be executed. Unconditional jumps are
9807 followed a by barrier then loop end. */
9808 && ! (GET_CODE (p) == JUMP_INSN
9809 && JUMP_LABEL (p) == loop_top
9810 && NEXT_INSN (NEXT_INSN (p)) == end
9811 && simplejump_p (p)))
9813 if (!condjump_p (p))
9814 /* Something complicated. */
9817 /* If there are any more instructions in the loop, they
9818 might not be reached. */
9819 next_maybe_never = 1;
9821 else if (next_maybe_never)
9825 /* Actually move the MEMs. */
9826 for (i = 0; i < loop_mems_idx; ++i)
9831 rtx mem = loop_mems[i].mem;
9834 if (MEM_VOLATILE_P (mem)
9835 || invariant_p (XEXP (mem, 0)) != 1)
9836 /* There's no telling whether or not MEM is modified. */
9837 loop_mems[i].optimize = 0;
9839 /* Go through the MEMs written to in the loop to see if this
9840 one is aliased by one of them. */
9841 mem_list_entry = loop_store_mems;
9842 while (mem_list_entry)
9844 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
9846 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
9849 /* MEM is indeed aliased by this store. */
9850 loop_mems[i].optimize = 0;
9853 mem_list_entry = XEXP (mem_list_entry, 1);
9856 if (flag_float_store && written
9857 && GET_MODE_CLASS (GET_MODE (mem)) == MODE_FLOAT)
9858 loop_mems[i].optimize = 0;
9860 /* If this MEM is written to, we must be sure that there
9861 are no reads from another MEM that aliases this one. */
9862 if (loop_mems[i].optimize && written)
9866 for (j = 0; j < loop_mems_idx; ++j)
9870 else if (true_dependence (mem,
9875 /* It's not safe to hoist loop_mems[i] out of
9876 the loop because writes to it might not be
9877 seen by reads from loop_mems[j]. */
9878 loop_mems[i].optimize = 0;
9884 if (maybe_never && may_trap_p (mem))
9885 /* We can't access the MEM outside the loop; it might
9886 cause a trap that wouldn't have happened otherwise. */
9887 loop_mems[i].optimize = 0;
9889 if (!loop_mems[i].optimize)
9890 /* We thought we were going to lift this MEM out of the
9891 loop, but later discovered that we could not. */
9894 INIT_REG_SET (&copies);
9896 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9897 order to keep scan_loop from moving stores to this MEM
9898 out of the loop just because this REG is neither a
9899 user-variable nor used in the loop test. */
9900 reg = gen_reg_rtx (GET_MODE (mem));
9901 REG_USERVAR_P (reg) = 1;
9902 loop_mems[i].reg = reg;
9904 /* Now, replace all references to the MEM with the
9905 corresponding pesudos. */
9907 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
9909 p = next_insn_in_loop (p, scan_start, end, loop_top))
9914 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
9916 /* See if this copies the mem into a register that isn't
9917 modified afterwards. We'll try to do copy propagation
9918 a little further on. */
9919 set = single_set (p);
9921 /* @@@ This test is _way_ too conservative. */
9923 && GET_CODE (SET_DEST (set)) == REG
9924 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
9925 && REGNO (SET_DEST (set)) < last_max_reg
9926 && VARRAY_INT (n_times_set, REGNO (SET_DEST (set))) == 1
9927 && rtx_equal_p (SET_SRC (set), loop_mems[i].mem))
9928 SET_REGNO_REG_SET (&copies, REGNO (SET_DEST (set)));
9931 for_each_rtx (&p, replace_loop_mem, &ri);
9934 if (GET_CODE (p) == CODE_LABEL
9935 || GET_CODE (p) == JUMP_INSN)
9939 if (! apply_change_group ())
9940 /* We couldn't replace all occurrences of the MEM. */
9941 loop_mems[i].optimize = 0;
9947 /* Load the memory immediately before START, which is
9948 the NOTE_LOOP_BEG. */
9949 set = gen_move_insn (reg, mem);
9950 emit_insn_before (set, start);
9954 if (label == NULL_RTX)
9956 /* We must compute the former
9957 right-after-the-end label before we insert
9959 end_label = next_label (end);
9960 label = gen_label_rtx ();
9961 emit_label_after (label, end);
9964 /* Store the memory immediately after END, which is
9965 the NOTE_LOOP_END. */
9966 set = gen_move_insn (copy_rtx (mem), reg);
9967 emit_insn_after (set, label);
9970 if (loop_dump_stream)
9972 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9973 REGNO (reg), (written ? "r/w" : "r/o"));
9974 print_rtl (loop_dump_stream, mem);
9975 fputc ('\n', loop_dump_stream);
9978 /* Attempt a bit of copy propagation. This helps untangle the
9979 data flow, and enables {basic,general}_induction_var to find
9981 EXECUTE_IF_SET_IN_REG_SET
9982 (&copies, FIRST_PSEUDO_REGISTER, j,
9984 try_copy_prop (scan_start, loop_top, end, loop_mems[i].reg, j);
9986 CLEAR_REG_SET (&copies);
9990 if (label != NULL_RTX)
9992 /* Now, we need to replace all references to the previous exit
9993 label with the new one. */
9998 for (p = start; p != end; p = NEXT_INSN (p))
10000 for_each_rtx (&p, replace_label, &rr);
10002 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
10003 field. This is not handled by for_each_rtx because it doesn't
10004 handle unprinted ('0') fields. We need to update JUMP_LABEL
10005 because the immediately following unroll pass will use it.
10006 replace_label would not work anyways, because that only handles
10008 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
10009 JUMP_LABEL (p) = label;
10014 /* For communication between note_reg_stored and its caller. */
10015 struct note_reg_stored_arg
10021 /* Called via note_stores, record in SET_SEEN whether X, which is written,
10022 is equal to ARG. */
10024 note_reg_stored (x, setter, arg)
10025 rtx x, setter ATTRIBUTE_UNUSED;
10028 struct note_reg_stored_arg *t = (struct note_reg_stored_arg *)arg;
10033 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
10034 There must be exactly one insn that sets this pseudo; it will be
10035 deleted if all replacements succeed and we can prove that the register
10036 is not used after the loop.
10037 The arguments SCAN_START, LOOP_TOP and END are as in load_mems. */
10039 try_copy_prop (scan_start, loop_top, end, replacement, regno)
10040 rtx scan_start, loop_top, end, replacement;
10043 /* This is the reg that we are copying from. */
10044 rtx reg_rtx = regno_reg_rtx[regno];
10047 /* These help keep track of whether we replaced all uses of the reg. */
10048 int replaced_last = 0;
10049 int store_is_first = 0;
10051 for (insn = next_insn_in_loop (scan_start, scan_start, end, loop_top);
10053 insn = next_insn_in_loop (insn, scan_start, end, loop_top))
10057 /* Only substitute within one extended basic block from the initializing
10059 if (GET_CODE (insn) == CODE_LABEL && init_insn)
10062 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
10065 /* Is this the initializing insn? */
10066 set = single_set (insn);
10068 && GET_CODE (SET_DEST (set)) == REG
10069 && REGNO (SET_DEST (set)) == regno)
10075 if (REGNO_FIRST_UID (regno) == INSN_UID (insn))
10076 store_is_first = 1;
10079 /* Only substitute after seeing the initializing insn. */
10080 if (init_insn && insn != init_insn)
10082 struct note_reg_stored_arg arg;
10084 array[0] = reg_rtx;
10085 array[1] = replacement;
10088 for_each_rtx (&insn, replace_loop_reg, array);
10089 if (REGNO_LAST_UID (regno) == INSN_UID (insn))
10092 /* Stop replacing when REPLACEMENT is modified. */
10093 arg.reg = replacement;
10095 note_stores (PATTERN (insn), note_reg_stored, &arg);
10102 if (apply_change_group ())
10104 if (loop_dump_stream)
10105 fprintf (loop_dump_stream, " Replaced reg %d", regno);
10106 if (store_is_first && replaced_last)
10108 PUT_CODE (init_insn, NOTE);
10109 NOTE_LINE_NUMBER (init_insn) = NOTE_INSN_DELETED;
10110 if (loop_dump_stream)
10111 fprintf (loop_dump_stream, ", deleting init_insn (%d)",
10112 INSN_UID (init_insn));
10114 if (loop_dump_stream)
10115 fprintf (loop_dump_stream, ".\n");
10119 /* Replace MEM with its associated pseudo register. This function is
10120 called from load_mems via for_each_rtx. DATA is actually an
10121 rtx_and_int * describing the instruction currently being scanned
10122 and the MEM we are currently replacing. */
10125 replace_loop_mem (mem, data)
10137 switch (GET_CODE (m))
10143 /* We're not interested in the MEM associated with a
10144 CONST_DOUBLE, so there's no need to traverse into one. */
10148 /* This is not a MEM. */
10152 ri = (rtx_and_int*) data;
10155 if (!rtx_equal_p (loop_mems[i].mem, m))
10156 /* This is not the MEM we are currently replacing. */
10161 /* Actually replace the MEM. */
10162 validate_change (insn, mem, loop_mems[i].reg, 1);
10167 /* Replace one register with another. Called through for_each_rtx; PX points
10168 to the rtx being scanned. DATA is actually an array of three rtx's; the
10169 first one is the one to be replaced, and the second one the replacement.
10170 The third one is the current insn. */
10173 replace_loop_reg (px, data)
10178 rtx *array = (rtx *)data;
10184 validate_change (array[2], px, array[1], 1);
10189 /* Replace occurrences of the old exit label for the loop with the new
10190 one. DATA is an rtx_pair containing the old and new labels,
10194 replace_label (x, data)
10199 rtx old_label = ((rtx_pair*) data)->r1;
10200 rtx new_label = ((rtx_pair*) data)->r2;
10205 if (GET_CODE (l) != LABEL_REF)
10208 if (XEXP (l, 0) != old_label)
10211 XEXP (l, 0) = new_label;
10212 ++LABEL_NUSES (new_label);
10213 --LABEL_NUSES (old_label);
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