1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
44 #include "basic-block.h"
45 #include "insn-config.h"
46 #include "insn-flags.h"
48 #include "hard-reg-set.h"
56 /* Information about the loop being processed used to compute
57 the number of loop iterations for loop unrolling and doloop
59 static struct loop_info this_loop_info;
61 /* Vector mapping INSN_UIDs to luids.
62 The luids are like uids but increase monotonically always.
63 We use them to see whether a jump comes from outside a given loop. */
67 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
68 number the insn is contained in. */
72 /* 1 + largest uid of any insn. */
76 /* 1 + luid of last insn. */
80 /* Number of loops detected in current function. Used as index to the
83 static int max_loop_num;
85 /* Indexed by loop number, contains the first and last insn of each loop. */
87 static rtx *loop_number_loop_starts, *loop_number_loop_ends;
89 /* Likewise for the continue insn */
90 static rtx *loop_number_loop_cont;
92 /* The first code_label that is reached in every loop iteration.
93 0 when not computed yet, initially const0_rtx if a jump couldn't be
95 Also set to 0 when there is no such label before the NOTE_INSN_LOOP_CONT
96 of this loop, or in verify_dominator, if a jump couldn't be followed. */
97 static rtx *loop_number_cont_dominator;
99 /* For each loop, gives the containing loop number, -1 if none. */
101 int *loop_outer_loop;
103 #ifdef HAVE_decrement_and_branch_on_count
104 /* Records whether resource in use by inner loop. */
106 int *loop_used_count_register;
107 #endif /* HAVE_decrement_and_branch_on_count */
109 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
110 really a loop (an insn outside the loop branches into it). */
112 static char *loop_invalid;
114 /* Indexed by loop number, links together all LABEL_REFs which refer to
115 code labels outside the loop. Used by routines that need to know all
116 loop exits, such as final_biv_value and final_giv_value.
118 This does not include loop exits due to return instructions. This is
119 because all bivs and givs are pseudos, and hence must be dead after a
120 return, so the presense of a return does not affect any of the
121 optimizations that use this info. It is simpler to just not include return
122 instructions on this list. */
124 rtx *loop_number_exit_labels;
126 /* Indexed by loop number, counts the number of LABEL_REFs on
127 loop_number_exit_labels for this loop and all loops nested inside it. */
129 int *loop_number_exit_count;
131 /* Indexed by register number, contains the number of times the reg
132 is set during the loop being scanned.
133 During code motion, a negative value indicates a reg that has been
134 made a candidate; in particular -2 means that it is an candidate that
135 we know is equal to a constant and -1 means that it is an candidate
136 not known equal to a constant.
137 After code motion, regs moved have 0 (which is accurate now)
138 while the failed candidates have the original number of times set.
140 Therefore, at all times, == 0 indicates an invariant register;
141 < 0 a conditionally invariant one. */
143 static varray_type set_in_loop;
145 /* Original value of set_in_loop; same except that this value
146 is not set negative for a reg whose sets have been made candidates
147 and not set to 0 for a reg that is moved. */
149 static varray_type n_times_set;
151 /* Index by register number, 1 indicates that the register
152 cannot be moved or strength reduced. */
154 static varray_type may_not_optimize;
156 /* Contains the insn in which a register was used if it was used
157 exactly once; contains const0_rtx if it was used more than once. */
159 static varray_type reg_single_usage;
161 /* Nonzero means reg N has already been moved out of one loop.
162 This reduces the desire to move it out of another. */
164 static char *moved_once;
166 /* List of MEMs that are stored in this loop. */
168 static rtx loop_store_mems;
170 /* The insn where the first of these was found. */
171 static rtx first_loop_store_insn;
173 typedef struct loop_mem_info {
174 rtx mem; /* The MEM itself. */
175 rtx reg; /* Corresponding pseudo, if any. */
176 int optimize; /* Nonzero if we can optimize access to this MEM. */
179 /* Array of MEMs that are used (read or written) in this loop, but
180 cannot be aliased by anything in this loop, except perhaps
181 themselves. In other words, if loop_mems[i] is altered during the
182 loop, it is altered by an expression that is rtx_equal_p to it. */
184 static loop_mem_info *loop_mems;
186 /* The index of the next available slot in LOOP_MEMS. */
188 static int loop_mems_idx;
190 /* The number of elements allocated in LOOP_MEMs. */
192 static int loop_mems_allocated;
194 /* Nonzero if we don't know what MEMs were changed in the current
195 loop. This happens if the loop contains a call (in which case
196 `loop_info->has_call' will also be set) or if we store into more
197 than NUM_STORES MEMs. */
199 static int unknown_address_altered;
201 /* The above doesn't count any readonly memory locations that are stored.
204 static int unknown_constant_address_altered;
206 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
207 static int num_movables;
209 /* Count of memory write instructions discovered in the loop. */
210 static int num_mem_sets;
212 /* Bound on pseudo register number before loop optimization.
213 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
214 int max_reg_before_loop;
216 /* This obstack is used in product_cheap_p to allocate its rtl. It
217 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
218 If we used the same obstack that it did, we would be deallocating
221 static struct obstack temp_obstack;
223 /* This is where the pointer to the obstack being used for RTL is stored. */
225 extern struct obstack *rtl_obstack;
227 #define obstack_chunk_alloc xmalloc
228 #define obstack_chunk_free free
230 /* During the analysis of a loop, a chain of `struct movable's
231 is made to record all the movable insns found.
232 Then the entire chain can be scanned to decide which to move. */
236 rtx insn; /* A movable insn */
237 rtx set_src; /* The expression this reg is set from. */
238 rtx set_dest; /* The destination of this SET. */
239 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
240 of any registers used within the LIBCALL. */
241 int consec; /* Number of consecutive following insns
242 that must be moved with this one. */
243 int regno; /* The register it sets */
244 short lifetime; /* lifetime of that register;
245 may be adjusted when matching movables
246 that load the same value are found. */
247 short savings; /* Number of insns we can move for this reg,
248 including other movables that force this
249 or match this one. */
250 unsigned int cond : 1; /* 1 if only conditionally movable */
251 unsigned int force : 1; /* 1 means MUST move this insn */
252 unsigned int global : 1; /* 1 means reg is live outside this loop */
253 /* If PARTIAL is 1, GLOBAL means something different:
254 that the reg is live outside the range from where it is set
255 to the following label. */
256 unsigned int done : 1; /* 1 inhibits further processing of this */
258 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
259 In particular, moving it does not make it
261 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
262 load SRC, rather than copying INSN. */
263 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
264 first insn of a consecutive sets group. */
265 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
266 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
267 that we should avoid changing when clearing
268 the rest of the reg. */
269 struct movable *match; /* First entry for same value */
270 struct movable *forces; /* An insn that must be moved if this is */
271 struct movable *next;
274 static struct movable *the_movables;
276 FILE *loop_dump_stream;
278 /* Forward declarations. */
280 static void verify_dominator PROTO((int));
281 static void find_and_verify_loops PROTO((rtx));
282 static void mark_loop_jump PROTO((rtx, int));
283 static void prescan_loop PROTO((rtx, rtx, struct loop_info *));
284 static int reg_in_basic_block_p PROTO((rtx, rtx));
285 static int consec_sets_invariant_p PROTO((rtx, int, rtx));
286 static int labels_in_range_p PROTO((rtx, int));
287 static void count_one_set PROTO((rtx, rtx, varray_type, rtx *));
289 static void count_loop_regs_set PROTO((rtx, rtx, varray_type, varray_type,
291 static void note_addr_stored PROTO((rtx, rtx, void *));
292 static void note_set_pseudo_multiple_uses PROTO((rtx, rtx, void *));
293 static int loop_reg_used_before_p PROTO((rtx, rtx, rtx, rtx, rtx));
294 static void scan_loop PROTO((rtx, rtx, rtx, int, int));
296 static void replace_call_address PROTO((rtx, rtx, rtx));
298 static rtx skip_consec_insns PROTO((rtx, int));
299 static int libcall_benefit PROTO((rtx));
300 static void ignore_some_movables PROTO((struct movable *));
301 static void force_movables PROTO((struct movable *));
302 static void combine_movables PROTO((struct movable *, int));
303 static int regs_match_p PROTO((rtx, rtx, struct movable *));
304 static int rtx_equal_for_loop_p PROTO((rtx, rtx, struct movable *));
305 static void add_label_notes PROTO((rtx, rtx));
306 static void move_movables PROTO((struct movable *, int, int, rtx, rtx, int));
307 static int count_nonfixed_reads PROTO((rtx));
308 static void strength_reduce PROTO((rtx, rtx, rtx, int, rtx, rtx,
309 struct loop_info *, rtx, int, int));
310 static void find_single_use_in_loop PROTO((rtx, rtx, varray_type));
311 static int valid_initial_value_p PROTO((rtx, rtx, int, rtx));
312 static void find_mem_givs PROTO((rtx, rtx, int, int, rtx, rtx));
313 static void record_biv PROTO((struct induction *, rtx, rtx, rtx, rtx, rtx *, int, int));
314 static void check_final_value PROTO((struct induction *, rtx, rtx,
315 unsigned HOST_WIDE_INT));
316 static void record_giv PROTO((struct induction *, rtx, rtx, rtx, rtx, rtx, int, enum g_types, int, int, rtx *, rtx, rtx));
317 static void update_giv_derive PROTO((rtx));
318 static int basic_induction_var PROTO((rtx, enum machine_mode, rtx, rtx, rtx *, rtx *, rtx **));
319 static rtx simplify_giv_expr PROTO((rtx, int *));
320 static int general_induction_var PROTO((rtx, rtx *, rtx *, rtx *, int, int *));
321 static int consec_sets_giv PROTO((int, rtx, rtx, rtx, rtx *, rtx *, rtx *));
322 static int check_dbra_loop PROTO((rtx, int, rtx, struct loop_info *));
323 static rtx express_from_1 PROTO((rtx, rtx, rtx));
324 static rtx combine_givs_p PROTO((struct induction *, struct induction *));
325 static void combine_givs PROTO((struct iv_class *));
326 struct recombine_givs_stats;
327 static int find_life_end PROTO((rtx, struct recombine_givs_stats *, rtx, rtx));
328 static void recombine_givs PROTO((struct iv_class *, rtx, rtx, int));
329 static int product_cheap_p PROTO((rtx, rtx));
330 static int maybe_eliminate_biv PROTO((struct iv_class *, rtx, rtx, int, int, int));
331 static int maybe_eliminate_biv_1 PROTO((rtx, rtx, struct iv_class *, int, rtx));
332 static int last_use_this_basic_block PROTO((rtx, rtx));
333 static void record_initial PROTO((rtx, rtx, void *));
334 static void update_reg_last_use PROTO((rtx, rtx));
335 static rtx next_insn_in_loop PROTO((rtx, rtx, rtx, rtx));
336 static void load_mems_and_recount_loop_regs_set PROTO((rtx, rtx, rtx,
338 static void load_mems PROTO((rtx, rtx, rtx, rtx));
339 static int insert_loop_mem PROTO((rtx *, void *));
340 static int replace_loop_mem PROTO((rtx *, void *));
341 static int replace_loop_reg PROTO((rtx *, void *));
342 static void note_reg_stored PROTO((rtx, rtx, void *));
343 static void try_copy_prop PROTO((rtx, rtx, rtx, rtx, int));
344 static int replace_label PROTO((rtx *, void *));
346 typedef struct rtx_and_int {
351 typedef struct rtx_pair {
356 /* Nonzero iff INSN is between START and END, inclusive. */
357 #define INSN_IN_RANGE_P(INSN, START, END) \
358 (INSN_UID (INSN) < max_uid_for_loop \
359 && INSN_LUID (INSN) >= INSN_LUID (START) \
360 && INSN_LUID (INSN) <= INSN_LUID (END))
362 #ifdef HAVE_decrement_and_branch_on_count
363 /* Test whether BCT applicable and safe. */
364 static void insert_bct PROTO((rtx, rtx, struct loop_info *));
366 /* Auxiliary function that inserts the BCT pattern into the loop. */
367 static void instrument_loop_bct PROTO((rtx, rtx, rtx));
368 #endif /* HAVE_decrement_and_branch_on_count */
370 /* Indirect_jump_in_function is computed once per function. */
371 int indirect_jump_in_function = 0;
372 static int indirect_jump_in_function_p PROTO((rtx));
374 static int compute_luids PROTO((rtx, rtx, int));
376 static int biv_elimination_giv_has_0_offset PROTO((struct induction *,
377 struct induction *, rtx));
379 /* Relative gain of eliminating various kinds of operations. */
382 static int shift_cost;
383 static int mult_cost;
386 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
387 copy the value of the strength reduced giv to its original register. */
388 static int copy_cost;
390 /* Cost of using a register, to normalize the benefits of a giv. */
391 static int reg_address_cost;
397 char *free_point = (char *) oballoc (1);
398 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
400 add_cost = rtx_cost (gen_rtx_PLUS (word_mode, reg, reg), SET);
403 reg_address_cost = ADDRESS_COST (reg);
405 reg_address_cost = rtx_cost (reg, MEM);
408 /* We multiply by 2 to reconcile the difference in scale between
409 these two ways of computing costs. Otherwise the cost of a copy
410 will be far less than the cost of an add. */
414 /* Free the objects we just allocated. */
417 /* Initialize the obstack used for rtl in product_cheap_p. */
418 gcc_obstack_init (&temp_obstack);
421 /* Compute the mapping from uids to luids.
422 LUIDs are numbers assigned to insns, like uids,
423 except that luids increase monotonically through the code.
424 Start at insn START and stop just before END. Assign LUIDs
425 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
427 compute_luids (start, end, prev_luid)
434 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
436 if (INSN_UID (insn) >= max_uid_for_loop)
438 /* Don't assign luids to line-number NOTEs, so that the distance in
439 luids between two insns is not affected by -g. */
440 if (GET_CODE (insn) != NOTE
441 || NOTE_LINE_NUMBER (insn) <= 0)
442 uid_luid[INSN_UID (insn)] = ++i;
444 /* Give a line number note the same luid as preceding insn. */
445 uid_luid[INSN_UID (insn)] = i;
450 /* Entry point of this file. Perform loop optimization
451 on the current function. F is the first insn of the function
452 and DUMPFILE is a stream for output of a trace of actions taken
453 (or 0 if none should be output). */
456 loop_optimize (f, dumpfile, unroll_p, bct_p)
457 /* f is the first instruction of a chain of insns for one function */
465 loop_dump_stream = dumpfile;
467 init_recog_no_volatile ();
469 max_reg_before_loop = max_reg_num ();
473 /* Count the number of loops. */
476 for (insn = f; insn; insn = NEXT_INSN (insn))
478 if (GET_CODE (insn) == NOTE
479 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
483 /* Don't waste time if no loops. */
484 if (max_loop_num == 0)
487 moved_once = (char *) xcalloc (max_reg_before_loop, sizeof (char));
489 /* Get size to use for tables indexed by uids.
490 Leave some space for labels allocated by find_and_verify_loops. */
491 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
493 uid_luid = (int *) xcalloc (max_uid_for_loop, sizeof (int));
494 uid_loop_num = (int *) xcalloc (max_uid_for_loop, sizeof (int));
496 /* Allocate tables for recording each loop. We set each entry, so they need
498 loop_number_loop_starts = (rtx *) xmalloc (max_loop_num * sizeof (rtx));
499 loop_number_loop_ends = (rtx *) xmalloc (max_loop_num * sizeof (rtx));
500 loop_number_loop_cont = (rtx *) xmalloc (max_loop_num * sizeof (rtx));
501 loop_number_cont_dominator = (rtx *) xmalloc (max_loop_num * sizeof (rtx));
502 loop_outer_loop = (int *) xmalloc (max_loop_num * sizeof (int));
503 loop_invalid = (char *) xmalloc (max_loop_num * sizeof (char));
504 loop_number_exit_labels = (rtx *) xmalloc (max_loop_num * sizeof (rtx));
505 loop_number_exit_count = (int *) xmalloc (max_loop_num * sizeof (int));
507 #ifdef HAVE_decrement_and_branch_on_count
508 /* Allocate for BCT optimization */
509 loop_used_count_register = (int *) xcalloc (max_loop_num, sizeof (int));
510 #endif /* HAVE_decrement_and_branch_on_count */
512 /* Find and process each loop.
513 First, find them, and record them in order of their beginnings. */
514 find_and_verify_loops (f);
516 /* Now find all register lifetimes. This must be done after
517 find_and_verify_loops, because it might reorder the insns in the
519 reg_scan (f, max_reg_num (), 1);
521 /* This must occur after reg_scan so that registers created by gcse
522 will have entries in the register tables.
524 We could have added a call to reg_scan after gcse_main in toplev.c,
525 but moving this call to init_alias_analysis is more efficient. */
526 init_alias_analysis ();
528 /* See if we went too far. Note that get_max_uid already returns
529 one more that the maximum uid of all insn. */
530 if (get_max_uid () > max_uid_for_loop)
532 /* Now reset it to the actual size we need. See above. */
533 max_uid_for_loop = get_max_uid ();
535 /* find_and_verify_loops has already called compute_luids, but it might
536 have rearranged code afterwards, so we need to recompute the luids now. */
537 max_luid = compute_luids (f, NULL_RTX, 0);
539 /* Don't leave gaps in uid_luid for insns that have been
540 deleted. It is possible that the first or last insn
541 using some register has been deleted by cross-jumping.
542 Make sure that uid_luid for that former insn's uid
543 points to the general area where that insn used to be. */
544 for (i = 0; i < max_uid_for_loop; i++)
546 uid_luid[0] = uid_luid[i];
547 if (uid_luid[0] != 0)
550 for (i = 0; i < max_uid_for_loop; i++)
551 if (uid_luid[i] == 0)
552 uid_luid[i] = uid_luid[i - 1];
554 /* If debugging and unrolling loops, we must replicate the tree
555 nodes corresponding to the BLOCKs inside the loop, so that the
556 original one to one mapping will remain. We sometimes unroll
557 loops even when unroll_p is false, so we must always do this when
559 if (write_symbols != NO_DEBUG)
560 find_loop_tree_blocks ();
562 /* Determine if the function has indirect jump. On some systems
563 this prevents low overhead loop instructions from being used. */
564 indirect_jump_in_function = indirect_jump_in_function_p (f);
566 /* Now scan the loops, last ones first, since this means inner ones are done
567 before outer ones. */
568 for (i = max_loop_num-1; i >= 0; i--)
569 if (! loop_invalid[i] && loop_number_loop_ends[i])
570 scan_loop (loop_number_loop_starts[i], loop_number_loop_ends[i],
571 loop_number_loop_cont[i], unroll_p, bct_p);
573 /* Replicate the BLOCKs. */
574 if (write_symbols != NO_DEBUG)
575 unroll_block_trees ();
577 end_alias_analysis ();
583 free (loop_number_loop_starts);
584 free (loop_number_loop_ends);
585 free (loop_number_loop_cont);
586 free (loop_number_cont_dominator);
587 free (loop_outer_loop);
589 free (loop_number_exit_labels);
590 free (loop_number_exit_count);
591 #ifdef HAVE_decrement_and_branch_on_count
592 free (loop_used_count_register);
593 #endif /* HAVE_decrement_and_branch_on_count */
597 /* Returns the next insn, in execution order, after INSN. START and
598 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
599 respectively. LOOP_TOP, if non-NULL, is the top of the loop in the
600 insn-stream; it is used with loops that are entered near the
604 next_insn_in_loop (insn, start, end, loop_top)
610 insn = NEXT_INSN (insn);
615 /* Go to the top of the loop, and continue there. */
629 /* Optimize one loop whose start is LOOP_START and end is END.
630 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
632 LOOP_CONT is the NOTE_INSN_LOOP_CONT. */
634 /* ??? Could also move memory writes out of loops if the destination address
635 is invariant, the source is invariant, the memory write is not volatile,
636 and if we can prove that no read inside the loop can read this address
637 before the write occurs. If there is a read of this address after the
638 write, then we can also mark the memory read as invariant. */
641 scan_loop (loop_start, end, loop_cont, unroll_p, bct_p)
642 rtx loop_start, end, loop_cont;
647 /* 1 if we are scanning insns that could be executed zero times. */
649 /* 1 if we are scanning insns that might never be executed
650 due to a subroutine call which might exit before they are reached. */
652 /* For a rotated loop that is entered near the bottom,
653 this is the label at the top. Otherwise it is zero. */
655 /* Jump insn that enters the loop, or 0 if control drops in. */
656 rtx loop_entry_jump = 0;
657 /* Place in the loop where control enters. */
659 /* Number of insns in the loop. */
664 /* The SET from an insn, if it is the only SET in the insn. */
666 /* Chain describing insns movable in current loop. */
667 struct movable *movables = 0;
668 /* Last element in `movables' -- so we can add elements at the end. */
669 struct movable *last_movable = 0;
670 /* Ratio of extra register life span we can justify
671 for saving an instruction. More if loop doesn't call subroutines
672 since in that case saving an insn makes more difference
673 and more registers are available. */
675 /* Nonzero if we are scanning instructions in a sub-loop. */
678 struct loop_info *loop_info = &this_loop_info;
680 /* Determine whether this loop starts with a jump down to a test at
681 the end. This will occur for a small number of loops with a test
682 that is too complex to duplicate in front of the loop.
684 We search for the first insn or label in the loop, skipping NOTEs.
685 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
686 (because we might have a loop executed only once that contains a
687 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
688 (in case we have a degenerate loop).
690 Note that if we mistakenly think that a loop is entered at the top
691 when, in fact, it is entered at the exit test, the only effect will be
692 slightly poorer optimization. Making the opposite error can generate
693 incorrect code. Since very few loops now start with a jump to the
694 exit test, the code here to detect that case is very conservative. */
696 for (p = NEXT_INSN (loop_start);
698 && GET_CODE (p) != CODE_LABEL && GET_RTX_CLASS (GET_CODE (p)) != 'i'
699 && (GET_CODE (p) != NOTE
700 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
701 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
707 /* Set up variables describing this loop. */
708 prescan_loop (loop_start, end, loop_info);
709 threshold = (loop_info->has_call ? 1 : 2) * (1 + n_non_fixed_regs);
711 /* If loop has a jump before the first label,
712 the true entry is the target of that jump.
713 Start scan from there.
714 But record in LOOP_TOP the place where the end-test jumps
715 back to so we can scan that after the end of the loop. */
716 if (GET_CODE (p) == JUMP_INSN)
720 /* Loop entry must be unconditional jump (and not a RETURN) */
722 && JUMP_LABEL (p) != 0
723 /* Check to see whether the jump actually
724 jumps out of the loop (meaning it's no loop).
725 This case can happen for things like
726 do {..} while (0). If this label was generated previously
727 by loop, we can't tell anything about it and have to reject
729 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, end))
731 loop_top = next_label (scan_start);
732 scan_start = JUMP_LABEL (p);
736 /* If SCAN_START was an insn created by loop, we don't know its luid
737 as required by loop_reg_used_before_p. So skip such loops. (This
738 test may never be true, but it's best to play it safe.)
740 Also, skip loops where we do not start scanning at a label. This
741 test also rejects loops starting with a JUMP_INSN that failed the
744 if (INSN_UID (scan_start) >= max_uid_for_loop
745 || GET_CODE (scan_start) != CODE_LABEL)
747 if (loop_dump_stream)
748 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
749 INSN_UID (loop_start), INSN_UID (end));
753 /* Count number of times each reg is set during this loop.
754 Set VARRAY_CHAR (may_not_optimize, I) if it is not safe to move out
755 the setting of register I. Set VARRAY_RTX (reg_single_usage, I). */
757 /* Allocate extra space for REGS that might be created by
758 load_mems. We allocate a little extra slop as well, in the hopes
759 that even after the moving of movables creates some new registers
760 we won't have to reallocate these arrays. However, we do grow
761 the arrays, if necessary, in load_mems_recount_loop_regs_set. */
762 nregs = max_reg_num () + loop_mems_idx + 16;
763 VARRAY_INT_INIT (set_in_loop, nregs, "set_in_loop");
764 VARRAY_INT_INIT (n_times_set, nregs, "n_times_set");
765 VARRAY_CHAR_INIT (may_not_optimize, nregs, "may_not_optimize");
766 VARRAY_RTX_INIT (reg_single_usage, nregs, "reg_single_usage");
768 count_loop_regs_set (loop_top ? loop_top : loop_start, end,
769 may_not_optimize, reg_single_usage, &insn_count, nregs);
771 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
773 VARRAY_CHAR (may_not_optimize, i) = 1;
774 VARRAY_INT (set_in_loop, i) = 1;
777 #ifdef AVOID_CCMODE_COPIES
778 /* Don't try to move insns which set CC registers if we should not
779 create CCmode register copies. */
780 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
781 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
782 VARRAY_CHAR (may_not_optimize, i) = 1;
785 bcopy ((char *) &set_in_loop->data,
786 (char *) &n_times_set->data, nregs * sizeof (int));
788 if (loop_dump_stream)
790 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
791 INSN_UID (loop_start), INSN_UID (end), insn_count);
793 fprintf (loop_dump_stream, "Continue at insn %d.\n",
794 INSN_UID (loop_info->cont));
797 /* Scan through the loop finding insns that are safe to move.
798 Set set_in_loop negative for the reg being set, so that
799 this reg will be considered invariant for subsequent insns.
800 We consider whether subsequent insns use the reg
801 in deciding whether it is worth actually moving.
803 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
804 and therefore it is possible that the insns we are scanning
805 would never be executed. At such times, we must make sure
806 that it is safe to execute the insn once instead of zero times.
807 When MAYBE_NEVER is 0, all insns will be executed at least once
808 so that is not a problem. */
810 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
812 p = next_insn_in_loop (p, scan_start, end, loop_top))
814 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
815 && find_reg_note (p, REG_LIBCALL, NULL_RTX))
817 else if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
818 && find_reg_note (p, REG_RETVAL, NULL_RTX))
821 if (GET_CODE (p) == INSN
822 && (set = single_set (p))
823 && GET_CODE (SET_DEST (set)) == REG
824 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
829 rtx src = SET_SRC (set);
830 rtx dependencies = 0;
832 /* Figure out what to use as a source of this insn. If a REG_EQUIV
833 note is given or if a REG_EQUAL note with a constant operand is
834 specified, use it as the source and mark that we should move
835 this insn by calling emit_move_insn rather that duplicating the
838 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
840 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
842 src = XEXP (temp, 0), move_insn = 1;
845 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
846 if (temp && CONSTANT_P (XEXP (temp, 0)))
847 src = XEXP (temp, 0), move_insn = 1;
848 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
850 src = XEXP (temp, 0);
851 /* A libcall block can use regs that don't appear in
852 the equivalent expression. To move the libcall,
853 we must move those regs too. */
854 dependencies = libcall_other_reg (p, src);
858 /* Don't try to optimize a register that was made
859 by loop-optimization for an inner loop.
860 We don't know its life-span, so we can't compute the benefit. */
861 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
863 else if (/* The register is used in basic blocks other
864 than the one where it is set (meaning that
865 something after this point in the loop might
866 depend on its value before the set). */
867 ! reg_in_basic_block_p (p, SET_DEST (set))
868 /* And the set is not guaranteed to be executed one
869 the loop starts, or the value before the set is
870 needed before the set occurs...
872 ??? Note we have quadratic behaviour here, mitigated
873 by the fact that the previous test will often fail for
874 large loops. Rather than re-scanning the entire loop
875 each time for register usage, we should build tables
876 of the register usage and use them here instead. */
878 || loop_reg_used_before_p (set, p, loop_start,
880 /* It is unsafe to move the set.
882 This code used to consider it OK to move a set of a variable
883 which was not created by the user and not used in an exit test.
884 That behavior is incorrect and was removed. */
886 else if ((tem = invariant_p (src))
887 && (dependencies == 0
888 || (tem2 = invariant_p (dependencies)) != 0)
889 && (VARRAY_INT (set_in_loop,
890 REGNO (SET_DEST (set))) == 1
892 = consec_sets_invariant_p
894 VARRAY_INT (set_in_loop, REGNO (SET_DEST (set))),
896 /* If the insn can cause a trap (such as divide by zero),
897 can't move it unless it's guaranteed to be executed
898 once loop is entered. Even a function call might
899 prevent the trap insn from being reached
900 (since it might exit!) */
901 && ! ((maybe_never || call_passed)
902 && may_trap_p (src)))
904 register struct movable *m;
905 register int regno = REGNO (SET_DEST (set));
907 /* A potential lossage is where we have a case where two insns
908 can be combined as long as they are both in the loop, but
909 we move one of them outside the loop. For large loops,
910 this can lose. The most common case of this is the address
911 of a function being called.
913 Therefore, if this register is marked as being used exactly
914 once if we are in a loop with calls (a "large loop"), see if
915 we can replace the usage of this register with the source
916 of this SET. If we can, delete this insn.
918 Don't do this if P has a REG_RETVAL note or if we have
919 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
921 if (loop_info->has_call
922 && VARRAY_RTX (reg_single_usage, regno) != 0
923 && VARRAY_RTX (reg_single_usage, regno) != const0_rtx
924 && REGNO_FIRST_UID (regno) == INSN_UID (p)
925 && (REGNO_LAST_UID (regno)
926 == INSN_UID (VARRAY_RTX (reg_single_usage, regno)))
927 && VARRAY_INT (set_in_loop, regno) == 1
928 && ! side_effects_p (SET_SRC (set))
929 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
930 && (! SMALL_REGISTER_CLASSES
931 || (! (GET_CODE (SET_SRC (set)) == REG
932 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
933 /* This test is not redundant; SET_SRC (set) might be
934 a call-clobbered register and the life of REGNO
935 might span a call. */
936 && ! modified_between_p (SET_SRC (set), p,
938 (reg_single_usage, regno))
939 && no_labels_between_p (p, VARRAY_RTX (reg_single_usage, regno))
940 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
942 (reg_single_usage, regno)))
944 /* Replace any usage in a REG_EQUAL note. Must copy the
945 new source, so that we don't get rtx sharing between the
946 SET_SOURCE and REG_NOTES of insn p. */
947 REG_NOTES (VARRAY_RTX (reg_single_usage, regno))
948 = replace_rtx (REG_NOTES (VARRAY_RTX
949 (reg_single_usage, regno)),
950 SET_DEST (set), copy_rtx (SET_SRC (set)));
953 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
954 NOTE_SOURCE_FILE (p) = 0;
955 VARRAY_INT (set_in_loop, regno) = 0;
959 m = (struct movable *) alloca (sizeof (struct movable));
963 m->dependencies = dependencies;
964 m->set_dest = SET_DEST (set);
966 m->consec = VARRAY_INT (set_in_loop,
967 REGNO (SET_DEST (set))) - 1;
971 m->move_insn = move_insn;
972 m->move_insn_first = 0;
973 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
974 m->savemode = VOIDmode;
976 /* Set M->cond if either invariant_p or consec_sets_invariant_p
977 returned 2 (only conditionally invariant). */
978 m->cond = ((tem | tem1 | tem2) > 1);
979 m->global = (uid_luid[REGNO_LAST_UID (regno)] > INSN_LUID (end)
980 || uid_luid[REGNO_FIRST_UID (regno)] < INSN_LUID (loop_start));
982 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
983 - uid_luid[REGNO_FIRST_UID (regno)]);
984 m->savings = VARRAY_INT (n_times_set, regno);
985 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
986 m->savings += libcall_benefit (p);
987 VARRAY_INT (set_in_loop, regno) = move_insn ? -2 : -1;
988 /* Add M to the end of the chain MOVABLES. */
992 last_movable->next = m;
997 /* It is possible for the first instruction to have a
998 REG_EQUAL note but a non-invariant SET_SRC, so we must
999 remember the status of the first instruction in case
1000 the last instruction doesn't have a REG_EQUAL note. */
1001 m->move_insn_first = m->move_insn;
1003 /* Skip this insn, not checking REG_LIBCALL notes. */
1004 p = next_nonnote_insn (p);
1005 /* Skip the consecutive insns, if there are any. */
1006 p = skip_consec_insns (p, m->consec);
1007 /* Back up to the last insn of the consecutive group. */
1008 p = prev_nonnote_insn (p);
1010 /* We must now reset m->move_insn, m->is_equiv, and possibly
1011 m->set_src to correspond to the effects of all the
1013 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
1015 m->set_src = XEXP (temp, 0), m->move_insn = 1;
1018 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
1019 if (temp && CONSTANT_P (XEXP (temp, 0)))
1020 m->set_src = XEXP (temp, 0), m->move_insn = 1;
1025 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
1028 /* If this register is always set within a STRICT_LOW_PART
1029 or set to zero, then its high bytes are constant.
1030 So clear them outside the loop and within the loop
1031 just load the low bytes.
1032 We must check that the machine has an instruction to do so.
1033 Also, if the value loaded into the register
1034 depends on the same register, this cannot be done. */
1035 else if (SET_SRC (set) == const0_rtx
1036 && GET_CODE (NEXT_INSN (p)) == INSN
1037 && (set1 = single_set (NEXT_INSN (p)))
1038 && GET_CODE (set1) == SET
1039 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
1040 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
1041 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
1043 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
1045 register int regno = REGNO (SET_DEST (set));
1046 if (VARRAY_INT (set_in_loop, regno) == 2)
1048 register struct movable *m;
1049 m = (struct movable *) alloca (sizeof (struct movable));
1052 m->set_dest = SET_DEST (set);
1053 m->dependencies = 0;
1059 m->move_insn_first = 0;
1061 /* If the insn may not be executed on some cycles,
1062 we can't clear the whole reg; clear just high part.
1063 Not even if the reg is used only within this loop.
1070 Clearing x before the inner loop could clobber a value
1071 being saved from the last time around the outer loop.
1072 However, if the reg is not used outside this loop
1073 and all uses of the register are in the same
1074 basic block as the store, there is no problem.
1076 If this insn was made by loop, we don't know its
1077 INSN_LUID and hence must make a conservative
1079 m->global = (INSN_UID (p) >= max_uid_for_loop
1080 || (uid_luid[REGNO_LAST_UID (regno)]
1082 || (uid_luid[REGNO_FIRST_UID (regno)]
1084 || (labels_in_range_p
1085 (p, uid_luid[REGNO_FIRST_UID (regno)])));
1086 if (maybe_never && m->global)
1087 m->savemode = GET_MODE (SET_SRC (set1));
1089 m->savemode = VOIDmode;
1093 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
1094 - uid_luid[REGNO_FIRST_UID (regno)]);
1096 VARRAY_INT (set_in_loop, regno) = -1;
1097 /* Add M to the end of the chain MOVABLES. */
1101 last_movable->next = m;
1106 /* Past a call insn, we get to insns which might not be executed
1107 because the call might exit. This matters for insns that trap.
1108 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1109 so they don't count. */
1110 else if (GET_CODE (p) == CALL_INSN && ! in_libcall)
1112 /* Past a label or a jump, we get to insns for which we
1113 can't count on whether or how many times they will be
1114 executed during each iteration. Therefore, we can
1115 only move out sets of trivial variables
1116 (those not used after the loop). */
1117 /* Similar code appears twice in strength_reduce. */
1118 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1119 /* If we enter the loop in the middle, and scan around to the
1120 beginning, don't set maybe_never for that. This must be an
1121 unconditional jump, otherwise the code at the top of the
1122 loop might never be executed. Unconditional jumps are
1123 followed a by barrier then loop end. */
1124 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop_top
1125 && NEXT_INSN (NEXT_INSN (p)) == end
1126 && simplejump_p (p)))
1128 else if (GET_CODE (p) == NOTE)
1130 /* At the virtual top of a converted loop, insns are again known to
1131 be executed: logically, the loop begins here even though the exit
1132 code has been duplicated. */
1133 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1134 maybe_never = call_passed = 0;
1135 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1137 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1142 /* If one movable subsumes another, ignore that other. */
1144 ignore_some_movables (movables);
1146 /* For each movable insn, see if the reg that it loads
1147 leads when it dies right into another conditionally movable insn.
1148 If so, record that the second insn "forces" the first one,
1149 since the second can be moved only if the first is. */
1151 force_movables (movables);
1153 /* See if there are multiple movable insns that load the same value.
1154 If there are, make all but the first point at the first one
1155 through the `match' field, and add the priorities of them
1156 all together as the priority of the first. */
1158 combine_movables (movables, nregs);
1160 /* Now consider each movable insn to decide whether it is worth moving.
1161 Store 0 in set_in_loop for each reg that is moved.
1163 Generally this increases code size, so do not move moveables when
1164 optimizing for code size. */
1166 if (! optimize_size)
1167 move_movables (movables, threshold,
1168 insn_count, loop_start, end, nregs);
1170 /* Now candidates that still are negative are those not moved.
1171 Change set_in_loop to indicate that those are not actually invariant. */
1172 for (i = 0; i < nregs; i++)
1173 if (VARRAY_INT (set_in_loop, i) < 0)
1174 VARRAY_INT (set_in_loop, i) = VARRAY_INT (n_times_set, i);
1176 /* Now that we've moved some things out of the loop, we might be able to
1177 hoist even more memory references. */
1178 load_mems_and_recount_loop_regs_set (scan_start, end, loop_top,
1179 loop_start, &insn_count);
1181 if (flag_strength_reduce)
1183 the_movables = movables;
1184 strength_reduce (scan_start, end, loop_top,
1185 insn_count, loop_start, end,
1186 loop_info, loop_cont, unroll_p, bct_p);
1189 VARRAY_FREE (reg_single_usage);
1190 VARRAY_FREE (set_in_loop);
1191 VARRAY_FREE (n_times_set);
1192 VARRAY_FREE (may_not_optimize);
1195 /* Add elements to *OUTPUT to record all the pseudo-regs
1196 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1199 record_excess_regs (in_this, not_in_this, output)
1200 rtx in_this, not_in_this;
1207 code = GET_CODE (in_this);
1221 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1222 && ! reg_mentioned_p (in_this, not_in_this))
1223 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1230 fmt = GET_RTX_FORMAT (code);
1231 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1238 for (j = 0; j < XVECLEN (in_this, i); j++)
1239 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1243 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1249 /* Check what regs are referred to in the libcall block ending with INSN,
1250 aside from those mentioned in the equivalent value.
1251 If there are none, return 0.
1252 If there are one or more, return an EXPR_LIST containing all of them. */
1255 libcall_other_reg (insn, equiv)
1258 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1259 rtx p = XEXP (note, 0);
1262 /* First, find all the regs used in the libcall block
1263 that are not mentioned as inputs to the result. */
1267 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1268 || GET_CODE (p) == CALL_INSN)
1269 record_excess_regs (PATTERN (p), equiv, &output);
1276 /* Return 1 if all uses of REG
1277 are between INSN and the end of the basic block. */
1280 reg_in_basic_block_p (insn, reg)
1283 int regno = REGNO (reg);
1286 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1289 /* Search this basic block for the already recorded last use of the reg. */
1290 for (p = insn; p; p = NEXT_INSN (p))
1292 switch (GET_CODE (p))
1299 /* Ordinary insn: if this is the last use, we win. */
1300 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1305 /* Jump insn: if this is the last use, we win. */
1306 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1308 /* Otherwise, it's the end of the basic block, so we lose. */
1313 /* It's the end of the basic block, so we lose. */
1321 /* The "last use" doesn't follow the "first use"?? */
1325 /* Compute the benefit of eliminating the insns in the block whose
1326 last insn is LAST. This may be a group of insns used to compute a
1327 value directly or can contain a library call. */
1330 libcall_benefit (last)
1336 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1337 insn != last; insn = NEXT_INSN (insn))
1339 if (GET_CODE (insn) == CALL_INSN)
1340 benefit += 10; /* Assume at least this many insns in a library
1342 else if (GET_CODE (insn) == INSN
1343 && GET_CODE (PATTERN (insn)) != USE
1344 && GET_CODE (PATTERN (insn)) != CLOBBER)
1351 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1354 skip_consec_insns (insn, count)
1358 for (; count > 0; count--)
1362 /* If first insn of libcall sequence, skip to end. */
1363 /* Do this at start of loop, since INSN is guaranteed to
1365 if (GET_CODE (insn) != NOTE
1366 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1367 insn = XEXP (temp, 0);
1369 do insn = NEXT_INSN (insn);
1370 while (GET_CODE (insn) == NOTE);
1376 /* Ignore any movable whose insn falls within a libcall
1377 which is part of another movable.
1378 We make use of the fact that the movable for the libcall value
1379 was made later and so appears later on the chain. */
1382 ignore_some_movables (movables)
1383 struct movable *movables;
1385 register struct movable *m, *m1;
1387 for (m = movables; m; m = m->next)
1389 /* Is this a movable for the value of a libcall? */
1390 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1394 /* Check for earlier movables inside that range,
1395 and mark them invalid. We cannot use LUIDs here because
1396 insns created by loop.c for prior loops don't have LUIDs.
1397 Rather than reject all such insns from movables, we just
1398 explicitly check each insn in the libcall (since invariant
1399 libcalls aren't that common). */
1400 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1401 for (m1 = movables; m1 != m; m1 = m1->next)
1402 if (m1->insn == insn)
1408 /* For each movable insn, see if the reg that it loads
1409 leads when it dies right into another conditionally movable insn.
1410 If so, record that the second insn "forces" the first one,
1411 since the second can be moved only if the first is. */
1414 force_movables (movables)
1415 struct movable *movables;
1417 register struct movable *m, *m1;
1418 for (m1 = movables; m1; m1 = m1->next)
1419 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1420 if (!m1->partial && !m1->done)
1422 int regno = m1->regno;
1423 for (m = m1->next; m; m = m->next)
1424 /* ??? Could this be a bug? What if CSE caused the
1425 register of M1 to be used after this insn?
1426 Since CSE does not update regno_last_uid,
1427 this insn M->insn might not be where it dies.
1428 But very likely this doesn't matter; what matters is
1429 that M's reg is computed from M1's reg. */
1430 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1433 if (m != 0 && m->set_src == m1->set_dest
1434 /* If m->consec, m->set_src isn't valid. */
1438 /* Increase the priority of the moving the first insn
1439 since it permits the second to be moved as well. */
1443 m1->lifetime += m->lifetime;
1444 m1->savings += m->savings;
1449 /* Find invariant expressions that are equal and can be combined into
1453 combine_movables (movables, nregs)
1454 struct movable *movables;
1457 register struct movable *m;
1458 char *matched_regs = (char *) xmalloc (nregs);
1459 enum machine_mode mode;
1461 /* Regs that are set more than once are not allowed to match
1462 or be matched. I'm no longer sure why not. */
1463 /* Perhaps testing m->consec_sets would be more appropriate here? */
1465 for (m = movables; m; m = m->next)
1466 if (m->match == 0 && VARRAY_INT (n_times_set, m->regno) == 1 && !m->partial)
1468 register struct movable *m1;
1469 int regno = m->regno;
1471 bzero (matched_regs, nregs);
1472 matched_regs[regno] = 1;
1474 /* We want later insns to match the first one. Don't make the first
1475 one match any later ones. So start this loop at m->next. */
1476 for (m1 = m->next; m1; m1 = m1->next)
1477 if (m != m1 && m1->match == 0 && VARRAY_INT (n_times_set, m1->regno) == 1
1478 /* A reg used outside the loop mustn't be eliminated. */
1480 /* A reg used for zero-extending mustn't be eliminated. */
1482 && (matched_regs[m1->regno]
1485 /* Can combine regs with different modes loaded from the
1486 same constant only if the modes are the same or
1487 if both are integer modes with M wider or the same
1488 width as M1. The check for integer is redundant, but
1489 safe, since the only case of differing destination
1490 modes with equal sources is when both sources are
1491 VOIDmode, i.e., CONST_INT. */
1492 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1493 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1494 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1495 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1496 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1497 /* See if the source of M1 says it matches M. */
1498 && ((GET_CODE (m1->set_src) == REG
1499 && matched_regs[REGNO (m1->set_src)])
1500 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1502 && ((m->dependencies == m1->dependencies)
1503 || rtx_equal_p (m->dependencies, m1->dependencies)))
1505 m->lifetime += m1->lifetime;
1506 m->savings += m1->savings;
1509 matched_regs[m1->regno] = 1;
1513 /* Now combine the regs used for zero-extension.
1514 This can be done for those not marked `global'
1515 provided their lives don't overlap. */
1517 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1518 mode = GET_MODE_WIDER_MODE (mode))
1520 register struct movable *m0 = 0;
1522 /* Combine all the registers for extension from mode MODE.
1523 Don't combine any that are used outside this loop. */
1524 for (m = movables; m; m = m->next)
1525 if (m->partial && ! m->global
1526 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1528 register struct movable *m1;
1529 int first = uid_luid[REGNO_FIRST_UID (m->regno)];
1530 int last = uid_luid[REGNO_LAST_UID (m->regno)];
1534 /* First one: don't check for overlap, just record it. */
1539 /* Make sure they extend to the same mode.
1540 (Almost always true.) */
1541 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1544 /* We already have one: check for overlap with those
1545 already combined together. */
1546 for (m1 = movables; m1 != m; m1 = m1->next)
1547 if (m1 == m0 || (m1->partial && m1->match == m0))
1548 if (! (uid_luid[REGNO_FIRST_UID (m1->regno)] > last
1549 || uid_luid[REGNO_LAST_UID (m1->regno)] < first))
1552 /* No overlap: we can combine this with the others. */
1553 m0->lifetime += m->lifetime;
1554 m0->savings += m->savings;
1563 free (matched_regs);
1566 /* Return 1 if regs X and Y will become the same if moved. */
1569 regs_match_p (x, y, movables)
1571 struct movable *movables;
1575 struct movable *mx, *my;
1577 for (mx = movables; mx; mx = mx->next)
1578 if (mx->regno == xn)
1581 for (my = movables; my; my = my->next)
1582 if (my->regno == yn)
1586 && ((mx->match == my->match && mx->match != 0)
1588 || mx == my->match));
1591 /* Return 1 if X and Y are identical-looking rtx's.
1592 This is the Lisp function EQUAL for rtx arguments.
1594 If two registers are matching movables or a movable register and an
1595 equivalent constant, consider them equal. */
1598 rtx_equal_for_loop_p (x, y, movables)
1600 struct movable *movables;
1604 register struct movable *m;
1605 register enum rtx_code code;
1606 register const char *fmt;
1610 if (x == 0 || y == 0)
1613 code = GET_CODE (x);
1615 /* If we have a register and a constant, they may sometimes be
1617 if (GET_CODE (x) == REG && VARRAY_INT (set_in_loop, REGNO (x)) == -2
1620 for (m = movables; m; m = m->next)
1621 if (m->move_insn && m->regno == REGNO (x)
1622 && rtx_equal_p (m->set_src, y))
1625 else if (GET_CODE (y) == REG && VARRAY_INT (set_in_loop, REGNO (y)) == -2
1628 for (m = movables; m; m = m->next)
1629 if (m->move_insn && m->regno == REGNO (y)
1630 && rtx_equal_p (m->set_src, x))
1634 /* Otherwise, rtx's of different codes cannot be equal. */
1635 if (code != GET_CODE (y))
1638 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1639 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1641 if (GET_MODE (x) != GET_MODE (y))
1644 /* These three types of rtx's can be compared nonrecursively. */
1646 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1648 if (code == LABEL_REF)
1649 return XEXP (x, 0) == XEXP (y, 0);
1650 if (code == SYMBOL_REF)
1651 return XSTR (x, 0) == XSTR (y, 0);
1653 /* Compare the elements. If any pair of corresponding elements
1654 fail to match, return 0 for the whole things. */
1656 fmt = GET_RTX_FORMAT (code);
1657 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1662 if (XWINT (x, i) != XWINT (y, i))
1667 if (XINT (x, i) != XINT (y, i))
1672 /* Two vectors must have the same length. */
1673 if (XVECLEN (x, i) != XVECLEN (y, i))
1676 /* And the corresponding elements must match. */
1677 for (j = 0; j < XVECLEN (x, i); j++)
1678 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j), movables) == 0)
1683 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables) == 0)
1688 if (strcmp (XSTR (x, i), XSTR (y, i)))
1693 /* These are just backpointers, so they don't matter. */
1699 /* It is believed that rtx's at this level will never
1700 contain anything but integers and other rtx's,
1701 except for within LABEL_REFs and SYMBOL_REFs. */
1709 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1710 insns in INSNS which use the reference. */
1713 add_label_notes (x, insns)
1717 enum rtx_code code = GET_CODE (x);
1722 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1724 /* This code used to ignore labels that referred to dispatch tables to
1725 avoid flow generating (slighly) worse code.
1727 We no longer ignore such label references (see LABEL_REF handling in
1728 mark_jump_label for additional information). */
1729 for (insn = insns; insn; insn = NEXT_INSN (insn))
1730 if (reg_mentioned_p (XEXP (x, 0), insn))
1731 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, XEXP (x, 0),
1735 fmt = GET_RTX_FORMAT (code);
1736 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1739 add_label_notes (XEXP (x, i), insns);
1740 else if (fmt[i] == 'E')
1741 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1742 add_label_notes (XVECEXP (x, i, j), insns);
1746 /* Scan MOVABLES, and move the insns that deserve to be moved.
1747 If two matching movables are combined, replace one reg with the
1748 other throughout. */
1751 move_movables (movables, threshold, insn_count, loop_start, end, nregs)
1752 struct movable *movables;
1760 register struct movable *m;
1762 /* Map of pseudo-register replacements to handle combining
1763 when we move several insns that load the same value
1764 into different pseudo-registers. */
1765 rtx *reg_map = (rtx *) xcalloc (nregs, sizeof (rtx));
1766 char *already_moved = (char *) xcalloc (nregs, sizeof (char));
1770 for (m = movables; m; m = m->next)
1772 /* Describe this movable insn. */
1774 if (loop_dump_stream)
1776 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1777 INSN_UID (m->insn), m->regno, m->lifetime);
1779 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1781 fprintf (loop_dump_stream, "cond ");
1783 fprintf (loop_dump_stream, "force ");
1785 fprintf (loop_dump_stream, "global ");
1787 fprintf (loop_dump_stream, "done ");
1789 fprintf (loop_dump_stream, "move-insn ");
1791 fprintf (loop_dump_stream, "matches %d ",
1792 INSN_UID (m->match->insn));
1794 fprintf (loop_dump_stream, "forces %d ",
1795 INSN_UID (m->forces->insn));
1798 /* Count movables. Value used in heuristics in strength_reduce. */
1801 /* Ignore the insn if it's already done (it matched something else).
1802 Otherwise, see if it is now safe to move. */
1806 || (1 == invariant_p (m->set_src)
1807 && (m->dependencies == 0
1808 || 1 == invariant_p (m->dependencies))
1810 || 1 == consec_sets_invariant_p (m->set_dest,
1813 && (! m->forces || m->forces->done))
1817 int savings = m->savings;
1819 /* We have an insn that is safe to move.
1820 Compute its desirability. */
1825 if (loop_dump_stream)
1826 fprintf (loop_dump_stream, "savings %d ", savings);
1828 if (moved_once[regno] && loop_dump_stream)
1829 fprintf (loop_dump_stream, "halved since already moved ");
1831 /* An insn MUST be moved if we already moved something else
1832 which is safe only if this one is moved too: that is,
1833 if already_moved[REGNO] is nonzero. */
1835 /* An insn is desirable to move if the new lifetime of the
1836 register is no more than THRESHOLD times the old lifetime.
1837 If it's not desirable, it means the loop is so big
1838 that moving won't speed things up much,
1839 and it is liable to make register usage worse. */
1841 /* It is also desirable to move if it can be moved at no
1842 extra cost because something else was already moved. */
1844 if (already_moved[regno]
1845 || flag_move_all_movables
1846 || (threshold * savings * m->lifetime) >=
1847 (moved_once[regno] ? insn_count * 2 : insn_count)
1848 || (m->forces && m->forces->done
1849 && VARRAY_INT (n_times_set, m->forces->regno) == 1))
1852 register struct movable *m1;
1853 rtx first = NULL_RTX;
1855 /* Now move the insns that set the reg. */
1857 if (m->partial && m->match)
1861 /* Find the end of this chain of matching regs.
1862 Thus, we load each reg in the chain from that one reg.
1863 And that reg is loaded with 0 directly,
1864 since it has ->match == 0. */
1865 for (m1 = m; m1->match; m1 = m1->match);
1866 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1867 SET_DEST (PATTERN (m1->insn)));
1868 i1 = emit_insn_before (newpat, loop_start);
1870 /* Mark the moved, invariant reg as being allowed to
1871 share a hard reg with the other matching invariant. */
1872 REG_NOTES (i1) = REG_NOTES (m->insn);
1873 r1 = SET_DEST (PATTERN (m->insn));
1874 r2 = SET_DEST (PATTERN (m1->insn));
1876 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1877 gen_rtx_EXPR_LIST (VOIDmode, r2,
1879 delete_insn (m->insn);
1884 if (loop_dump_stream)
1885 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1887 /* If we are to re-generate the item being moved with a
1888 new move insn, first delete what we have and then emit
1889 the move insn before the loop. */
1890 else if (m->move_insn)
1894 for (count = m->consec; count >= 0; count--)
1896 /* If this is the first insn of a library call sequence,
1898 if (GET_CODE (p) != NOTE
1899 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1902 /* If this is the last insn of a libcall sequence, then
1903 delete every insn in the sequence except the last.
1904 The last insn is handled in the normal manner. */
1905 if (GET_CODE (p) != NOTE
1906 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1908 temp = XEXP (temp, 0);
1910 temp = delete_insn (temp);
1914 p = delete_insn (p);
1916 /* simplify_giv_expr expects that it can walk the insns
1917 at m->insn forwards and see this old sequence we are
1918 tossing here. delete_insn does preserve the next
1919 pointers, but when we skip over a NOTE we must fix
1920 it up. Otherwise that code walks into the non-deleted
1922 while (p && GET_CODE (p) == NOTE)
1923 p = NEXT_INSN (temp) = NEXT_INSN (p);
1927 emit_move_insn (m->set_dest, m->set_src);
1928 temp = get_insns ();
1931 add_label_notes (m->set_src, temp);
1933 i1 = emit_insns_before (temp, loop_start);
1934 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1936 = gen_rtx_EXPR_LIST (m->is_equiv ? REG_EQUIV : REG_EQUAL,
1937 m->set_src, REG_NOTES (i1));
1939 if (loop_dump_stream)
1940 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1942 /* The more regs we move, the less we like moving them. */
1947 for (count = m->consec; count >= 0; count--)
1951 /* If first insn of libcall sequence, skip to end. */
1952 /* Do this at start of loop, since p is guaranteed to
1954 if (GET_CODE (p) != NOTE
1955 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1958 /* If last insn of libcall sequence, move all
1959 insns except the last before the loop. The last
1960 insn is handled in the normal manner. */
1961 if (GET_CODE (p) != NOTE
1962 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1966 rtx fn_address_insn = 0;
1969 for (temp = XEXP (temp, 0); temp != p;
1970 temp = NEXT_INSN (temp))
1976 if (GET_CODE (temp) == NOTE)
1979 body = PATTERN (temp);
1981 /* Find the next insn after TEMP,
1982 not counting USE or NOTE insns. */
1983 for (next = NEXT_INSN (temp); next != p;
1984 next = NEXT_INSN (next))
1985 if (! (GET_CODE (next) == INSN
1986 && GET_CODE (PATTERN (next)) == USE)
1987 && GET_CODE (next) != NOTE)
1990 /* If that is the call, this may be the insn
1991 that loads the function address.
1993 Extract the function address from the insn
1994 that loads it into a register.
1995 If this insn was cse'd, we get incorrect code.
1997 So emit a new move insn that copies the
1998 function address into the register that the
1999 call insn will use. flow.c will delete any
2000 redundant stores that we have created. */
2001 if (GET_CODE (next) == CALL_INSN
2002 && GET_CODE (body) == SET
2003 && GET_CODE (SET_DEST (body)) == REG
2004 && (n = find_reg_note (temp, REG_EQUAL,
2007 fn_reg = SET_SRC (body);
2008 if (GET_CODE (fn_reg) != REG)
2009 fn_reg = SET_DEST (body);
2010 fn_address = XEXP (n, 0);
2011 fn_address_insn = temp;
2013 /* We have the call insn.
2014 If it uses the register we suspect it might,
2015 load it with the correct address directly. */
2016 if (GET_CODE (temp) == CALL_INSN
2018 && reg_referenced_p (fn_reg, body))
2019 emit_insn_after (gen_move_insn (fn_reg,
2023 if (GET_CODE (temp) == CALL_INSN)
2025 i1 = emit_call_insn_before (body, loop_start);
2026 /* Because the USAGE information potentially
2027 contains objects other than hard registers
2028 we need to copy it. */
2029 if (CALL_INSN_FUNCTION_USAGE (temp))
2030 CALL_INSN_FUNCTION_USAGE (i1)
2031 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
2034 i1 = emit_insn_before (body, loop_start);
2037 if (temp == fn_address_insn)
2038 fn_address_insn = i1;
2039 REG_NOTES (i1) = REG_NOTES (temp);
2045 if (m->savemode != VOIDmode)
2047 /* P sets REG to zero; but we should clear only
2048 the bits that are not covered by the mode
2050 rtx reg = m->set_dest;
2056 (GET_MODE (reg), and_optab, reg,
2057 GEN_INT ((((HOST_WIDE_INT) 1
2058 << GET_MODE_BITSIZE (m->savemode)))
2060 reg, 1, OPTAB_LIB_WIDEN);
2064 emit_move_insn (reg, tem);
2065 sequence = gen_sequence ();
2067 i1 = emit_insn_before (sequence, loop_start);
2069 else if (GET_CODE (p) == CALL_INSN)
2071 i1 = emit_call_insn_before (PATTERN (p), loop_start);
2072 /* Because the USAGE information potentially
2073 contains objects other than hard registers
2074 we need to copy it. */
2075 if (CALL_INSN_FUNCTION_USAGE (p))
2076 CALL_INSN_FUNCTION_USAGE (i1)
2077 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2079 else if (count == m->consec && m->move_insn_first)
2081 /* The SET_SRC might not be invariant, so we must
2082 use the REG_EQUAL note. */
2084 emit_move_insn (m->set_dest, m->set_src);
2085 temp = get_insns ();
2088 add_label_notes (m->set_src, temp);
2090 i1 = emit_insns_before (temp, loop_start);
2091 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2093 = gen_rtx_EXPR_LIST ((m->is_equiv ? REG_EQUIV
2095 m->set_src, REG_NOTES (i1));
2098 i1 = emit_insn_before (PATTERN (p), loop_start);
2100 if (REG_NOTES (i1) == 0)
2102 REG_NOTES (i1) = REG_NOTES (p);
2104 /* If there is a REG_EQUAL note present whose value
2105 is not loop invariant, then delete it, since it
2106 may cause problems with later optimization passes.
2107 It is possible for cse to create such notes
2108 like this as a result of record_jump_cond. */
2110 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2111 && ! invariant_p (XEXP (temp, 0)))
2112 remove_note (i1, temp);
2118 if (loop_dump_stream)
2119 fprintf (loop_dump_stream, " moved to %d",
2122 /* If library call, now fix the REG_NOTES that contain
2123 insn pointers, namely REG_LIBCALL on FIRST
2124 and REG_RETVAL on I1. */
2125 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2127 XEXP (temp, 0) = first;
2128 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2129 XEXP (temp, 0) = i1;
2136 /* simplify_giv_expr expects that it can walk the insns
2137 at m->insn forwards and see this old sequence we are
2138 tossing here. delete_insn does preserve the next
2139 pointers, but when we skip over a NOTE we must fix
2140 it up. Otherwise that code walks into the non-deleted
2142 while (p && GET_CODE (p) == NOTE)
2143 p = NEXT_INSN (temp) = NEXT_INSN (p);
2146 /* The more regs we move, the less we like moving them. */
2150 /* Any other movable that loads the same register
2152 already_moved[regno] = 1;
2154 /* This reg has been moved out of one loop. */
2155 moved_once[regno] = 1;
2157 /* The reg set here is now invariant. */
2159 VARRAY_INT (set_in_loop, regno) = 0;
2163 /* Change the length-of-life info for the register
2164 to say it lives at least the full length of this loop.
2165 This will help guide optimizations in outer loops. */
2167 if (uid_luid[REGNO_FIRST_UID (regno)] > INSN_LUID (loop_start))
2168 /* This is the old insn before all the moved insns.
2169 We can't use the moved insn because it is out of range
2170 in uid_luid. Only the old insns have luids. */
2171 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2172 if (uid_luid[REGNO_LAST_UID (regno)] < INSN_LUID (end))
2173 REGNO_LAST_UID (regno) = INSN_UID (end);
2175 /* Combine with this moved insn any other matching movables. */
2178 for (m1 = movables; m1; m1 = m1->next)
2183 /* Schedule the reg loaded by M1
2184 for replacement so that shares the reg of M.
2185 If the modes differ (only possible in restricted
2186 circumstances, make a SUBREG.
2188 Note this assumes that the target dependent files
2189 treat REG and SUBREG equally, including within
2190 GO_IF_LEGITIMATE_ADDRESS and in all the
2191 predicates since we never verify that replacing the
2192 original register with a SUBREG results in a
2193 recognizable insn. */
2194 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2195 reg_map[m1->regno] = m->set_dest;
2198 = gen_lowpart_common (GET_MODE (m1->set_dest),
2201 /* Get rid of the matching insn
2202 and prevent further processing of it. */
2205 /* if library call, delete all insn except last, which
2207 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2210 for (temp = XEXP (temp, 0); temp != m1->insn;
2211 temp = NEXT_INSN (temp))
2214 delete_insn (m1->insn);
2216 /* Any other movable that loads the same register
2218 already_moved[m1->regno] = 1;
2220 /* The reg merged here is now invariant,
2221 if the reg it matches is invariant. */
2223 VARRAY_INT (set_in_loop, m1->regno) = 0;
2226 else if (loop_dump_stream)
2227 fprintf (loop_dump_stream, "not desirable");
2229 else if (loop_dump_stream && !m->match)
2230 fprintf (loop_dump_stream, "not safe");
2232 if (loop_dump_stream)
2233 fprintf (loop_dump_stream, "\n");
2237 new_start = loop_start;
2239 /* Go through all the instructions in the loop, making
2240 all the register substitutions scheduled in REG_MAP. */
2241 for (p = new_start; p != end; p = NEXT_INSN (p))
2242 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2243 || GET_CODE (p) == CALL_INSN)
2245 replace_regs (PATTERN (p), reg_map, nregs, 0);
2246 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2252 free (already_moved);
2256 /* Scan X and replace the address of any MEM in it with ADDR.
2257 REG is the address that MEM should have before the replacement. */
2260 replace_call_address (x, reg, addr)
2263 register enum rtx_code code;
2265 register const char *fmt;
2269 code = GET_CODE (x);
2283 /* Short cut for very common case. */
2284 replace_call_address (XEXP (x, 1), reg, addr);
2288 /* Short cut for very common case. */
2289 replace_call_address (XEXP (x, 0), reg, addr);
2293 /* If this MEM uses a reg other than the one we expected,
2294 something is wrong. */
2295 if (XEXP (x, 0) != reg)
2304 fmt = GET_RTX_FORMAT (code);
2305 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2308 replace_call_address (XEXP (x, i), reg, addr);
2312 for (j = 0; j < XVECLEN (x, i); j++)
2313 replace_call_address (XVECEXP (x, i, j), reg, addr);
2319 /* Return the number of memory refs to addresses that vary
2323 count_nonfixed_reads (x)
2326 register enum rtx_code code;
2328 register const char *fmt;
2334 code = GET_CODE (x);
2348 return ((invariant_p (XEXP (x, 0)) != 1)
2349 + count_nonfixed_reads (XEXP (x, 0)));
2356 fmt = GET_RTX_FORMAT (code);
2357 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2360 value += count_nonfixed_reads (XEXP (x, i));
2364 for (j = 0; j < XVECLEN (x, i); j++)
2365 value += count_nonfixed_reads (XVECEXP (x, i, j));
2373 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2374 Replace it with an instruction to load just the low bytes
2375 if the machine supports such an instruction,
2376 and insert above LOOP_START an instruction to clear the register. */
2379 constant_high_bytes (p, loop_start)
2383 register int insn_code_number;
2385 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2386 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2391 gen_rtx_STRICT_LOW_PART
2393 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p)), 0)),
2394 SET_DEST (PATTERN (p)), 0)),
2395 XEXP (SET_SRC (PATTERN (p)), 0));
2397 insn_code_number = recog (new, p);
2399 if (insn_code_number)
2403 /* Clear destination register before the loop. */
2404 emit_insn_before (gen_rtx_SET (VOIDmode,
2405 SET_DEST (PATTERN (p)), const0_rtx),
2408 /* Inside the loop, just load the low part. */
2414 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2415 `has_call', `has_volatile', and `has_tablejump' within LOOP_INFO.
2416 Set the global variables `unknown_address_altered',
2417 `unknown_constant_address_altered', and `num_mem_sets'. Also, fill
2418 in the array `loop_mems' and the list `loop_store_mems'. */
2421 prescan_loop (start, end, loop_info)
2423 struct loop_info *loop_info;
2425 register int level = 1;
2427 /* The label after END. Jumping here is just like falling off the
2428 end of the loop. We use next_nonnote_insn instead of next_label
2429 as a hedge against the (pathological) case where some actual insn
2430 might end up between the two. */
2431 rtx exit_target = next_nonnote_insn (end);
2433 loop_info->num = uid_loop_num [INSN_UID (start)];
2434 loop_info->has_indirect_jump = indirect_jump_in_function;
2435 loop_info->has_call = 0;
2436 loop_info->has_volatile = 0;
2437 loop_info->has_tablejump = 0;
2438 loop_info->loops_enclosed = 1;
2439 loop_info->has_multiple_exit_targets = 0;
2440 loop_info->cont = 0;
2441 loop_info->vtop = 0;
2443 unknown_address_altered = 0;
2444 unknown_constant_address_altered = 0;
2445 loop_store_mems = NULL_RTX;
2446 first_loop_store_insn = NULL_RTX;
2450 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2451 insn = NEXT_INSN (insn))
2453 if (GET_CODE (insn) == NOTE)
2455 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2458 /* Count number of loops contained in this one. */
2459 loop_info->loops_enclosed++;
2461 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2470 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2473 loop_info->cont = insn;
2475 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP)
2477 /* If there is a NOTE_INSN_LOOP_VTOP, then this is a for
2478 or while style loop, with a loop exit test at the
2479 start. Thus, we can assume that the loop condition
2480 was true when the loop was entered. */
2482 loop_info->vtop = insn;
2485 else if (GET_CODE (insn) == CALL_INSN)
2487 if (! CONST_CALL_P (insn))
2488 unknown_address_altered = 1;
2489 loop_info->has_call = 1;
2491 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2493 rtx label1 = NULL_RTX;
2494 rtx label2 = NULL_RTX;
2496 if (volatile_refs_p (PATTERN (insn)))
2497 loop_info->has_volatile = 1;
2499 if (GET_CODE (insn) == JUMP_INSN
2500 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2501 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2502 loop_info->has_tablejump = 1;
2504 note_stores (PATTERN (insn), note_addr_stored, NULL);
2505 if (! first_loop_store_insn && loop_store_mems)
2506 first_loop_store_insn = insn;
2508 if (! loop_info->has_multiple_exit_targets
2509 && GET_CODE (insn) == JUMP_INSN
2510 && GET_CODE (PATTERN (insn)) == SET
2511 && SET_DEST (PATTERN (insn)) == pc_rtx)
2513 if (GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
2515 label1 = XEXP (SET_SRC (PATTERN (insn)), 1);
2516 label2 = XEXP (SET_SRC (PATTERN (insn)), 2);
2520 label1 = SET_SRC (PATTERN (insn));
2524 if (label1 && label1 != pc_rtx)
2526 if (GET_CODE (label1) != LABEL_REF)
2528 /* Something tricky. */
2529 loop_info->has_multiple_exit_targets = 1;
2532 else if (XEXP (label1, 0) != exit_target
2533 && LABEL_OUTSIDE_LOOP_P (label1))
2535 /* A jump outside the current loop. */
2536 loop_info->has_multiple_exit_targets = 1;
2546 else if (GET_CODE (insn) == RETURN)
2547 loop_info->has_multiple_exit_targets = 1;
2550 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2551 if (/* We can't tell what MEMs are aliased by what. */
2552 !unknown_address_altered
2553 /* An exception thrown by a called function might land us
2555 && !loop_info->has_call
2556 /* We don't want loads for MEMs moved to a location before the
2557 one at which their stack memory becomes allocated. (Note
2558 that this is not a problem for malloc, etc., since those
2559 require actual function calls. */
2560 && !current_function_calls_alloca
2561 /* There are ways to leave the loop other than falling off the
2563 && !loop_info->has_multiple_exit_targets)
2564 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2565 insn = NEXT_INSN (insn))
2566 for_each_rtx (&insn, insert_loop_mem, 0);
2569 /* LOOP_NUMBER_CONT_DOMINATOR is now the last label between the loop start
2570 and the continue note that is a the destination of a (cond)jump after
2571 the continue note. If there is any (cond)jump between the loop start
2572 and what we have so far as LOOP_NUMBER_CONT_DOMINATOR that has a
2573 target between LOOP_DOMINATOR and the continue note, move
2574 LOOP_NUMBER_CONT_DOMINATOR forward to that label; if a jump's
2575 destination cannot be determined, clear LOOP_NUMBER_CONT_DOMINATOR. */
2578 verify_dominator (loop_number)
2583 if (! loop_number_cont_dominator[loop_number])
2584 /* This can happen for an empty loop, e.g. in
2585 gcc.c-torture/compile/920410-2.c */
2587 if (loop_number_cont_dominator[loop_number] == const0_rtx)
2589 loop_number_cont_dominator[loop_number] = 0;
2592 for (insn = loop_number_loop_starts[loop_number];
2593 insn != loop_number_cont_dominator[loop_number];
2594 insn = NEXT_INSN (insn))
2596 if (GET_CODE (insn) == JUMP_INSN
2597 && GET_CODE (PATTERN (insn)) != RETURN)
2599 rtx label = JUMP_LABEL (insn);
2602 /* If it is not a jump we can easily understand or for
2603 which we do not have jump target information in the JUMP_LABEL
2604 field (consider ADDR_VEC and ADDR_DIFF_VEC insns), then clear
2605 LOOP_NUMBER_CONT_DOMINATOR. */
2606 if ((! condjump_p (insn)
2607 && ! condjump_in_parallel_p (insn))
2608 || label == NULL_RTX)
2610 loop_number_cont_dominator[loop_number] = NULL_RTX;
2614 label_luid = INSN_LUID (label);
2615 if (label_luid < INSN_LUID (loop_number_loop_cont[loop_number])
2617 > INSN_LUID (loop_number_cont_dominator[loop_number])))
2618 loop_number_cont_dominator[loop_number] = label;
2623 /* Scan the function looking for loops. Record the start and end of each loop.
2624 Also mark as invalid loops any loops that contain a setjmp or are branched
2625 to from outside the loop. */
2628 find_and_verify_loops (f)
2632 int current_loop = -1;
2636 compute_luids (f, NULL_RTX, 0);
2638 /* If there are jumps to undefined labels,
2639 treat them as jumps out of any/all loops.
2640 This also avoids writing past end of tables when there are no loops. */
2641 uid_loop_num[0] = -1;
2643 /* Find boundaries of loops, mark which loops are contained within
2644 loops, and invalidate loops that have setjmp. */
2646 for (insn = f; insn; insn = NEXT_INSN (insn))
2648 if (GET_CODE (insn) == NOTE)
2649 switch (NOTE_LINE_NUMBER (insn))
2651 case NOTE_INSN_LOOP_BEG:
2652 loop_number_loop_starts[++next_loop] = insn;
2653 loop_number_loop_ends[next_loop] = 0;
2654 loop_number_loop_cont[next_loop] = 0;
2655 loop_number_cont_dominator[next_loop] = 0;
2656 loop_outer_loop[next_loop] = current_loop;
2657 loop_invalid[next_loop] = 0;
2658 loop_number_exit_labels[next_loop] = 0;
2659 loop_number_exit_count[next_loop] = 0;
2660 current_loop = next_loop;
2663 case NOTE_INSN_SETJMP:
2664 /* In this case, we must invalidate our current loop and any
2666 for (loop = current_loop; loop != -1; loop = loop_outer_loop[loop])
2668 loop_invalid[loop] = 1;
2669 if (loop_dump_stream)
2670 fprintf (loop_dump_stream,
2671 "\nLoop at %d ignored due to setjmp.\n",
2672 INSN_UID (loop_number_loop_starts[loop]));
2676 case NOTE_INSN_LOOP_CONT:
2677 loop_number_loop_cont[current_loop] = insn;
2679 case NOTE_INSN_LOOP_END:
2680 if (current_loop == -1)
2683 loop_number_loop_ends[current_loop] = insn;
2684 verify_dominator (current_loop);
2685 current_loop = loop_outer_loop[current_loop];
2691 /* If for any loop, this is a jump insn between the NOTE_INSN_LOOP_CONT
2692 and NOTE_INSN_LOOP_END notes, update loop_number_loop_dominator. */
2693 else if (GET_CODE (insn) == JUMP_INSN
2694 && GET_CODE (PATTERN (insn)) != RETURN
2695 && current_loop >= 0)
2698 rtx label = JUMP_LABEL (insn);
2700 if (! condjump_p (insn) && ! condjump_in_parallel_p (insn))
2703 this_loop_num = current_loop;
2706 /* First see if we care about this loop. */
2707 if (loop_number_loop_cont[this_loop_num]
2708 && loop_number_cont_dominator[this_loop_num] != const0_rtx)
2710 /* If the jump destination is not known, invalidate
2711 loop_number_const_dominator. */
2713 loop_number_cont_dominator[this_loop_num] = const0_rtx;
2715 /* Check if the destination is between loop start and
2717 if ((INSN_LUID (label)
2718 < INSN_LUID (loop_number_loop_cont[this_loop_num]))
2719 && (INSN_LUID (label)
2720 > INSN_LUID (loop_number_loop_starts[this_loop_num]))
2721 /* And if there is no later destination already
2723 && (! loop_number_cont_dominator[this_loop_num]
2724 || (INSN_LUID (label)
2725 > INSN_LUID (loop_number_cont_dominator
2727 loop_number_cont_dominator[this_loop_num] = label;
2729 this_loop_num = loop_outer_loop[this_loop_num];
2731 while (this_loop_num >= 0);
2734 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2735 enclosing loop, but this doesn't matter. */
2736 uid_loop_num[INSN_UID (insn)] = current_loop;
2739 /* Any loop containing a label used in an initializer must be invalidated,
2740 because it can be jumped into from anywhere. */
2742 for (label = forced_labels; label; label = XEXP (label, 1))
2746 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2748 loop_num = loop_outer_loop[loop_num])
2749 loop_invalid[loop_num] = 1;
2752 /* Any loop containing a label used for an exception handler must be
2753 invalidated, because it can be jumped into from anywhere. */
2755 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2759 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2761 loop_num = loop_outer_loop[loop_num])
2762 loop_invalid[loop_num] = 1;
2765 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2766 loop that it is not contained within, that loop is marked invalid.
2767 If any INSN or CALL_INSN uses a label's address, then the loop containing
2768 that label is marked invalid, because it could be jumped into from
2771 Also look for blocks of code ending in an unconditional branch that
2772 exits the loop. If such a block is surrounded by a conditional
2773 branch around the block, move the block elsewhere (see below) and
2774 invert the jump to point to the code block. This may eliminate a
2775 label in our loop and will simplify processing by both us and a
2776 possible second cse pass. */
2778 for (insn = f; insn; insn = NEXT_INSN (insn))
2779 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2781 int this_loop_num = uid_loop_num[INSN_UID (insn)];
2783 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2785 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2790 for (loop_num = uid_loop_num[INSN_UID (XEXP (note, 0))];
2792 loop_num = loop_outer_loop[loop_num])
2793 loop_invalid[loop_num] = 1;
2797 if (GET_CODE (insn) != JUMP_INSN)
2800 mark_loop_jump (PATTERN (insn), this_loop_num);
2802 /* See if this is an unconditional branch outside the loop. */
2803 if (this_loop_num != -1
2804 && (GET_CODE (PATTERN (insn)) == RETURN
2805 || (simplejump_p (insn)
2806 && (uid_loop_num[INSN_UID (JUMP_LABEL (insn))]
2808 && get_max_uid () < max_uid_for_loop)
2811 rtx our_next = next_real_insn (insn);
2812 rtx last_insn_to_move = NEXT_INSN (insn);
2814 int outer_loop = -1;
2816 /* Go backwards until we reach the start of the loop, a label,
2818 for (p = PREV_INSN (insn);
2819 GET_CODE (p) != CODE_LABEL
2820 && ! (GET_CODE (p) == NOTE
2821 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2822 && GET_CODE (p) != JUMP_INSN;
2826 /* Check for the case where we have a jump to an inner nested
2827 loop, and do not perform the optimization in that case. */
2829 if (JUMP_LABEL (insn))
2831 dest_loop = uid_loop_num[INSN_UID (JUMP_LABEL (insn))];
2832 if (dest_loop != -1)
2834 for (outer_loop = dest_loop; outer_loop != -1;
2835 outer_loop = loop_outer_loop[outer_loop])
2836 if (outer_loop == this_loop_num)
2841 /* Make sure that the target of P is within the current loop. */
2843 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2844 && uid_loop_num[INSN_UID (JUMP_LABEL (p))] != this_loop_num)
2845 outer_loop = this_loop_num;
2847 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2848 we have a block of code to try to move.
2850 We look backward and then forward from the target of INSN
2851 to find a BARRIER at the same loop depth as the target.
2852 If we find such a BARRIER, we make a new label for the start
2853 of the block, invert the jump in P and point it to that label,
2854 and move the block of code to the spot we found. */
2856 if (outer_loop == -1
2857 && GET_CODE (p) == JUMP_INSN
2858 && JUMP_LABEL (p) != 0
2859 /* Just ignore jumps to labels that were never emitted.
2860 These always indicate compilation errors. */
2861 && INSN_UID (JUMP_LABEL (p)) != 0
2863 && ! simplejump_p (p)
2864 && next_real_insn (JUMP_LABEL (p)) == our_next
2865 /* If it's not safe to move the sequence, then we
2867 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2868 &last_insn_to_move))
2871 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2872 int target_loop_num = uid_loop_num[INSN_UID (target)];
2875 for (loc = target; loc; loc = PREV_INSN (loc))
2876 if (GET_CODE (loc) == BARRIER
2877 /* Don't move things inside a tablejump. */
2878 && ((loc2 = next_nonnote_insn (loc)) == 0
2879 || GET_CODE (loc2) != CODE_LABEL
2880 || (loc2 = next_nonnote_insn (loc2)) == 0
2881 || GET_CODE (loc2) != JUMP_INSN
2882 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2883 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2884 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2888 for (loc = target; loc; loc = NEXT_INSN (loc))
2889 if (GET_CODE (loc) == BARRIER
2890 /* Don't move things inside a tablejump. */
2891 && ((loc2 = next_nonnote_insn (loc)) == 0
2892 || GET_CODE (loc2) != CODE_LABEL
2893 || (loc2 = next_nonnote_insn (loc2)) == 0
2894 || GET_CODE (loc2) != JUMP_INSN
2895 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2896 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2897 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2902 rtx cond_label = JUMP_LABEL (p);
2903 rtx new_label = get_label_after (p);
2905 /* Ensure our label doesn't go away. */
2906 LABEL_NUSES (cond_label)++;
2908 /* Verify that uid_loop_num is large enough and that
2910 if (invert_jump (p, new_label))
2914 /* If no suitable BARRIER was found, create a suitable
2915 one before TARGET. Since TARGET is a fall through
2916 path, we'll need to insert an jump around our block
2917 and a add a BARRIER before TARGET.
2919 This creates an extra unconditional jump outside
2920 the loop. However, the benefits of removing rarely
2921 executed instructions from inside the loop usually
2922 outweighs the cost of the extra unconditional jump
2923 outside the loop. */
2928 temp = gen_jump (JUMP_LABEL (insn));
2929 temp = emit_jump_insn_before (temp, target);
2930 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2931 LABEL_NUSES (JUMP_LABEL (insn))++;
2932 loc = emit_barrier_before (target);
2935 /* Include the BARRIER after INSN and copy the
2937 new_label = squeeze_notes (new_label,
2939 reorder_insns (new_label, last_insn_to_move, loc);
2941 /* All those insns are now in TARGET_LOOP_NUM. */
2943 q != NEXT_INSN (last_insn_to_move);
2945 uid_loop_num[INSN_UID (q)] = target_loop_num;
2947 /* The label jumped to by INSN is no longer a loop exit.
2948 Unless INSN does not have a label (e.g., it is a
2949 RETURN insn), search loop_number_exit_labels to find
2950 its label_ref, and remove it. Also turn off
2951 LABEL_OUTSIDE_LOOP_P bit. */
2952 if (JUMP_LABEL (insn))
2957 r = loop_number_exit_labels[this_loop_num];
2958 r; q = r, r = LABEL_NEXTREF (r))
2959 if (XEXP (r, 0) == JUMP_LABEL (insn))
2961 LABEL_OUTSIDE_LOOP_P (r) = 0;
2963 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2965 loop_number_exit_labels[this_loop_num]
2966 = LABEL_NEXTREF (r);
2970 for (loop_num = this_loop_num;
2971 loop_num != -1 && loop_num != target_loop_num;
2972 loop_num = loop_outer_loop[loop_num])
2973 loop_number_exit_count[loop_num]--;
2975 /* If we didn't find it, then something is wrong. */
2980 /* P is now a jump outside the loop, so it must be put
2981 in loop_number_exit_labels, and marked as such.
2982 The easiest way to do this is to just call
2983 mark_loop_jump again for P. */
2984 mark_loop_jump (PATTERN (p), this_loop_num);
2986 /* If INSN now jumps to the insn after it,
2988 if (JUMP_LABEL (insn) != 0
2989 && (next_real_insn (JUMP_LABEL (insn))
2990 == next_real_insn (insn)))
2994 /* Continue the loop after where the conditional
2995 branch used to jump, since the only branch insn
2996 in the block (if it still remains) is an inter-loop
2997 branch and hence needs no processing. */
2998 insn = NEXT_INSN (cond_label);
3000 if (--LABEL_NUSES (cond_label) == 0)
3001 delete_insn (cond_label);
3003 /* This loop will be continued with NEXT_INSN (insn). */
3004 insn = PREV_INSN (insn);
3011 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
3012 loops it is contained in, mark the target loop invalid.
3014 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
3017 mark_loop_jump (x, loop_num)
3025 switch (GET_CODE (x))
3038 /* There could be a label reference in here. */
3039 mark_loop_jump (XEXP (x, 0), loop_num);
3045 mark_loop_jump (XEXP (x, 0), loop_num);
3046 mark_loop_jump (XEXP (x, 1), loop_num);
3050 /* This may refer to a LABEL_REF or SYMBOL_REF. */
3051 mark_loop_jump (XEXP (x, 1), loop_num);
3056 mark_loop_jump (XEXP (x, 0), loop_num);
3060 dest_loop = uid_loop_num[INSN_UID (XEXP (x, 0))];
3062 /* Link together all labels that branch outside the loop. This
3063 is used by final_[bg]iv_value and the loop unrolling code. Also
3064 mark this LABEL_REF so we know that this branch should predict
3067 /* A check to make sure the label is not in an inner nested loop,
3068 since this does not count as a loop exit. */
3069 if (dest_loop != -1)
3071 for (outer_loop = dest_loop; outer_loop != -1;
3072 outer_loop = loop_outer_loop[outer_loop])
3073 if (outer_loop == loop_num)
3079 if (loop_num != -1 && outer_loop == -1)
3081 LABEL_OUTSIDE_LOOP_P (x) = 1;
3082 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
3083 loop_number_exit_labels[loop_num] = x;
3085 for (outer_loop = loop_num;
3086 outer_loop != -1 && outer_loop != dest_loop;
3087 outer_loop = loop_outer_loop[outer_loop])
3088 loop_number_exit_count[outer_loop]++;
3091 /* If this is inside a loop, but not in the current loop or one enclosed
3092 by it, it invalidates at least one loop. */
3094 if (dest_loop == -1)
3097 /* We must invalidate every nested loop containing the target of this
3098 label, except those that also contain the jump insn. */
3100 for (; dest_loop != -1; dest_loop = loop_outer_loop[dest_loop])
3102 /* Stop when we reach a loop that also contains the jump insn. */
3103 for (outer_loop = loop_num; outer_loop != -1;
3104 outer_loop = loop_outer_loop[outer_loop])
3105 if (dest_loop == outer_loop)
3108 /* If we get here, we know we need to invalidate a loop. */
3109 if (loop_dump_stream && ! loop_invalid[dest_loop])
3110 fprintf (loop_dump_stream,
3111 "\nLoop at %d ignored due to multiple entry points.\n",
3112 INSN_UID (loop_number_loop_starts[dest_loop]));
3114 loop_invalid[dest_loop] = 1;
3119 /* If this is not setting pc, ignore. */
3120 if (SET_DEST (x) == pc_rtx)
3121 mark_loop_jump (SET_SRC (x), loop_num);
3125 mark_loop_jump (XEXP (x, 1), loop_num);
3126 mark_loop_jump (XEXP (x, 2), loop_num);
3131 for (i = 0; i < XVECLEN (x, 0); i++)
3132 mark_loop_jump (XVECEXP (x, 0, i), loop_num);
3136 for (i = 0; i < XVECLEN (x, 1); i++)
3137 mark_loop_jump (XVECEXP (x, 1, i), loop_num);
3141 /* Strictly speaking this is not a jump into the loop, only a possible
3142 jump out of the loop. However, we have no way to link the destination
3143 of this jump onto the list of exit labels. To be safe we mark this
3144 loop and any containing loops as invalid. */
3147 for (outer_loop = loop_num; outer_loop != -1;
3148 outer_loop = loop_outer_loop[outer_loop])
3150 if (loop_dump_stream && ! loop_invalid[outer_loop])
3151 fprintf (loop_dump_stream,
3152 "\nLoop at %d ignored due to unknown exit jump.\n",
3153 INSN_UID (loop_number_loop_starts[outer_loop]));
3154 loop_invalid[outer_loop] = 1;
3161 /* Return nonzero if there is a label in the range from
3162 insn INSN to and including the insn whose luid is END
3163 INSN must have an assigned luid (i.e., it must not have
3164 been previously created by loop.c). */
3167 labels_in_range_p (insn, end)
3171 while (insn && INSN_LUID (insn) <= end)
3173 if (GET_CODE (insn) == CODE_LABEL)
3175 insn = NEXT_INSN (insn);
3181 /* Record that a memory reference X is being set. */
3184 note_addr_stored (x, y, data)
3186 rtx y ATTRIBUTE_UNUSED;
3187 void *data ATTRIBUTE_UNUSED;
3189 if (x == 0 || GET_CODE (x) != MEM)
3192 /* Count number of memory writes.
3193 This affects heuristics in strength_reduce. */
3196 /* BLKmode MEM means all memory is clobbered. */
3197 if (GET_MODE (x) == BLKmode)
3199 if (RTX_UNCHANGING_P (x))
3200 unknown_constant_address_altered = 1;
3202 unknown_address_altered = 1;
3207 loop_store_mems = gen_rtx_EXPR_LIST (VOIDmode, x, loop_store_mems);
3210 /* X is a value modified by an INSN that references a biv inside a loop
3211 exit test (ie, X is somehow related to the value of the biv). If X
3212 is a pseudo that is used more than once, then the biv is (effectively)
3213 used more than once. DATA is really an `int *', and is set if the
3214 biv is used more than once. */
3217 note_set_pseudo_multiple_uses (x, y, data)
3219 rtx y ATTRIBUTE_UNUSED;
3225 while (GET_CODE (x) == STRICT_LOW_PART
3226 || GET_CODE (x) == SIGN_EXTRACT
3227 || GET_CODE (x) == ZERO_EXTRACT
3228 || GET_CODE (x) == SUBREG)
3231 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
3234 /* If we do not have usage information, or if we know the register
3235 is used more than once, note that fact for check_dbra_loop. */
3236 if (REGNO (x) >= max_reg_before_loop
3237 || ! VARRAY_RTX (reg_single_usage, REGNO (x))
3238 || VARRAY_RTX (reg_single_usage, REGNO (x)) == const0_rtx)
3239 *((int *) data) = 1;
3242 /* Return nonzero if the rtx X is invariant over the current loop.
3244 The value is 2 if we refer to something only conditionally invariant.
3246 If `unknown_address_altered' is nonzero, no memory ref is invariant.
3247 Otherwise, a memory ref is invariant if it does not conflict with
3248 anything stored in `loop_store_mems'. */
3255 register enum rtx_code code;
3256 register const char *fmt;
3257 int conditional = 0;
3262 code = GET_CODE (x);
3272 /* A LABEL_REF is normally invariant, however, if we are unrolling
3273 loops, and this label is inside the loop, then it isn't invariant.
3274 This is because each unrolled copy of the loop body will have
3275 a copy of this label. If this was invariant, then an insn loading
3276 the address of this label into a register might get moved outside
3277 the loop, and then each loop body would end up using the same label.
3279 We don't know the loop bounds here though, so just fail for all
3281 if (flag_unroll_loops)
3288 case UNSPEC_VOLATILE:
3292 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3293 since the reg might be set by initialization within the loop. */
3295 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3296 || x == arg_pointer_rtx)
3297 && ! current_function_has_nonlocal_goto)
3300 if (this_loop_info.has_call
3301 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3304 if (VARRAY_INT (set_in_loop, REGNO (x)) < 0)
3307 return VARRAY_INT (set_in_loop, REGNO (x)) == 0;
3310 /* Volatile memory references must be rejected. Do this before
3311 checking for read-only items, so that volatile read-only items
3312 will be rejected also. */
3313 if (MEM_VOLATILE_P (x))
3316 /* If we had a subroutine call, any location in memory could
3317 have been clobbered. We used to test here for volatile and
3318 readonly, but true_dependence knows how to do that better
3320 if (RTX_UNCHANGING_P (x)
3321 ? unknown_constant_address_altered : unknown_address_altered)
3324 /* See if there is any dependence between a store and this load. */
3325 mem_list_entry = loop_store_mems;
3326 while (mem_list_entry)
3328 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3332 mem_list_entry = XEXP (mem_list_entry, 1);
3335 /* It's not invalidated by a store in memory
3336 but we must still verify the address is invariant. */
3340 /* Don't mess with insns declared volatile. */
3341 if (MEM_VOLATILE_P (x))
3349 fmt = GET_RTX_FORMAT (code);
3350 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3354 int tem = invariant_p (XEXP (x, i));
3360 else if (fmt[i] == 'E')
3363 for (j = 0; j < XVECLEN (x, i); j++)
3365 int tem = invariant_p (XVECEXP (x, i, j));
3375 return 1 + conditional;
3379 /* Return nonzero if all the insns in the loop that set REG
3380 are INSN and the immediately following insns,
3381 and if each of those insns sets REG in an invariant way
3382 (not counting uses of REG in them).
3384 The value is 2 if some of these insns are only conditionally invariant.
3386 We assume that INSN itself is the first set of REG
3387 and that its source is invariant. */
3390 consec_sets_invariant_p (reg, n_sets, insn)
3394 register rtx p = insn;
3395 register int regno = REGNO (reg);
3397 /* Number of sets we have to insist on finding after INSN. */
3398 int count = n_sets - 1;
3399 int old = VARRAY_INT (set_in_loop, regno);
3403 /* If N_SETS hit the limit, we can't rely on its value. */
3407 VARRAY_INT (set_in_loop, regno) = 0;
3411 register enum rtx_code code;
3415 code = GET_CODE (p);
3417 /* If library call, skip to end of it. */
3418 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3423 && (set = single_set (p))
3424 && GET_CODE (SET_DEST (set)) == REG
3425 && REGNO (SET_DEST (set)) == regno)
3427 this = invariant_p (SET_SRC (set));
3430 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3432 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3433 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3435 this = (CONSTANT_P (XEXP (temp, 0))
3436 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3437 && invariant_p (XEXP (temp, 0))));
3444 else if (code != NOTE)
3446 VARRAY_INT (set_in_loop, regno) = old;
3451 VARRAY_INT (set_in_loop, regno) = old;
3452 /* If invariant_p ever returned 2, we return 2. */
3453 return 1 + (value & 2);
3457 /* I don't think this condition is sufficient to allow INSN
3458 to be moved, so we no longer test it. */
3460 /* Return 1 if all insns in the basic block of INSN and following INSN
3461 that set REG are invariant according to TABLE. */
3464 all_sets_invariant_p (reg, insn, table)
3468 register rtx p = insn;
3469 register int regno = REGNO (reg);
3473 register enum rtx_code code;
3475 code = GET_CODE (p);
3476 if (code == CODE_LABEL || code == JUMP_INSN)
3478 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3479 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3480 && REGNO (SET_DEST (PATTERN (p))) == regno)
3482 if (!invariant_p (SET_SRC (PATTERN (p)), table))
3489 /* Look at all uses (not sets) of registers in X. For each, if it is
3490 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3491 a different insn, set USAGE[REGNO] to const0_rtx. */
3494 find_single_use_in_loop (insn, x, usage)
3499 enum rtx_code code = GET_CODE (x);
3500 const char *fmt = GET_RTX_FORMAT (code);
3504 VARRAY_RTX (usage, REGNO (x))
3505 = (VARRAY_RTX (usage, REGNO (x)) != 0
3506 && VARRAY_RTX (usage, REGNO (x)) != insn)
3507 ? const0_rtx : insn;
3509 else if (code == SET)
3511 /* Don't count SET_DEST if it is a REG; otherwise count things
3512 in SET_DEST because if a register is partially modified, it won't
3513 show up as a potential movable so we don't care how USAGE is set
3515 if (GET_CODE (SET_DEST (x)) != REG)
3516 find_single_use_in_loop (insn, SET_DEST (x), usage);
3517 find_single_use_in_loop (insn, SET_SRC (x), usage);
3520 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3522 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3523 find_single_use_in_loop (insn, XEXP (x, i), usage);
3524 else if (fmt[i] == 'E')
3525 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3526 find_single_use_in_loop (insn, XVECEXP (x, i, j), usage);
3530 /* Count and record any set in X which is contained in INSN. Update
3531 MAY_NOT_MOVE and LAST_SET for any register set in X. */
3534 count_one_set (insn, x, may_not_move, last_set)
3536 varray_type may_not_move;
3539 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3540 /* Don't move a reg that has an explicit clobber.
3541 It's not worth the pain to try to do it correctly. */
3542 VARRAY_CHAR (may_not_move, REGNO (XEXP (x, 0))) = 1;
3544 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3546 rtx dest = SET_DEST (x);
3547 while (GET_CODE (dest) == SUBREG
3548 || GET_CODE (dest) == ZERO_EXTRACT
3549 || GET_CODE (dest) == SIGN_EXTRACT
3550 || GET_CODE (dest) == STRICT_LOW_PART)
3551 dest = XEXP (dest, 0);
3552 if (GET_CODE (dest) == REG)
3554 register int regno = REGNO (dest);
3555 /* If this is the first setting of this reg
3556 in current basic block, and it was set before,
3557 it must be set in two basic blocks, so it cannot
3558 be moved out of the loop. */
3559 if (VARRAY_INT (set_in_loop, regno) > 0
3560 && last_set[regno] == 0)
3561 VARRAY_CHAR (may_not_move, regno) = 1;
3562 /* If this is not first setting in current basic block,
3563 see if reg was used in between previous one and this.
3564 If so, neither one can be moved. */
3565 if (last_set[regno] != 0
3566 && reg_used_between_p (dest, last_set[regno], insn))
3567 VARRAY_CHAR (may_not_move, regno) = 1;
3568 if (VARRAY_INT (set_in_loop, regno) < 127)
3569 ++VARRAY_INT (set_in_loop, regno);
3570 last_set[regno] = insn;
3575 /* Increment SET_IN_LOOP at the index of each register
3576 that is modified by an insn between FROM and TO.
3577 If the value of an element of SET_IN_LOOP becomes 127 or more,
3578 stop incrementing it, to avoid overflow.
3580 Store in SINGLE_USAGE[I] the single insn in which register I is
3581 used, if it is only used once. Otherwise, it is set to 0 (for no
3582 uses) or const0_rtx for more than one use. This parameter may be zero,
3583 in which case this processing is not done.
3585 Store in *COUNT_PTR the number of actual instruction
3586 in the loop. We use this to decide what is worth moving out. */
3588 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3589 In that case, it is the insn that last set reg n. */
3592 count_loop_regs_set (from, to, may_not_move, single_usage, count_ptr, nregs)
3593 register rtx from, to;
3594 varray_type may_not_move;
3595 varray_type single_usage;
3599 register rtx *last_set = (rtx *) xcalloc (nregs, sizeof (rtx));
3601 register int count = 0;
3603 for (insn = from; insn != to; insn = NEXT_INSN (insn))
3605 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
3609 /* Record registers that have exactly one use. */
3610 find_single_use_in_loop (insn, PATTERN (insn), single_usage);
3612 /* Include uses in REG_EQUAL notes. */
3613 if (REG_NOTES (insn))
3614 find_single_use_in_loop (insn, REG_NOTES (insn), single_usage);
3616 if (GET_CODE (PATTERN (insn)) == SET
3617 || GET_CODE (PATTERN (insn)) == CLOBBER)
3618 count_one_set (insn, PATTERN (insn), may_not_move, last_set);
3619 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3622 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
3623 count_one_set (insn, XVECEXP (PATTERN (insn), 0, i),
3624 may_not_move, last_set);
3628 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3629 bzero ((char *) last_set, nregs * sizeof (rtx));
3637 /* Given a loop that is bounded by LOOP_START and LOOP_END
3638 and that is entered at SCAN_START,
3639 return 1 if the register set in SET contained in insn INSN is used by
3640 any insn that precedes INSN in cyclic order starting
3641 from the loop entry point.
3643 We don't want to use INSN_LUID here because if we restrict INSN to those
3644 that have a valid INSN_LUID, it means we cannot move an invariant out
3645 from an inner loop past two loops. */
3648 loop_reg_used_before_p (set, insn, loop_start, scan_start, loop_end)
3649 rtx set, insn, loop_start, scan_start, loop_end;
3651 rtx reg = SET_DEST (set);
3654 /* Scan forward checking for register usage. If we hit INSN, we
3655 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3656 for (p = scan_start; p != insn; p = NEXT_INSN (p))
3658 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
3659 && reg_overlap_mentioned_p (reg, PATTERN (p)))
3669 /* A "basic induction variable" or biv is a pseudo reg that is set
3670 (within this loop) only by incrementing or decrementing it. */
3671 /* A "general induction variable" or giv is a pseudo reg whose
3672 value is a linear function of a biv. */
3674 /* Bivs are recognized by `basic_induction_var';
3675 Givs by `general_induction_var'. */
3677 /* Indexed by register number, indicates whether or not register is an
3678 induction variable, and if so what type. */
3680 varray_type reg_iv_type;
3682 /* Indexed by register number, contains pointer to `struct induction'
3683 if register is an induction variable. This holds general info for
3684 all induction variables. */
3686 varray_type reg_iv_info;
3688 /* Indexed by register number, contains pointer to `struct iv_class'
3689 if register is a basic induction variable. This holds info describing
3690 the class (a related group) of induction variables that the biv belongs
3693 struct iv_class **reg_biv_class;
3695 /* The head of a list which links together (via the next field)
3696 every iv class for the current loop. */
3698 struct iv_class *loop_iv_list;
3700 /* Givs made from biv increments are always splittable for loop unrolling.
3701 Since there is no regscan info for them, we have to keep track of them
3703 int first_increment_giv, last_increment_giv;
3705 /* Communication with routines called via `note_stores'. */
3707 static rtx note_insn;
3709 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3711 static rtx addr_placeholder;
3713 /* ??? Unfinished optimizations, and possible future optimizations,
3714 for the strength reduction code. */
3716 /* ??? The interaction of biv elimination, and recognition of 'constant'
3717 bivs, may cause problems. */
3719 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3720 performance problems.
3722 Perhaps don't eliminate things that can be combined with an addressing
3723 mode. Find all givs that have the same biv, mult_val, and add_val;
3724 then for each giv, check to see if its only use dies in a following
3725 memory address. If so, generate a new memory address and check to see
3726 if it is valid. If it is valid, then store the modified memory address,
3727 otherwise, mark the giv as not done so that it will get its own iv. */
3729 /* ??? Could try to optimize branches when it is known that a biv is always
3732 /* ??? When replace a biv in a compare insn, we should replace with closest
3733 giv so that an optimized branch can still be recognized by the combiner,
3734 e.g. the VAX acb insn. */
3736 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3737 was rerun in loop_optimize whenever a register was added or moved.
3738 Also, some of the optimizations could be a little less conservative. */
3740 /* Perform strength reduction and induction variable elimination.
3742 Pseudo registers created during this function will be beyond the last
3743 valid index in several tables including n_times_set and regno_last_uid.
3744 This does not cause a problem here, because the added registers cannot be
3745 givs outside of their loop, and hence will never be reconsidered.
3746 But scan_loop must check regnos to make sure they are in bounds.
3748 SCAN_START is the first instruction in the loop, as the loop would
3749 actually be executed. END is the NOTE_INSN_LOOP_END. LOOP_TOP is
3750 the first instruction in the loop, as it is layed out in the
3751 instruction stream. LOOP_START is the NOTE_INSN_LOOP_BEG.
3752 LOOP_CONT is the NOTE_INSN_LOOP_CONT. */
3755 strength_reduce (scan_start, end, loop_top, insn_count,
3756 loop_start, loop_end, loop_info, loop_cont, unroll_p, bct_p)
3763 struct loop_info *loop_info;
3765 int unroll_p, bct_p ATTRIBUTE_UNUSED;
3773 /* This is 1 if current insn is not executed at least once for every loop
3775 int not_every_iteration = 0;
3776 /* This is 1 if current insn may be executed more than once for every
3778 int maybe_multiple = 0;
3779 /* This is 1 if we have past a branch back to the top of the loop
3780 (aka a loop latch). */
3781 int past_loop_latch = 0;
3782 /* Temporary list pointers for traversing loop_iv_list. */
3783 struct iv_class *bl, **backbl;
3784 /* Ratio of extra register life span we can justify
3785 for saving an instruction. More if loop doesn't call subroutines
3786 since in that case saving an insn makes more difference
3787 and more registers are available. */
3788 /* ??? could set this to last value of threshold in move_movables */
3789 int threshold = (loop_info->has_call ? 1 : 2) * (3 + n_non_fixed_regs);
3790 /* Map of pseudo-register replacements. */
3791 rtx *reg_map = NULL;
3795 rtx end_insert_before;
3797 int n_extra_increment;
3798 int unrolled_insn_copies = 0;
3800 /* If scan_start points to the loop exit test, we have to be wary of
3801 subversive use of gotos inside expression statements. */
3802 if (prev_nonnote_insn (scan_start) != prev_nonnote_insn (loop_start))
3803 maybe_multiple = back_branch_in_range_p (scan_start, loop_start, loop_end);
3805 VARRAY_INT_INIT (reg_iv_type, max_reg_before_loop, "reg_iv_type");
3806 VARRAY_GENERIC_PTR_INIT (reg_iv_info, max_reg_before_loop, "reg_iv_info");
3807 reg_biv_class = (struct iv_class **)
3808 xcalloc (max_reg_before_loop, sizeof (struct iv_class *));
3811 addr_placeholder = gen_reg_rtx (Pmode);
3813 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3814 must be put before this insn, so that they will appear in the right
3815 order (i.e. loop order).
3817 If loop_end is the end of the current function, then emit a
3818 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3820 if (NEXT_INSN (loop_end) != 0)
3821 end_insert_before = NEXT_INSN (loop_end);
3823 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop_end);
3825 /* Scan through loop to find all possible bivs. */
3827 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
3829 p = next_insn_in_loop (p, scan_start, end, loop_top))
3831 if (GET_CODE (p) == INSN
3832 && (set = single_set (p))
3833 && GET_CODE (SET_DEST (set)) == REG)
3835 dest_reg = SET_DEST (set);
3836 if (REGNO (dest_reg) < max_reg_before_loop
3837 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
3838 && REG_IV_TYPE (REGNO (dest_reg)) != NOT_BASIC_INDUCT)
3840 if (basic_induction_var (SET_SRC (set), GET_MODE (SET_SRC (set)),
3841 dest_reg, p, &inc_val, &mult_val,
3844 /* It is a possible basic induction variable.
3845 Create and initialize an induction structure for it. */
3848 = (struct induction *) alloca (sizeof (struct induction));
3850 record_biv (v, p, dest_reg, inc_val, mult_val, location,
3851 not_every_iteration, maybe_multiple);
3852 REG_IV_TYPE (REGNO (dest_reg)) = BASIC_INDUCT;
3854 else if (REGNO (dest_reg) < max_reg_before_loop)
3855 REG_IV_TYPE (REGNO (dest_reg)) = NOT_BASIC_INDUCT;
3859 /* Past CODE_LABEL, we get to insns that may be executed multiple
3860 times. The only way we can be sure that they can't is if every
3861 jump insn between here and the end of the loop either
3862 returns, exits the loop, is a jump to a location that is still
3863 behind the label, or is a jump to the loop start. */
3865 if (GET_CODE (p) == CODE_LABEL)
3873 insn = NEXT_INSN (insn);
3874 if (insn == scan_start)
3882 if (insn == scan_start)
3886 if (GET_CODE (insn) == JUMP_INSN
3887 && GET_CODE (PATTERN (insn)) != RETURN
3888 && (! condjump_p (insn)
3889 || (JUMP_LABEL (insn) != 0
3890 && JUMP_LABEL (insn) != scan_start
3891 && ! loop_insn_first_p (p, JUMP_LABEL (insn)))))
3899 /* Past a jump, we get to insns for which we can't count
3900 on whether they will be executed during each iteration. */
3901 /* This code appears twice in strength_reduce. There is also similar
3902 code in scan_loop. */
3903 if (GET_CODE (p) == JUMP_INSN
3904 /* If we enter the loop in the middle, and scan around to the
3905 beginning, don't set not_every_iteration for that.
3906 This can be any kind of jump, since we want to know if insns
3907 will be executed if the loop is executed. */
3908 && ! (JUMP_LABEL (p) == loop_top
3909 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3910 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
3914 /* If this is a jump outside the loop, then it also doesn't
3915 matter. Check to see if the target of this branch is on the
3916 loop_number_exits_labels list. */
3918 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
3920 label = LABEL_NEXTREF (label))
3921 if (XEXP (label, 0) == JUMP_LABEL (p))
3925 not_every_iteration = 1;
3928 else if (GET_CODE (p) == NOTE)
3930 /* At the virtual top of a converted loop, insns are again known to
3931 be executed each iteration: logically, the loop begins here
3932 even though the exit code has been duplicated.
3934 Insns are also again known to be executed each iteration at
3935 the LOOP_CONT note. */
3936 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
3937 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
3939 not_every_iteration = 0;
3940 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3942 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3946 /* Note if we pass a loop latch. If we do, then we can not clear
3947 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
3948 a loop since a jump before the last CODE_LABEL may have started
3949 a new loop iteration.
3951 Note that LOOP_TOP is only set for rotated loops and we need
3952 this check for all loops, so compare against the CODE_LABEL
3953 which immediately follows LOOP_START. */
3954 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == NEXT_INSN (loop_start))
3955 past_loop_latch = 1;
3957 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3958 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3959 or not an insn is known to be executed each iteration of the
3960 loop, whether or not any iterations are known to occur.
3962 Therefore, if we have just passed a label and have no more labels
3963 between here and the test insn of the loop, and we have not passed
3964 a jump to the top of the loop, then we know these insns will be
3965 executed each iteration. */
3967 if (not_every_iteration
3968 && ! past_loop_latch
3969 && GET_CODE (p) == CODE_LABEL
3970 && no_labels_between_p (p, loop_end)
3971 && loop_insn_first_p (p, loop_cont))
3972 not_every_iteration = 0;
3975 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3976 Make a sanity check against n_times_set. */
3977 for (backbl = &loop_iv_list, bl = *backbl; bl; bl = bl->next)
3979 if (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3980 /* Above happens if register modified by subreg, etc. */
3981 /* Make sure it is not recognized as a basic induction var: */
3982 || VARRAY_INT (n_times_set, bl->regno) != bl->biv_count
3983 /* If never incremented, it is invariant that we decided not to
3984 move. So leave it alone. */
3985 || ! bl->incremented)
3987 if (loop_dump_stream)
3988 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
3990 (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3991 ? "not induction variable"
3992 : (! bl->incremented ? "never incremented"
3995 REG_IV_TYPE (bl->regno) = NOT_BASIC_INDUCT;
4002 if (loop_dump_stream)
4003 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
4007 /* Exit if there are no bivs. */
4010 /* Can still unroll the loop anyways, but indicate that there is no
4011 strength reduction info available. */
4013 unroll_loop (loop_end, insn_count, loop_start, end_insert_before,
4019 /* Find initial value for each biv by searching backwards from loop_start,
4020 halting at first label. Also record any test condition. */
4023 for (p = loop_start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
4027 if (GET_CODE (p) == CALL_INSN)
4030 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4031 || GET_CODE (p) == CALL_INSN)
4032 note_stores (PATTERN (p), record_initial, NULL);
4034 /* Record any test of a biv that branches around the loop if no store
4035 between it and the start of loop. We only care about tests with
4036 constants and registers and only certain of those. */
4037 if (GET_CODE (p) == JUMP_INSN
4038 && JUMP_LABEL (p) != 0
4039 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop_end)
4040 && (test = get_condition_for_loop (p)) != 0
4041 && GET_CODE (XEXP (test, 0)) == REG
4042 && REGNO (XEXP (test, 0)) < max_reg_before_loop
4043 && (bl = reg_biv_class[REGNO (XEXP (test, 0))]) != 0
4044 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop_start)
4045 && bl->init_insn == 0)
4047 /* If an NE test, we have an initial value! */
4048 if (GET_CODE (test) == NE)
4051 bl->init_set = gen_rtx_SET (VOIDmode,
4052 XEXP (test, 0), XEXP (test, 1));
4055 bl->initial_test = test;
4059 /* Look at the each biv and see if we can say anything better about its
4060 initial value from any initializing insns set up above. (This is done
4061 in two passes to avoid missing SETs in a PARALLEL.) */
4062 for (backbl = &loop_iv_list; (bl = *backbl); backbl = &bl->next)
4067 if (! bl->init_insn)
4070 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
4071 is a constant, use the value of that. */
4072 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
4073 && CONSTANT_P (XEXP (note, 0)))
4074 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
4075 && CONSTANT_P (XEXP (note, 0))))
4076 src = XEXP (note, 0);
4078 src = SET_SRC (bl->init_set);
4080 if (loop_dump_stream)
4081 fprintf (loop_dump_stream,
4082 "Biv %d initialized at insn %d: initial value ",
4083 bl->regno, INSN_UID (bl->init_insn));
4085 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
4086 || GET_MODE (src) == VOIDmode)
4087 && valid_initial_value_p (src, bl->init_insn, call_seen, loop_start))
4089 bl->initial_value = src;
4091 if (loop_dump_stream)
4093 if (GET_CODE (src) == CONST_INT)
4095 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (src));
4096 fputc ('\n', loop_dump_stream);
4100 print_rtl (loop_dump_stream, src);
4101 fprintf (loop_dump_stream, "\n");
4107 struct iv_class *bl2 = 0;
4108 rtx increment = NULL_RTX;
4110 /* Biv initial value is not a simple move. If it is the sum of
4111 another biv and a constant, check if both bivs are incremented
4112 in lockstep. Then we are actually looking at a giv.
4113 For simplicity, we only handle the case where there is but a
4114 single increment, and the register is not used elsewhere. */
4115 if (bl->biv_count == 1
4116 && bl->regno < max_reg_before_loop
4117 && uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4118 && GET_CODE (src) == PLUS
4119 && GET_CODE (XEXP (src, 0)) == REG
4120 && CONSTANT_P (XEXP (src, 1))
4121 && ((increment = biv_total_increment (bl, loop_start, loop_end))
4124 int regno = REGNO (XEXP (src, 0));
4126 for (bl2 = loop_iv_list; bl2; bl2 = bl2->next)
4127 if (bl2->regno == regno)
4131 /* Now, can we transform this biv into a giv? */
4133 && bl2->biv_count == 1
4134 && rtx_equal_p (increment,
4135 biv_total_increment (bl2, loop_start, loop_end))
4136 /* init_insn is only set to insns that are before loop_start
4137 without any intervening labels. */
4138 && ! reg_set_between_p (bl2->biv->src_reg,
4139 PREV_INSN (bl->init_insn), loop_start)
4140 /* The register from BL2 must be set before the register from
4141 BL is set, or we must be able to move the latter set after
4142 the former set. Currently there can't be any labels
4143 in-between when biv_total_increment returns nonzero both times
4144 but we test it here in case some day some real cfg analysis
4145 gets used to set always_computable. */
4146 && (loop_insn_first_p (bl2->biv->insn, bl->biv->insn)
4147 ? no_labels_between_p (bl2->biv->insn, bl->biv->insn)
4148 : (! reg_used_between_p (bl->biv->src_reg, bl->biv->insn,
4150 && no_jumps_between_p (bl->biv->insn, bl2->biv->insn)))
4151 && validate_change (bl->biv->insn,
4152 &SET_SRC (single_set (bl->biv->insn)),
4155 int loop_num = uid_loop_num[INSN_UID (loop_start)];
4156 rtx dominator = loop_number_cont_dominator[loop_num];
4157 rtx giv = bl->biv->src_reg;
4158 rtx giv_insn = bl->biv->insn;
4159 rtx after_giv = NEXT_INSN (giv_insn);
4161 if (loop_dump_stream)
4162 fprintf (loop_dump_stream, "is giv of biv %d\n", bl2->regno);
4163 /* Let this giv be discovered by the generic code. */
4164 REG_IV_TYPE (bl->regno) = UNKNOWN_INDUCT;
4165 reg_biv_class[bl->regno] = NULL_PTR;
4166 /* We can get better optimization if we can move the giv setting
4167 before the first giv use. */
4169 && ! loop_insn_first_p (dominator, scan_start)
4170 && ! reg_set_between_p (bl2->biv->src_reg, loop_start,
4172 && ! reg_used_between_p (giv, loop_start, dominator)
4173 && ! reg_used_between_p (giv, giv_insn, loop_end))
4178 for (next = NEXT_INSN (dominator); ; next = NEXT_INSN (next))
4180 if ((GET_RTX_CLASS (GET_CODE (next)) == 'i'
4181 && (reg_mentioned_p (giv, PATTERN (next))
4182 || reg_set_p (bl2->biv->src_reg, next)))
4183 || GET_CODE (next) == JUMP_INSN)
4186 if (GET_RTX_CLASS (GET_CODE (next)) != 'i'
4187 || ! sets_cc0_p (PATTERN (next)))
4191 if (loop_dump_stream)
4192 fprintf (loop_dump_stream, "move after insn %d\n",
4193 INSN_UID (dominator));
4194 /* Avoid problems with luids by actually moving the insn
4195 and adjusting all luids in the range. */
4196 reorder_insns (giv_insn, giv_insn, dominator);
4197 for (p = dominator; INSN_UID (p) >= max_uid_for_loop; )
4199 compute_luids (giv_insn, after_giv, INSN_LUID (p));
4200 /* If the only purpose of the init insn is to initialize
4201 this giv, delete it. */
4202 if (single_set (bl->init_insn)
4203 && ! reg_used_between_p (giv, bl->init_insn, loop_start))
4204 delete_insn (bl->init_insn);
4206 else if (! loop_insn_first_p (bl2->biv->insn, bl->biv->insn))
4208 rtx p = PREV_INSN (giv_insn);
4209 while (INSN_UID (p) >= max_uid_for_loop)
4211 reorder_insns (giv_insn, giv_insn, bl2->biv->insn);
4212 compute_luids (after_giv, NEXT_INSN (giv_insn),
4215 /* Remove this biv from the chain. */
4218 /* We move the following giv from *bl->next into *bl.
4219 We have to update reg_biv_class for that moved biv
4220 to point to its new address. */
4222 reg_biv_class[bl->regno] = bl;
4231 /* If we can't make it a giv,
4232 let biv keep initial value of "itself". */
4233 else if (loop_dump_stream)
4234 fprintf (loop_dump_stream, "is complex\n");
4238 /* If a biv is unconditionally incremented several times in a row, convert
4239 all but the last increment into a giv. */
4241 /* Get an upper bound for the number of registers
4242 we might have after all bivs have been processed. */
4243 first_increment_giv = max_reg_num ();
4244 for (n_extra_increment = 0, bl = loop_iv_list; bl; bl = bl->next)
4245 n_extra_increment += bl->biv_count - 1;
4247 /* If the loop contains volatile memory references do not allow any
4248 replacements to take place, since this could loose the volatile markers. */
4249 if (n_extra_increment && ! loop_info->has_volatile)
4251 int nregs = first_increment_giv + n_extra_increment;
4253 /* Reallocate reg_iv_type and reg_iv_info. */
4254 VARRAY_GROW (reg_iv_type, nregs);
4255 VARRAY_GROW (reg_iv_info, nregs);
4257 for (bl = loop_iv_list; bl; bl = bl->next)
4259 struct induction **vp, *v, *next;
4260 int biv_dead_after_loop = 0;
4262 /* The biv increments lists are in reverse order. Fix this first. */
4263 for (v = bl->biv, bl->biv = 0; v; v = next)
4266 v->next_iv = bl->biv;
4270 /* We must guard against the case that an early exit between v->insn
4271 and next->insn leaves the biv live after the loop, since that
4272 would mean that we'd be missing an increment for the final
4273 value. The following test to set biv_dead_after_loop is like
4274 the first part of the test to set bl->eliminable.
4275 We don't check here if we can calculate the final value, since
4276 this can't succeed if we already know that there is a jump
4277 between v->insn and next->insn, yet next->always_executed is
4278 set and next->maybe_multiple is cleared. Such a combination
4279 implies that the jump destination is outside the loop.
4280 If we want to make this check more sophisticated, we should
4281 check each branch between v->insn and next->insn individually
4282 to see if the biv is dead at its destination. */
4284 if (uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4286 && INSN_UID (bl->init_insn) < max_uid_for_loop
4287 && (uid_luid[REGNO_FIRST_UID (bl->regno)]
4288 >= INSN_LUID (bl->init_insn))
4289 #ifdef HAVE_decrement_and_branch_until_zero
4292 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4293 biv_dead_after_loop = 1;
4295 for (vp = &bl->biv, next = *vp; v = next, next = v->next_iv;)
4297 HOST_WIDE_INT offset;
4298 rtx set, add_val, old_reg, dest_reg, last_use_insn, note;
4299 int old_regno, new_regno;
4301 if (! v->always_executed
4302 || v->maybe_multiple
4303 || GET_CODE (v->add_val) != CONST_INT
4304 || ! next->always_executed
4305 || next->maybe_multiple
4306 || ! CONSTANT_P (next->add_val)
4307 || v->mult_val != const1_rtx
4308 || next->mult_val != const1_rtx
4309 || ! (biv_dead_after_loop
4310 || no_jumps_between_p (v->insn, next->insn)))
4315 offset = INTVAL (v->add_val);
4316 set = single_set (v->insn);
4317 add_val = plus_constant (next->add_val, offset);
4318 old_reg = v->dest_reg;
4319 dest_reg = gen_reg_rtx (v->mode);
4321 /* Unlike reg_iv_type / reg_iv_info, the other three arrays
4322 have been allocated with some slop space, so we may not
4323 actually need to reallocate them. If we do, the following
4324 if statement will be executed just once in this loop. */
4325 if ((unsigned) max_reg_num () > n_times_set->num_elements)
4327 /* Grow all the remaining arrays. */
4328 VARRAY_GROW (set_in_loop, nregs);
4329 VARRAY_GROW (n_times_set, nregs);
4330 VARRAY_GROW (may_not_optimize, nregs);
4331 VARRAY_GROW (reg_single_usage, nregs);
4334 if (! validate_change (next->insn, next->location, add_val, 0))
4340 /* Here we can try to eliminate the increment by combining
4341 it into the uses. */
4343 /* Set last_use_insn so that we can check against it. */
4345 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4347 p = next_insn_in_loop (p, scan_start, end, loop_top))
4349 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
4351 if (reg_mentioned_p (old_reg, PATTERN (p)))
4357 /* If we can't get the LUIDs for the insns, we can't
4358 calculate the lifetime. This is likely from unrolling
4359 of an inner loop, so there is little point in making this
4360 a DEST_REG giv anyways. */
4361 if (INSN_UID (v->insn) >= max_uid_for_loop
4362 || INSN_UID (last_use_insn) >= max_uid_for_loop
4363 || ! validate_change (v->insn, &SET_DEST (set), dest_reg, 0))
4365 /* Change the increment at NEXT back to what it was. */
4366 if (! validate_change (next->insn, next->location,
4372 next->add_val = add_val;
4373 v->dest_reg = dest_reg;
4374 v->giv_type = DEST_REG;
4375 v->location = &SET_SRC (set);
4377 v->combined_with = 0;
4379 v->derive_adjustment = 0;
4385 v->auto_inc_opt = 0;
4388 v->derived_from = 0;
4389 v->always_computable = 1;
4390 v->always_executed = 1;
4392 v->no_const_addval = 0;
4394 old_regno = REGNO (old_reg);
4395 new_regno = REGNO (dest_reg);
4396 VARRAY_INT (set_in_loop, old_regno)--;
4397 VARRAY_INT (set_in_loop, new_regno) = 1;
4398 VARRAY_INT (n_times_set, old_regno)--;
4399 VARRAY_INT (n_times_set, new_regno) = 1;
4400 VARRAY_CHAR (may_not_optimize, new_regno) = 0;
4402 REG_IV_TYPE (new_regno) = GENERAL_INDUCT;
4403 REG_IV_INFO (new_regno) = v;
4405 /* If next_insn has a REG_EQUAL note that mentiones OLD_REG,
4406 it must be replaced. */
4407 note = find_reg_note (next->insn, REG_EQUAL, NULL_RTX);
4408 if (note && reg_mentioned_p (old_reg, XEXP (note, 0)))
4409 XEXP (note, 0) = copy_rtx (SET_SRC (single_set (next->insn)));
4411 /* Remove the increment from the list of biv increments,
4412 and record it as a giv. */
4415 v->next_iv = bl->giv;
4418 v->benefit = rtx_cost (SET_SRC (set), SET);
4419 bl->total_benefit += v->benefit;
4421 /* Now replace the biv with DEST_REG in all insns between
4422 the replaced increment and the next increment, and
4423 remember the last insn that needed a replacement. */
4424 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4426 p = next_insn_in_loop (p, scan_start, end, loop_top))
4430 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
4432 if (reg_mentioned_p (old_reg, PATTERN (p)))
4435 if (! validate_replace_rtx (old_reg, dest_reg, p))
4438 for (note = REG_NOTES (p); note; note = XEXP (note, 1))
4440 if (GET_CODE (note) == EXPR_LIST)
4442 = replace_rtx (XEXP (note, 0), old_reg, dest_reg);
4446 v->last_use = last_use_insn;
4447 v->lifetime = INSN_LUID (v->insn) - INSN_LUID (last_use_insn);
4448 /* If the lifetime is zero, it means that this register is really
4449 a dead store. So mark this as a giv that can be ignored.
4450 This will not prevent the biv from being eliminated. */
4451 if (v->lifetime == 0)
4454 if (loop_dump_stream)
4455 fprintf (loop_dump_stream,
4456 "Increment %d of biv %d converted to giv %d.\n\n",
4457 INSN_UID (v->insn), old_regno, new_regno);
4461 last_increment_giv = max_reg_num () - 1;
4463 /* Search the loop for general induction variables. */
4465 /* A register is a giv if: it is only set once, it is a function of a
4466 biv and a constant (or invariant), and it is not a biv. */
4468 not_every_iteration = 0;
4475 /* At end of a straight-in loop, we are done.
4476 At end of a loop entered at the bottom, scan the top. */
4477 if (p == scan_start)
4485 if (p == scan_start)
4489 /* Look for a general induction variable in a register. */
4490 if (GET_CODE (p) == INSN
4491 && (set = single_set (p))
4492 && GET_CODE (SET_DEST (set)) == REG
4493 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
4500 rtx last_consec_insn;
4502 dest_reg = SET_DEST (set);
4503 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
4506 if (/* SET_SRC is a giv. */
4507 (general_induction_var (SET_SRC (set), &src_reg, &add_val,
4508 &mult_val, 0, &benefit)
4509 /* Equivalent expression is a giv. */
4510 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
4511 && general_induction_var (XEXP (regnote, 0), &src_reg,
4512 &add_val, &mult_val, 0,
4514 /* Don't try to handle any regs made by loop optimization.
4515 We have nothing on them in regno_first_uid, etc. */
4516 && REGNO (dest_reg) < max_reg_before_loop
4517 /* Don't recognize a BASIC_INDUCT_VAR here. */
4518 && dest_reg != src_reg
4519 /* This must be the only place where the register is set. */
4520 && (VARRAY_INT (n_times_set, REGNO (dest_reg)) == 1
4521 /* or all sets must be consecutive and make a giv. */
4522 || (benefit = consec_sets_giv (benefit, p,
4524 &add_val, &mult_val,
4525 &last_consec_insn))))
4528 = (struct induction *) alloca (sizeof (struct induction));
4530 /* If this is a library call, increase benefit. */
4531 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
4532 benefit += libcall_benefit (p);
4534 /* Skip the consecutive insns, if there are any. */
4535 if (VARRAY_INT (n_times_set, REGNO (dest_reg)) != 1)
4536 p = last_consec_insn;
4538 record_giv (v, p, src_reg, dest_reg, mult_val, add_val, benefit,
4539 DEST_REG, not_every_iteration, maybe_multiple,
4540 NULL_PTR, loop_start, loop_end);
4545 #ifndef DONT_REDUCE_ADDR
4546 /* Look for givs which are memory addresses. */
4547 /* This resulted in worse code on a VAX 8600. I wonder if it
4549 if (GET_CODE (p) == INSN)
4550 find_mem_givs (PATTERN (p), p, not_every_iteration, maybe_multiple,
4551 loop_start, loop_end);
4554 /* Update the status of whether giv can derive other givs. This can
4555 change when we pass a label or an insn that updates a biv. */
4556 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4557 || GET_CODE (p) == CODE_LABEL)
4558 update_giv_derive (p);
4560 /* Past CODE_LABEL, we get to insns that may be executed multiple
4561 times. The only way we can be sure that they can't is if every
4562 every jump insn between here and the end of the loop either
4563 returns, exits the loop, is a forward jump, or is a jump
4564 to the loop start. */
4566 if (GET_CODE (p) == CODE_LABEL)
4574 insn = NEXT_INSN (insn);
4575 if (insn == scan_start)
4583 if (insn == scan_start)
4587 if (GET_CODE (insn) == JUMP_INSN
4588 && GET_CODE (PATTERN (insn)) != RETURN
4589 && (! condjump_p (insn)
4590 || (JUMP_LABEL (insn) != 0
4591 && JUMP_LABEL (insn) != scan_start
4592 && (INSN_UID (JUMP_LABEL (insn)) >= max_uid_for_loop
4593 || INSN_UID (insn) >= max_uid_for_loop
4594 || (INSN_LUID (JUMP_LABEL (insn))
4595 < INSN_LUID (insn))))))
4603 /* Past a jump, we get to insns for which we can't count
4604 on whether they will be executed during each iteration. */
4605 /* This code appears twice in strength_reduce. There is also similar
4606 code in scan_loop. */
4607 if (GET_CODE (p) == JUMP_INSN
4608 /* If we enter the loop in the middle, and scan around to the
4609 beginning, don't set not_every_iteration for that.
4610 This can be any kind of jump, since we want to know if insns
4611 will be executed if the loop is executed. */
4612 && ! (JUMP_LABEL (p) == loop_top
4613 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
4614 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
4618 /* If this is a jump outside the loop, then it also doesn't
4619 matter. Check to see if the target of this branch is on the
4620 loop_number_exits_labels list. */
4622 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
4624 label = LABEL_NEXTREF (label))
4625 if (XEXP (label, 0) == JUMP_LABEL (p))
4629 not_every_iteration = 1;
4632 else if (GET_CODE (p) == NOTE)
4634 /* At the virtual top of a converted loop, insns are again known to
4635 be executed each iteration: logically, the loop begins here
4636 even though the exit code has been duplicated.
4638 Insns are also again known to be executed each iteration at
4639 the LOOP_CONT note. */
4640 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
4641 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
4643 not_every_iteration = 0;
4644 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
4646 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
4650 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4651 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4652 or not an insn is known to be executed each iteration of the
4653 loop, whether or not any iterations are known to occur.
4655 Therefore, if we have just passed a label and have no more labels
4656 between here and the test insn of the loop, we know these insns
4657 will be executed each iteration. */
4659 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
4660 && no_labels_between_p (p, loop_end)
4661 && loop_insn_first_p (p, loop_cont))
4662 not_every_iteration = 0;
4665 /* Try to calculate and save the number of loop iterations. This is
4666 set to zero if the actual number can not be calculated. This must
4667 be called after all giv's have been identified, since otherwise it may
4668 fail if the iteration variable is a giv. */
4670 loop_iterations (loop_start, loop_end, loop_info);
4672 /* Now for each giv for which we still don't know whether or not it is
4673 replaceable, check to see if it is replaceable because its final value
4674 can be calculated. This must be done after loop_iterations is called,
4675 so that final_giv_value will work correctly. */
4677 for (bl = loop_iv_list; bl; bl = bl->next)
4679 struct induction *v;
4681 for (v = bl->giv; v; v = v->next_iv)
4682 if (! v->replaceable && ! v->not_replaceable)
4683 check_final_value (v, loop_start, loop_end, loop_info->n_iterations);
4686 /* Try to prove that the loop counter variable (if any) is always
4687 nonnegative; if so, record that fact with a REG_NONNEG note
4688 so that "decrement and branch until zero" insn can be used. */
4689 check_dbra_loop (loop_end, insn_count, loop_start, loop_info);
4691 /* Create reg_map to hold substitutions for replaceable giv regs.
4692 Some givs might have been made from biv increments, so look at
4693 reg_iv_type for a suitable size. */
4694 reg_map_size = reg_iv_type->num_elements;
4695 reg_map = (rtx *) xcalloc (reg_map_size, sizeof (rtx));
4697 /* Examine each iv class for feasibility of strength reduction/induction
4698 variable elimination. */
4700 for (bl = loop_iv_list; bl; bl = bl->next)
4702 struct induction *v;
4705 rtx final_value = 0;
4708 /* Test whether it will be possible to eliminate this biv
4709 provided all givs are reduced. This is possible if either
4710 the reg is not used outside the loop, or we can compute
4711 what its final value will be.
4713 For architectures with a decrement_and_branch_until_zero insn,
4714 don't do this if we put a REG_NONNEG note on the endtest for
4717 /* Compare against bl->init_insn rather than loop_start.
4718 We aren't concerned with any uses of the biv between
4719 init_insn and loop_start since these won't be affected
4720 by the value of the biv elsewhere in the function, so
4721 long as init_insn doesn't use the biv itself.
4722 March 14, 1989 -- self@bayes.arc.nasa.gov */
4724 if ((uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4726 && INSN_UID (bl->init_insn) < max_uid_for_loop
4727 && uid_luid[REGNO_FIRST_UID (bl->regno)] >= INSN_LUID (bl->init_insn)
4728 #ifdef HAVE_decrement_and_branch_until_zero
4731 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4732 || ((final_value = final_biv_value (bl, loop_start, loop_end,
4733 loop_info->n_iterations))
4734 #ifdef HAVE_decrement_and_branch_until_zero
4738 bl->eliminable = maybe_eliminate_biv (bl, loop_start, end, 0,
4739 threshold, insn_count);
4742 if (loop_dump_stream)
4744 fprintf (loop_dump_stream,
4745 "Cannot eliminate biv %d.\n",
4747 fprintf (loop_dump_stream,
4748 "First use: insn %d, last use: insn %d.\n",
4749 REGNO_FIRST_UID (bl->regno),
4750 REGNO_LAST_UID (bl->regno));
4754 /* Combine all giv's for this iv_class. */
4757 /* This will be true at the end, if all givs which depend on this
4758 biv have been strength reduced.
4759 We can't (currently) eliminate the biv unless this is so. */
4762 /* Check each giv in this class to see if we will benefit by reducing
4763 it. Skip giv's combined with others. */
4764 for (v = bl->giv; v; v = v->next_iv)
4766 struct induction *tv;
4768 if (v->ignore || v->same)
4771 benefit = v->benefit;
4773 /* Reduce benefit if not replaceable, since we will insert
4774 a move-insn to replace the insn that calculates this giv.
4775 Don't do this unless the giv is a user variable, since it
4776 will often be marked non-replaceable because of the duplication
4777 of the exit code outside the loop. In such a case, the copies
4778 we insert are dead and will be deleted. So they don't have
4779 a cost. Similar situations exist. */
4780 /* ??? The new final_[bg]iv_value code does a much better job
4781 of finding replaceable giv's, and hence this code may no longer
4783 if (! v->replaceable && ! bl->eliminable
4784 && REG_USERVAR_P (v->dest_reg))
4785 benefit -= copy_cost;
4787 /* Decrease the benefit to count the add-insns that we will
4788 insert to increment the reduced reg for the giv. */
4789 benefit -= add_cost * bl->biv_count;
4791 /* Decide whether to strength-reduce this giv or to leave the code
4792 unchanged (recompute it from the biv each time it is used).
4793 This decision can be made independently for each giv. */
4796 /* Attempt to guess whether autoincrement will handle some of the
4797 new add insns; if so, increase BENEFIT (undo the subtraction of
4798 add_cost that was done above). */
4799 if (v->giv_type == DEST_ADDR
4800 && GET_CODE (v->mult_val) == CONST_INT)
4802 if (HAVE_POST_INCREMENT
4803 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4804 benefit += add_cost * bl->biv_count;
4805 else if (HAVE_PRE_INCREMENT
4806 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4807 benefit += add_cost * bl->biv_count;
4808 else if (HAVE_POST_DECREMENT
4809 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4810 benefit += add_cost * bl->biv_count;
4811 else if (HAVE_PRE_DECREMENT
4812 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4813 benefit += add_cost * bl->biv_count;
4817 /* If an insn is not to be strength reduced, then set its ignore
4818 flag, and clear all_reduced. */
4820 /* A giv that depends on a reversed biv must be reduced if it is
4821 used after the loop exit, otherwise, it would have the wrong
4822 value after the loop exit. To make it simple, just reduce all
4823 of such giv's whether or not we know they are used after the loop
4826 if ( ! flag_reduce_all_givs && v->lifetime * threshold * benefit < insn_count
4829 if (loop_dump_stream)
4830 fprintf (loop_dump_stream,
4831 "giv of insn %d not worth while, %d vs %d.\n",
4833 v->lifetime * threshold * benefit, insn_count);
4839 /* Check that we can increment the reduced giv without a
4840 multiply insn. If not, reject it. */
4842 for (tv = bl->biv; tv; tv = tv->next_iv)
4843 if (tv->mult_val == const1_rtx
4844 && ! product_cheap_p (tv->add_val, v->mult_val))
4846 if (loop_dump_stream)
4847 fprintf (loop_dump_stream,
4848 "giv of insn %d: would need a multiply.\n",
4849 INSN_UID (v->insn));
4857 /* Check for givs whose first use is their definition and whose
4858 last use is the definition of another giv. If so, it is likely
4859 dead and should not be used to derive another giv nor to
4861 for (v = bl->giv; v; v = v->next_iv)
4864 || (v->same && v->same->ignore))
4869 struct induction *v1;
4871 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4872 if (v->last_use == v1->insn)
4875 else if (v->giv_type == DEST_REG
4876 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4878 struct induction *v1;
4880 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4881 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4886 /* Now that we know which givs will be reduced, try to rearrange the
4887 combinations to reduce register pressure.
4888 recombine_givs calls find_life_end, which needs reg_iv_type and
4889 reg_iv_info to be valid for all pseudos. We do the necessary
4890 reallocation here since it allows to check if there are still
4891 more bivs to process. */
4892 nregs = max_reg_num ();
4893 if (nregs > reg_iv_type->num_elements)
4895 /* If there are still more bivs to process, allocate some slack
4896 space so that we're not constantly reallocating these arrays. */
4899 /* Reallocate reg_iv_type and reg_iv_info. */
4900 VARRAY_GROW (reg_iv_type, nregs);
4901 VARRAY_GROW (reg_iv_info, nregs);
4903 recombine_givs (bl, loop_start, loop_end, unroll_p);
4905 /* Reduce each giv that we decided to reduce. */
4907 for (v = bl->giv; v; v = v->next_iv)
4909 struct induction *tv;
4910 if (! v->ignore && v->same == 0)
4912 int auto_inc_opt = 0;
4914 /* If the code for derived givs immediately below has already
4915 allocated a new_reg, we must keep it. */
4917 v->new_reg = gen_reg_rtx (v->mode);
4919 if (v->derived_from)
4921 struct induction *d = v->derived_from;
4923 /* In case d->dest_reg is not replaceable, we have
4924 to replace it in v->insn now. */
4926 d->new_reg = gen_reg_rtx (d->mode);
4928 = replace_rtx (PATTERN (v->insn), d->dest_reg, d->new_reg);
4930 = replace_rtx (PATTERN (v->insn), v->dest_reg, v->new_reg);
4931 /* For each place where the biv is incremented, add an
4932 insn to set the new, reduced reg for the giv.
4933 We used to do this only for biv_count != 1, but
4934 this fails when there is a giv after a single biv
4935 increment, e.g. when the last giv was expressed as
4937 for (tv = bl->biv; tv; tv = tv->next_iv)
4939 /* We always emit reduced giv increments before the
4940 biv increment when bl->biv_count != 1. So by
4941 emitting the add insns for derived givs after the
4942 biv increment, they pick up the updated value of
4944 If the reduced giv is processed with
4945 auto_inc_opt == 1, then it is incremented earlier
4946 than the biv, hence we'll still pick up the right
4948 If it's processed with auto_inc_opt == -1,
4949 that implies that the biv increment is before the
4950 first reduced giv's use. The derived giv's lifetime
4951 is after the reduced giv's lifetime, hence in this
4952 case, the biv increment doesn't matter. */
4953 emit_insn_after (copy_rtx (PATTERN (v->insn)), tv->insn);
4959 /* If the target has auto-increment addressing modes, and
4960 this is an address giv, then try to put the increment
4961 immediately after its use, so that flow can create an
4962 auto-increment addressing mode. */
4963 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4964 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4965 /* We don't handle reversed biv's because bl->biv->insn
4966 does not have a valid INSN_LUID. */
4968 && v->always_executed && ! v->maybe_multiple
4969 && INSN_UID (v->insn) < max_uid_for_loop)
4971 /* If other giv's have been combined with this one, then
4972 this will work only if all uses of the other giv's occur
4973 before this giv's insn. This is difficult to check.
4975 We simplify this by looking for the common case where
4976 there is one DEST_REG giv, and this giv's insn is the
4977 last use of the dest_reg of that DEST_REG giv. If the
4978 increment occurs after the address giv, then we can
4979 perform the optimization. (Otherwise, the increment
4980 would have to go before other_giv, and we would not be
4981 able to combine it with the address giv to get an
4982 auto-inc address.) */
4983 if (v->combined_with)
4985 struct induction *other_giv = 0;
4987 for (tv = bl->giv; tv; tv = tv->next_iv)
4995 if (! tv && other_giv
4996 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4997 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4998 == INSN_UID (v->insn))
4999 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
5002 /* Check for case where increment is before the address
5003 giv. Do this test in "loop order". */
5004 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
5005 && (INSN_LUID (v->insn) < INSN_LUID (scan_start)
5006 || (INSN_LUID (bl->biv->insn)
5007 > INSN_LUID (scan_start))))
5008 || (INSN_LUID (v->insn) < INSN_LUID (scan_start)
5009 && (INSN_LUID (scan_start)
5010 < INSN_LUID (bl->biv->insn))))
5019 /* We can't put an insn immediately after one setting
5020 cc0, or immediately before one using cc0. */
5021 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
5022 || (auto_inc_opt == -1
5023 && (prev = prev_nonnote_insn (v->insn)) != 0
5024 && GET_RTX_CLASS (GET_CODE (prev)) == 'i'
5025 && sets_cc0_p (PATTERN (prev))))
5031 v->auto_inc_opt = 1;
5035 /* For each place where the biv is incremented, add an insn
5036 to increment the new, reduced reg for the giv. */
5037 for (tv = bl->biv; tv; tv = tv->next_iv)
5042 insert_before = tv->insn;
5043 else if (auto_inc_opt == 1)
5044 insert_before = NEXT_INSN (v->insn);
5046 insert_before = v->insn;
5048 if (tv->mult_val == const1_rtx)
5049 emit_iv_add_mult (tv->add_val, v->mult_val,
5050 v->new_reg, v->new_reg, insert_before);
5051 else /* tv->mult_val == const0_rtx */
5052 /* A multiply is acceptable here
5053 since this is presumed to be seldom executed. */
5054 emit_iv_add_mult (tv->add_val, v->mult_val,
5055 v->add_val, v->new_reg, insert_before);
5058 /* Add code at loop start to initialize giv's reduced reg. */
5060 emit_iv_add_mult (bl->initial_value, v->mult_val,
5061 v->add_val, v->new_reg, loop_start);
5065 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
5068 For each giv register that can be reduced now: if replaceable,
5069 substitute reduced reg wherever the old giv occurs;
5070 else add new move insn "giv_reg = reduced_reg". */
5072 for (v = bl->giv; v; v = v->next_iv)
5074 if (v->same && v->same->ignore)
5080 /* Update expression if this was combined, in case other giv was
5083 v->new_reg = replace_rtx (v->new_reg,
5084 v->same->dest_reg, v->same->new_reg);
5086 if (v->giv_type == DEST_ADDR)
5087 /* Store reduced reg as the address in the memref where we found
5089 validate_change (v->insn, v->location, v->new_reg, 0);
5090 else if (v->replaceable)
5092 reg_map[REGNO (v->dest_reg)] = v->new_reg;
5095 /* I can no longer duplicate the original problem. Perhaps
5096 this is unnecessary now? */
5098 /* Replaceable; it isn't strictly necessary to delete the old
5099 insn and emit a new one, because v->dest_reg is now dead.
5101 However, especially when unrolling loops, the special
5102 handling for (set REG0 REG1) in the second cse pass may
5103 make v->dest_reg live again. To avoid this problem, emit
5104 an insn to set the original giv reg from the reduced giv.
5105 We can not delete the original insn, since it may be part
5106 of a LIBCALL, and the code in flow that eliminates dead
5107 libcalls will fail if it is deleted. */
5108 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
5114 /* Not replaceable; emit an insn to set the original giv reg from
5115 the reduced giv, same as above. */
5116 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
5120 /* When a loop is reversed, givs which depend on the reversed
5121 biv, and which are live outside the loop, must be set to their
5122 correct final value. This insn is only needed if the giv is
5123 not replaceable. The correct final value is the same as the
5124 value that the giv starts the reversed loop with. */
5125 if (bl->reversed && ! v->replaceable)
5126 emit_iv_add_mult (bl->initial_value, v->mult_val,
5127 v->add_val, v->dest_reg, end_insert_before);
5128 else if (v->final_value)
5132 /* If the loop has multiple exits, emit the insn before the
5133 loop to ensure that it will always be executed no matter
5134 how the loop exits. Otherwise, emit the insn after the loop,
5135 since this is slightly more efficient. */
5136 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
5137 insert_before = loop_start;
5139 insert_before = end_insert_before;
5140 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
5144 /* If the insn to set the final value of the giv was emitted
5145 before the loop, then we must delete the insn inside the loop
5146 that sets it. If this is a LIBCALL, then we must delete
5147 every insn in the libcall. Note, however, that
5148 final_giv_value will only succeed when there are multiple
5149 exits if the giv is dead at each exit, hence it does not
5150 matter that the original insn remains because it is dead
5152 /* Delete the insn inside the loop that sets the giv since
5153 the giv is now set before (or after) the loop. */
5154 delete_insn (v->insn);
5158 if (loop_dump_stream)
5160 fprintf (loop_dump_stream, "giv at %d reduced to ",
5161 INSN_UID (v->insn));
5162 print_rtl (loop_dump_stream, v->new_reg);
5163 fprintf (loop_dump_stream, "\n");
5167 /* All the givs based on the biv bl have been reduced if they
5170 /* For each giv not marked as maybe dead that has been combined with a
5171 second giv, clear any "maybe dead" mark on that second giv.
5172 v->new_reg will either be or refer to the register of the giv it
5175 Doing this clearing avoids problems in biv elimination where a
5176 giv's new_reg is a complex value that can't be put in the insn but
5177 the giv combined with (with a reg as new_reg) is marked maybe_dead.
5178 Since the register will be used in either case, we'd prefer it be
5179 used from the simpler giv. */
5181 for (v = bl->giv; v; v = v->next_iv)
5182 if (! v->maybe_dead && v->same)
5183 v->same->maybe_dead = 0;
5185 /* Try to eliminate the biv, if it is a candidate.
5186 This won't work if ! all_reduced,
5187 since the givs we planned to use might not have been reduced.
5189 We have to be careful that we didn't initially think we could eliminate
5190 this biv because of a giv that we now think may be dead and shouldn't
5191 be used as a biv replacement.
5193 Also, there is the possibility that we may have a giv that looks
5194 like it can be used to eliminate a biv, but the resulting insn
5195 isn't valid. This can happen, for example, on the 88k, where a
5196 JUMP_INSN can compare a register only with zero. Attempts to
5197 replace it with a compare with a constant will fail.
5199 Note that in cases where this call fails, we may have replaced some
5200 of the occurrences of the biv with a giv, but no harm was done in
5201 doing so in the rare cases where it can occur. */
5203 if (all_reduced == 1 && bl->eliminable
5204 && maybe_eliminate_biv (bl, loop_start, end, 1,
5205 threshold, insn_count))
5208 /* ?? If we created a new test to bypass the loop entirely,
5209 or otherwise drop straight in, based on this test, then
5210 we might want to rewrite it also. This way some later
5211 pass has more hope of removing the initialization of this
5214 /* If final_value != 0, then the biv may be used after loop end
5215 and we must emit an insn to set it just in case.
5217 Reversed bivs already have an insn after the loop setting their
5218 value, so we don't need another one. We can't calculate the
5219 proper final value for such a biv here anyways. */
5220 if (final_value != 0 && ! bl->reversed)
5224 /* If the loop has multiple exits, emit the insn before the
5225 loop to ensure that it will always be executed no matter
5226 how the loop exits. Otherwise, emit the insn after the
5227 loop, since this is slightly more efficient. */
5228 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
5229 insert_before = loop_start;
5231 insert_before = end_insert_before;
5233 emit_insn_before (gen_move_insn (bl->biv->dest_reg, final_value),
5238 /* Delete all of the instructions inside the loop which set
5239 the biv, as they are all dead. If is safe to delete them,
5240 because an insn setting a biv will never be part of a libcall. */
5241 /* However, deleting them will invalidate the regno_last_uid info,
5242 so keeping them around is more convenient. Final_biv_value
5243 will only succeed when there are multiple exits if the biv
5244 is dead at each exit, hence it does not matter that the original
5245 insn remains, because it is dead anyways. */
5246 for (v = bl->biv; v; v = v->next_iv)
5247 delete_insn (v->insn);
5250 if (loop_dump_stream)
5251 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
5256 /* Go through all the instructions in the loop, making all the
5257 register substitutions scheduled in REG_MAP. */
5259 for (p = loop_start; p != end; p = NEXT_INSN (p))
5260 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5261 || GET_CODE (p) == CALL_INSN)
5263 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
5264 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
5268 if (loop_info->n_iterations > 0)
5270 /* When we completely unroll a loop we will likely not need the increment
5271 of the loop BIV and we will not need the conditional branch at the
5273 unrolled_insn_copies = insn_count - 2;
5276 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
5277 need the comparison before the conditional branch at the end of the
5279 unrolled_insn_copies -= 1;
5282 /* We'll need one copy for each loop iteration. */
5283 unrolled_insn_copies *= loop_info->n_iterations;
5285 /* A little slop to account for the ability to remove initialization
5286 code, better CSE, and other secondary benefits of completely
5287 unrolling some loops. */
5288 unrolled_insn_copies -= 1;
5290 /* Clamp the value. */
5291 if (unrolled_insn_copies < 0)
5292 unrolled_insn_copies = 0;
5295 /* Unroll loops from within strength reduction so that we can use the
5296 induction variable information that strength_reduce has already
5297 collected. Always unroll loops that would be as small or smaller
5298 unrolled than when rolled. */
5300 || (loop_info->n_iterations > 0
5301 && unrolled_insn_copies <= insn_count))
5302 unroll_loop (loop_end, insn_count, loop_start, end_insert_before,
5305 #ifdef HAVE_decrement_and_branch_on_count
5306 /* Instrument the loop with BCT insn. */
5307 if (HAVE_decrement_and_branch_on_count && bct_p
5308 && flag_branch_on_count_reg)
5309 insert_bct (loop_start, loop_end, loop_info);
5310 #endif /* HAVE_decrement_and_branch_on_count */
5312 if (loop_dump_stream)
5313 fprintf (loop_dump_stream, "\n");
5316 VARRAY_FREE (reg_iv_type);
5317 VARRAY_FREE (reg_iv_info);
5318 free (reg_biv_class);
5323 /* Return 1 if X is a valid source for an initial value (or as value being
5324 compared against in an initial test).
5326 X must be either a register or constant and must not be clobbered between
5327 the current insn and the start of the loop.
5329 INSN is the insn containing X. */
5332 valid_initial_value_p (x, insn, call_seen, loop_start)
5341 /* Only consider pseudos we know about initialized in insns whose luids
5343 if (GET_CODE (x) != REG
5344 || REGNO (x) >= max_reg_before_loop)
5347 /* Don't use call-clobbered registers across a call which clobbers it. On
5348 some machines, don't use any hard registers at all. */
5349 if (REGNO (x) < FIRST_PSEUDO_REGISTER
5350 && (SMALL_REGISTER_CLASSES
5351 || (call_used_regs[REGNO (x)] && call_seen)))
5354 /* Don't use registers that have been clobbered before the start of the
5356 if (reg_set_between_p (x, insn, loop_start))
5362 /* Scan X for memory refs and check each memory address
5363 as a possible giv. INSN is the insn whose pattern X comes from.
5364 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5365 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
5366 more thanonce in each loop iteration. */
5369 find_mem_givs (x, insn, not_every_iteration, maybe_multiple, loop_start,
5373 int not_every_iteration, maybe_multiple;
5374 rtx loop_start, loop_end;
5377 register enum rtx_code code;
5378 register const char *fmt;
5383 code = GET_CODE (x);
5407 /* This code used to disable creating GIVs with mult_val == 1 and
5408 add_val == 0. However, this leads to lost optimizations when
5409 it comes time to combine a set of related DEST_ADDR GIVs, since
5410 this one would not be seen. */
5412 if (general_induction_var (XEXP (x, 0), &src_reg, &add_val,
5413 &mult_val, 1, &benefit))
5415 /* Found one; record it. */
5417 = (struct induction *) oballoc (sizeof (struct induction));
5419 record_giv (v, insn, src_reg, addr_placeholder, mult_val,
5420 add_val, benefit, DEST_ADDR, not_every_iteration,
5421 maybe_multiple, &XEXP (x, 0), loop_start, loop_end);
5423 v->mem_mode = GET_MODE (x);
5432 /* Recursively scan the subexpressions for other mem refs. */
5434 fmt = GET_RTX_FORMAT (code);
5435 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5437 find_mem_givs (XEXP (x, i), insn, not_every_iteration, maybe_multiple,
5438 loop_start, loop_end);
5439 else if (fmt[i] == 'E')
5440 for (j = 0; j < XVECLEN (x, i); j++)
5441 find_mem_givs (XVECEXP (x, i, j), insn, not_every_iteration,
5442 maybe_multiple, loop_start, loop_end);
5445 /* Fill in the data about one biv update.
5446 V is the `struct induction' in which we record the biv. (It is
5447 allocated by the caller, with alloca.)
5448 INSN is the insn that sets it.
5449 DEST_REG is the biv's reg.
5451 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5452 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5453 being set to INC_VAL.
5455 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5456 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5457 can be executed more than once per iteration. If MAYBE_MULTIPLE
5458 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5459 executed exactly once per iteration. */
5462 record_biv (v, insn, dest_reg, inc_val, mult_val, location,
5463 not_every_iteration, maybe_multiple)
5464 struct induction *v;
5470 int not_every_iteration;
5473 struct iv_class *bl;
5476 v->src_reg = dest_reg;
5477 v->dest_reg = dest_reg;
5478 v->mult_val = mult_val;
5479 v->add_val = inc_val;
5480 v->location = location;
5481 v->mode = GET_MODE (dest_reg);
5482 v->always_computable = ! not_every_iteration;
5483 v->always_executed = ! not_every_iteration;
5484 v->maybe_multiple = maybe_multiple;
5486 /* Add this to the reg's iv_class, creating a class
5487 if this is the first incrementation of the reg. */
5489 bl = reg_biv_class[REGNO (dest_reg)];
5492 /* Create and initialize new iv_class. */
5494 bl = (struct iv_class *) oballoc (sizeof (struct iv_class));
5496 bl->regno = REGNO (dest_reg);
5502 /* Set initial value to the reg itself. */
5503 bl->initial_value = dest_reg;
5504 /* We haven't seen the initializing insn yet */
5507 bl->initial_test = 0;
5508 bl->incremented = 0;
5512 bl->total_benefit = 0;
5514 /* Add this class to loop_iv_list. */
5515 bl->next = loop_iv_list;
5518 /* Put it in the array of biv register classes. */
5519 reg_biv_class[REGNO (dest_reg)] = bl;
5522 /* Update IV_CLASS entry for this biv. */
5523 v->next_iv = bl->biv;
5526 if (mult_val == const1_rtx)
5527 bl->incremented = 1;
5529 if (loop_dump_stream)
5531 fprintf (loop_dump_stream,
5532 "Insn %d: possible biv, reg %d,",
5533 INSN_UID (insn), REGNO (dest_reg));
5534 if (GET_CODE (inc_val) == CONST_INT)
5536 fprintf (loop_dump_stream, " const =");
5537 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (inc_val));
5538 fputc ('\n', loop_dump_stream);
5542 fprintf (loop_dump_stream, " const = ");
5543 print_rtl (loop_dump_stream, inc_val);
5544 fprintf (loop_dump_stream, "\n");
5549 /* Fill in the data about one giv.
5550 V is the `struct induction' in which we record the giv. (It is
5551 allocated by the caller, with alloca.)
5552 INSN is the insn that sets it.
5553 BENEFIT estimates the savings from deleting this insn.
5554 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5555 into a register or is used as a memory address.
5557 SRC_REG is the biv reg which the giv is computed from.
5558 DEST_REG is the giv's reg (if the giv is stored in a reg).
5559 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5560 LOCATION points to the place where this giv's value appears in INSN. */
5563 record_giv (v, insn, src_reg, dest_reg, mult_val, add_val, benefit,
5564 type, not_every_iteration, maybe_multiple, location, loop_start,
5566 struct induction *v;
5570 rtx mult_val, add_val;
5573 int not_every_iteration, maybe_multiple;
5575 rtx loop_start, loop_end;
5577 struct induction *b;
5578 struct iv_class *bl;
5579 rtx set = single_set (insn);
5582 v->src_reg = src_reg;
5584 v->dest_reg = dest_reg;
5585 v->mult_val = mult_val;
5586 v->add_val = add_val;
5587 v->benefit = benefit;
5588 v->location = location;
5590 v->combined_with = 0;
5591 v->maybe_multiple = maybe_multiple;
5593 v->derive_adjustment = 0;
5599 v->auto_inc_opt = 0;
5602 v->derived_from = 0;
5605 /* The v->always_computable field is used in update_giv_derive, to
5606 determine whether a giv can be used to derive another giv. For a
5607 DEST_REG giv, INSN computes a new value for the giv, so its value
5608 isn't computable if INSN insn't executed every iteration.
5609 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5610 it does not compute a new value. Hence the value is always computable
5611 regardless of whether INSN is executed each iteration. */
5613 if (type == DEST_ADDR)
5614 v->always_computable = 1;
5616 v->always_computable = ! not_every_iteration;
5618 v->always_executed = ! not_every_iteration;
5620 if (type == DEST_ADDR)
5622 v->mode = GET_MODE (*location);
5625 else /* type == DEST_REG */
5627 v->mode = GET_MODE (SET_DEST (set));
5629 v->lifetime = (uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
5630 - uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))]);
5632 /* If the lifetime is zero, it means that this register is
5633 really a dead store. So mark this as a giv that can be
5634 ignored. This will not prevent the biv from being eliminated. */
5635 if (v->lifetime == 0)
5638 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
5639 REG_IV_INFO (REGNO (dest_reg)) = v;
5642 /* Add the giv to the class of givs computed from one biv. */
5644 bl = reg_biv_class[REGNO (src_reg)];
5647 v->next_iv = bl->giv;
5649 /* Don't count DEST_ADDR. This is supposed to count the number of
5650 insns that calculate givs. */
5651 if (type == DEST_REG)
5653 bl->total_benefit += benefit;
5656 /* Fatal error, biv missing for this giv? */
5659 if (type == DEST_ADDR)
5663 /* The giv can be replaced outright by the reduced register only if all
5664 of the following conditions are true:
5665 - the insn that sets the giv is always executed on any iteration
5666 on which the giv is used at all
5667 (there are two ways to deduce this:
5668 either the insn is executed on every iteration,
5669 or all uses follow that insn in the same basic block),
5670 - the giv is not used outside the loop
5671 - no assignments to the biv occur during the giv's lifetime. */
5673 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5674 /* Previous line always fails if INSN was moved by loop opt. */
5675 && uid_luid[REGNO_LAST_UID (REGNO (dest_reg))] < INSN_LUID (loop_end)
5676 && (! not_every_iteration
5677 || last_use_this_basic_block (dest_reg, insn)))
5679 /* Now check that there are no assignments to the biv within the
5680 giv's lifetime. This requires two separate checks. */
5682 /* Check each biv update, and fail if any are between the first
5683 and last use of the giv.
5685 If this loop contains an inner loop that was unrolled, then
5686 the insn modifying the biv may have been emitted by the loop
5687 unrolling code, and hence does not have a valid luid. Just
5688 mark the biv as not replaceable in this case. It is not very
5689 useful as a biv, because it is used in two different loops.
5690 It is very unlikely that we would be able to optimize the giv
5691 using this biv anyways. */
5694 for (b = bl->biv; b; b = b->next_iv)
5696 if (INSN_UID (b->insn) >= max_uid_for_loop
5697 || ((uid_luid[INSN_UID (b->insn)]
5698 >= uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))])
5699 && (uid_luid[INSN_UID (b->insn)]
5700 <= uid_luid[REGNO_LAST_UID (REGNO (dest_reg))])))
5703 v->not_replaceable = 1;
5708 /* If there are any backwards branches that go from after the
5709 biv update to before it, then this giv is not replaceable. */
5711 for (b = bl->biv; b; b = b->next_iv)
5712 if (back_branch_in_range_p (b->insn, loop_start, loop_end))
5715 v->not_replaceable = 1;
5721 /* May still be replaceable, we don't have enough info here to
5724 v->not_replaceable = 0;
5728 /* Record whether the add_val contains a const_int, for later use by
5733 v->no_const_addval = 1;
5734 if (tem == const0_rtx)
5736 else if (GET_CODE (tem) == CONST_INT)
5737 v->no_const_addval = 0;
5738 else if (GET_CODE (tem) == PLUS)
5742 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5743 tem = XEXP (tem, 0);
5744 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5745 tem = XEXP (tem, 1);
5749 if (GET_CODE (XEXP (tem, 1)) == CONST_INT)
5750 v->no_const_addval = 0;
5754 if (loop_dump_stream)
5756 if (type == DEST_REG)
5757 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
5758 INSN_UID (insn), REGNO (dest_reg));
5760 fprintf (loop_dump_stream, "Insn %d: dest address",
5763 fprintf (loop_dump_stream, " src reg %d benefit %d",
5764 REGNO (src_reg), v->benefit);
5765 fprintf (loop_dump_stream, " lifetime %d",
5769 fprintf (loop_dump_stream, " replaceable");
5771 if (v->no_const_addval)
5772 fprintf (loop_dump_stream, " ncav");
5774 if (GET_CODE (mult_val) == CONST_INT)
5776 fprintf (loop_dump_stream, " mult ");
5777 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (mult_val));
5781 fprintf (loop_dump_stream, " mult ");
5782 print_rtl (loop_dump_stream, mult_val);
5785 if (GET_CODE (add_val) == CONST_INT)
5787 fprintf (loop_dump_stream, " add ");
5788 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (add_val));
5792 fprintf (loop_dump_stream, " add ");
5793 print_rtl (loop_dump_stream, add_val);
5797 if (loop_dump_stream)
5798 fprintf (loop_dump_stream, "\n");
5803 /* All this does is determine whether a giv can be made replaceable because
5804 its final value can be calculated. This code can not be part of record_giv
5805 above, because final_giv_value requires that the number of loop iterations
5806 be known, and that can not be accurately calculated until after all givs
5807 have been identified. */
5810 check_final_value (v, loop_start, loop_end, n_iterations)
5811 struct induction *v;
5812 rtx loop_start, loop_end;
5813 unsigned HOST_WIDE_INT n_iterations;
5815 struct iv_class *bl;
5816 rtx final_value = 0;
5818 bl = reg_biv_class[REGNO (v->src_reg)];
5820 /* DEST_ADDR givs will never reach here, because they are always marked
5821 replaceable above in record_giv. */
5823 /* The giv can be replaced outright by the reduced register only if all
5824 of the following conditions are true:
5825 - the insn that sets the giv is always executed on any iteration
5826 on which the giv is used at all
5827 (there are two ways to deduce this:
5828 either the insn is executed on every iteration,
5829 or all uses follow that insn in the same basic block),
5830 - its final value can be calculated (this condition is different
5831 than the one above in record_giv)
5832 - no assignments to the biv occur during the giv's lifetime. */
5835 /* This is only called now when replaceable is known to be false. */
5836 /* Clear replaceable, so that it won't confuse final_giv_value. */
5840 if ((final_value = final_giv_value (v, loop_start, loop_end, n_iterations))
5841 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5843 int biv_increment_seen = 0;
5849 /* When trying to determine whether or not a biv increment occurs
5850 during the lifetime of the giv, we can ignore uses of the variable
5851 outside the loop because final_value is true. Hence we can not
5852 use regno_last_uid and regno_first_uid as above in record_giv. */
5854 /* Search the loop to determine whether any assignments to the
5855 biv occur during the giv's lifetime. Start with the insn
5856 that sets the giv, and search around the loop until we come
5857 back to that insn again.
5859 Also fail if there is a jump within the giv's lifetime that jumps
5860 to somewhere outside the lifetime but still within the loop. This
5861 catches spaghetti code where the execution order is not linear, and
5862 hence the above test fails. Here we assume that the giv lifetime
5863 does not extend from one iteration of the loop to the next, so as
5864 to make the test easier. Since the lifetime isn't known yet,
5865 this requires two loops. See also record_giv above. */
5867 last_giv_use = v->insn;
5873 p = NEXT_INSN (loop_start);
5877 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5878 || GET_CODE (p) == CALL_INSN)
5880 if (biv_increment_seen)
5882 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5885 v->not_replaceable = 1;
5889 else if (reg_set_p (v->src_reg, PATTERN (p)))
5890 biv_increment_seen = 1;
5891 else if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5896 /* Now that the lifetime of the giv is known, check for branches
5897 from within the lifetime to outside the lifetime if it is still
5907 p = NEXT_INSN (loop_start);
5908 if (p == last_giv_use)
5911 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5912 && LABEL_NAME (JUMP_LABEL (p))
5913 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
5914 && loop_insn_first_p (loop_start, JUMP_LABEL (p)))
5915 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
5916 && loop_insn_first_p (JUMP_LABEL (p), loop_end))))
5919 v->not_replaceable = 1;
5921 if (loop_dump_stream)
5922 fprintf (loop_dump_stream,
5923 "Found branch outside giv lifetime.\n");
5930 /* If it is replaceable, then save the final value. */
5932 v->final_value = final_value;
5935 if (loop_dump_stream && v->replaceable)
5936 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5937 INSN_UID (v->insn), REGNO (v->dest_reg));
5940 /* Update the status of whether a giv can derive other givs.
5942 We need to do something special if there is or may be an update to the biv
5943 between the time the giv is defined and the time it is used to derive
5946 In addition, a giv that is only conditionally set is not allowed to
5947 derive another giv once a label has been passed.
5949 The cases we look at are when a label or an update to a biv is passed. */
5952 update_giv_derive (p)
5955 struct iv_class *bl;
5956 struct induction *biv, *giv;
5960 /* Search all IV classes, then all bivs, and finally all givs.
5962 There are three cases we are concerned with. First we have the situation
5963 of a giv that is only updated conditionally. In that case, it may not
5964 derive any givs after a label is passed.
5966 The second case is when a biv update occurs, or may occur, after the
5967 definition of a giv. For certain biv updates (see below) that are
5968 known to occur between the giv definition and use, we can adjust the
5969 giv definition. For others, or when the biv update is conditional,
5970 we must prevent the giv from deriving any other givs. There are two
5971 sub-cases within this case.
5973 If this is a label, we are concerned with any biv update that is done
5974 conditionally, since it may be done after the giv is defined followed by
5975 a branch here (actually, we need to pass both a jump and a label, but
5976 this extra tracking doesn't seem worth it).
5978 If this is a jump, we are concerned about any biv update that may be
5979 executed multiple times. We are actually only concerned about
5980 backward jumps, but it is probably not worth performing the test
5981 on the jump again here.
5983 If this is a biv update, we must adjust the giv status to show that a
5984 subsequent biv update was performed. If this adjustment cannot be done,
5985 the giv cannot derive further givs. */
5987 for (bl = loop_iv_list; bl; bl = bl->next)
5988 for (biv = bl->biv; biv; biv = biv->next_iv)
5989 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5992 for (giv = bl->giv; giv; giv = giv->next_iv)
5994 /* If cant_derive is already true, there is no point in
5995 checking all of these conditions again. */
5996 if (giv->cant_derive)
5999 /* If this giv is conditionally set and we have passed a label,
6000 it cannot derive anything. */
6001 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
6002 giv->cant_derive = 1;
6004 /* Skip givs that have mult_val == 0, since
6005 they are really invariants. Also skip those that are
6006 replaceable, since we know their lifetime doesn't contain
6008 else if (giv->mult_val == const0_rtx || giv->replaceable)
6011 /* The only way we can allow this giv to derive another
6012 is if this is a biv increment and we can form the product
6013 of biv->add_val and giv->mult_val. In this case, we will
6014 be able to compute a compensation. */
6015 else if (biv->insn == p)
6019 if (biv->mult_val == const1_rtx)
6020 tem = simplify_giv_expr (gen_rtx_MULT (giv->mode,
6025 if (tem && giv->derive_adjustment)
6026 tem = simplify_giv_expr
6027 (gen_rtx_PLUS (giv->mode, tem, giv->derive_adjustment),
6031 giv->derive_adjustment = tem;
6033 giv->cant_derive = 1;
6035 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
6036 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
6037 giv->cant_derive = 1;
6042 /* Check whether an insn is an increment legitimate for a basic induction var.
6043 X is the source of insn P, or a part of it.
6044 MODE is the mode in which X should be interpreted.
6046 DEST_REG is the putative biv, also the destination of the insn.
6047 We accept patterns of these forms:
6048 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
6049 REG = INVARIANT + REG
6051 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
6052 store the additive term into *INC_VAL, and store the place where
6053 we found the additive term into *LOCATION.
6055 If X is an assignment of an invariant into DEST_REG, we set
6056 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
6058 We also want to detect a BIV when it corresponds to a variable
6059 whose mode was promoted via PROMOTED_MODE. In that case, an increment
6060 of the variable may be a PLUS that adds a SUBREG of that variable to
6061 an invariant and then sign- or zero-extends the result of the PLUS
6064 Most GIVs in such cases will be in the promoted mode, since that is the
6065 probably the natural computation mode (and almost certainly the mode
6066 used for addresses) on the machine. So we view the pseudo-reg containing
6067 the variable as the BIV, as if it were simply incremented.
6069 Note that treating the entire pseudo as a BIV will result in making
6070 simple increments to any GIVs based on it. However, if the variable
6071 overflows in its declared mode but not its promoted mode, the result will
6072 be incorrect. This is acceptable if the variable is signed, since
6073 overflows in such cases are undefined, but not if it is unsigned, since
6074 those overflows are defined. So we only check for SIGN_EXTEND and
6077 If we cannot find a biv, we return 0. */
6080 basic_induction_var (x, mode, dest_reg, p, inc_val, mult_val, location)
6082 enum machine_mode mode;
6089 register enum rtx_code code;
6093 code = GET_CODE (x);
6098 if (rtx_equal_p (XEXP (x, 0), dest_reg)
6099 || (GET_CODE (XEXP (x, 0)) == SUBREG
6100 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
6101 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
6103 argp = &XEXP (x, 1);
6105 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
6106 || (GET_CODE (XEXP (x, 1)) == SUBREG
6107 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
6108 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
6110 argp = &XEXP (x, 0);
6116 if (invariant_p (arg) != 1)
6119 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
6120 *mult_val = const1_rtx;
6125 /* If this is a SUBREG for a promoted variable, check the inner
6127 if (SUBREG_PROMOTED_VAR_P (x))
6128 return basic_induction_var (SUBREG_REG (x), GET_MODE (SUBREG_REG (x)),
6129 dest_reg, p, inc_val, mult_val, location);
6133 /* If this register is assigned in a previous insn, look at its
6134 source, but don't go outside the loop or past a label. */
6140 insn = PREV_INSN (insn);
6141 } while (insn && GET_CODE (insn) == NOTE
6142 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6146 set = single_set (insn);
6150 if ((SET_DEST (set) == x
6151 || (GET_CODE (SET_DEST (set)) == SUBREG
6152 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set)))
6154 && (GET_MODE_CLASS (GET_MODE (SET_DEST (set)))
6156 && SUBREG_REG (SET_DEST (set)) == x))
6157 && basic_induction_var (SET_SRC (set),
6158 (GET_MODE (SET_SRC (set)) == VOIDmode
6160 : GET_MODE (SET_SRC (set))),
6162 inc_val, mult_val, location))
6165 /* ... fall through ... */
6167 /* Can accept constant setting of biv only when inside inner most loop.
6168 Otherwise, a biv of an inner loop may be incorrectly recognized
6169 as a biv of the outer loop,
6170 causing code to be moved INTO the inner loop. */
6172 if (invariant_p (x) != 1)
6177 /* convert_modes aborts if we try to convert to or from CCmode, so just
6178 exclude that case. It is very unlikely that a condition code value
6179 would be a useful iterator anyways. */
6180 if (this_loop_info.loops_enclosed == 1
6181 && GET_MODE_CLASS (mode) != MODE_CC
6182 && GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
6184 /* Possible bug here? Perhaps we don't know the mode of X. */
6185 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
6186 *mult_val = const0_rtx;
6193 return basic_induction_var (XEXP (x, 0), GET_MODE (XEXP (x, 0)),
6194 dest_reg, p, inc_val, mult_val, location);
6197 /* Similar, since this can be a sign extension. */
6198 for (insn = PREV_INSN (p);
6199 (insn && GET_CODE (insn) == NOTE
6200 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6201 insn = PREV_INSN (insn))
6205 set = single_set (insn);
6207 if (set && SET_DEST (set) == XEXP (x, 0)
6208 && GET_CODE (XEXP (x, 1)) == CONST_INT
6209 && INTVAL (XEXP (x, 1)) >= 0
6210 && GET_CODE (SET_SRC (set)) == ASHIFT
6211 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
6212 return basic_induction_var (XEXP (SET_SRC (set), 0),
6213 GET_MODE (XEXP (x, 0)),
6214 dest_reg, insn, inc_val, mult_val,
6223 /* A general induction variable (giv) is any quantity that is a linear
6224 function of a basic induction variable,
6225 i.e. giv = biv * mult_val + add_val.
6226 The coefficients can be any loop invariant quantity.
6227 A giv need not be computed directly from the biv;
6228 it can be computed by way of other givs. */
6230 /* Determine whether X computes a giv.
6231 If it does, return a nonzero value
6232 which is the benefit from eliminating the computation of X;
6233 set *SRC_REG to the register of the biv that it is computed from;
6234 set *ADD_VAL and *MULT_VAL to the coefficients,
6235 such that the value of X is biv * mult + add; */
6238 general_induction_var (x, src_reg, add_val, mult_val, is_addr, pbenefit)
6249 /* If this is an invariant, forget it, it isn't a giv. */
6250 if (invariant_p (x) == 1)
6253 /* See if the expression could be a giv and get its form.
6254 Mark our place on the obstack in case we don't find a giv. */
6255 storage = (char *) oballoc (0);
6257 x = simplify_giv_expr (x, pbenefit);
6264 switch (GET_CODE (x))
6268 /* Since this is now an invariant and wasn't before, it must be a giv
6269 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6271 *src_reg = loop_iv_list->biv->dest_reg;
6272 *mult_val = const0_rtx;
6277 /* This is equivalent to a BIV. */
6279 *mult_val = const1_rtx;
6280 *add_val = const0_rtx;
6284 /* Either (plus (biv) (invar)) or
6285 (plus (mult (biv) (invar_1)) (invar_2)). */
6286 if (GET_CODE (XEXP (x, 0)) == MULT)
6288 *src_reg = XEXP (XEXP (x, 0), 0);
6289 *mult_val = XEXP (XEXP (x, 0), 1);
6293 *src_reg = XEXP (x, 0);
6294 *mult_val = const1_rtx;
6296 *add_val = XEXP (x, 1);
6300 /* ADD_VAL is zero. */
6301 *src_reg = XEXP (x, 0);
6302 *mult_val = XEXP (x, 1);
6303 *add_val = const0_rtx;
6310 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6311 unless they are CONST_INT). */
6312 if (GET_CODE (*add_val) == USE)
6313 *add_val = XEXP (*add_val, 0);
6314 if (GET_CODE (*mult_val) == USE)
6315 *mult_val = XEXP (*mult_val, 0);
6320 *pbenefit += ADDRESS_COST (orig_x) - reg_address_cost;
6322 *pbenefit += rtx_cost (orig_x, MEM) - reg_address_cost;
6326 *pbenefit += rtx_cost (orig_x, SET);
6328 /* Always return true if this is a giv so it will be detected as such,
6329 even if the benefit is zero or negative. This allows elimination
6330 of bivs that might otherwise not be eliminated. */
6334 /* Given an expression, X, try to form it as a linear function of a biv.
6335 We will canonicalize it to be of the form
6336 (plus (mult (BIV) (invar_1))
6338 with possible degeneracies.
6340 The invariant expressions must each be of a form that can be used as a
6341 machine operand. We surround then with a USE rtx (a hack, but localized
6342 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6343 routine; it is the caller's responsibility to strip them.
6345 If no such canonicalization is possible (i.e., two biv's are used or an
6346 expression that is neither invariant nor a biv or giv), this routine
6349 For a non-zero return, the result will have a code of CONST_INT, USE,
6350 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6352 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6354 static rtx sge_plus PARAMS ((enum machine_mode, rtx, rtx));
6355 static rtx sge_plus_constant PARAMS ((rtx, rtx));
6356 static int cmp_combine_givs_stats PARAMS ((const PTR, const PTR));
6357 static int cmp_recombine_givs_stats PARAMS ((const PTR, const PTR));
6360 simplify_giv_expr (x, benefit)
6364 enum machine_mode mode = GET_MODE (x);
6368 /* If this is not an integer mode, or if we cannot do arithmetic in this
6369 mode, this can't be a giv. */
6370 if (mode != VOIDmode
6371 && (GET_MODE_CLASS (mode) != MODE_INT
6372 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
6375 switch (GET_CODE (x))
6378 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
6379 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
6380 if (arg0 == 0 || arg1 == 0)
6383 /* Put constant last, CONST_INT last if both constant. */
6384 if ((GET_CODE (arg0) == USE
6385 || GET_CODE (arg0) == CONST_INT)
6386 && ! ((GET_CODE (arg0) == USE
6387 && GET_CODE (arg1) == USE)
6388 || GET_CODE (arg1) == CONST_INT))
6389 tem = arg0, arg0 = arg1, arg1 = tem;
6391 /* Handle addition of zero, then addition of an invariant. */
6392 if (arg1 == const0_rtx)
6394 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
6395 switch (GET_CODE (arg0))
6399 /* Adding two invariants must result in an invariant, so enclose
6400 addition operation inside a USE and return it. */
6401 if (GET_CODE (arg0) == USE)
6402 arg0 = XEXP (arg0, 0);
6403 if (GET_CODE (arg1) == USE)
6404 arg1 = XEXP (arg1, 0);
6406 if (GET_CODE (arg0) == CONST_INT)
6407 tem = arg0, arg0 = arg1, arg1 = tem;
6408 if (GET_CODE (arg1) == CONST_INT)
6409 tem = sge_plus_constant (arg0, arg1);
6411 tem = sge_plus (mode, arg0, arg1);
6413 if (GET_CODE (tem) != CONST_INT)
6414 tem = gen_rtx_USE (mode, tem);
6419 /* biv + invar or mult + invar. Return sum. */
6420 return gen_rtx_PLUS (mode, arg0, arg1);
6423 /* (a + invar_1) + invar_2. Associate. */
6425 simplify_giv_expr (gen_rtx_PLUS (mode,
6436 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6437 MULT to reduce cases. */
6438 if (GET_CODE (arg0) == REG)
6439 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
6440 if (GET_CODE (arg1) == REG)
6441 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
6443 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6444 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6445 Recurse to associate the second PLUS. */
6446 if (GET_CODE (arg1) == MULT)
6447 tem = arg0, arg0 = arg1, arg1 = tem;
6449 if (GET_CODE (arg1) == PLUS)
6451 simplify_giv_expr (gen_rtx_PLUS (mode,
6452 gen_rtx_PLUS (mode, arg0,
6457 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6458 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
6461 if (!rtx_equal_p (arg0, arg1))
6464 return simplify_giv_expr (gen_rtx_MULT (mode,
6472 /* Handle "a - b" as "a + b * (-1)". */
6473 return simplify_giv_expr (gen_rtx_PLUS (mode,
6481 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
6482 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
6483 if (arg0 == 0 || arg1 == 0)
6486 /* Put constant last, CONST_INT last if both constant. */
6487 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
6488 && GET_CODE (arg1) != CONST_INT)
6489 tem = arg0, arg0 = arg1, arg1 = tem;
6491 /* If second argument is not now constant, not giv. */
6492 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
6495 /* Handle multiply by 0 or 1. */
6496 if (arg1 == const0_rtx)
6499 else if (arg1 == const1_rtx)
6502 switch (GET_CODE (arg0))
6505 /* biv * invar. Done. */
6506 return gen_rtx_MULT (mode, arg0, arg1);
6509 /* Product of two constants. */
6510 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6513 /* invar * invar. It is a giv, but very few of these will
6514 actually pay off, so limit to simple registers. */
6515 if (GET_CODE (arg1) != CONST_INT)
6518 arg0 = XEXP (arg0, 0);
6519 if (GET_CODE (arg0) == REG)
6520 tem = gen_rtx_MULT (mode, arg0, arg1);
6521 else if (GET_CODE (arg0) == MULT
6522 && GET_CODE (XEXP (arg0, 0)) == REG
6523 && GET_CODE (XEXP (arg0, 1)) == CONST_INT)
6525 tem = gen_rtx_MULT (mode, XEXP (arg0, 0),
6526 GEN_INT (INTVAL (XEXP (arg0, 1))
6531 return gen_rtx_USE (mode, tem);
6534 /* (a * invar_1) * invar_2. Associate. */
6535 return simplify_giv_expr (gen_rtx_MULT (mode,
6543 /* (a + invar_1) * invar_2. Distribute. */
6544 return simplify_giv_expr (gen_rtx_PLUS (mode,
6558 /* Shift by constant is multiply by power of two. */
6559 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6563 simplify_giv_expr (gen_rtx_MULT (mode,
6565 GEN_INT ((HOST_WIDE_INT) 1
6566 << INTVAL (XEXP (x, 1)))),
6570 /* "-a" is "a * (-1)" */
6571 return simplify_giv_expr (gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6575 /* "~a" is "-a - 1". Silly, but easy. */
6576 return simplify_giv_expr (gen_rtx_MINUS (mode,
6577 gen_rtx_NEG (mode, XEXP (x, 0)),
6582 /* Already in proper form for invariant. */
6586 /* If this is a new register, we can't deal with it. */
6587 if (REGNO (x) >= max_reg_before_loop)
6590 /* Check for biv or giv. */
6591 switch (REG_IV_TYPE (REGNO (x)))
6595 case GENERAL_INDUCT:
6597 struct induction *v = REG_IV_INFO (REGNO (x));
6599 /* Form expression from giv and add benefit. Ensure this giv
6600 can derive another and subtract any needed adjustment if so. */
6601 *benefit += v->benefit;
6605 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode,
6606 v->src_reg, v->mult_val),
6609 if (v->derive_adjustment)
6610 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6611 return simplify_giv_expr (tem, benefit);
6615 /* If it isn't an induction variable, and it is invariant, we
6616 may be able to simplify things further by looking through
6617 the bits we just moved outside the loop. */
6618 if (invariant_p (x) == 1)
6622 for (m = the_movables; m ; m = m->next)
6623 if (rtx_equal_p (x, m->set_dest))
6625 /* Ok, we found a match. Substitute and simplify. */
6627 /* If we match another movable, we must use that, as
6628 this one is going away. */
6630 return simplify_giv_expr (m->match->set_dest, benefit);
6632 /* If consec is non-zero, this is a member of a group of
6633 instructions that were moved together. We handle this
6634 case only to the point of seeking to the last insn and
6635 looking for a REG_EQUAL. Fail if we don't find one. */
6640 do { tem = NEXT_INSN (tem); } while (--i > 0);
6642 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6644 tem = XEXP (tem, 0);
6648 tem = single_set (m->insn);
6650 tem = SET_SRC (tem);
6655 /* What we are most interested in is pointer
6656 arithmetic on invariants -- only take
6657 patterns we may be able to do something with. */
6658 if (GET_CODE (tem) == PLUS
6659 || GET_CODE (tem) == MULT
6660 || GET_CODE (tem) == ASHIFT
6661 || GET_CODE (tem) == CONST_INT
6662 || GET_CODE (tem) == SYMBOL_REF)
6664 tem = simplify_giv_expr (tem, benefit);
6668 else if (GET_CODE (tem) == CONST
6669 && GET_CODE (XEXP (tem, 0)) == PLUS
6670 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6671 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6673 tem = simplify_giv_expr (XEXP (tem, 0), benefit);
6684 /* Fall through to general case. */
6686 /* If invariant, return as USE (unless CONST_INT).
6687 Otherwise, not giv. */
6688 if (GET_CODE (x) == USE)
6691 if (invariant_p (x) == 1)
6693 if (GET_CODE (x) == CONST_INT)
6695 if (GET_CODE (x) == CONST
6696 && GET_CODE (XEXP (x, 0)) == PLUS
6697 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6698 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6700 return gen_rtx_USE (mode, x);
6707 /* This routine folds invariants such that there is only ever one
6708 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6711 sge_plus_constant (x, c)
6714 if (GET_CODE (x) == CONST_INT)
6715 return GEN_INT (INTVAL (x) + INTVAL (c));
6716 else if (GET_CODE (x) != PLUS)
6717 return gen_rtx_PLUS (GET_MODE (x), x, c);
6718 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6720 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6721 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6723 else if (GET_CODE (XEXP (x, 0)) == PLUS
6724 || GET_CODE (XEXP (x, 1)) != PLUS)
6726 return gen_rtx_PLUS (GET_MODE (x),
6727 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6731 return gen_rtx_PLUS (GET_MODE (x),
6732 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6737 sge_plus (mode, x, y)
6738 enum machine_mode mode;
6741 while (GET_CODE (y) == PLUS)
6743 rtx a = XEXP (y, 0);
6744 if (GET_CODE (a) == CONST_INT)
6745 x = sge_plus_constant (x, a);
6747 x = gen_rtx_PLUS (mode, x, a);
6750 if (GET_CODE (y) == CONST_INT)
6751 x = sge_plus_constant (x, y);
6753 x = gen_rtx_PLUS (mode, x, y);
6757 /* Help detect a giv that is calculated by several consecutive insns;
6761 The caller has already identified the first insn P as having a giv as dest;
6762 we check that all other insns that set the same register follow
6763 immediately after P, that they alter nothing else,
6764 and that the result of the last is still a giv.
6766 The value is 0 if the reg set in P is not really a giv.
6767 Otherwise, the value is the amount gained by eliminating
6768 all the consecutive insns that compute the value.
6770 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6771 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6773 The coefficients of the ultimate giv value are stored in
6774 *MULT_VAL and *ADD_VAL. */
6777 consec_sets_giv (first_benefit, p, src_reg, dest_reg,
6778 add_val, mult_val, last_consec_insn)
6785 rtx *last_consec_insn;
6793 /* Indicate that this is a giv so that we can update the value produced in
6794 each insn of the multi-insn sequence.
6796 This induction structure will be used only by the call to
6797 general_induction_var below, so we can allocate it on our stack.
6798 If this is a giv, our caller will replace the induct var entry with
6799 a new induction structure. */
6801 = (struct induction *) alloca (sizeof (struct induction));
6802 v->src_reg = src_reg;
6803 v->mult_val = *mult_val;
6804 v->add_val = *add_val;
6805 v->benefit = first_benefit;
6807 v->derive_adjustment = 0;
6809 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
6810 REG_IV_INFO (REGNO (dest_reg)) = v;
6812 count = VARRAY_INT (n_times_set, REGNO (dest_reg)) - 1;
6817 code = GET_CODE (p);
6819 /* If libcall, skip to end of call sequence. */
6820 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6824 && (set = single_set (p))
6825 && GET_CODE (SET_DEST (set)) == REG
6826 && SET_DEST (set) == dest_reg
6827 && (general_induction_var (SET_SRC (set), &src_reg,
6828 add_val, mult_val, 0, &benefit)
6829 /* Giv created by equivalent expression. */
6830 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6831 && general_induction_var (XEXP (temp, 0), &src_reg,
6832 add_val, mult_val, 0, &benefit)))
6833 && src_reg == v->src_reg)
6835 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6836 benefit += libcall_benefit (p);
6839 v->mult_val = *mult_val;
6840 v->add_val = *add_val;
6841 v->benefit = benefit;
6843 else if (code != NOTE)
6845 /* Allow insns that set something other than this giv to a
6846 constant. Such insns are needed on machines which cannot
6847 include long constants and should not disqualify a giv. */
6849 && (set = single_set (p))
6850 && SET_DEST (set) != dest_reg
6851 && CONSTANT_P (SET_SRC (set)))
6854 REG_IV_TYPE (REGNO (dest_reg)) = UNKNOWN_INDUCT;
6859 *last_consec_insn = p;
6863 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6864 represented by G1. If no such expression can be found, or it is clear that
6865 it cannot possibly be a valid address, 0 is returned.
6867 To perform the computation, we note that
6870 where `v' is the biv.
6872 So G2 = (y/b) * G1 + (b - a*y/x).
6874 Note that MULT = y/x.
6876 Update: A and B are now allowed to be additive expressions such that
6877 B contains all variables in A. That is, computing B-A will not require
6878 subtracting variables. */
6881 express_from_1 (a, b, mult)
6884 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6886 if (mult == const0_rtx)
6889 /* If MULT is not 1, we cannot handle A with non-constants, since we
6890 would then be required to subtract multiples of the registers in A.
6891 This is theoretically possible, and may even apply to some Fortran
6892 constructs, but it is a lot of work and we do not attempt it here. */
6894 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
6897 /* In general these structures are sorted top to bottom (down the PLUS
6898 chain), but not left to right across the PLUS. If B is a higher
6899 order giv than A, we can strip one level and recurse. If A is higher
6900 order, we'll eventually bail out, but won't know that until the end.
6901 If they are the same, we'll strip one level around this loop. */
6903 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
6905 rtx ra, rb, oa, ob, tmp;
6907 ra = XEXP (a, 0), oa = XEXP (a, 1);
6908 if (GET_CODE (ra) == PLUS)
6909 tmp = ra, ra = oa, oa = tmp;
6911 rb = XEXP (b, 0), ob = XEXP (b, 1);
6912 if (GET_CODE (rb) == PLUS)
6913 tmp = rb, rb = ob, ob = tmp;
6915 if (rtx_equal_p (ra, rb))
6916 /* We matched: remove one reg completely. */
6918 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
6919 /* An alternate match. */
6921 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
6922 /* An alternate match. */
6926 /* Indicates an extra register in B. Strip one level from B and
6927 recurse, hoping B was the higher order expression. */
6928 ob = express_from_1 (a, ob, mult);
6931 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
6935 /* Here we are at the last level of A, go through the cases hoping to
6936 get rid of everything but a constant. */
6938 if (GET_CODE (a) == PLUS)
6942 ra = XEXP (a, 0), oa = XEXP (a, 1);
6943 if (rtx_equal_p (oa, b))
6945 else if (!rtx_equal_p (ra, b))
6948 if (GET_CODE (oa) != CONST_INT)
6951 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
6953 else if (GET_CODE (a) == CONST_INT)
6955 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
6957 else if (GET_CODE (b) == PLUS)
6959 if (rtx_equal_p (a, XEXP (b, 0)))
6961 else if (rtx_equal_p (a, XEXP (b, 1)))
6966 else if (rtx_equal_p (a, b))
6973 express_from (g1, g2)
6974 struct induction *g1, *g2;
6978 /* The value that G1 will be multiplied by must be a constant integer. Also,
6979 the only chance we have of getting a valid address is if b*c/a (see above
6980 for notation) is also an integer. */
6981 if (GET_CODE (g1->mult_val) == CONST_INT
6982 && GET_CODE (g2->mult_val) == CONST_INT)
6984 if (g1->mult_val == const0_rtx
6985 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
6987 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
6989 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
6993 /* ??? Find out if the one is a multiple of the other? */
6997 add = express_from_1 (g1->add_val, g2->add_val, mult);
6998 if (add == NULL_RTX)
7000 /* Failed. If we've got a multiplication factor between G1 and G2,
7001 scale G1's addend and try again. */
7002 if (INTVAL (mult) > 1)
7004 rtx g1_add_val = g1->add_val;
7005 if (GET_CODE (g1_add_val) == MULT
7006 && GET_CODE (XEXP (g1_add_val, 1)) == CONST_INT)
7009 m = INTVAL (mult) * INTVAL (XEXP (g1_add_val, 1));
7010 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val),
7011 XEXP (g1_add_val, 0), GEN_INT (m));
7015 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val), g1_add_val,
7019 add = express_from_1 (g1_add_val, g2->add_val, const1_rtx);
7022 if (add == NULL_RTX)
7025 /* Form simplified final result. */
7026 if (mult == const0_rtx)
7028 else if (mult == const1_rtx)
7029 mult = g1->dest_reg;
7031 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
7033 if (add == const0_rtx)
7037 if (GET_CODE (add) == PLUS
7038 && CONSTANT_P (XEXP (add, 1)))
7040 rtx tem = XEXP (add, 1);
7041 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
7045 return gen_rtx_PLUS (g2->mode, mult, add);
7050 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7051 represented by G1. This indicates that G2 should be combined with G1 and
7052 that G2 can use (either directly or via an address expression) a register
7053 used to represent G1. */
7056 combine_givs_p (g1, g2)
7057 struct induction *g1, *g2;
7059 rtx tem = express_from (g1, g2);
7061 /* If these givs are identical, they can be combined. We use the results
7062 of express_from because the addends are not in a canonical form, so
7063 rtx_equal_p is a weaker test. */
7064 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
7065 combination to be the other way round. */
7066 if (tem == g1->dest_reg
7067 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
7069 return g1->dest_reg;
7072 /* If G2 can be expressed as a function of G1 and that function is valid
7073 as an address and no more expensive than using a register for G2,
7074 the expression of G2 in terms of G1 can be used. */
7076 && g2->giv_type == DEST_ADDR
7077 && memory_address_p (g2->mem_mode, tem)
7078 /* ??? Looses, especially with -fforce-addr, where *g2->location
7079 will always be a register, and so anything more complicated
7083 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
7085 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
7096 struct combine_givs_stats
7103 cmp_combine_givs_stats (xp, yp)
7107 const struct combine_givs_stats * const x =
7108 (const struct combine_givs_stats *) xp;
7109 const struct combine_givs_stats * const y =
7110 (const struct combine_givs_stats *) yp;
7112 d = y->total_benefit - x->total_benefit;
7113 /* Stabilize the sort. */
7115 d = x->giv_number - y->giv_number;
7119 /* Check all pairs of givs for iv_class BL and see if any can be combined with
7120 any other. If so, point SAME to the giv combined with and set NEW_REG to
7121 be an expression (in terms of the other giv's DEST_REG) equivalent to the
7122 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
7126 struct iv_class *bl;
7128 /* Additional benefit to add for being combined multiple times. */
7129 const int extra_benefit = 3;
7131 struct induction *g1, *g2, **giv_array;
7132 int i, j, k, giv_count;
7133 struct combine_givs_stats *stats;
7136 /* Count givs, because bl->giv_count is incorrect here. */
7138 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7143 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
7145 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7147 giv_array[i++] = g1;
7149 stats = (struct combine_givs_stats *) xcalloc (giv_count, sizeof (*stats));
7150 can_combine = (rtx *) xcalloc (giv_count, giv_count * sizeof(rtx));
7152 for (i = 0; i < giv_count; i++)
7158 stats[i].giv_number = i;
7160 /* If a DEST_REG GIV is used only once, do not allow it to combine
7161 with anything, for in doing so we will gain nothing that cannot
7162 be had by simply letting the GIV with which we would have combined
7163 to be reduced on its own. The losage shows up in particular with
7164 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7165 be seen elsewhere as well. */
7166 if (g1->giv_type == DEST_REG
7167 && (single_use = VARRAY_RTX (reg_single_usage, REGNO (g1->dest_reg)))
7168 && single_use != const0_rtx)
7171 this_benefit = g1->benefit;
7172 /* Add an additional weight for zero addends. */
7173 if (g1->no_const_addval)
7176 for (j = 0; j < giv_count; j++)
7182 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
7184 can_combine[i*giv_count + j] = this_combine;
7185 this_benefit += g2->benefit + extra_benefit;
7188 stats[i].total_benefit = this_benefit;
7191 /* Iterate, combining until we can't. */
7193 qsort (stats, giv_count, sizeof(*stats), cmp_combine_givs_stats);
7195 if (loop_dump_stream)
7197 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
7198 for (k = 0; k < giv_count; k++)
7200 g1 = giv_array[stats[k].giv_number];
7201 if (!g1->combined_with && !g1->same)
7202 fprintf (loop_dump_stream, " {%d, %d}",
7203 INSN_UID (giv_array[stats[k].giv_number]->insn),
7204 stats[k].total_benefit);
7206 putc ('\n', loop_dump_stream);
7209 for (k = 0; k < giv_count; k++)
7211 int g1_add_benefit = 0;
7213 i = stats[k].giv_number;
7216 /* If it has already been combined, skip. */
7217 if (g1->combined_with || g1->same)
7220 for (j = 0; j < giv_count; j++)
7223 if (g1 != g2 && can_combine[i*giv_count + j]
7224 /* If it has already been combined, skip. */
7225 && ! g2->same && ! g2->combined_with)
7229 g2->new_reg = can_combine[i*giv_count + j];
7231 g1->combined_with++;
7232 g1->lifetime += g2->lifetime;
7234 g1_add_benefit += g2->benefit;
7236 /* ??? The new final_[bg]iv_value code does a much better job
7237 of finding replaceable giv's, and hence this code may no
7238 longer be necessary. */
7239 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
7240 g1_add_benefit -= copy_cost;
7242 /* To help optimize the next set of combinations, remove
7243 this giv from the benefits of other potential mates. */
7244 for (l = 0; l < giv_count; ++l)
7246 int m = stats[l].giv_number;
7247 if (can_combine[m*giv_count + j])
7248 stats[l].total_benefit -= g2->benefit + extra_benefit;
7251 if (loop_dump_stream)
7252 fprintf (loop_dump_stream,
7253 "giv at %d combined with giv at %d\n",
7254 INSN_UID (g2->insn), INSN_UID (g1->insn));
7258 /* To help optimize the next set of combinations, remove
7259 this giv from the benefits of other potential mates. */
7260 if (g1->combined_with)
7262 for (j = 0; j < giv_count; ++j)
7264 int m = stats[j].giv_number;
7265 if (can_combine[m*giv_count + i])
7266 stats[j].total_benefit -= g1->benefit + extra_benefit;
7269 g1->benefit += g1_add_benefit;
7271 /* We've finished with this giv, and everything it touched.
7272 Restart the combination so that proper weights for the
7273 rest of the givs are properly taken into account. */
7274 /* ??? Ideally we would compact the arrays at this point, so
7275 as to not cover old ground. But sanely compacting
7276 can_combine is tricky. */
7286 struct recombine_givs_stats
7289 int start_luid, end_luid;
7292 /* Used below as comparison function for qsort. We want a ascending luid
7293 when scanning the array starting at the end, thus the arguments are
7296 cmp_recombine_givs_stats (xp, yp)
7300 const struct recombine_givs_stats * const x =
7301 (const struct recombine_givs_stats *) xp;
7302 const struct recombine_givs_stats * const y =
7303 (const struct recombine_givs_stats *) yp;
7305 d = y->start_luid - x->start_luid;
7306 /* Stabilize the sort. */
7308 d = y->giv_number - x->giv_number;
7312 /* Scan X, which is a part of INSN, for the end of life of a giv. Also
7313 look for the start of life of a giv where the start has not been seen
7314 yet to unlock the search for the end of its life.
7315 Only consider givs that belong to BIV.
7316 Return the total number of lifetime ends that have been found. */
7318 find_life_end (x, stats, insn, biv)
7320 struct recombine_givs_stats *stats;
7327 code = GET_CODE (x);
7332 rtx reg = SET_DEST (x);
7333 if (GET_CODE (reg) == REG)
7335 int regno = REGNO (reg);
7336 struct induction *v = REG_IV_INFO (regno);
7338 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7340 && v->src_reg == biv
7341 && stats[v->ix].end_luid <= 0)
7343 /* If we see a 0 here for end_luid, it means that we have
7344 scanned the entire loop without finding any use at all.
7345 We must not predicate this code on a start_luid match
7346 since that would make the test fail for givs that have
7347 been hoisted out of inner loops. */
7348 if (stats[v->ix].end_luid == 0)
7350 stats[v->ix].end_luid = stats[v->ix].start_luid;
7351 return 1 + find_life_end (SET_SRC (x), stats, insn, biv);
7353 else if (stats[v->ix].start_luid == INSN_LUID (insn))
7354 stats[v->ix].end_luid = 0;
7356 return find_life_end (SET_SRC (x), stats, insn, biv);
7362 int regno = REGNO (x);
7363 struct induction *v = REG_IV_INFO (regno);
7365 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7367 && v->src_reg == biv
7368 && stats[v->ix].end_luid == 0)
7370 while (INSN_UID (insn) >= max_uid_for_loop)
7371 insn = NEXT_INSN (insn);
7372 stats[v->ix].end_luid = INSN_LUID (insn);
7385 fmt = GET_RTX_FORMAT (code);
7387 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7390 retval += find_life_end (XEXP (x, i), stats, insn, biv);
7392 else if (fmt[i] == 'E')
7393 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7394 retval += find_life_end (XVECEXP (x, i, j), stats, insn, biv);
7399 /* For each giv that has been combined with another, look if
7400 we can combine it with the most recently used one instead.
7401 This tends to shorten giv lifetimes, and helps the next step:
7402 try to derive givs from other givs. */
7404 recombine_givs (bl, loop_start, loop_end, unroll_p)
7405 struct iv_class *bl;
7406 rtx loop_start, loop_end;
7409 struct induction *v, **giv_array, *last_giv;
7410 struct recombine_givs_stats *stats;
7413 int ends_need_computing;
7415 for (giv_count = 0, v = bl->giv; v; v = v->next_iv)
7421 = (struct induction **) xmalloc (giv_count * sizeof (struct induction *));
7422 stats = (struct recombine_givs_stats *) xmalloc (giv_count * sizeof *stats);
7424 /* Initialize stats and set up the ix field for each giv in stats to name
7425 the corresponding index into stats. */
7426 for (i = 0, v = bl->giv; v; v = v->next_iv)
7433 stats[i].giv_number = i;
7434 /* If this giv has been hoisted out of an inner loop, use the luid of
7435 the previous insn. */
7436 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7438 stats[i].start_luid = INSN_LUID (p);
7442 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7444 /* Set up the ix field for each giv in stats to name
7445 the corresponding index into stats, and
7446 do the actual most-recently-used recombination. */
7447 for (last_giv = 0, i = giv_count - 1; i >= 0; i--)
7449 v = giv_array[stats[i].giv_number];
7453 struct induction *old_same = v->same;
7456 /* combine_givs_p actually says if we can make this transformation.
7457 The other tests are here only to avoid keeping a giv alive
7458 that could otherwise be eliminated. */
7460 && ((old_same->maybe_dead && ! old_same->combined_with)
7461 || ! last_giv->maybe_dead
7462 || last_giv->combined_with)
7463 && (new_combine = combine_givs_p (last_giv, v)))
7465 old_same->combined_with--;
7466 v->new_reg = new_combine;
7468 last_giv->combined_with++;
7469 /* No need to update lifetimes / benefits here since we have
7470 already decided what to reduce. */
7472 if (loop_dump_stream)
7474 fprintf (loop_dump_stream,
7475 "giv at %d recombined with giv at %d as ",
7476 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7477 print_rtl (loop_dump_stream, v->new_reg);
7478 putc ('\n', loop_dump_stream);
7484 else if (v->giv_type != DEST_REG)
7487 || (last_giv->maybe_dead && ! last_giv->combined_with)
7489 || v->combined_with)
7493 ends_need_computing = 0;
7494 /* For each DEST_REG giv, compute lifetime starts, and try to compute
7495 lifetime ends from regscan info. */
7496 for (i = giv_count - 1; i >= 0; i--)
7498 v = giv_array[stats[i].giv_number];
7501 if (v->giv_type == DEST_ADDR)
7503 /* Loop unrolling of an inner loop can even create new DEST_REG
7506 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7508 stats[i].start_luid = stats[i].end_luid = INSN_LUID (p);
7510 stats[i].end_luid++;
7512 else /* v->giv_type == DEST_REG */
7516 stats[i].start_luid = INSN_LUID (v->insn);
7517 stats[i].end_luid = INSN_LUID (v->last_use);
7519 else if (INSN_UID (v->insn) >= max_uid_for_loop)
7522 /* This insn has been created by loop optimization on an inner
7523 loop. We don't have a proper start_luid that will match
7524 when we see the first set. But we do know that there will
7525 be no use before the set, so we can set end_luid to 0 so that
7526 we'll start looking for the last use right away. */
7527 for (p = PREV_INSN (v->insn); INSN_UID (p) >= max_uid_for_loop; )
7529 stats[i].start_luid = INSN_LUID (p);
7530 stats[i].end_luid = 0;
7531 ends_need_computing++;
7535 int regno = REGNO (v->dest_reg);
7536 int count = VARRAY_INT (n_times_set, regno) - 1;
7539 /* Find the first insn that sets the giv, so that we can verify
7540 if this giv's lifetime wraps around the loop. We also need
7541 the luid of the first setting insn in order to detect the
7542 last use properly. */
7545 p = prev_nonnote_insn (p);
7546 if (reg_set_p (v->dest_reg, p))
7550 stats[i].start_luid = INSN_LUID (p);
7551 if (stats[i].start_luid > uid_luid[REGNO_FIRST_UID (regno)])
7553 stats[i].end_luid = -1;
7554 ends_need_computing++;
7558 stats[i].end_luid = uid_luid[REGNO_LAST_UID (regno)];
7559 if (stats[i].end_luid > INSN_LUID (loop_end))
7561 stats[i].end_luid = -1;
7562 ends_need_computing++;
7569 /* If the regscan information was unconclusive for one or more DEST_REG
7570 givs, scan the all insn in the loop to find out lifetime ends. */
7571 if (ends_need_computing)
7573 rtx biv = bl->biv->src_reg;
7578 if (p == loop_start)
7581 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
7583 ends_need_computing -= find_life_end (PATTERN (p), stats, p, biv);
7585 while (ends_need_computing);
7588 /* Set start_luid back to the last insn that sets the giv. This allows
7589 more combinations. */
7590 for (i = giv_count - 1; i >= 0; i--)
7592 v = giv_array[stats[i].giv_number];
7595 if (INSN_UID (v->insn) < max_uid_for_loop)
7596 stats[i].start_luid = INSN_LUID (v->insn);
7599 /* Now adjust lifetime ends by taking combined givs into account. */
7600 for (i = giv_count - 1; i >= 0; i--)
7605 v = giv_array[stats[i].giv_number];
7608 if (v->same && ! v->same->ignore)
7611 luid = stats[i].start_luid;
7612 /* Use unsigned arithmetic to model loop wrap-around. */
7613 if (luid - stats[j].start_luid
7614 > (unsigned) stats[j].end_luid - stats[j].start_luid)
7615 stats[j].end_luid = luid;
7619 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7621 /* Try to derive DEST_REG givs from previous DEST_REG givs with the
7622 same mult_val and non-overlapping lifetime. This reduces register
7624 Once we find a DEST_REG giv that is suitable to derive others from,
7625 we set last_giv to this giv, and try to derive as many other DEST_REG
7626 givs from it without joining overlapping lifetimes. If we then
7627 encounter a DEST_REG giv that we can't derive, we set rescan to the
7628 index for this giv (unless rescan is already set).
7629 When we are finished with the current LAST_GIV (i.e. the inner loop
7630 terminates), we start again with rescan, which then becomes the new
7632 for (i = giv_count - 1; i >= 0; i = rescan)
7634 int life_start, life_end;
7636 for (last_giv = 0, rescan = -1; i >= 0; i--)
7640 v = giv_array[stats[i].giv_number];
7641 if (v->giv_type != DEST_REG || v->derived_from || v->same)
7645 /* Don't use a giv that's likely to be dead to derive
7646 others - that would be likely to keep that giv alive. */
7647 if (! v->maybe_dead || v->combined_with)
7650 life_start = stats[i].start_luid;
7651 life_end = stats[i].end_luid;
7655 /* Use unsigned arithmetic to model loop wrap around. */
7656 if (((unsigned) stats[i].start_luid - life_start
7657 >= (unsigned) life_end - life_start)
7658 && ((unsigned) stats[i].end_luid - life_start
7659 > (unsigned) life_end - life_start)
7660 /* Check that the giv insn we're about to use for deriving
7661 precedes all uses of that giv. Note that initializing the
7662 derived giv would defeat the purpose of reducing register
7664 ??? We could arrange to move the insn. */
7665 && ((unsigned) stats[i].end_luid - INSN_LUID (loop_start)
7666 > (unsigned) stats[i].start_luid - INSN_LUID (loop_start))
7667 && rtx_equal_p (last_giv->mult_val, v->mult_val)
7668 /* ??? Could handle libcalls, but would need more logic. */
7669 && ! find_reg_note (v->insn, REG_RETVAL, NULL_RTX)
7670 /* We would really like to know if for any giv that v
7671 is combined with, v->insn or any intervening biv increment
7672 dominates that combined giv. However, we
7673 don't have this detailed control flow information.
7674 N.B. since last_giv will be reduced, it is valid
7675 anywhere in the loop, so we don't need to check the
7676 validity of last_giv.
7677 We rely here on the fact that v->always_executed implies that
7678 there is no jump to someplace else in the loop before the
7679 giv insn, and hence any insn that is executed before the
7680 giv insn in the loop will have a lower luid. */
7681 && (v->always_executed || ! v->combined_with)
7682 && (sum = express_from (last_giv, v))
7683 /* Make sure we don't make the add more expensive. ADD_COST
7684 doesn't take different costs of registers and constants into
7685 account, so compare the cost of the actual SET_SRCs. */
7686 && (rtx_cost (sum, SET)
7687 <= rtx_cost (SET_SRC (single_set (v->insn)), SET))
7688 /* ??? unroll can't understand anything but reg + const_int
7689 sums. It would be cleaner to fix unroll. */
7690 && ((GET_CODE (sum) == PLUS
7691 && GET_CODE (XEXP (sum, 0)) == REG
7692 && GET_CODE (XEXP (sum, 1)) == CONST_INT)
7694 && validate_change (v->insn, &PATTERN (v->insn),
7695 gen_rtx_SET (VOIDmode, v->dest_reg, sum), 0))
7697 v->derived_from = last_giv;
7698 life_end = stats[i].end_luid;
7700 if (loop_dump_stream)
7702 fprintf (loop_dump_stream,
7703 "giv at %d derived from %d as ",
7704 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7705 print_rtl (loop_dump_stream, sum);
7706 putc ('\n', loop_dump_stream);
7709 else if (rescan < 0)
7719 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
7722 emit_iv_add_mult (b, m, a, reg, insert_before)
7723 rtx b; /* initial value of basic induction variable */
7724 rtx m; /* multiplicative constant */
7725 rtx a; /* additive constant */
7726 rtx reg; /* destination register */
7732 /* Prevent unexpected sharing of these rtx. */
7736 /* Increase the lifetime of any invariants moved further in code. */
7737 update_reg_last_use (a, insert_before);
7738 update_reg_last_use (b, insert_before);
7739 update_reg_last_use (m, insert_before);
7742 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
7744 emit_move_insn (reg, result);
7745 seq = gen_sequence ();
7748 emit_insn_before (seq, insert_before);
7750 /* It is entirely possible that the expansion created lots of new
7751 registers. Iterate over the sequence we just created and
7754 if (GET_CODE (seq) == SEQUENCE)
7757 for (i = 0; i < XVECLEN (seq, 0); ++i)
7759 rtx set = single_set (XVECEXP (seq, 0, i));
7760 if (set && GET_CODE (SET_DEST (set)) == REG)
7761 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7764 else if (GET_CODE (seq) == SET
7765 && GET_CODE (SET_DEST (seq)) == REG)
7766 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
7769 /* Test whether A * B can be computed without
7770 an actual multiply insn. Value is 1 if so. */
7773 product_cheap_p (a, b)
7779 struct obstack *old_rtl_obstack = rtl_obstack;
7780 char *storage = (char *) obstack_alloc (&temp_obstack, 0);
7783 /* If only one is constant, make it B. */
7784 if (GET_CODE (a) == CONST_INT)
7785 tmp = a, a = b, b = tmp;
7787 /* If first constant, both constant, so don't need multiply. */
7788 if (GET_CODE (a) == CONST_INT)
7791 /* If second not constant, neither is constant, so would need multiply. */
7792 if (GET_CODE (b) != CONST_INT)
7795 /* One operand is constant, so might not need multiply insn. Generate the
7796 code for the multiply and see if a call or multiply, or long sequence
7797 of insns is generated. */
7799 rtl_obstack = &temp_obstack;
7801 expand_mult (GET_MODE (a), a, b, NULL_RTX, 0);
7802 tmp = gen_sequence ();
7805 if (GET_CODE (tmp) == SEQUENCE)
7807 if (XVEC (tmp, 0) == 0)
7809 else if (XVECLEN (tmp, 0) > 3)
7812 for (i = 0; i < XVECLEN (tmp, 0); i++)
7814 rtx insn = XVECEXP (tmp, 0, i);
7816 if (GET_CODE (insn) != INSN
7817 || (GET_CODE (PATTERN (insn)) == SET
7818 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7819 || (GET_CODE (PATTERN (insn)) == PARALLEL
7820 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7821 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7828 else if (GET_CODE (tmp) == SET
7829 && GET_CODE (SET_SRC (tmp)) == MULT)
7831 else if (GET_CODE (tmp) == PARALLEL
7832 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7833 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7836 /* Free any storage we obtained in generating this multiply and restore rtl
7837 allocation to its normal obstack. */
7838 obstack_free (&temp_obstack, storage);
7839 rtl_obstack = old_rtl_obstack;
7844 /* Check to see if loop can be terminated by a "decrement and branch until
7845 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7846 Also try reversing an increment loop to a decrement loop
7847 to see if the optimization can be performed.
7848 Value is nonzero if optimization was performed. */
7850 /* This is useful even if the architecture doesn't have such an insn,
7851 because it might change a loops which increments from 0 to n to a loop
7852 which decrements from n to 0. A loop that decrements to zero is usually
7853 faster than one that increments from zero. */
7855 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7856 such as approx_final_value, biv_total_increment, loop_iterations, and
7857 final_[bg]iv_value. */
7860 check_dbra_loop (loop_end, insn_count, loop_start, loop_info)
7864 struct loop_info *loop_info;
7866 struct iv_class *bl;
7873 rtx before_comparison;
7877 int compare_and_branch;
7879 /* If last insn is a conditional branch, and the insn before tests a
7880 register value, try to optimize it. Otherwise, we can't do anything. */
7882 jump = PREV_INSN (loop_end);
7883 comparison = get_condition_for_loop (jump);
7884 if (comparison == 0)
7887 /* Try to compute whether the compare/branch at the loop end is one or
7888 two instructions. */
7889 get_condition (jump, &first_compare);
7890 if (first_compare == jump)
7891 compare_and_branch = 1;
7892 else if (first_compare == prev_nonnote_insn (jump))
7893 compare_and_branch = 2;
7897 /* Check all of the bivs to see if the compare uses one of them.
7898 Skip biv's set more than once because we can't guarantee that
7899 it will be zero on the last iteration. Also skip if the biv is
7900 used between its update and the test insn. */
7902 for (bl = loop_iv_list; bl; bl = bl->next)
7904 if (bl->biv_count == 1
7905 && bl->biv->dest_reg == XEXP (comparison, 0)
7906 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
7914 /* Look for the case where the basic induction variable is always
7915 nonnegative, and equals zero on the last iteration.
7916 In this case, add a reg_note REG_NONNEG, which allows the
7917 m68k DBRA instruction to be used. */
7919 if (((GET_CODE (comparison) == GT
7920 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
7921 && INTVAL (XEXP (comparison, 1)) == -1)
7922 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
7923 && GET_CODE (bl->biv->add_val) == CONST_INT
7924 && INTVAL (bl->biv->add_val) < 0)
7926 /* Initial value must be greater than 0,
7927 init_val % -dec_value == 0 to ensure that it equals zero on
7928 the last iteration */
7930 if (GET_CODE (bl->initial_value) == CONST_INT
7931 && INTVAL (bl->initial_value) > 0
7932 && (INTVAL (bl->initial_value)
7933 % (-INTVAL (bl->biv->add_val))) == 0)
7935 /* register always nonnegative, add REG_NOTE to branch */
7936 REG_NOTES (PREV_INSN (loop_end))
7937 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7938 REG_NOTES (PREV_INSN (loop_end)));
7944 /* If the decrement is 1 and the value was tested as >= 0 before
7945 the loop, then we can safely optimize. */
7946 for (p = loop_start; p; p = PREV_INSN (p))
7948 if (GET_CODE (p) == CODE_LABEL)
7950 if (GET_CODE (p) != JUMP_INSN)
7953 before_comparison = get_condition_for_loop (p);
7954 if (before_comparison
7955 && XEXP (before_comparison, 0) == bl->biv->dest_reg
7956 && GET_CODE (before_comparison) == LT
7957 && XEXP (before_comparison, 1) == const0_rtx
7958 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
7959 && INTVAL (bl->biv->add_val) == -1)
7961 REG_NOTES (PREV_INSN (loop_end))
7962 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7963 REG_NOTES (PREV_INSN (loop_end)));
7970 else if (GET_CODE (bl->biv->add_val) == CONST_INT
7971 && INTVAL (bl->biv->add_val) > 0)
7973 /* Try to change inc to dec, so can apply above optimization. */
7975 all registers modified are induction variables or invariant,
7976 all memory references have non-overlapping addresses
7977 (obviously true if only one write)
7978 allow 2 insns for the compare/jump at the end of the loop. */
7979 /* Also, we must avoid any instructions which use both the reversed
7980 biv and another biv. Such instructions will fail if the loop is
7981 reversed. We meet this condition by requiring that either
7982 no_use_except_counting is true, or else that there is only
7984 int num_nonfixed_reads = 0;
7985 /* 1 if the iteration var is used only to count iterations. */
7986 int no_use_except_counting = 0;
7987 /* 1 if the loop has no memory store, or it has a single memory store
7988 which is reversible. */
7989 int reversible_mem_store = 1;
7991 if (bl->giv_count == 0
7992 && ! loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
7994 rtx bivreg = regno_reg_rtx[bl->regno];
7996 /* If there are no givs for this biv, and the only exit is the
7997 fall through at the end of the loop, then
7998 see if perhaps there are no uses except to count. */
7999 no_use_except_counting = 1;
8000 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8001 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
8003 rtx set = single_set (p);
8005 if (set && GET_CODE (SET_DEST (set)) == REG
8006 && REGNO (SET_DEST (set)) == bl->regno)
8007 /* An insn that sets the biv is okay. */
8009 else if ((p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
8010 || p == prev_nonnote_insn (loop_end))
8011 && reg_mentioned_p (bivreg, PATTERN (p)))
8013 /* If either of these insns uses the biv and sets a pseudo
8014 that has more than one usage, then the biv has uses
8015 other than counting since it's used to derive a value
8016 that is used more than one time. */
8017 int note_set_pseudo_multiple_uses_retval = 0;
8018 note_stores (PATTERN (p), note_set_pseudo_multiple_uses,
8019 ¬e_set_pseudo_multiple_uses_retval);
8020 if (note_set_pseudo_multiple_uses_retval)
8022 no_use_except_counting = 0;
8026 else if (reg_mentioned_p (bivreg, PATTERN (p)))
8028 no_use_except_counting = 0;
8034 if (no_use_except_counting)
8035 ; /* no need to worry about MEMs. */
8036 else if (num_mem_sets <= 1)
8038 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8039 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
8040 num_nonfixed_reads += count_nonfixed_reads (PATTERN (p));
8042 /* If the loop has a single store, and the destination address is
8043 invariant, then we can't reverse the loop, because this address
8044 might then have the wrong value at loop exit.
8045 This would work if the source was invariant also, however, in that
8046 case, the insn should have been moved out of the loop. */
8048 if (num_mem_sets == 1)
8050 struct induction *v;
8052 reversible_mem_store
8053 = (! unknown_address_altered
8054 && ! unknown_constant_address_altered
8055 && ! invariant_p (XEXP (XEXP (loop_store_mems, 0), 0)));
8057 /* If the store depends on a register that is set after the
8058 store, it depends on the initial value, and is thus not
8060 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
8062 if (v->giv_type == DEST_REG
8063 && reg_mentioned_p (v->dest_reg,
8064 XEXP (loop_store_mems, 0))
8065 && loop_insn_first_p (first_loop_store_insn, v->insn))
8066 reversible_mem_store = 0;
8073 /* This code only acts for innermost loops. Also it simplifies
8074 the memory address check by only reversing loops with
8075 zero or one memory access.
8076 Two memory accesses could involve parts of the same array,
8077 and that can't be reversed.
8078 If the biv is used only for counting, than we don't need to worry
8079 about all these things. */
8081 if ((num_nonfixed_reads <= 1
8082 && ! loop_info->has_call
8083 && ! loop_info->has_volatile
8084 && reversible_mem_store
8085 && (bl->giv_count + bl->biv_count + num_mem_sets
8086 + num_movables + compare_and_branch == insn_count)
8087 && (bl == loop_iv_list && bl->next == 0))
8088 || no_use_except_counting)
8092 /* Loop can be reversed. */
8093 if (loop_dump_stream)
8094 fprintf (loop_dump_stream, "Can reverse loop\n");
8096 /* Now check other conditions:
8098 The increment must be a constant, as must the initial value,
8099 and the comparison code must be LT.
8101 This test can probably be improved since +/- 1 in the constant
8102 can be obtained by changing LT to LE and vice versa; this is
8106 /* for constants, LE gets turned into LT */
8107 && (GET_CODE (comparison) == LT
8108 || (GET_CODE (comparison) == LE
8109 && no_use_except_counting)))
8111 HOST_WIDE_INT add_val, add_adjust, comparison_val = 0;
8112 rtx initial_value, comparison_value;
8114 enum rtx_code cmp_code;
8115 int comparison_const_width;
8116 unsigned HOST_WIDE_INT comparison_sign_mask;
8118 add_val = INTVAL (bl->biv->add_val);
8119 comparison_value = XEXP (comparison, 1);
8120 if (GET_MODE (comparison_value) == VOIDmode)
8121 comparison_const_width
8122 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
8124 comparison_const_width
8125 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
8126 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
8127 comparison_const_width = HOST_BITS_PER_WIDE_INT;
8128 comparison_sign_mask
8129 = (unsigned HOST_WIDE_INT)1 << (comparison_const_width - 1);
8131 /* If the comparison value is not a loop invariant, then we
8132 can not reverse this loop.
8134 ??? If the insns which initialize the comparison value as
8135 a whole compute an invariant result, then we could move
8136 them out of the loop and proceed with loop reversal. */
8137 if (!invariant_p (comparison_value))
8140 if (GET_CODE (comparison_value) == CONST_INT)
8141 comparison_val = INTVAL (comparison_value);
8142 initial_value = bl->initial_value;
8144 /* Normalize the initial value if it is an integer and
8145 has no other use except as a counter. This will allow
8146 a few more loops to be reversed. */
8147 if (no_use_except_counting
8148 && GET_CODE (comparison_value) == CONST_INT
8149 && GET_CODE (initial_value) == CONST_INT)
8151 comparison_val = comparison_val - INTVAL (bl->initial_value);
8152 /* The code below requires comparison_val to be a multiple
8153 of add_val in order to do the loop reversal, so
8154 round up comparison_val to a multiple of add_val.
8155 Since comparison_value is constant, we know that the
8156 current comparison code is LT. */
8157 comparison_val = comparison_val + add_val - 1;
8159 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
8160 /* We postpone overflow checks for COMPARISON_VAL here;
8161 even if there is an overflow, we might still be able to
8162 reverse the loop, if converting the loop exit test to
8164 initial_value = const0_rtx;
8167 /* First check if we can do a vanilla loop reversal. */
8168 if (initial_value == const0_rtx
8169 /* If we have a decrement_and_branch_on_count,
8170 prefer the NE test, since this will allow that
8171 instruction to be generated. Note that we must
8172 use a vanilla loop reversal if the biv is used to
8173 calculate a giv or has a non-counting use. */
8174 #if ! defined (HAVE_decrement_and_branch_until_zero) \
8175 && defined (HAVE_decrement_and_branch_on_count)
8176 && (! (add_val == 1 && loop_info->vtop
8177 && (bl->biv_count == 0
8178 || no_use_except_counting)))
8180 && GET_CODE (comparison_value) == CONST_INT
8181 /* Now do postponed overflow checks on COMPARISON_VAL. */
8182 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
8183 & comparison_sign_mask))
8185 /* Register will always be nonnegative, with value
8186 0 on last iteration */
8187 add_adjust = add_val;
8191 else if (add_val == 1 && loop_info->vtop
8192 && (bl->biv_count == 0
8193 || no_use_except_counting))
8201 if (GET_CODE (comparison) == LE)
8202 add_adjust -= add_val;
8204 /* If the initial value is not zero, or if the comparison
8205 value is not an exact multiple of the increment, then we
8206 can not reverse this loop. */
8207 if (initial_value == const0_rtx
8208 && GET_CODE (comparison_value) == CONST_INT)
8210 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
8215 if (! no_use_except_counting || add_val != 1)
8219 final_value = comparison_value;
8221 /* Reset these in case we normalized the initial value
8222 and comparison value above. */
8223 if (GET_CODE (comparison_value) == CONST_INT
8224 && GET_CODE (initial_value) == CONST_INT)
8226 comparison_value = GEN_INT (comparison_val);
8228 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
8230 bl->initial_value = initial_value;
8232 /* Save some info needed to produce the new insns. */
8233 reg = bl->biv->dest_reg;
8234 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
8235 if (jump_label == pc_rtx)
8236 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
8237 new_add_val = GEN_INT (- INTVAL (bl->biv->add_val));
8239 /* Set start_value; if this is not a CONST_INT, we need
8241 Initialize biv to start_value before loop start.
8242 The old initializing insn will be deleted as a
8243 dead store by flow.c. */
8244 if (initial_value == const0_rtx
8245 && GET_CODE (comparison_value) == CONST_INT)
8247 start_value = GEN_INT (comparison_val - add_adjust);
8248 emit_insn_before (gen_move_insn (reg, start_value),
8251 else if (GET_CODE (initial_value) == CONST_INT)
8253 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
8254 enum machine_mode mode = GET_MODE (reg);
8255 enum insn_code icode
8256 = add_optab->handlers[(int) mode].insn_code;
8258 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
8259 || ! ((*insn_data[icode].operand[1].predicate)
8260 (comparison_value, mode))
8261 || ! ((*insn_data[icode].operand[2].predicate)
8265 = gen_rtx_PLUS (mode, comparison_value, offset);
8266 emit_insn_before ((GEN_FCN (icode)
8267 (reg, comparison_value, offset)),
8269 if (GET_CODE (comparison) == LE)
8270 final_value = gen_rtx_PLUS (mode, comparison_value,
8273 else if (! add_adjust)
8275 enum machine_mode mode = GET_MODE (reg);
8276 enum insn_code icode
8277 = sub_optab->handlers[(int) mode].insn_code;
8278 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
8279 || ! ((*insn_data[icode].operand[1].predicate)
8280 (comparison_value, mode))
8281 || ! ((*insn_data[icode].operand[2].predicate)
8282 (initial_value, mode)))
8285 = gen_rtx_MINUS (mode, comparison_value, initial_value);
8286 emit_insn_before ((GEN_FCN (icode)
8287 (reg, comparison_value, initial_value)),
8291 /* We could handle the other cases too, but it'll be
8292 better to have a testcase first. */
8295 /* We may not have a single insn which can increment a reg, so
8296 create a sequence to hold all the insns from expand_inc. */
8298 expand_inc (reg, new_add_val);
8299 tem = gen_sequence ();
8302 p = emit_insn_before (tem, bl->biv->insn);
8303 delete_insn (bl->biv->insn);
8305 /* Update biv info to reflect its new status. */
8307 bl->initial_value = start_value;
8308 bl->biv->add_val = new_add_val;
8310 /* Update loop info. */
8311 loop_info->initial_value = reg;
8312 loop_info->initial_equiv_value = reg;
8313 loop_info->final_value = const0_rtx;
8314 loop_info->final_equiv_value = const0_rtx;
8315 loop_info->comparison_value = const0_rtx;
8316 loop_info->comparison_code = cmp_code;
8317 loop_info->increment = new_add_val;
8319 /* Inc LABEL_NUSES so that delete_insn will
8320 not delete the label. */
8321 LABEL_NUSES (XEXP (jump_label, 0)) ++;
8323 /* Emit an insn after the end of the loop to set the biv's
8324 proper exit value if it is used anywhere outside the loop. */
8325 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
8327 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
8328 emit_insn_after (gen_move_insn (reg, final_value),
8331 /* Delete compare/branch at end of loop. */
8332 delete_insn (PREV_INSN (loop_end));
8333 if (compare_and_branch == 2)
8334 delete_insn (first_compare);
8336 /* Add new compare/branch insn at end of loop. */
8338 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
8339 GET_MODE (reg), 0, 0,
8340 XEXP (jump_label, 0));
8341 tem = gen_sequence ();
8343 emit_jump_insn_before (tem, loop_end);
8345 for (tem = PREV_INSN (loop_end);
8346 tem && GET_CODE (tem) != JUMP_INSN;
8347 tem = PREV_INSN (tem))
8351 JUMP_LABEL (tem) = XEXP (jump_label, 0);
8357 /* Increment of LABEL_NUSES done above. */
8358 /* Register is now always nonnegative,
8359 so add REG_NONNEG note to the branch. */
8360 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
8366 /* No insn may reference both the reversed and another biv or it
8367 will fail (see comment near the top of the loop reversal
8369 Earlier on, we have verified that the biv has no use except
8370 counting, or it is the only biv in this function.
8371 However, the code that computes no_use_except_counting does
8372 not verify reg notes. It's possible to have an insn that
8373 references another biv, and has a REG_EQUAL note with an
8374 expression based on the reversed biv. To avoid this case,
8375 remove all REG_EQUAL notes based on the reversed biv
8377 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8378 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
8381 rtx set = single_set (p);
8382 /* If this is a set of a GIV based on the reversed biv, any
8383 REG_EQUAL notes should still be correct. */
8385 || GET_CODE (SET_DEST (set)) != REG
8386 || (size_t) REGNO (SET_DEST (set)) >= reg_iv_type->num_elements
8387 || REG_IV_TYPE (REGNO (SET_DEST (set))) != GENERAL_INDUCT
8388 || REG_IV_INFO (REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
8389 for (pnote = ®_NOTES (p); *pnote;)
8391 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
8392 && reg_mentioned_p (regno_reg_rtx[bl->regno],
8394 *pnote = XEXP (*pnote, 1);
8396 pnote = &XEXP (*pnote, 1);
8400 /* Mark that this biv has been reversed. Each giv which depends
8401 on this biv, and which is also live past the end of the loop
8402 will have to be fixed up. */
8406 if (loop_dump_stream)
8408 fprintf (loop_dump_stream, "Reversed loop");
8410 fprintf (loop_dump_stream, " and added reg_nonneg\n");
8412 fprintf (loop_dump_stream, "\n");
8423 /* Verify whether the biv BL appears to be eliminable,
8424 based on the insns in the loop that refer to it.
8425 LOOP_START is the first insn of the loop, and END is the end insn.
8427 If ELIMINATE_P is non-zero, actually do the elimination.
8429 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8430 determine whether invariant insns should be placed inside or at the
8431 start of the loop. */
8434 maybe_eliminate_biv (bl, loop_start, end, eliminate_p, threshold, insn_count)
8435 struct iv_class *bl;
8439 int threshold, insn_count;
8441 rtx reg = bl->biv->dest_reg;
8444 /* Scan all insns in the loop, stopping if we find one that uses the
8445 biv in a way that we cannot eliminate. */
8447 for (p = loop_start; p != end; p = NEXT_INSN (p))
8449 enum rtx_code code = GET_CODE (p);
8450 rtx where = threshold >= insn_count ? loop_start : p;
8452 /* If this is a libcall that sets a giv, skip ahead to its end. */
8453 if (GET_RTX_CLASS (code) == 'i')
8455 rtx note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
8459 rtx last = XEXP (note, 0);
8460 rtx set = single_set (last);
8462 if (set && GET_CODE (SET_DEST (set)) == REG)
8464 int regno = REGNO (SET_DEST (set));
8466 if (regno < max_reg_before_loop
8467 && REG_IV_TYPE (regno) == GENERAL_INDUCT
8468 && REG_IV_INFO (regno)->src_reg == bl->biv->src_reg)
8473 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
8474 && reg_mentioned_p (reg, PATTERN (p))
8475 && ! maybe_eliminate_biv_1 (PATTERN (p), p, bl, eliminate_p, where))
8477 if (loop_dump_stream)
8478 fprintf (loop_dump_stream,
8479 "Cannot eliminate biv %d: biv used in insn %d.\n",
8480 bl->regno, INSN_UID (p));
8487 if (loop_dump_stream)
8488 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
8489 bl->regno, eliminate_p ? "was" : "can be");
8496 /* INSN and REFERENCE are instructions in the same insn chain.
8497 Return non-zero if INSN is first. */
8500 loop_insn_first_p (insn, reference)
8501 rtx insn, reference;
8505 for (p = insn, q = reference; ;)
8507 /* Start with test for not first so that INSN == REFERENCE yields not
8509 if (q == insn || ! p)
8511 if (p == reference || ! q)
8514 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8515 previous insn, hence the <= comparison below does not work if
8517 if (INSN_UID (p) < max_uid_for_loop
8518 && INSN_UID (q) < max_uid_for_loop
8519 && GET_CODE (p) != NOTE)
8520 return INSN_LUID (p) <= INSN_LUID (q);
8522 if (INSN_UID (p) >= max_uid_for_loop
8523 || GET_CODE (p) == NOTE)
8525 if (INSN_UID (q) >= max_uid_for_loop)
8530 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
8531 the offset that we have to take into account due to auto-increment /
8532 div derivation is zero. */
8534 biv_elimination_giv_has_0_offset (biv, giv, insn)
8535 struct induction *biv, *giv;
8538 /* If the giv V had the auto-inc address optimization applied
8539 to it, and INSN occurs between the giv insn and the biv
8540 insn, then we'd have to adjust the value used here.
8541 This is rare, so we don't bother to make this possible. */
8542 if (giv->auto_inc_opt
8543 && ((loop_insn_first_p (giv->insn, insn)
8544 && loop_insn_first_p (insn, biv->insn))
8545 || (loop_insn_first_p (biv->insn, insn)
8546 && loop_insn_first_p (insn, giv->insn))))
8549 /* If the giv V was derived from another giv, and INSN does
8550 not occur between the giv insn and the biv insn, then we'd
8551 have to adjust the value used here. This is rare, so we don't
8552 bother to make this possible. */
8553 if (giv->derived_from
8554 && ! (giv->always_executed
8555 && loop_insn_first_p (giv->insn, insn)
8556 && loop_insn_first_p (insn, biv->insn)))
8559 && giv->same->derived_from
8560 && ! (giv->same->always_executed
8561 && loop_insn_first_p (giv->same->insn, insn)
8562 && loop_insn_first_p (insn, biv->insn)))
8568 /* If BL appears in X (part of the pattern of INSN), see if we can
8569 eliminate its use. If so, return 1. If not, return 0.
8571 If BIV does not appear in X, return 1.
8573 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
8574 where extra insns should be added. Depending on how many items have been
8575 moved out of the loop, it will either be before INSN or at the start of
8579 maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
8581 struct iv_class *bl;
8585 enum rtx_code code = GET_CODE (x);
8586 rtx reg = bl->biv->dest_reg;
8587 enum machine_mode mode = GET_MODE (reg);
8588 struct induction *v;
8600 /* If we haven't already been able to do something with this BIV,
8601 we can't eliminate it. */
8607 /* If this sets the BIV, it is not a problem. */
8608 if (SET_DEST (x) == reg)
8611 /* If this is an insn that defines a giv, it is also ok because
8612 it will go away when the giv is reduced. */
8613 for (v = bl->giv; v; v = v->next_iv)
8614 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
8618 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
8620 /* Can replace with any giv that was reduced and
8621 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8622 Require a constant for MULT_VAL, so we know it's nonzero.
8623 ??? We disable this optimization to avoid potential
8626 for (v = bl->giv; v; v = v->next_iv)
8627 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8628 && v->add_val == const0_rtx
8629 && ! v->ignore && ! v->maybe_dead && v->always_computable
8633 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8639 /* If the giv has the opposite direction of change,
8640 then reverse the comparison. */
8641 if (INTVAL (v->mult_val) < 0)
8642 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8643 const0_rtx, v->new_reg);
8647 /* We can probably test that giv's reduced reg. */
8648 if (validate_change (insn, &SET_SRC (x), new, 0))
8652 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8653 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8654 Require a constant for MULT_VAL, so we know it's nonzero.
8655 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8656 overflow problem. */
8658 for (v = bl->giv; v; v = v->next_iv)
8659 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8660 && ! v->ignore && ! v->maybe_dead && v->always_computable
8662 && (GET_CODE (v->add_val) == SYMBOL_REF
8663 || GET_CODE (v->add_val) == LABEL_REF
8664 || GET_CODE (v->add_val) == CONST
8665 || (GET_CODE (v->add_val) == REG
8666 && REGNO_POINTER_FLAG (REGNO (v->add_val)))))
8668 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8674 /* If the giv has the opposite direction of change,
8675 then reverse the comparison. */
8676 if (INTVAL (v->mult_val) < 0)
8677 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8680 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8681 copy_rtx (v->add_val));
8683 /* Replace biv with the giv's reduced register. */
8684 update_reg_last_use (v->add_val, insn);
8685 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8688 /* Insn doesn't support that constant or invariant. Copy it
8689 into a register (it will be a loop invariant.) */
8690 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8692 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
8695 /* Substitute the new register for its invariant value in
8696 the compare expression. */
8697 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8698 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8707 case GT: case GE: case GTU: case GEU:
8708 case LT: case LE: case LTU: case LEU:
8709 /* See if either argument is the biv. */
8710 if (XEXP (x, 0) == reg)
8711 arg = XEXP (x, 1), arg_operand = 1;
8712 else if (XEXP (x, 1) == reg)
8713 arg = XEXP (x, 0), arg_operand = 0;
8717 if (CONSTANT_P (arg))
8719 /* First try to replace with any giv that has constant positive
8720 mult_val and constant add_val. We might be able to support
8721 negative mult_val, but it seems complex to do it in general. */
8723 for (v = bl->giv; v; v = v->next_iv)
8724 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8725 && (GET_CODE (v->add_val) == SYMBOL_REF
8726 || GET_CODE (v->add_val) == LABEL_REF
8727 || GET_CODE (v->add_val) == CONST
8728 || (GET_CODE (v->add_val) == REG
8729 && REGNO_POINTER_FLAG (REGNO (v->add_val))))
8730 && ! v->ignore && ! v->maybe_dead && v->always_computable
8733 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8739 /* Replace biv with the giv's reduced reg. */
8740 XEXP (x, 1-arg_operand) = v->new_reg;
8742 /* If all constants are actually constant integers and
8743 the derived constant can be directly placed in the COMPARE,
8745 if (GET_CODE (arg) == CONST_INT
8746 && GET_CODE (v->mult_val) == CONST_INT
8747 && GET_CODE (v->add_val) == CONST_INT
8748 && validate_change (insn, &XEXP (x, arg_operand),
8749 GEN_INT (INTVAL (arg)
8750 * INTVAL (v->mult_val)
8751 + INTVAL (v->add_val)), 0))
8754 /* Otherwise, load it into a register. */
8755 tem = gen_reg_rtx (mode);
8756 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8757 if (validate_change (insn, &XEXP (x, arg_operand), tem, 0))
8760 /* If that failed, put back the change we made above. */
8761 XEXP (x, 1-arg_operand) = reg;
8764 /* Look for giv with positive constant mult_val and nonconst add_val.
8765 Insert insns to calculate new compare value.
8766 ??? Turn this off due to possible overflow. */
8768 for (v = bl->giv; v; v = v->next_iv)
8769 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8770 && ! v->ignore && ! v->maybe_dead && v->always_computable
8776 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8782 tem = gen_reg_rtx (mode);
8784 /* Replace biv with giv's reduced register. */
8785 validate_change (insn, &XEXP (x, 1 - arg_operand),
8788 /* Compute value to compare against. */
8789 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8790 /* Use it in this insn. */
8791 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8792 if (apply_change_group ())
8796 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8798 if (invariant_p (arg) == 1)
8800 /* Look for giv with constant positive mult_val and nonconst
8801 add_val. Insert insns to compute new compare value.
8802 ??? Turn this off due to possible overflow. */
8804 for (v = bl->giv; v; v = v->next_iv)
8805 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8806 && ! v->ignore && ! v->maybe_dead && v->always_computable
8812 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8818 tem = gen_reg_rtx (mode);
8820 /* Replace biv with giv's reduced register. */
8821 validate_change (insn, &XEXP (x, 1 - arg_operand),
8824 /* Compute value to compare against. */
8825 emit_iv_add_mult (arg, v->mult_val, v->add_val,
8827 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8828 if (apply_change_group ())
8833 /* This code has problems. Basically, you can't know when
8834 seeing if we will eliminate BL, whether a particular giv
8835 of ARG will be reduced. If it isn't going to be reduced,
8836 we can't eliminate BL. We can try forcing it to be reduced,
8837 but that can generate poor code.
8839 The problem is that the benefit of reducing TV, below should
8840 be increased if BL can actually be eliminated, but this means
8841 we might have to do a topological sort of the order in which
8842 we try to process biv. It doesn't seem worthwhile to do
8843 this sort of thing now. */
8846 /* Otherwise the reg compared with had better be a biv. */
8847 if (GET_CODE (arg) != REG
8848 || REG_IV_TYPE (REGNO (arg)) != BASIC_INDUCT)
8851 /* Look for a pair of givs, one for each biv,
8852 with identical coefficients. */
8853 for (v = bl->giv; v; v = v->next_iv)
8855 struct induction *tv;
8857 if (v->ignore || v->maybe_dead || v->mode != mode)
8860 for (tv = reg_biv_class[REGNO (arg)]->giv; tv; tv = tv->next_iv)
8861 if (! tv->ignore && ! tv->maybe_dead
8862 && rtx_equal_p (tv->mult_val, v->mult_val)
8863 && rtx_equal_p (tv->add_val, v->add_val)
8864 && tv->mode == mode)
8866 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8872 /* Replace biv with its giv's reduced reg. */
8873 XEXP (x, 1-arg_operand) = v->new_reg;
8874 /* Replace other operand with the other giv's
8876 XEXP (x, arg_operand) = tv->new_reg;
8883 /* If we get here, the biv can't be eliminated. */
8887 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8888 biv is used in it, since it will be replaced. */
8889 for (v = bl->giv; v; v = v->next_iv)
8890 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8898 /* See if any subexpression fails elimination. */
8899 fmt = GET_RTX_FORMAT (code);
8900 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8905 if (! maybe_eliminate_biv_1 (XEXP (x, i), insn, bl,
8906 eliminate_p, where))
8911 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8912 if (! maybe_eliminate_biv_1 (XVECEXP (x, i, j), insn, bl,
8913 eliminate_p, where))
8922 /* Return nonzero if the last use of REG
8923 is in an insn following INSN in the same basic block. */
8926 last_use_this_basic_block (reg, insn)
8932 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
8935 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
8941 /* Called via `note_stores' to record the initial value of a biv. Here we
8942 just record the location of the set and process it later. */
8945 record_initial (dest, set, data)
8948 void *data ATTRIBUTE_UNUSED;
8950 struct iv_class *bl;
8952 if (GET_CODE (dest) != REG
8953 || REGNO (dest) >= max_reg_before_loop
8954 || REG_IV_TYPE (REGNO (dest)) != BASIC_INDUCT)
8957 bl = reg_biv_class[REGNO (dest)];
8959 /* If this is the first set found, record it. */
8960 if (bl->init_insn == 0)
8962 bl->init_insn = note_insn;
8967 /* If any of the registers in X are "old" and currently have a last use earlier
8968 than INSN, update them to have a last use of INSN. Their actual last use
8969 will be the previous insn but it will not have a valid uid_luid so we can't
8973 update_reg_last_use (x, insn)
8977 /* Check for the case where INSN does not have a valid luid. In this case,
8978 there is no need to modify the regno_last_uid, as this can only happen
8979 when code is inserted after the loop_end to set a pseudo's final value,
8980 and hence this insn will never be the last use of x. */
8981 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
8982 && INSN_UID (insn) < max_uid_for_loop
8983 && uid_luid[REGNO_LAST_UID (REGNO (x))] < uid_luid[INSN_UID (insn)])
8984 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
8988 register const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
8989 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
8992 update_reg_last_use (XEXP (x, i), insn);
8993 else if (fmt[i] == 'E')
8994 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8995 update_reg_last_use (XVECEXP (x, i, j), insn);
9000 /* Given a jump insn JUMP, return the condition that will cause it to branch
9001 to its JUMP_LABEL. If the condition cannot be understood, or is an
9002 inequality floating-point comparison which needs to be reversed, 0 will
9005 If EARLIEST is non-zero, it is a pointer to a place where the earliest
9006 insn used in locating the condition was found. If a replacement test
9007 of the condition is desired, it should be placed in front of that
9008 insn and we will be sure that the inputs are still valid.
9010 The condition will be returned in a canonical form to simplify testing by
9011 callers. Specifically:
9013 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
9014 (2) Both operands will be machine operands; (cc0) will have been replaced.
9015 (3) If an operand is a constant, it will be the second operand.
9016 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
9017 for GE, GEU, and LEU. */
9020 get_condition (jump, earliest)
9029 int reverse_code = 0;
9030 int did_reverse_condition = 0;
9031 enum machine_mode mode;
9033 /* If this is not a standard conditional jump, we can't parse it. */
9034 if (GET_CODE (jump) != JUMP_INSN
9035 || ! condjump_p (jump) || simplejump_p (jump))
9038 code = GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 0));
9039 mode = GET_MODE (XEXP (SET_SRC (PATTERN (jump)), 0));
9040 op0 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 0);
9041 op1 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 1);
9046 /* If this branches to JUMP_LABEL when the condition is false, reverse
9048 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 2)) == LABEL_REF
9049 && XEXP (XEXP (SET_SRC (PATTERN (jump)), 2), 0) == JUMP_LABEL (jump))
9050 code = reverse_condition (code), did_reverse_condition ^= 1;
9052 /* If we are comparing a register with zero, see if the register is set
9053 in the previous insn to a COMPARE or a comparison operation. Perform
9054 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
9057 while (GET_RTX_CLASS (code) == '<' && op1 == CONST0_RTX (GET_MODE (op0)))
9059 /* Set non-zero when we find something of interest. */
9063 /* If comparison with cc0, import actual comparison from compare
9067 if ((prev = prev_nonnote_insn (prev)) == 0
9068 || GET_CODE (prev) != INSN
9069 || (set = single_set (prev)) == 0
9070 || SET_DEST (set) != cc0_rtx)
9073 op0 = SET_SRC (set);
9074 op1 = CONST0_RTX (GET_MODE (op0));
9080 /* If this is a COMPARE, pick up the two things being compared. */
9081 if (GET_CODE (op0) == COMPARE)
9083 op1 = XEXP (op0, 1);
9084 op0 = XEXP (op0, 0);
9087 else if (GET_CODE (op0) != REG)
9090 /* Go back to the previous insn. Stop if it is not an INSN. We also
9091 stop if it isn't a single set or if it has a REG_INC note because
9092 we don't want to bother dealing with it. */
9094 if ((prev = prev_nonnote_insn (prev)) == 0
9095 || GET_CODE (prev) != INSN
9096 || FIND_REG_INC_NOTE (prev, 0)
9097 || (set = single_set (prev)) == 0)
9100 /* If this is setting OP0, get what it sets it to if it looks
9102 if (rtx_equal_p (SET_DEST (set), op0))
9104 enum machine_mode inner_mode = GET_MODE (SET_SRC (set));
9106 /* ??? We may not combine comparisons done in a CCmode with
9107 comparisons not done in a CCmode. This is to aid targets
9108 like Alpha that have an IEEE compliant EQ instruction, and
9109 a non-IEEE compliant BEQ instruction. The use of CCmode is
9110 actually artificial, simply to prevent the combination, but
9111 should not affect other platforms.
9113 However, we must allow VOIDmode comparisons to match either
9114 CCmode or non-CCmode comparison, because some ports have
9115 modeless comparisons inside branch patterns.
9117 ??? This mode check should perhaps look more like the mode check
9118 in simplify_comparison in combine. */
9120 if ((GET_CODE (SET_SRC (set)) == COMPARE
9123 && GET_MODE_CLASS (inner_mode) == MODE_INT
9124 && (GET_MODE_BITSIZE (inner_mode)
9125 <= HOST_BITS_PER_WIDE_INT)
9126 && (STORE_FLAG_VALUE
9127 & ((HOST_WIDE_INT) 1
9128 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9129 #ifdef FLOAT_STORE_FLAG_VALUE
9131 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9132 && FLOAT_STORE_FLAG_VALUE < 0)
9135 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
9136 && (((GET_MODE_CLASS (mode) == MODE_CC)
9137 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9138 || mode == VOIDmode || inner_mode == VOIDmode))
9140 else if (((code == EQ
9142 && (GET_MODE_BITSIZE (inner_mode)
9143 <= HOST_BITS_PER_WIDE_INT)
9144 && GET_MODE_CLASS (inner_mode) == MODE_INT
9145 && (STORE_FLAG_VALUE
9146 & ((HOST_WIDE_INT) 1
9147 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9148 #ifdef FLOAT_STORE_FLAG_VALUE
9150 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9151 && FLOAT_STORE_FLAG_VALUE < 0)
9154 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
9155 && (((GET_MODE_CLASS (mode) == MODE_CC)
9156 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9157 || mode == VOIDmode || inner_mode == VOIDmode))
9160 /* We might have reversed a LT to get a GE here. But this wasn't
9161 actually the comparison of data, so we don't flag that we
9162 have had to reverse the condition. */
9163 did_reverse_condition ^= 1;
9171 else if (reg_set_p (op0, prev))
9172 /* If this sets OP0, but not directly, we have to give up. */
9177 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
9178 code = GET_CODE (x);
9181 code = reverse_condition (code);
9182 did_reverse_condition ^= 1;
9186 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
9192 /* If constant is first, put it last. */
9193 if (CONSTANT_P (op0))
9194 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
9196 /* If OP0 is the result of a comparison, we weren't able to find what
9197 was really being compared, so fail. */
9198 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
9201 /* Canonicalize any ordered comparison with integers involving equality
9202 if we can do computations in the relevant mode and we do not
9205 if (GET_CODE (op1) == CONST_INT
9206 && GET_MODE (op0) != VOIDmode
9207 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
9209 HOST_WIDE_INT const_val = INTVAL (op1);
9210 unsigned HOST_WIDE_INT uconst_val = const_val;
9211 unsigned HOST_WIDE_INT max_val
9212 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
9217 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
9218 code = LT, op1 = GEN_INT (const_val + 1);
9221 /* When cross-compiling, const_val might be sign-extended from
9222 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9224 if ((HOST_WIDE_INT) (const_val & max_val)
9225 != (((HOST_WIDE_INT) 1
9226 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
9227 code = GT, op1 = GEN_INT (const_val - 1);
9231 if (uconst_val < max_val)
9232 code = LTU, op1 = GEN_INT (uconst_val + 1);
9236 if (uconst_val != 0)
9237 code = GTU, op1 = GEN_INT (uconst_val - 1);
9245 /* If this was floating-point and we reversed anything other than an
9246 EQ or NE, return zero. */
9247 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
9248 && did_reverse_condition && code != NE && code != EQ
9250 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
9254 /* Never return CC0; return zero instead. */
9259 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
9262 /* Similar to above routine, except that we also put an invariant last
9263 unless both operands are invariants. */
9266 get_condition_for_loop (x)
9269 rtx comparison = get_condition (x, NULL_PTR);
9272 || ! invariant_p (XEXP (comparison, 0))
9273 || invariant_p (XEXP (comparison, 1)))
9276 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
9277 XEXP (comparison, 1), XEXP (comparison, 0));
9280 #ifdef HAVE_decrement_and_branch_on_count
9281 /* Instrument loop for insertion of bct instruction. We distinguish between
9282 loops with compile-time bounds and those with run-time bounds.
9283 Information from loop_iterations() is used to compute compile-time bounds.
9284 Run-time bounds should use loop preconditioning, but currently ignored.
9288 insert_bct (loop_start, loop_end, loop_info)
9289 rtx loop_start, loop_end;
9290 struct loop_info *loop_info;
9293 unsigned HOST_WIDE_INT n_iterations;
9295 int increment_direction, compare_direction;
9297 /* If the loop condition is <= or >=, the number of iteration
9298 is 1 more than the range of the bounds of the loop. */
9299 int add_iteration = 0;
9301 enum machine_mode loop_var_mode = word_mode;
9303 int loop_num = uid_loop_num [INSN_UID (loop_start)];
9305 /* It's impossible to instrument a competely unrolled loop. */
9306 if (loop_info->unroll_number == loop_info->n_iterations)
9309 /* Make sure that the count register is not in use. */
9310 if (loop_used_count_register [loop_num])
9312 if (loop_dump_stream)
9313 fprintf (loop_dump_stream,
9314 "insert_bct %d: BCT instrumentation failed: count register already in use\n",
9319 /* Make sure that the function has no indirect jumps. */
9320 if (indirect_jump_in_function)
9322 if (loop_dump_stream)
9323 fprintf (loop_dump_stream,
9324 "insert_bct %d: BCT instrumentation failed: indirect jump in function\n",
9329 /* Make sure that the last loop insn is a conditional jump. */
9330 if (GET_CODE (PREV_INSN (loop_end)) != JUMP_INSN
9331 || ! condjump_p (PREV_INSN (loop_end))
9332 || simplejump_p (PREV_INSN (loop_end)))
9334 if (loop_dump_stream)
9335 fprintf (loop_dump_stream,
9336 "insert_bct %d: BCT instrumentation failed: invalid jump at loop end\n",
9341 /* Make sure that the loop does not contain a function call
9342 (the count register might be altered by the called function). */
9343 if (loop_info->has_call)
9345 if (loop_dump_stream)
9346 fprintf (loop_dump_stream,
9347 "insert_bct %d: BCT instrumentation failed: function call in loop\n",
9352 /* Make sure that the loop does not jump via a table.
9353 (the count register might be used to perform the branch on table). */
9354 if (loop_info->has_tablejump)
9356 if (loop_dump_stream)
9357 fprintf (loop_dump_stream,
9358 "insert_bct %d: BCT instrumentation failed: computed branch in the loop\n",
9363 /* Account for loop unrolling in instrumented iteration count. */
9364 if (loop_info->unroll_number > 1)
9365 n_iterations = loop_info->n_iterations / loop_info->unroll_number;
9367 n_iterations = loop_info->n_iterations;
9369 if (n_iterations != 0 && n_iterations < 3)
9371 /* Allow an enclosing outer loop to benefit if possible. */
9372 if (loop_dump_stream)
9373 fprintf (loop_dump_stream,
9374 "insert_bct %d: Too few iterations to benefit from BCT optimization\n",
9379 /* Try to instrument the loop. */
9381 /* Handle the simpler case, where the bounds are known at compile time. */
9382 if (n_iterations > 0)
9384 /* Mark all enclosing loops that they cannot use count register. */
9385 for (i = loop_num; i != -1; i = loop_outer_loop[i])
9386 loop_used_count_register[i] = 1;
9387 instrument_loop_bct (loop_start, loop_end, GEN_INT (n_iterations));
9391 /* Handle the more complex case, that the bounds are NOT known
9392 at compile time. In this case we generate run_time calculation
9393 of the number of iterations. */
9395 if (loop_info->iteration_var == 0)
9397 if (loop_dump_stream)
9398 fprintf (loop_dump_stream,
9399 "insert_bct %d: BCT Runtime Instrumentation failed: no loop iteration variable found\n",
9404 if (GET_MODE_CLASS (GET_MODE (loop_info->iteration_var)) != MODE_INT
9405 || GET_MODE_SIZE (GET_MODE (loop_info->iteration_var)) != UNITS_PER_WORD)
9407 if (loop_dump_stream)
9408 fprintf (loop_dump_stream,
9409 "insert_bct %d: BCT Runtime Instrumentation failed: loop variable not integer\n",
9414 /* With runtime bounds, if the compare is of the form '!=' we give up */
9415 if (loop_info->comparison_code == NE)
9417 if (loop_dump_stream)
9418 fprintf (loop_dump_stream,
9419 "insert_bct %d: BCT Runtime Instrumentation failed: runtime bounds with != comparison\n",
9423 /* Use common loop preconditioning code instead. */
9427 /* We rely on the existence of run-time guard to ensure that the
9428 loop executes at least once. */
9430 rtx iterations_num_reg;
9432 unsigned HOST_WIDE_INT increment_value_abs
9433 = INTVAL (increment) * increment_direction;
9435 /* make sure that the increment is a power of two, otherwise (an
9436 expensive) divide is needed. */
9437 if (exact_log2 (increment_value_abs) == -1)
9439 if (loop_dump_stream)
9440 fprintf (loop_dump_stream,
9441 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
9445 /* compute the number of iterations */
9450 /* Again, the number of iterations is calculated by:
9452 ; compare-val - initial-val + (increment -1) + additional-iteration
9453 ; num_iterations = -----------------------------------------------------------------
9456 /* ??? Do we have to call copy_rtx here before passing rtx to
9458 if (compare_direction > 0)
9460 /* <, <= :the loop variable is increasing */
9461 temp_reg = expand_binop (loop_var_mode, sub_optab,
9462 comparison_value, initial_value,
9463 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9467 temp_reg = expand_binop (loop_var_mode, sub_optab,
9468 initial_value, comparison_value,
9469 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9472 if (increment_value_abs - 1 + add_iteration != 0)
9473 temp_reg = expand_binop (loop_var_mode, add_optab, temp_reg,
9474 GEN_INT (increment_value_abs - 1
9476 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9478 if (increment_value_abs != 1)
9479 iterations_num_reg = expand_binop (loop_var_mode, asr_optab,
9481 GEN_INT (exact_log2 (increment_value_abs)),
9482 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9484 iterations_num_reg = temp_reg;
9486 sequence = gen_sequence ();
9488 emit_insn_before (sequence, loop_start);
9489 instrument_loop_bct (loop_start, loop_end, iterations_num_reg);
9493 #endif /* Complex case */
9496 /* Instrument loop by inserting a bct in it as follows:
9497 1. A new counter register is created.
9498 2. In the head of the loop the new variable is initialized to the value
9499 passed in the loop_num_iterations parameter.
9500 3. At the end of the loop, comparison of the register with 0 is generated.
9501 The created comparison follows the pattern defined for the
9502 decrement_and_branch_on_count insn, so this insn will be generated.
9503 4. The branch on the old variable are deleted. The compare must remain
9504 because it might be used elsewhere. If the loop-variable or condition
9505 register are used elsewhere, they will be eliminated by flow. */
9508 instrument_loop_bct (loop_start, loop_end, loop_num_iterations)
9509 rtx loop_start, loop_end;
9510 rtx loop_num_iterations;
9516 if (HAVE_decrement_and_branch_on_count)
9518 if (loop_dump_stream)
9520 fputs ("instrument_bct: Inserting BCT (", loop_dump_stream);
9521 if (GET_CODE (loop_num_iterations) == CONST_INT)
9522 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC,
9523 INTVAL (loop_num_iterations));
9525 fputs ("runtime", loop_dump_stream);
9526 fputs (" iterations)", loop_dump_stream);
9529 /* Discard original jump to continue loop. Original compare result
9530 may still be live, so it cannot be discarded explicitly. */
9531 delete_insn (PREV_INSN (loop_end));
9533 /* Insert the label which will delimit the start of the loop. */
9534 start_label = gen_label_rtx ();
9535 emit_label_after (start_label, loop_start);
9537 /* Insert initialization of the count register into the loop header. */
9539 counter_reg = gen_reg_rtx (word_mode);
9540 emit_insn (gen_move_insn (counter_reg, loop_num_iterations));
9541 sequence = gen_sequence ();
9543 emit_insn_before (sequence, loop_start);
9545 /* Insert new comparison on the count register instead of the
9546 old one, generating the needed BCT pattern (that will be
9547 later recognized by assembly generation phase). */
9548 emit_jump_insn_before (gen_decrement_and_branch_on_count (counter_reg,
9551 LABEL_NUSES (start_label)++;
9555 #endif /* HAVE_decrement_and_branch_on_count */
9557 /* Scan the function and determine whether it has indirect (computed) jumps.
9559 This is taken mostly from flow.c; similar code exists elsewhere
9560 in the compiler. It may be useful to put this into rtlanal.c. */
9562 indirect_jump_in_function_p (start)
9567 for (insn = start; insn; insn = NEXT_INSN (insn))
9568 if (computed_jump_p (insn))
9574 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9575 documentation for LOOP_MEMS for the definition of `appropriate'.
9576 This function is called from prescan_loop via for_each_rtx. */
9579 insert_loop_mem (mem, data)
9581 void *data ATTRIBUTE_UNUSED;
9589 switch (GET_CODE (m))
9595 /* We're not interested in the MEM associated with a
9596 CONST_DOUBLE, so there's no need to traverse into this. */
9600 /* This is not a MEM. */
9604 /* See if we've already seen this MEM. */
9605 for (i = 0; i < loop_mems_idx; ++i)
9606 if (rtx_equal_p (m, loop_mems[i].mem))
9608 if (GET_MODE (m) != GET_MODE (loop_mems[i].mem))
9609 /* The modes of the two memory accesses are different. If
9610 this happens, something tricky is going on, and we just
9611 don't optimize accesses to this MEM. */
9612 loop_mems[i].optimize = 0;
9617 /* Resize the array, if necessary. */
9618 if (loop_mems_idx == loop_mems_allocated)
9620 if (loop_mems_allocated != 0)
9621 loop_mems_allocated *= 2;
9623 loop_mems_allocated = 32;
9625 loop_mems = (loop_mem_info*)
9626 xrealloc (loop_mems,
9627 loop_mems_allocated * sizeof (loop_mem_info));
9630 /* Actually insert the MEM. */
9631 loop_mems[loop_mems_idx].mem = m;
9632 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9633 because we can't put it in a register. We still store it in the
9634 table, though, so that if we see the same address later, but in a
9635 non-BLK mode, we'll not think we can optimize it at that point. */
9636 loop_mems[loop_mems_idx].optimize = (GET_MODE (m) != BLKmode);
9637 loop_mems[loop_mems_idx].reg = NULL_RTX;
9643 /* Like load_mems, but also ensures that SET_IN_LOOP,
9644 MAY_NOT_OPTIMIZE, REG_SINGLE_USAGE, and INSN_COUNT have the correct
9645 values after load_mems. */
9648 load_mems_and_recount_loop_regs_set (scan_start, end, loop_top, start,
9656 int nregs = max_reg_num ();
9658 load_mems (scan_start, end, loop_top, start);
9660 /* Recalculate set_in_loop and friends since load_mems may have
9661 created new registers. */
9662 if (max_reg_num () > nregs)
9668 nregs = max_reg_num ();
9670 if ((unsigned) nregs > set_in_loop->num_elements)
9672 /* Grow all the arrays. */
9673 VARRAY_GROW (set_in_loop, nregs);
9674 VARRAY_GROW (n_times_set, nregs);
9675 VARRAY_GROW (may_not_optimize, nregs);
9676 VARRAY_GROW (reg_single_usage, nregs);
9678 /* Clear the arrays */
9679 bzero ((char *) &set_in_loop->data, nregs * sizeof (int));
9680 bzero ((char *) &may_not_optimize->data, nregs * sizeof (char));
9681 bzero ((char *) ®_single_usage->data, nregs * sizeof (rtx));
9683 count_loop_regs_set (loop_top ? loop_top : start, end,
9684 may_not_optimize, reg_single_usage,
9687 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
9689 VARRAY_CHAR (may_not_optimize, i) = 1;
9690 VARRAY_INT (set_in_loop, i) = 1;
9693 #ifdef AVOID_CCMODE_COPIES
9694 /* Don't try to move insns which set CC registers if we should not
9695 create CCmode register copies. */
9696 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
9697 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
9698 VARRAY_CHAR (may_not_optimize, i) = 1;
9701 /* Set n_times_set for the new registers. */
9702 bcopy ((char *) (&set_in_loop->data.i[0] + old_nregs),
9703 (char *) (&n_times_set->data.i[0] + old_nregs),
9704 (nregs - old_nregs) * sizeof (int));
9708 /* Move MEMs into registers for the duration of the loop. SCAN_START
9709 is the first instruction in the loop (as it is executed). The
9710 other parameters are as for next_insn_in_loop. */
9713 load_mems (scan_start, end, loop_top, start)
9719 int maybe_never = 0;
9722 rtx label = NULL_RTX;
9723 rtx end_label = NULL_RTX;
9724 /* Nonzero if the next instruction may never be executed. */
9725 int next_maybe_never = 0;
9726 int last_max_reg = max_reg_num ();
9728 if (loop_mems_idx == 0)
9731 /* Check to see if it's possible that some instructions in the
9732 loop are never executed. */
9733 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
9734 p != NULL_RTX && !maybe_never;
9735 p = next_insn_in_loop (p, scan_start, end, loop_top))
9737 if (GET_CODE (p) == CODE_LABEL)
9739 else if (GET_CODE (p) == JUMP_INSN
9740 /* If we enter the loop in the middle, and scan
9741 around to the beginning, don't set maybe_never
9742 for that. This must be an unconditional jump,
9743 otherwise the code at the top of the loop might
9744 never be executed. Unconditional jumps are
9745 followed a by barrier then loop end. */
9746 && ! (GET_CODE (p) == JUMP_INSN
9747 && JUMP_LABEL (p) == loop_top
9748 && NEXT_INSN (NEXT_INSN (p)) == end
9749 && simplejump_p (p)))
9751 if (!condjump_p (p))
9752 /* Something complicated. */
9755 /* If there are any more instructions in the loop, they
9756 might not be reached. */
9757 next_maybe_never = 1;
9759 else if (next_maybe_never)
9763 /* Actually move the MEMs. */
9764 for (i = 0; i < loop_mems_idx; ++i)
9769 rtx mem = loop_mems[i].mem;
9772 if (MEM_VOLATILE_P (mem)
9773 || invariant_p (XEXP (mem, 0)) != 1)
9774 /* There's no telling whether or not MEM is modified. */
9775 loop_mems[i].optimize = 0;
9777 /* Go through the MEMs written to in the loop to see if this
9778 one is aliased by one of them. */
9779 mem_list_entry = loop_store_mems;
9780 while (mem_list_entry)
9782 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
9784 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
9787 /* MEM is indeed aliased by this store. */
9788 loop_mems[i].optimize = 0;
9791 mem_list_entry = XEXP (mem_list_entry, 1);
9794 /* If this MEM is written to, we must be sure that there
9795 are no reads from another MEM that aliases this one. */
9796 if (loop_mems[i].optimize && written)
9800 for (j = 0; j < loop_mems_idx; ++j)
9804 else if (true_dependence (mem,
9809 /* It's not safe to hoist loop_mems[i] out of
9810 the loop because writes to it might not be
9811 seen by reads from loop_mems[j]. */
9812 loop_mems[i].optimize = 0;
9818 if (maybe_never && may_trap_p (mem))
9819 /* We can't access the MEM outside the loop; it might
9820 cause a trap that wouldn't have happened otherwise. */
9821 loop_mems[i].optimize = 0;
9823 if (!loop_mems[i].optimize)
9824 /* We thought we were going to lift this MEM out of the
9825 loop, but later discovered that we could not. */
9828 INIT_REG_SET (&copies);
9830 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9831 order to keep scan_loop from moving stores to this MEM
9832 out of the loop just because this REG is neither a
9833 user-variable nor used in the loop test. */
9834 reg = gen_reg_rtx (GET_MODE (mem));
9835 REG_USERVAR_P (reg) = 1;
9836 loop_mems[i].reg = reg;
9838 /* Now, replace all references to the MEM with the
9839 corresponding pesudos. */
9841 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
9843 p = next_insn_in_loop (p, scan_start, end, loop_top))
9848 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
9850 /* See if this copies the mem into a register that isn't
9851 modified afterwards. We'll try to do copy propagation
9852 a little further on. */
9853 set = single_set (p);
9855 /* @@@ This test is _way_ too conservative. */
9857 && GET_CODE (SET_DEST (set)) == REG
9858 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
9859 && REGNO (SET_DEST (set)) < last_max_reg
9860 && VARRAY_INT (n_times_set, REGNO (SET_DEST (set))) == 1
9861 && rtx_equal_p (SET_SRC (set), loop_mems[i].mem))
9862 SET_REGNO_REG_SET (&copies, REGNO (SET_DEST (set)));
9865 for_each_rtx (&p, replace_loop_mem, &ri);
9868 if (GET_CODE (p) == CODE_LABEL
9869 || GET_CODE (p) == JUMP_INSN)
9873 if (! apply_change_group ())
9874 /* We couldn't replace all occurrences of the MEM. */
9875 loop_mems[i].optimize = 0;
9881 /* Load the memory immediately before START, which is
9882 the NOTE_LOOP_BEG. */
9883 set = gen_move_insn (reg, mem);
9884 emit_insn_before (set, start);
9888 if (label == NULL_RTX)
9890 /* We must compute the former
9891 right-after-the-end label before we insert
9893 end_label = next_label (end);
9894 label = gen_label_rtx ();
9895 emit_label_after (label, end);
9898 /* Store the memory immediately after END, which is
9899 the NOTE_LOOP_END. */
9900 set = gen_move_insn (copy_rtx (mem), reg);
9901 emit_insn_after (set, label);
9904 if (loop_dump_stream)
9906 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9907 REGNO (reg), (written ? "r/w" : "r/o"));
9908 print_rtl (loop_dump_stream, mem);
9909 fputc ('\n', loop_dump_stream);
9912 /* Attempt a bit of copy propagation. This helps untangle the
9913 data flow, and enables {basic,general}_induction_var to find
9915 EXECUTE_IF_SET_IN_REG_SET
9916 (&copies, FIRST_PSEUDO_REGISTER, j,
9918 try_copy_prop (scan_start, loop_top, end, loop_mems[i].reg, j);
9920 CLEAR_REG_SET (&copies);
9924 if (label != NULL_RTX)
9926 /* Now, we need to replace all references to the previous exit
9927 label with the new one. */
9932 for (p = start; p != end; p = NEXT_INSN (p))
9934 for_each_rtx (&p, replace_label, &rr);
9936 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9937 field. This is not handled by for_each_rtx because it doesn't
9938 handle unprinted ('0') fields. We need to update JUMP_LABEL
9939 because the immediately following unroll pass will use it.
9940 replace_label would not work anyways, because that only handles
9942 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9943 JUMP_LABEL (p) = label;
9948 /* For communication between note_reg_stored and its caller. */
9949 struct note_reg_stored_arg
9955 /* Called via note_stores, record in SET_SEEN whether X, which is written,
9958 note_reg_stored (x, setter, arg)
9962 struct note_reg_stored_arg *t = (struct note_reg_stored_arg *)arg;
9967 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
9968 There must be exactly one insn that sets this pseudo; it will be
9969 deleted if all replacements succeed and we can prove that the register
9970 is not used after the loop.
9971 The arguments SCAN_START, LOOP_TOP and END are as in load_mems. */
9973 try_copy_prop (scan_start, loop_top, end, replacement, regno)
9974 rtx scan_start, loop_top, end, replacement;
9977 /* This is the reg that we are copying from. */
9978 rtx reg_rtx = regno_reg_rtx[regno];
9981 /* These help keep track of whether we replaced all uses of the reg. */
9982 int replaced_last = 0;
9983 int store_is_first = 0;
9985 for (insn = next_insn_in_loop (scan_start, scan_start, end, loop_top);
9987 insn = next_insn_in_loop (insn, scan_start, end, loop_top))
9991 /* Only substitute within one extended basic block from the initializing
9993 if (GET_CODE (insn) == CODE_LABEL && init_insn)
9996 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
9999 /* Is this the initializing insn? */
10000 set = single_set (insn);
10002 && GET_CODE (SET_DEST (set)) == REG
10003 && REGNO (SET_DEST (set)) == regno)
10009 if (REGNO_FIRST_UID (regno) == INSN_UID (insn))
10010 store_is_first = 1;
10013 /* Only substitute after seeing the initializing insn. */
10014 if (init_insn && insn != init_insn)
10016 struct note_reg_stored_arg arg;
10018 array[0] = reg_rtx;
10019 array[1] = replacement;
10022 for_each_rtx (&insn, replace_loop_reg, array);
10023 if (REGNO_LAST_UID (regno) == INSN_UID (insn))
10026 /* Stop replacing when REPLACEMENT is modified. */
10027 arg.reg = replacement;
10029 note_stores (PATTERN (insn), note_reg_stored, &arg);
10036 if (apply_change_group ())
10038 if (loop_dump_stream)
10039 fprintf (loop_dump_stream, " Replaced reg %d", regno);
10040 if (store_is_first && replaced_last)
10042 PUT_CODE (init_insn, NOTE);
10043 NOTE_LINE_NUMBER (init_insn) = NOTE_INSN_DELETED;
10044 if (loop_dump_stream)
10045 fprintf (loop_dump_stream, ", deleting init_insn (%d)",
10046 INSN_UID (init_insn));
10048 if (loop_dump_stream)
10049 fprintf (loop_dump_stream, ".\n");
10053 /* Replace MEM with its associated pseudo register. This function is
10054 called from load_mems via for_each_rtx. DATA is actually an
10055 rtx_and_int * describing the instruction currently being scanned
10056 and the MEM we are currently replacing. */
10059 replace_loop_mem (mem, data)
10071 switch (GET_CODE (m))
10077 /* We're not interested in the MEM associated with a
10078 CONST_DOUBLE, so there's no need to traverse into one. */
10082 /* This is not a MEM. */
10086 ri = (rtx_and_int*) data;
10089 if (!rtx_equal_p (loop_mems[i].mem, m))
10090 /* This is not the MEM we are currently replacing. */
10095 /* Actually replace the MEM. */
10096 validate_change (insn, mem, loop_mems[i].reg, 1);
10101 /* Replace one register with another. Called through for_each_rtx; PX points
10102 to the rtx being scanned. DATA is actually an array of three rtx's; the
10103 first one is the one to be replaced, and the second one the replacement.
10104 The third one is the current insn. */
10107 replace_loop_reg (px, data)
10112 rtx *array = (rtx *)data;
10118 validate_change (array[2], px, array[1], 1);
10123 /* Replace occurrences of the old exit label for the loop with the new
10124 one. DATA is an rtx_pair containing the old and new labels,
10128 replace_label (x, data)
10133 rtx old_label = ((rtx_pair*) data)->r1;
10134 rtx new_label = ((rtx_pair*) data)->r2;
10139 if (GET_CODE (l) != LABEL_REF)
10142 if (XEXP (l, 0) != old_label)
10145 XEXP (l, 0) = new_label;
10146 ++LABEL_NUSES (new_label);
10147 --LABEL_NUSES (old_label);
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