1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
53 /* Vector mapping INSN_UIDs to luids.
54 The luids are like uids but increase monotonically always.
55 We use them to see whether a jump comes from outside a given loop. */
59 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
60 number the insn is contained in. */
64 /* 1 + largest uid of any insn. */
68 /* 1 + luid of last insn. */
72 /* Number of loops detected in current function. Used as index to the
75 static int max_loop_num;
77 /* Indexed by loop number, contains the first and last insn of each loop. */
79 static rtx *loop_number_loop_starts, *loop_number_loop_ends;
81 /* Likewise for the continue insn */
82 static rtx *loop_number_loop_cont;
84 /* The first code_label that is reached in every loop iteration.
85 0 when not computed yet, initially const0_rtx if a jump couldn't be
87 Also set to 0 when there is no such label before the NOTE_INSN_LOOP_CONT
88 of this loop, or in verify_dominator, if a jump couldn't be followed. */
89 static rtx *loop_number_cont_dominator;
91 /* For each loop, gives the containing loop number, -1 if none. */
95 #ifdef HAVE_decrement_and_branch_on_count
96 /* Records whether resource in use by inner loop. */
98 int *loop_used_count_register;
99 #endif /* HAVE_decrement_and_branch_on_count */
101 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
102 really a loop (an insn outside the loop branches into it). */
104 static char *loop_invalid;
106 /* Indexed by loop number, links together all LABEL_REFs which refer to
107 code labels outside the loop. Used by routines that need to know all
108 loop exits, such as final_biv_value and final_giv_value.
110 This does not include loop exits due to return instructions. This is
111 because all bivs and givs are pseudos, and hence must be dead after a
112 return, so the presense of a return does not affect any of the
113 optimizations that use this info. It is simpler to just not include return
114 instructions on this list. */
116 rtx *loop_number_exit_labels;
118 /* Indexed by loop number, counts the number of LABEL_REFs on
119 loop_number_exit_labels for this loop and all loops nested inside it. */
121 int *loop_number_exit_count;
123 /* Nonzero if there is a subroutine call in the current loop. */
125 static int loop_has_call;
127 /* Nonzero if there is a volatile memory reference in the current
130 static int loop_has_volatile;
132 /* Nonzero if there is a tablejump in the current loop. */
134 static int loop_has_tablejump;
136 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
137 current loop. A continue statement will generate a branch to
138 NEXT_INSN (loop_continue). */
140 static rtx loop_continue;
142 /* Indexed by register number, contains the number of times the reg
143 is set during the loop being scanned.
144 During code motion, a negative value indicates a reg that has been
145 made a candidate; in particular -2 means that it is an candidate that
146 we know is equal to a constant and -1 means that it is an candidate
147 not known equal to a constant.
148 After code motion, regs moved have 0 (which is accurate now)
149 while the failed candidates have the original number of times set.
151 Therefore, at all times, == 0 indicates an invariant register;
152 < 0 a conditionally invariant one. */
154 static varray_type set_in_loop;
156 /* Original value of set_in_loop; same except that this value
157 is not set negative for a reg whose sets have been made candidates
158 and not set to 0 for a reg that is moved. */
160 static varray_type n_times_set;
162 /* Index by register number, 1 indicates that the register
163 cannot be moved or strength reduced. */
165 static varray_type may_not_optimize;
167 /* Contains the insn in which a register was used if it was used
168 exactly once; contains const0_rtx if it was used more than once. */
170 static varray_type reg_single_usage;
172 /* Nonzero means reg N has already been moved out of one loop.
173 This reduces the desire to move it out of another. */
175 static char *moved_once;
177 /* List of MEMs that are stored in this loop. */
179 static rtx loop_store_mems;
181 /* The insn where the first of these was found. */
182 static rtx first_loop_store_insn;
184 typedef struct loop_mem_info {
185 rtx mem; /* The MEM itself. */
186 rtx reg; /* Corresponding pseudo, if any. */
187 int optimize; /* Nonzero if we can optimize access to this MEM. */
190 /* Array of MEMs that are used (read or written) in this loop, but
191 cannot be aliased by anything in this loop, except perhaps
192 themselves. In other words, if loop_mems[i] is altered during the
193 loop, it is altered by an expression that is rtx_equal_p to it. */
195 static loop_mem_info *loop_mems;
197 /* The index of the next available slot in LOOP_MEMS. */
199 static int loop_mems_idx;
201 /* The number of elements allocated in LOOP_MEMs. */
203 static int loop_mems_allocated;
205 /* Nonzero if we don't know what MEMs were changed in the current loop.
206 This happens if the loop contains a call (in which case `loop_has_call'
207 will also be set) or if we store into more than NUM_STORES MEMs. */
209 static int unknown_address_altered;
211 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
212 static int num_movables;
214 /* Count of memory write instructions discovered in the loop. */
215 static int num_mem_sets;
217 /* Number of loops contained within the current one, including itself. */
218 static int loops_enclosed;
220 /* Bound on pseudo register number before loop optimization.
221 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
222 int max_reg_before_loop;
224 /* This obstack is used in product_cheap_p to allocate its rtl. It
225 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
226 If we used the same obstack that it did, we would be deallocating
229 static struct obstack temp_obstack;
231 /* This is where the pointer to the obstack being used for RTL is stored. */
233 extern struct obstack *rtl_obstack;
235 #define obstack_chunk_alloc xmalloc
236 #define obstack_chunk_free free
238 /* During the analysis of a loop, a chain of `struct movable's
239 is made to record all the movable insns found.
240 Then the entire chain can be scanned to decide which to move. */
244 rtx insn; /* A movable insn */
245 rtx set_src; /* The expression this reg is set from. */
246 rtx set_dest; /* The destination of this SET. */
247 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
248 of any registers used within the LIBCALL. */
249 int consec; /* Number of consecutive following insns
250 that must be moved with this one. */
251 int regno; /* The register it sets */
252 short lifetime; /* lifetime of that register;
253 may be adjusted when matching movables
254 that load the same value are found. */
255 short savings; /* Number of insns we can move for this reg,
256 including other movables that force this
257 or match this one. */
258 unsigned int cond : 1; /* 1 if only conditionally movable */
259 unsigned int force : 1; /* 1 means MUST move this insn */
260 unsigned int global : 1; /* 1 means reg is live outside this loop */
261 /* If PARTIAL is 1, GLOBAL means something different:
262 that the reg is live outside the range from where it is set
263 to the following label. */
264 unsigned int done : 1; /* 1 inhibits further processing of this */
266 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
267 In particular, moving it does not make it
269 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
270 load SRC, rather than copying INSN. */
271 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
272 first insn of a consecutive sets group. */
273 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
274 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
275 that we should avoid changing when clearing
276 the rest of the reg. */
277 struct movable *match; /* First entry for same value */
278 struct movable *forces; /* An insn that must be moved if this is */
279 struct movable *next;
282 static struct movable *the_movables;
284 FILE *loop_dump_stream;
286 /* Forward declarations. */
288 static void verify_dominator PROTO((int));
289 static void find_and_verify_loops PROTO((rtx));
290 static void mark_loop_jump PROTO((rtx, int));
291 static void prescan_loop PROTO((rtx, rtx));
292 static int reg_in_basic_block_p PROTO((rtx, rtx));
293 static int consec_sets_invariant_p PROTO((rtx, int, rtx));
294 static int labels_in_range_p PROTO((rtx, int));
295 static void count_one_set PROTO((rtx, rtx, varray_type, rtx *));
297 static void count_loop_regs_set PROTO((rtx, rtx, varray_type, varray_type,
299 static void note_addr_stored PROTO((rtx, rtx));
300 static int loop_reg_used_before_p PROTO((rtx, rtx, rtx, rtx, rtx));
301 static void scan_loop PROTO((rtx, rtx, rtx, int, int));
303 static void replace_call_address PROTO((rtx, rtx, rtx));
305 static rtx skip_consec_insns PROTO((rtx, int));
306 static int libcall_benefit PROTO((rtx));
307 static void ignore_some_movables PROTO((struct movable *));
308 static void force_movables PROTO((struct movable *));
309 static void combine_movables PROTO((struct movable *, int));
310 static int regs_match_p PROTO((rtx, rtx, struct movable *));
311 static int rtx_equal_for_loop_p PROTO((rtx, rtx, struct movable *));
312 static void add_label_notes PROTO((rtx, rtx));
313 static void move_movables PROTO((struct movable *, int, int, rtx, rtx, int));
314 static int count_nonfixed_reads PROTO((rtx));
315 static void strength_reduce PROTO((rtx, rtx, rtx, int, rtx, rtx, rtx, int, int));
316 static void find_single_use_in_loop PROTO((rtx, rtx, varray_type));
317 static int valid_initial_value_p PROTO((rtx, rtx, int, rtx));
318 static void find_mem_givs PROTO((rtx, rtx, int, rtx, rtx));
319 static void record_biv PROTO((struct induction *, rtx, rtx, rtx, rtx, rtx *, int, int));
320 static void check_final_value PROTO((struct induction *, rtx, rtx,
321 unsigned HOST_WIDE_INT));
322 static void record_giv PROTO((struct induction *, rtx, rtx, rtx, rtx, rtx, int, enum g_types, int, rtx *, rtx, rtx));
323 static void update_giv_derive PROTO((rtx));
324 static int basic_induction_var PROTO((rtx, enum machine_mode, rtx, rtx, rtx *, rtx *, rtx **));
325 static rtx simplify_giv_expr PROTO((rtx, int *));
326 static int general_induction_var PROTO((rtx, rtx *, rtx *, rtx *, int, int *));
327 static int consec_sets_giv PROTO((int, rtx, rtx, rtx, rtx *, rtx *, rtx *));
328 static int check_dbra_loop PROTO((rtx, int, rtx, struct loop_info *));
329 static rtx express_from_1 PROTO((rtx, rtx, rtx));
330 static rtx combine_givs_p PROTO((struct induction *, struct induction *));
331 static void combine_givs PROTO((struct iv_class *));
332 struct recombine_givs_stats;
333 static int find_life_end PROTO((rtx, struct recombine_givs_stats *, rtx, rtx));
334 static void recombine_givs PROTO((struct iv_class *, rtx, rtx, int));
335 static int product_cheap_p PROTO((rtx, rtx));
336 static int maybe_eliminate_biv PROTO((struct iv_class *, rtx, rtx, int, int, int));
337 static int maybe_eliminate_biv_1 PROTO((rtx, rtx, struct iv_class *, int, rtx));
338 static int last_use_this_basic_block PROTO((rtx, rtx));
339 static void record_initial PROTO((rtx, rtx));
340 static void update_reg_last_use PROTO((rtx, rtx));
341 static rtx next_insn_in_loop PROTO((rtx, rtx, rtx, rtx));
342 static void load_mems_and_recount_loop_regs_set PROTO((rtx, rtx, rtx,
344 static void load_mems PROTO((rtx, rtx, rtx, rtx));
345 static int insert_loop_mem PROTO((rtx *, void *));
346 static int replace_loop_mem PROTO((rtx *, void *));
347 static int replace_label PROTO((rtx *, void *));
349 typedef struct rtx_and_int {
354 typedef struct rtx_pair {
359 /* Nonzero iff INSN is between START and END, inclusive. */
360 #define INSN_IN_RANGE_P(INSN, START, END) \
361 (INSN_UID (INSN) < max_uid_for_loop \
362 && INSN_LUID (INSN) >= INSN_LUID (START) \
363 && INSN_LUID (INSN) <= INSN_LUID (END))
365 #ifdef HAVE_decrement_and_branch_on_count
366 /* Test whether BCT applicable and safe. */
367 static void insert_bct PROTO((rtx, rtx, struct loop_info *));
369 /* Auxiliary function that inserts the BCT pattern into the loop. */
370 static void instrument_loop_bct PROTO((rtx, rtx, rtx));
371 #endif /* HAVE_decrement_and_branch_on_count */
373 /* Indirect_jump_in_function is computed once per function. */
374 int indirect_jump_in_function = 0;
375 static int indirect_jump_in_function_p PROTO((rtx));
377 static int compute_luids PROTO((rtx, rtx, int));
379 static int biv_elimination_giv_has_0_offset PROTO((struct induction *,
380 struct induction *, rtx));
382 /* Relative gain of eliminating various kinds of operations. */
385 static int shift_cost;
386 static int mult_cost;
389 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
390 copy the value of the strength reduced giv to its original register. */
391 static int copy_cost;
393 /* Cost of using a register, to normalize the benefits of a giv. */
394 static int reg_address_cost;
400 char *free_point = (char *) oballoc (1);
401 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
403 add_cost = rtx_cost (gen_rtx_PLUS (word_mode, reg, reg), SET);
406 reg_address_cost = ADDRESS_COST (reg);
408 reg_address_cost = rtx_cost (reg, MEM);
411 /* We multiply by 2 to reconcile the difference in scale between
412 these two ways of computing costs. Otherwise the cost of a copy
413 will be far less than the cost of an add. */
417 /* Free the objects we just allocated. */
420 /* Initialize the obstack used for rtl in product_cheap_p. */
421 gcc_obstack_init (&temp_obstack);
424 /* Compute the mapping from uids to luids.
425 LUIDs are numbers assigned to insns, like uids,
426 except that luids increase monotonically through the code.
427 Start at insn START and stop just before END. Assign LUIDs
428 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
430 compute_luids (start, end, prev_luid)
437 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
439 if (INSN_UID (insn) >= max_uid_for_loop)
441 /* Don't assign luids to line-number NOTEs, so that the distance in
442 luids between two insns is not affected by -g. */
443 if (GET_CODE (insn) != NOTE
444 || NOTE_LINE_NUMBER (insn) <= 0)
445 uid_luid[INSN_UID (insn)] = ++i;
447 /* Give a line number note the same luid as preceding insn. */
448 uid_luid[INSN_UID (insn)] = i;
453 /* Entry point of this file. Perform loop optimization
454 on the current function. F is the first insn of the function
455 and DUMPFILE is a stream for output of a trace of actions taken
456 (or 0 if none should be output). */
459 loop_optimize (f, dumpfile, unroll_p, bct_p)
460 /* f is the first instruction of a chain of insns for one function */
468 loop_dump_stream = dumpfile;
470 init_recog_no_volatile ();
472 max_reg_before_loop = max_reg_num ();
474 moved_once = (char *) alloca (max_reg_before_loop);
475 bzero (moved_once, max_reg_before_loop);
479 /* Count the number of loops. */
482 for (insn = f; insn; insn = NEXT_INSN (insn))
484 if (GET_CODE (insn) == NOTE
485 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
489 /* Don't waste time if no loops. */
490 if (max_loop_num == 0)
493 /* Get size to use for tables indexed by uids.
494 Leave some space for labels allocated by find_and_verify_loops. */
495 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
497 uid_luid = (int *) alloca (max_uid_for_loop * sizeof (int));
498 uid_loop_num = (int *) alloca (max_uid_for_loop * sizeof (int));
500 bzero ((char *) uid_luid, max_uid_for_loop * sizeof (int));
501 bzero ((char *) uid_loop_num, max_uid_for_loop * sizeof (int));
503 /* Allocate tables for recording each loop. We set each entry, so they need
505 loop_number_loop_starts = (rtx *) alloca (max_loop_num * sizeof (rtx));
506 loop_number_loop_ends = (rtx *) alloca (max_loop_num * sizeof (rtx));
507 loop_number_loop_cont = (rtx *) alloca (max_loop_num * sizeof (rtx));
508 loop_number_cont_dominator = (rtx *) alloca (max_loop_num * sizeof (rtx));
509 loop_outer_loop = (int *) alloca (max_loop_num * sizeof (int));
510 loop_invalid = (char *) alloca (max_loop_num * sizeof (char));
511 loop_number_exit_labels = (rtx *) alloca (max_loop_num * sizeof (rtx));
512 loop_number_exit_count = (int *) alloca (max_loop_num * sizeof (int));
514 #ifdef HAVE_decrement_and_branch_on_count
515 /* Allocate for BCT optimization */
516 loop_used_count_register = (int *) alloca (max_loop_num * sizeof (int));
517 bzero ((char *) loop_used_count_register, max_loop_num * sizeof (int));
518 #endif /* HAVE_decrement_and_branch_on_count */
520 /* Find and process each loop.
521 First, find them, and record them in order of their beginnings. */
522 find_and_verify_loops (f);
524 /* Now find all register lifetimes. This must be done after
525 find_and_verify_loops, because it might reorder the insns in the
527 reg_scan (f, max_reg_num (), 1);
529 /* This must occur after reg_scan so that registers created by gcse
530 will have entries in the register tables.
532 We could have added a call to reg_scan after gcse_main in toplev.c,
533 but moving this call to init_alias_analysis is more efficient. */
534 init_alias_analysis ();
536 /* See if we went too far. Note that get_max_uid already returns
537 one more that the maximum uid of all insn. */
538 if (get_max_uid () > max_uid_for_loop)
540 /* Now reset it to the actual size we need. See above. */
541 max_uid_for_loop = get_max_uid ();
543 /* find_and_verify_loops has already called compute_luids, but it might
544 have rearranged code afterwards, so we need to recompute the luids now. */
545 max_luid = compute_luids (f, NULL_RTX, 0);
547 /* Don't leave gaps in uid_luid for insns that have been
548 deleted. It is possible that the first or last insn
549 using some register has been deleted by cross-jumping.
550 Make sure that uid_luid for that former insn's uid
551 points to the general area where that insn used to be. */
552 for (i = 0; i < max_uid_for_loop; i++)
554 uid_luid[0] = uid_luid[i];
555 if (uid_luid[0] != 0)
558 for (i = 0; i < max_uid_for_loop; i++)
559 if (uid_luid[i] == 0)
560 uid_luid[i] = uid_luid[i - 1];
562 /* Create a mapping from loops to BLOCK tree nodes. */
563 if (unroll_p && write_symbols != NO_DEBUG)
564 find_loop_tree_blocks ();
566 /* Determine if the function has indirect jump. On some systems
567 this prevents low overhead loop instructions from being used. */
568 indirect_jump_in_function = indirect_jump_in_function_p (f);
570 /* Now scan the loops, last ones first, since this means inner ones are done
571 before outer ones. */
572 for (i = max_loop_num-1; i >= 0; i--)
573 if (! loop_invalid[i] && loop_number_loop_ends[i])
574 scan_loop (loop_number_loop_starts[i], loop_number_loop_ends[i],
575 loop_number_loop_cont[i], unroll_p, bct_p);
577 /* If debugging and unrolling loops, we must replicate the tree nodes
578 corresponding to the blocks inside the loop, so that the original one
579 to one mapping will remain. */
580 if (unroll_p && write_symbols != NO_DEBUG)
581 unroll_block_trees ();
583 end_alias_analysis ();
586 /* Returns the next insn, in execution order, after INSN. START and
587 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
588 respectively. LOOP_TOP, if non-NULL, is the top of the loop in the
589 insn-stream; it is used with loops that are entered near the
593 next_insn_in_loop (insn, start, end, loop_top)
599 insn = NEXT_INSN (insn);
604 /* Go to the top of the loop, and continue there. */
618 /* Optimize one loop whose start is LOOP_START and end is END.
619 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
621 LOOP_CONT is the NOTE_INSN_LOOP_CONT. */
623 /* ??? Could also move memory writes out of loops if the destination address
624 is invariant, the source is invariant, the memory write is not volatile,
625 and if we can prove that no read inside the loop can read this address
626 before the write occurs. If there is a read of this address after the
627 write, then we can also mark the memory read as invariant. */
630 scan_loop (loop_start, end, loop_cont, unroll_p, bct_p)
631 rtx loop_start, end, loop_cont;
636 /* 1 if we are scanning insns that could be executed zero times. */
638 /* 1 if we are scanning insns that might never be executed
639 due to a subroutine call which might exit before they are reached. */
641 /* For a rotated loop that is entered near the bottom,
642 this is the label at the top. Otherwise it is zero. */
644 /* Jump insn that enters the loop, or 0 if control drops in. */
645 rtx loop_entry_jump = 0;
646 /* Place in the loop where control enters. */
648 /* Number of insns in the loop. */
653 /* The SET from an insn, if it is the only SET in the insn. */
655 /* Chain describing insns movable in current loop. */
656 struct movable *movables = 0;
657 /* Last element in `movables' -- so we can add elements at the end. */
658 struct movable *last_movable = 0;
659 /* Ratio of extra register life span we can justify
660 for saving an instruction. More if loop doesn't call subroutines
661 since in that case saving an insn makes more difference
662 and more registers are available. */
664 /* Nonzero if we are scanning instructions in a sub-loop. */
668 /* Determine whether this loop starts with a jump down to a test at
669 the end. This will occur for a small number of loops with a test
670 that is too complex to duplicate in front of the loop.
672 We search for the first insn or label in the loop, skipping NOTEs.
673 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
674 (because we might have a loop executed only once that contains a
675 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
676 (in case we have a degenerate loop).
678 Note that if we mistakenly think that a loop is entered at the top
679 when, in fact, it is entered at the exit test, the only effect will be
680 slightly poorer optimization. Making the opposite error can generate
681 incorrect code. Since very few loops now start with a jump to the
682 exit test, the code here to detect that case is very conservative. */
684 for (p = NEXT_INSN (loop_start);
686 && GET_CODE (p) != CODE_LABEL && GET_RTX_CLASS (GET_CODE (p)) != 'i'
687 && (GET_CODE (p) != NOTE
688 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
689 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
695 /* Set up variables describing this loop. */
696 prescan_loop (loop_start, end);
697 threshold = (loop_has_call ? 1 : 2) * (1 + n_non_fixed_regs);
699 /* If loop has a jump before the first label,
700 the true entry is the target of that jump.
701 Start scan from there.
702 But record in LOOP_TOP the place where the end-test jumps
703 back to so we can scan that after the end of the loop. */
704 if (GET_CODE (p) == JUMP_INSN)
708 /* Loop entry must be unconditional jump (and not a RETURN) */
710 && JUMP_LABEL (p) != 0
711 /* Check to see whether the jump actually
712 jumps out of the loop (meaning it's no loop).
713 This case can happen for things like
714 do {..} while (0). If this label was generated previously
715 by loop, we can't tell anything about it and have to reject
717 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, end))
719 loop_top = next_label (scan_start);
720 scan_start = JUMP_LABEL (p);
724 /* If SCAN_START was an insn created by loop, we don't know its luid
725 as required by loop_reg_used_before_p. So skip such loops. (This
726 test may never be true, but it's best to play it safe.)
728 Also, skip loops where we do not start scanning at a label. This
729 test also rejects loops starting with a JUMP_INSN that failed the
732 if (INSN_UID (scan_start) >= max_uid_for_loop
733 || GET_CODE (scan_start) != CODE_LABEL)
735 if (loop_dump_stream)
736 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
737 INSN_UID (loop_start), INSN_UID (end));
741 /* Count number of times each reg is set during this loop.
742 Set VARRAY_CHAR (may_not_optimize, I) if it is not safe to move out
743 the setting of register I. Set VARRAY_RTX (reg_single_usage, I). */
745 /* Allocate extra space for REGS that might be created by
746 load_mems. We allocate a little extra slop as well, in the hopes
747 that even after the moving of movables creates some new registers
748 we won't have to reallocate these arrays. However, we do grow
749 the arrays, if necessary, in load_mems_recount_loop_regs_set. */
750 nregs = max_reg_num () + loop_mems_idx + 16;
751 VARRAY_INT_INIT (set_in_loop, nregs, "set_in_loop");
752 VARRAY_INT_INIT (n_times_set, nregs, "n_times_set");
753 VARRAY_CHAR_INIT (may_not_optimize, nregs, "may_not_optimize");
754 VARRAY_RTX_INIT (reg_single_usage, nregs, "reg_single_usage");
756 count_loop_regs_set (loop_top ? loop_top : loop_start, end,
757 may_not_optimize, reg_single_usage, &insn_count, nregs);
759 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
761 VARRAY_CHAR (may_not_optimize, i) = 1;
762 VARRAY_INT (set_in_loop, i) = 1;
765 #ifdef AVOID_CCMODE_COPIES
766 /* Don't try to move insns which set CC registers if we should not
767 create CCmode register copies. */
768 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
769 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
770 VARRAY_CHAR (may_not_optimize, i) = 1;
773 bcopy ((char *) &set_in_loop->data,
774 (char *) &n_times_set->data, nregs * sizeof (int));
776 if (loop_dump_stream)
778 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
779 INSN_UID (loop_start), INSN_UID (end), insn_count);
781 fprintf (loop_dump_stream, "Continue at insn %d.\n",
782 INSN_UID (loop_continue));
785 /* Scan through the loop finding insns that are safe to move.
786 Set set_in_loop negative for the reg being set, so that
787 this reg will be considered invariant for subsequent insns.
788 We consider whether subsequent insns use the reg
789 in deciding whether it is worth actually moving.
791 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
792 and therefore it is possible that the insns we are scanning
793 would never be executed. At such times, we must make sure
794 that it is safe to execute the insn once instead of zero times.
795 When MAYBE_NEVER is 0, all insns will be executed at least once
796 so that is not a problem. */
798 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
800 p = next_insn_in_loop (p, scan_start, end, loop_top))
802 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
803 && find_reg_note (p, REG_LIBCALL, NULL_RTX))
805 else if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
806 && find_reg_note (p, REG_RETVAL, NULL_RTX))
809 if (GET_CODE (p) == INSN
810 && (set = single_set (p))
811 && GET_CODE (SET_DEST (set)) == REG
812 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
817 rtx src = SET_SRC (set);
818 rtx dependencies = 0;
820 /* Figure out what to use as a source of this insn. If a REG_EQUIV
821 note is given or if a REG_EQUAL note with a constant operand is
822 specified, use it as the source and mark that we should move
823 this insn by calling emit_move_insn rather that duplicating the
826 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
828 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
830 src = XEXP (temp, 0), move_insn = 1;
833 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
834 if (temp && CONSTANT_P (XEXP (temp, 0)))
835 src = XEXP (temp, 0), move_insn = 1;
836 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
838 src = XEXP (temp, 0);
839 /* A libcall block can use regs that don't appear in
840 the equivalent expression. To move the libcall,
841 we must move those regs too. */
842 dependencies = libcall_other_reg (p, src);
846 /* Don't try to optimize a register that was made
847 by loop-optimization for an inner loop.
848 We don't know its life-span, so we can't compute the benefit. */
849 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
851 else if (/* The register is used in basic blocks other
852 than the one where it is set (meaning that
853 something after this point in the loop might
854 depend on its value before the set). */
855 ! reg_in_basic_block_p (p, SET_DEST (set))
856 /* And the set is not guaranteed to be executed one
857 the loop starts, or the value before the set is
858 needed before the set occurs...
860 ??? Note we have quadratic behaviour here, mitigated
861 by the fact that the previous test will often fail for
862 large loops. Rather than re-scanning the entire loop
863 each time for register usage, we should build tables
864 of the register usage and use them here instead. */
866 || loop_reg_used_before_p (set, p, loop_start,
868 /* It is unsafe to move the set.
870 This code used to consider it OK to move a set of a variable
871 which was not created by the user and not used in an exit test.
872 That behavior is incorrect and was removed. */
874 else if ((tem = invariant_p (src))
875 && (dependencies == 0
876 || (tem2 = invariant_p (dependencies)) != 0)
877 && (VARRAY_INT (set_in_loop,
878 REGNO (SET_DEST (set))) == 1
880 = consec_sets_invariant_p
882 VARRAY_INT (set_in_loop, REGNO (SET_DEST (set))),
884 /* If the insn can cause a trap (such as divide by zero),
885 can't move it unless it's guaranteed to be executed
886 once loop is entered. Even a function call might
887 prevent the trap insn from being reached
888 (since it might exit!) */
889 && ! ((maybe_never || call_passed)
890 && may_trap_p (src)))
892 register struct movable *m;
893 register int regno = REGNO (SET_DEST (set));
895 /* A potential lossage is where we have a case where two insns
896 can be combined as long as they are both in the loop, but
897 we move one of them outside the loop. For large loops,
898 this can lose. The most common case of this is the address
899 of a function being called.
901 Therefore, if this register is marked as being used exactly
902 once if we are in a loop with calls (a "large loop"), see if
903 we can replace the usage of this register with the source
904 of this SET. If we can, delete this insn.
906 Don't do this if P has a REG_RETVAL note or if we have
907 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
910 && VARRAY_RTX (reg_single_usage, regno) != 0
911 && VARRAY_RTX (reg_single_usage, regno) != const0_rtx
912 && REGNO_FIRST_UID (regno) == INSN_UID (p)
913 && (REGNO_LAST_UID (regno)
914 == INSN_UID (VARRAY_RTX (reg_single_usage, regno)))
915 && VARRAY_INT (set_in_loop, regno) == 1
916 && ! side_effects_p (SET_SRC (set))
917 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
918 && (! SMALL_REGISTER_CLASSES
919 || (! (GET_CODE (SET_SRC (set)) == REG
920 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
921 /* This test is not redundant; SET_SRC (set) might be
922 a call-clobbered register and the life of REGNO
923 might span a call. */
924 && ! modified_between_p (SET_SRC (set), p,
926 (reg_single_usage, regno))
927 && no_labels_between_p (p, VARRAY_RTX (reg_single_usage, regno))
928 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
930 (reg_single_usage, regno)))
932 /* Replace any usage in a REG_EQUAL note. Must copy the
933 new source, so that we don't get rtx sharing between the
934 SET_SOURCE and REG_NOTES of insn p. */
935 REG_NOTES (VARRAY_RTX (reg_single_usage, regno))
936 = replace_rtx (REG_NOTES (VARRAY_RTX
937 (reg_single_usage, regno)),
938 SET_DEST (set), copy_rtx (SET_SRC (set)));
941 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
942 NOTE_SOURCE_FILE (p) = 0;
943 VARRAY_INT (set_in_loop, regno) = 0;
947 m = (struct movable *) alloca (sizeof (struct movable));
951 m->dependencies = dependencies;
952 m->set_dest = SET_DEST (set);
954 m->consec = VARRAY_INT (set_in_loop,
955 REGNO (SET_DEST (set))) - 1;
959 m->move_insn = move_insn;
960 m->move_insn_first = 0;
961 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
962 m->savemode = VOIDmode;
964 /* Set M->cond if either invariant_p or consec_sets_invariant_p
965 returned 2 (only conditionally invariant). */
966 m->cond = ((tem | tem1 | tem2) > 1);
967 m->global = (uid_luid[REGNO_LAST_UID (regno)] > INSN_LUID (end)
968 || uid_luid[REGNO_FIRST_UID (regno)] < INSN_LUID (loop_start));
970 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
971 - uid_luid[REGNO_FIRST_UID (regno)]);
972 m->savings = VARRAY_INT (n_times_set, regno);
973 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
974 m->savings += libcall_benefit (p);
975 VARRAY_INT (set_in_loop, regno) = move_insn ? -2 : -1;
976 /* Add M to the end of the chain MOVABLES. */
980 last_movable->next = m;
985 /* It is possible for the first instruction to have a
986 REG_EQUAL note but a non-invariant SET_SRC, so we must
987 remember the status of the first instruction in case
988 the last instruction doesn't have a REG_EQUAL note. */
989 m->move_insn_first = m->move_insn;
991 /* Skip this insn, not checking REG_LIBCALL notes. */
992 p = next_nonnote_insn (p);
993 /* Skip the consecutive insns, if there are any. */
994 p = skip_consec_insns (p, m->consec);
995 /* Back up to the last insn of the consecutive group. */
996 p = prev_nonnote_insn (p);
998 /* We must now reset m->move_insn, m->is_equiv, and possibly
999 m->set_src to correspond to the effects of all the
1001 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
1003 m->set_src = XEXP (temp, 0), m->move_insn = 1;
1006 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
1007 if (temp && CONSTANT_P (XEXP (temp, 0)))
1008 m->set_src = XEXP (temp, 0), m->move_insn = 1;
1013 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
1016 /* If this register is always set within a STRICT_LOW_PART
1017 or set to zero, then its high bytes are constant.
1018 So clear them outside the loop and within the loop
1019 just load the low bytes.
1020 We must check that the machine has an instruction to do so.
1021 Also, if the value loaded into the register
1022 depends on the same register, this cannot be done. */
1023 else if (SET_SRC (set) == const0_rtx
1024 && GET_CODE (NEXT_INSN (p)) == INSN
1025 && (set1 = single_set (NEXT_INSN (p)))
1026 && GET_CODE (set1) == SET
1027 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
1028 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
1029 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
1031 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
1033 register int regno = REGNO (SET_DEST (set));
1034 if (VARRAY_INT (set_in_loop, regno) == 2)
1036 register struct movable *m;
1037 m = (struct movable *) alloca (sizeof (struct movable));
1040 m->set_dest = SET_DEST (set);
1041 m->dependencies = 0;
1047 m->move_insn_first = 0;
1049 /* If the insn may not be executed on some cycles,
1050 we can't clear the whole reg; clear just high part.
1051 Not even if the reg is used only within this loop.
1058 Clearing x before the inner loop could clobber a value
1059 being saved from the last time around the outer loop.
1060 However, if the reg is not used outside this loop
1061 and all uses of the register are in the same
1062 basic block as the store, there is no problem.
1064 If this insn was made by loop, we don't know its
1065 INSN_LUID and hence must make a conservative
1067 m->global = (INSN_UID (p) >= max_uid_for_loop
1068 || (uid_luid[REGNO_LAST_UID (regno)]
1070 || (uid_luid[REGNO_FIRST_UID (regno)]
1072 || (labels_in_range_p
1073 (p, uid_luid[REGNO_FIRST_UID (regno)])));
1074 if (maybe_never && m->global)
1075 m->savemode = GET_MODE (SET_SRC (set1));
1077 m->savemode = VOIDmode;
1081 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
1082 - uid_luid[REGNO_FIRST_UID (regno)]);
1084 VARRAY_INT (set_in_loop, regno) = -1;
1085 /* Add M to the end of the chain MOVABLES. */
1089 last_movable->next = m;
1094 /* Past a call insn, we get to insns which might not be executed
1095 because the call might exit. This matters for insns that trap.
1096 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1097 so they don't count. */
1098 else if (GET_CODE (p) == CALL_INSN && ! in_libcall)
1100 /* Past a label or a jump, we get to insns for which we
1101 can't count on whether or how many times they will be
1102 executed during each iteration. Therefore, we can
1103 only move out sets of trivial variables
1104 (those not used after the loop). */
1105 /* Similar code appears twice in strength_reduce. */
1106 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1107 /* If we enter the loop in the middle, and scan around to the
1108 beginning, don't set maybe_never for that. This must be an
1109 unconditional jump, otherwise the code at the top of the
1110 loop might never be executed. Unconditional jumps are
1111 followed a by barrier then loop end. */
1112 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop_top
1113 && NEXT_INSN (NEXT_INSN (p)) == end
1114 && simplejump_p (p)))
1116 else if (GET_CODE (p) == NOTE)
1118 /* At the virtual top of a converted loop, insns are again known to
1119 be executed: logically, the loop begins here even though the exit
1120 code has been duplicated. */
1121 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1122 maybe_never = call_passed = 0;
1123 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1125 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1130 /* If one movable subsumes another, ignore that other. */
1132 ignore_some_movables (movables);
1134 /* For each movable insn, see if the reg that it loads
1135 leads when it dies right into another conditionally movable insn.
1136 If so, record that the second insn "forces" the first one,
1137 since the second can be moved only if the first is. */
1139 force_movables (movables);
1141 /* See if there are multiple movable insns that load the same value.
1142 If there are, make all but the first point at the first one
1143 through the `match' field, and add the priorities of them
1144 all together as the priority of the first. */
1146 combine_movables (movables, nregs);
1148 /* Now consider each movable insn to decide whether it is worth moving.
1149 Store 0 in set_in_loop for each reg that is moved.
1151 Generally this increases code size, so do not move moveables when
1152 optimizing for code size. */
1154 if (! optimize_size)
1155 move_movables (movables, threshold,
1156 insn_count, loop_start, end, nregs);
1158 /* Now candidates that still are negative are those not moved.
1159 Change set_in_loop to indicate that those are not actually invariant. */
1160 for (i = 0; i < nregs; i++)
1161 if (VARRAY_INT (set_in_loop, i) < 0)
1162 VARRAY_INT (set_in_loop, i) = VARRAY_INT (n_times_set, i);
1164 /* Now that we've moved some things out of the loop, we might be able to
1165 hoist even more memory references. */
1166 load_mems_and_recount_loop_regs_set (scan_start, end, loop_top,
1167 loop_start, &insn_count);
1169 if (flag_strength_reduce)
1171 the_movables = movables;
1172 strength_reduce (scan_start, end, loop_top,
1173 insn_count, loop_start, end, loop_cont, unroll_p, bct_p);
1176 VARRAY_FREE (reg_single_usage);
1177 VARRAY_FREE (set_in_loop);
1178 VARRAY_FREE (n_times_set);
1179 VARRAY_FREE (may_not_optimize);
1182 /* Add elements to *OUTPUT to record all the pseudo-regs
1183 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1186 record_excess_regs (in_this, not_in_this, output)
1187 rtx in_this, not_in_this;
1194 code = GET_CODE (in_this);
1208 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1209 && ! reg_mentioned_p (in_this, not_in_this))
1210 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1217 fmt = GET_RTX_FORMAT (code);
1218 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1225 for (j = 0; j < XVECLEN (in_this, i); j++)
1226 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1230 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1236 /* Check what regs are referred to in the libcall block ending with INSN,
1237 aside from those mentioned in the equivalent value.
1238 If there are none, return 0.
1239 If there are one or more, return an EXPR_LIST containing all of them. */
1242 libcall_other_reg (insn, equiv)
1245 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1246 rtx p = XEXP (note, 0);
1249 /* First, find all the regs used in the libcall block
1250 that are not mentioned as inputs to the result. */
1254 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1255 || GET_CODE (p) == CALL_INSN)
1256 record_excess_regs (PATTERN (p), equiv, &output);
1263 /* Return 1 if all uses of REG
1264 are between INSN and the end of the basic block. */
1267 reg_in_basic_block_p (insn, reg)
1270 int regno = REGNO (reg);
1273 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1276 /* Search this basic block for the already recorded last use of the reg. */
1277 for (p = insn; p; p = NEXT_INSN (p))
1279 switch (GET_CODE (p))
1286 /* Ordinary insn: if this is the last use, we win. */
1287 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1292 /* Jump insn: if this is the last use, we win. */
1293 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1295 /* Otherwise, it's the end of the basic block, so we lose. */
1300 /* It's the end of the basic block, so we lose. */
1308 /* The "last use" doesn't follow the "first use"?? */
1312 /* Compute the benefit of eliminating the insns in the block whose
1313 last insn is LAST. This may be a group of insns used to compute a
1314 value directly or can contain a library call. */
1317 libcall_benefit (last)
1323 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1324 insn != last; insn = NEXT_INSN (insn))
1326 if (GET_CODE (insn) == CALL_INSN)
1327 benefit += 10; /* Assume at least this many insns in a library
1329 else if (GET_CODE (insn) == INSN
1330 && GET_CODE (PATTERN (insn)) != USE
1331 && GET_CODE (PATTERN (insn)) != CLOBBER)
1338 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1341 skip_consec_insns (insn, count)
1345 for (; count > 0; count--)
1349 /* If first insn of libcall sequence, skip to end. */
1350 /* Do this at start of loop, since INSN is guaranteed to
1352 if (GET_CODE (insn) != NOTE
1353 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1354 insn = XEXP (temp, 0);
1356 do insn = NEXT_INSN (insn);
1357 while (GET_CODE (insn) == NOTE);
1363 /* Ignore any movable whose insn falls within a libcall
1364 which is part of another movable.
1365 We make use of the fact that the movable for the libcall value
1366 was made later and so appears later on the chain. */
1369 ignore_some_movables (movables)
1370 struct movable *movables;
1372 register struct movable *m, *m1;
1374 for (m = movables; m; m = m->next)
1376 /* Is this a movable for the value of a libcall? */
1377 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1381 /* Check for earlier movables inside that range,
1382 and mark them invalid. We cannot use LUIDs here because
1383 insns created by loop.c for prior loops don't have LUIDs.
1384 Rather than reject all such insns from movables, we just
1385 explicitly check each insn in the libcall (since invariant
1386 libcalls aren't that common). */
1387 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1388 for (m1 = movables; m1 != m; m1 = m1->next)
1389 if (m1->insn == insn)
1395 /* For each movable insn, see if the reg that it loads
1396 leads when it dies right into another conditionally movable insn.
1397 If so, record that the second insn "forces" the first one,
1398 since the second can be moved only if the first is. */
1401 force_movables (movables)
1402 struct movable *movables;
1404 register struct movable *m, *m1;
1405 for (m1 = movables; m1; m1 = m1->next)
1406 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1407 if (!m1->partial && !m1->done)
1409 int regno = m1->regno;
1410 for (m = m1->next; m; m = m->next)
1411 /* ??? Could this be a bug? What if CSE caused the
1412 register of M1 to be used after this insn?
1413 Since CSE does not update regno_last_uid,
1414 this insn M->insn might not be where it dies.
1415 But very likely this doesn't matter; what matters is
1416 that M's reg is computed from M1's reg. */
1417 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1420 if (m != 0 && m->set_src == m1->set_dest
1421 /* If m->consec, m->set_src isn't valid. */
1425 /* Increase the priority of the moving the first insn
1426 since it permits the second to be moved as well. */
1430 m1->lifetime += m->lifetime;
1431 m1->savings += m->savings;
1436 /* Find invariant expressions that are equal and can be combined into
1440 combine_movables (movables, nregs)
1441 struct movable *movables;
1444 register struct movable *m;
1445 char *matched_regs = (char *) alloca (nregs);
1446 enum machine_mode mode;
1448 /* Regs that are set more than once are not allowed to match
1449 or be matched. I'm no longer sure why not. */
1450 /* Perhaps testing m->consec_sets would be more appropriate here? */
1452 for (m = movables; m; m = m->next)
1453 if (m->match == 0 && VARRAY_INT (n_times_set, m->regno) == 1 && !m->partial)
1455 register struct movable *m1;
1456 int regno = m->regno;
1458 bzero (matched_regs, nregs);
1459 matched_regs[regno] = 1;
1461 /* We want later insns to match the first one. Don't make the first
1462 one match any later ones. So start this loop at m->next. */
1463 for (m1 = m->next; m1; m1 = m1->next)
1464 if (m != m1 && m1->match == 0 && VARRAY_INT (n_times_set, m1->regno) == 1
1465 /* A reg used outside the loop mustn't be eliminated. */
1467 /* A reg used for zero-extending mustn't be eliminated. */
1469 && (matched_regs[m1->regno]
1472 /* Can combine regs with different modes loaded from the
1473 same constant only if the modes are the same or
1474 if both are integer modes with M wider or the same
1475 width as M1. The check for integer is redundant, but
1476 safe, since the only case of differing destination
1477 modes with equal sources is when both sources are
1478 VOIDmode, i.e., CONST_INT. */
1479 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1480 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1481 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1482 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1483 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1484 /* See if the source of M1 says it matches M. */
1485 && ((GET_CODE (m1->set_src) == REG
1486 && matched_regs[REGNO (m1->set_src)])
1487 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1489 && ((m->dependencies == m1->dependencies)
1490 || rtx_equal_p (m->dependencies, m1->dependencies)))
1492 m->lifetime += m1->lifetime;
1493 m->savings += m1->savings;
1496 matched_regs[m1->regno] = 1;
1500 /* Now combine the regs used for zero-extension.
1501 This can be done for those not marked `global'
1502 provided their lives don't overlap. */
1504 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1505 mode = GET_MODE_WIDER_MODE (mode))
1507 register struct movable *m0 = 0;
1509 /* Combine all the registers for extension from mode MODE.
1510 Don't combine any that are used outside this loop. */
1511 for (m = movables; m; m = m->next)
1512 if (m->partial && ! m->global
1513 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1515 register struct movable *m1;
1516 int first = uid_luid[REGNO_FIRST_UID (m->regno)];
1517 int last = uid_luid[REGNO_LAST_UID (m->regno)];
1521 /* First one: don't check for overlap, just record it. */
1526 /* Make sure they extend to the same mode.
1527 (Almost always true.) */
1528 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1531 /* We already have one: check for overlap with those
1532 already combined together. */
1533 for (m1 = movables; m1 != m; m1 = m1->next)
1534 if (m1 == m0 || (m1->partial && m1->match == m0))
1535 if (! (uid_luid[REGNO_FIRST_UID (m1->regno)] > last
1536 || uid_luid[REGNO_LAST_UID (m1->regno)] < first))
1539 /* No overlap: we can combine this with the others. */
1540 m0->lifetime += m->lifetime;
1541 m0->savings += m->savings;
1550 /* Return 1 if regs X and Y will become the same if moved. */
1553 regs_match_p (x, y, movables)
1555 struct movable *movables;
1559 struct movable *mx, *my;
1561 for (mx = movables; mx; mx = mx->next)
1562 if (mx->regno == xn)
1565 for (my = movables; my; my = my->next)
1566 if (my->regno == yn)
1570 && ((mx->match == my->match && mx->match != 0)
1572 || mx == my->match));
1575 /* Return 1 if X and Y are identical-looking rtx's.
1576 This is the Lisp function EQUAL for rtx arguments.
1578 If two registers are matching movables or a movable register and an
1579 equivalent constant, consider them equal. */
1582 rtx_equal_for_loop_p (x, y, movables)
1584 struct movable *movables;
1588 register struct movable *m;
1589 register enum rtx_code code;
1594 if (x == 0 || y == 0)
1597 code = GET_CODE (x);
1599 /* If we have a register and a constant, they may sometimes be
1601 if (GET_CODE (x) == REG && VARRAY_INT (set_in_loop, REGNO (x)) == -2
1604 for (m = movables; m; m = m->next)
1605 if (m->move_insn && m->regno == REGNO (x)
1606 && rtx_equal_p (m->set_src, y))
1609 else if (GET_CODE (y) == REG && VARRAY_INT (set_in_loop, REGNO (y)) == -2
1612 for (m = movables; m; m = m->next)
1613 if (m->move_insn && m->regno == REGNO (y)
1614 && rtx_equal_p (m->set_src, x))
1618 /* Otherwise, rtx's of different codes cannot be equal. */
1619 if (code != GET_CODE (y))
1622 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1623 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1625 if (GET_MODE (x) != GET_MODE (y))
1628 /* These three types of rtx's can be compared nonrecursively. */
1630 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1632 if (code == LABEL_REF)
1633 return XEXP (x, 0) == XEXP (y, 0);
1634 if (code == SYMBOL_REF)
1635 return XSTR (x, 0) == XSTR (y, 0);
1637 /* Compare the elements. If any pair of corresponding elements
1638 fail to match, return 0 for the whole things. */
1640 fmt = GET_RTX_FORMAT (code);
1641 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1646 if (XWINT (x, i) != XWINT (y, i))
1651 if (XINT (x, i) != XINT (y, i))
1656 /* Two vectors must have the same length. */
1657 if (XVECLEN (x, i) != XVECLEN (y, i))
1660 /* And the corresponding elements must match. */
1661 for (j = 0; j < XVECLEN (x, i); j++)
1662 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j), movables) == 0)
1667 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables) == 0)
1672 if (strcmp (XSTR (x, i), XSTR (y, i)))
1677 /* These are just backpointers, so they don't matter. */
1683 /* It is believed that rtx's at this level will never
1684 contain anything but integers and other rtx's,
1685 except for within LABEL_REFs and SYMBOL_REFs. */
1693 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1694 insns in INSNS which use thet reference. */
1697 add_label_notes (x, insns)
1701 enum rtx_code code = GET_CODE (x);
1706 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1708 /* This code used to ignore labels that referred to dispatch tables to
1709 avoid flow generating (slighly) worse code.
1711 We no longer ignore such label references (see LABEL_REF handling in
1712 mark_jump_label for additional information). */
1713 for (insn = insns; insn; insn = NEXT_INSN (insn))
1714 if (reg_mentioned_p (XEXP (x, 0), insn))
1715 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, XEXP (x, 0),
1719 fmt = GET_RTX_FORMAT (code);
1720 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1723 add_label_notes (XEXP (x, i), insns);
1724 else if (fmt[i] == 'E')
1725 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1726 add_label_notes (XVECEXP (x, i, j), insns);
1730 /* Scan MOVABLES, and move the insns that deserve to be moved.
1731 If two matching movables are combined, replace one reg with the
1732 other throughout. */
1735 move_movables (movables, threshold, insn_count, loop_start, end, nregs)
1736 struct movable *movables;
1744 register struct movable *m;
1746 /* Map of pseudo-register replacements to handle combining
1747 when we move several insns that load the same value
1748 into different pseudo-registers. */
1749 rtx *reg_map = (rtx *) alloca (nregs * sizeof (rtx));
1750 char *already_moved = (char *) alloca (nregs);
1752 bzero (already_moved, nregs);
1753 bzero ((char *) reg_map, nregs * sizeof (rtx));
1757 for (m = movables; m; m = m->next)
1759 /* Describe this movable insn. */
1761 if (loop_dump_stream)
1763 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1764 INSN_UID (m->insn), m->regno, m->lifetime);
1766 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1768 fprintf (loop_dump_stream, "cond ");
1770 fprintf (loop_dump_stream, "force ");
1772 fprintf (loop_dump_stream, "global ");
1774 fprintf (loop_dump_stream, "done ");
1776 fprintf (loop_dump_stream, "move-insn ");
1778 fprintf (loop_dump_stream, "matches %d ",
1779 INSN_UID (m->match->insn));
1781 fprintf (loop_dump_stream, "forces %d ",
1782 INSN_UID (m->forces->insn));
1785 /* Count movables. Value used in heuristics in strength_reduce. */
1788 /* Ignore the insn if it's already done (it matched something else).
1789 Otherwise, see if it is now safe to move. */
1793 || (1 == invariant_p (m->set_src)
1794 && (m->dependencies == 0
1795 || 1 == invariant_p (m->dependencies))
1797 || 1 == consec_sets_invariant_p (m->set_dest,
1800 && (! m->forces || m->forces->done))
1804 int savings = m->savings;
1806 /* We have an insn that is safe to move.
1807 Compute its desirability. */
1812 if (loop_dump_stream)
1813 fprintf (loop_dump_stream, "savings %d ", savings);
1815 if (moved_once[regno] && loop_dump_stream)
1816 fprintf (loop_dump_stream, "halved since already moved ");
1818 /* An insn MUST be moved if we already moved something else
1819 which is safe only if this one is moved too: that is,
1820 if already_moved[REGNO] is nonzero. */
1822 /* An insn is desirable to move if the new lifetime of the
1823 register is no more than THRESHOLD times the old lifetime.
1824 If it's not desirable, it means the loop is so big
1825 that moving won't speed things up much,
1826 and it is liable to make register usage worse. */
1828 /* It is also desirable to move if it can be moved at no
1829 extra cost because something else was already moved. */
1831 if (already_moved[regno]
1832 || flag_move_all_movables
1833 || (threshold * savings * m->lifetime) >=
1834 (moved_once[regno] ? insn_count * 2 : insn_count)
1835 || (m->forces && m->forces->done
1836 && VARRAY_INT (n_times_set, m->forces->regno) == 1))
1839 register struct movable *m1;
1842 /* Now move the insns that set the reg. */
1844 if (m->partial && m->match)
1848 /* Find the end of this chain of matching regs.
1849 Thus, we load each reg in the chain from that one reg.
1850 And that reg is loaded with 0 directly,
1851 since it has ->match == 0. */
1852 for (m1 = m; m1->match; m1 = m1->match);
1853 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1854 SET_DEST (PATTERN (m1->insn)));
1855 i1 = emit_insn_before (newpat, loop_start);
1857 /* Mark the moved, invariant reg as being allowed to
1858 share a hard reg with the other matching invariant. */
1859 REG_NOTES (i1) = REG_NOTES (m->insn);
1860 r1 = SET_DEST (PATTERN (m->insn));
1861 r2 = SET_DEST (PATTERN (m1->insn));
1863 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1864 gen_rtx_EXPR_LIST (VOIDmode, r2,
1866 delete_insn (m->insn);
1871 if (loop_dump_stream)
1872 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1874 /* If we are to re-generate the item being moved with a
1875 new move insn, first delete what we have and then emit
1876 the move insn before the loop. */
1877 else if (m->move_insn)
1881 for (count = m->consec; count >= 0; count--)
1883 /* If this is the first insn of a library call sequence,
1885 if (GET_CODE (p) != NOTE
1886 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1889 /* If this is the last insn of a libcall sequence, then
1890 delete every insn in the sequence except the last.
1891 The last insn is handled in the normal manner. */
1892 if (GET_CODE (p) != NOTE
1893 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1895 temp = XEXP (temp, 0);
1897 temp = delete_insn (temp);
1901 p = delete_insn (p);
1903 /* simplify_giv_expr expects that it can walk the insns
1904 at m->insn forwards and see this old sequence we are
1905 tossing here. delete_insn does preserve the next
1906 pointers, but when we skip over a NOTE we must fix
1907 it up. Otherwise that code walks into the non-deleted
1909 while (p && GET_CODE (p) == NOTE)
1910 p = NEXT_INSN (temp) = NEXT_INSN (p);
1914 emit_move_insn (m->set_dest, m->set_src);
1915 temp = get_insns ();
1918 add_label_notes (m->set_src, temp);
1920 i1 = emit_insns_before (temp, loop_start);
1921 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1923 = gen_rtx_EXPR_LIST (m->is_equiv ? REG_EQUIV : REG_EQUAL,
1924 m->set_src, REG_NOTES (i1));
1926 if (loop_dump_stream)
1927 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1929 /* The more regs we move, the less we like moving them. */
1934 for (count = m->consec; count >= 0; count--)
1938 /* If first insn of libcall sequence, skip to end. */
1939 /* Do this at start of loop, since p is guaranteed to
1941 if (GET_CODE (p) != NOTE
1942 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1945 /* If last insn of libcall sequence, move all
1946 insns except the last before the loop. The last
1947 insn is handled in the normal manner. */
1948 if (GET_CODE (p) != NOTE
1949 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1953 rtx fn_address_insn = 0;
1956 for (temp = XEXP (temp, 0); temp != p;
1957 temp = NEXT_INSN (temp))
1963 if (GET_CODE (temp) == NOTE)
1966 body = PATTERN (temp);
1968 /* Find the next insn after TEMP,
1969 not counting USE or NOTE insns. */
1970 for (next = NEXT_INSN (temp); next != p;
1971 next = NEXT_INSN (next))
1972 if (! (GET_CODE (next) == INSN
1973 && GET_CODE (PATTERN (next)) == USE)
1974 && GET_CODE (next) != NOTE)
1977 /* If that is the call, this may be the insn
1978 that loads the function address.
1980 Extract the function address from the insn
1981 that loads it into a register.
1982 If this insn was cse'd, we get incorrect code.
1984 So emit a new move insn that copies the
1985 function address into the register that the
1986 call insn will use. flow.c will delete any
1987 redundant stores that we have created. */
1988 if (GET_CODE (next) == CALL_INSN
1989 && GET_CODE (body) == SET
1990 && GET_CODE (SET_DEST (body)) == REG
1991 && (n = find_reg_note (temp, REG_EQUAL,
1994 fn_reg = SET_SRC (body);
1995 if (GET_CODE (fn_reg) != REG)
1996 fn_reg = SET_DEST (body);
1997 fn_address = XEXP (n, 0);
1998 fn_address_insn = temp;
2000 /* We have the call insn.
2001 If it uses the register we suspect it might,
2002 load it with the correct address directly. */
2003 if (GET_CODE (temp) == CALL_INSN
2005 && reg_referenced_p (fn_reg, body))
2006 emit_insn_after (gen_move_insn (fn_reg,
2010 if (GET_CODE (temp) == CALL_INSN)
2012 i1 = emit_call_insn_before (body, loop_start);
2013 /* Because the USAGE information potentially
2014 contains objects other than hard registers
2015 we need to copy it. */
2016 if (CALL_INSN_FUNCTION_USAGE (temp))
2017 CALL_INSN_FUNCTION_USAGE (i1)
2018 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
2021 i1 = emit_insn_before (body, loop_start);
2024 if (temp == fn_address_insn)
2025 fn_address_insn = i1;
2026 REG_NOTES (i1) = REG_NOTES (temp);
2032 if (m->savemode != VOIDmode)
2034 /* P sets REG to zero; but we should clear only
2035 the bits that are not covered by the mode
2037 rtx reg = m->set_dest;
2043 (GET_MODE (reg), and_optab, reg,
2044 GEN_INT ((((HOST_WIDE_INT) 1
2045 << GET_MODE_BITSIZE (m->savemode)))
2047 reg, 1, OPTAB_LIB_WIDEN);
2051 emit_move_insn (reg, tem);
2052 sequence = gen_sequence ();
2054 i1 = emit_insn_before (sequence, loop_start);
2056 else if (GET_CODE (p) == CALL_INSN)
2058 i1 = emit_call_insn_before (PATTERN (p), loop_start);
2059 /* Because the USAGE information potentially
2060 contains objects other than hard registers
2061 we need to copy it. */
2062 if (CALL_INSN_FUNCTION_USAGE (p))
2063 CALL_INSN_FUNCTION_USAGE (i1)
2064 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2066 else if (count == m->consec && m->move_insn_first)
2068 /* The SET_SRC might not be invariant, so we must
2069 use the REG_EQUAL note. */
2071 emit_move_insn (m->set_dest, m->set_src);
2072 temp = get_insns ();
2075 add_label_notes (m->set_src, temp);
2077 i1 = emit_insns_before (temp, loop_start);
2078 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2080 = gen_rtx_EXPR_LIST ((m->is_equiv ? REG_EQUIV
2082 m->set_src, REG_NOTES (i1));
2085 i1 = emit_insn_before (PATTERN (p), loop_start);
2087 if (REG_NOTES (i1) == 0)
2089 REG_NOTES (i1) = REG_NOTES (p);
2091 /* If there is a REG_EQUAL note present whose value
2092 is not loop invariant, then delete it, since it
2093 may cause problems with later optimization passes.
2094 It is possible for cse to create such notes
2095 like this as a result of record_jump_cond. */
2097 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2098 && ! invariant_p (XEXP (temp, 0)))
2099 remove_note (i1, temp);
2105 if (loop_dump_stream)
2106 fprintf (loop_dump_stream, " moved to %d",
2109 /* If library call, now fix the REG_NOTES that contain
2110 insn pointers, namely REG_LIBCALL on FIRST
2111 and REG_RETVAL on I1. */
2112 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2114 XEXP (temp, 0) = first;
2115 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2116 XEXP (temp, 0) = i1;
2123 /* simplify_giv_expr expects that it can walk the insns
2124 at m->insn forwards and see this old sequence we are
2125 tossing here. delete_insn does preserve the next
2126 pointers, but when we skip over a NOTE we must fix
2127 it up. Otherwise that code walks into the non-deleted
2129 while (p && GET_CODE (p) == NOTE)
2130 p = NEXT_INSN (temp) = NEXT_INSN (p);
2133 /* The more regs we move, the less we like moving them. */
2137 /* Any other movable that loads the same register
2139 already_moved[regno] = 1;
2141 /* This reg has been moved out of one loop. */
2142 moved_once[regno] = 1;
2144 /* The reg set here is now invariant. */
2146 VARRAY_INT (set_in_loop, regno) = 0;
2150 /* Change the length-of-life info for the register
2151 to say it lives at least the full length of this loop.
2152 This will help guide optimizations in outer loops. */
2154 if (uid_luid[REGNO_FIRST_UID (regno)] > INSN_LUID (loop_start))
2155 /* This is the old insn before all the moved insns.
2156 We can't use the moved insn because it is out of range
2157 in uid_luid. Only the old insns have luids. */
2158 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2159 if (uid_luid[REGNO_LAST_UID (regno)] < INSN_LUID (end))
2160 REGNO_LAST_UID (regno) = INSN_UID (end);
2162 /* Combine with this moved insn any other matching movables. */
2165 for (m1 = movables; m1; m1 = m1->next)
2170 /* Schedule the reg loaded by M1
2171 for replacement so that shares the reg of M.
2172 If the modes differ (only possible in restricted
2173 circumstances, make a SUBREG. */
2174 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2175 reg_map[m1->regno] = m->set_dest;
2178 = gen_lowpart_common (GET_MODE (m1->set_dest),
2181 /* Get rid of the matching insn
2182 and prevent further processing of it. */
2185 /* if library call, delete all insn except last, which
2187 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2190 for (temp = XEXP (temp, 0); temp != m1->insn;
2191 temp = NEXT_INSN (temp))
2194 delete_insn (m1->insn);
2196 /* Any other movable that loads the same register
2198 already_moved[m1->regno] = 1;
2200 /* The reg merged here is now invariant,
2201 if the reg it matches is invariant. */
2203 VARRAY_INT (set_in_loop, m1->regno) = 0;
2206 else if (loop_dump_stream)
2207 fprintf (loop_dump_stream, "not desirable");
2209 else if (loop_dump_stream && !m->match)
2210 fprintf (loop_dump_stream, "not safe");
2212 if (loop_dump_stream)
2213 fprintf (loop_dump_stream, "\n");
2217 new_start = loop_start;
2219 /* Go through all the instructions in the loop, making
2220 all the register substitutions scheduled in REG_MAP. */
2221 for (p = new_start; p != end; p = NEXT_INSN (p))
2222 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2223 || GET_CODE (p) == CALL_INSN)
2225 replace_regs (PATTERN (p), reg_map, nregs, 0);
2226 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2232 /* Scan X and replace the address of any MEM in it with ADDR.
2233 REG is the address that MEM should have before the replacement. */
2236 replace_call_address (x, reg, addr)
2239 register enum rtx_code code;
2245 code = GET_CODE (x);
2259 /* Short cut for very common case. */
2260 replace_call_address (XEXP (x, 1), reg, addr);
2264 /* Short cut for very common case. */
2265 replace_call_address (XEXP (x, 0), reg, addr);
2269 /* If this MEM uses a reg other than the one we expected,
2270 something is wrong. */
2271 if (XEXP (x, 0) != reg)
2280 fmt = GET_RTX_FORMAT (code);
2281 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2284 replace_call_address (XEXP (x, i), reg, addr);
2288 for (j = 0; j < XVECLEN (x, i); j++)
2289 replace_call_address (XVECEXP (x, i, j), reg, addr);
2295 /* Return the number of memory refs to addresses that vary
2299 count_nonfixed_reads (x)
2302 register enum rtx_code code;
2310 code = GET_CODE (x);
2324 return ((invariant_p (XEXP (x, 0)) != 1)
2325 + count_nonfixed_reads (XEXP (x, 0)));
2332 fmt = GET_RTX_FORMAT (code);
2333 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2336 value += count_nonfixed_reads (XEXP (x, i));
2340 for (j = 0; j < XVECLEN (x, i); j++)
2341 value += count_nonfixed_reads (XVECEXP (x, i, j));
2349 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2350 Replace it with an instruction to load just the low bytes
2351 if the machine supports such an instruction,
2352 and insert above LOOP_START an instruction to clear the register. */
2355 constant_high_bytes (p, loop_start)
2359 register int insn_code_number;
2361 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2362 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2364 new = gen_rtx_SET (VOIDmode,
2365 gen_rtx_STRICT_LOW_PART (VOIDmode,
2366 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p)), 0)),
2367 SET_DEST (PATTERN (p)),
2369 XEXP (SET_SRC (PATTERN (p)), 0));
2370 insn_code_number = recog (new, p);
2372 if (insn_code_number)
2376 /* Clear destination register before the loop. */
2377 emit_insn_before (gen_rtx_SET (VOIDmode, SET_DEST (PATTERN (p)),
2381 /* Inside the loop, just load the low part. */
2387 /* Scan a loop setting the variables `unknown_address_altered',
2388 `num_mem_sets', `loop_continue', `loops_enclosed', `loop_has_call',
2389 `loop_has_volatile', and `loop_has_tablejump'.
2390 Also, fill in the array `loop_mems' and the list `loop_store_mems'. */
2393 prescan_loop (start, end)
2396 register int level = 1;
2398 int loop_has_multiple_exit_targets = 0;
2399 /* The label after END. Jumping here is just like falling off the
2400 end of the loop. We use next_nonnote_insn instead of next_label
2401 as a hedge against the (pathological) case where some actual insn
2402 might end up between the two. */
2403 rtx exit_target = next_nonnote_insn (end);
2404 if (exit_target == NULL_RTX || GET_CODE (exit_target) != CODE_LABEL)
2405 loop_has_multiple_exit_targets = 1;
2407 unknown_address_altered = 0;
2409 loop_has_volatile = 0;
2410 loop_has_tablejump = 0;
2411 loop_store_mems = NULL_RTX;
2412 first_loop_store_insn = NULL_RTX;
2419 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2420 insn = NEXT_INSN (insn))
2422 if (GET_CODE (insn) == NOTE)
2424 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2427 /* Count number of loops contained in this one. */
2430 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2439 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2442 loop_continue = insn;
2445 else if (GET_CODE (insn) == CALL_INSN)
2447 if (! CONST_CALL_P (insn))
2448 unknown_address_altered = 1;
2451 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2453 rtx label1 = NULL_RTX;
2454 rtx label2 = NULL_RTX;
2456 if (volatile_refs_p (PATTERN (insn)))
2457 loop_has_volatile = 1;
2459 if (GET_CODE (insn) == JUMP_INSN
2460 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2461 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2462 loop_has_tablejump = 1;
2464 note_stores (PATTERN (insn), note_addr_stored);
2465 if (! first_loop_store_insn && loop_store_mems)
2466 first_loop_store_insn = insn;
2468 if (! loop_has_multiple_exit_targets
2469 && GET_CODE (insn) == JUMP_INSN
2470 && GET_CODE (PATTERN (insn)) == SET
2471 && SET_DEST (PATTERN (insn)) == pc_rtx)
2473 if (GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
2475 label1 = XEXP (SET_SRC (PATTERN (insn)), 1);
2476 label2 = XEXP (SET_SRC (PATTERN (insn)), 2);
2480 label1 = SET_SRC (PATTERN (insn));
2484 if (label1 && label1 != pc_rtx)
2486 if (GET_CODE (label1) != LABEL_REF)
2488 /* Something tricky. */
2489 loop_has_multiple_exit_targets = 1;
2492 else if (XEXP (label1, 0) != exit_target
2493 && LABEL_OUTSIDE_LOOP_P (label1))
2495 /* A jump outside the current loop. */
2496 loop_has_multiple_exit_targets = 1;
2506 else if (GET_CODE (insn) == RETURN)
2507 loop_has_multiple_exit_targets = 1;
2510 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2511 if (/* We can't tell what MEMs are aliased by what. */
2512 !unknown_address_altered
2513 /* An exception thrown by a called function might land us
2516 /* We don't want loads for MEMs moved to a location before the
2517 one at which their stack memory becomes allocated. (Note
2518 that this is not a problem for malloc, etc., since those
2519 require actual function calls. */
2520 && !current_function_calls_alloca
2521 /* There are ways to leave the loop other than falling off the
2523 && !loop_has_multiple_exit_targets)
2524 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2525 insn = NEXT_INSN (insn))
2526 for_each_rtx (&insn, insert_loop_mem, 0);
2529 /* LOOP_NUMBER_CONT_DOMINATOR is now the last label between the loop start
2530 and the continue note that is a the destination of a (cond)jump after
2531 the continue note. If there is any (cond)jump between the loop start
2532 and what we have so far as LOOP_NUMBER_CONT_DOMINATOR that has a
2533 target between LOOP_DOMINATOR and the continue note, move
2534 LOOP_NUMBER_CONT_DOMINATOR forward to that label; if a jump's
2535 destination cannot be determined, clear LOOP_NUMBER_CONT_DOMINATOR. */
2538 verify_dominator (loop_number)
2543 if (! loop_number_cont_dominator[loop_number])
2544 /* This can happen for an empty loop, e.g. in
2545 gcc.c-torture/compile/920410-2.c */
2547 if (loop_number_cont_dominator[loop_number] == const0_rtx)
2549 loop_number_cont_dominator[loop_number] = 0;
2552 for (insn = loop_number_loop_starts[loop_number];
2553 insn != loop_number_cont_dominator[loop_number];
2554 insn = NEXT_INSN (insn))
2556 if (GET_CODE (insn) == JUMP_INSN
2557 && GET_CODE (PATTERN (insn)) != RETURN)
2559 rtx label = JUMP_LABEL (insn);
2560 int label_luid = INSN_LUID (label);
2562 if (! condjump_p (insn)
2563 && ! condjump_in_parallel_p (insn))
2565 loop_number_cont_dominator[loop_number] = NULL_RTX;
2568 if (label_luid < INSN_LUID (loop_number_loop_cont[loop_number])
2570 > INSN_LUID (loop_number_cont_dominator[loop_number])))
2571 loop_number_cont_dominator[loop_number] = label;
2576 /* Scan the function looking for loops. Record the start and end of each loop.
2577 Also mark as invalid loops any loops that contain a setjmp or are branched
2578 to from outside the loop. */
2581 find_and_verify_loops (f)
2585 int current_loop = -1;
2589 compute_luids (f, NULL_RTX, 0);
2591 /* If there are jumps to undefined labels,
2592 treat them as jumps out of any/all loops.
2593 This also avoids writing past end of tables when there are no loops. */
2594 uid_loop_num[0] = -1;
2596 /* Find boundaries of loops, mark which loops are contained within
2597 loops, and invalidate loops that have setjmp. */
2599 for (insn = f; insn; insn = NEXT_INSN (insn))
2601 if (GET_CODE (insn) == NOTE)
2602 switch (NOTE_LINE_NUMBER (insn))
2604 case NOTE_INSN_LOOP_BEG:
2605 loop_number_loop_starts[++next_loop] = insn;
2606 loop_number_loop_ends[next_loop] = 0;
2607 loop_number_loop_cont[next_loop] = 0;
2608 loop_number_cont_dominator[next_loop] = 0;
2609 loop_outer_loop[next_loop] = current_loop;
2610 loop_invalid[next_loop] = 0;
2611 loop_number_exit_labels[next_loop] = 0;
2612 loop_number_exit_count[next_loop] = 0;
2613 current_loop = next_loop;
2616 case NOTE_INSN_SETJMP:
2617 /* In this case, we must invalidate our current loop and any
2619 for (loop = current_loop; loop != -1; loop = loop_outer_loop[loop])
2621 loop_invalid[loop] = 1;
2622 if (loop_dump_stream)
2623 fprintf (loop_dump_stream,
2624 "\nLoop at %d ignored due to setjmp.\n",
2625 INSN_UID (loop_number_loop_starts[loop]));
2629 case NOTE_INSN_LOOP_CONT:
2630 loop_number_loop_cont[current_loop] = insn;
2632 case NOTE_INSN_LOOP_END:
2633 if (current_loop == -1)
2636 loop_number_loop_ends[current_loop] = insn;
2637 verify_dominator (current_loop);
2638 current_loop = loop_outer_loop[current_loop];
2644 /* If for any loop, this is a jump insn between the NOTE_INSN_LOOP_CONT
2645 and NOTE_INSN_LOOP_END notes, update loop_number_loop_dominator. */
2646 else if (GET_CODE (insn) == JUMP_INSN
2647 && GET_CODE (PATTERN (insn)) != RETURN
2648 && current_loop >= 0)
2651 rtx label = JUMP_LABEL (insn);
2653 if (! condjump_p (insn) && ! condjump_in_parallel_p (insn))
2656 this_loop = current_loop;
2659 /* First see if we care about this loop. */
2660 if (loop_number_loop_cont[this_loop]
2661 && loop_number_cont_dominator[this_loop] != const0_rtx)
2663 /* If the jump destination is not known, invalidate
2664 loop_number_const_dominator. */
2666 loop_number_cont_dominator[this_loop] = const0_rtx;
2668 /* Check if the destination is between loop start and
2670 if ((INSN_LUID (label)
2671 < INSN_LUID (loop_number_loop_cont[this_loop]))
2672 && (INSN_LUID (label)
2673 > INSN_LUID (loop_number_loop_starts[this_loop]))
2674 /* And if there is no later destination already
2676 && (! loop_number_cont_dominator[this_loop]
2677 || (INSN_LUID (label)
2678 > INSN_LUID (loop_number_cont_dominator
2680 loop_number_cont_dominator[this_loop] = label;
2682 this_loop = loop_outer_loop[this_loop];
2684 while (this_loop >= 0);
2687 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2688 enclosing loop, but this doesn't matter. */
2689 uid_loop_num[INSN_UID (insn)] = current_loop;
2692 /* Any loop containing a label used in an initializer must be invalidated,
2693 because it can be jumped into from anywhere. */
2695 for (label = forced_labels; label; label = XEXP (label, 1))
2699 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2701 loop_num = loop_outer_loop[loop_num])
2702 loop_invalid[loop_num] = 1;
2705 /* Any loop containing a label used for an exception handler must be
2706 invalidated, because it can be jumped into from anywhere. */
2708 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2712 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2714 loop_num = loop_outer_loop[loop_num])
2715 loop_invalid[loop_num] = 1;
2718 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2719 loop that it is not contained within, that loop is marked invalid.
2720 If any INSN or CALL_INSN uses a label's address, then the loop containing
2721 that label is marked invalid, because it could be jumped into from
2724 Also look for blocks of code ending in an unconditional branch that
2725 exits the loop. If such a block is surrounded by a conditional
2726 branch around the block, move the block elsewhere (see below) and
2727 invert the jump to point to the code block. This may eliminate a
2728 label in our loop and will simplify processing by both us and a
2729 possible second cse pass. */
2731 for (insn = f; insn; insn = NEXT_INSN (insn))
2732 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2734 int this_loop_num = uid_loop_num[INSN_UID (insn)];
2736 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2738 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2743 for (loop_num = uid_loop_num[INSN_UID (XEXP (note, 0))];
2745 loop_num = loop_outer_loop[loop_num])
2746 loop_invalid[loop_num] = 1;
2750 if (GET_CODE (insn) != JUMP_INSN)
2753 mark_loop_jump (PATTERN (insn), this_loop_num);
2755 /* See if this is an unconditional branch outside the loop. */
2756 if (this_loop_num != -1
2757 && (GET_CODE (PATTERN (insn)) == RETURN
2758 || (simplejump_p (insn)
2759 && (uid_loop_num[INSN_UID (JUMP_LABEL (insn))]
2761 && get_max_uid () < max_uid_for_loop)
2764 rtx our_next = next_real_insn (insn);
2766 int outer_loop = -1;
2768 /* Go backwards until we reach the start of the loop, a label,
2770 for (p = PREV_INSN (insn);
2771 GET_CODE (p) != CODE_LABEL
2772 && ! (GET_CODE (p) == NOTE
2773 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2774 && GET_CODE (p) != JUMP_INSN;
2778 /* Check for the case where we have a jump to an inner nested
2779 loop, and do not perform the optimization in that case. */
2781 if (JUMP_LABEL (insn))
2783 dest_loop = uid_loop_num[INSN_UID (JUMP_LABEL (insn))];
2784 if (dest_loop != -1)
2786 for (outer_loop = dest_loop; outer_loop != -1;
2787 outer_loop = loop_outer_loop[outer_loop])
2788 if (outer_loop == this_loop_num)
2793 /* Make sure that the target of P is within the current loop. */
2795 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2796 && uid_loop_num[INSN_UID (JUMP_LABEL (p))] != this_loop_num)
2797 outer_loop = this_loop_num;
2799 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2800 we have a block of code to try to move.
2802 We look backward and then forward from the target of INSN
2803 to find a BARRIER at the same loop depth as the target.
2804 If we find such a BARRIER, we make a new label for the start
2805 of the block, invert the jump in P and point it to that label,
2806 and move the block of code to the spot we found. */
2808 if (outer_loop == -1
2809 && GET_CODE (p) == JUMP_INSN
2810 && JUMP_LABEL (p) != 0
2811 /* Just ignore jumps to labels that were never emitted.
2812 These always indicate compilation errors. */
2813 && INSN_UID (JUMP_LABEL (p)) != 0
2815 && ! simplejump_p (p)
2816 && next_real_insn (JUMP_LABEL (p)) == our_next)
2819 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2820 int target_loop_num = uid_loop_num[INSN_UID (target)];
2823 for (loc = target; loc; loc = PREV_INSN (loc))
2824 if (GET_CODE (loc) == BARRIER
2825 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2829 for (loc = target; loc; loc = NEXT_INSN (loc))
2830 if (GET_CODE (loc) == BARRIER
2831 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2836 rtx cond_label = JUMP_LABEL (p);
2837 rtx new_label = get_label_after (p);
2839 /* Ensure our label doesn't go away. */
2840 LABEL_NUSES (cond_label)++;
2842 /* Verify that uid_loop_num is large enough and that
2844 if (invert_jump (p, new_label))
2848 /* If no suitable BARRIER was found, create a suitable
2849 one before TARGET. Since TARGET is a fall through
2850 path, we'll need to insert an jump around our block
2851 and a add a BARRIER before TARGET.
2853 This creates an extra unconditional jump outside
2854 the loop. However, the benefits of removing rarely
2855 executed instructions from inside the loop usually
2856 outweighs the cost of the extra unconditional jump
2857 outside the loop. */
2862 temp = gen_jump (JUMP_LABEL (insn));
2863 temp = emit_jump_insn_before (temp, target);
2864 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2865 LABEL_NUSES (JUMP_LABEL (insn))++;
2866 loc = emit_barrier_before (target);
2869 /* Include the BARRIER after INSN and copy the
2871 new_label = squeeze_notes (new_label, NEXT_INSN (insn));
2872 reorder_insns (new_label, NEXT_INSN (insn), loc);
2874 /* All those insns are now in TARGET_LOOP_NUM. */
2875 for (q = new_label; q != NEXT_INSN (NEXT_INSN (insn));
2877 uid_loop_num[INSN_UID (q)] = target_loop_num;
2879 /* The label jumped to by INSN is no longer a loop exit.
2880 Unless INSN does not have a label (e.g., it is a
2881 RETURN insn), search loop_number_exit_labels to find
2882 its label_ref, and remove it. Also turn off
2883 LABEL_OUTSIDE_LOOP_P bit. */
2884 if (JUMP_LABEL (insn))
2889 r = loop_number_exit_labels[this_loop_num];
2890 r; q = r, r = LABEL_NEXTREF (r))
2891 if (XEXP (r, 0) == JUMP_LABEL (insn))
2893 LABEL_OUTSIDE_LOOP_P (r) = 0;
2895 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2897 loop_number_exit_labels[this_loop_num]
2898 = LABEL_NEXTREF (r);
2902 for (loop_num = this_loop_num;
2903 loop_num != -1 && loop_num != target_loop_num;
2904 loop_num = loop_outer_loop[loop_num])
2905 loop_number_exit_count[loop_num]--;
2907 /* If we didn't find it, then something is wrong. */
2912 /* P is now a jump outside the loop, so it must be put
2913 in loop_number_exit_labels, and marked as such.
2914 The easiest way to do this is to just call
2915 mark_loop_jump again for P. */
2916 mark_loop_jump (PATTERN (p), this_loop_num);
2918 /* If INSN now jumps to the insn after it,
2920 if (JUMP_LABEL (insn) != 0
2921 && (next_real_insn (JUMP_LABEL (insn))
2922 == next_real_insn (insn)))
2926 /* Continue the loop after where the conditional
2927 branch used to jump, since the only branch insn
2928 in the block (if it still remains) is an inter-loop
2929 branch and hence needs no processing. */
2930 insn = NEXT_INSN (cond_label);
2932 if (--LABEL_NUSES (cond_label) == 0)
2933 delete_insn (cond_label);
2935 /* This loop will be continued with NEXT_INSN (insn). */
2936 insn = PREV_INSN (insn);
2943 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2944 loops it is contained in, mark the target loop invalid.
2946 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2949 mark_loop_jump (x, loop_num)
2957 switch (GET_CODE (x))
2970 /* There could be a label reference in here. */
2971 mark_loop_jump (XEXP (x, 0), loop_num);
2977 mark_loop_jump (XEXP (x, 0), loop_num);
2978 mark_loop_jump (XEXP (x, 1), loop_num);
2982 /* This may refer to a LABEL_REF or SYMBOL_REF. */
2983 mark_loop_jump (XEXP (x, 1), loop_num);
2988 mark_loop_jump (XEXP (x, 0), loop_num);
2992 dest_loop = uid_loop_num[INSN_UID (XEXP (x, 0))];
2994 /* Link together all labels that branch outside the loop. This
2995 is used by final_[bg]iv_value and the loop unrolling code. Also
2996 mark this LABEL_REF so we know that this branch should predict
2999 /* A check to make sure the label is not in an inner nested loop,
3000 since this does not count as a loop exit. */
3001 if (dest_loop != -1)
3003 for (outer_loop = dest_loop; outer_loop != -1;
3004 outer_loop = loop_outer_loop[outer_loop])
3005 if (outer_loop == loop_num)
3011 if (loop_num != -1 && outer_loop == -1)
3013 LABEL_OUTSIDE_LOOP_P (x) = 1;
3014 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
3015 loop_number_exit_labels[loop_num] = x;
3017 for (outer_loop = loop_num;
3018 outer_loop != -1 && outer_loop != dest_loop;
3019 outer_loop = loop_outer_loop[outer_loop])
3020 loop_number_exit_count[outer_loop]++;
3023 /* If this is inside a loop, but not in the current loop or one enclosed
3024 by it, it invalidates at least one loop. */
3026 if (dest_loop == -1)
3029 /* We must invalidate every nested loop containing the target of this
3030 label, except those that also contain the jump insn. */
3032 for (; dest_loop != -1; dest_loop = loop_outer_loop[dest_loop])
3034 /* Stop when we reach a loop that also contains the jump insn. */
3035 for (outer_loop = loop_num; outer_loop != -1;
3036 outer_loop = loop_outer_loop[outer_loop])
3037 if (dest_loop == outer_loop)
3040 /* If we get here, we know we need to invalidate a loop. */
3041 if (loop_dump_stream && ! loop_invalid[dest_loop])
3042 fprintf (loop_dump_stream,
3043 "\nLoop at %d ignored due to multiple entry points.\n",
3044 INSN_UID (loop_number_loop_starts[dest_loop]));
3046 loop_invalid[dest_loop] = 1;
3051 /* If this is not setting pc, ignore. */
3052 if (SET_DEST (x) == pc_rtx)
3053 mark_loop_jump (SET_SRC (x), loop_num);
3057 mark_loop_jump (XEXP (x, 1), loop_num);
3058 mark_loop_jump (XEXP (x, 2), loop_num);
3063 for (i = 0; i < XVECLEN (x, 0); i++)
3064 mark_loop_jump (XVECEXP (x, 0, i), loop_num);
3068 for (i = 0; i < XVECLEN (x, 1); i++)
3069 mark_loop_jump (XVECEXP (x, 1, i), loop_num);
3073 /* Strictly speaking this is not a jump into the loop, only a possible
3074 jump out of the loop. However, we have no way to link the destination
3075 of this jump onto the list of exit labels. To be safe we mark this
3076 loop and any containing loops as invalid. */
3079 for (outer_loop = loop_num; outer_loop != -1;
3080 outer_loop = loop_outer_loop[outer_loop])
3082 if (loop_dump_stream && ! loop_invalid[outer_loop])
3083 fprintf (loop_dump_stream,
3084 "\nLoop at %d ignored due to unknown exit jump.\n",
3085 INSN_UID (loop_number_loop_starts[outer_loop]));
3086 loop_invalid[outer_loop] = 1;
3093 /* Return nonzero if there is a label in the range from
3094 insn INSN to and including the insn whose luid is END
3095 INSN must have an assigned luid (i.e., it must not have
3096 been previously created by loop.c). */
3099 labels_in_range_p (insn, end)
3103 while (insn && INSN_LUID (insn) <= end)
3105 if (GET_CODE (insn) == CODE_LABEL)
3107 insn = NEXT_INSN (insn);
3113 /* Record that a memory reference X is being set. */
3116 note_addr_stored (x, y)
3118 rtx y ATTRIBUTE_UNUSED;
3120 if (x == 0 || GET_CODE (x) != MEM)
3123 /* Count number of memory writes.
3124 This affects heuristics in strength_reduce. */
3127 /* BLKmode MEM means all memory is clobbered. */
3128 if (GET_MODE (x) == BLKmode)
3129 unknown_address_altered = 1;
3131 if (unknown_address_altered)
3134 loop_store_mems = gen_rtx_EXPR_LIST (VOIDmode, x, loop_store_mems);
3137 /* Return nonzero if the rtx X is invariant over the current loop.
3139 The value is 2 if we refer to something only conditionally invariant.
3141 If `unknown_address_altered' is nonzero, no memory ref is invariant.
3142 Otherwise, a memory ref is invariant if it does not conflict with
3143 anything stored in `loop_store_mems'. */
3150 register enum rtx_code code;
3152 int conditional = 0;
3157 code = GET_CODE (x);
3167 /* A LABEL_REF is normally invariant, however, if we are unrolling
3168 loops, and this label is inside the loop, then it isn't invariant.
3169 This is because each unrolled copy of the loop body will have
3170 a copy of this label. If this was invariant, then an insn loading
3171 the address of this label into a register might get moved outside
3172 the loop, and then each loop body would end up using the same label.
3174 We don't know the loop bounds here though, so just fail for all
3176 if (flag_unroll_loops)
3183 case UNSPEC_VOLATILE:
3187 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3188 since the reg might be set by initialization within the loop. */
3190 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3191 || x == arg_pointer_rtx)
3192 && ! current_function_has_nonlocal_goto)
3196 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3199 if (VARRAY_INT (set_in_loop, REGNO (x)) < 0)
3202 return VARRAY_INT (set_in_loop, REGNO (x)) == 0;
3205 /* Volatile memory references must be rejected. Do this before
3206 checking for read-only items, so that volatile read-only items
3207 will be rejected also. */
3208 if (MEM_VOLATILE_P (x))
3211 /* Read-only items (such as constants in a constant pool) are
3212 invariant if their address is. */
3213 if (RTX_UNCHANGING_P (x))
3216 /* If we had a subroutine call, any location in memory could have been
3218 if (unknown_address_altered)
3221 /* See if there is any dependence between a store and this load. */
3222 mem_list_entry = loop_store_mems;
3223 while (mem_list_entry)
3225 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3228 mem_list_entry = XEXP (mem_list_entry, 1);
3231 /* It's not invalidated by a store in memory
3232 but we must still verify the address is invariant. */
3236 /* Don't mess with insns declared volatile. */
3237 if (MEM_VOLATILE_P (x))
3245 fmt = GET_RTX_FORMAT (code);
3246 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3250 int tem = invariant_p (XEXP (x, i));
3256 else if (fmt[i] == 'E')
3259 for (j = 0; j < XVECLEN (x, i); j++)
3261 int tem = invariant_p (XVECEXP (x, i, j));
3271 return 1 + conditional;
3275 /* Return nonzero if all the insns in the loop that set REG
3276 are INSN and the immediately following insns,
3277 and if each of those insns sets REG in an invariant way
3278 (not counting uses of REG in them).
3280 The value is 2 if some of these insns are only conditionally invariant.
3282 We assume that INSN itself is the first set of REG
3283 and that its source is invariant. */
3286 consec_sets_invariant_p (reg, n_sets, insn)
3290 register rtx p = insn;
3291 register int regno = REGNO (reg);
3293 /* Number of sets we have to insist on finding after INSN. */
3294 int count = n_sets - 1;
3295 int old = VARRAY_INT (set_in_loop, regno);
3299 /* If N_SETS hit the limit, we can't rely on its value. */
3303 VARRAY_INT (set_in_loop, regno) = 0;
3307 register enum rtx_code code;
3311 code = GET_CODE (p);
3313 /* If library call, skip to end of it. */
3314 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3319 && (set = single_set (p))
3320 && GET_CODE (SET_DEST (set)) == REG
3321 && REGNO (SET_DEST (set)) == regno)
3323 this = invariant_p (SET_SRC (set));
3326 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3328 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3329 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3331 this = (CONSTANT_P (XEXP (temp, 0))
3332 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3333 && invariant_p (XEXP (temp, 0))));
3340 else if (code != NOTE)
3342 VARRAY_INT (set_in_loop, regno) = old;
3347 VARRAY_INT (set_in_loop, regno) = old;
3348 /* If invariant_p ever returned 2, we return 2. */
3349 return 1 + (value & 2);
3353 /* I don't think this condition is sufficient to allow INSN
3354 to be moved, so we no longer test it. */
3356 /* Return 1 if all insns in the basic block of INSN and following INSN
3357 that set REG are invariant according to TABLE. */
3360 all_sets_invariant_p (reg, insn, table)
3364 register rtx p = insn;
3365 register int regno = REGNO (reg);
3369 register enum rtx_code code;
3371 code = GET_CODE (p);
3372 if (code == CODE_LABEL || code == JUMP_INSN)
3374 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3375 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3376 && REGNO (SET_DEST (PATTERN (p))) == regno)
3378 if (!invariant_p (SET_SRC (PATTERN (p)), table))
3385 /* Look at all uses (not sets) of registers in X. For each, if it is
3386 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3387 a different insn, set USAGE[REGNO] to const0_rtx. */
3390 find_single_use_in_loop (insn, x, usage)
3395 enum rtx_code code = GET_CODE (x);
3396 char *fmt = GET_RTX_FORMAT (code);
3400 VARRAY_RTX (usage, REGNO (x))
3401 = (VARRAY_RTX (usage, REGNO (x)) != 0
3402 && VARRAY_RTX (usage, REGNO (x)) != insn)
3403 ? const0_rtx : insn;
3405 else if (code == SET)
3407 /* Don't count SET_DEST if it is a REG; otherwise count things
3408 in SET_DEST because if a register is partially modified, it won't
3409 show up as a potential movable so we don't care how USAGE is set
3411 if (GET_CODE (SET_DEST (x)) != REG)
3412 find_single_use_in_loop (insn, SET_DEST (x), usage);
3413 find_single_use_in_loop (insn, SET_SRC (x), usage);
3416 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3418 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3419 find_single_use_in_loop (insn, XEXP (x, i), usage);
3420 else if (fmt[i] == 'E')
3421 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3422 find_single_use_in_loop (insn, XVECEXP (x, i, j), usage);
3426 /* Count and record any set in X which is contained in INSN. Update
3427 MAY_NOT_MOVE and LAST_SET for any register set in X. */
3430 count_one_set (insn, x, may_not_move, last_set)
3432 varray_type may_not_move;
3435 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3436 /* Don't move a reg that has an explicit clobber.
3437 It's not worth the pain to try to do it correctly. */
3438 VARRAY_CHAR (may_not_move, REGNO (XEXP (x, 0))) = 1;
3440 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3442 rtx dest = SET_DEST (x);
3443 while (GET_CODE (dest) == SUBREG
3444 || GET_CODE (dest) == ZERO_EXTRACT
3445 || GET_CODE (dest) == SIGN_EXTRACT
3446 || GET_CODE (dest) == STRICT_LOW_PART)
3447 dest = XEXP (dest, 0);
3448 if (GET_CODE (dest) == REG)
3450 register int regno = REGNO (dest);
3451 /* If this is the first setting of this reg
3452 in current basic block, and it was set before,
3453 it must be set in two basic blocks, so it cannot
3454 be moved out of the loop. */
3455 if (VARRAY_INT (set_in_loop, regno) > 0
3456 && last_set[regno] == 0)
3457 VARRAY_CHAR (may_not_move, regno) = 1;
3458 /* If this is not first setting in current basic block,
3459 see if reg was used in between previous one and this.
3460 If so, neither one can be moved. */
3461 if (last_set[regno] != 0
3462 && reg_used_between_p (dest, last_set[regno], insn))
3463 VARRAY_CHAR (may_not_move, regno) = 1;
3464 if (VARRAY_INT (set_in_loop, regno) < 127)
3465 ++VARRAY_INT (set_in_loop, regno);
3466 last_set[regno] = insn;
3471 /* Increment SET_IN_LOOP at the index of each register
3472 that is modified by an insn between FROM and TO.
3473 If the value of an element of SET_IN_LOOP becomes 127 or more,
3474 stop incrementing it, to avoid overflow.
3476 Store in SINGLE_USAGE[I] the single insn in which register I is
3477 used, if it is only used once. Otherwise, it is set to 0 (for no
3478 uses) or const0_rtx for more than one use. This parameter may be zero,
3479 in which case this processing is not done.
3481 Store in *COUNT_PTR the number of actual instruction
3482 in the loop. We use this to decide what is worth moving out. */
3484 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3485 In that case, it is the insn that last set reg n. */
3488 count_loop_regs_set (from, to, may_not_move, single_usage, count_ptr, nregs)
3489 register rtx from, to;
3490 varray_type may_not_move;
3491 varray_type single_usage;
3495 register rtx *last_set = (rtx *) alloca (nregs * sizeof (rtx));
3497 register int count = 0;
3499 bzero ((char *) last_set, nregs * sizeof (rtx));
3500 for (insn = from; insn != to; insn = NEXT_INSN (insn))
3502 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
3506 /* Record registers that have exactly one use. */
3507 find_single_use_in_loop (insn, PATTERN (insn), single_usage);
3509 /* Include uses in REG_EQUAL notes. */
3510 if (REG_NOTES (insn))
3511 find_single_use_in_loop (insn, REG_NOTES (insn), single_usage);
3513 if (GET_CODE (PATTERN (insn)) == SET
3514 || GET_CODE (PATTERN (insn)) == CLOBBER)
3515 count_one_set (insn, PATTERN (insn), may_not_move, last_set);
3516 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3519 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
3520 count_one_set (insn, XVECEXP (PATTERN (insn), 0, i),
3521 may_not_move, last_set);
3525 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3526 bzero ((char *) last_set, nregs * sizeof (rtx));
3531 /* Given a loop that is bounded by LOOP_START and LOOP_END
3532 and that is entered at SCAN_START,
3533 return 1 if the register set in SET contained in insn INSN is used by
3534 any insn that precedes INSN in cyclic order starting
3535 from the loop entry point.
3537 We don't want to use INSN_LUID here because if we restrict INSN to those
3538 that have a valid INSN_LUID, it means we cannot move an invariant out
3539 from an inner loop past two loops. */
3542 loop_reg_used_before_p (set, insn, loop_start, scan_start, loop_end)
3543 rtx set, insn, loop_start, scan_start, loop_end;
3545 rtx reg = SET_DEST (set);
3548 /* Scan forward checking for register usage. If we hit INSN, we
3549 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3550 for (p = scan_start; p != insn; p = NEXT_INSN (p))
3552 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
3553 && reg_overlap_mentioned_p (reg, PATTERN (p)))
3563 /* A "basic induction variable" or biv is a pseudo reg that is set
3564 (within this loop) only by incrementing or decrementing it. */
3565 /* A "general induction variable" or giv is a pseudo reg whose
3566 value is a linear function of a biv. */
3568 /* Bivs are recognized by `basic_induction_var';
3569 Givs by `general_induction_var'. */
3571 /* Indexed by register number, indicates whether or not register is an
3572 induction variable, and if so what type. */
3574 varray_type reg_iv_type;
3576 /* Indexed by register number, contains pointer to `struct induction'
3577 if register is an induction variable. This holds general info for
3578 all induction variables. */
3580 varray_type reg_iv_info;
3582 /* Indexed by register number, contains pointer to `struct iv_class'
3583 if register is a basic induction variable. This holds info describing
3584 the class (a related group) of induction variables that the biv belongs
3587 struct iv_class **reg_biv_class;
3589 /* The head of a list which links together (via the next field)
3590 every iv class for the current loop. */
3592 struct iv_class *loop_iv_list;
3594 /* Givs made from biv increments are always splittable for loop unrolling.
3595 Since there is no regscan info for them, we have to keep track of them
3597 int first_increment_giv, last_increment_giv;
3599 /* Communication with routines called via `note_stores'. */
3601 static rtx note_insn;
3603 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3605 static rtx addr_placeholder;
3607 /* ??? Unfinished optimizations, and possible future optimizations,
3608 for the strength reduction code. */
3610 /* ??? The interaction of biv elimination, and recognition of 'constant'
3611 bivs, may cause problems. */
3613 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3614 performance problems.
3616 Perhaps don't eliminate things that can be combined with an addressing
3617 mode. Find all givs that have the same biv, mult_val, and add_val;
3618 then for each giv, check to see if its only use dies in a following
3619 memory address. If so, generate a new memory address and check to see
3620 if it is valid. If it is valid, then store the modified memory address,
3621 otherwise, mark the giv as not done so that it will get its own iv. */
3623 /* ??? Could try to optimize branches when it is known that a biv is always
3626 /* ??? When replace a biv in a compare insn, we should replace with closest
3627 giv so that an optimized branch can still be recognized by the combiner,
3628 e.g. the VAX acb insn. */
3630 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3631 was rerun in loop_optimize whenever a register was added or moved.
3632 Also, some of the optimizations could be a little less conservative. */
3634 /* Perform strength reduction and induction variable elimination.
3636 Pseudo registers created during this function will be beyond the last
3637 valid index in several tables including n_times_set and regno_last_uid.
3638 This does not cause a problem here, because the added registers cannot be
3639 givs outside of their loop, and hence will never be reconsidered.
3640 But scan_loop must check regnos to make sure they are in bounds.
3642 SCAN_START is the first instruction in the loop, as the loop would
3643 actually be executed. END is the NOTE_INSN_LOOP_END. LOOP_TOP is
3644 the first instruction in the loop, as it is layed out in the
3645 instruction stream. LOOP_START is the NOTE_INSN_LOOP_BEG.
3646 LOOP_CONT is the NOTE_INSN_LOOP_CONT. */
3649 strength_reduce (scan_start, end, loop_top, insn_count,
3650 loop_start, loop_end, loop_cont, unroll_p, bct_p)
3658 int unroll_p, bct_p ATTRIBUTE_UNUSED;
3666 /* This is 1 if current insn is not executed at least once for every loop
3668 int not_every_iteration = 0;
3669 /* This is 1 if current insn may be executed more than once for every
3671 int maybe_multiple = 0;
3672 /* Temporary list pointers for traversing loop_iv_list. */
3673 struct iv_class *bl, **backbl;
3674 /* Ratio of extra register life span we can justify
3675 for saving an instruction. More if loop doesn't call subroutines
3676 since in that case saving an insn makes more difference
3677 and more registers are available. */
3678 /* ??? could set this to last value of threshold in move_movables */
3679 int threshold = (loop_has_call ? 1 : 2) * (3 + n_non_fixed_regs);
3680 /* Map of pseudo-register replacements. */
3685 rtx end_insert_before;
3687 int n_extra_increment;
3688 struct loop_info loop_iteration_info;
3689 struct loop_info *loop_info = &loop_iteration_info;
3691 /* If scan_start points to the loop exit test, we have to be wary of
3692 subversive use of gotos inside expression statements. */
3693 if (prev_nonnote_insn (scan_start) != prev_nonnote_insn (loop_start))
3694 maybe_multiple = back_branch_in_range_p (scan_start, loop_start, loop_end);
3696 VARRAY_INT_INIT (reg_iv_type, max_reg_before_loop, "reg_iv_type");
3697 VARRAY_GENERIC_PTR_INIT (reg_iv_info, max_reg_before_loop, "reg_iv_info");
3698 reg_biv_class = (struct iv_class **)
3699 alloca (max_reg_before_loop * sizeof (struct iv_class *));
3700 bzero ((char *) reg_biv_class, (max_reg_before_loop
3701 * sizeof (struct iv_class *)));
3704 addr_placeholder = gen_reg_rtx (Pmode);
3706 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3707 must be put before this insn, so that they will appear in the right
3708 order (i.e. loop order).
3710 If loop_end is the end of the current function, then emit a
3711 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3713 if (NEXT_INSN (loop_end) != 0)
3714 end_insert_before = NEXT_INSN (loop_end);
3716 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop_end);
3718 /* Scan through loop to find all possible bivs. */
3720 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
3722 p = next_insn_in_loop (p, scan_start, end, loop_top))
3724 if (GET_CODE (p) == INSN
3725 && (set = single_set (p))
3726 && GET_CODE (SET_DEST (set)) == REG)
3728 dest_reg = SET_DEST (set);
3729 if (REGNO (dest_reg) < max_reg_before_loop
3730 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
3731 && REG_IV_TYPE (REGNO (dest_reg)) != NOT_BASIC_INDUCT)
3733 if (basic_induction_var (SET_SRC (set), GET_MODE (SET_SRC (set)),
3734 dest_reg, p, &inc_val, &mult_val,
3737 /* It is a possible basic induction variable.
3738 Create and initialize an induction structure for it. */
3741 = (struct induction *) alloca (sizeof (struct induction));
3743 record_biv (v, p, dest_reg, inc_val, mult_val, location,
3744 not_every_iteration, maybe_multiple);
3745 REG_IV_TYPE (REGNO (dest_reg)) = BASIC_INDUCT;
3747 else if (REGNO (dest_reg) < max_reg_before_loop)
3748 REG_IV_TYPE (REGNO (dest_reg)) = NOT_BASIC_INDUCT;
3752 /* Past CODE_LABEL, we get to insns that may be executed multiple
3753 times. The only way we can be sure that they can't is if every
3754 jump insn between here and the end of the loop either
3755 returns, exits the loop, is a jump to a location that is still
3756 behind the label, or is a jump to the loop start. */
3758 if (GET_CODE (p) == CODE_LABEL)
3766 insn = NEXT_INSN (insn);
3767 if (insn == scan_start)
3775 if (insn == scan_start)
3779 if (GET_CODE (insn) == JUMP_INSN
3780 && GET_CODE (PATTERN (insn)) != RETURN
3781 && (! condjump_p (insn)
3782 || (JUMP_LABEL (insn) != 0
3783 && JUMP_LABEL (insn) != scan_start
3784 && ! loop_insn_first_p (p, JUMP_LABEL (insn)))))
3792 /* Past a jump, we get to insns for which we can't count
3793 on whether they will be executed during each iteration. */
3794 /* This code appears twice in strength_reduce. There is also similar
3795 code in scan_loop. */
3796 if (GET_CODE (p) == JUMP_INSN
3797 /* If we enter the loop in the middle, and scan around to the
3798 beginning, don't set not_every_iteration for that.
3799 This can be any kind of jump, since we want to know if insns
3800 will be executed if the loop is executed. */
3801 && ! (JUMP_LABEL (p) == loop_top
3802 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3803 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
3807 /* If this is a jump outside the loop, then it also doesn't
3808 matter. Check to see if the target of this branch is on the
3809 loop_number_exits_labels list. */
3811 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
3813 label = LABEL_NEXTREF (label))
3814 if (XEXP (label, 0) == JUMP_LABEL (p))
3818 not_every_iteration = 1;
3821 else if (GET_CODE (p) == NOTE)
3823 /* At the virtual top of a converted loop, insns are again known to
3824 be executed each iteration: logically, the loop begins here
3825 even though the exit code has been duplicated.
3827 Insns are also again known to be executed each iteration at
3828 the LOOP_CONT note. */
3829 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
3830 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
3832 not_every_iteration = 0;
3833 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3835 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3839 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3840 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3841 or not an insn is known to be executed each iteration of the
3842 loop, whether or not any iterations are known to occur.
3844 Therefore, if we have just passed a label and have no more labels
3845 between here and the test insn of the loop, we know these insns
3846 will be executed each iteration. */
3848 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
3849 && no_labels_between_p (p, loop_end)
3850 && loop_insn_first_p (p, loop_cont))
3851 not_every_iteration = 0;
3854 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3855 Make a sanity check against n_times_set. */
3856 for (backbl = &loop_iv_list, bl = *backbl; bl; bl = bl->next)
3858 if (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3859 /* Above happens if register modified by subreg, etc. */
3860 /* Make sure it is not recognized as a basic induction var: */
3861 || VARRAY_INT (n_times_set, bl->regno) != bl->biv_count
3862 /* If never incremented, it is invariant that we decided not to
3863 move. So leave it alone. */
3864 || ! bl->incremented)
3866 if (loop_dump_stream)
3867 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
3869 (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3870 ? "not induction variable"
3871 : (! bl->incremented ? "never incremented"
3874 REG_IV_TYPE (bl->regno) = NOT_BASIC_INDUCT;
3881 if (loop_dump_stream)
3882 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
3886 /* Exit if there are no bivs. */
3889 /* Can still unroll the loop anyways, but indicate that there is no
3890 strength reduction info available. */
3892 unroll_loop (loop_end, insn_count, loop_start, end_insert_before,
3898 /* Find initial value for each biv by searching backwards from loop_start,
3899 halting at first label. Also record any test condition. */
3902 for (p = loop_start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
3906 if (GET_CODE (p) == CALL_INSN)
3909 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
3910 || GET_CODE (p) == CALL_INSN)
3911 note_stores (PATTERN (p), record_initial);
3913 /* Record any test of a biv that branches around the loop if no store
3914 between it and the start of loop. We only care about tests with
3915 constants and registers and only certain of those. */
3916 if (GET_CODE (p) == JUMP_INSN
3917 && JUMP_LABEL (p) != 0
3918 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop_end)
3919 && (test = get_condition_for_loop (p)) != 0
3920 && GET_CODE (XEXP (test, 0)) == REG
3921 && REGNO (XEXP (test, 0)) < max_reg_before_loop
3922 && (bl = reg_biv_class[REGNO (XEXP (test, 0))]) != 0
3923 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop_start)
3924 && bl->init_insn == 0)
3926 /* If an NE test, we have an initial value! */
3927 if (GET_CODE (test) == NE)
3930 bl->init_set = gen_rtx_SET (VOIDmode,
3931 XEXP (test, 0), XEXP (test, 1));
3934 bl->initial_test = test;
3938 /* Look at the each biv and see if we can say anything better about its
3939 initial value from any initializing insns set up above. (This is done
3940 in two passes to avoid missing SETs in a PARALLEL.) */
3941 for (backbl = &loop_iv_list; (bl = *backbl); backbl = &bl->next)
3946 if (! bl->init_insn)
3949 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3950 is a constant, use the value of that. */
3951 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
3952 && CONSTANT_P (XEXP (note, 0)))
3953 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
3954 && CONSTANT_P (XEXP (note, 0))))
3955 src = XEXP (note, 0);
3957 src = SET_SRC (bl->init_set);
3959 if (loop_dump_stream)
3960 fprintf (loop_dump_stream,
3961 "Biv %d initialized at insn %d: initial value ",
3962 bl->regno, INSN_UID (bl->init_insn));
3964 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
3965 || GET_MODE (src) == VOIDmode)
3966 && valid_initial_value_p (src, bl->init_insn, call_seen, loop_start))
3968 bl->initial_value = src;
3970 if (loop_dump_stream)
3972 if (GET_CODE (src) == CONST_INT)
3974 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (src));
3975 fputc ('\n', loop_dump_stream);
3979 print_rtl (loop_dump_stream, src);
3980 fprintf (loop_dump_stream, "\n");
3986 struct iv_class *bl2 = 0;
3989 /* Biv initial value is not a simple move. If it is the sum of
3990 another biv and a constant, check if both bivs are incremented
3991 in lockstep. Then we are actually looking at a giv.
3992 For simplicity, we only handle the case where there is but a
3993 single increment, and the register is not used elsewhere. */
3994 if (bl->biv_count == 1
3995 && bl->regno < max_reg_before_loop
3996 && uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
3997 && GET_CODE (src) == PLUS
3998 && GET_CODE (XEXP (src, 0)) == REG
3999 && CONSTANT_P (XEXP (src, 1))
4000 && ((increment = biv_total_increment (bl, loop_start, loop_end))
4003 int regno = REGNO (XEXP (src, 0));
4005 for (bl2 = loop_iv_list; bl2; bl2 = bl2->next)
4006 if (bl2->regno == regno)
4010 /* Now, can we transform this biv into a giv? */
4012 && bl2->biv_count == 1
4013 && rtx_equal_p (increment,
4014 biv_total_increment (bl2, loop_start, loop_end))
4015 /* init_insn is only set to insns that are before loop_start
4016 without any intervening labels. */
4017 && ! reg_set_between_p (bl2->biv->src_reg,
4018 PREV_INSN (bl->init_insn), loop_start)
4019 /* The register from BL2 must be set before the register from
4020 BL is set, or we must be able to move the latter set after
4021 the former set. Currently there can't be any labels
4022 in-between when biv_toal_increment returns nonzero both times
4023 but we test it here in case some day some real cfg analysis
4024 gets used to set always_computable. */
4025 && ((loop_insn_first_p (bl2->biv->insn, bl->biv->insn)
4026 && no_labels_between_p (bl2->biv->insn, bl->biv->insn))
4027 || (! reg_used_between_p (bl->biv->src_reg, bl->biv->insn,
4029 && no_jumps_between_p (bl->biv->insn, bl2->biv->insn)))
4030 && validate_change (bl->biv->insn,
4031 &SET_SRC (single_set (bl->biv->insn)),
4034 int loop_num = uid_loop_num[INSN_UID (loop_start)];
4035 rtx dominator = loop_number_cont_dominator[loop_num];
4036 rtx giv = bl->biv->src_reg;
4037 rtx giv_insn = bl->biv->insn;
4038 rtx after_giv = NEXT_INSN (giv_insn);
4040 if (loop_dump_stream)
4041 fprintf (loop_dump_stream, "is giv of biv %d\n", bl2->regno);
4042 /* Let this giv be discovered by the generic code. */
4043 REG_IV_TYPE (bl->regno) = UNKNOWN_INDUCT;
4044 /* We can get better optimization if we can move the giv setting
4045 before the first giv use. */
4047 && ! loop_insn_first_p (dominator, scan_start)
4048 && ! reg_set_between_p (bl2->biv->src_reg, loop_start,
4050 && ! reg_used_between_p (giv, loop_start, dominator)
4051 && ! reg_used_between_p (giv, giv_insn, loop_end))
4056 for (next = NEXT_INSN (dominator); ; next = NEXT_INSN (next))
4058 if ((GET_RTX_CLASS (GET_CODE (next)) == 'i'
4059 && (reg_mentioned_p (giv, PATTERN (next))
4060 || reg_set_p (bl2->biv->src_reg, next)))
4061 || GET_CODE (next) == JUMP_INSN)
4064 if (GET_RTX_CLASS (GET_CODE (next)) != 'i'
4065 || ! sets_cc0_p (PATTERN (next)))
4069 if (loop_dump_stream)
4070 fprintf (loop_dump_stream, "move after insn %d\n",
4071 INSN_UID (dominator));
4072 /* Avoid problems with luids by actually moving the insn
4073 and adjusting all luids in the range. */
4074 reorder_insns (giv_insn, giv_insn, dominator);
4075 for (p = dominator; INSN_UID (p) >= max_uid_for_loop; )
4077 compute_luids (giv_insn, after_giv, INSN_LUID (p));
4078 /* If the only purpose of the init insn is to initialize
4079 this giv, delete it. */
4080 if (single_set (bl->init_insn)
4081 && ! reg_used_between_p (giv, bl->init_insn, loop_start))
4082 delete_insn (bl->init_insn);
4084 else if (! loop_insn_first_p (bl2->biv->insn, bl->biv->insn))
4086 rtx p = PREV_INSN (giv_insn);
4087 while (INSN_UID (p) >= max_uid_for_loop)
4089 reorder_insns (giv_insn, giv_insn, bl2->biv->insn);
4090 compute_luids (after_giv, NEXT_INSN (giv_insn),
4093 /* Remove this biv from the chain. */
4103 /* If we can't make it a giv,
4104 let biv keep initial value of "itself". */
4105 else if (loop_dump_stream)
4106 fprintf (loop_dump_stream, "is complex\n");
4110 /* If a biv is unconditionally incremented several times in a row, convert
4111 all but the last increment into a giv. */
4113 /* Get an upper bound for the number of registers
4114 we might have after all bivs have been processed. */
4115 first_increment_giv = max_reg_num ();
4116 for (n_extra_increment = 0, bl = loop_iv_list; bl; bl = bl->next)
4117 n_extra_increment += bl->biv_count - 1;
4119 /* If the loop contains volatile memory references do not allow any
4120 replacements to take place, since this could loose the volatile markers. */
4121 /* XXX Temporary. */
4122 if (0 && n_extra_increment && ! loop_has_volatile)
4124 int nregs = first_increment_giv + n_extra_increment;
4126 /* Reallocate reg_iv_type and reg_iv_info. */
4127 VARRAY_GROW (reg_iv_type, nregs);
4128 VARRAY_GROW (reg_iv_info, nregs);
4130 for (bl = loop_iv_list; bl; bl = bl->next)
4132 struct induction **vp, *v, *next;
4133 int biv_dead_after_loop = 0;
4135 /* The biv increments lists are in reverse order. Fix this first. */
4136 for (v = bl->biv, bl->biv = 0; v; v = next)
4139 v->next_iv = bl->biv;
4143 /* We must guard against the case that an early exit between v->insn
4144 and next->insn leaves the biv live after the loop, since that
4145 would mean that we'd be missing an increment for the final
4146 value. The following test to set biv_dead_after_loop is like
4147 the first part of the test to set bl->eliminable.
4148 We don't check here if we can calculate the final value, since
4149 this can't succeed if we already know that there is a jump
4150 between v->insn and next->insn, yet next->always_executed is
4151 set and next->maybe_multiple is cleared. Such a combination
4152 implies that the jump destination is outseide the loop.
4153 If we want to make this check more sophisticated, we should
4154 check each branch between v->insn and next->insn individually
4155 to see if it the biv is dead at its destination. */
4157 if (uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4159 && INSN_UID (bl->init_insn) < max_uid_for_loop
4160 && (uid_luid[REGNO_FIRST_UID (bl->regno)]
4161 >= INSN_LUID (bl->init_insn))
4162 #ifdef HAVE_decrement_and_branch_until_zero
4165 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4166 biv_dead_after_loop = 1;
4168 for (vp = &bl->biv, next = *vp; v = next, next = v->next_iv;)
4170 HOST_WIDE_INT offset;
4171 rtx set, add_val, old_reg, dest_reg, last_use_insn;
4172 int old_regno, new_regno;
4174 if (! v->always_executed
4175 || v->maybe_multiple
4176 || GET_CODE (v->add_val) != CONST_INT
4177 || ! next->always_executed
4178 || next->maybe_multiple
4179 || ! CONSTANT_P (next->add_val)
4180 || ! (biv_dead_after_loop
4181 || no_jumps_between_p (v->insn, next->insn)))
4186 offset = INTVAL (v->add_val);
4187 set = single_set (v->insn);
4188 add_val = plus_constant (next->add_val, offset);
4189 old_reg = v->dest_reg;
4190 dest_reg = gen_reg_rtx (v->mode);
4192 /* Unlike reg_iv_type / reg_iv_info, the other three arrays
4193 have been allocated with some slop space, so we may not
4194 actually need to reallocate them. If we do, the following
4195 if statement will be executed just once in this loop. */
4196 if ((unsigned) max_reg_num () > n_times_set->num_elements)
4198 /* Grow all the remaining arrays. */
4199 VARRAY_GROW (set_in_loop, nregs);
4200 VARRAY_GROW (n_times_set, nregs);
4201 VARRAY_GROW (may_not_optimize, nregs);
4204 if (! validate_change (next->insn, next->location, add_val, 0))
4210 /* Here we can try to eliminate the increment by combining
4211 it into the uses. */
4213 /* Set last_use_insn so that we can check against it. */
4215 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4217 p = next_insn_in_loop (p, scan_start, end, loop_top))
4221 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
4223 if (reg_mentioned_p (old_reg, PATTERN (p)))
4229 /* If we can't get the LUIDs for the insns, we can't
4230 calculate the lifetime. This is likely from unrolling
4231 of an inner loop, so there is little point in making this
4232 a DEST_REG giv anyways. */
4233 if (INSN_UID (v->insn) >= max_uid_for_loop
4234 || INSN_UID (last_use_insn) >= max_uid_for_loop
4235 || ! validate_change (v->insn, &SET_DEST (set), dest_reg, 0))
4237 /* Change the increment at NEXT back to what it was. */
4238 if (! validate_change (next->insn, next->location,
4244 next->add_val = add_val;
4245 v->dest_reg = dest_reg;
4246 v->giv_type = DEST_REG;
4247 v->location = &SET_SRC (set);
4249 v->combined_with = 0;
4251 v->derive_adjustment = 0;
4257 v->auto_inc_opt = 0;
4260 v->derived_from = 0;
4261 v->always_computable = 1;
4262 v->always_executed = 1;
4264 v->no_const_addval = 0;
4266 old_regno = REGNO (old_reg);
4267 new_regno = REGNO (dest_reg);
4268 VARRAY_INT (set_in_loop, old_regno)--;
4269 VARRAY_INT (set_in_loop, new_regno) = 1;
4270 VARRAY_INT (n_times_set, old_regno)--;
4271 VARRAY_INT (n_times_set, new_regno) = 1;
4272 VARRAY_CHAR (may_not_optimize, new_regno) = 0;
4274 REG_IV_TYPE (new_regno) = GENERAL_INDUCT;
4275 REG_IV_INFO (new_regno) = v;
4277 /* Remove the increment from the list of biv increments,
4278 and record it as a giv. */
4281 v->next_iv = bl->giv;
4284 v->benefit = rtx_cost (SET_SRC (set), SET);
4285 bl->total_benefit += v->benefit;
4287 /* Now replace the biv with DEST_REG in all insns between
4288 the replaced increment and the next increment, and
4289 remember the last insn that needed a replacement. */
4290 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4292 p = next_insn_in_loop (p, scan_start, end, loop_top))
4296 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
4298 if (reg_mentioned_p (old_reg, PATTERN (p)))
4301 if (! validate_replace_rtx (old_reg, dest_reg, p))
4304 for (note = REG_NOTES (p); note; note = XEXP (note, 1))
4306 if (GET_CODE (note) == EXPR_LIST)
4308 = replace_rtx (XEXP (note, 0), old_reg, dest_reg);
4312 v->last_use = last_use_insn;
4313 v->lifetime = INSN_LUID (v->insn) - INSN_LUID (last_use_insn);
4314 /* If the lifetime is zero, it means that this register is really
4315 a dead store. So mark this as a giv that can be ignored.
4316 This will not prevent the biv from being eliminated. */
4317 if (v->lifetime == 0)
4320 if (loop_dump_stream)
4321 fprintf (loop_dump_stream,
4322 "Increment %d of biv %d converted to giv %d.\n\n",
4323 INSN_UID (v->insn), old_regno, new_regno);
4327 last_increment_giv = max_reg_num () - 1;
4329 /* Search the loop for general induction variables. */
4331 /* A register is a giv if: it is only set once, it is a function of a
4332 biv and a constant (or invariant), and it is not a biv. */
4334 not_every_iteration = 0;
4340 /* At end of a straight-in loop, we are done.
4341 At end of a loop entered at the bottom, scan the top. */
4342 if (p == scan_start)
4350 if (p == scan_start)
4354 /* Look for a general induction variable in a register. */
4355 if (GET_CODE (p) == INSN
4356 && (set = single_set (p))
4357 && GET_CODE (SET_DEST (set)) == REG
4358 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
4365 rtx last_consec_insn;
4367 dest_reg = SET_DEST (set);
4368 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
4371 if (/* SET_SRC is a giv. */
4372 (general_induction_var (SET_SRC (set), &src_reg, &add_val,
4373 &mult_val, 0, &benefit)
4374 /* Equivalent expression is a giv. */
4375 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
4376 && general_induction_var (XEXP (regnote, 0), &src_reg,
4377 &add_val, &mult_val, 0,
4379 /* Don't try to handle any regs made by loop optimization.
4380 We have nothing on them in regno_first_uid, etc. */
4381 && REGNO (dest_reg) < max_reg_before_loop
4382 /* Don't recognize a BASIC_INDUCT_VAR here. */
4383 && dest_reg != src_reg
4384 /* This must be the only place where the register is set. */
4385 && (VARRAY_INT (n_times_set, REGNO (dest_reg)) == 1
4386 /* or all sets must be consecutive and make a giv. */
4387 || (benefit = consec_sets_giv (benefit, p,
4389 &add_val, &mult_val,
4390 &last_consec_insn))))
4393 = (struct induction *) alloca (sizeof (struct induction));
4395 /* If this is a library call, increase benefit. */
4396 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
4397 benefit += libcall_benefit (p);
4399 /* Skip the consecutive insns, if there are any. */
4400 if (VARRAY_INT (n_times_set, REGNO (dest_reg)) != 1)
4401 p = last_consec_insn;
4403 record_giv (v, p, src_reg, dest_reg, mult_val, add_val, benefit,
4404 DEST_REG, not_every_iteration, NULL_PTR, loop_start,
4410 #ifndef DONT_REDUCE_ADDR
4411 /* Look for givs which are memory addresses. */
4412 /* This resulted in worse code on a VAX 8600. I wonder if it
4414 if (GET_CODE (p) == INSN)
4415 find_mem_givs (PATTERN (p), p, not_every_iteration, loop_start,
4419 /* Update the status of whether giv can derive other givs. This can
4420 change when we pass a label or an insn that updates a biv. */
4421 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4422 || GET_CODE (p) == CODE_LABEL)
4423 update_giv_derive (p);
4425 /* Past a jump, we get to insns for which we can't count
4426 on whether they will be executed during each iteration. */
4427 /* This code appears twice in strength_reduce. There is also similar
4428 code in scan_loop. */
4429 if (GET_CODE (p) == JUMP_INSN
4430 /* If we enter the loop in the middle, and scan around to the
4431 beginning, don't set not_every_iteration for that.
4432 This can be any kind of jump, since we want to know if insns
4433 will be executed if the loop is executed. */
4434 && ! (JUMP_LABEL (p) == loop_top
4435 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
4436 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
4440 /* If this is a jump outside the loop, then it also doesn't
4441 matter. Check to see if the target of this branch is on the
4442 loop_number_exits_labels list. */
4444 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
4446 label = LABEL_NEXTREF (label))
4447 if (XEXP (label, 0) == JUMP_LABEL (p))
4451 not_every_iteration = 1;
4454 else if (GET_CODE (p) == NOTE)
4456 /* At the virtual top of a converted loop, insns are again known to
4457 be executed each iteration: logically, the loop begins here
4458 even though the exit code has been duplicated.
4460 Insns are also again known to be executed each iteration at
4461 the LOOP_CONT note. */
4462 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
4463 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
4465 not_every_iteration = 0;
4466 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
4468 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
4472 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4473 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4474 or not an insn is known to be executed each iteration of the
4475 loop, whether or not any iterations are known to occur.
4477 Therefore, if we have just passed a label and have no more labels
4478 between here and the test insn of the loop, we know these insns
4479 will be executed each iteration. */
4481 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
4482 && no_labels_between_p (p, loop_end)
4483 && loop_insn_first_p (p, loop_cont))
4484 not_every_iteration = 0;
4487 /* Try to calculate and save the number of loop iterations. This is
4488 set to zero if the actual number can not be calculated. This must
4489 be called after all giv's have been identified, since otherwise it may
4490 fail if the iteration variable is a giv. */
4492 loop_iterations (loop_start, loop_end, loop_info);
4494 /* Now for each giv for which we still don't know whether or not it is
4495 replaceable, check to see if it is replaceable because its final value
4496 can be calculated. This must be done after loop_iterations is called,
4497 so that final_giv_value will work correctly. */
4499 for (bl = loop_iv_list; bl; bl = bl->next)
4501 struct induction *v;
4503 for (v = bl->giv; v; v = v->next_iv)
4504 if (! v->replaceable && ! v->not_replaceable)
4505 check_final_value (v, loop_start, loop_end, loop_info->n_iterations);
4508 /* Try to prove that the loop counter variable (if any) is always
4509 nonnegative; if so, record that fact with a REG_NONNEG note
4510 so that "decrement and branch until zero" insn can be used. */
4511 check_dbra_loop (loop_end, insn_count, loop_start, loop_info);
4513 /* Create reg_map to hold substitutions for replaceable giv regs.
4514 Some givs might have been made from biv increments, so look at
4515 reg_iv_type for a suitable size. */
4516 reg_map_size = reg_iv_type->num_elements;
4517 reg_map = (rtx *) alloca (reg_map_size * sizeof (rtx));
4518 bzero ((char *) reg_map, reg_map_size * sizeof (rtx));
4520 /* Examine each iv class for feasibility of strength reduction/induction
4521 variable elimination. */
4523 for (bl = loop_iv_list; bl; bl = bl->next)
4525 struct induction *v;
4528 rtx final_value = 0;
4531 /* Test whether it will be possible to eliminate this biv
4532 provided all givs are reduced. This is possible if either
4533 the reg is not used outside the loop, or we can compute
4534 what its final value will be.
4536 For architectures with a decrement_and_branch_until_zero insn,
4537 don't do this if we put a REG_NONNEG note on the endtest for
4540 /* Compare against bl->init_insn rather than loop_start.
4541 We aren't concerned with any uses of the biv between
4542 init_insn and loop_start since these won't be affected
4543 by the value of the biv elsewhere in the function, so
4544 long as init_insn doesn't use the biv itself.
4545 March 14, 1989 -- self@bayes.arc.nasa.gov */
4547 if ((uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4549 && INSN_UID (bl->init_insn) < max_uid_for_loop
4550 && uid_luid[REGNO_FIRST_UID (bl->regno)] >= INSN_LUID (bl->init_insn)
4551 #ifdef HAVE_decrement_and_branch_until_zero
4554 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4555 || ((final_value = final_biv_value (bl, loop_start, loop_end,
4556 loop_info->n_iterations))
4557 #ifdef HAVE_decrement_and_branch_until_zero
4561 bl->eliminable = maybe_eliminate_biv (bl, loop_start, end, 0,
4562 threshold, insn_count);
4565 if (loop_dump_stream)
4567 fprintf (loop_dump_stream,
4568 "Cannot eliminate biv %d.\n",
4570 fprintf (loop_dump_stream,
4571 "First use: insn %d, last use: insn %d.\n",
4572 REGNO_FIRST_UID (bl->regno),
4573 REGNO_LAST_UID (bl->regno));
4577 /* Combine all giv's for this iv_class. */
4580 /* This will be true at the end, if all givs which depend on this
4581 biv have been strength reduced.
4582 We can't (currently) eliminate the biv unless this is so. */
4585 /* Check each giv in this class to see if we will benefit by reducing
4586 it. Skip giv's combined with others. */
4587 for (v = bl->giv; v; v = v->next_iv)
4589 struct induction *tv;
4591 if (v->ignore || v->same)
4594 benefit = v->benefit;
4596 /* Reduce benefit if not replaceable, since we will insert
4597 a move-insn to replace the insn that calculates this giv.
4598 Don't do this unless the giv is a user variable, since it
4599 will often be marked non-replaceable because of the duplication
4600 of the exit code outside the loop. In such a case, the copies
4601 we insert are dead and will be deleted. So they don't have
4602 a cost. Similar situations exist. */
4603 /* ??? The new final_[bg]iv_value code does a much better job
4604 of finding replaceable giv's, and hence this code may no longer
4606 if (! v->replaceable && ! bl->eliminable
4607 && REG_USERVAR_P (v->dest_reg))
4608 benefit -= copy_cost;
4610 /* Decrease the benefit to count the add-insns that we will
4611 insert to increment the reduced reg for the giv. */
4612 benefit -= add_cost * bl->biv_count;
4614 /* Decide whether to strength-reduce this giv or to leave the code
4615 unchanged (recompute it from the biv each time it is used).
4616 This decision can be made independently for each giv. */
4619 /* Attempt to guess whether autoincrement will handle some of the
4620 new add insns; if so, increase BENEFIT (undo the subtraction of
4621 add_cost that was done above). */
4622 if (v->giv_type == DEST_ADDR
4623 && GET_CODE (v->mult_val) == CONST_INT)
4625 if (HAVE_POST_INCREMENT
4626 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4627 benefit += add_cost * bl->biv_count;
4628 else if (HAVE_PRE_INCREMENT
4629 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4630 benefit += add_cost * bl->biv_count;
4631 else if (HAVE_POST_DECREMENT
4632 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4633 benefit += add_cost * bl->biv_count;
4634 else if (HAVE_PRE_DECREMENT
4635 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4636 benefit += add_cost * bl->biv_count;
4640 /* If an insn is not to be strength reduced, then set its ignore
4641 flag, and clear all_reduced. */
4643 /* A giv that depends on a reversed biv must be reduced if it is
4644 used after the loop exit, otherwise, it would have the wrong
4645 value after the loop exit. To make it simple, just reduce all
4646 of such giv's whether or not we know they are used after the loop
4649 if ( ! flag_reduce_all_givs && v->lifetime * threshold * benefit < insn_count
4652 if (loop_dump_stream)
4653 fprintf (loop_dump_stream,
4654 "giv of insn %d not worth while, %d vs %d.\n",
4656 v->lifetime * threshold * benefit, insn_count);
4662 /* Check that we can increment the reduced giv without a
4663 multiply insn. If not, reject it. */
4665 for (tv = bl->biv; tv; tv = tv->next_iv)
4666 if (tv->mult_val == const1_rtx
4667 && ! product_cheap_p (tv->add_val, v->mult_val))
4669 if (loop_dump_stream)
4670 fprintf (loop_dump_stream,
4671 "giv of insn %d: would need a multiply.\n",
4672 INSN_UID (v->insn));
4680 /* Check for givs whose first use is their definition and whose
4681 last use is the definition of another giv. If so, it is likely
4682 dead and should not be used to derive another giv nor to
4684 for (v = bl->giv; v; v = v->next_iv)
4687 || (v->same && v->same->ignore))
4692 struct induction *v1;
4694 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4695 if (v->last_use == v1->insn)
4698 else if (v->giv_type == DEST_REG
4699 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4701 struct induction *v1;
4703 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4704 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4710 /* XXX Temporary. */
4711 /* Now that we know which givs will be reduced, try to rearrange the
4712 combinations to reduce register pressure.
4713 recombine_givs calls find_life_end, which needs reg_iv_type and
4714 reg_iv_info to be valid for all pseudos. We do the necessary
4715 reallocation here since it allows to check if there are still
4716 more bivs to process. */
4717 nregs = max_reg_num ();
4718 if (nregs > reg_iv_type->num_elements)
4720 /* If there are still more bivs to process, allocate some slack
4721 space so that we're not constantly reallocating these arrays. */
4724 /* Reallocate reg_iv_type and reg_iv_info. */
4725 VARRAY_GROW (reg_iv_type, nregs);
4726 VARRAY_GROW (reg_iv_info, nregs);
4728 recombine_givs (bl, loop_start, loop_end, unroll_p);
4731 /* Reduce each giv that we decided to reduce. */
4733 for (v = bl->giv; v; v = v->next_iv)
4735 struct induction *tv;
4736 if (! v->ignore && v->same == 0)
4738 int auto_inc_opt = 0;
4740 /* If the code for derived givs immediately below has already
4741 allocated a new_reg, we must keep it. */
4743 v->new_reg = gen_reg_rtx (v->mode);
4745 if (v->derived_from)
4747 struct induction *d = v->derived_from;
4749 /* In case d->dest_reg is not replaceable, we have
4750 to replace it in v->insn now. */
4752 d->new_reg = gen_reg_rtx (d->mode);
4754 = replace_rtx (PATTERN (v->insn), d->dest_reg, d->new_reg);
4756 = replace_rtx (PATTERN (v->insn), v->dest_reg, v->new_reg);
4757 if (bl->biv_count != 1)
4759 /* For each place where the biv is incremented, add an
4760 insn to set the new, reduced reg for the giv. */
4761 for (tv = bl->biv; tv; tv = tv->next_iv)
4763 /* We always emit reduced giv increments before the
4764 biv increment when bl->biv_count != 1. So by
4765 emitting the add insns for derived givs after the
4766 biv increment, they pick up the updated value of
4768 emit_insn_after (copy_rtx (PATTERN (v->insn)),
4777 /* If the target has auto-increment addressing modes, and
4778 this is an address giv, then try to put the increment
4779 immediately after its use, so that flow can create an
4780 auto-increment addressing mode. */
4781 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4782 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4783 /* We don't handle reversed biv's because bl->biv->insn
4784 does not have a valid INSN_LUID. */
4786 && v->always_executed && ! v->maybe_multiple
4787 && INSN_UID (v->insn) < max_uid_for_loop)
4789 /* If other giv's have been combined with this one, then
4790 this will work only if all uses of the other giv's occur
4791 before this giv's insn. This is difficult to check.
4793 We simplify this by looking for the common case where
4794 there is one DEST_REG giv, and this giv's insn is the
4795 last use of the dest_reg of that DEST_REG giv. If the
4796 increment occurs after the address giv, then we can
4797 perform the optimization. (Otherwise, the increment
4798 would have to go before other_giv, and we would not be
4799 able to combine it with the address giv to get an
4800 auto-inc address.) */
4801 if (v->combined_with)
4803 struct induction *other_giv = 0;
4805 for (tv = bl->giv; tv; tv = tv->next_iv)
4813 if (! tv && other_giv
4814 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4815 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4816 == INSN_UID (v->insn))
4817 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4820 /* Check for case where increment is before the address
4821 giv. Do this test in "loop order". */
4822 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4823 && (INSN_LUID (v->insn) < INSN_LUID (scan_start)
4824 || (INSN_LUID (bl->biv->insn)
4825 > INSN_LUID (scan_start))))
4826 || (INSN_LUID (v->insn) < INSN_LUID (scan_start)
4827 && (INSN_LUID (scan_start)
4828 < INSN_LUID (bl->biv->insn))))
4837 /* We can't put an insn immediately after one setting
4838 cc0, or immediately before one using cc0. */
4839 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4840 || (auto_inc_opt == -1
4841 && (prev = prev_nonnote_insn (v->insn)) != 0
4842 && GET_RTX_CLASS (GET_CODE (prev)) == 'i'
4843 && sets_cc0_p (PATTERN (prev))))
4849 v->auto_inc_opt = 1;
4853 /* For each place where the biv is incremented, add an insn
4854 to increment the new, reduced reg for the giv. */
4855 for (tv = bl->biv; tv; tv = tv->next_iv)
4860 insert_before = tv->insn;
4861 else if (auto_inc_opt == 1)
4862 insert_before = NEXT_INSN (v->insn);
4864 insert_before = v->insn;
4866 if (tv->mult_val == const1_rtx)
4867 emit_iv_add_mult (tv->add_val, v->mult_val,
4868 v->new_reg, v->new_reg, insert_before);
4869 else /* tv->mult_val == const0_rtx */
4870 /* A multiply is acceptable here
4871 since this is presumed to be seldom executed. */
4872 emit_iv_add_mult (tv->add_val, v->mult_val,
4873 v->add_val, v->new_reg, insert_before);
4876 /* Add code at loop start to initialize giv's reduced reg. */
4878 emit_iv_add_mult (bl->initial_value, v->mult_val,
4879 v->add_val, v->new_reg, loop_start);
4883 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4886 For each giv register that can be reduced now: if replaceable,
4887 substitute reduced reg wherever the old giv occurs;
4888 else add new move insn "giv_reg = reduced_reg". */
4890 for (v = bl->giv; v; v = v->next_iv)
4892 if (v->same && v->same->ignore)
4898 /* Update expression if this was combined, in case other giv was
4901 v->new_reg = replace_rtx (v->new_reg,
4902 v->same->dest_reg, v->same->new_reg);
4904 if (v->giv_type == DEST_ADDR)
4905 /* Store reduced reg as the address in the memref where we found
4907 validate_change (v->insn, v->location, v->new_reg, 0);
4908 else if (v->replaceable)
4910 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4913 /* I can no longer duplicate the original problem. Perhaps
4914 this is unnecessary now? */
4916 /* Replaceable; it isn't strictly necessary to delete the old
4917 insn and emit a new one, because v->dest_reg is now dead.
4919 However, especially when unrolling loops, the special
4920 handling for (set REG0 REG1) in the second cse pass may
4921 make v->dest_reg live again. To avoid this problem, emit
4922 an insn to set the original giv reg from the reduced giv.
4923 We can not delete the original insn, since it may be part
4924 of a LIBCALL, and the code in flow that eliminates dead
4925 libcalls will fail if it is deleted. */
4926 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4932 /* Not replaceable; emit an insn to set the original giv reg from
4933 the reduced giv, same as above. */
4934 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4938 /* When a loop is reversed, givs which depend on the reversed
4939 biv, and which are live outside the loop, must be set to their
4940 correct final value. This insn is only needed if the giv is
4941 not replaceable. The correct final value is the same as the
4942 value that the giv starts the reversed loop with. */
4943 if (bl->reversed && ! v->replaceable)
4944 emit_iv_add_mult (bl->initial_value, v->mult_val,
4945 v->add_val, v->dest_reg, end_insert_before);
4946 else if (v->final_value)
4950 /* If the loop has multiple exits, emit the insn before the
4951 loop to ensure that it will always be executed no matter
4952 how the loop exits. Otherwise, emit the insn after the loop,
4953 since this is slightly more efficient. */
4954 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
4955 insert_before = loop_start;
4957 insert_before = end_insert_before;
4958 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
4962 /* If the insn to set the final value of the giv was emitted
4963 before the loop, then we must delete the insn inside the loop
4964 that sets it. If this is a LIBCALL, then we must delete
4965 every insn in the libcall. Note, however, that
4966 final_giv_value will only succeed when there are multiple
4967 exits if the giv is dead at each exit, hence it does not
4968 matter that the original insn remains because it is dead
4970 /* Delete the insn inside the loop that sets the giv since
4971 the giv is now set before (or after) the loop. */
4972 delete_insn (v->insn);
4976 if (loop_dump_stream)
4978 fprintf (loop_dump_stream, "giv at %d reduced to ",
4979 INSN_UID (v->insn));
4980 print_rtl (loop_dump_stream, v->new_reg);
4981 fprintf (loop_dump_stream, "\n");
4985 /* All the givs based on the biv bl have been reduced if they
4988 /* For each giv not marked as maybe dead that has been combined with a
4989 second giv, clear any "maybe dead" mark on that second giv.
4990 v->new_reg will either be or refer to the register of the giv it
4993 Doing this clearing avoids problems in biv elimination where a
4994 giv's new_reg is a complex value that can't be put in the insn but
4995 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4996 Since the register will be used in either case, we'd prefer it be
4997 used from the simpler giv. */
4999 for (v = bl->giv; v; v = v->next_iv)
5000 if (! v->maybe_dead && v->same)
5001 v->same->maybe_dead = 0;
5003 /* Try to eliminate the biv, if it is a candidate.
5004 This won't work if ! all_reduced,
5005 since the givs we planned to use might not have been reduced.
5007 We have to be careful that we didn't initially think we could eliminate
5008 this biv because of a giv that we now think may be dead and shouldn't
5009 be used as a biv replacement.
5011 Also, there is the possibility that we may have a giv that looks
5012 like it can be used to eliminate a biv, but the resulting insn
5013 isn't valid. This can happen, for example, on the 88k, where a
5014 JUMP_INSN can compare a register only with zero. Attempts to
5015 replace it with a compare with a constant will fail.
5017 Note that in cases where this call fails, we may have replaced some
5018 of the occurrences of the biv with a giv, but no harm was done in
5019 doing so in the rare cases where it can occur. */
5021 if (all_reduced == 1 && bl->eliminable
5022 && maybe_eliminate_biv (bl, loop_start, end, 1,
5023 threshold, insn_count))
5026 /* ?? If we created a new test to bypass the loop entirely,
5027 or otherwise drop straight in, based on this test, then
5028 we might want to rewrite it also. This way some later
5029 pass has more hope of removing the initialization of this
5032 /* If final_value != 0, then the biv may be used after loop end
5033 and we must emit an insn to set it just in case.
5035 Reversed bivs already have an insn after the loop setting their
5036 value, so we don't need another one. We can't calculate the
5037 proper final value for such a biv here anyways. */
5038 if (final_value != 0 && ! bl->reversed)
5042 /* If the loop has multiple exits, emit the insn before the
5043 loop to ensure that it will always be executed no matter
5044 how the loop exits. Otherwise, emit the insn after the
5045 loop, since this is slightly more efficient. */
5046 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
5047 insert_before = loop_start;
5049 insert_before = end_insert_before;
5051 emit_insn_before (gen_move_insn (bl->biv->dest_reg, final_value),
5056 /* Delete all of the instructions inside the loop which set
5057 the biv, as they are all dead. If is safe to delete them,
5058 because an insn setting a biv will never be part of a libcall. */
5059 /* However, deleting them will invalidate the regno_last_uid info,
5060 so keeping them around is more convenient. Final_biv_value
5061 will only succeed when there are multiple exits if the biv
5062 is dead at each exit, hence it does not matter that the original
5063 insn remains, because it is dead anyways. */
5064 for (v = bl->biv; v; v = v->next_iv)
5065 delete_insn (v->insn);
5068 if (loop_dump_stream)
5069 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
5074 /* Go through all the instructions in the loop, making all the
5075 register substitutions scheduled in REG_MAP. */
5077 for (p = loop_start; p != end; p = NEXT_INSN (p))
5078 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5079 || GET_CODE (p) == CALL_INSN)
5081 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
5082 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
5086 /* Unroll loops from within strength reduction so that we can use the
5087 induction variable information that strength_reduce has already
5091 unroll_loop (loop_end, insn_count, loop_start, end_insert_before,
5094 #ifdef HAVE_decrement_and_branch_on_count
5095 /* Instrument the loop with BCT insn. */
5096 if (HAVE_decrement_and_branch_on_count && bct_p
5097 && flag_branch_on_count_reg)
5098 insert_bct (loop_start, loop_end, loop_info);
5099 #endif /* HAVE_decrement_and_branch_on_count */
5101 if (loop_dump_stream)
5102 fprintf (loop_dump_stream, "\n");
5103 VARRAY_FREE (reg_iv_type);
5104 VARRAY_FREE (reg_iv_info);
5107 /* Return 1 if X is a valid source for an initial value (or as value being
5108 compared against in an initial test).
5110 X must be either a register or constant and must not be clobbered between
5111 the current insn and the start of the loop.
5113 INSN is the insn containing X. */
5116 valid_initial_value_p (x, insn, call_seen, loop_start)
5125 /* Only consider pseudos we know about initialized in insns whose luids
5127 if (GET_CODE (x) != REG
5128 || REGNO (x) >= max_reg_before_loop)
5131 /* Don't use call-clobbered registers across a call which clobbers it. On
5132 some machines, don't use any hard registers at all. */
5133 if (REGNO (x) < FIRST_PSEUDO_REGISTER
5134 && (SMALL_REGISTER_CLASSES
5135 || (call_used_regs[REGNO (x)] && call_seen)))
5138 /* Don't use registers that have been clobbered before the start of the
5140 if (reg_set_between_p (x, insn, loop_start))
5146 /* Scan X for memory refs and check each memory address
5147 as a possible giv. INSN is the insn whose pattern X comes from.
5148 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5149 every loop iteration. */
5152 find_mem_givs (x, insn, not_every_iteration, loop_start, loop_end)
5155 int not_every_iteration;
5156 rtx loop_start, loop_end;
5159 register enum rtx_code code;
5165 code = GET_CODE (x);
5189 /* This code used to disable creating GIVs with mult_val == 1 and
5190 add_val == 0. However, this leads to lost optimizations when
5191 it comes time to combine a set of related DEST_ADDR GIVs, since
5192 this one would not be seen. */
5194 if (general_induction_var (XEXP (x, 0), &src_reg, &add_val,
5195 &mult_val, 1, &benefit))
5197 /* Found one; record it. */
5199 = (struct induction *) oballoc (sizeof (struct induction));
5201 record_giv (v, insn, src_reg, addr_placeholder, mult_val,
5202 add_val, benefit, DEST_ADDR, not_every_iteration,
5203 &XEXP (x, 0), loop_start, loop_end);
5205 v->mem_mode = GET_MODE (x);
5214 /* Recursively scan the subexpressions for other mem refs. */
5216 fmt = GET_RTX_FORMAT (code);
5217 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5219 find_mem_givs (XEXP (x, i), insn, not_every_iteration, loop_start,
5221 else if (fmt[i] == 'E')
5222 for (j = 0; j < XVECLEN (x, i); j++)
5223 find_mem_givs (XVECEXP (x, i, j), insn, not_every_iteration,
5224 loop_start, loop_end);
5227 /* Fill in the data about one biv update.
5228 V is the `struct induction' in which we record the biv. (It is
5229 allocated by the caller, with alloca.)
5230 INSN is the insn that sets it.
5231 DEST_REG is the biv's reg.
5233 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5234 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5235 being set to INC_VAL.
5237 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5238 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5239 can be executed more than once per iteration. If MAYBE_MULTIPLE
5240 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5241 executed exactly once per iteration. */
5244 record_biv (v, insn, dest_reg, inc_val, mult_val, location,
5245 not_every_iteration, maybe_multiple)
5246 struct induction *v;
5252 int not_every_iteration;
5255 struct iv_class *bl;
5258 v->src_reg = dest_reg;
5259 v->dest_reg = dest_reg;
5260 v->mult_val = mult_val;
5261 v->add_val = inc_val;
5262 v->location = location;
5263 v->mode = GET_MODE (dest_reg);
5264 v->always_computable = ! not_every_iteration;
5265 v->always_executed = ! not_every_iteration;
5266 v->maybe_multiple = maybe_multiple;
5268 /* Add this to the reg's iv_class, creating a class
5269 if this is the first incrementation of the reg. */
5271 bl = reg_biv_class[REGNO (dest_reg)];
5274 /* Create and initialize new iv_class. */
5276 bl = (struct iv_class *) oballoc (sizeof (struct iv_class));
5278 bl->regno = REGNO (dest_reg);
5284 /* Set initial value to the reg itself. */
5285 bl->initial_value = dest_reg;
5286 /* We haven't seen the initializing insn yet */
5289 bl->initial_test = 0;
5290 bl->incremented = 0;
5294 bl->total_benefit = 0;
5296 /* Add this class to loop_iv_list. */
5297 bl->next = loop_iv_list;
5300 /* Put it in the array of biv register classes. */
5301 reg_biv_class[REGNO (dest_reg)] = bl;
5304 /* Update IV_CLASS entry for this biv. */
5305 v->next_iv = bl->biv;
5308 if (mult_val == const1_rtx)
5309 bl->incremented = 1;
5311 if (loop_dump_stream)
5313 fprintf (loop_dump_stream,
5314 "Insn %d: possible biv, reg %d,",
5315 INSN_UID (insn), REGNO (dest_reg));
5316 if (GET_CODE (inc_val) == CONST_INT)
5318 fprintf (loop_dump_stream, " const =");
5319 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (inc_val));
5320 fputc ('\n', loop_dump_stream);
5324 fprintf (loop_dump_stream, " const = ");
5325 print_rtl (loop_dump_stream, inc_val);
5326 fprintf (loop_dump_stream, "\n");
5331 /* Fill in the data about one giv.
5332 V is the `struct induction' in which we record the giv. (It is
5333 allocated by the caller, with alloca.)
5334 INSN is the insn that sets it.
5335 BENEFIT estimates the savings from deleting this insn.
5336 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5337 into a register or is used as a memory address.
5339 SRC_REG is the biv reg which the giv is computed from.
5340 DEST_REG is the giv's reg (if the giv is stored in a reg).
5341 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5342 LOCATION points to the place where this giv's value appears in INSN. */
5345 record_giv (v, insn, src_reg, dest_reg, mult_val, add_val, benefit,
5346 type, not_every_iteration, location, loop_start, loop_end)
5347 struct induction *v;
5351 rtx mult_val, add_val;
5354 int not_every_iteration;
5356 rtx loop_start, loop_end;
5358 struct induction *b;
5359 struct iv_class *bl;
5360 rtx set = single_set (insn);
5363 v->src_reg = src_reg;
5365 v->dest_reg = dest_reg;
5366 v->mult_val = mult_val;
5367 v->add_val = add_val;
5368 v->benefit = benefit;
5369 v->location = location;
5371 v->combined_with = 0;
5372 v->maybe_multiple = 0;
5374 v->derive_adjustment = 0;
5380 v->auto_inc_opt = 0;
5383 v->derived_from = 0;
5386 /* The v->always_computable field is used in update_giv_derive, to
5387 determine whether a giv can be used to derive another giv. For a
5388 DEST_REG giv, INSN computes a new value for the giv, so its value
5389 isn't computable if INSN insn't executed every iteration.
5390 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5391 it does not compute a new value. Hence the value is always computable
5392 regardless of whether INSN is executed each iteration. */
5394 if (type == DEST_ADDR)
5395 v->always_computable = 1;
5397 v->always_computable = ! not_every_iteration;
5399 v->always_executed = ! not_every_iteration;
5401 if (type == DEST_ADDR)
5403 v->mode = GET_MODE (*location);
5406 else /* type == DEST_REG */
5408 v->mode = GET_MODE (SET_DEST (set));
5410 v->lifetime = (uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
5411 - uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))]);
5413 /* If the lifetime is zero, it means that this register is
5414 really a dead store. So mark this as a giv that can be
5415 ignored. This will not prevent the biv from being eliminated. */
5416 if (v->lifetime == 0)
5419 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
5420 REG_IV_INFO (REGNO (dest_reg)) = v;
5423 /* Add the giv to the class of givs computed from one biv. */
5425 bl = reg_biv_class[REGNO (src_reg)];
5428 v->next_iv = bl->giv;
5430 /* Don't count DEST_ADDR. This is supposed to count the number of
5431 insns that calculate givs. */
5432 if (type == DEST_REG)
5434 bl->total_benefit += benefit;
5437 /* Fatal error, biv missing for this giv? */
5440 if (type == DEST_ADDR)
5444 /* The giv can be replaced outright by the reduced register only if all
5445 of the following conditions are true:
5446 - the insn that sets the giv is always executed on any iteration
5447 on which the giv is used at all
5448 (there are two ways to deduce this:
5449 either the insn is executed on every iteration,
5450 or all uses follow that insn in the same basic block),
5451 - the giv is not used outside the loop
5452 - no assignments to the biv occur during the giv's lifetime. */
5454 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5455 /* Previous line always fails if INSN was moved by loop opt. */
5456 && uid_luid[REGNO_LAST_UID (REGNO (dest_reg))] < INSN_LUID (loop_end)
5457 && (! not_every_iteration
5458 || last_use_this_basic_block (dest_reg, insn)))
5460 /* Now check that there are no assignments to the biv within the
5461 giv's lifetime. This requires two separate checks. */
5463 /* Check each biv update, and fail if any are between the first
5464 and last use of the giv.
5466 If this loop contains an inner loop that was unrolled, then
5467 the insn modifying the biv may have been emitted by the loop
5468 unrolling code, and hence does not have a valid luid. Just
5469 mark the biv as not replaceable in this case. It is not very
5470 useful as a biv, because it is used in two different loops.
5471 It is very unlikely that we would be able to optimize the giv
5472 using this biv anyways. */
5475 for (b = bl->biv; b; b = b->next_iv)
5477 if (INSN_UID (b->insn) >= max_uid_for_loop
5478 || ((uid_luid[INSN_UID (b->insn)]
5479 >= uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))])
5480 && (uid_luid[INSN_UID (b->insn)]
5481 <= uid_luid[REGNO_LAST_UID (REGNO (dest_reg))])))
5484 v->not_replaceable = 1;
5489 /* If there are any backwards branches that go from after the
5490 biv update to before it, then this giv is not replaceable. */
5492 for (b = bl->biv; b; b = b->next_iv)
5493 if (back_branch_in_range_p (b->insn, loop_start, loop_end))
5496 v->not_replaceable = 1;
5502 /* May still be replaceable, we don't have enough info here to
5505 v->not_replaceable = 0;
5509 /* Record whether the add_val contains a const_int, for later use by
5514 v->no_const_addval = 1;
5515 if (tem == const0_rtx)
5517 else if (GET_CODE (tem) == CONST_INT)
5518 v->no_const_addval = 0;
5519 else if (GET_CODE (tem) == PLUS)
5523 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5524 tem = XEXP (tem, 0);
5525 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5526 tem = XEXP (tem, 1);
5530 if (GET_CODE (XEXP (tem, 1)) == CONST_INT)
5531 v->no_const_addval = 0;
5535 if (loop_dump_stream)
5537 if (type == DEST_REG)
5538 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
5539 INSN_UID (insn), REGNO (dest_reg));
5541 fprintf (loop_dump_stream, "Insn %d: dest address",
5544 fprintf (loop_dump_stream, " src reg %d benefit %d",
5545 REGNO (src_reg), v->benefit);
5546 fprintf (loop_dump_stream, " lifetime %d",
5550 fprintf (loop_dump_stream, " replaceable");
5552 if (v->no_const_addval)
5553 fprintf (loop_dump_stream, " ncav");
5555 if (GET_CODE (mult_val) == CONST_INT)
5557 fprintf (loop_dump_stream, " mult ");
5558 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (mult_val));
5562 fprintf (loop_dump_stream, " mult ");
5563 print_rtl (loop_dump_stream, mult_val);
5566 if (GET_CODE (add_val) == CONST_INT)
5568 fprintf (loop_dump_stream, " add ");
5569 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (add_val));
5573 fprintf (loop_dump_stream, " add ");
5574 print_rtl (loop_dump_stream, add_val);
5578 if (loop_dump_stream)
5579 fprintf (loop_dump_stream, "\n");
5584 /* All this does is determine whether a giv can be made replaceable because
5585 its final value can be calculated. This code can not be part of record_giv
5586 above, because final_giv_value requires that the number of loop iterations
5587 be known, and that can not be accurately calculated until after all givs
5588 have been identified. */
5591 check_final_value (v, loop_start, loop_end, n_iterations)
5592 struct induction *v;
5593 rtx loop_start, loop_end;
5594 unsigned HOST_WIDE_INT n_iterations;
5596 struct iv_class *bl;
5597 rtx final_value = 0;
5599 bl = reg_biv_class[REGNO (v->src_reg)];
5601 /* DEST_ADDR givs will never reach here, because they are always marked
5602 replaceable above in record_giv. */
5604 /* The giv can be replaced outright by the reduced register only if all
5605 of the following conditions are true:
5606 - the insn that sets the giv is always executed on any iteration
5607 on which the giv is used at all
5608 (there are two ways to deduce this:
5609 either the insn is executed on every iteration,
5610 or all uses follow that insn in the same basic block),
5611 - its final value can be calculated (this condition is different
5612 than the one above in record_giv)
5613 - no assignments to the biv occur during the giv's lifetime. */
5616 /* This is only called now when replaceable is known to be false. */
5617 /* Clear replaceable, so that it won't confuse final_giv_value. */
5621 if ((final_value = final_giv_value (v, loop_start, loop_end, n_iterations))
5622 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5624 int biv_increment_seen = 0;
5630 /* When trying to determine whether or not a biv increment occurs
5631 during the lifetime of the giv, we can ignore uses of the variable
5632 outside the loop because final_value is true. Hence we can not
5633 use regno_last_uid and regno_first_uid as above in record_giv. */
5635 /* Search the loop to determine whether any assignments to the
5636 biv occur during the giv's lifetime. Start with the insn
5637 that sets the giv, and search around the loop until we come
5638 back to that insn again.
5640 Also fail if there is a jump within the giv's lifetime that jumps
5641 to somewhere outside the lifetime but still within the loop. This
5642 catches spaghetti code where the execution order is not linear, and
5643 hence the above test fails. Here we assume that the giv lifetime
5644 does not extend from one iteration of the loop to the next, so as
5645 to make the test easier. Since the lifetime isn't known yet,
5646 this requires two loops. See also record_giv above. */
5648 last_giv_use = v->insn;
5654 p = NEXT_INSN (loop_start);
5658 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5659 || GET_CODE (p) == CALL_INSN)
5661 if (biv_increment_seen)
5663 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5666 v->not_replaceable = 1;
5670 else if (reg_set_p (v->src_reg, PATTERN (p)))
5671 biv_increment_seen = 1;
5672 else if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5677 /* Now that the lifetime of the giv is known, check for branches
5678 from within the lifetime to outside the lifetime if it is still
5688 p = NEXT_INSN (loop_start);
5689 if (p == last_giv_use)
5692 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5693 && LABEL_NAME (JUMP_LABEL (p))
5694 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
5695 && loop_insn_first_p (loop_start, JUMP_LABEL (p)))
5696 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
5697 && loop_insn_first_p (JUMP_LABEL (p), loop_end))))
5700 v->not_replaceable = 1;
5702 if (loop_dump_stream)
5703 fprintf (loop_dump_stream,
5704 "Found branch outside giv lifetime.\n");
5711 /* If it is replaceable, then save the final value. */
5713 v->final_value = final_value;
5716 if (loop_dump_stream && v->replaceable)
5717 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5718 INSN_UID (v->insn), REGNO (v->dest_reg));
5721 /* Update the status of whether a giv can derive other givs.
5723 We need to do something special if there is or may be an update to the biv
5724 between the time the giv is defined and the time it is used to derive
5727 In addition, a giv that is only conditionally set is not allowed to
5728 derive another giv once a label has been passed.
5730 The cases we look at are when a label or an update to a biv is passed. */
5733 update_giv_derive (p)
5736 struct iv_class *bl;
5737 struct induction *biv, *giv;
5741 /* Search all IV classes, then all bivs, and finally all givs.
5743 There are three cases we are concerned with. First we have the situation
5744 of a giv that is only updated conditionally. In that case, it may not
5745 derive any givs after a label is passed.
5747 The second case is when a biv update occurs, or may occur, after the
5748 definition of a giv. For certain biv updates (see below) that are
5749 known to occur between the giv definition and use, we can adjust the
5750 giv definition. For others, or when the biv update is conditional,
5751 we must prevent the giv from deriving any other givs. There are two
5752 sub-cases within this case.
5754 If this is a label, we are concerned with any biv update that is done
5755 conditionally, since it may be done after the giv is defined followed by
5756 a branch here (actually, we need to pass both a jump and a label, but
5757 this extra tracking doesn't seem worth it).
5759 If this is a jump, we are concerned about any biv update that may be
5760 executed multiple times. We are actually only concerned about
5761 backward jumps, but it is probably not worth performing the test
5762 on the jump again here.
5764 If this is a biv update, we must adjust the giv status to show that a
5765 subsequent biv update was performed. If this adjustment cannot be done,
5766 the giv cannot derive further givs. */
5768 for (bl = loop_iv_list; bl; bl = bl->next)
5769 for (biv = bl->biv; biv; biv = biv->next_iv)
5770 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5773 for (giv = bl->giv; giv; giv = giv->next_iv)
5775 /* If cant_derive is already true, there is no point in
5776 checking all of these conditions again. */
5777 if (giv->cant_derive)
5780 /* If this giv is conditionally set and we have passed a label,
5781 it cannot derive anything. */
5782 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5783 giv->cant_derive = 1;
5785 /* Skip givs that have mult_val == 0, since
5786 they are really invariants. Also skip those that are
5787 replaceable, since we know their lifetime doesn't contain
5789 else if (giv->mult_val == const0_rtx || giv->replaceable)
5792 /* The only way we can allow this giv to derive another
5793 is if this is a biv increment and we can form the product
5794 of biv->add_val and giv->mult_val. In this case, we will
5795 be able to compute a compensation. */
5796 else if (biv->insn == p)
5800 if (biv->mult_val == const1_rtx)
5801 tem = simplify_giv_expr (gen_rtx_MULT (giv->mode,
5806 if (tem && giv->derive_adjustment)
5807 tem = simplify_giv_expr (gen_rtx_PLUS (giv->mode, tem,
5808 giv->derive_adjustment),
5811 giv->derive_adjustment = tem;
5813 giv->cant_derive = 1;
5815 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
5816 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
5817 giv->cant_derive = 1;
5822 /* Check whether an insn is an increment legitimate for a basic induction var.
5823 X is the source of insn P, or a part of it.
5824 MODE is the mode in which X should be interpreted.
5826 DEST_REG is the putative biv, also the destination of the insn.
5827 We accept patterns of these forms:
5828 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5829 REG = INVARIANT + REG
5831 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5832 store the additive term into *INC_VAL, and store the place where
5833 we found the additive term into *LOCATION.
5835 If X is an assignment of an invariant into DEST_REG, we set
5836 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5838 We also want to detect a BIV when it corresponds to a variable
5839 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5840 of the variable may be a PLUS that adds a SUBREG of that variable to
5841 an invariant and then sign- or zero-extends the result of the PLUS
5844 Most GIVs in such cases will be in the promoted mode, since that is the
5845 probably the natural computation mode (and almost certainly the mode
5846 used for addresses) on the machine. So we view the pseudo-reg containing
5847 the variable as the BIV, as if it were simply incremented.
5849 Note that treating the entire pseudo as a BIV will result in making
5850 simple increments to any GIVs based on it. However, if the variable
5851 overflows in its declared mode but not its promoted mode, the result will
5852 be incorrect. This is acceptable if the variable is signed, since
5853 overflows in such cases are undefined, but not if it is unsigned, since
5854 those overflows are defined. So we only check for SIGN_EXTEND and
5857 If we cannot find a biv, we return 0. */
5860 basic_induction_var (x, mode, dest_reg, p, inc_val, mult_val, location)
5862 enum machine_mode mode;
5869 register enum rtx_code code;
5873 code = GET_CODE (x);
5877 if (rtx_equal_p (XEXP (x, 0), dest_reg)
5878 || (GET_CODE (XEXP (x, 0)) == SUBREG
5879 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
5880 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
5882 argp = &XEXP (x, 1);
5884 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
5885 || (GET_CODE (XEXP (x, 1)) == SUBREG
5886 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
5887 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
5889 argp = &XEXP (x, 0);
5895 if (invariant_p (arg) != 1)
5898 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
5899 *mult_val = const1_rtx;
5904 /* If this is a SUBREG for a promoted variable, check the inner
5906 if (SUBREG_PROMOTED_VAR_P (x))
5907 return basic_induction_var (SUBREG_REG (x), GET_MODE (SUBREG_REG (x)),
5908 dest_reg, p, inc_val, mult_val, location);
5912 /* If this register is assigned in a previous insn, look at its
5913 source, but don't go outside the loop or past a label. */
5919 insn = PREV_INSN (insn);
5920 } while (insn && GET_CODE (insn) == NOTE
5921 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5925 set = single_set (insn);
5929 if ((SET_DEST (set) == x
5930 || (GET_CODE (SET_DEST (set)) == SUBREG
5931 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set)))
5933 && SUBREG_REG (SET_DEST (set)) == x))
5934 && basic_induction_var (SET_SRC (set),
5935 (GET_MODE (SET_SRC (set)) == VOIDmode
5937 : GET_MODE (SET_SRC (set))),
5939 inc_val, mult_val, location))
5942 /* ... fall through ... */
5944 /* Can accept constant setting of biv only when inside inner most loop.
5945 Otherwise, a biv of an inner loop may be incorrectly recognized
5946 as a biv of the outer loop,
5947 causing code to be moved INTO the inner loop. */
5949 if (invariant_p (x) != 1)
5954 /* convert_modes aborts if we try to convert to or from CCmode, so just
5955 exclude that case. It is very unlikely that a condition code value
5956 would be a useful iterator anyways. */
5957 if (loops_enclosed == 1
5958 && GET_MODE_CLASS (mode) != MODE_CC
5959 && GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
5961 /* Possible bug here? Perhaps we don't know the mode of X. */
5962 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
5963 *mult_val = const0_rtx;
5970 return basic_induction_var (XEXP (x, 0), GET_MODE (XEXP (x, 0)),
5971 dest_reg, p, inc_val, mult_val, location);
5974 /* Similar, since this can be a sign extension. */
5975 for (insn = PREV_INSN (p);
5976 (insn && GET_CODE (insn) == NOTE
5977 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5978 insn = PREV_INSN (insn))
5982 set = single_set (insn);
5984 if (set && SET_DEST (set) == XEXP (x, 0)
5985 && GET_CODE (XEXP (x, 1)) == CONST_INT
5986 && INTVAL (XEXP (x, 1)) >= 0
5987 && GET_CODE (SET_SRC (set)) == ASHIFT
5988 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
5989 return basic_induction_var (XEXP (SET_SRC (set), 0),
5990 GET_MODE (XEXP (x, 0)),
5991 dest_reg, insn, inc_val, mult_val,
6000 /* A general induction variable (giv) is any quantity that is a linear
6001 function of a basic induction variable,
6002 i.e. giv = biv * mult_val + add_val.
6003 The coefficients can be any loop invariant quantity.
6004 A giv need not be computed directly from the biv;
6005 it can be computed by way of other givs. */
6007 /* Determine whether X computes a giv.
6008 If it does, return a nonzero value
6009 which is the benefit from eliminating the computation of X;
6010 set *SRC_REG to the register of the biv that it is computed from;
6011 set *ADD_VAL and *MULT_VAL to the coefficients,
6012 such that the value of X is biv * mult + add; */
6015 general_induction_var (x, src_reg, add_val, mult_val, is_addr, pbenefit)
6026 /* If this is an invariant, forget it, it isn't a giv. */
6027 if (invariant_p (x) == 1)
6030 /* See if the expression could be a giv and get its form.
6031 Mark our place on the obstack in case we don't find a giv. */
6032 storage = (char *) oballoc (0);
6034 x = simplify_giv_expr (x, pbenefit);
6041 switch (GET_CODE (x))
6045 /* Since this is now an invariant and wasn't before, it must be a giv
6046 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6048 *src_reg = loop_iv_list->biv->dest_reg;
6049 *mult_val = const0_rtx;
6054 /* This is equivalent to a BIV. */
6056 *mult_val = const1_rtx;
6057 *add_val = const0_rtx;
6061 /* Either (plus (biv) (invar)) or
6062 (plus (mult (biv) (invar_1)) (invar_2)). */
6063 if (GET_CODE (XEXP (x, 0)) == MULT)
6065 *src_reg = XEXP (XEXP (x, 0), 0);
6066 *mult_val = XEXP (XEXP (x, 0), 1);
6070 *src_reg = XEXP (x, 0);
6071 *mult_val = const1_rtx;
6073 *add_val = XEXP (x, 1);
6077 /* ADD_VAL is zero. */
6078 *src_reg = XEXP (x, 0);
6079 *mult_val = XEXP (x, 1);
6080 *add_val = const0_rtx;
6087 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6088 unless they are CONST_INT). */
6089 if (GET_CODE (*add_val) == USE)
6090 *add_val = XEXP (*add_val, 0);
6091 if (GET_CODE (*mult_val) == USE)
6092 *mult_val = XEXP (*mult_val, 0);
6097 *pbenefit += ADDRESS_COST (orig_x) - reg_address_cost;
6099 *pbenefit += rtx_cost (orig_x, MEM) - reg_address_cost;
6103 *pbenefit += rtx_cost (orig_x, SET);
6105 /* Always return true if this is a giv so it will be detected as such,
6106 even if the benefit is zero or negative. This allows elimination
6107 of bivs that might otherwise not be eliminated. */
6111 /* Given an expression, X, try to form it as a linear function of a biv.
6112 We will canonicalize it to be of the form
6113 (plus (mult (BIV) (invar_1))
6115 with possible degeneracies.
6117 The invariant expressions must each be of a form that can be used as a
6118 machine operand. We surround then with a USE rtx (a hack, but localized
6119 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6120 routine; it is the caller's responsibility to strip them.
6122 If no such canonicalization is possible (i.e., two biv's are used or an
6123 expression that is neither invariant nor a biv or giv), this routine
6126 For a non-zero return, the result will have a code of CONST_INT, USE,
6127 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6129 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6131 static rtx sge_plus PROTO ((enum machine_mode, rtx, rtx));
6132 static rtx sge_plus_constant PROTO ((rtx, rtx));
6135 simplify_giv_expr (x, benefit)
6139 enum machine_mode mode = GET_MODE (x);
6143 /* If this is not an integer mode, or if we cannot do arithmetic in this
6144 mode, this can't be a giv. */
6145 if (mode != VOIDmode
6146 && (GET_MODE_CLASS (mode) != MODE_INT
6147 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
6150 switch (GET_CODE (x))
6153 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
6154 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
6155 if (arg0 == 0 || arg1 == 0)
6158 /* Put constant last, CONST_INT last if both constant. */
6159 if ((GET_CODE (arg0) == USE
6160 || GET_CODE (arg0) == CONST_INT)
6161 && ! ((GET_CODE (arg0) == USE
6162 && GET_CODE (arg1) == USE)
6163 || GET_CODE (arg1) == CONST_INT))
6164 tem = arg0, arg0 = arg1, arg1 = tem;
6166 /* Handle addition of zero, then addition of an invariant. */
6167 if (arg1 == const0_rtx)
6169 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
6170 switch (GET_CODE (arg0))
6174 /* Adding two invariants must result in an invariant, so enclose
6175 addition operation inside a USE and return it. */
6176 if (GET_CODE (arg0) == USE)
6177 arg0 = XEXP (arg0, 0);
6178 if (GET_CODE (arg1) == USE)
6179 arg1 = XEXP (arg1, 0);
6181 if (GET_CODE (arg0) == CONST_INT)
6182 tem = arg0, arg0 = arg1, arg1 = tem;
6183 if (GET_CODE (arg1) == CONST_INT)
6184 tem = sge_plus_constant (arg0, arg1);
6186 tem = sge_plus (mode, arg0, arg1);
6188 if (GET_CODE (tem) != CONST_INT)
6189 tem = gen_rtx_USE (mode, tem);
6194 /* biv + invar or mult + invar. Return sum. */
6195 return gen_rtx_PLUS (mode, arg0, arg1);
6198 /* (a + invar_1) + invar_2. Associate. */
6199 return simplify_giv_expr (
6200 gen_rtx_PLUS (mode, XEXP (arg0, 0),
6201 gen_rtx_PLUS (mode, XEXP (arg0, 1), arg1)),
6208 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6209 MULT to reduce cases. */
6210 if (GET_CODE (arg0) == REG)
6211 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
6212 if (GET_CODE (arg1) == REG)
6213 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
6215 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6216 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6217 Recurse to associate the second PLUS. */
6218 if (GET_CODE (arg1) == MULT)
6219 tem = arg0, arg0 = arg1, arg1 = tem;
6221 if (GET_CODE (arg1) == PLUS)
6222 return simplify_giv_expr (gen_rtx_PLUS (mode,
6223 gen_rtx_PLUS (mode, arg0,
6228 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6229 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
6232 if (!rtx_equal_p (arg0, arg1))
6235 return simplify_giv_expr (gen_rtx_MULT (mode,
6243 /* Handle "a - b" as "a + b * (-1)". */
6244 return simplify_giv_expr (gen_rtx_PLUS (mode,
6246 gen_rtx_MULT (mode, XEXP (x, 1),
6251 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
6252 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
6253 if (arg0 == 0 || arg1 == 0)
6256 /* Put constant last, CONST_INT last if both constant. */
6257 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
6258 && GET_CODE (arg1) != CONST_INT)
6259 tem = arg0, arg0 = arg1, arg1 = tem;
6261 /* If second argument is not now constant, not giv. */
6262 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
6265 /* Handle multiply by 0 or 1. */
6266 if (arg1 == const0_rtx)
6269 else if (arg1 == const1_rtx)
6272 switch (GET_CODE (arg0))
6275 /* biv * invar. Done. */
6276 return gen_rtx_MULT (mode, arg0, arg1);
6279 /* Product of two constants. */
6280 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6283 /* invar * invar. It is a giv, but very few of these will
6284 actually pay off, so limit to simple registers. */
6285 if (GET_CODE (arg1) != CONST_INT)
6288 arg0 = XEXP (arg0, 0);
6289 if (GET_CODE (arg0) == REG)
6290 tem = gen_rtx_MULT (mode, arg0, arg1);
6291 else if (GET_CODE (arg0) == MULT
6292 && GET_CODE (XEXP (arg0, 0)) == REG
6293 && GET_CODE (XEXP (arg0, 1)) == CONST_INT)
6295 tem = gen_rtx_MULT (mode, XEXP (arg0, 0),
6296 GEN_INT (INTVAL (XEXP (arg0, 1))
6301 return gen_rtx_USE (mode, tem);
6304 /* (a * invar_1) * invar_2. Associate. */
6305 return simplify_giv_expr (gen_rtx_MULT (mode, XEXP (arg0, 0),
6312 /* (a + invar_1) * invar_2. Distribute. */
6313 return simplify_giv_expr (gen_rtx_PLUS (mode,
6327 /* Shift by constant is multiply by power of two. */
6328 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6331 return simplify_giv_expr (gen_rtx_MULT (mode,
6333 GEN_INT ((HOST_WIDE_INT) 1
6334 << INTVAL (XEXP (x, 1)))),
6338 /* "-a" is "a * (-1)" */
6339 return simplify_giv_expr (gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6343 /* "~a" is "-a - 1". Silly, but easy. */
6344 return simplify_giv_expr (gen_rtx_MINUS (mode,
6345 gen_rtx_NEG (mode, XEXP (x, 0)),
6350 /* Already in proper form for invariant. */
6354 /* If this is a new register, we can't deal with it. */
6355 if (REGNO (x) >= max_reg_before_loop)
6358 /* Check for biv or giv. */
6359 switch (REG_IV_TYPE (REGNO (x)))
6363 case GENERAL_INDUCT:
6365 struct induction *v = REG_IV_INFO (REGNO (x));
6367 /* Form expression from giv and add benefit. Ensure this giv
6368 can derive another and subtract any needed adjustment if so. */
6369 *benefit += v->benefit;
6373 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode, v->src_reg,
6376 if (v->derive_adjustment)
6377 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6378 return simplify_giv_expr (tem, benefit);
6382 /* If it isn't an induction variable, and it is invariant, we
6383 may be able to simplify things further by looking through
6384 the bits we just moved outside the loop. */
6385 if (invariant_p (x) == 1)
6389 for (m = the_movables; m ; m = m->next)
6390 if (rtx_equal_p (x, m->set_dest))
6392 /* Ok, we found a match. Substitute and simplify. */
6394 /* If we match another movable, we must use that, as
6395 this one is going away. */
6397 return simplify_giv_expr (m->match->set_dest, benefit);
6399 /* If consec is non-zero, this is a member of a group of
6400 instructions that were moved together. We handle this
6401 case only to the point of seeking to the last insn and
6402 looking for a REG_EQUAL. Fail if we don't find one. */
6407 do { tem = NEXT_INSN (tem); } while (--i > 0);
6409 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6411 tem = XEXP (tem, 0);
6415 tem = single_set (m->insn);
6417 tem = SET_SRC (tem);
6422 /* What we are most interested in is pointer
6423 arithmetic on invariants -- only take
6424 patterns we may be able to do something with. */
6425 if (GET_CODE (tem) == PLUS
6426 || GET_CODE (tem) == MULT
6427 || GET_CODE (tem) == ASHIFT
6428 || GET_CODE (tem) == CONST_INT
6429 || GET_CODE (tem) == SYMBOL_REF)
6431 tem = simplify_giv_expr (tem, benefit);
6435 else if (GET_CODE (tem) == CONST
6436 && GET_CODE (XEXP (tem, 0)) == PLUS
6437 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6438 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6440 tem = simplify_giv_expr (XEXP (tem, 0), benefit);
6451 /* Fall through to general case. */
6453 /* If invariant, return as USE (unless CONST_INT).
6454 Otherwise, not giv. */
6455 if (GET_CODE (x) == USE)
6458 if (invariant_p (x) == 1)
6460 if (GET_CODE (x) == CONST_INT)
6462 if (GET_CODE (x) == CONST
6463 && GET_CODE (XEXP (x, 0)) == PLUS
6464 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6465 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6467 return gen_rtx_USE (mode, x);
6474 /* This routine folds invariants such that there is only ever one
6475 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6478 sge_plus_constant (x, c)
6481 if (GET_CODE (x) == CONST_INT)
6482 return GEN_INT (INTVAL (x) + INTVAL (c));
6483 else if (GET_CODE (x) != PLUS)
6484 return gen_rtx_PLUS (GET_MODE (x), x, c);
6485 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6487 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6488 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6490 else if (GET_CODE (XEXP (x, 0)) == PLUS
6491 || GET_CODE (XEXP (x, 1)) != PLUS)
6493 return gen_rtx_PLUS (GET_MODE (x),
6494 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6498 return gen_rtx_PLUS (GET_MODE (x),
6499 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6504 sge_plus (mode, x, y)
6505 enum machine_mode mode;
6508 while (GET_CODE (y) == PLUS)
6510 rtx a = XEXP (y, 0);
6511 if (GET_CODE (a) == CONST_INT)
6512 x = sge_plus_constant (x, a);
6514 x = gen_rtx_PLUS (mode, x, a);
6517 if (GET_CODE (y) == CONST_INT)
6518 x = sge_plus_constant (x, y);
6520 x = gen_rtx_PLUS (mode, x, y);
6524 /* Help detect a giv that is calculated by several consecutive insns;
6528 The caller has already identified the first insn P as having a giv as dest;
6529 we check that all other insns that set the same register follow
6530 immediately after P, that they alter nothing else,
6531 and that the result of the last is still a giv.
6533 The value is 0 if the reg set in P is not really a giv.
6534 Otherwise, the value is the amount gained by eliminating
6535 all the consecutive insns that compute the value.
6537 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6538 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6540 The coefficients of the ultimate giv value are stored in
6541 *MULT_VAL and *ADD_VAL. */
6544 consec_sets_giv (first_benefit, p, src_reg, dest_reg,
6545 add_val, mult_val, last_consec_insn)
6552 rtx *last_consec_insn;
6560 /* Indicate that this is a giv so that we can update the value produced in
6561 each insn of the multi-insn sequence.
6563 This induction structure will be used only by the call to
6564 general_induction_var below, so we can allocate it on our stack.
6565 If this is a giv, our caller will replace the induct var entry with
6566 a new induction structure. */
6568 = (struct induction *) alloca (sizeof (struct induction));
6569 v->src_reg = src_reg;
6570 v->mult_val = *mult_val;
6571 v->add_val = *add_val;
6572 v->benefit = first_benefit;
6574 v->derive_adjustment = 0;
6576 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
6577 REG_IV_INFO (REGNO (dest_reg)) = v;
6579 count = VARRAY_INT (n_times_set, REGNO (dest_reg)) - 1;
6584 code = GET_CODE (p);
6586 /* If libcall, skip to end of call sequence. */
6587 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6591 && (set = single_set (p))
6592 && GET_CODE (SET_DEST (set)) == REG
6593 && SET_DEST (set) == dest_reg
6594 && (general_induction_var (SET_SRC (set), &src_reg,
6595 add_val, mult_val, 0, &benefit)
6596 /* Giv created by equivalent expression. */
6597 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6598 && general_induction_var (XEXP (temp, 0), &src_reg,
6599 add_val, mult_val, 0, &benefit)))
6600 && src_reg == v->src_reg)
6602 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6603 benefit += libcall_benefit (p);
6606 v->mult_val = *mult_val;
6607 v->add_val = *add_val;
6608 v->benefit = benefit;
6610 else if (code != NOTE)
6612 /* Allow insns that set something other than this giv to a
6613 constant. Such insns are needed on machines which cannot
6614 include long constants and should not disqualify a giv. */
6616 && (set = single_set (p))
6617 && SET_DEST (set) != dest_reg
6618 && CONSTANT_P (SET_SRC (set)))
6621 REG_IV_TYPE (REGNO (dest_reg)) = UNKNOWN_INDUCT;
6626 *last_consec_insn = p;
6630 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6631 represented by G1. If no such expression can be found, or it is clear that
6632 it cannot possibly be a valid address, 0 is returned.
6634 To perform the computation, we note that
6637 where `v' is the biv.
6639 So G2 = (y/b) * G1 + (b - a*y/x).
6641 Note that MULT = y/x.
6643 Update: A and B are now allowed to be additive expressions such that
6644 B contains all variables in A. That is, computing B-A will not require
6645 subtracting variables. */
6648 express_from_1 (a, b, mult)
6651 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6653 if (mult == const0_rtx)
6656 /* If MULT is not 1, we cannot handle A with non-constants, since we
6657 would then be required to subtract multiples of the registers in A.
6658 This is theoretically possible, and may even apply to some Fortran
6659 constructs, but it is a lot of work and we do not attempt it here. */
6661 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
6664 /* In general these structures are sorted top to bottom (down the PLUS
6665 chain), but not left to right across the PLUS. If B is a higher
6666 order giv than A, we can strip one level and recurse. If A is higher
6667 order, we'll eventually bail out, but won't know that until the end.
6668 If they are the same, we'll strip one level around this loop. */
6670 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
6672 rtx ra, rb, oa, ob, tmp;
6674 ra = XEXP (a, 0), oa = XEXP (a, 1);
6675 if (GET_CODE (ra) == PLUS)
6676 tmp = ra, ra = oa, oa = tmp;
6678 rb = XEXP (b, 0), ob = XEXP (b, 1);
6679 if (GET_CODE (rb) == PLUS)
6680 tmp = rb, rb = ob, ob = tmp;
6682 if (rtx_equal_p (ra, rb))
6683 /* We matched: remove one reg completely. */
6685 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
6686 /* An alternate match. */
6688 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
6689 /* An alternate match. */
6693 /* Indicates an extra register in B. Strip one level from B and
6694 recurse, hoping B was the higher order expression. */
6695 ob = express_from_1 (a, ob, mult);
6698 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
6702 /* Here we are at the last level of A, go through the cases hoping to
6703 get rid of everything but a constant. */
6705 if (GET_CODE (a) == PLUS)
6709 ra = XEXP (a, 0), oa = XEXP (a, 1);
6710 if (rtx_equal_p (oa, b))
6712 else if (!rtx_equal_p (ra, b))
6715 if (GET_CODE (oa) != CONST_INT)
6718 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
6720 else if (GET_CODE (a) == CONST_INT)
6722 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
6724 else if (GET_CODE (b) == PLUS)
6726 if (rtx_equal_p (a, XEXP (b, 0)))
6728 else if (rtx_equal_p (a, XEXP (b, 1)))
6733 else if (rtx_equal_p (a, b))
6740 express_from (g1, g2)
6741 struct induction *g1, *g2;
6745 /* The value that G1 will be multiplied by must be a constant integer. Also,
6746 the only chance we have of getting a valid address is if b*c/a (see above
6747 for notation) is also an integer. */
6748 if (GET_CODE (g1->mult_val) == CONST_INT
6749 && GET_CODE (g2->mult_val) == CONST_INT)
6751 if (g1->mult_val == const0_rtx
6752 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
6754 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
6756 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
6760 /* ??? Find out if the one is a multiple of the other? */
6764 add = express_from_1 (g1->add_val, g2->add_val, mult);
6765 if (add == NULL_RTX)
6768 /* Form simplified final result. */
6769 if (mult == const0_rtx)
6771 else if (mult == const1_rtx)
6772 mult = g1->dest_reg;
6774 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
6776 if (add == const0_rtx)
6780 if (GET_CODE (add) == PLUS
6781 && CONSTANT_P (XEXP (add, 1)))
6783 rtx tem = XEXP (add, 1);
6784 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
6788 return gen_rtx_PLUS (g2->mode, mult, add);
6793 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6794 represented by G1. This indicates that G2 should be combined with G1 and
6795 that G2 can use (either directly or via an address expression) a register
6796 used to represent G1. */
6799 combine_givs_p (g1, g2)
6800 struct induction *g1, *g2;
6802 rtx tem = express_from (g1, g2);
6804 /* If these givs are identical, they can be combined. We use the results
6805 of express_from because the addends are not in a canonical form, so
6806 rtx_equal_p is a weaker test. */
6807 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
6808 combination to be the other way round. */
6809 if (tem == g1->dest_reg
6810 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
6812 return g1->dest_reg;
6815 /* If G2 can be expressed as a function of G1 and that function is valid
6816 as an address and no more expensive than using a register for G2,
6817 the expression of G2 in terms of G1 can be used. */
6819 && g2->giv_type == DEST_ADDR
6820 && memory_address_p (g2->mem_mode, tem)
6821 /* ??? Looses, especially with -fforce-addr, where *g2->location
6822 will always be a register, and so anything more complicated
6826 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
6828 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
6839 struct combine_givs_stats
6846 cmp_combine_givs_stats (x, y)
6847 struct combine_givs_stats *x, *y;
6850 d = y->total_benefit - x->total_benefit;
6851 /* Stabilize the sort. */
6853 d = x->giv_number - y->giv_number;
6857 /* Check all pairs of givs for iv_class BL and see if any can be combined with
6858 any other. If so, point SAME to the giv combined with and set NEW_REG to
6859 be an expression (in terms of the other giv's DEST_REG) equivalent to the
6860 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
6864 struct iv_class *bl;
6866 /* Additional benefit to add for being combined multiple times. */
6867 const int extra_benefit = 3;
6869 struct induction *g1, *g2, **giv_array;
6870 int i, j, k, giv_count;
6871 struct combine_givs_stats *stats;
6874 /* Count givs, because bl->giv_count is incorrect here. */
6876 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6881 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
6883 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6885 giv_array[i++] = g1;
6887 stats = (struct combine_givs_stats *) alloca (giv_count * sizeof (*stats));
6888 bzero ((char *) stats, giv_count * sizeof (*stats));
6890 can_combine = (rtx *) alloca (giv_count * giv_count * sizeof(rtx));
6891 bzero ((char *) can_combine, giv_count * giv_count * sizeof(rtx));
6893 for (i = 0; i < giv_count; i++)
6899 stats[i].giv_number = i;
6901 /* If a DEST_REG GIV is used only once, do not allow it to combine
6902 with anything, for in doing so we will gain nothing that cannot
6903 be had by simply letting the GIV with which we would have combined
6904 to be reduced on its own. The losage shows up in particular with
6905 DEST_ADDR targets on hosts with reg+reg addressing, though it can
6906 be seen elsewhere as well. */
6907 if (g1->giv_type == DEST_REG
6908 && (single_use = VARRAY_RTX (reg_single_usage, REGNO (g1->dest_reg)))
6909 && single_use != const0_rtx)
6912 this_benefit = g1->benefit;
6913 /* Add an additional weight for zero addends. */
6914 if (g1->no_const_addval)
6917 for (j = 0; j < giv_count; j++)
6923 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
6925 can_combine[i*giv_count + j] = this_combine;
6926 this_benefit += g2->benefit + extra_benefit;
6929 stats[i].total_benefit = this_benefit;
6932 /* Iterate, combining until we can't. */
6934 qsort (stats, giv_count, sizeof(*stats), cmp_combine_givs_stats);
6936 if (loop_dump_stream)
6938 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
6939 for (k = 0; k < giv_count; k++)
6941 g1 = giv_array[stats[k].giv_number];
6942 if (!g1->combined_with && !g1->same)
6943 fprintf (loop_dump_stream, " {%d, %d}",
6944 INSN_UID (giv_array[stats[k].giv_number]->insn),
6945 stats[k].total_benefit);
6947 putc ('\n', loop_dump_stream);
6950 for (k = 0; k < giv_count; k++)
6952 int g1_add_benefit = 0;
6954 i = stats[k].giv_number;
6957 /* If it has already been combined, skip. */
6958 if (g1->combined_with || g1->same)
6961 for (j = 0; j < giv_count; j++)
6964 if (g1 != g2 && can_combine[i*giv_count + j]
6965 /* If it has already been combined, skip. */
6966 && ! g2->same && ! g2->combined_with)
6970 g2->new_reg = can_combine[i*giv_count + j];
6972 g1->combined_with++;
6973 g1->lifetime += g2->lifetime;
6975 g1_add_benefit += g2->benefit;
6977 /* ??? The new final_[bg]iv_value code does a much better job
6978 of finding replaceable giv's, and hence this code may no
6979 longer be necessary. */
6980 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
6981 g1_add_benefit -= copy_cost;
6983 /* To help optimize the next set of combinations, remove
6984 this giv from the benefits of other potential mates. */
6985 for (l = 0; l < giv_count; ++l)
6987 int m = stats[l].giv_number;
6988 if (can_combine[m*giv_count + j])
6989 stats[l].total_benefit -= g2->benefit + extra_benefit;
6992 if (loop_dump_stream)
6993 fprintf (loop_dump_stream,
6994 "giv at %d combined with giv at %d\n",
6995 INSN_UID (g2->insn), INSN_UID (g1->insn));
6999 /* To help optimize the next set of combinations, remove
7000 this giv from the benefits of other potential mates. */
7001 if (g1->combined_with)
7003 for (j = 0; j < giv_count; ++j)
7005 int m = stats[j].giv_number;
7006 if (can_combine[m*giv_count + j])
7007 stats[j].total_benefit -= g1->benefit + extra_benefit;
7010 g1->benefit += g1_add_benefit;
7012 /* We've finished with this giv, and everything it touched.
7013 Restart the combination so that proper weights for the
7014 rest of the givs are properly taken into account. */
7015 /* ??? Ideally we would compact the arrays at this point, so
7016 as to not cover old ground. But sanely compacting
7017 can_combine is tricky. */
7023 struct recombine_givs_stats
7026 int start_luid, end_luid;
7029 /* Used below as comparison function for qsort. We want a ascending luid
7030 when scanning the array starting at the end, thus the arguments are
7033 cmp_recombine_givs_stats (x, y)
7034 struct recombine_givs_stats *x, *y;
7037 d = y->start_luid - x->start_luid;
7038 /* Stabilize the sort. */
7040 d = y->giv_number - x->giv_number;
7044 /* Scan X, which is a part of INSN, for the end of life of a giv. Also
7045 look for the start of life of a giv where the start has not been seen
7046 yet to unlock the search for the end of its life.
7047 Only consider givs that belong to BIV.
7048 Return the total number of lifetime ends that have been found. */
7050 find_life_end (x, stats, insn, biv)
7052 struct recombine_givs_stats *stats;
7059 code = GET_CODE (x);
7064 rtx reg = SET_DEST (x);
7065 if (GET_CODE (reg) == REG)
7067 int regno = REGNO (reg);
7068 struct induction *v = REG_IV_INFO (regno);
7070 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7072 && v->src_reg == biv
7073 && stats[v->ix].end_luid <= 0)
7075 /* If we see a 0 here for end_luid, it means that we have
7076 scanned the entire loop without finding any use at all.
7077 We must not predicate this code on a start_luid match
7078 since that would make the test fail for givs that have
7079 been hoisted out of inner loops. */
7080 if (stats[v->ix].end_luid == 0)
7082 stats[v->ix].end_luid = stats[v->ix].start_luid;
7083 return 1 + find_life_end (SET_SRC (x), stats, insn, biv);
7085 else if (stats[v->ix].start_luid == INSN_LUID (insn))
7086 stats[v->ix].end_luid = 0;
7088 return find_life_end (SET_SRC (x), stats, insn, biv);
7094 int regno = REGNO (x);
7095 struct induction *v = REG_IV_INFO (regno);
7097 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7099 && v->src_reg == biv
7100 && stats[v->ix].end_luid == 0)
7102 while (INSN_UID (insn) >= max_uid_for_loop)
7103 insn = NEXT_INSN (insn);
7104 stats[v->ix].end_luid = INSN_LUID (insn);
7117 fmt = GET_RTX_FORMAT (code);
7119 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7122 retval += find_life_end (XEXP (x, i), stats, insn, biv);
7124 else if (fmt[i] == 'E')
7125 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7126 retval += find_life_end (XVECEXP (x, i, j), stats, insn, biv);
7131 /* For each giv that has been combined with another, look if
7132 we can combine it with the most recently used one instead.
7133 This tends to shorten giv lifetimes, and helps the next step:
7134 try to derive givs from other givs. */
7136 recombine_givs (bl, loop_start, loop_end, unroll_p)
7137 struct iv_class *bl;
7138 rtx loop_start, loop_end;
7141 struct induction *v, **giv_array, *last_giv;
7142 struct recombine_givs_stats *stats;
7145 int ends_need_computing;
7147 for (giv_count = 0, v = bl->giv; v; v = v->next_iv)
7153 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
7154 stats = (struct recombine_givs_stats *) alloca (giv_count * sizeof *stats);
7156 /* Initialize stats and set up the ix field for each giv in stats to name
7157 the corresponding index into stats. */
7158 for (i = 0, v = bl->giv; v; v = v->next_iv)
7165 stats[i].giv_number = i;
7166 /* If this giv has been hoisted out of an inner loop, use the luid of
7167 the previous insn. */
7168 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7170 stats[i].start_luid = INSN_LUID (p);
7175 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7177 /* Do the actual most-recently-used recombination. */
7178 for (last_giv = 0, i = giv_count - 1; i >= 0; i--)
7180 v = giv_array[stats[i].giv_number];
7183 struct induction *old_same = v->same;
7186 /* combine_givs_p actually says if we can make this transformation.
7187 The other tests are here only to avoid keeping a giv alive
7188 that could otherwise be eliminated. */
7190 && ((old_same->maybe_dead && ! old_same->combined_with)
7191 || ! last_giv->maybe_dead
7192 || last_giv->combined_with)
7193 && (new_combine = combine_givs_p (last_giv, v)))
7195 old_same->combined_with--;
7196 v->new_reg = new_combine;
7198 last_giv->combined_with++;
7199 /* No need to update lifetimes / benefits here since we have
7200 already decided what to reduce. */
7202 if (loop_dump_stream)
7204 fprintf (loop_dump_stream,
7205 "giv at %d recombined with giv at %d as ",
7206 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7207 print_rtl (loop_dump_stream, v->new_reg);
7208 putc ('\n', loop_dump_stream);
7214 else if (v->giv_type != DEST_REG)
7217 || (last_giv->maybe_dead && ! last_giv->combined_with)
7219 || v->combined_with)
7223 ends_need_computing = 0;
7224 /* For each DEST_REG giv, compute lifetime starts, and try to compute
7225 lifetime ends from regscan info. */
7226 for (i = 0, v = bl->giv; v; v = v->next_iv)
7230 if (v->giv_type == DEST_ADDR)
7232 /* Loop unrolling of an inner loop can even create new DEST_REG
7235 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7237 stats[i].start_luid = stats[i].end_luid = INSN_LUID (p);
7239 stats[i].end_luid++;
7241 else /* v->giv_type == DEST_REG */
7245 stats[i].start_luid = INSN_LUID (v->insn);
7246 stats[i].end_luid = INSN_LUID (v->last_use);
7248 else if (INSN_UID (v->insn) >= max_uid_for_loop)
7251 /* This insn has been created by loop optimization on an inner
7252 loop. We don't have a proper start_luid that will match
7253 when we see the first set. But we do know that there will
7254 be no use before the set, so we can set end_luid to 0 so that
7255 we'll start looking for the last use right away. */
7256 for (p = PREV_INSN (v->insn); INSN_UID (p) >= max_uid_for_loop; )
7258 stats[i].start_luid = INSN_LUID (p);
7259 stats[i].end_luid = 0;
7260 ends_need_computing++;
7264 int regno = REGNO (v->dest_reg);
7265 int count = VARRAY_INT (n_times_set, regno) - 1;
7268 /* Find the first insn that sets the giv, so that we can verify
7269 if this giv's lifetime wraps around the loop. We also need
7270 the luid of the first setting insn in order to detect the
7271 last use properly. */
7274 p = prev_nonnote_insn (p);
7275 if (reg_set_p (v->dest_reg, p))
7279 stats[i].start_luid = INSN_LUID (p);
7280 if (stats[i].start_luid > uid_luid[REGNO_FIRST_UID (regno)])
7282 stats[i].end_luid = -1;
7283 ends_need_computing++;
7287 stats[i].end_luid = uid_luid[REGNO_LAST_UID (regno)];
7288 if (stats[i].end_luid > INSN_LUID (loop_end))
7290 stats[i].end_luid = -1;
7291 ends_need_computing++;
7299 /* If the regscan information was unconclusive for one or more DEST_REG
7300 givs, scan the all insn in the loop to find out lifetime ends. */
7301 if (ends_need_computing)
7303 rtx biv = bl->biv->src_reg;
7308 if (p == loop_start)
7311 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
7313 ends_need_computing -= find_life_end (PATTERN (p), stats, p, biv);
7315 while (ends_need_computing);
7318 /* Set start_luid back to the last insn that sets the giv. This allows
7319 more combinations. */
7320 for (i = 0, v = bl->giv; v; v = v->next_iv)
7324 if (INSN_UID (v->insn) < max_uid_for_loop)
7325 stats[i].start_luid = INSN_LUID (v->insn);
7329 /* Now adjust lifetime ends by taking combined givs into account. */
7330 for (i = 0, v = bl->giv; v; v = v->next_iv)
7337 if (v->same && ! v->same->ignore)
7340 luid = stats[i].start_luid;
7341 /* Use unsigned arithmetic to model loop wrap-around. */
7342 if (luid - stats[j].start_luid
7343 > (unsigned) stats[j].end_luid - stats[j].start_luid)
7344 stats[j].end_luid = luid;
7349 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7351 /* Try to derive DEST_REG givs from previous DEST_REG givs with the
7352 same mult_val and non-overlapping lifetime. This reduces register
7354 Once we find a DEST_REG giv that is suitable to derive others from,
7355 we set last_giv to this giv, and try to derive as many other DEST_REG
7356 givs from it without joining overlapping lifetimes. If we then
7357 encounter a DEST_REG giv that we can't derive, we set rescan to the
7358 index for this giv (unless rescan is already set).
7359 When we are finished with the current LAST_GIV (i.e. the inner loop
7360 terminates), we start again with rescan, which then becomes the new
7362 for (i = giv_count - 1; i >= 0; i = rescan)
7364 int life_start, life_end;
7366 for (last_giv = 0, rescan = -1; i >= 0; i--)
7370 v = giv_array[stats[i].giv_number];
7371 if (v->giv_type != DEST_REG || v->derived_from || v->same)
7375 /* Don't use a giv that's likely to be dead to derive
7376 others - that would be likely to keep that giv alive. */
7377 if (! v->maybe_dead || v->combined_with)
7380 life_start = stats[i].start_luid;
7381 life_end = stats[i].end_luid;
7385 /* Use unsigned arithmetic to model loop wrap around. */
7386 if (((unsigned) stats[i].start_luid - life_start
7387 >= (unsigned) life_end - life_start)
7388 && ((unsigned) stats[i].end_luid - life_start
7389 > (unsigned) life_end - life_start)
7390 /* Check that the giv insn we're about to use for deriving
7391 precedes all uses of that giv. Note that initializing the
7392 derived giv would defeat the purpose of reducing register
7394 ??? We could arrange to move the insn. */
7395 && ((unsigned) stats[i].end_luid - INSN_LUID (loop_start)
7396 > (unsigned) stats[i].start_luid - INSN_LUID (loop_start))
7397 && rtx_equal_p (last_giv->mult_val, v->mult_val)
7398 /* ??? Could handle libcalls, but would need more logic. */
7399 && ! find_reg_note (v->insn, REG_RETVAL, NULL_RTX)
7400 /* We would really like to know if for any giv that v
7401 is combined with, v->insn or any intervening biv increment
7402 dominates that combined giv. However, we
7403 don't have this detailed control flow information.
7404 N.B. since last_giv will be reduced, it is valid
7405 anywhere in the loop, so we don't need to check the
7406 validity of last_giv.
7407 We rely here on the fact that v->always_executed implies that
7408 there is no jump to someplace else in the loop before the
7409 giv insn, and hence any insn that is executed before the
7410 giv insn in the loop will have a lower luid. */
7411 && (v->always_executed || ! v->combined_with)
7412 && (sum = express_from (last_giv, v))
7413 /* Make sure we don't make the add more expensive. ADD_COST
7414 doesn't take different costs of registers and constants into
7415 account, so compare the cost of the actual SET_SRCs. */
7416 && (rtx_cost (sum, SET)
7417 <= rtx_cost (SET_SRC (single_set (v->insn)), SET))
7418 /* ??? unroll can't understand anything but reg + const_int
7419 sums. It would be cleaner to fix unroll. */
7420 && ((GET_CODE (sum) == PLUS
7421 && GET_CODE (XEXP (sum, 0)) == REG
7422 && GET_CODE (XEXP (sum, 1)) == CONST_INT)
7424 && validate_change (v->insn, &PATTERN (v->insn),
7425 gen_rtx_SET (VOIDmode, v->dest_reg, sum), 0))
7427 v->derived_from = last_giv;
7428 life_end = stats[i].end_luid;
7430 if (loop_dump_stream)
7432 fprintf (loop_dump_stream,
7433 "giv at %d derived from %d as ",
7434 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7435 print_rtl (loop_dump_stream, sum);
7436 putc ('\n', loop_dump_stream);
7439 else if (rescan < 0)
7445 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
7448 emit_iv_add_mult (b, m, a, reg, insert_before)
7449 rtx b; /* initial value of basic induction variable */
7450 rtx m; /* multiplicative constant */
7451 rtx a; /* additive constant */
7452 rtx reg; /* destination register */
7458 /* Prevent unexpected sharing of these rtx. */
7462 /* Increase the lifetime of any invariants moved further in code. */
7463 update_reg_last_use (a, insert_before);
7464 update_reg_last_use (b, insert_before);
7465 update_reg_last_use (m, insert_before);
7468 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
7470 emit_move_insn (reg, result);
7471 seq = gen_sequence ();
7474 emit_insn_before (seq, insert_before);
7476 /* It is entirely possible that the expansion created lots of new
7477 registers. Iterate over the sequence we just created and
7480 if (GET_CODE (seq) == SEQUENCE)
7483 for (i = 0; i < XVECLEN (seq, 0); ++i)
7485 rtx set = single_set (XVECEXP (seq, 0, i));
7486 if (set && GET_CODE (SET_DEST (set)) == REG)
7487 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7490 else if (GET_CODE (seq) == SET
7491 && GET_CODE (SET_DEST (seq)) == REG)
7492 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
7495 /* Test whether A * B can be computed without
7496 an actual multiply insn. Value is 1 if so. */
7499 product_cheap_p (a, b)
7505 struct obstack *old_rtl_obstack = rtl_obstack;
7506 char *storage = (char *) obstack_alloc (&temp_obstack, 0);
7509 /* If only one is constant, make it B. */
7510 if (GET_CODE (a) == CONST_INT)
7511 tmp = a, a = b, b = tmp;
7513 /* If first constant, both constant, so don't need multiply. */
7514 if (GET_CODE (a) == CONST_INT)
7517 /* If second not constant, neither is constant, so would need multiply. */
7518 if (GET_CODE (b) != CONST_INT)
7521 /* One operand is constant, so might not need multiply insn. Generate the
7522 code for the multiply and see if a call or multiply, or long sequence
7523 of insns is generated. */
7525 rtl_obstack = &temp_obstack;
7527 expand_mult (GET_MODE (a), a, b, NULL_RTX, 0);
7528 tmp = gen_sequence ();
7531 if (GET_CODE (tmp) == SEQUENCE)
7533 if (XVEC (tmp, 0) == 0)
7535 else if (XVECLEN (tmp, 0) > 3)
7538 for (i = 0; i < XVECLEN (tmp, 0); i++)
7540 rtx insn = XVECEXP (tmp, 0, i);
7542 if (GET_CODE (insn) != INSN
7543 || (GET_CODE (PATTERN (insn)) == SET
7544 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7545 || (GET_CODE (PATTERN (insn)) == PARALLEL
7546 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7547 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7554 else if (GET_CODE (tmp) == SET
7555 && GET_CODE (SET_SRC (tmp)) == MULT)
7557 else if (GET_CODE (tmp) == PARALLEL
7558 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7559 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7562 /* Free any storage we obtained in generating this multiply and restore rtl
7563 allocation to its normal obstack. */
7564 obstack_free (&temp_obstack, storage);
7565 rtl_obstack = old_rtl_obstack;
7570 /* Check to see if loop can be terminated by a "decrement and branch until
7571 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7572 Also try reversing an increment loop to a decrement loop
7573 to see if the optimization can be performed.
7574 Value is nonzero if optimization was performed. */
7576 /* This is useful even if the architecture doesn't have such an insn,
7577 because it might change a loops which increments from 0 to n to a loop
7578 which decrements from n to 0. A loop that decrements to zero is usually
7579 faster than one that increments from zero. */
7581 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7582 such as approx_final_value, biv_total_increment, loop_iterations, and
7583 final_[bg]iv_value. */
7586 check_dbra_loop (loop_end, insn_count, loop_start, loop_info)
7590 struct loop_info *loop_info;
7592 struct iv_class *bl;
7599 rtx before_comparison;
7603 int compare_and_branch;
7605 /* If last insn is a conditional branch, and the insn before tests a
7606 register value, try to optimize it. Otherwise, we can't do anything. */
7608 jump = PREV_INSN (loop_end);
7609 comparison = get_condition_for_loop (jump);
7610 if (comparison == 0)
7613 /* Try to compute whether the compare/branch at the loop end is one or
7614 two instructions. */
7615 get_condition (jump, &first_compare);
7616 if (first_compare == jump)
7617 compare_and_branch = 1;
7618 else if (first_compare == prev_nonnote_insn (jump))
7619 compare_and_branch = 2;
7623 /* Check all of the bivs to see if the compare uses one of them.
7624 Skip biv's set more than once because we can't guarantee that
7625 it will be zero on the last iteration. Also skip if the biv is
7626 used between its update and the test insn. */
7628 for (bl = loop_iv_list; bl; bl = bl->next)
7630 if (bl->biv_count == 1
7631 && bl->biv->dest_reg == XEXP (comparison, 0)
7632 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
7640 /* Look for the case where the basic induction variable is always
7641 nonnegative, and equals zero on the last iteration.
7642 In this case, add a reg_note REG_NONNEG, which allows the
7643 m68k DBRA instruction to be used. */
7645 if (((GET_CODE (comparison) == GT
7646 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
7647 && INTVAL (XEXP (comparison, 1)) == -1)
7648 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
7649 && GET_CODE (bl->biv->add_val) == CONST_INT
7650 && INTVAL (bl->biv->add_val) < 0)
7652 /* Initial value must be greater than 0,
7653 init_val % -dec_value == 0 to ensure that it equals zero on
7654 the last iteration */
7656 if (GET_CODE (bl->initial_value) == CONST_INT
7657 && INTVAL (bl->initial_value) > 0
7658 && (INTVAL (bl->initial_value)
7659 % (-INTVAL (bl->biv->add_val))) == 0)
7661 /* register always nonnegative, add REG_NOTE to branch */
7662 REG_NOTES (PREV_INSN (loop_end))
7663 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7664 REG_NOTES (PREV_INSN (loop_end)));
7670 /* If the decrement is 1 and the value was tested as >= 0 before
7671 the loop, then we can safely optimize. */
7672 for (p = loop_start; p; p = PREV_INSN (p))
7674 if (GET_CODE (p) == CODE_LABEL)
7676 if (GET_CODE (p) != JUMP_INSN)
7679 before_comparison = get_condition_for_loop (p);
7680 if (before_comparison
7681 && XEXP (before_comparison, 0) == bl->biv->dest_reg
7682 && GET_CODE (before_comparison) == LT
7683 && XEXP (before_comparison, 1) == const0_rtx
7684 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
7685 && INTVAL (bl->biv->add_val) == -1)
7687 REG_NOTES (PREV_INSN (loop_end))
7688 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7689 REG_NOTES (PREV_INSN (loop_end)));
7696 else if (INTVAL (bl->biv->add_val) > 0)
7698 /* Try to change inc to dec, so can apply above optimization. */
7700 all registers modified are induction variables or invariant,
7701 all memory references have non-overlapping addresses
7702 (obviously true if only one write)
7703 allow 2 insns for the compare/jump at the end of the loop. */
7704 /* Also, we must avoid any instructions which use both the reversed
7705 biv and another biv. Such instructions will fail if the loop is
7706 reversed. We meet this condition by requiring that either
7707 no_use_except_counting is true, or else that there is only
7709 int num_nonfixed_reads = 0;
7710 /* 1 if the iteration var is used only to count iterations. */
7711 int no_use_except_counting = 0;
7712 /* 1 if the loop has no memory store, or it has a single memory store
7713 which is reversible. */
7714 int reversible_mem_store = 1;
7716 if (bl->giv_count == 0
7717 && ! loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
7719 rtx bivreg = regno_reg_rtx[bl->regno];
7721 /* If there are no givs for this biv, and the only exit is the
7722 fall through at the end of the loop, then
7723 see if perhaps there are no uses except to count. */
7724 no_use_except_counting = 1;
7725 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7726 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
7728 rtx set = single_set (p);
7730 if (set && GET_CODE (SET_DEST (set)) == REG
7731 && REGNO (SET_DEST (set)) == bl->regno)
7732 /* An insn that sets the biv is okay. */
7734 else if (p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
7735 || p == prev_nonnote_insn (loop_end))
7736 /* Don't bother about the end test. */
7738 else if (reg_mentioned_p (bivreg, PATTERN (p)))
7740 no_use_except_counting = 0;
7746 if (no_use_except_counting)
7747 ; /* no need to worry about MEMs. */
7748 else if (num_mem_sets <= 1)
7750 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7751 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
7752 num_nonfixed_reads += count_nonfixed_reads (PATTERN (p));
7754 /* If the loop has a single store, and the destination address is
7755 invariant, then we can't reverse the loop, because this address
7756 might then have the wrong value at loop exit.
7757 This would work if the source was invariant also, however, in that
7758 case, the insn should have been moved out of the loop. */
7760 if (num_mem_sets == 1)
7762 struct induction *v;
7764 reversible_mem_store
7765 = (! unknown_address_altered
7766 && ! invariant_p (XEXP (loop_store_mems, 0)));
7768 /* If the store depends on a register that is set after the
7769 store, it depends on the initial value, and is thus not
7771 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
7773 if (v->giv_type == DEST_REG
7774 && reg_mentioned_p (v->dest_reg,
7775 XEXP (loop_store_mems, 0))
7776 && loop_insn_first_p (first_loop_store_insn, v->insn))
7777 reversible_mem_store = 0;
7784 /* This code only acts for innermost loops. Also it simplifies
7785 the memory address check by only reversing loops with
7786 zero or one memory access.
7787 Two memory accesses could involve parts of the same array,
7788 and that can't be reversed.
7789 If the biv is used only for counting, than we don't need to worry
7790 about all these things. */
7792 if ((num_nonfixed_reads <= 1
7794 && !loop_has_volatile
7795 && reversible_mem_store
7796 && (bl->giv_count + bl->biv_count + num_mem_sets
7797 + num_movables + compare_and_branch == insn_count)
7798 && (bl == loop_iv_list && bl->next == 0))
7799 || no_use_except_counting)
7803 /* Loop can be reversed. */
7804 if (loop_dump_stream)
7805 fprintf (loop_dump_stream, "Can reverse loop\n");
7807 /* Now check other conditions:
7809 The increment must be a constant, as must the initial value,
7810 and the comparison code must be LT.
7812 This test can probably be improved since +/- 1 in the constant
7813 can be obtained by changing LT to LE and vice versa; this is
7817 /* for constants, LE gets turned into LT */
7818 && (GET_CODE (comparison) == LT
7819 || (GET_CODE (comparison) == LE
7820 && no_use_except_counting)))
7822 HOST_WIDE_INT add_val, add_adjust, comparison_val;
7823 rtx initial_value, comparison_value;
7825 enum rtx_code cmp_code;
7826 int comparison_const_width;
7827 unsigned HOST_WIDE_INT comparison_sign_mask;
7829 add_val = INTVAL (bl->biv->add_val);
7830 comparison_value = XEXP (comparison, 1);
7831 if (GET_MODE (comparison_value) == VOIDmode)
7832 comparison_const_width
7833 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
7835 comparison_const_width
7836 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
7837 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
7838 comparison_const_width = HOST_BITS_PER_WIDE_INT;
7839 comparison_sign_mask
7840 = (unsigned HOST_WIDE_INT)1 << (comparison_const_width - 1);
7842 /* If the comparison value is not a loop invariant, then we
7843 can not reverse this loop.
7845 ??? If the insns which initialize the comparison value as
7846 a whole compute an invariant result, then we could move
7847 them out of the loop and proceed with loop reversal. */
7848 if (!invariant_p (comparison_value))
7851 if (GET_CODE (comparison_value) == CONST_INT)
7852 comparison_val = INTVAL (comparison_value);
7853 initial_value = bl->initial_value;
7855 /* Normalize the initial value if it is an integer and
7856 has no other use except as a counter. This will allow
7857 a few more loops to be reversed. */
7858 if (no_use_except_counting
7859 && GET_CODE (comparison_value) == CONST_INT
7860 && GET_CODE (initial_value) == CONST_INT)
7862 comparison_val = comparison_val - INTVAL (bl->initial_value);
7863 /* The code below requires comparison_val to be a multiple
7864 of add_val in order to do the loop reversal, so
7865 round up comparison_val to a multiple of add_val.
7866 Since comparison_value is constant, we know that the
7867 current comparison code is LT. */
7868 comparison_val = comparison_val + add_val - 1;
7870 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
7871 /* We postpone overflow checks for COMPARISON_VAL here;
7872 even if there is an overflow, we might still be able to
7873 reverse the loop, if converting the loop exit test to
7875 initial_value = const0_rtx;
7878 /* First check if we can do a vanilla loop reversal. */
7879 if (initial_value == const0_rtx
7880 /* If we have a decrement_and_branch_on_count, prefer
7881 the NE test, since this will allow that instruction to
7882 be generated. Note that we must use a vanilla loop
7883 reversal if the biv is used to calculate a giv or has
7884 a non-counting use. */
7885 #if ! defined (HAVE_decrement_and_branch_until_zero) && defined (HAVE_decrement_and_branch_on_count)
7886 && (! (add_val == 1 && loop_info->vtop
7887 && (bl->biv_count == 0
7888 || no_use_except_counting)))
7890 && GET_CODE (comparison_value) == CONST_INT
7891 /* Now do postponed overflow checks on COMPARISON_VAL. */
7892 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
7893 & comparison_sign_mask))
7895 /* Register will always be nonnegative, with value
7896 0 on last iteration */
7897 add_adjust = add_val;
7901 else if (add_val == 1 && loop_info->vtop
7902 && (bl->biv_count == 0
7903 || no_use_except_counting))
7911 if (GET_CODE (comparison) == LE)
7912 add_adjust -= add_val;
7914 /* If the initial value is not zero, or if the comparison
7915 value is not an exact multiple of the increment, then we
7916 can not reverse this loop. */
7917 if (initial_value == const0_rtx
7918 && GET_CODE (comparison_value) == CONST_INT)
7920 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
7925 if (! no_use_except_counting || add_val != 1)
7929 final_value = comparison_value;
7931 /* Reset these in case we normalized the initial value
7932 and comparison value above. */
7933 if (GET_CODE (comparison_value) == CONST_INT
7934 && GET_CODE (initial_value) == CONST_INT)
7936 comparison_value = GEN_INT (comparison_val);
7938 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
7940 bl->initial_value = initial_value;
7942 /* Save some info needed to produce the new insns. */
7943 reg = bl->biv->dest_reg;
7944 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
7945 if (jump_label == pc_rtx)
7946 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
7947 new_add_val = GEN_INT (- INTVAL (bl->biv->add_val));
7949 /* Set start_value; if this is not a CONST_INT, we need
7951 Initialize biv to start_value before loop start.
7952 The old initializing insn will be deleted as a
7953 dead store by flow.c. */
7954 if (initial_value == const0_rtx
7955 && GET_CODE (comparison_value) == CONST_INT)
7957 start_value = GEN_INT (comparison_val - add_adjust);
7958 emit_insn_before (gen_move_insn (reg, start_value),
7961 else if (GET_CODE (initial_value) == CONST_INT)
7963 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
7964 enum machine_mode mode = GET_MODE (reg);
7965 enum insn_code icode
7966 = add_optab->handlers[(int) mode].insn_code;
7967 if (! (*insn_operand_predicate[icode][0]) (reg, mode)
7968 || ! ((*insn_operand_predicate[icode][1])
7969 (comparison_value, mode))
7970 || ! (*insn_operand_predicate[icode][2]) (offset, mode))
7973 = gen_rtx_PLUS (mode, comparison_value, offset);
7974 emit_insn_before ((GEN_FCN (icode)
7975 (reg, comparison_value, offset)),
7977 if (GET_CODE (comparison) == LE)
7978 final_value = gen_rtx_PLUS (mode, comparison_value,
7981 else if (! add_adjust)
7983 enum machine_mode mode = GET_MODE (reg);
7984 enum insn_code icode
7985 = sub_optab->handlers[(int) mode].insn_code;
7986 if (! (*insn_operand_predicate[icode][0]) (reg, mode)
7987 || ! ((*insn_operand_predicate[icode][1])
7988 (comparison_value, mode))
7989 || ! ((*insn_operand_predicate[icode][2])
7990 (initial_value, mode)))
7993 = gen_rtx_MINUS (mode, comparison_value, initial_value);
7994 emit_insn_before ((GEN_FCN (icode)
7995 (reg, comparison_value, initial_value)),
7999 /* We could handle the other cases too, but it'll be
8000 better to have a testcase first. */
8003 /* We may not have a single insn which can increment a reg, so
8004 create a sequence to hold all the insns from expand_inc. */
8006 expand_inc (reg, new_add_val);
8007 tem = gen_sequence ();
8010 p = emit_insn_before (tem, bl->biv->insn);
8011 delete_insn (bl->biv->insn);
8013 /* Update biv info to reflect its new status. */
8015 bl->initial_value = start_value;
8016 bl->biv->add_val = new_add_val;
8018 /* Update loop info. */
8019 loop_info->initial_value = reg;
8020 loop_info->initial_equiv_value = reg;
8021 loop_info->final_value = const0_rtx;
8022 loop_info->final_equiv_value = const0_rtx;
8023 loop_info->comparison_value = const0_rtx;
8024 loop_info->comparison_code = cmp_code;
8025 loop_info->increment = new_add_val;
8027 /* Inc LABEL_NUSES so that delete_insn will
8028 not delete the label. */
8029 LABEL_NUSES (XEXP (jump_label, 0)) ++;
8031 /* Emit an insn after the end of the loop to set the biv's
8032 proper exit value if it is used anywhere outside the loop. */
8033 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
8035 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
8036 emit_insn_after (gen_move_insn (reg, final_value),
8039 /* Delete compare/branch at end of loop. */
8040 delete_insn (PREV_INSN (loop_end));
8041 if (compare_and_branch == 2)
8042 delete_insn (first_compare);
8044 /* Add new compare/branch insn at end of loop. */
8046 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
8047 GET_MODE (reg), 0, 0,
8048 XEXP (jump_label, 0));
8049 tem = gen_sequence ();
8051 emit_jump_insn_before (tem, loop_end);
8053 for (tem = PREV_INSN (loop_end);
8054 tem && GET_CODE (tem) != JUMP_INSN;
8055 tem = PREV_INSN (tem))
8059 JUMP_LABEL (tem) = XEXP (jump_label, 0);
8065 /* Increment of LABEL_NUSES done above. */
8066 /* Register is now always nonnegative,
8067 so add REG_NONNEG note to the branch. */
8068 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
8074 /* Mark that this biv has been reversed. Each giv which depends
8075 on this biv, and which is also live past the end of the loop
8076 will have to be fixed up. */
8080 if (loop_dump_stream)
8081 fprintf (loop_dump_stream,
8082 "Reversed loop and added reg_nonneg\n");
8092 /* Verify whether the biv BL appears to be eliminable,
8093 based on the insns in the loop that refer to it.
8094 LOOP_START is the first insn of the loop, and END is the end insn.
8096 If ELIMINATE_P is non-zero, actually do the elimination.
8098 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8099 determine whether invariant insns should be placed inside or at the
8100 start of the loop. */
8103 maybe_eliminate_biv (bl, loop_start, end, eliminate_p, threshold, insn_count)
8104 struct iv_class *bl;
8108 int threshold, insn_count;
8110 rtx reg = bl->biv->dest_reg;
8113 /* Scan all insns in the loop, stopping if we find one that uses the
8114 biv in a way that we cannot eliminate. */
8116 for (p = loop_start; p != end; p = NEXT_INSN (p))
8118 enum rtx_code code = GET_CODE (p);
8119 rtx where = threshold >= insn_count ? loop_start : p;
8121 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
8122 && reg_mentioned_p (reg, PATTERN (p))
8123 && ! maybe_eliminate_biv_1 (PATTERN (p), p, bl, eliminate_p, where))
8125 if (loop_dump_stream)
8126 fprintf (loop_dump_stream,
8127 "Cannot eliminate biv %d: biv used in insn %d.\n",
8128 bl->regno, INSN_UID (p));
8135 if (loop_dump_stream)
8136 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
8137 bl->regno, eliminate_p ? "was" : "can be");
8144 /* INSN and REFERENCE are instructions in the same insn chain.
8145 Return non-zero if INSN is first. */
8148 loop_insn_first_p (insn, reference)
8149 rtx insn, reference;
8153 for (p = insn, q = reference; ;)
8155 /* Start with test for not first so that INSN == REFERENCE yields not
8157 if (q == insn || ! p)
8159 if (p == reference || ! q)
8162 if (INSN_UID (p) < max_uid_for_loop
8163 && INSN_UID (q) < max_uid_for_loop)
8164 return INSN_LUID (p) < INSN_LUID (q);
8166 if (INSN_UID (p) >= max_uid_for_loop)
8168 if (INSN_UID (q) >= max_uid_for_loop)
8173 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
8174 the offset that we have to take into account due to auto-increment /
8175 div derivation is zero. */
8177 biv_elimination_giv_has_0_offset (biv, giv, insn)
8178 struct induction *biv, *giv;
8181 /* If the giv V had the auto-inc address optimization applied
8182 to it, and INSN occurs between the giv insn and the biv
8183 insn, then we'd have to adjust the value used here.
8184 This is rare, so we don't bother to make this possible. */
8185 if (giv->auto_inc_opt
8186 && ((loop_insn_first_p (giv->insn, insn)
8187 && loop_insn_first_p (insn, biv->insn))
8188 || (loop_insn_first_p (biv->insn, insn)
8189 && loop_insn_first_p (insn, giv->insn))))
8192 /* If the giv V was derived from another giv, and INSN does
8193 not occur between the giv insn and the biv insn, then we'd
8194 have to adjust the value used here. This is rare, so we don't
8195 bother to make this possible. */
8196 if (giv->derived_from
8197 && ! (giv->always_executed
8198 && loop_insn_first_p (giv->insn, insn)
8199 && loop_insn_first_p (insn, biv->insn)))
8202 && giv->same->derived_from
8203 && ! (giv->same->always_executed
8204 && loop_insn_first_p (giv->same->insn, insn)
8205 && loop_insn_first_p (insn, biv->insn)))
8211 /* If BL appears in X (part of the pattern of INSN), see if we can
8212 eliminate its use. If so, return 1. If not, return 0.
8214 If BIV does not appear in X, return 1.
8216 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
8217 where extra insns should be added. Depending on how many items have been
8218 moved out of the loop, it will either be before INSN or at the start of
8222 maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
8224 struct iv_class *bl;
8228 enum rtx_code code = GET_CODE (x);
8229 rtx reg = bl->biv->dest_reg;
8230 enum machine_mode mode = GET_MODE (reg);
8231 struct induction *v;
8243 /* If we haven't already been able to do something with this BIV,
8244 we can't eliminate it. */
8250 /* If this sets the BIV, it is not a problem. */
8251 if (SET_DEST (x) == reg)
8254 /* If this is an insn that defines a giv, it is also ok because
8255 it will go away when the giv is reduced. */
8256 for (v = bl->giv; v; v = v->next_iv)
8257 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
8261 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
8263 /* Can replace with any giv that was reduced and
8264 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8265 Require a constant for MULT_VAL, so we know it's nonzero.
8266 ??? We disable this optimization to avoid potential
8269 for (v = bl->giv; v; v = v->next_iv)
8270 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8271 && v->add_val == const0_rtx
8272 && ! v->ignore && ! v->maybe_dead && v->always_computable
8276 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8282 /* If the giv has the opposite direction of change,
8283 then reverse the comparison. */
8284 if (INTVAL (v->mult_val) < 0)
8285 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8286 const0_rtx, v->new_reg);
8290 /* We can probably test that giv's reduced reg. */
8291 if (validate_change (insn, &SET_SRC (x), new, 0))
8295 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8296 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8297 Require a constant for MULT_VAL, so we know it's nonzero.
8298 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8299 overflow problem. */
8301 for (v = bl->giv; v; v = v->next_iv)
8302 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8303 && ! v->ignore && ! v->maybe_dead && v->always_computable
8305 && (GET_CODE (v->add_val) == SYMBOL_REF
8306 || GET_CODE (v->add_val) == LABEL_REF
8307 || GET_CODE (v->add_val) == CONST
8308 || (GET_CODE (v->add_val) == REG
8309 && REGNO_POINTER_FLAG (REGNO (v->add_val)))))
8311 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8317 /* If the giv has the opposite direction of change,
8318 then reverse the comparison. */
8319 if (INTVAL (v->mult_val) < 0)
8320 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8323 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8324 copy_rtx (v->add_val));
8326 /* Replace biv with the giv's reduced register. */
8327 update_reg_last_use (v->add_val, insn);
8328 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8331 /* Insn doesn't support that constant or invariant. Copy it
8332 into a register (it will be a loop invariant.) */
8333 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8335 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
8338 /* Substitute the new register for its invariant value in
8339 the compare expression. */
8340 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8341 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8350 case GT: case GE: case GTU: case GEU:
8351 case LT: case LE: case LTU: case LEU:
8352 /* See if either argument is the biv. */
8353 if (XEXP (x, 0) == reg)
8354 arg = XEXP (x, 1), arg_operand = 1;
8355 else if (XEXP (x, 1) == reg)
8356 arg = XEXP (x, 0), arg_operand = 0;
8360 if (CONSTANT_P (arg))
8362 /* First try to replace with any giv that has constant positive
8363 mult_val and constant add_val. We might be able to support
8364 negative mult_val, but it seems complex to do it in general. */
8366 for (v = bl->giv; v; v = v->next_iv)
8367 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8368 && (GET_CODE (v->add_val) == SYMBOL_REF
8369 || GET_CODE (v->add_val) == LABEL_REF
8370 || GET_CODE (v->add_val) == CONST
8371 || (GET_CODE (v->add_val) == REG
8372 && REGNO_POINTER_FLAG (REGNO (v->add_val))))
8373 && ! v->ignore && ! v->maybe_dead && v->always_computable
8376 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8382 /* Replace biv with the giv's reduced reg. */
8383 XEXP (x, 1-arg_operand) = v->new_reg;
8385 /* If all constants are actually constant integers and
8386 the derived constant can be directly placed in the COMPARE,
8388 if (GET_CODE (arg) == CONST_INT
8389 && GET_CODE (v->mult_val) == CONST_INT
8390 && GET_CODE (v->add_val) == CONST_INT
8391 && validate_change (insn, &XEXP (x, arg_operand),
8392 GEN_INT (INTVAL (arg)
8393 * INTVAL (v->mult_val)
8394 + INTVAL (v->add_val)), 0))
8397 /* Otherwise, load it into a register. */
8398 tem = gen_reg_rtx (mode);
8399 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8400 if (validate_change (insn, &XEXP (x, arg_operand), tem, 0))
8403 /* If that failed, put back the change we made above. */
8404 XEXP (x, 1-arg_operand) = reg;
8407 /* Look for giv with positive constant mult_val and nonconst add_val.
8408 Insert insns to calculate new compare value.
8409 ??? Turn this off due to possible overflow. */
8411 for (v = bl->giv; v; v = v->next_iv)
8412 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8413 && ! v->ignore && ! v->maybe_dead && v->always_computable
8419 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8425 tem = gen_reg_rtx (mode);
8427 /* Replace biv with giv's reduced register. */
8428 validate_change (insn, &XEXP (x, 1 - arg_operand),
8431 /* Compute value to compare against. */
8432 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8433 /* Use it in this insn. */
8434 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8435 if (apply_change_group ())
8439 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8441 if (invariant_p (arg) == 1)
8443 /* Look for giv with constant positive mult_val and nonconst
8444 add_val. Insert insns to compute new compare value.
8445 ??? Turn this off due to possible overflow. */
8447 for (v = bl->giv; v; v = v->next_iv)
8448 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8449 && ! v->ignore && ! v->maybe_dead && v->always_computable
8455 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8461 tem = gen_reg_rtx (mode);
8463 /* Replace biv with giv's reduced register. */
8464 validate_change (insn, &XEXP (x, 1 - arg_operand),
8467 /* Compute value to compare against. */
8468 emit_iv_add_mult (arg, v->mult_val, v->add_val,
8470 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8471 if (apply_change_group ())
8476 /* This code has problems. Basically, you can't know when
8477 seeing if we will eliminate BL, whether a particular giv
8478 of ARG will be reduced. If it isn't going to be reduced,
8479 we can't eliminate BL. We can try forcing it to be reduced,
8480 but that can generate poor code.
8482 The problem is that the benefit of reducing TV, below should
8483 be increased if BL can actually be eliminated, but this means
8484 we might have to do a topological sort of the order in which
8485 we try to process biv. It doesn't seem worthwhile to do
8486 this sort of thing now. */
8489 /* Otherwise the reg compared with had better be a biv. */
8490 if (GET_CODE (arg) != REG
8491 || REG_IV_TYPE (REGNO (arg)) != BASIC_INDUCT)
8494 /* Look for a pair of givs, one for each biv,
8495 with identical coefficients. */
8496 for (v = bl->giv; v; v = v->next_iv)
8498 struct induction *tv;
8500 if (v->ignore || v->maybe_dead || v->mode != mode)
8503 for (tv = reg_biv_class[REGNO (arg)]->giv; tv; tv = tv->next_iv)
8504 if (! tv->ignore && ! tv->maybe_dead
8505 && rtx_equal_p (tv->mult_val, v->mult_val)
8506 && rtx_equal_p (tv->add_val, v->add_val)
8507 && tv->mode == mode)
8509 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8515 /* Replace biv with its giv's reduced reg. */
8516 XEXP (x, 1-arg_operand) = v->new_reg;
8517 /* Replace other operand with the other giv's
8519 XEXP (x, arg_operand) = tv->new_reg;
8526 /* If we get here, the biv can't be eliminated. */
8530 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8531 biv is used in it, since it will be replaced. */
8532 for (v = bl->giv; v; v = v->next_iv)
8533 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8541 /* See if any subexpression fails elimination. */
8542 fmt = GET_RTX_FORMAT (code);
8543 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8548 if (! maybe_eliminate_biv_1 (XEXP (x, i), insn, bl,
8549 eliminate_p, where))
8554 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8555 if (! maybe_eliminate_biv_1 (XVECEXP (x, i, j), insn, bl,
8556 eliminate_p, where))
8565 /* Return nonzero if the last use of REG
8566 is in an insn following INSN in the same basic block. */
8569 last_use_this_basic_block (reg, insn)
8575 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
8578 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
8584 /* Called via `note_stores' to record the initial value of a biv. Here we
8585 just record the location of the set and process it later. */
8588 record_initial (dest, set)
8592 struct iv_class *bl;
8594 if (GET_CODE (dest) != REG
8595 || REGNO (dest) >= max_reg_before_loop
8596 || REG_IV_TYPE (REGNO (dest)) != BASIC_INDUCT)
8599 bl = reg_biv_class[REGNO (dest)];
8601 /* If this is the first set found, record it. */
8602 if (bl->init_insn == 0)
8604 bl->init_insn = note_insn;
8609 /* If any of the registers in X are "old" and currently have a last use earlier
8610 than INSN, update them to have a last use of INSN. Their actual last use
8611 will be the previous insn but it will not have a valid uid_luid so we can't
8615 update_reg_last_use (x, insn)
8619 /* Check for the case where INSN does not have a valid luid. In this case,
8620 there is no need to modify the regno_last_uid, as this can only happen
8621 when code is inserted after the loop_end to set a pseudo's final value,
8622 and hence this insn will never be the last use of x. */
8623 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
8624 && INSN_UID (insn) < max_uid_for_loop
8625 && uid_luid[REGNO_LAST_UID (REGNO (x))] < uid_luid[INSN_UID (insn)])
8626 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
8630 register char *fmt = GET_RTX_FORMAT (GET_CODE (x));
8631 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
8634 update_reg_last_use (XEXP (x, i), insn);
8635 else if (fmt[i] == 'E')
8636 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8637 update_reg_last_use (XVECEXP (x, i, j), insn);
8642 /* Given a jump insn JUMP, return the condition that will cause it to branch
8643 to its JUMP_LABEL. If the condition cannot be understood, or is an
8644 inequality floating-point comparison which needs to be reversed, 0 will
8647 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8648 insn used in locating the condition was found. If a replacement test
8649 of the condition is desired, it should be placed in front of that
8650 insn and we will be sure that the inputs are still valid.
8652 The condition will be returned in a canonical form to simplify testing by
8653 callers. Specifically:
8655 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
8656 (2) Both operands will be machine operands; (cc0) will have been replaced.
8657 (3) If an operand is a constant, it will be the second operand.
8658 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
8659 for GE, GEU, and LEU. */
8662 get_condition (jump, earliest)
8671 int reverse_code = 0;
8672 int did_reverse_condition = 0;
8673 enum machine_mode mode;
8675 /* If this is not a standard conditional jump, we can't parse it. */
8676 if (GET_CODE (jump) != JUMP_INSN
8677 || ! condjump_p (jump) || simplejump_p (jump))
8680 code = GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 0));
8681 mode = GET_MODE (XEXP (SET_SRC (PATTERN (jump)), 0));
8682 op0 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 0);
8683 op1 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 1);
8688 /* If this branches to JUMP_LABEL when the condition is false, reverse
8690 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 2)) == LABEL_REF
8691 && XEXP (XEXP (SET_SRC (PATTERN (jump)), 2), 0) == JUMP_LABEL (jump))
8692 code = reverse_condition (code), did_reverse_condition ^= 1;
8694 /* If we are comparing a register with zero, see if the register is set
8695 in the previous insn to a COMPARE or a comparison operation. Perform
8696 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
8699 while (GET_RTX_CLASS (code) == '<' && op1 == CONST0_RTX (GET_MODE (op0)))
8701 /* Set non-zero when we find something of interest. */
8705 /* If comparison with cc0, import actual comparison from compare
8709 if ((prev = prev_nonnote_insn (prev)) == 0
8710 || GET_CODE (prev) != INSN
8711 || (set = single_set (prev)) == 0
8712 || SET_DEST (set) != cc0_rtx)
8715 op0 = SET_SRC (set);
8716 op1 = CONST0_RTX (GET_MODE (op0));
8722 /* If this is a COMPARE, pick up the two things being compared. */
8723 if (GET_CODE (op0) == COMPARE)
8725 op1 = XEXP (op0, 1);
8726 op0 = XEXP (op0, 0);
8729 else if (GET_CODE (op0) != REG)
8732 /* Go back to the previous insn. Stop if it is not an INSN. We also
8733 stop if it isn't a single set or if it has a REG_INC note because
8734 we don't want to bother dealing with it. */
8736 if ((prev = prev_nonnote_insn (prev)) == 0
8737 || GET_CODE (prev) != INSN
8738 || FIND_REG_INC_NOTE (prev, 0)
8739 || (set = single_set (prev)) == 0)
8742 /* If this is setting OP0, get what it sets it to if it looks
8744 if (rtx_equal_p (SET_DEST (set), op0))
8746 enum machine_mode inner_mode = GET_MODE (SET_SRC (set));
8748 /* ??? We may not combine comparisons done in a CCmode with
8749 comparisons not done in a CCmode. This is to aid targets
8750 like Alpha that have an IEEE compliant EQ instruction, and
8751 a non-IEEE compliant BEQ instruction. The use of CCmode is
8752 actually artificial, simply to prevent the combination, but
8753 should not affect other platforms.
8755 However, we must allow VOIDmode comparisons to match either
8756 CCmode or non-CCmode comparison, because some ports have
8757 modeless comparisons inside branch patterns.
8759 ??? This mode check should perhaps look more like the mode check
8760 in simplify_comparison in combine. */
8762 if ((GET_CODE (SET_SRC (set)) == COMPARE
8765 && GET_MODE_CLASS (inner_mode) == MODE_INT
8766 && (GET_MODE_BITSIZE (inner_mode)
8767 <= HOST_BITS_PER_WIDE_INT)
8768 && (STORE_FLAG_VALUE
8769 & ((HOST_WIDE_INT) 1
8770 << (GET_MODE_BITSIZE (inner_mode) - 1))))
8771 #ifdef FLOAT_STORE_FLAG_VALUE
8773 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
8774 && FLOAT_STORE_FLAG_VALUE < 0)
8777 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
8778 && (((GET_MODE_CLASS (mode) == MODE_CC)
8779 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
8780 || mode == VOIDmode || inner_mode == VOIDmode))
8782 else if (((code == EQ
8784 && (GET_MODE_BITSIZE (inner_mode)
8785 <= HOST_BITS_PER_WIDE_INT)
8786 && GET_MODE_CLASS (inner_mode) == MODE_INT
8787 && (STORE_FLAG_VALUE
8788 & ((HOST_WIDE_INT) 1
8789 << (GET_MODE_BITSIZE (inner_mode) - 1))))
8790 #ifdef FLOAT_STORE_FLAG_VALUE
8792 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
8793 && FLOAT_STORE_FLAG_VALUE < 0)
8796 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
8797 && (((GET_MODE_CLASS (mode) == MODE_CC)
8798 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
8799 || mode == VOIDmode || inner_mode == VOIDmode))
8802 /* We might have reversed a LT to get a GE here. But this wasn't
8803 actually the comparison of data, so we don't flag that we
8804 have had to reverse the condition. */
8805 did_reverse_condition ^= 1;
8813 else if (reg_set_p (op0, prev))
8814 /* If this sets OP0, but not directly, we have to give up. */
8819 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
8820 code = GET_CODE (x);
8823 code = reverse_condition (code);
8824 did_reverse_condition ^= 1;
8828 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
8834 /* If constant is first, put it last. */
8835 if (CONSTANT_P (op0))
8836 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
8838 /* If OP0 is the result of a comparison, we weren't able to find what
8839 was really being compared, so fail. */
8840 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
8843 /* Canonicalize any ordered comparison with integers involving equality
8844 if we can do computations in the relevant mode and we do not
8847 if (GET_CODE (op1) == CONST_INT
8848 && GET_MODE (op0) != VOIDmode
8849 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
8851 HOST_WIDE_INT const_val = INTVAL (op1);
8852 unsigned HOST_WIDE_INT uconst_val = const_val;
8853 unsigned HOST_WIDE_INT max_val
8854 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
8859 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
8860 code = LT, op1 = GEN_INT (const_val + 1);
8863 /* When cross-compiling, const_val might be sign-extended from
8864 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
8866 if ((HOST_WIDE_INT) (const_val & max_val)
8867 != (((HOST_WIDE_INT) 1
8868 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
8869 code = GT, op1 = GEN_INT (const_val - 1);
8873 if (uconst_val < max_val)
8874 code = LTU, op1 = GEN_INT (uconst_val + 1);
8878 if (uconst_val != 0)
8879 code = GTU, op1 = GEN_INT (uconst_val - 1);
8887 /* If this was floating-point and we reversed anything other than an
8888 EQ or NE, return zero. */
8889 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
8890 && did_reverse_condition && code != NE && code != EQ
8892 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
8896 /* Never return CC0; return zero instead. */
8901 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
8904 /* Similar to above routine, except that we also put an invariant last
8905 unless both operands are invariants. */
8908 get_condition_for_loop (x)
8911 rtx comparison = get_condition (x, NULL_PTR);
8914 || ! invariant_p (XEXP (comparison, 0))
8915 || invariant_p (XEXP (comparison, 1)))
8918 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
8919 XEXP (comparison, 1), XEXP (comparison, 0));
8922 #ifdef HAVE_decrement_and_branch_on_count
8923 /* Instrument loop for insertion of bct instruction. We distinguish between
8924 loops with compile-time bounds and those with run-time bounds.
8925 Information from loop_iterations() is used to compute compile-time bounds.
8926 Run-time bounds should use loop preconditioning, but currently ignored.
8930 insert_bct (loop_start, loop_end, loop_info)
8931 rtx loop_start, loop_end;
8932 struct loop_info *loop_info;
8935 unsigned HOST_WIDE_INT n_iterations;
8937 int increment_direction, compare_direction;
8939 /* If the loop condition is <= or >=, the number of iteration
8940 is 1 more than the range of the bounds of the loop. */
8941 int add_iteration = 0;
8943 enum machine_mode loop_var_mode = word_mode;
8945 int loop_num = uid_loop_num [INSN_UID (loop_start)];
8947 /* It's impossible to instrument a competely unrolled loop. */
8948 if (loop_info->unroll_number == -1)
8951 /* Make sure that the count register is not in use. */
8952 if (loop_used_count_register [loop_num])
8954 if (loop_dump_stream)
8955 fprintf (loop_dump_stream,
8956 "insert_bct %d: BCT instrumentation failed: count register already in use\n",
8961 /* Make sure that the function has no indirect jumps. */
8962 if (indirect_jump_in_function)
8964 if (loop_dump_stream)
8965 fprintf (loop_dump_stream,
8966 "insert_bct %d: BCT instrumentation failed: indirect jump in function\n",
8971 /* Make sure that the last loop insn is a conditional jump. */
8972 if (GET_CODE (PREV_INSN (loop_end)) != JUMP_INSN
8973 || ! condjump_p (PREV_INSN (loop_end))
8974 || simplejump_p (PREV_INSN (loop_end)))
8976 if (loop_dump_stream)
8977 fprintf (loop_dump_stream,
8978 "insert_bct %d: BCT instrumentation failed: invalid jump at loop end\n",
8983 /* Make sure that the loop does not contain a function call
8984 (the count register might be altered by the called function). */
8987 if (loop_dump_stream)
8988 fprintf (loop_dump_stream,
8989 "insert_bct %d: BCT instrumentation failed: function call in loop\n",
8994 /* Make sure that the loop does not jump via a table.
8995 (the count register might be used to perform the branch on table). */
8996 if (loop_has_tablejump)
8998 if (loop_dump_stream)
8999 fprintf (loop_dump_stream,
9000 "insert_bct %d: BCT instrumentation failed: computed branch in the loop\n",
9005 /* Account for loop unrolling in instrumented iteration count. */
9006 if (loop_info->unroll_number > 1)
9007 n_iterations = loop_info->n_iterations / loop_info->unroll_number;
9009 n_iterations = loop_info->n_iterations;
9011 if (n_iterations != 0 && n_iterations < 3)
9013 /* Allow an enclosing outer loop to benefit if possible. */
9014 if (loop_dump_stream)
9015 fprintf (loop_dump_stream,
9016 "insert_bct %d: Too few iterations to benefit from BCT optimization\n",
9021 /* Try to instrument the loop. */
9023 /* Handle the simpler case, where the bounds are known at compile time. */
9024 if (n_iterations > 0)
9026 /* Mark all enclosing loops that they cannot use count register. */
9027 for (i = loop_num; i != -1; i = loop_outer_loop[i])
9028 loop_used_count_register[i] = 1;
9029 instrument_loop_bct (loop_start, loop_end, GEN_INT (n_iterations));
9033 /* Handle the more complex case, that the bounds are NOT known
9034 at compile time. In this case we generate run_time calculation
9035 of the number of iterations. */
9037 if (loop_info->iteration_var == 0)
9039 if (loop_dump_stream)
9040 fprintf (loop_dump_stream,
9041 "insert_bct %d: BCT Runtime Instrumentation failed: no loop iteration variable found\n",
9046 if (GET_MODE_CLASS (GET_MODE (loop_info->iteration_var)) != MODE_INT
9047 || GET_MODE_SIZE (GET_MODE (loop_info->iteration_var)) != UNITS_PER_WORD)
9049 if (loop_dump_stream)
9050 fprintf (loop_dump_stream,
9051 "insert_bct %d: BCT Runtime Instrumentation failed: loop variable not integer\n",
9056 /* With runtime bounds, if the compare is of the form '!=' we give up */
9057 if (loop_info->comparison_code == NE)
9059 if (loop_dump_stream)
9060 fprintf (loop_dump_stream,
9061 "insert_bct %d: BCT Runtime Instrumentation failed: runtime bounds with != comparison\n",
9065 /* Use common loop preconditioning code instead. */
9069 /* We rely on the existence of run-time guard to ensure that the
9070 loop executes at least once. */
9072 rtx iterations_num_reg;
9074 unsigned HOST_WIDE_INT increment_value_abs
9075 = INTVAL (increment) * increment_direction;
9077 /* make sure that the increment is a power of two, otherwise (an
9078 expensive) divide is needed. */
9079 if (exact_log2 (increment_value_abs) == -1)
9081 if (loop_dump_stream)
9082 fprintf (loop_dump_stream,
9083 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
9087 /* compute the number of iterations */
9092 /* Again, the number of iterations is calculated by:
9094 ; compare-val - initial-val + (increment -1) + additional-iteration
9095 ; num_iterations = -----------------------------------------------------------------
9098 /* ??? Do we have to call copy_rtx here before passing rtx to
9100 if (compare_direction > 0)
9102 /* <, <= :the loop variable is increasing */
9103 temp_reg = expand_binop (loop_var_mode, sub_optab,
9104 comparison_value, initial_value,
9105 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9109 temp_reg = expand_binop (loop_var_mode, sub_optab,
9110 initial_value, comparison_value,
9111 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9114 if (increment_value_abs - 1 + add_iteration != 0)
9115 temp_reg = expand_binop (loop_var_mode, add_optab, temp_reg,
9116 GEN_INT (increment_value_abs - 1
9118 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9120 if (increment_value_abs != 1)
9122 /* ??? This will generate an expensive divide instruction for
9123 most targets. The original authors apparently expected this
9124 to be a shift, since they test for power-of-2 divisors above,
9125 but just naively generating a divide instruction will not give
9126 a shift. It happens to work for the PowerPC target because
9127 the rs6000.md file has a divide pattern that emits shifts.
9128 It will probably not work for any other target. */
9129 iterations_num_reg = expand_binop (loop_var_mode, sdiv_optab,
9131 GEN_INT (increment_value_abs),
9132 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9135 iterations_num_reg = temp_reg;
9137 sequence = gen_sequence ();
9139 emit_insn_before (sequence, loop_start);
9140 instrument_loop_bct (loop_start, loop_end, iterations_num_reg);
9144 #endif /* Complex case */
9147 /* Instrument loop by inserting a bct in it as follows:
9148 1. A new counter register is created.
9149 2. In the head of the loop the new variable is initialized to the value
9150 passed in the loop_num_iterations parameter.
9151 3. At the end of the loop, comparison of the register with 0 is generated.
9152 The created comparison follows the pattern defined for the
9153 decrement_and_branch_on_count insn, so this insn will be generated.
9154 4. The branch on the old variable are deleted. The compare must remain
9155 because it might be used elsewhere. If the loop-variable or condition
9156 register are used elsewhere, they will be eliminated by flow. */
9159 instrument_loop_bct (loop_start, loop_end, loop_num_iterations)
9160 rtx loop_start, loop_end;
9161 rtx loop_num_iterations;
9167 if (HAVE_decrement_and_branch_on_count)
9169 if (loop_dump_stream)
9171 fputs ("instrument_bct: Inserting BCT (", loop_dump_stream);
9172 if (GET_CODE (loop_num_iterations) == CONST_INT)
9173 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC,
9174 INTVAL (loop_num_iterations));
9176 fputs ("runtime", loop_dump_stream);
9177 fputs (" iterations)", loop_dump_stream);
9180 /* Discard original jump to continue loop. Original compare result
9181 may still be live, so it cannot be discarded explicitly. */
9182 delete_insn (PREV_INSN (loop_end));
9184 /* Insert the label which will delimit the start of the loop. */
9185 start_label = gen_label_rtx ();
9186 emit_label_after (start_label, loop_start);
9188 /* Insert initialization of the count register into the loop header. */
9190 counter_reg = gen_reg_rtx (word_mode);
9191 emit_insn (gen_move_insn (counter_reg, loop_num_iterations));
9192 sequence = gen_sequence ();
9194 emit_insn_before (sequence, loop_start);
9196 /* Insert new comparison on the count register instead of the
9197 old one, generating the needed BCT pattern (that will be
9198 later recognized by assembly generation phase). */
9199 emit_jump_insn_before (gen_decrement_and_branch_on_count (counter_reg,
9202 LABEL_NUSES (start_label)++;
9206 #endif /* HAVE_decrement_and_branch_on_count */
9208 /* Scan the function and determine whether it has indirect (computed) jumps.
9210 This is taken mostly from flow.c; similar code exists elsewhere
9211 in the compiler. It may be useful to put this into rtlanal.c. */
9213 indirect_jump_in_function_p (start)
9218 for (insn = start; insn; insn = NEXT_INSN (insn))
9219 if (computed_jump_p (insn))
9225 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9226 documentation for LOOP_MEMS for the definition of `appropriate'.
9227 This function is called from prescan_loop via for_each_rtx. */
9230 insert_loop_mem (mem, data)
9232 void *data ATTRIBUTE_UNUSED;
9240 switch (GET_CODE (m))
9246 /* We're not interested in the MEM associated with a
9247 CONST_DOUBLE, so there's no need to traverse into this. */
9251 /* This is not a MEM. */
9255 /* See if we've already seen this MEM. */
9256 for (i = 0; i < loop_mems_idx; ++i)
9257 if (rtx_equal_p (m, loop_mems[i].mem))
9259 if (GET_MODE (m) != GET_MODE (loop_mems[i].mem))
9260 /* The modes of the two memory accesses are different. If
9261 this happens, something tricky is going on, and we just
9262 don't optimize accesses to this MEM. */
9263 loop_mems[i].optimize = 0;
9268 /* Resize the array, if necessary. */
9269 if (loop_mems_idx == loop_mems_allocated)
9271 if (loop_mems_allocated != 0)
9272 loop_mems_allocated *= 2;
9274 loop_mems_allocated = 32;
9276 loop_mems = (loop_mem_info*)
9277 xrealloc (loop_mems,
9278 loop_mems_allocated * sizeof (loop_mem_info));
9281 /* Actually insert the MEM. */
9282 loop_mems[loop_mems_idx].mem = m;
9283 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9284 because we can't put it in a register. We still store it in the
9285 table, though, so that if we see the same address later, but in a
9286 non-BLK mode, we'll not think we can optimize it at that point. */
9287 loop_mems[loop_mems_idx].optimize = (GET_MODE (m) != BLKmode);
9288 loop_mems[loop_mems_idx].reg = NULL_RTX;
9294 /* Like load_mems, but also ensures that SET_IN_LOOP,
9295 MAY_NOT_OPTIMIZE, REG_SINGLE_USAGE, and INSN_COUNT have the correct
9296 values after load_mems. */
9299 load_mems_and_recount_loop_regs_set (scan_start, end, loop_top, start,
9307 int nregs = max_reg_num ();
9309 load_mems (scan_start, end, loop_top, start);
9311 /* Recalculate set_in_loop and friends since load_mems may have
9312 created new registers. */
9313 if (max_reg_num () > nregs)
9319 nregs = max_reg_num ();
9321 if ((unsigned) nregs > set_in_loop->num_elements)
9323 /* Grow all the arrays. */
9324 VARRAY_GROW (set_in_loop, nregs);
9325 VARRAY_GROW (n_times_set, nregs);
9326 VARRAY_GROW (may_not_optimize, nregs);
9327 VARRAY_GROW (reg_single_usage, nregs);
9329 /* Clear the arrays */
9330 bzero ((char *) &set_in_loop->data, nregs * sizeof (int));
9331 bzero ((char *) &may_not_optimize->data, nregs * sizeof (char));
9332 bzero ((char *) ®_single_usage->data, nregs * sizeof (rtx));
9334 count_loop_regs_set (loop_top ? loop_top : start, end,
9335 may_not_optimize, reg_single_usage,
9338 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
9340 VARRAY_CHAR (may_not_optimize, i) = 1;
9341 VARRAY_INT (set_in_loop, i) = 1;
9344 #ifdef AVOID_CCMODE_COPIES
9345 /* Don't try to move insns which set CC registers if we should not
9346 create CCmode register copies. */
9347 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
9348 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
9349 VARRAY_CHAR (may_not_optimize, i) = 1;
9352 /* Set n_times_set for the new registers. */
9353 bcopy ((char *) (&set_in_loop->data.i[0] + old_nregs),
9354 (char *) (&n_times_set->data.i[0] + old_nregs),
9355 (nregs - old_nregs) * sizeof (int));
9359 /* Move MEMs into registers for the duration of the loop. SCAN_START
9360 is the first instruction in the loop (as it is executed). The
9361 other parameters are as for next_insn_in_loop. */
9364 load_mems (scan_start, end, loop_top, start)
9370 int maybe_never = 0;
9373 rtx label = NULL_RTX;
9376 if (loop_mems_idx > 0)
9378 /* Nonzero if the next instruction may never be executed. */
9379 int next_maybe_never = 0;
9381 /* Check to see if it's possible that some instructions in the
9382 loop are never executed. */
9383 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
9384 p != NULL_RTX && !maybe_never;
9385 p = next_insn_in_loop (p, scan_start, end, loop_top))
9387 if (GET_CODE (p) == CODE_LABEL)
9389 else if (GET_CODE (p) == JUMP_INSN
9390 /* If we enter the loop in the middle, and scan
9391 around to the beginning, don't set maybe_never
9392 for that. This must be an unconditional jump,
9393 otherwise the code at the top of the loop might
9394 never be executed. Unconditional jumps are
9395 followed a by barrier then loop end. */
9396 && ! (GET_CODE (p) == JUMP_INSN
9397 && JUMP_LABEL (p) == loop_top
9398 && NEXT_INSN (NEXT_INSN (p)) == end
9399 && simplejump_p (p)))
9401 if (!condjump_p (p))
9402 /* Something complicated. */
9405 /* If there are any more instructions in the loop, they
9406 might not be reached. */
9407 next_maybe_never = 1;
9409 else if (next_maybe_never)
9413 /* Actually move the MEMs. */
9414 for (i = 0; i < loop_mems_idx; ++i)
9418 rtx mem = loop_mems[i].mem;
9421 if (MEM_VOLATILE_P (mem)
9422 || invariant_p (XEXP (mem, 0)) != 1)
9423 /* There's no telling whether or not MEM is modified. */
9424 loop_mems[i].optimize = 0;
9426 /* Go through the MEMs written to in the loop to see if this
9427 one is aliased by one of them. */
9428 mem_list_entry = loop_store_mems;
9429 while (mem_list_entry)
9431 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
9433 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
9436 /* MEM is indeed aliased by this store. */
9437 loop_mems[i].optimize = 0;
9440 mem_list_entry = XEXP (mem_list_entry, 1);
9443 /* If this MEM is written to, we must be sure that there
9444 are no reads from another MEM that aliases this one. */
9445 if (loop_mems[i].optimize && written)
9449 for (j = 0; j < loop_mems_idx; ++j)
9453 else if (true_dependence (mem,
9458 /* It's not safe to hoist loop_mems[i] out of
9459 the loop because writes to it might not be
9460 seen by reads from loop_mems[j]. */
9461 loop_mems[i].optimize = 0;
9467 if (maybe_never && may_trap_p (mem))
9468 /* We can't access the MEM outside the loop; it might
9469 cause a trap that wouldn't have happened otherwise. */
9470 loop_mems[i].optimize = 0;
9472 if (!loop_mems[i].optimize)
9473 /* We thought we were going to lift this MEM out of the
9474 loop, but later discovered that we could not. */
9477 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9478 order to keep scan_loop from moving stores to this MEM
9479 out of the loop just because this REG is neither a
9480 user-variable nor used in the loop test. */
9481 reg = gen_reg_rtx (GET_MODE (mem));
9482 REG_USERVAR_P (reg) = 1;
9483 loop_mems[i].reg = reg;
9485 /* Now, replace all references to the MEM with the
9486 corresponding pesudos. */
9487 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
9489 p = next_insn_in_loop (p, scan_start, end, loop_top))
9494 for_each_rtx (&p, replace_loop_mem, &ri);
9497 if (!apply_change_group ())
9498 /* We couldn't replace all occurrences of the MEM. */
9499 loop_mems[i].optimize = 0;
9504 /* Load the memory immediately before START, which is
9505 the NOTE_LOOP_BEG. */
9506 set = gen_move_insn (reg, mem);
9507 emit_insn_before (set, start);
9511 if (label == NULL_RTX)
9513 /* We must compute the former
9514 right-after-the-end label before we insert
9516 end_label = next_label (end);
9517 label = gen_label_rtx ();
9518 emit_label_after (label, end);
9521 /* Store the memory immediately after END, which is
9522 the NOTE_LOOP_END. */
9523 set = gen_move_insn (copy_rtx (mem), reg);
9524 emit_insn_after (set, label);
9527 if (loop_dump_stream)
9529 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9530 REGNO (reg), (written ? "r/w" : "r/o"));
9531 print_rtl (loop_dump_stream, mem);
9532 fputc ('\n', loop_dump_stream);
9538 if (label != NULL_RTX)
9540 /* Now, we need to replace all references to the previous exit
9541 label with the new one. */
9546 for (p = start; p != end; p = NEXT_INSN (p))
9548 for_each_rtx (&p, replace_label, &rr);
9550 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9551 field. This is not handled by for_each_rtx because it doesn't
9552 handle unprinted ('0') fields. We need to update JUMP_LABEL
9553 because the immediately following unroll pass will use it.
9554 replace_label would not work anyways, because that only handles
9556 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9557 JUMP_LABEL (p) = label;
9562 /* Replace MEM with its associated pseudo register. This function is
9563 called from load_mems via for_each_rtx. DATA is actually an
9564 rtx_and_int * describing the instruction currently being scanned
9565 and the MEM we are currently replacing. */
9568 replace_loop_mem (mem, data)
9580 switch (GET_CODE (m))
9586 /* We're not interested in the MEM associated with a
9587 CONST_DOUBLE, so there's no need to traverse into one. */
9591 /* This is not a MEM. */
9595 ri = (rtx_and_int*) data;
9598 if (!rtx_equal_p (loop_mems[i].mem, m))
9599 /* This is not the MEM we are currently replacing. */
9604 /* Actually replace the MEM. */
9605 validate_change (insn, mem, loop_mems[i].reg, 1);
9610 /* Replace occurrences of the old exit label for the loop with the new
9611 one. DATA is an rtx_pair containing the old and new labels,
9615 replace_label (x, data)
9620 rtx old_label = ((rtx_pair*) data)->r1;
9621 rtx new_label = ((rtx_pair*) data)->r2;
9626 if (GET_CODE (l) != LABEL_REF)
9629 if (XEXP (l, 0) != old_label)
9632 XEXP (l, 0) = new_label;
9633 ++LABEL_NUSES (new_label);
9634 --LABEL_NUSES (old_label);