1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
44 #include "hard-reg-set.h"
45 #include "basic-block.h"
46 #include "insn-config.h"
57 #define LOOP_REG_LIFETIME(LOOP, REGNO) \
58 ((REGNO_LAST_LUID (REGNO) - REGNO_FIRST_LUID (REGNO)))
60 #define LOOP_REG_GLOBAL_P(LOOP, REGNO) \
61 ((REGNO_LAST_LUID (REGNO) > INSN_LUID ((LOOP)->end) \
62 || REGNO_FIRST_LUID (REGNO) < INSN_LUID ((LOOP)->start)))
65 /* Vector mapping INSN_UIDs to luids.
66 The luids are like uids but increase monotonically always.
67 We use them to see whether a jump comes from outside a given loop. */
71 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
72 number the insn is contained in. */
74 struct loop **uid_loop;
76 /* 1 + largest uid of any insn. */
80 /* 1 + luid of last insn. */
84 /* Number of loops detected in current function. Used as index to the
87 static int max_loop_num;
89 /* Bound on pseudo register number before loop optimization.
90 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
91 unsigned int max_reg_before_loop;
93 /* The value to pass to the next call of reg_scan_update. */
94 static int loop_max_reg;
96 #define obstack_chunk_alloc xmalloc
97 #define obstack_chunk_free free
99 /* During the analysis of a loop, a chain of `struct movable's
100 is made to record all the movable insns found.
101 Then the entire chain can be scanned to decide which to move. */
105 rtx insn; /* A movable insn */
106 rtx set_src; /* The expression this reg is set from. */
107 rtx set_dest; /* The destination of this SET. */
108 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
109 of any registers used within the LIBCALL. */
110 int consec; /* Number of consecutive following insns
111 that must be moved with this one. */
112 unsigned int regno; /* The register it sets */
113 short lifetime; /* lifetime of that register;
114 may be adjusted when matching movables
115 that load the same value are found. */
116 short savings; /* Number of insns we can move for this reg,
117 including other movables that force this
118 or match this one. */
119 unsigned int cond : 1; /* 1 if only conditionally movable */
120 unsigned int force : 1; /* 1 means MUST move this insn */
121 unsigned int global : 1; /* 1 means reg is live outside this loop */
122 /* If PARTIAL is 1, GLOBAL means something different:
123 that the reg is live outside the range from where it is set
124 to the following label. */
125 unsigned int done : 1; /* 1 inhibits further processing of this */
127 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
128 In particular, moving it does not make it
130 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
131 load SRC, rather than copying INSN. */
132 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
133 first insn of a consecutive sets group. */
134 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
135 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
136 that we should avoid changing when clearing
137 the rest of the reg. */
138 struct movable *match; /* First entry for same value */
139 struct movable *forces; /* An insn that must be moved if this is */
140 struct movable *next;
144 FILE *loop_dump_stream;
146 /* Forward declarations. */
148 static void find_and_verify_loops PARAMS ((rtx, struct loops *));
149 static void mark_loop_jump PARAMS ((rtx, struct loop *));
150 static void prescan_loop PARAMS ((struct loop *));
151 static int reg_in_basic_block_p PARAMS ((rtx, rtx));
152 static int consec_sets_invariant_p PARAMS ((const struct loop *,
154 static int labels_in_range_p PARAMS ((rtx, int));
155 static void count_one_set PARAMS ((struct loop_regs *, rtx, rtx, rtx *));
156 static void note_addr_stored PARAMS ((rtx, rtx, void *));
157 static void note_set_pseudo_multiple_uses PARAMS ((rtx, rtx, void *));
158 static int loop_reg_used_before_p PARAMS ((const struct loop *, rtx, rtx));
159 static void scan_loop PARAMS ((struct loop*, int));
161 static void replace_call_address PARAMS ((rtx, rtx, rtx));
163 static rtx skip_consec_insns PARAMS ((rtx, int));
164 static int libcall_benefit PARAMS ((rtx));
165 static void ignore_some_movables PARAMS ((struct loop_movables *));
166 static void force_movables PARAMS ((struct loop_movables *));
167 static void combine_movables PARAMS ((struct loop_movables *,
168 struct loop_regs *));
169 static int num_unmoved_movables PARAMS ((const struct loop *));
170 static int regs_match_p PARAMS ((rtx, rtx, struct loop_movables *));
171 static int rtx_equal_for_loop_p PARAMS ((rtx, rtx, struct loop_movables *,
172 struct loop_regs *));
173 static void add_label_notes PARAMS ((rtx, rtx));
174 static void move_movables PARAMS ((struct loop *loop, struct loop_movables *,
176 static void loop_movables_add PARAMS((struct loop_movables *,
178 static void loop_movables_free PARAMS((struct loop_movables *));
179 static int count_nonfixed_reads PARAMS ((const struct loop *, rtx));
180 static void loop_bivs_find PARAMS((struct loop *));
181 static void loop_bivs_init_find PARAMS((struct loop *));
182 static void loop_bivs_check PARAMS((struct loop *));
183 static void loop_givs_find PARAMS((struct loop *));
184 static void loop_givs_check PARAMS((struct loop *));
185 static int loop_biv_eliminable_p PARAMS((struct loop *, struct iv_class *,
187 static int loop_giv_reduce_benefit PARAMS((struct loop *, struct iv_class *,
188 struct induction *, rtx));
189 static void loop_givs_dead_check PARAMS((struct loop *, struct iv_class *));
190 static void loop_givs_reduce PARAMS((struct loop *, struct iv_class *));
191 static void loop_givs_rescan PARAMS((struct loop *, struct iv_class *,
193 static void loop_ivs_free PARAMS((struct loop *));
194 static void strength_reduce PARAMS ((struct loop *, int));
195 static void find_single_use_in_loop PARAMS ((struct loop_regs *, rtx, rtx));
196 static int valid_initial_value_p PARAMS ((rtx, rtx, int, rtx));
197 static void find_mem_givs PARAMS ((const struct loop *, rtx, rtx, int, int));
198 static void record_biv PARAMS ((struct loop *, struct induction *,
199 rtx, rtx, rtx, rtx, rtx *,
201 static void check_final_value PARAMS ((const struct loop *,
202 struct induction *));
203 static void loop_ivs_dump PARAMS((const struct loop *, FILE *, int));
204 static void loop_iv_class_dump PARAMS((const struct iv_class *, FILE *, int));
205 static void loop_biv_dump PARAMS((const struct induction *, FILE *, int));
206 static void loop_giv_dump PARAMS((const struct induction *, FILE *, int));
207 static void record_giv PARAMS ((const struct loop *, struct induction *,
208 rtx, rtx, rtx, rtx, rtx, rtx, int,
209 enum g_types, int, int, rtx *));
210 static void update_giv_derive PARAMS ((const struct loop *, rtx));
211 static void check_ext_dependant_givs PARAMS ((struct iv_class *,
212 struct loop_info *));
213 static int basic_induction_var PARAMS ((const struct loop *, rtx,
214 enum machine_mode, rtx, rtx,
215 rtx *, rtx *, rtx **));
216 static rtx simplify_giv_expr PARAMS ((const struct loop *, rtx, rtx *, int *));
217 static int general_induction_var PARAMS ((const struct loop *loop, rtx, rtx *,
218 rtx *, rtx *, rtx *, int, int *,
220 static int consec_sets_giv PARAMS ((const struct loop *, int, rtx,
221 rtx, rtx, rtx *, rtx *, rtx *, rtx *));
222 static int check_dbra_loop PARAMS ((struct loop *, int));
223 static rtx express_from_1 PARAMS ((rtx, rtx, rtx));
224 static rtx combine_givs_p PARAMS ((struct induction *, struct induction *));
225 static int cmp_combine_givs_stats PARAMS ((const PTR, const PTR));
226 static void combine_givs PARAMS ((struct loop_regs *, struct iv_class *));
227 static int product_cheap_p PARAMS ((rtx, rtx));
228 static int maybe_eliminate_biv PARAMS ((const struct loop *, struct iv_class *,
230 static int maybe_eliminate_biv_1 PARAMS ((const struct loop *, rtx, rtx,
231 struct iv_class *, int,
233 static int last_use_this_basic_block PARAMS ((rtx, rtx));
234 static void record_initial PARAMS ((rtx, rtx, void *));
235 static void update_reg_last_use PARAMS ((rtx, rtx));
236 static rtx next_insn_in_loop PARAMS ((const struct loop *, rtx));
237 static void loop_regs_scan PARAMS ((const struct loop *, int));
238 static int count_insns_in_loop PARAMS ((const struct loop *));
239 static void load_mems PARAMS ((const struct loop *));
240 static int insert_loop_mem PARAMS ((rtx *, void *));
241 static int replace_loop_mem PARAMS ((rtx *, void *));
242 static void replace_loop_mems PARAMS ((rtx, rtx, rtx));
243 static int replace_loop_reg PARAMS ((rtx *, void *));
244 static void replace_loop_regs PARAMS ((rtx insn, rtx, rtx));
245 static void note_reg_stored PARAMS ((rtx, rtx, void *));
246 static void try_copy_prop PARAMS ((const struct loop *, rtx, unsigned int));
247 static void try_swap_copy_prop PARAMS ((const struct loop *, rtx,
249 static int replace_label PARAMS ((rtx *, void *));
250 static rtx check_insn_for_givs PARAMS((struct loop *, rtx, int, int));
251 static rtx check_insn_for_bivs PARAMS((struct loop *, rtx, int, int));
252 static rtx gen_add_mult PARAMS ((rtx, rtx, rtx, rtx));
253 static void loop_regs_update PARAMS ((const struct loop *, rtx));
254 static int iv_add_mult_cost PARAMS ((rtx, rtx, rtx, rtx));
256 static rtx loop_insn_emit_after PARAMS((const struct loop *, basic_block,
258 static rtx loop_call_insn_emit_before PARAMS((const struct loop *,
259 basic_block, rtx, rtx));
260 static rtx loop_call_insn_hoist PARAMS((const struct loop *, rtx));
261 static rtx loop_insn_sink_or_swim PARAMS((const struct loop *, rtx));
263 static void loop_dump_aux PARAMS ((const struct loop *, FILE *, int));
264 static void loop_delete_insns PARAMS ((rtx, rtx));
265 void debug_ivs PARAMS ((const struct loop *));
266 void debug_iv_class PARAMS ((const struct iv_class *));
267 void debug_biv PARAMS ((const struct induction *));
268 void debug_giv PARAMS ((const struct induction *));
269 void debug_loop PARAMS ((const struct loop *));
270 void debug_loops PARAMS ((const struct loops *));
272 typedef struct rtx_pair
278 typedef struct loop_replace_args
285 /* Nonzero iff INSN is between START and END, inclusive. */
286 #define INSN_IN_RANGE_P(INSN, START, END) \
287 (INSN_UID (INSN) < max_uid_for_loop \
288 && INSN_LUID (INSN) >= INSN_LUID (START) \
289 && INSN_LUID (INSN) <= INSN_LUID (END))
291 /* Indirect_jump_in_function is computed once per function. */
292 static int indirect_jump_in_function;
293 static int indirect_jump_in_function_p PARAMS ((rtx));
295 static int compute_luids PARAMS ((rtx, rtx, int));
297 static int biv_elimination_giv_has_0_offset PARAMS ((struct induction *,
301 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
302 copy the value of the strength reduced giv to its original register. */
303 static int copy_cost;
305 /* Cost of using a register, to normalize the benefits of a giv. */
306 static int reg_address_cost;
311 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
313 reg_address_cost = address_cost (reg, SImode);
315 copy_cost = COSTS_N_INSNS (1);
318 /* Compute the mapping from uids to luids.
319 LUIDs are numbers assigned to insns, like uids,
320 except that luids increase monotonically through the code.
321 Start at insn START and stop just before END. Assign LUIDs
322 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
324 compute_luids (start, end, prev_luid)
331 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
333 if (INSN_UID (insn) >= max_uid_for_loop)
335 /* Don't assign luids to line-number NOTEs, so that the distance in
336 luids between two insns is not affected by -g. */
337 if (GET_CODE (insn) != NOTE
338 || NOTE_LINE_NUMBER (insn) <= 0)
339 uid_luid[INSN_UID (insn)] = ++i;
341 /* Give a line number note the same luid as preceding insn. */
342 uid_luid[INSN_UID (insn)] = i;
347 /* Entry point of this file. Perform loop optimization
348 on the current function. F is the first insn of the function
349 and DUMPFILE is a stream for output of a trace of actions taken
350 (or 0 if none should be output). */
353 loop_optimize (f, dumpfile, flags)
354 /* f is the first instruction of a chain of insns for one function */
361 struct loops loops_data;
362 struct loops *loops = &loops_data;
363 struct loop_info *loops_info;
365 loop_dump_stream = dumpfile;
367 init_recog_no_volatile ();
369 max_reg_before_loop = max_reg_num ();
370 loop_max_reg = max_reg_before_loop;
374 /* Count the number of loops. */
377 for (insn = f; insn; insn = NEXT_INSN (insn))
379 if (GET_CODE (insn) == NOTE
380 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
384 /* Don't waste time if no loops. */
385 if (max_loop_num == 0)
388 loops->num = max_loop_num;
390 /* Get size to use for tables indexed by uids.
391 Leave some space for labels allocated by find_and_verify_loops. */
392 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
394 uid_luid = (int *) xcalloc (max_uid_for_loop, sizeof (int));
395 uid_loop = (struct loop **) xcalloc (max_uid_for_loop,
396 sizeof (struct loop *));
398 /* Allocate storage for array of loops. */
399 loops->array = (struct loop *)
400 xcalloc (loops->num, sizeof (struct loop));
402 /* Find and process each loop.
403 First, find them, and record them in order of their beginnings. */
404 find_and_verify_loops (f, loops);
406 /* Allocate and initialize auxiliary loop information. */
407 loops_info = xcalloc (loops->num, sizeof (struct loop_info));
408 for (i = 0; i < loops->num; i++)
409 loops->array[i].aux = loops_info + i;
411 /* Now find all register lifetimes. This must be done after
412 find_and_verify_loops, because it might reorder the insns in the
414 reg_scan (f, max_reg_before_loop, 1);
416 /* This must occur after reg_scan so that registers created by gcse
417 will have entries in the register tables.
419 We could have added a call to reg_scan after gcse_main in toplev.c,
420 but moving this call to init_alias_analysis is more efficient. */
421 init_alias_analysis ();
423 /* See if we went too far. Note that get_max_uid already returns
424 one more that the maximum uid of all insn. */
425 if (get_max_uid () > max_uid_for_loop)
427 /* Now reset it to the actual size we need. See above. */
428 max_uid_for_loop = get_max_uid ();
430 /* find_and_verify_loops has already called compute_luids, but it
431 might have rearranged code afterwards, so we need to recompute
433 max_luid = compute_luids (f, NULL_RTX, 0);
435 /* Don't leave gaps in uid_luid for insns that have been
436 deleted. It is possible that the first or last insn
437 using some register has been deleted by cross-jumping.
438 Make sure that uid_luid for that former insn's uid
439 points to the general area where that insn used to be. */
440 for (i = 0; i < max_uid_for_loop; i++)
442 uid_luid[0] = uid_luid[i];
443 if (uid_luid[0] != 0)
446 for (i = 0; i < max_uid_for_loop; i++)
447 if (uid_luid[i] == 0)
448 uid_luid[i] = uid_luid[i - 1];
450 /* Determine if the function has indirect jump. On some systems
451 this prevents low overhead loop instructions from being used. */
452 indirect_jump_in_function = indirect_jump_in_function_p (f);
454 /* Now scan the loops, last ones first, since this means inner ones are done
455 before outer ones. */
456 for (i = max_loop_num - 1; i >= 0; i--)
458 struct loop *loop = &loops->array[i];
460 if (! loop->invalid && loop->end)
461 scan_loop (loop, flags);
464 /* If there were lexical blocks inside the loop, they have been
465 replicated. We will now have more than one NOTE_INSN_BLOCK_BEG
466 and NOTE_INSN_BLOCK_END for each such block. We must duplicate
467 the BLOCKs as well. */
468 if (write_symbols != NO_DEBUG)
471 end_alias_analysis ();
480 /* Returns the next insn, in execution order, after INSN. START and
481 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
482 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
483 insn-stream; it is used with loops that are entered near the
487 next_insn_in_loop (loop, insn)
488 const struct loop *loop;
491 insn = NEXT_INSN (insn);
493 if (insn == loop->end)
496 /* Go to the top of the loop, and continue there. */
503 if (insn == loop->scan_start)
510 /* Optimize one loop described by LOOP. */
512 /* ??? Could also move memory writes out of loops if the destination address
513 is invariant, the source is invariant, the memory write is not volatile,
514 and if we can prove that no read inside the loop can read this address
515 before the write occurs. If there is a read of this address after the
516 write, then we can also mark the memory read as invariant. */
519 scan_loop (loop, flags)
523 struct loop_info *loop_info = LOOP_INFO (loop);
524 struct loop_regs *regs = LOOP_REGS (loop);
526 rtx loop_start = loop->start;
527 rtx loop_end = loop->end;
529 /* 1 if we are scanning insns that could be executed zero times. */
531 /* 1 if we are scanning insns that might never be executed
532 due to a subroutine call which might exit before they are reached. */
534 /* Jump insn that enters the loop, or 0 if control drops in. */
535 rtx loop_entry_jump = 0;
536 /* Number of insns in the loop. */
539 rtx temp, update_start, update_end;
540 /* The SET from an insn, if it is the only SET in the insn. */
542 /* Chain describing insns movable in current loop. */
543 struct loop_movables *movables = LOOP_MOVABLES (loop);
544 /* Ratio of extra register life span we can justify
545 for saving an instruction. More if loop doesn't call subroutines
546 since in that case saving an insn makes more difference
547 and more registers are available. */
549 /* Nonzero if we are scanning instructions in a sub-loop. */
557 /* Determine whether this loop starts with a jump down to a test at
558 the end. This will occur for a small number of loops with a test
559 that is too complex to duplicate in front of the loop.
561 We search for the first insn or label in the loop, skipping NOTEs.
562 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
563 (because we might have a loop executed only once that contains a
564 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
565 (in case we have a degenerate loop).
567 Note that if we mistakenly think that a loop is entered at the top
568 when, in fact, it is entered at the exit test, the only effect will be
569 slightly poorer optimization. Making the opposite error can generate
570 incorrect code. Since very few loops now start with a jump to the
571 exit test, the code here to detect that case is very conservative. */
573 for (p = NEXT_INSN (loop_start);
575 && GET_CODE (p) != CODE_LABEL && ! INSN_P (p)
576 && (GET_CODE (p) != NOTE
577 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
578 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
582 loop->scan_start = p;
584 /* If loop end is the end of the current function, then emit a
585 NOTE_INSN_DELETED after loop_end and set loop->sink to the dummy
586 note insn. This is the position we use when sinking insns out of
588 if (NEXT_INSN (loop->end) != 0)
589 loop->sink = NEXT_INSN (loop->end);
591 loop->sink = emit_note_after (NOTE_INSN_DELETED, loop->end);
593 /* Set up variables describing this loop. */
595 threshold = (loop_info->has_call ? 1 : 2) * (1 + n_non_fixed_regs);
597 /* If loop has a jump before the first label,
598 the true entry is the target of that jump.
599 Start scan from there.
600 But record in LOOP->TOP the place where the end-test jumps
601 back to so we can scan that after the end of the loop. */
602 if (GET_CODE (p) == JUMP_INSN)
606 /* Loop entry must be unconditional jump (and not a RETURN) */
607 if (any_uncondjump_p (p)
608 && JUMP_LABEL (p) != 0
609 /* Check to see whether the jump actually
610 jumps out of the loop (meaning it's no loop).
611 This case can happen for things like
612 do {..} while (0). If this label was generated previously
613 by loop, we can't tell anything about it and have to reject
615 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, loop_end))
617 loop->top = next_label (loop->scan_start);
618 loop->scan_start = JUMP_LABEL (p);
622 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
623 as required by loop_reg_used_before_p. So skip such loops. (This
624 test may never be true, but it's best to play it safe.)
626 Also, skip loops where we do not start scanning at a label. This
627 test also rejects loops starting with a JUMP_INSN that failed the
630 if (INSN_UID (loop->scan_start) >= max_uid_for_loop
631 || GET_CODE (loop->scan_start) != CODE_LABEL)
633 if (loop_dump_stream)
634 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
635 INSN_UID (loop_start), INSN_UID (loop_end));
639 /* Allocate extra space for REGs that might be created by load_mems.
640 We allocate a little extra slop as well, in the hopes that we
641 won't have to reallocate the regs array. */
642 loop_regs_scan (loop, loop_info->mems_idx + 16);
643 insn_count = count_insns_in_loop (loop);
645 if (loop_dump_stream)
647 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
648 INSN_UID (loop_start), INSN_UID (loop_end), insn_count);
650 fprintf (loop_dump_stream, "Continue at insn %d.\n",
651 INSN_UID (loop->cont));
654 /* Scan through the loop finding insns that are safe to move.
655 Set REGS->ARRAY[I].SET_IN_LOOP negative for the reg I being set, so that
656 this reg will be considered invariant for subsequent insns.
657 We consider whether subsequent insns use the reg
658 in deciding whether it is worth actually moving.
660 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
661 and therefore it is possible that the insns we are scanning
662 would never be executed. At such times, we must make sure
663 that it is safe to execute the insn once instead of zero times.
664 When MAYBE_NEVER is 0, all insns will be executed at least once
665 so that is not a problem. */
667 for (p = next_insn_in_loop (loop, loop->scan_start);
669 p = next_insn_in_loop (loop, p))
671 if (GET_CODE (p) == INSN
672 && (set = single_set (p))
673 && GET_CODE (SET_DEST (set)) == REG
674 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
679 rtx src = SET_SRC (set);
680 rtx dependencies = 0;
682 /* Figure out what to use as a source of this insn. If a REG_EQUIV
683 note is given or if a REG_EQUAL note with a constant operand is
684 specified, use it as the source and mark that we should move
685 this insn by calling emit_move_insn rather that duplicating the
688 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
690 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
692 src = XEXP (temp, 0), move_insn = 1;
695 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
696 if (temp && CONSTANT_P (XEXP (temp, 0)))
697 src = XEXP (temp, 0), move_insn = 1;
698 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
700 src = XEXP (temp, 0);
701 /* A libcall block can use regs that don't appear in
702 the equivalent expression. To move the libcall,
703 we must move those regs too. */
704 dependencies = libcall_other_reg (p, src);
708 /* For parallels, add any possible uses to the depencies, as we can't move
709 the insn without resolving them first. */
710 if (GET_CODE (PATTERN (p)) == PARALLEL)
712 for (i = 0; i < XVECLEN (PATTERN (p), 0); i++)
714 rtx x = XVECEXP (PATTERN (p), 0, i);
715 if (GET_CODE (x) == USE)
716 dependencies = gen_rtx_EXPR_LIST (VOIDmode, XEXP (x, 0), dependencies);
720 /* Don't try to optimize a register that was made
721 by loop-optimization for an inner loop.
722 We don't know its life-span, so we can't compute the benefit. */
723 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
725 else if (/* The register is used in basic blocks other
726 than the one where it is set (meaning that
727 something after this point in the loop might
728 depend on its value before the set). */
729 ! reg_in_basic_block_p (p, SET_DEST (set))
730 /* And the set is not guaranteed to be executed once
731 the loop starts, or the value before the set is
732 needed before the set occurs...
734 ??? Note we have quadratic behaviour here, mitigated
735 by the fact that the previous test will often fail for
736 large loops. Rather than re-scanning the entire loop
737 each time for register usage, we should build tables
738 of the register usage and use them here instead. */
740 || loop_reg_used_before_p (loop, set, p)))
741 /* It is unsafe to move the set.
743 This code used to consider it OK to move a set of a variable
744 which was not created by the user and not used in an exit test.
745 That behavior is incorrect and was removed. */
747 else if ((tem = loop_invariant_p (loop, src))
748 && (dependencies == 0
749 || (tem2 = loop_invariant_p (loop, dependencies)) != 0)
750 && (regs->array[REGNO (SET_DEST (set))].set_in_loop == 1
752 = consec_sets_invariant_p
753 (loop, SET_DEST (set),
754 regs->array[REGNO (SET_DEST (set))].set_in_loop,
756 /* If the insn can cause a trap (such as divide by zero),
757 can't move it unless it's guaranteed to be executed
758 once loop is entered. Even a function call might
759 prevent the trap insn from being reached
760 (since it might exit!) */
761 && ! ((maybe_never || call_passed)
762 && may_trap_p (src)))
764 register struct movable *m;
765 register int regno = REGNO (SET_DEST (set));
767 /* A potential lossage is where we have a case where two insns
768 can be combined as long as they are both in the loop, but
769 we move one of them outside the loop. For large loops,
770 this can lose. The most common case of this is the address
771 of a function being called.
773 Therefore, if this register is marked as being used exactly
774 once if we are in a loop with calls (a "large loop"), see if
775 we can replace the usage of this register with the source
776 of this SET. If we can, delete this insn.
778 Don't do this if P has a REG_RETVAL note or if we have
779 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
781 if (loop_info->has_call
782 && regs->array[regno].single_usage != 0
783 && regs->array[regno].single_usage != const0_rtx
784 && REGNO_FIRST_UID (regno) == INSN_UID (p)
785 && (REGNO_LAST_UID (regno)
786 == INSN_UID (regs->array[regno].single_usage))
787 && regs->array[regno].set_in_loop == 1
788 && GET_CODE (SET_SRC (set)) != ASM_OPERANDS
789 && ! side_effects_p (SET_SRC (set))
790 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
791 && (! SMALL_REGISTER_CLASSES
792 || (! (GET_CODE (SET_SRC (set)) == REG
793 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
794 /* This test is not redundant; SET_SRC (set) might be
795 a call-clobbered register and the life of REGNO
796 might span a call. */
797 && ! modified_between_p (SET_SRC (set), p,
798 regs->array[regno].single_usage)
799 && no_labels_between_p (p, regs->array[regno].single_usage)
800 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
801 regs->array[regno].single_usage))
803 /* Replace any usage in a REG_EQUAL note. Must copy the
804 new source, so that we don't get rtx sharing between the
805 SET_SOURCE and REG_NOTES of insn p. */
806 REG_NOTES (regs->array[regno].single_usage)
807 = replace_rtx (REG_NOTES (regs->array[regno].single_usage),
808 SET_DEST (set), copy_rtx (SET_SRC (set)));
811 regs->array[regno].set_in_loop = 0;
815 m = (struct movable *) xmalloc (sizeof (struct movable));
819 m->dependencies = dependencies;
820 m->set_dest = SET_DEST (set);
822 m->consec = regs->array[REGNO (SET_DEST (set))].set_in_loop - 1;
826 m->move_insn = move_insn;
827 m->move_insn_first = 0;
828 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
829 m->savemode = VOIDmode;
831 /* Set M->cond if either loop_invariant_p
832 or consec_sets_invariant_p returned 2
833 (only conditionally invariant). */
834 m->cond = ((tem | tem1 | tem2) > 1);
835 m->global = LOOP_REG_GLOBAL_P (loop, regno);
837 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
838 m->savings = regs->array[regno].n_times_set;
839 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
840 m->savings += libcall_benefit (p);
841 regs->array[regno].set_in_loop = move_insn ? -2 : -1;
842 /* Add M to the end of the chain MOVABLES. */
843 loop_movables_add (movables, m);
847 /* It is possible for the first instruction to have a
848 REG_EQUAL note but a non-invariant SET_SRC, so we must
849 remember the status of the first instruction in case
850 the last instruction doesn't have a REG_EQUAL note. */
851 m->move_insn_first = m->move_insn;
853 /* Skip this insn, not checking REG_LIBCALL notes. */
854 p = next_nonnote_insn (p);
855 /* Skip the consecutive insns, if there are any. */
856 p = skip_consec_insns (p, m->consec);
857 /* Back up to the last insn of the consecutive group. */
858 p = prev_nonnote_insn (p);
860 /* We must now reset m->move_insn, m->is_equiv, and possibly
861 m->set_src to correspond to the effects of all the
863 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
865 m->set_src = XEXP (temp, 0), m->move_insn = 1;
868 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
869 if (temp && CONSTANT_P (XEXP (temp, 0)))
870 m->set_src = XEXP (temp, 0), m->move_insn = 1;
875 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
878 /* If this register is always set within a STRICT_LOW_PART
879 or set to zero, then its high bytes are constant.
880 So clear them outside the loop and within the loop
881 just load the low bytes.
882 We must check that the machine has an instruction to do so.
883 Also, if the value loaded into the register
884 depends on the same register, this cannot be done. */
885 else if (SET_SRC (set) == const0_rtx
886 && GET_CODE (NEXT_INSN (p)) == INSN
887 && (set1 = single_set (NEXT_INSN (p)))
888 && GET_CODE (set1) == SET
889 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
890 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
891 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
893 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
895 register int regno = REGNO (SET_DEST (set));
896 if (regs->array[regno].set_in_loop == 2)
898 register struct movable *m;
899 m = (struct movable *) xmalloc (sizeof (struct movable));
902 m->set_dest = SET_DEST (set);
909 m->move_insn_first = 0;
911 /* If the insn may not be executed on some cycles,
912 we can't clear the whole reg; clear just high part.
913 Not even if the reg is used only within this loop.
920 Clearing x before the inner loop could clobber a value
921 being saved from the last time around the outer loop.
922 However, if the reg is not used outside this loop
923 and all uses of the register are in the same
924 basic block as the store, there is no problem.
926 If this insn was made by loop, we don't know its
927 INSN_LUID and hence must make a conservative
929 m->global = (INSN_UID (p) >= max_uid_for_loop
930 || LOOP_REG_GLOBAL_P (loop, regno)
931 || (labels_in_range_p
932 (p, REGNO_FIRST_LUID (regno))));
933 if (maybe_never && m->global)
934 m->savemode = GET_MODE (SET_SRC (set1));
936 m->savemode = VOIDmode;
940 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
942 regs->array[regno].set_in_loop = -1;
943 /* Add M to the end of the chain MOVABLES. */
944 loop_movables_add (movables, m);
948 /* Past a call insn, we get to insns which might not be executed
949 because the call might exit. This matters for insns that trap.
950 Constant and pure call insns always return, so they don't count. */
951 else if (GET_CODE (p) == CALL_INSN && ! CONST_OR_PURE_CALL_P (p))
953 /* Past a label or a jump, we get to insns for which we
954 can't count on whether or how many times they will be
955 executed during each iteration. Therefore, we can
956 only move out sets of trivial variables
957 (those not used after the loop). */
958 /* Similar code appears twice in strength_reduce. */
959 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
960 /* If we enter the loop in the middle, and scan around to the
961 beginning, don't set maybe_never for that. This must be an
962 unconditional jump, otherwise the code at the top of the
963 loop might never be executed. Unconditional jumps are
964 followed by a barrier then the loop_end. */
965 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop->top
966 && NEXT_INSN (NEXT_INSN (p)) == loop_end
967 && any_uncondjump_p (p)))
969 else if (GET_CODE (p) == NOTE)
971 /* At the virtual top of a converted loop, insns are again known to
972 be executed: logically, the loop begins here even though the exit
973 code has been duplicated. */
974 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
975 maybe_never = call_passed = 0;
976 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
978 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
983 /* If one movable subsumes another, ignore that other. */
985 ignore_some_movables (movables);
987 /* For each movable insn, see if the reg that it loads
988 leads when it dies right into another conditionally movable insn.
989 If so, record that the second insn "forces" the first one,
990 since the second can be moved only if the first is. */
992 force_movables (movables);
994 /* See if there are multiple movable insns that load the same value.
995 If there are, make all but the first point at the first one
996 through the `match' field, and add the priorities of them
997 all together as the priority of the first. */
999 combine_movables (movables, regs);
1001 /* Now consider each movable insn to decide whether it is worth moving.
1002 Store 0 in regs->array[I].set_in_loop for each reg I that is moved.
1004 Generally this increases code size, so do not move moveables when
1005 optimizing for code size. */
1007 if (! optimize_size)
1008 move_movables (loop, movables, threshold, insn_count);
1010 /* Now candidates that still are negative are those not moved.
1011 Change regs->array[I].set_in_loop to indicate that those are not actually
1013 for (i = 0; i < regs->num; i++)
1014 if (regs->array[i].set_in_loop < 0)
1015 regs->array[i].set_in_loop = regs->array[i].n_times_set;
1017 /* Now that we've moved some things out of the loop, we might be able to
1018 hoist even more memory references. */
1021 /* Recalculate regs->array if load_mems has created new registers. */
1022 if (max_reg_num () > regs->num)
1023 loop_regs_scan (loop, 0);
1025 for (update_start = loop_start;
1026 PREV_INSN (update_start)
1027 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1028 update_start = PREV_INSN (update_start))
1030 update_end = NEXT_INSN (loop_end);
1032 reg_scan_update (update_start, update_end, loop_max_reg);
1033 loop_max_reg = max_reg_num ();
1035 if (flag_strength_reduce)
1037 if (update_end && GET_CODE (update_end) == CODE_LABEL)
1038 /* Ensure our label doesn't go away. */
1039 LABEL_NUSES (update_end)++;
1041 strength_reduce (loop, flags);
1043 reg_scan_update (update_start, update_end, loop_max_reg);
1044 loop_max_reg = max_reg_num ();
1046 if (update_end && GET_CODE (update_end) == CODE_LABEL
1047 && --LABEL_NUSES (update_end) == 0)
1048 delete_related_insns (update_end);
1052 /* The movable information is required for strength reduction. */
1053 loop_movables_free (movables);
1060 /* Add elements to *OUTPUT to record all the pseudo-regs
1061 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1064 record_excess_regs (in_this, not_in_this, output)
1065 rtx in_this, not_in_this;
1072 code = GET_CODE (in_this);
1086 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1087 && ! reg_mentioned_p (in_this, not_in_this))
1088 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1095 fmt = GET_RTX_FORMAT (code);
1096 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1103 for (j = 0; j < XVECLEN (in_this, i); j++)
1104 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1108 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1114 /* Check what regs are referred to in the libcall block ending with INSN,
1115 aside from those mentioned in the equivalent value.
1116 If there are none, return 0.
1117 If there are one or more, return an EXPR_LIST containing all of them. */
1120 libcall_other_reg (insn, equiv)
1123 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1124 rtx p = XEXP (note, 0);
1127 /* First, find all the regs used in the libcall block
1128 that are not mentioned as inputs to the result. */
1132 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1133 || GET_CODE (p) == CALL_INSN)
1134 record_excess_regs (PATTERN (p), equiv, &output);
1141 /* Return 1 if all uses of REG
1142 are between INSN and the end of the basic block. */
1145 reg_in_basic_block_p (insn, reg)
1148 int regno = REGNO (reg);
1151 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1154 /* Search this basic block for the already recorded last use of the reg. */
1155 for (p = insn; p; p = NEXT_INSN (p))
1157 switch (GET_CODE (p))
1164 /* Ordinary insn: if this is the last use, we win. */
1165 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1170 /* Jump insn: if this is the last use, we win. */
1171 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1173 /* Otherwise, it's the end of the basic block, so we lose. */
1178 /* It's the end of the basic block, so we lose. */
1186 /* The "last use" that was recorded can't be found after the first
1187 use. This can happen when the last use was deleted while
1188 processing an inner loop, this inner loop was then completely
1189 unrolled, and the outer loop is always exited after the inner loop,
1190 so that everything after the first use becomes a single basic block. */
1194 /* Compute the benefit of eliminating the insns in the block whose
1195 last insn is LAST. This may be a group of insns used to compute a
1196 value directly or can contain a library call. */
1199 libcall_benefit (last)
1205 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1206 insn != last; insn = NEXT_INSN (insn))
1208 if (GET_CODE (insn) == CALL_INSN)
1209 benefit += 10; /* Assume at least this many insns in a library
1211 else if (GET_CODE (insn) == INSN
1212 && GET_CODE (PATTERN (insn)) != USE
1213 && GET_CODE (PATTERN (insn)) != CLOBBER)
1220 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1223 skip_consec_insns (insn, count)
1227 for (; count > 0; count--)
1231 /* If first insn of libcall sequence, skip to end. */
1232 /* Do this at start of loop, since INSN is guaranteed to
1234 if (GET_CODE (insn) != NOTE
1235 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1236 insn = XEXP (temp, 0);
1239 insn = NEXT_INSN (insn);
1240 while (GET_CODE (insn) == NOTE);
1246 /* Ignore any movable whose insn falls within a libcall
1247 which is part of another movable.
1248 We make use of the fact that the movable for the libcall value
1249 was made later and so appears later on the chain. */
1252 ignore_some_movables (movables)
1253 struct loop_movables *movables;
1255 register struct movable *m, *m1;
1257 for (m = movables->head; m; m = m->next)
1259 /* Is this a movable for the value of a libcall? */
1260 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1264 /* Check for earlier movables inside that range,
1265 and mark them invalid. We cannot use LUIDs here because
1266 insns created by loop.c for prior loops don't have LUIDs.
1267 Rather than reject all such insns from movables, we just
1268 explicitly check each insn in the libcall (since invariant
1269 libcalls aren't that common). */
1270 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1271 for (m1 = movables->head; m1 != m; m1 = m1->next)
1272 if (m1->insn == insn)
1278 /* For each movable insn, see if the reg that it loads
1279 leads when it dies right into another conditionally movable insn.
1280 If so, record that the second insn "forces" the first one,
1281 since the second can be moved only if the first is. */
1284 force_movables (movables)
1285 struct loop_movables *movables;
1287 register struct movable *m, *m1;
1288 for (m1 = movables->head; m1; m1 = m1->next)
1289 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1290 if (!m1->partial && !m1->done)
1292 int regno = m1->regno;
1293 for (m = m1->next; m; m = m->next)
1294 /* ??? Could this be a bug? What if CSE caused the
1295 register of M1 to be used after this insn?
1296 Since CSE does not update regno_last_uid,
1297 this insn M->insn might not be where it dies.
1298 But very likely this doesn't matter; what matters is
1299 that M's reg is computed from M1's reg. */
1300 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1303 if (m != 0 && m->set_src == m1->set_dest
1304 /* If m->consec, m->set_src isn't valid. */
1308 /* Increase the priority of the moving the first insn
1309 since it permits the second to be moved as well. */
1313 m1->lifetime += m->lifetime;
1314 m1->savings += m->savings;
1319 /* Find invariant expressions that are equal and can be combined into
1323 combine_movables (movables, regs)
1324 struct loop_movables *movables;
1325 struct loop_regs *regs;
1327 register struct movable *m;
1328 char *matched_regs = (char *) xmalloc (regs->num);
1329 enum machine_mode mode;
1331 /* Regs that are set more than once are not allowed to match
1332 or be matched. I'm no longer sure why not. */
1333 /* Perhaps testing m->consec_sets would be more appropriate here? */
1335 for (m = movables->head; m; m = m->next)
1336 if (m->match == 0 && regs->array[m->regno].n_times_set == 1
1339 register struct movable *m1;
1340 int regno = m->regno;
1342 memset (matched_regs, 0, regs->num);
1343 matched_regs[regno] = 1;
1345 /* We want later insns to match the first one. Don't make the first
1346 one match any later ones. So start this loop at m->next. */
1347 for (m1 = m->next; m1; m1 = m1->next)
1348 if (m != m1 && m1->match == 0
1349 && regs->array[m1->regno].n_times_set == 1
1350 /* A reg used outside the loop mustn't be eliminated. */
1352 /* A reg used for zero-extending mustn't be eliminated. */
1354 && (matched_regs[m1->regno]
1357 /* Can combine regs with different modes loaded from the
1358 same constant only if the modes are the same or
1359 if both are integer modes with M wider or the same
1360 width as M1. The check for integer is redundant, but
1361 safe, since the only case of differing destination
1362 modes with equal sources is when both sources are
1363 VOIDmode, i.e., CONST_INT. */
1364 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1365 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1366 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1367 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1368 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1369 /* See if the source of M1 says it matches M. */
1370 && ((GET_CODE (m1->set_src) == REG
1371 && matched_regs[REGNO (m1->set_src)])
1372 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1374 && ((m->dependencies == m1->dependencies)
1375 || rtx_equal_p (m->dependencies, m1->dependencies)))
1377 m->lifetime += m1->lifetime;
1378 m->savings += m1->savings;
1381 matched_regs[m1->regno] = 1;
1385 /* Now combine the regs used for zero-extension.
1386 This can be done for those not marked `global'
1387 provided their lives don't overlap. */
1389 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1390 mode = GET_MODE_WIDER_MODE (mode))
1392 register struct movable *m0 = 0;
1394 /* Combine all the registers for extension from mode MODE.
1395 Don't combine any that are used outside this loop. */
1396 for (m = movables->head; m; m = m->next)
1397 if (m->partial && ! m->global
1398 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1400 register struct movable *m1;
1401 int first = REGNO_FIRST_LUID (m->regno);
1402 int last = REGNO_LAST_LUID (m->regno);
1406 /* First one: don't check for overlap, just record it. */
1411 /* Make sure they extend to the same mode.
1412 (Almost always true.) */
1413 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1416 /* We already have one: check for overlap with those
1417 already combined together. */
1418 for (m1 = movables->head; m1 != m; m1 = m1->next)
1419 if (m1 == m0 || (m1->partial && m1->match == m0))
1420 if (! (REGNO_FIRST_LUID (m1->regno) > last
1421 || REGNO_LAST_LUID (m1->regno) < first))
1424 /* No overlap: we can combine this with the others. */
1425 m0->lifetime += m->lifetime;
1426 m0->savings += m->savings;
1436 free (matched_regs);
1439 /* Returns the number of movable instructions in LOOP that were not
1440 moved outside the loop. */
1443 num_unmoved_movables (loop)
1444 const struct loop *loop;
1449 for (m = LOOP_MOVABLES (loop)->head; m; m = m->next)
1457 /* Return 1 if regs X and Y will become the same if moved. */
1460 regs_match_p (x, y, movables)
1462 struct loop_movables *movables;
1464 unsigned int xn = REGNO (x);
1465 unsigned int yn = REGNO (y);
1466 struct movable *mx, *my;
1468 for (mx = movables->head; mx; mx = mx->next)
1469 if (mx->regno == xn)
1472 for (my = movables->head; my; my = my->next)
1473 if (my->regno == yn)
1477 && ((mx->match == my->match && mx->match != 0)
1479 || mx == my->match));
1482 /* Return 1 if X and Y are identical-looking rtx's.
1483 This is the Lisp function EQUAL for rtx arguments.
1485 If two registers are matching movables or a movable register and an
1486 equivalent constant, consider them equal. */
1489 rtx_equal_for_loop_p (x, y, movables, regs)
1491 struct loop_movables *movables;
1492 struct loop_regs *regs;
1496 register struct movable *m;
1497 register enum rtx_code code;
1498 register const char *fmt;
1502 if (x == 0 || y == 0)
1505 code = GET_CODE (x);
1507 /* If we have a register and a constant, they may sometimes be
1509 if (GET_CODE (x) == REG && regs->array[REGNO (x)].set_in_loop == -2
1512 for (m = movables->head; m; m = m->next)
1513 if (m->move_insn && m->regno == REGNO (x)
1514 && rtx_equal_p (m->set_src, y))
1517 else if (GET_CODE (y) == REG && regs->array[REGNO (y)].set_in_loop == -2
1520 for (m = movables->head; m; m = m->next)
1521 if (m->move_insn && m->regno == REGNO (y)
1522 && rtx_equal_p (m->set_src, x))
1526 /* Otherwise, rtx's of different codes cannot be equal. */
1527 if (code != GET_CODE (y))
1530 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1531 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1533 if (GET_MODE (x) != GET_MODE (y))
1536 /* These three types of rtx's can be compared nonrecursively. */
1538 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1540 if (code == LABEL_REF)
1541 return XEXP (x, 0) == XEXP (y, 0);
1542 if (code == SYMBOL_REF)
1543 return XSTR (x, 0) == XSTR (y, 0);
1545 /* Compare the elements. If any pair of corresponding elements
1546 fail to match, return 0 for the whole things. */
1548 fmt = GET_RTX_FORMAT (code);
1549 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1554 if (XWINT (x, i) != XWINT (y, i))
1559 if (XINT (x, i) != XINT (y, i))
1564 /* Two vectors must have the same length. */
1565 if (XVECLEN (x, i) != XVECLEN (y, i))
1568 /* And the corresponding elements must match. */
1569 for (j = 0; j < XVECLEN (x, i); j++)
1570 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
1571 movables, regs) == 0)
1576 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables, regs)
1582 if (strcmp (XSTR (x, i), XSTR (y, i)))
1587 /* These are just backpointers, so they don't matter. */
1593 /* It is believed that rtx's at this level will never
1594 contain anything but integers and other rtx's,
1595 except for within LABEL_REFs and SYMBOL_REFs. */
1603 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1604 insns in INSNS which use the reference. LABEL_NUSES for CODE_LABEL
1605 references is incremented once for each added note. */
1608 add_label_notes (x, insns)
1612 enum rtx_code code = GET_CODE (x);
1617 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1619 /* This code used to ignore labels that referred to dispatch tables to
1620 avoid flow generating (slighly) worse code.
1622 We no longer ignore such label references (see LABEL_REF handling in
1623 mark_jump_label for additional information). */
1624 for (insn = insns; insn; insn = NEXT_INSN (insn))
1625 if (reg_mentioned_p (XEXP (x, 0), insn))
1627 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, XEXP (x, 0),
1629 if (LABEL_P (XEXP (x, 0)))
1630 LABEL_NUSES (XEXP (x, 0))++;
1634 fmt = GET_RTX_FORMAT (code);
1635 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1638 add_label_notes (XEXP (x, i), insns);
1639 else if (fmt[i] == 'E')
1640 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1641 add_label_notes (XVECEXP (x, i, j), insns);
1645 /* Scan MOVABLES, and move the insns that deserve to be moved.
1646 If two matching movables are combined, replace one reg with the
1647 other throughout. */
1650 move_movables (loop, movables, threshold, insn_count)
1652 struct loop_movables *movables;
1656 struct loop_regs *regs = LOOP_REGS (loop);
1657 int nregs = regs->num;
1659 register struct movable *m;
1661 rtx loop_start = loop->start;
1662 rtx loop_end = loop->end;
1663 /* Map of pseudo-register replacements to handle combining
1664 when we move several insns that load the same value
1665 into different pseudo-registers. */
1666 rtx *reg_map = (rtx *) xcalloc (nregs, sizeof (rtx));
1667 char *already_moved = (char *) xcalloc (nregs, sizeof (char));
1669 for (m = movables->head; m; m = m->next)
1671 /* Describe this movable insn. */
1673 if (loop_dump_stream)
1675 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1676 INSN_UID (m->insn), m->regno, m->lifetime);
1678 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1680 fprintf (loop_dump_stream, "cond ");
1682 fprintf (loop_dump_stream, "force ");
1684 fprintf (loop_dump_stream, "global ");
1686 fprintf (loop_dump_stream, "done ");
1688 fprintf (loop_dump_stream, "move-insn ");
1690 fprintf (loop_dump_stream, "matches %d ",
1691 INSN_UID (m->match->insn));
1693 fprintf (loop_dump_stream, "forces %d ",
1694 INSN_UID (m->forces->insn));
1697 /* Ignore the insn if it's already done (it matched something else).
1698 Otherwise, see if it is now safe to move. */
1702 || (1 == loop_invariant_p (loop, m->set_src)
1703 && (m->dependencies == 0
1704 || 1 == loop_invariant_p (loop, m->dependencies))
1706 || 1 == consec_sets_invariant_p (loop, m->set_dest,
1709 && (! m->forces || m->forces->done))
1713 int savings = m->savings;
1715 /* We have an insn that is safe to move.
1716 Compute its desirability. */
1721 if (loop_dump_stream)
1722 fprintf (loop_dump_stream, "savings %d ", savings);
1724 if (regs->array[regno].moved_once && loop_dump_stream)
1725 fprintf (loop_dump_stream, "halved since already moved ");
1727 /* An insn MUST be moved if we already moved something else
1728 which is safe only if this one is moved too: that is,
1729 if already_moved[REGNO] is nonzero. */
1731 /* An insn is desirable to move if the new lifetime of the
1732 register is no more than THRESHOLD times the old lifetime.
1733 If it's not desirable, it means the loop is so big
1734 that moving won't speed things up much,
1735 and it is liable to make register usage worse. */
1737 /* It is also desirable to move if it can be moved at no
1738 extra cost because something else was already moved. */
1740 if (already_moved[regno]
1741 || flag_move_all_movables
1742 || (threshold * savings * m->lifetime) >=
1743 (regs->array[regno].moved_once ? insn_count * 2 : insn_count)
1744 || (m->forces && m->forces->done
1745 && regs->array[m->forces->regno].n_times_set == 1))
1748 register struct movable *m1;
1749 rtx first = NULL_RTX;
1751 /* Now move the insns that set the reg. */
1753 if (m->partial && m->match)
1757 /* Find the end of this chain of matching regs.
1758 Thus, we load each reg in the chain from that one reg.
1759 And that reg is loaded with 0 directly,
1760 since it has ->match == 0. */
1761 for (m1 = m; m1->match; m1 = m1->match);
1762 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1763 SET_DEST (PATTERN (m1->insn)));
1764 i1 = loop_insn_hoist (loop, newpat);
1766 /* Mark the moved, invariant reg as being allowed to
1767 share a hard reg with the other matching invariant. */
1768 REG_NOTES (i1) = REG_NOTES (m->insn);
1769 r1 = SET_DEST (PATTERN (m->insn));
1770 r2 = SET_DEST (PATTERN (m1->insn));
1772 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1773 gen_rtx_EXPR_LIST (VOIDmode, r2,
1775 delete_insn (m->insn);
1780 if (loop_dump_stream)
1781 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1783 /* If we are to re-generate the item being moved with a
1784 new move insn, first delete what we have and then emit
1785 the move insn before the loop. */
1786 else if (m->move_insn)
1790 for (count = m->consec; count >= 0; count--)
1792 /* If this is the first insn of a library call sequence,
1794 if (GET_CODE (p) != NOTE
1795 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1798 /* If this is the last insn of a libcall sequence, then
1799 delete every insn in the sequence except the last.
1800 The last insn is handled in the normal manner. */
1801 if (GET_CODE (p) != NOTE
1802 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1804 temp = XEXP (temp, 0);
1806 temp = delete_insn (temp);
1810 p = delete_insn (p);
1812 /* simplify_giv_expr expects that it can walk the insns
1813 at m->insn forwards and see this old sequence we are
1814 tossing here. delete_insn does preserve the next
1815 pointers, but when we skip over a NOTE we must fix
1816 it up. Otherwise that code walks into the non-deleted
1818 while (p && GET_CODE (p) == NOTE)
1819 p = NEXT_INSN (temp) = NEXT_INSN (p);
1823 emit_move_insn (m->set_dest, m->set_src);
1824 temp = get_insns ();
1825 seq = gen_sequence ();
1828 add_label_notes (m->set_src, temp);
1830 i1 = loop_insn_hoist (loop, seq);
1831 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1833 = gen_rtx_EXPR_LIST (m->is_equiv ? REG_EQUIV : REG_EQUAL,
1834 m->set_src, REG_NOTES (i1));
1836 if (loop_dump_stream)
1837 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1839 /* The more regs we move, the less we like moving them. */
1844 for (count = m->consec; count >= 0; count--)
1848 /* If first insn of libcall sequence, skip to end. */
1849 /* Do this at start of loop, since p is guaranteed to
1851 if (GET_CODE (p) != NOTE
1852 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1855 /* If last insn of libcall sequence, move all
1856 insns except the last before the loop. The last
1857 insn is handled in the normal manner. */
1858 if (GET_CODE (p) != NOTE
1859 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1863 rtx fn_address_insn = 0;
1866 for (temp = XEXP (temp, 0); temp != p;
1867 temp = NEXT_INSN (temp))
1873 if (GET_CODE (temp) == NOTE)
1876 body = PATTERN (temp);
1878 /* Find the next insn after TEMP,
1879 not counting USE or NOTE insns. */
1880 for (next = NEXT_INSN (temp); next != p;
1881 next = NEXT_INSN (next))
1882 if (! (GET_CODE (next) == INSN
1883 && GET_CODE (PATTERN (next)) == USE)
1884 && GET_CODE (next) != NOTE)
1887 /* If that is the call, this may be the insn
1888 that loads the function address.
1890 Extract the function address from the insn
1891 that loads it into a register.
1892 If this insn was cse'd, we get incorrect code.
1894 So emit a new move insn that copies the
1895 function address into the register that the
1896 call insn will use. flow.c will delete any
1897 redundant stores that we have created. */
1898 if (GET_CODE (next) == CALL_INSN
1899 && GET_CODE (body) == SET
1900 && GET_CODE (SET_DEST (body)) == REG
1901 && (n = find_reg_note (temp, REG_EQUAL,
1904 fn_reg = SET_SRC (body);
1905 if (GET_CODE (fn_reg) != REG)
1906 fn_reg = SET_DEST (body);
1907 fn_address = XEXP (n, 0);
1908 fn_address_insn = temp;
1910 /* We have the call insn.
1911 If it uses the register we suspect it might,
1912 load it with the correct address directly. */
1913 if (GET_CODE (temp) == CALL_INSN
1915 && reg_referenced_p (fn_reg, body))
1916 loop_insn_emit_after (loop, 0, fn_address_insn,
1918 (fn_reg, fn_address));
1920 if (GET_CODE (temp) == CALL_INSN)
1922 i1 = loop_call_insn_hoist (loop, body);
1923 /* Because the USAGE information potentially
1924 contains objects other than hard registers
1925 we need to copy it. */
1926 if (CALL_INSN_FUNCTION_USAGE (temp))
1927 CALL_INSN_FUNCTION_USAGE (i1)
1928 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
1931 i1 = loop_insn_hoist (loop, body);
1934 if (temp == fn_address_insn)
1935 fn_address_insn = i1;
1936 REG_NOTES (i1) = REG_NOTES (temp);
1937 REG_NOTES (temp) = NULL;
1943 if (m->savemode != VOIDmode)
1945 /* P sets REG to zero; but we should clear only
1946 the bits that are not covered by the mode
1948 rtx reg = m->set_dest;
1953 tem = expand_simple_binop
1954 (GET_MODE (reg), AND, reg,
1955 GEN_INT ((((HOST_WIDE_INT) 1
1956 << GET_MODE_BITSIZE (m->savemode)))
1958 reg, 1, OPTAB_LIB_WIDEN);
1962 emit_move_insn (reg, tem);
1963 sequence = gen_sequence ();
1965 i1 = loop_insn_hoist (loop, sequence);
1967 else if (GET_CODE (p) == CALL_INSN)
1969 i1 = loop_call_insn_hoist (loop, PATTERN (p));
1970 /* Because the USAGE information potentially
1971 contains objects other than hard registers
1972 we need to copy it. */
1973 if (CALL_INSN_FUNCTION_USAGE (p))
1974 CALL_INSN_FUNCTION_USAGE (i1)
1975 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
1977 else if (count == m->consec && m->move_insn_first)
1980 /* The SET_SRC might not be invariant, so we must
1981 use the REG_EQUAL note. */
1983 emit_move_insn (m->set_dest, m->set_src);
1984 temp = get_insns ();
1985 seq = gen_sequence ();
1988 add_label_notes (m->set_src, temp);
1990 i1 = loop_insn_hoist (loop, seq);
1991 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1993 = gen_rtx_EXPR_LIST ((m->is_equiv ? REG_EQUIV
1995 m->set_src, REG_NOTES (i1));
1998 i1 = loop_insn_hoist (loop, PATTERN (p));
2000 if (REG_NOTES (i1) == 0)
2002 REG_NOTES (i1) = REG_NOTES (p);
2003 REG_NOTES (p) = NULL;
2005 /* If there is a REG_EQUAL note present whose value
2006 is not loop invariant, then delete it, since it
2007 may cause problems with later optimization passes.
2008 It is possible for cse to create such notes
2009 like this as a result of record_jump_cond. */
2011 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2012 && ! loop_invariant_p (loop, XEXP (temp, 0)))
2013 remove_note (i1, temp);
2019 if (loop_dump_stream)
2020 fprintf (loop_dump_stream, " moved to %d",
2023 /* If library call, now fix the REG_NOTES that contain
2024 insn pointers, namely REG_LIBCALL on FIRST
2025 and REG_RETVAL on I1. */
2026 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2028 XEXP (temp, 0) = first;
2029 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2030 XEXP (temp, 0) = i1;
2037 /* simplify_giv_expr expects that it can walk the insns
2038 at m->insn forwards and see this old sequence we are
2039 tossing here. delete_insn does preserve the next
2040 pointers, but when we skip over a NOTE we must fix
2041 it up. Otherwise that code walks into the non-deleted
2043 while (p && GET_CODE (p) == NOTE)
2044 p = NEXT_INSN (temp) = NEXT_INSN (p);
2047 /* The more regs we move, the less we like moving them. */
2051 /* Any other movable that loads the same register
2053 already_moved[regno] = 1;
2055 /* This reg has been moved out of one loop. */
2056 regs->array[regno].moved_once = 1;
2058 /* The reg set here is now invariant. */
2060 regs->array[regno].set_in_loop = 0;
2064 /* Change the length-of-life info for the register
2065 to say it lives at least the full length of this loop.
2066 This will help guide optimizations in outer loops. */
2068 if (REGNO_FIRST_LUID (regno) > INSN_LUID (loop_start))
2069 /* This is the old insn before all the moved insns.
2070 We can't use the moved insn because it is out of range
2071 in uid_luid. Only the old insns have luids. */
2072 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2073 if (REGNO_LAST_LUID (regno) < INSN_LUID (loop_end))
2074 REGNO_LAST_UID (regno) = INSN_UID (loop_end);
2076 /* Combine with this moved insn any other matching movables. */
2079 for (m1 = movables->head; m1; m1 = m1->next)
2084 /* Schedule the reg loaded by M1
2085 for replacement so that shares the reg of M.
2086 If the modes differ (only possible in restricted
2087 circumstances, make a SUBREG.
2089 Note this assumes that the target dependent files
2090 treat REG and SUBREG equally, including within
2091 GO_IF_LEGITIMATE_ADDRESS and in all the
2092 predicates since we never verify that replacing the
2093 original register with a SUBREG results in a
2094 recognizable insn. */
2095 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2096 reg_map[m1->regno] = m->set_dest;
2099 = gen_lowpart_common (GET_MODE (m1->set_dest),
2102 /* Get rid of the matching insn
2103 and prevent further processing of it. */
2106 /* if library call, delete all insns. */
2107 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2109 delete_insn_chain (XEXP (temp, 0), m1->insn);
2111 delete_insn (m1->insn);
2113 /* Any other movable that loads the same register
2115 already_moved[m1->regno] = 1;
2117 /* The reg merged here is now invariant,
2118 if the reg it matches is invariant. */
2120 regs->array[m1->regno].set_in_loop = 0;
2123 else if (loop_dump_stream)
2124 fprintf (loop_dump_stream, "not desirable");
2126 else if (loop_dump_stream && !m->match)
2127 fprintf (loop_dump_stream, "not safe");
2129 if (loop_dump_stream)
2130 fprintf (loop_dump_stream, "\n");
2134 new_start = loop_start;
2136 /* Go through all the instructions in the loop, making
2137 all the register substitutions scheduled in REG_MAP. */
2138 for (p = new_start; p != loop_end; p = NEXT_INSN (p))
2139 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2140 || GET_CODE (p) == CALL_INSN)
2142 replace_regs (PATTERN (p), reg_map, nregs, 0);
2143 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2149 free (already_moved);
2154 loop_movables_add (movables, m)
2155 struct loop_movables *movables;
2158 if (movables->head == 0)
2161 movables->last->next = m;
2167 loop_movables_free (movables)
2168 struct loop_movables *movables;
2171 struct movable *m_next;
2173 for (m = movables->head; m; m = m_next)
2181 /* Scan X and replace the address of any MEM in it with ADDR.
2182 REG is the address that MEM should have before the replacement. */
2185 replace_call_address (x, reg, addr)
2188 register enum rtx_code code;
2190 register const char *fmt;
2194 code = GET_CODE (x);
2208 /* Short cut for very common case. */
2209 replace_call_address (XEXP (x, 1), reg, addr);
2213 /* Short cut for very common case. */
2214 replace_call_address (XEXP (x, 0), reg, addr);
2218 /* If this MEM uses a reg other than the one we expected,
2219 something is wrong. */
2220 if (XEXP (x, 0) != reg)
2229 fmt = GET_RTX_FORMAT (code);
2230 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2233 replace_call_address (XEXP (x, i), reg, addr);
2234 else if (fmt[i] == 'E')
2237 for (j = 0; j < XVECLEN (x, i); j++)
2238 replace_call_address (XVECEXP (x, i, j), reg, addr);
2244 /* Return the number of memory refs to addresses that vary
2248 count_nonfixed_reads (loop, x)
2249 const struct loop *loop;
2252 register enum rtx_code code;
2254 register const char *fmt;
2260 code = GET_CODE (x);
2274 return ((loop_invariant_p (loop, XEXP (x, 0)) != 1)
2275 + count_nonfixed_reads (loop, XEXP (x, 0)));
2282 fmt = GET_RTX_FORMAT (code);
2283 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2286 value += count_nonfixed_reads (loop, XEXP (x, i));
2290 for (j = 0; j < XVECLEN (x, i); j++)
2291 value += count_nonfixed_reads (loop, XVECEXP (x, i, j));
2297 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2298 `has_call', `has_nonconst_call', `has_volatile', `has_tablejump',
2299 `unknown_address_altered', `unknown_constant_address_altered', and
2300 `num_mem_sets' in LOOP. Also, fill in the array `mems' and the
2301 list `store_mems' in LOOP. */
2307 register int level = 1;
2309 struct loop_info *loop_info = LOOP_INFO (loop);
2310 rtx start = loop->start;
2311 rtx end = loop->end;
2312 /* The label after END. Jumping here is just like falling off the
2313 end of the loop. We use next_nonnote_insn instead of next_label
2314 as a hedge against the (pathological) case where some actual insn
2315 might end up between the two. */
2316 rtx exit_target = next_nonnote_insn (end);
2318 loop_info->has_indirect_jump = indirect_jump_in_function;
2319 loop_info->pre_header_has_call = 0;
2320 loop_info->has_call = 0;
2321 loop_info->has_nonconst_call = 0;
2322 loop_info->has_volatile = 0;
2323 loop_info->has_tablejump = 0;
2324 loop_info->has_multiple_exit_targets = 0;
2327 loop_info->unknown_address_altered = 0;
2328 loop_info->unknown_constant_address_altered = 0;
2329 loop_info->store_mems = NULL_RTX;
2330 loop_info->first_loop_store_insn = NULL_RTX;
2331 loop_info->mems_idx = 0;
2332 loop_info->num_mem_sets = 0;
2335 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
2336 insn = PREV_INSN (insn))
2338 if (GET_CODE (insn) == CALL_INSN)
2340 loop_info->pre_header_has_call = 1;
2345 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2346 insn = NEXT_INSN (insn))
2348 if (GET_CODE (insn) == NOTE)
2350 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2353 /* Count number of loops contained in this one. */
2356 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2361 else if (GET_CODE (insn) == CALL_INSN)
2363 if (! CONST_OR_PURE_CALL_P (insn))
2365 loop_info->unknown_address_altered = 1;
2366 loop_info->has_nonconst_call = 1;
2368 loop_info->has_call = 1;
2370 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2372 rtx label1 = NULL_RTX;
2373 rtx label2 = NULL_RTX;
2375 if (volatile_refs_p (PATTERN (insn)))
2376 loop_info->has_volatile = 1;
2378 if (GET_CODE (insn) == JUMP_INSN
2379 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2380 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2381 loop_info->has_tablejump = 1;
2383 note_stores (PATTERN (insn), note_addr_stored, loop_info);
2384 if (! loop_info->first_loop_store_insn && loop_info->store_mems)
2385 loop_info->first_loop_store_insn = insn;
2387 if (! loop_info->has_multiple_exit_targets
2388 && GET_CODE (insn) == JUMP_INSN
2389 && GET_CODE (PATTERN (insn)) == SET
2390 && SET_DEST (PATTERN (insn)) == pc_rtx)
2392 if (GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
2394 label1 = XEXP (SET_SRC (PATTERN (insn)), 1);
2395 label2 = XEXP (SET_SRC (PATTERN (insn)), 2);
2399 label1 = SET_SRC (PATTERN (insn));
2404 if (label1 && label1 != pc_rtx)
2406 if (GET_CODE (label1) != LABEL_REF)
2408 /* Something tricky. */
2409 loop_info->has_multiple_exit_targets = 1;
2412 else if (XEXP (label1, 0) != exit_target
2413 && LABEL_OUTSIDE_LOOP_P (label1))
2415 /* A jump outside the current loop. */
2416 loop_info->has_multiple_exit_targets = 1;
2427 else if (GET_CODE (insn) == RETURN)
2428 loop_info->has_multiple_exit_targets = 1;
2431 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2432 if (/* An exception thrown by a called function might land us
2434 ! loop_info->has_nonconst_call
2435 /* We don't want loads for MEMs moved to a location before the
2436 one at which their stack memory becomes allocated. (Note
2437 that this is not a problem for malloc, etc., since those
2438 require actual function calls. */
2439 && ! current_function_calls_alloca
2440 /* There are ways to leave the loop other than falling off the
2442 && ! loop_info->has_multiple_exit_targets)
2443 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2444 insn = NEXT_INSN (insn))
2445 for_each_rtx (&insn, insert_loop_mem, loop_info);
2447 /* BLKmode MEMs are added to LOOP_STORE_MEM as necessary so
2448 that loop_invariant_p and load_mems can use true_dependence
2449 to determine what is really clobbered. */
2450 if (loop_info->unknown_address_altered)
2452 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2454 loop_info->store_mems
2455 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2457 if (loop_info->unknown_constant_address_altered)
2459 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2461 RTX_UNCHANGING_P (mem) = 1;
2462 loop_info->store_mems
2463 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2467 /* Scan the function looking for loops. Record the start and end of each loop.
2468 Also mark as invalid loops any loops that contain a setjmp or are branched
2469 to from outside the loop. */
2472 find_and_verify_loops (f, loops)
2474 struct loops *loops;
2479 struct loop *current_loop;
2480 struct loop *next_loop;
2483 num_loops = loops->num;
2485 compute_luids (f, NULL_RTX, 0);
2487 /* If there are jumps to undefined labels,
2488 treat them as jumps out of any/all loops.
2489 This also avoids writing past end of tables when there are no loops. */
2492 /* Find boundaries of loops, mark which loops are contained within
2493 loops, and invalidate loops that have setjmp. */
2496 current_loop = NULL;
2497 for (insn = f; insn; insn = NEXT_INSN (insn))
2499 if (GET_CODE (insn) == NOTE)
2500 switch (NOTE_LINE_NUMBER (insn))
2502 case NOTE_INSN_LOOP_BEG:
2503 next_loop = loops->array + num_loops;
2504 next_loop->num = num_loops;
2506 next_loop->start = insn;
2507 next_loop->outer = current_loop;
2508 current_loop = next_loop;
2511 case NOTE_INSN_LOOP_CONT:
2512 current_loop->cont = insn;
2515 case NOTE_INSN_LOOP_VTOP:
2516 current_loop->vtop = insn;
2519 case NOTE_INSN_LOOP_END:
2523 current_loop->end = insn;
2524 current_loop = current_loop->outer;
2531 if (GET_CODE (insn) == CALL_INSN
2532 && find_reg_note (insn, REG_SETJMP, NULL))
2534 /* In this case, we must invalidate our current loop and any
2536 for (loop = current_loop; loop; loop = loop->outer)
2539 if (loop_dump_stream)
2540 fprintf (loop_dump_stream,
2541 "\nLoop at %d ignored due to setjmp.\n",
2542 INSN_UID (loop->start));
2546 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2547 enclosing loop, but this doesn't matter. */
2548 uid_loop[INSN_UID (insn)] = current_loop;
2551 /* Any loop containing a label used in an initializer must be invalidated,
2552 because it can be jumped into from anywhere. */
2554 for (label = forced_labels; label; label = XEXP (label, 1))
2556 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2557 loop; loop = loop->outer)
2561 /* Any loop containing a label used for an exception handler must be
2562 invalidated, because it can be jumped into from anywhere. */
2564 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2566 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2567 loop; loop = loop->outer)
2571 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2572 loop that it is not contained within, that loop is marked invalid.
2573 If any INSN or CALL_INSN uses a label's address, then the loop containing
2574 that label is marked invalid, because it could be jumped into from
2577 Also look for blocks of code ending in an unconditional branch that
2578 exits the loop. If such a block is surrounded by a conditional
2579 branch around the block, move the block elsewhere (see below) and
2580 invert the jump to point to the code block. This may eliminate a
2581 label in our loop and will simplify processing by both us and a
2582 possible second cse pass. */
2584 for (insn = f; insn; insn = NEXT_INSN (insn))
2587 struct loop *this_loop = uid_loop[INSN_UID (insn)];
2589 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2591 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2594 for (loop = uid_loop[INSN_UID (XEXP (note, 0))];
2595 loop; loop = loop->outer)
2600 if (GET_CODE (insn) != JUMP_INSN)
2603 mark_loop_jump (PATTERN (insn), this_loop);
2605 /* See if this is an unconditional branch outside the loop. */
2607 && (GET_CODE (PATTERN (insn)) == RETURN
2608 || (any_uncondjump_p (insn)
2609 && onlyjump_p (insn)
2610 && (uid_loop[INSN_UID (JUMP_LABEL (insn))]
2612 && get_max_uid () < max_uid_for_loop)
2615 rtx our_next = next_real_insn (insn);
2616 rtx last_insn_to_move = NEXT_INSN (insn);
2617 struct loop *dest_loop;
2618 struct loop *outer_loop = NULL;
2620 /* Go backwards until we reach the start of the loop, a label,
2622 for (p = PREV_INSN (insn);
2623 GET_CODE (p) != CODE_LABEL
2624 && ! (GET_CODE (p) == NOTE
2625 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2626 && GET_CODE (p) != JUMP_INSN;
2630 /* Check for the case where we have a jump to an inner nested
2631 loop, and do not perform the optimization in that case. */
2633 if (JUMP_LABEL (insn))
2635 dest_loop = uid_loop[INSN_UID (JUMP_LABEL (insn))];
2638 for (outer_loop = dest_loop; outer_loop;
2639 outer_loop = outer_loop->outer)
2640 if (outer_loop == this_loop)
2645 /* Make sure that the target of P is within the current loop. */
2647 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2648 && uid_loop[INSN_UID (JUMP_LABEL (p))] != this_loop)
2649 outer_loop = this_loop;
2651 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2652 we have a block of code to try to move.
2654 We look backward and then forward from the target of INSN
2655 to find a BARRIER at the same loop depth as the target.
2656 If we find such a BARRIER, we make a new label for the start
2657 of the block, invert the jump in P and point it to that label,
2658 and move the block of code to the spot we found. */
2661 && GET_CODE (p) == JUMP_INSN
2662 && JUMP_LABEL (p) != 0
2663 /* Just ignore jumps to labels that were never emitted.
2664 These always indicate compilation errors. */
2665 && INSN_UID (JUMP_LABEL (p)) != 0
2666 && any_condjump_p (p) && onlyjump_p (p)
2667 && next_real_insn (JUMP_LABEL (p)) == our_next
2668 /* If it's not safe to move the sequence, then we
2670 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2671 &last_insn_to_move))
2674 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2675 struct loop *target_loop = uid_loop[INSN_UID (target)];
2679 /* Search for possible garbage past the conditional jumps
2680 and look for the last barrier. */
2681 for (tmp = last_insn_to_move;
2682 tmp && GET_CODE (tmp) != CODE_LABEL; tmp = NEXT_INSN (tmp))
2683 if (GET_CODE (tmp) == BARRIER)
2684 last_insn_to_move = tmp;
2686 for (loc = target; loc; loc = PREV_INSN (loc))
2687 if (GET_CODE (loc) == BARRIER
2688 /* Don't move things inside a tablejump. */
2689 && ((loc2 = next_nonnote_insn (loc)) == 0
2690 || GET_CODE (loc2) != CODE_LABEL
2691 || (loc2 = next_nonnote_insn (loc2)) == 0
2692 || GET_CODE (loc2) != JUMP_INSN
2693 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2694 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2695 && uid_loop[INSN_UID (loc)] == target_loop)
2699 for (loc = target; loc; loc = NEXT_INSN (loc))
2700 if (GET_CODE (loc) == BARRIER
2701 /* Don't move things inside a tablejump. */
2702 && ((loc2 = next_nonnote_insn (loc)) == 0
2703 || GET_CODE (loc2) != CODE_LABEL
2704 || (loc2 = next_nonnote_insn (loc2)) == 0
2705 || GET_CODE (loc2) != JUMP_INSN
2706 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2707 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2708 && uid_loop[INSN_UID (loc)] == target_loop)
2713 rtx cond_label = JUMP_LABEL (p);
2714 rtx new_label = get_label_after (p);
2716 /* Ensure our label doesn't go away. */
2717 LABEL_NUSES (cond_label)++;
2719 /* Verify that uid_loop is large enough and that
2721 if (invert_jump (p, new_label, 1))
2725 /* If no suitable BARRIER was found, create a suitable
2726 one before TARGET. Since TARGET is a fall through
2727 path, we'll need to insert an jump around our block
2728 and add a BARRIER before TARGET.
2730 This creates an extra unconditional jump outside
2731 the loop. However, the benefits of removing rarely
2732 executed instructions from inside the loop usually
2733 outweighs the cost of the extra unconditional jump
2734 outside the loop. */
2739 temp = gen_jump (JUMP_LABEL (insn));
2740 temp = emit_jump_insn_before (temp, target);
2741 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2742 LABEL_NUSES (JUMP_LABEL (insn))++;
2743 loc = emit_barrier_before (target);
2746 /* Include the BARRIER after INSN and copy the
2748 squeeze_notes (&new_label, &last_insn_to_move);
2749 reorder_insns (new_label, last_insn_to_move, loc);
2751 /* All those insns are now in TARGET_LOOP. */
2753 q != NEXT_INSN (last_insn_to_move);
2755 uid_loop[INSN_UID (q)] = target_loop;
2757 /* The label jumped to by INSN is no longer a loop
2758 exit. Unless INSN does not have a label (e.g.,
2759 it is a RETURN insn), search loop->exit_labels
2760 to find its label_ref, and remove it. Also turn
2761 off LABEL_OUTSIDE_LOOP_P bit. */
2762 if (JUMP_LABEL (insn))
2764 for (q = 0, r = this_loop->exit_labels;
2766 q = r, r = LABEL_NEXTREF (r))
2767 if (XEXP (r, 0) == JUMP_LABEL (insn))
2769 LABEL_OUTSIDE_LOOP_P (r) = 0;
2771 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2773 this_loop->exit_labels = LABEL_NEXTREF (r);
2777 for (loop = this_loop; loop && loop != target_loop;
2781 /* If we didn't find it, then something is
2787 /* P is now a jump outside the loop, so it must be put
2788 in loop->exit_labels, and marked as such.
2789 The easiest way to do this is to just call
2790 mark_loop_jump again for P. */
2791 mark_loop_jump (PATTERN (p), this_loop);
2793 /* If INSN now jumps to the insn after it,
2795 if (JUMP_LABEL (insn) != 0
2796 && (next_real_insn (JUMP_LABEL (insn))
2797 == next_real_insn (insn)))
2798 delete_related_insns (insn);
2801 /* Continue the loop after where the conditional
2802 branch used to jump, since the only branch insn
2803 in the block (if it still remains) is an inter-loop
2804 branch and hence needs no processing. */
2805 insn = NEXT_INSN (cond_label);
2807 if (--LABEL_NUSES (cond_label) == 0)
2808 delete_related_insns (cond_label);
2810 /* This loop will be continued with NEXT_INSN (insn). */
2811 insn = PREV_INSN (insn);
2818 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2819 loops it is contained in, mark the target loop invalid.
2821 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2824 mark_loop_jump (x, loop)
2828 struct loop *dest_loop;
2829 struct loop *outer_loop;
2832 switch (GET_CODE (x))
2845 /* There could be a label reference in here. */
2846 mark_loop_jump (XEXP (x, 0), loop);
2852 mark_loop_jump (XEXP (x, 0), loop);
2853 mark_loop_jump (XEXP (x, 1), loop);
2857 /* This may refer to a LABEL_REF or SYMBOL_REF. */
2858 mark_loop_jump (XEXP (x, 1), loop);
2863 mark_loop_jump (XEXP (x, 0), loop);
2867 dest_loop = uid_loop[INSN_UID (XEXP (x, 0))];
2869 /* Link together all labels that branch outside the loop. This
2870 is used by final_[bg]iv_value and the loop unrolling code. Also
2871 mark this LABEL_REF so we know that this branch should predict
2874 /* A check to make sure the label is not in an inner nested loop,
2875 since this does not count as a loop exit. */
2878 for (outer_loop = dest_loop; outer_loop;
2879 outer_loop = outer_loop->outer)
2880 if (outer_loop == loop)
2886 if (loop && ! outer_loop)
2888 LABEL_OUTSIDE_LOOP_P (x) = 1;
2889 LABEL_NEXTREF (x) = loop->exit_labels;
2890 loop->exit_labels = x;
2892 for (outer_loop = loop;
2893 outer_loop && outer_loop != dest_loop;
2894 outer_loop = outer_loop->outer)
2895 outer_loop->exit_count++;
2898 /* If this is inside a loop, but not in the current loop or one enclosed
2899 by it, it invalidates at least one loop. */
2904 /* We must invalidate every nested loop containing the target of this
2905 label, except those that also contain the jump insn. */
2907 for (; dest_loop; dest_loop = dest_loop->outer)
2909 /* Stop when we reach a loop that also contains the jump insn. */
2910 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
2911 if (dest_loop == outer_loop)
2914 /* If we get here, we know we need to invalidate a loop. */
2915 if (loop_dump_stream && ! dest_loop->invalid)
2916 fprintf (loop_dump_stream,
2917 "\nLoop at %d ignored due to multiple entry points.\n",
2918 INSN_UID (dest_loop->start));
2920 dest_loop->invalid = 1;
2925 /* If this is not setting pc, ignore. */
2926 if (SET_DEST (x) == pc_rtx)
2927 mark_loop_jump (SET_SRC (x), loop);
2931 mark_loop_jump (XEXP (x, 1), loop);
2932 mark_loop_jump (XEXP (x, 2), loop);
2937 for (i = 0; i < XVECLEN (x, 0); i++)
2938 mark_loop_jump (XVECEXP (x, 0, i), loop);
2942 for (i = 0; i < XVECLEN (x, 1); i++)
2943 mark_loop_jump (XVECEXP (x, 1, i), loop);
2947 /* Strictly speaking this is not a jump into the loop, only a possible
2948 jump out of the loop. However, we have no way to link the destination
2949 of this jump onto the list of exit labels. To be safe we mark this
2950 loop and any containing loops as invalid. */
2953 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
2955 if (loop_dump_stream && ! outer_loop->invalid)
2956 fprintf (loop_dump_stream,
2957 "\nLoop at %d ignored due to unknown exit jump.\n",
2958 INSN_UID (outer_loop->start));
2959 outer_loop->invalid = 1;
2966 /* Return nonzero if there is a label in the range from
2967 insn INSN to and including the insn whose luid is END
2968 INSN must have an assigned luid (i.e., it must not have
2969 been previously created by loop.c). */
2972 labels_in_range_p (insn, end)
2976 while (insn && INSN_LUID (insn) <= end)
2978 if (GET_CODE (insn) == CODE_LABEL)
2980 insn = NEXT_INSN (insn);
2986 /* Record that a memory reference X is being set. */
2989 note_addr_stored (x, y, data)
2991 rtx y ATTRIBUTE_UNUSED;
2992 void *data ATTRIBUTE_UNUSED;
2994 struct loop_info *loop_info = data;
2996 if (x == 0 || GET_CODE (x) != MEM)
2999 /* Count number of memory writes.
3000 This affects heuristics in strength_reduce. */
3001 loop_info->num_mem_sets++;
3003 /* BLKmode MEM means all memory is clobbered. */
3004 if (GET_MODE (x) == BLKmode)
3006 if (RTX_UNCHANGING_P (x))
3007 loop_info->unknown_constant_address_altered = 1;
3009 loop_info->unknown_address_altered = 1;
3014 loop_info->store_mems = gen_rtx_EXPR_LIST (VOIDmode, x,
3015 loop_info->store_mems);
3018 /* X is a value modified by an INSN that references a biv inside a loop
3019 exit test (ie, X is somehow related to the value of the biv). If X
3020 is a pseudo that is used more than once, then the biv is (effectively)
3021 used more than once. DATA is a pointer to a loop_regs structure. */
3024 note_set_pseudo_multiple_uses (x, y, data)
3026 rtx y ATTRIBUTE_UNUSED;
3029 struct loop_regs *regs = (struct loop_regs *) data;
3034 while (GET_CODE (x) == STRICT_LOW_PART
3035 || GET_CODE (x) == SIGN_EXTRACT
3036 || GET_CODE (x) == ZERO_EXTRACT
3037 || GET_CODE (x) == SUBREG)
3040 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
3043 /* If we do not have usage information, or if we know the register
3044 is used more than once, note that fact for check_dbra_loop. */
3045 if (REGNO (x) >= max_reg_before_loop
3046 || ! regs->array[REGNO (x)].single_usage
3047 || regs->array[REGNO (x)].single_usage == const0_rtx)
3048 regs->multiple_uses = 1;
3051 /* Return nonzero if the rtx X is invariant over the current loop.
3053 The value is 2 if we refer to something only conditionally invariant.
3055 A memory ref is invariant if it is not volatile and does not conflict
3056 with anything stored in `loop_info->store_mems'. */
3059 loop_invariant_p (loop, x)
3060 const struct loop *loop;
3063 struct loop_info *loop_info = LOOP_INFO (loop);
3064 struct loop_regs *regs = LOOP_REGS (loop);
3066 register enum rtx_code code;
3067 register const char *fmt;
3068 int conditional = 0;
3073 code = GET_CODE (x);
3083 /* A LABEL_REF is normally invariant, however, if we are unrolling
3084 loops, and this label is inside the loop, then it isn't invariant.
3085 This is because each unrolled copy of the loop body will have
3086 a copy of this label. If this was invariant, then an insn loading
3087 the address of this label into a register might get moved outside
3088 the loop, and then each loop body would end up using the same label.
3090 We don't know the loop bounds here though, so just fail for all
3092 if (flag_unroll_loops)
3099 case UNSPEC_VOLATILE:
3103 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3104 since the reg might be set by initialization within the loop. */
3106 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3107 || x == arg_pointer_rtx)
3108 && ! current_function_has_nonlocal_goto)
3111 if (LOOP_INFO (loop)->has_call
3112 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3115 if (regs->array[REGNO (x)].set_in_loop < 0)
3118 return regs->array[REGNO (x)].set_in_loop == 0;
3121 /* Volatile memory references must be rejected. Do this before
3122 checking for read-only items, so that volatile read-only items
3123 will be rejected also. */
3124 if (MEM_VOLATILE_P (x))
3127 /* See if there is any dependence between a store and this load. */
3128 mem_list_entry = loop_info->store_mems;
3129 while (mem_list_entry)
3131 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3135 mem_list_entry = XEXP (mem_list_entry, 1);
3138 /* It's not invalidated by a store in memory
3139 but we must still verify the address is invariant. */
3143 /* Don't mess with insns declared volatile. */
3144 if (MEM_VOLATILE_P (x))
3152 fmt = GET_RTX_FORMAT (code);
3153 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3157 int tem = loop_invariant_p (loop, XEXP (x, i));
3163 else if (fmt[i] == 'E')
3166 for (j = 0; j < XVECLEN (x, i); j++)
3168 int tem = loop_invariant_p (loop, XVECEXP (x, i, j));
3178 return 1 + conditional;
3181 /* Return nonzero if all the insns in the loop that set REG
3182 are INSN and the immediately following insns,
3183 and if each of those insns sets REG in an invariant way
3184 (not counting uses of REG in them).
3186 The value is 2 if some of these insns are only conditionally invariant.
3188 We assume that INSN itself is the first set of REG
3189 and that its source is invariant. */
3192 consec_sets_invariant_p (loop, reg, n_sets, insn)
3193 const struct loop *loop;
3197 struct loop_regs *regs = LOOP_REGS (loop);
3199 unsigned int regno = REGNO (reg);
3201 /* Number of sets we have to insist on finding after INSN. */
3202 int count = n_sets - 1;
3203 int old = regs->array[regno].set_in_loop;
3207 /* If N_SETS hit the limit, we can't rely on its value. */
3211 regs->array[regno].set_in_loop = 0;
3215 register enum rtx_code code;
3219 code = GET_CODE (p);
3221 /* If library call, skip to end of it. */
3222 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3227 && (set = single_set (p))
3228 && GET_CODE (SET_DEST (set)) == REG
3229 && REGNO (SET_DEST (set)) == regno)
3231 this = loop_invariant_p (loop, SET_SRC (set));
3234 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3236 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3237 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3239 this = (CONSTANT_P (XEXP (temp, 0))
3240 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3241 && loop_invariant_p (loop, XEXP (temp, 0))));
3248 else if (code != NOTE)
3250 regs->array[regno].set_in_loop = old;
3255 regs->array[regno].set_in_loop = old;
3256 /* If loop_invariant_p ever returned 2, we return 2. */
3257 return 1 + (value & 2);
3261 /* I don't think this condition is sufficient to allow INSN
3262 to be moved, so we no longer test it. */
3264 /* Return 1 if all insns in the basic block of INSN and following INSN
3265 that set REG are invariant according to TABLE. */
3268 all_sets_invariant_p (reg, insn, table)
3272 register rtx p = insn;
3273 register int regno = REGNO (reg);
3277 register enum rtx_code code;
3279 code = GET_CODE (p);
3280 if (code == CODE_LABEL || code == JUMP_INSN)
3282 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3283 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3284 && REGNO (SET_DEST (PATTERN (p))) == regno)
3286 if (! loop_invariant_p (loop, SET_SRC (PATTERN (p)), table))
3293 /* Look at all uses (not sets) of registers in X. For each, if it is
3294 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3295 a different insn, set USAGE[REGNO] to const0_rtx. */
3298 find_single_use_in_loop (regs, insn, x)
3299 struct loop_regs *regs;
3303 enum rtx_code code = GET_CODE (x);
3304 const char *fmt = GET_RTX_FORMAT (code);
3308 regs->array[REGNO (x)].single_usage
3309 = (regs->array[REGNO (x)].single_usage != 0
3310 && regs->array[REGNO (x)].single_usage != insn)
3311 ? const0_rtx : insn;
3313 else if (code == SET)
3315 /* Don't count SET_DEST if it is a REG; otherwise count things
3316 in SET_DEST because if a register is partially modified, it won't
3317 show up as a potential movable so we don't care how USAGE is set
3319 if (GET_CODE (SET_DEST (x)) != REG)
3320 find_single_use_in_loop (regs, insn, SET_DEST (x));
3321 find_single_use_in_loop (regs, insn, SET_SRC (x));
3324 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3326 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3327 find_single_use_in_loop (regs, insn, XEXP (x, i));
3328 else if (fmt[i] == 'E')
3329 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3330 find_single_use_in_loop (regs, insn, XVECEXP (x, i, j));
3334 /* Count and record any set in X which is contained in INSN. Update
3335 REGS->array[I].MAY_NOT_OPTIMIZE and LAST_SET for any register I set
3339 count_one_set (regs, insn, x, last_set)
3340 struct loop_regs *regs;
3344 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3345 /* Don't move a reg that has an explicit clobber.
3346 It's not worth the pain to try to do it correctly. */
3347 regs->array[REGNO (XEXP (x, 0))].may_not_optimize = 1;
3349 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3351 rtx dest = SET_DEST (x);
3352 while (GET_CODE (dest) == SUBREG
3353 || GET_CODE (dest) == ZERO_EXTRACT
3354 || GET_CODE (dest) == SIGN_EXTRACT
3355 || GET_CODE (dest) == STRICT_LOW_PART)
3356 dest = XEXP (dest, 0);
3357 if (GET_CODE (dest) == REG)
3359 register int regno = REGNO (dest);
3360 /* If this is the first setting of this reg
3361 in current basic block, and it was set before,
3362 it must be set in two basic blocks, so it cannot
3363 be moved out of the loop. */
3364 if (regs->array[regno].set_in_loop > 0
3366 regs->array[regno].may_not_optimize = 1;
3367 /* If this is not first setting in current basic block,
3368 see if reg was used in between previous one and this.
3369 If so, neither one can be moved. */
3370 if (last_set[regno] != 0
3371 && reg_used_between_p (dest, last_set[regno], insn))
3372 regs->array[regno].may_not_optimize = 1;
3373 if (regs->array[regno].set_in_loop < 127)
3374 ++regs->array[regno].set_in_loop;
3375 last_set[regno] = insn;
3380 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3381 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3382 contained in insn INSN is used by any insn that precedes INSN in
3383 cyclic order starting from the loop entry point.
3385 We don't want to use INSN_LUID here because if we restrict INSN to those
3386 that have a valid INSN_LUID, it means we cannot move an invariant out
3387 from an inner loop past two loops. */
3390 loop_reg_used_before_p (loop, set, insn)
3391 const struct loop *loop;
3394 rtx reg = SET_DEST (set);
3397 /* Scan forward checking for register usage. If we hit INSN, we
3398 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3399 for (p = loop->scan_start; p != insn; p = NEXT_INSN (p))
3401 if (INSN_P (p) && reg_overlap_mentioned_p (reg, PATTERN (p)))
3411 /* A "basic induction variable" or biv is a pseudo reg that is set
3412 (within this loop) only by incrementing or decrementing it. */
3413 /* A "general induction variable" or giv is a pseudo reg whose
3414 value is a linear function of a biv. */
3416 /* Bivs are recognized by `basic_induction_var';
3417 Givs by `general_induction_var'. */
3419 /* Communication with routines called via `note_stores'. */
3421 static rtx note_insn;
3423 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3425 static rtx addr_placeholder;
3427 /* ??? Unfinished optimizations, and possible future optimizations,
3428 for the strength reduction code. */
3430 /* ??? The interaction of biv elimination, and recognition of 'constant'
3431 bivs, may cause problems. */
3433 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3434 performance problems.
3436 Perhaps don't eliminate things that can be combined with an addressing
3437 mode. Find all givs that have the same biv, mult_val, and add_val;
3438 then for each giv, check to see if its only use dies in a following
3439 memory address. If so, generate a new memory address and check to see
3440 if it is valid. If it is valid, then store the modified memory address,
3441 otherwise, mark the giv as not done so that it will get its own iv. */
3443 /* ??? Could try to optimize branches when it is known that a biv is always
3446 /* ??? When replace a biv in a compare insn, we should replace with closest
3447 giv so that an optimized branch can still be recognized by the combiner,
3448 e.g. the VAX acb insn. */
3450 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3451 was rerun in loop_optimize whenever a register was added or moved.
3452 Also, some of the optimizations could be a little less conservative. */
3454 /* Scan the loop body and call FNCALL for each insn. In the addition to the
3455 LOOP and INSN parameters pass MAYBE_MULTIPLE and NOT_EVERY_ITERATION to the
3458 NOT_EVERY_ITERATION if current insn is not executed at least once for every
3459 loop iteration except for the last one.
3461 MAYBE_MULTIPLE is 1 if current insn may be executed more than once for every
3465 for_each_insn_in_loop (loop, fncall)
3467 loop_insn_callback fncall;
3469 /* This is 1 if current insn is not executed at least once for every loop
3471 int not_every_iteration = 0;
3472 int maybe_multiple = 0;
3473 int past_loop_latch = 0;
3477 /* If loop_scan_start points to the loop exit test, we have to be wary of
3478 subversive use of gotos inside expression statements. */
3479 if (prev_nonnote_insn (loop->scan_start) != prev_nonnote_insn (loop->start))
3480 maybe_multiple = back_branch_in_range_p (loop, loop->scan_start);
3482 /* Scan through loop to find all possible bivs. */
3484 for (p = next_insn_in_loop (loop, loop->scan_start);
3486 p = next_insn_in_loop (loop, p))
3488 p = fncall (loop, p, not_every_iteration, maybe_multiple);
3490 /* Past CODE_LABEL, we get to insns that may be executed multiple
3491 times. The only way we can be sure that they can't is if every
3492 jump insn between here and the end of the loop either
3493 returns, exits the loop, is a jump to a location that is still
3494 behind the label, or is a jump to the loop start. */
3496 if (GET_CODE (p) == CODE_LABEL)
3504 insn = NEXT_INSN (insn);
3505 if (insn == loop->scan_start)
3507 if (insn == loop->end)
3513 if (insn == loop->scan_start)
3517 if (GET_CODE (insn) == JUMP_INSN
3518 && GET_CODE (PATTERN (insn)) != RETURN
3519 && (!any_condjump_p (insn)
3520 || (JUMP_LABEL (insn) != 0
3521 && JUMP_LABEL (insn) != loop->scan_start
3522 && !loop_insn_first_p (p, JUMP_LABEL (insn)))))
3530 /* Past a jump, we get to insns for which we can't count
3531 on whether they will be executed during each iteration. */
3532 /* This code appears twice in strength_reduce. There is also similar
3533 code in scan_loop. */
3534 if (GET_CODE (p) == JUMP_INSN
3535 /* If we enter the loop in the middle, and scan around to the
3536 beginning, don't set not_every_iteration for that.
3537 This can be any kind of jump, since we want to know if insns
3538 will be executed if the loop is executed. */
3539 && !(JUMP_LABEL (p) == loop->top
3540 && ((NEXT_INSN (NEXT_INSN (p)) == loop->end
3541 && any_uncondjump_p (p))
3542 || (NEXT_INSN (p) == loop->end && any_condjump_p (p)))))
3546 /* If this is a jump outside the loop, then it also doesn't
3547 matter. Check to see if the target of this branch is on the
3548 loop->exits_labels list. */
3550 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
3551 if (XEXP (label, 0) == JUMP_LABEL (p))
3555 not_every_iteration = 1;
3558 else if (GET_CODE (p) == NOTE)
3560 /* At the virtual top of a converted loop, insns are again known to
3561 be executed each iteration: logically, the loop begins here
3562 even though the exit code has been duplicated.
3564 Insns are also again known to be executed each iteration at
3565 the LOOP_CONT note. */
3566 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
3567 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
3569 not_every_iteration = 0;
3570 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3572 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3576 /* Note if we pass a loop latch. If we do, then we can not clear
3577 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
3578 a loop since a jump before the last CODE_LABEL may have started
3579 a new loop iteration.
3581 Note that LOOP_TOP is only set for rotated loops and we need
3582 this check for all loops, so compare against the CODE_LABEL
3583 which immediately follows LOOP_START. */
3584 if (GET_CODE (p) == JUMP_INSN
3585 && JUMP_LABEL (p) == NEXT_INSN (loop->start))
3586 past_loop_latch = 1;
3588 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3589 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3590 or not an insn is known to be executed each iteration of the
3591 loop, whether or not any iterations are known to occur.
3593 Therefore, if we have just passed a label and have no more labels
3594 between here and the test insn of the loop, and we have not passed
3595 a jump to the top of the loop, then we know these insns will be
3596 executed each iteration. */
3598 if (not_every_iteration
3600 && GET_CODE (p) == CODE_LABEL
3601 && no_labels_between_p (p, loop->end)
3602 && loop_insn_first_p (p, loop->cont))
3603 not_every_iteration = 0;
3608 loop_bivs_find (loop)
3611 struct loop_regs *regs = LOOP_REGS (loop);
3612 struct loop_ivs *ivs = LOOP_IVS (loop);
3613 /* Temporary list pointers for traversing ivs->list. */
3614 struct iv_class *bl, **backbl;
3618 for_each_insn_in_loop (loop, check_insn_for_bivs);
3620 /* Scan ivs->list to remove all regs that proved not to be bivs.
3621 Make a sanity check against regs->n_times_set. */
3622 for (backbl = &ivs->list, bl = *backbl; bl; bl = bl->next)
3624 if (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
3625 /* Above happens if register modified by subreg, etc. */
3626 /* Make sure it is not recognized as a basic induction var: */
3627 || regs->array[bl->regno].n_times_set != bl->biv_count
3628 /* If never incremented, it is invariant that we decided not to
3629 move. So leave it alone. */
3630 || ! bl->incremented)
3632 if (loop_dump_stream)
3633 fprintf (loop_dump_stream, "Biv %d: discarded, %s\n",
3635 (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
3636 ? "not induction variable"
3637 : (! bl->incremented ? "never incremented"
3640 REG_IV_TYPE (ivs, bl->regno) = NOT_BASIC_INDUCT;
3647 if (loop_dump_stream)
3648 fprintf (loop_dump_stream, "Biv %d: verified\n", bl->regno);
3654 /* Determine how BIVS are initialised by looking through pre-header
3655 extended basic block. */
3657 loop_bivs_init_find (loop)
3660 struct loop_ivs *ivs = LOOP_IVS (loop);
3661 /* Temporary list pointers for traversing ivs->list. */
3662 struct iv_class *bl;
3666 /* Find initial value for each biv by searching backwards from loop_start,
3667 halting at first label. Also record any test condition. */
3670 for (p = loop->start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
3676 if (GET_CODE (p) == CALL_INSN)
3680 note_stores (PATTERN (p), record_initial, ivs);
3682 /* Record any test of a biv that branches around the loop if no store
3683 between it and the start of loop. We only care about tests with
3684 constants and registers and only certain of those. */
3685 if (GET_CODE (p) == JUMP_INSN
3686 && JUMP_LABEL (p) != 0
3687 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop->end)
3688 && (test = get_condition_for_loop (loop, p)) != 0
3689 && GET_CODE (XEXP (test, 0)) == REG
3690 && REGNO (XEXP (test, 0)) < max_reg_before_loop
3691 && (bl = REG_IV_CLASS (ivs, REGNO (XEXP (test, 0)))) != 0
3692 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop->start)
3693 && bl->init_insn == 0)
3695 /* If an NE test, we have an initial value! */
3696 if (GET_CODE (test) == NE)
3699 bl->init_set = gen_rtx_SET (VOIDmode,
3700 XEXP (test, 0), XEXP (test, 1));
3703 bl->initial_test = test;
3709 /* Look at the each biv and see if we can say anything better about its
3710 initial value from any initializing insns set up above. (This is done
3711 in two passes to avoid missing SETs in a PARALLEL.) */
3713 loop_bivs_check (loop)
3716 struct loop_ivs *ivs = LOOP_IVS (loop);
3717 /* Temporary list pointers for traversing ivs->list. */
3718 struct iv_class *bl;
3719 struct iv_class **backbl;
3721 for (backbl = &ivs->list; (bl = *backbl); backbl = &bl->next)
3726 if (! bl->init_insn)
3729 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3730 is a constant, use the value of that. */
3731 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
3732 && CONSTANT_P (XEXP (note, 0)))
3733 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
3734 && CONSTANT_P (XEXP (note, 0))))
3735 src = XEXP (note, 0);
3737 src = SET_SRC (bl->init_set);
3739 if (loop_dump_stream)
3740 fprintf (loop_dump_stream,
3741 "Biv %d: initialized at insn %d: initial value ",
3742 bl->regno, INSN_UID (bl->init_insn));
3744 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
3745 || GET_MODE (src) == VOIDmode)
3746 && valid_initial_value_p (src, bl->init_insn,
3747 LOOP_INFO (loop)->pre_header_has_call,
3750 bl->initial_value = src;
3752 if (loop_dump_stream)
3754 print_simple_rtl (loop_dump_stream, src);
3755 fputc ('\n', loop_dump_stream);
3758 /* If we can't make it a giv,
3759 let biv keep initial value of "itself". */
3760 else if (loop_dump_stream)
3761 fprintf (loop_dump_stream, "is complex\n");
3766 /* Search the loop for general induction variables. */
3769 loop_givs_find (loop)
3772 for_each_insn_in_loop (loop, check_insn_for_givs);
3776 /* For each giv for which we still don't know whether or not it is
3777 replaceable, check to see if it is replaceable because its final value
3778 can be calculated. */
3781 loop_givs_check (loop)
3784 struct loop_ivs *ivs = LOOP_IVS (loop);
3785 struct iv_class *bl;
3787 for (bl = ivs->list; bl; bl = bl->next)
3789 struct induction *v;
3791 for (v = bl->giv; v; v = v->next_iv)
3792 if (! v->replaceable && ! v->not_replaceable)
3793 check_final_value (loop, v);
3798 /* Return non-zero if it is possible to eliminate the biv BL provided
3799 all givs are reduced. This is possible if either the reg is not
3800 used outside the loop, or we can compute what its final value will
3804 loop_biv_eliminable_p (loop, bl, threshold, insn_count)
3806 struct iv_class *bl;
3810 /* For architectures with a decrement_and_branch_until_zero insn,
3811 don't do this if we put a REG_NONNEG note on the endtest for this
3814 #ifdef HAVE_decrement_and_branch_until_zero
3817 if (loop_dump_stream)
3818 fprintf (loop_dump_stream,
3819 "Cannot eliminate nonneg biv %d.\n", bl->regno);
3824 /* Check that biv is used outside loop or if it has a final value.
3825 Compare against bl->init_insn rather than loop->start. We aren't
3826 concerned with any uses of the biv between init_insn and
3827 loop->start since these won't be affected by the value of the biv
3828 elsewhere in the function, so long as init_insn doesn't use the
3831 if ((REGNO_LAST_LUID (bl->regno) < INSN_LUID (loop->end)
3833 && INSN_UID (bl->init_insn) < max_uid_for_loop
3834 && REGNO_FIRST_LUID (bl->regno) >= INSN_LUID (bl->init_insn)
3835 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
3836 || (bl->final_value = final_biv_value (loop, bl)))
3837 return maybe_eliminate_biv (loop, bl, 0, threshold, insn_count);
3839 if (loop_dump_stream)
3841 fprintf (loop_dump_stream,
3842 "Cannot eliminate biv %d.\n",
3844 fprintf (loop_dump_stream,
3845 "First use: insn %d, last use: insn %d.\n",
3846 REGNO_FIRST_UID (bl->regno),
3847 REGNO_LAST_UID (bl->regno));
3853 /* Reduce each giv of BL that we have decided to reduce. */
3856 loop_givs_reduce (loop, bl)
3858 struct iv_class *bl;
3860 struct induction *v;
3862 for (v = bl->giv; v; v = v->next_iv)
3864 struct induction *tv;
3865 if (! v->ignore && v->same == 0)
3867 int auto_inc_opt = 0;
3869 /* If the code for derived givs immediately below has already
3870 allocated a new_reg, we must keep it. */
3872 v->new_reg = gen_reg_rtx (v->mode);
3875 /* If the target has auto-increment addressing modes, and
3876 this is an address giv, then try to put the increment
3877 immediately after its use, so that flow can create an
3878 auto-increment addressing mode. */
3879 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
3880 && bl->biv->always_executed && ! bl->biv->maybe_multiple
3881 /* We don't handle reversed biv's because bl->biv->insn
3882 does not have a valid INSN_LUID. */
3884 && v->always_executed && ! v->maybe_multiple
3885 && INSN_UID (v->insn) < max_uid_for_loop)
3887 /* If other giv's have been combined with this one, then
3888 this will work only if all uses of the other giv's occur
3889 before this giv's insn. This is difficult to check.
3891 We simplify this by looking for the common case where
3892 there is one DEST_REG giv, and this giv's insn is the
3893 last use of the dest_reg of that DEST_REG giv. If the
3894 increment occurs after the address giv, then we can
3895 perform the optimization. (Otherwise, the increment
3896 would have to go before other_giv, and we would not be
3897 able to combine it with the address giv to get an
3898 auto-inc address.) */
3899 if (v->combined_with)
3901 struct induction *other_giv = 0;
3903 for (tv = bl->giv; tv; tv = tv->next_iv)
3911 if (! tv && other_giv
3912 && REGNO (other_giv->dest_reg) < max_reg_before_loop
3913 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
3914 == INSN_UID (v->insn))
3915 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
3918 /* Check for case where increment is before the address
3919 giv. Do this test in "loop order". */
3920 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
3921 && (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
3922 || (INSN_LUID (bl->biv->insn)
3923 > INSN_LUID (loop->scan_start))))
3924 || (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
3925 && (INSN_LUID (loop->scan_start)
3926 < INSN_LUID (bl->biv->insn))))
3935 /* We can't put an insn immediately after one setting
3936 cc0, or immediately before one using cc0. */
3937 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
3938 || (auto_inc_opt == -1
3939 && (prev = prev_nonnote_insn (v->insn)) != 0
3941 && sets_cc0_p (PATTERN (prev))))
3947 v->auto_inc_opt = 1;
3951 /* For each place where the biv is incremented, add an insn
3952 to increment the new, reduced reg for the giv. */
3953 for (tv = bl->biv; tv; tv = tv->next_iv)
3958 insert_before = tv->insn;
3959 else if (auto_inc_opt == 1)
3960 insert_before = NEXT_INSN (v->insn);
3962 insert_before = v->insn;
3964 if (tv->mult_val == const1_rtx)
3965 loop_iv_add_mult_emit_before (loop, tv->add_val, v->mult_val,
3966 v->new_reg, v->new_reg,
3968 else /* tv->mult_val == const0_rtx */
3969 /* A multiply is acceptable here
3970 since this is presumed to be seldom executed. */
3971 loop_iv_add_mult_emit_before (loop, tv->add_val, v->mult_val,
3972 v->add_val, v->new_reg,
3976 /* Add code at loop start to initialize giv's reduced reg. */
3978 loop_iv_add_mult_hoist (loop,
3979 extend_value_for_giv (v, bl->initial_value),
3980 v->mult_val, v->add_val, v->new_reg);
3986 /* Check for givs whose first use is their definition and whose
3987 last use is the definition of another giv. If so, it is likely
3988 dead and should not be used to derive another giv nor to
3992 loop_givs_dead_check (loop, bl)
3993 struct loop *loop ATTRIBUTE_UNUSED;
3994 struct iv_class *bl;
3996 struct induction *v;
3998 for (v = bl->giv; v; v = v->next_iv)
4001 || (v->same && v->same->ignore))
4004 if (v->giv_type == DEST_REG
4005 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4007 struct induction *v1;
4009 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4010 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4018 loop_givs_rescan (loop, bl, reg_map)
4020 struct iv_class *bl;
4023 struct induction *v;
4025 for (v = bl->giv; v; v = v->next_iv)
4027 if (v->same && v->same->ignore)
4033 /* Update expression if this was combined, in case other giv was
4036 v->new_reg = replace_rtx (v->new_reg,
4037 v->same->dest_reg, v->same->new_reg);
4039 /* See if this register is known to be a pointer to something. If
4040 so, see if we can find the alignment. First see if there is a
4041 destination register that is a pointer. If so, this shares the
4042 alignment too. Next see if we can deduce anything from the
4043 computational information. If not, and this is a DEST_ADDR
4044 giv, at least we know that it's a pointer, though we don't know
4046 if (GET_CODE (v->new_reg) == REG
4047 && v->giv_type == DEST_REG
4048 && REG_POINTER (v->dest_reg))
4049 mark_reg_pointer (v->new_reg,
4050 REGNO_POINTER_ALIGN (REGNO (v->dest_reg)));
4051 else if (GET_CODE (v->new_reg) == REG
4052 && REG_POINTER (v->src_reg))
4054 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->src_reg));
4057 || GET_CODE (v->add_val) != CONST_INT
4058 || INTVAL (v->add_val) % (align / BITS_PER_UNIT) != 0)
4061 mark_reg_pointer (v->new_reg, align);
4063 else if (GET_CODE (v->new_reg) == REG
4064 && GET_CODE (v->add_val) == REG
4065 && REG_POINTER (v->add_val))
4067 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->add_val));
4069 if (align == 0 || GET_CODE (v->mult_val) != CONST_INT
4070 || INTVAL (v->mult_val) % (align / BITS_PER_UNIT) != 0)
4073 mark_reg_pointer (v->new_reg, align);
4075 else if (GET_CODE (v->new_reg) == REG && v->giv_type == DEST_ADDR)
4076 mark_reg_pointer (v->new_reg, 0);
4078 if (v->giv_type == DEST_ADDR)
4079 /* Store reduced reg as the address in the memref where we found
4081 validate_change (v->insn, v->location, v->new_reg, 0);
4082 else if (v->replaceable)
4084 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4088 /* Not replaceable; emit an insn to set the original giv reg from
4089 the reduced giv, same as above. */
4090 loop_insn_emit_after (loop, 0, v->insn,
4091 gen_move_insn (v->dest_reg, v->new_reg));
4094 /* When a loop is reversed, givs which depend on the reversed
4095 biv, and which are live outside the loop, must be set to their
4096 correct final value. This insn is only needed if the giv is
4097 not replaceable. The correct final value is the same as the
4098 value that the giv starts the reversed loop with. */
4099 if (bl->reversed && ! v->replaceable)
4100 loop_iv_add_mult_sink (loop,
4101 extend_value_for_giv (v, bl->initial_value),
4102 v->mult_val, v->add_val, v->dest_reg);
4103 else if (v->final_value)
4104 loop_insn_sink_or_swim (loop,
4105 gen_move_insn (v->dest_reg, v->final_value));
4107 if (loop_dump_stream)
4109 fprintf (loop_dump_stream, "giv at %d reduced to ",
4110 INSN_UID (v->insn));
4111 print_simple_rtl (loop_dump_stream, v->new_reg);
4112 fprintf (loop_dump_stream, "\n");
4119 loop_giv_reduce_benefit (loop, bl, v, test_reg)
4120 struct loop *loop ATTRIBUTE_UNUSED;
4121 struct iv_class *bl;
4122 struct induction *v;
4128 benefit = v->benefit;
4129 PUT_MODE (test_reg, v->mode);
4130 add_cost = iv_add_mult_cost (bl->biv->add_val, v->mult_val,
4131 test_reg, test_reg);
4133 /* Reduce benefit if not replaceable, since we will insert a
4134 move-insn to replace the insn that calculates this giv. Don't do
4135 this unless the giv is a user variable, since it will often be
4136 marked non-replaceable because of the duplication of the exit
4137 code outside the loop. In such a case, the copies we insert are
4138 dead and will be deleted. So they don't have a cost. Similar
4139 situations exist. */
4140 /* ??? The new final_[bg]iv_value code does a much better job of
4141 finding replaceable giv's, and hence this code may no longer be
4143 if (! v->replaceable && ! bl->eliminable
4144 && REG_USERVAR_P (v->dest_reg))
4145 benefit -= copy_cost;
4147 /* Decrease the benefit to count the add-insns that we will insert
4148 to increment the reduced reg for the giv. ??? This can
4149 overestimate the run-time cost of the additional insns, e.g. if
4150 there are multiple basic blocks that increment the biv, but only
4151 one of these blocks is executed during each iteration. There is
4152 no good way to detect cases like this with the current structure
4153 of the loop optimizer. This code is more accurate for
4154 determining code size than run-time benefits. */
4155 benefit -= add_cost * bl->biv_count;
4157 /* Decide whether to strength-reduce this giv or to leave the code
4158 unchanged (recompute it from the biv each time it is used). This
4159 decision can be made independently for each giv. */
4162 /* Attempt to guess whether autoincrement will handle some of the
4163 new add insns; if so, increase BENEFIT (undo the subtraction of
4164 add_cost that was done above). */
4165 if (v->giv_type == DEST_ADDR
4166 /* Increasing the benefit is risky, since this is only a guess.
4167 Avoid increasing register pressure in cases where there would
4168 be no other benefit from reducing this giv. */
4170 && GET_CODE (v->mult_val) == CONST_INT)
4172 int size = GET_MODE_SIZE (GET_MODE (v->mem));
4174 if (HAVE_POST_INCREMENT
4175 && INTVAL (v->mult_val) == size)
4176 benefit += add_cost * bl->biv_count;
4177 else if (HAVE_PRE_INCREMENT
4178 && INTVAL (v->mult_val) == size)
4179 benefit += add_cost * bl->biv_count;
4180 else if (HAVE_POST_DECREMENT
4181 && -INTVAL (v->mult_val) == size)
4182 benefit += add_cost * bl->biv_count;
4183 else if (HAVE_PRE_DECREMENT
4184 && -INTVAL (v->mult_val) == size)
4185 benefit += add_cost * bl->biv_count;
4193 /* Free IV structures for LOOP. */
4196 loop_ivs_free (loop)
4199 struct loop_ivs *ivs = LOOP_IVS (loop);
4200 struct iv_class *iv = ivs->list;
4206 struct iv_class *next = iv->next;
4207 struct induction *induction;
4208 struct induction *next_induction;
4210 for (induction = iv->biv; induction; induction = next_induction)
4212 next_induction = induction->next_iv;
4215 for (induction = iv->giv; induction; induction = next_induction)
4217 next_induction = induction->next_iv;
4227 /* Perform strength reduction and induction variable elimination.
4229 Pseudo registers created during this function will be beyond the
4230 last valid index in several tables including
4231 REGS->ARRAY[I].N_TIMES_SET and REGNO_LAST_UID. This does not cause a
4232 problem here, because the added registers cannot be givs outside of
4233 their loop, and hence will never be reconsidered. But scan_loop
4234 must check regnos to make sure they are in bounds. */
4237 strength_reduce (loop, flags)
4241 struct loop_info *loop_info = LOOP_INFO (loop);
4242 struct loop_regs *regs = LOOP_REGS (loop);
4243 struct loop_ivs *ivs = LOOP_IVS (loop);
4245 /* Temporary list pointer for traversing ivs->list. */
4246 struct iv_class *bl;
4247 /* Ratio of extra register life span we can justify
4248 for saving an instruction. More if loop doesn't call subroutines
4249 since in that case saving an insn makes more difference
4250 and more registers are available. */
4251 /* ??? could set this to last value of threshold in move_movables */
4252 int threshold = (loop_info->has_call ? 1 : 2) * (3 + n_non_fixed_regs);
4253 /* Map of pseudo-register replacements. */
4254 rtx *reg_map = NULL;
4256 int unrolled_insn_copies = 0;
4257 rtx test_reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
4258 int insn_count = count_insns_in_loop (loop);
4260 addr_placeholder = gen_reg_rtx (Pmode);
4262 ivs->n_regs = max_reg_before_loop;
4263 ivs->regs = (struct iv *) xcalloc (ivs->n_regs, sizeof (struct iv));
4265 /* Find all BIVs in loop. */
4266 loop_bivs_find (loop);
4268 /* Exit if there are no bivs. */
4271 /* Can still unroll the loop anyways, but indicate that there is no
4272 strength reduction info available. */
4273 if (flags & LOOP_UNROLL)
4274 unroll_loop (loop, insn_count, 0);
4276 loop_ivs_free (loop);
4280 /* Determine how BIVS are initialised by looking through pre-header
4281 extended basic block. */
4282 loop_bivs_init_find (loop);
4284 /* Look at the each biv and see if we can say anything better about its
4285 initial value from any initializing insns set up above. */
4286 loop_bivs_check (loop);
4288 /* Search the loop for general induction variables. */
4289 loop_givs_find (loop);
4291 /* Try to calculate and save the number of loop iterations. This is
4292 set to zero if the actual number can not be calculated. This must
4293 be called after all giv's have been identified, since otherwise it may
4294 fail if the iteration variable is a giv. */
4295 loop_iterations (loop);
4297 /* Now for each giv for which we still don't know whether or not it is
4298 replaceable, check to see if it is replaceable because its final value
4299 can be calculated. This must be done after loop_iterations is called,
4300 so that final_giv_value will work correctly. */
4301 loop_givs_check (loop);
4303 /* Try to prove that the loop counter variable (if any) is always
4304 nonnegative; if so, record that fact with a REG_NONNEG note
4305 so that "decrement and branch until zero" insn can be used. */
4306 check_dbra_loop (loop, insn_count);
4308 /* Create reg_map to hold substitutions for replaceable giv regs.
4309 Some givs might have been made from biv increments, so look at
4310 ivs->reg_iv_type for a suitable size. */
4311 reg_map_size = ivs->n_regs;
4312 reg_map = (rtx *) xcalloc (reg_map_size, sizeof (rtx));
4314 /* Examine each iv class for feasibility of strength reduction/induction
4315 variable elimination. */
4317 for (bl = ivs->list; bl; bl = bl->next)
4319 struct induction *v;
4322 /* Test whether it will be possible to eliminate this biv
4323 provided all givs are reduced. */
4324 bl->eliminable = loop_biv_eliminable_p (loop, bl, threshold, insn_count);
4326 /* This will be true at the end, if all givs which depend on this
4327 biv have been strength reduced.
4328 We can't (currently) eliminate the biv unless this is so. */
4329 bl->all_reduced = 1;
4331 /* Check each extension dependent giv in this class to see if its
4332 root biv is safe from wrapping in the interior mode. */
4333 check_ext_dependant_givs (bl, loop_info);
4335 /* Combine all giv's for this iv_class. */
4336 combine_givs (regs, bl);
4338 for (v = bl->giv; v; v = v->next_iv)
4340 struct induction *tv;
4342 if (v->ignore || v->same)
4345 benefit = loop_giv_reduce_benefit (loop, bl, v, test_reg);
4347 /* If an insn is not to be strength reduced, then set its ignore
4348 flag, and clear bl->all_reduced. */
4350 /* A giv that depends on a reversed biv must be reduced if it is
4351 used after the loop exit, otherwise, it would have the wrong
4352 value after the loop exit. To make it simple, just reduce all
4353 of such giv's whether or not we know they are used after the loop
4356 if (! flag_reduce_all_givs
4357 && v->lifetime * threshold * benefit < insn_count
4360 if (loop_dump_stream)
4361 fprintf (loop_dump_stream,
4362 "giv of insn %d not worth while, %d vs %d.\n",
4364 v->lifetime * threshold * benefit, insn_count);
4366 bl->all_reduced = 0;
4370 /* Check that we can increment the reduced giv without a
4371 multiply insn. If not, reject it. */
4373 for (tv = bl->biv; tv; tv = tv->next_iv)
4374 if (tv->mult_val == const1_rtx
4375 && ! product_cheap_p (tv->add_val, v->mult_val))
4377 if (loop_dump_stream)
4378 fprintf (loop_dump_stream,
4379 "giv of insn %d: would need a multiply.\n",
4380 INSN_UID (v->insn));
4382 bl->all_reduced = 0;
4388 /* Check for givs whose first use is their definition and whose
4389 last use is the definition of another giv. If so, it is likely
4390 dead and should not be used to derive another giv nor to
4392 loop_givs_dead_check (loop, bl);
4394 /* Reduce each giv that we decided to reduce. */
4395 loop_givs_reduce (loop, bl);
4397 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4400 For each giv register that can be reduced now: if replaceable,
4401 substitute reduced reg wherever the old giv occurs;
4402 else add new move insn "giv_reg = reduced_reg". */
4403 loop_givs_rescan (loop, bl, reg_map);
4405 /* All the givs based on the biv bl have been reduced if they
4408 /* For each giv not marked as maybe dead that has been combined with a
4409 second giv, clear any "maybe dead" mark on that second giv.
4410 v->new_reg will either be or refer to the register of the giv it
4413 Doing this clearing avoids problems in biv elimination where
4414 a giv's new_reg is a complex value that can't be put in the
4415 insn but the giv combined with (with a reg as new_reg) is
4416 marked maybe_dead. Since the register will be used in either
4417 case, we'd prefer it be used from the simpler giv. */
4419 for (v = bl->giv; v; v = v->next_iv)
4420 if (! v->maybe_dead && v->same)
4421 v->same->maybe_dead = 0;
4423 /* Try to eliminate the biv, if it is a candidate.
4424 This won't work if ! bl->all_reduced,
4425 since the givs we planned to use might not have been reduced.
4427 We have to be careful that we didn't initially think we could
4428 eliminate this biv because of a giv that we now think may be
4429 dead and shouldn't be used as a biv replacement.
4431 Also, there is the possibility that we may have a giv that looks
4432 like it can be used to eliminate a biv, but the resulting insn
4433 isn't valid. This can happen, for example, on the 88k, where a
4434 JUMP_INSN can compare a register only with zero. Attempts to
4435 replace it with a compare with a constant will fail.
4437 Note that in cases where this call fails, we may have replaced some
4438 of the occurrences of the biv with a giv, but no harm was done in
4439 doing so in the rare cases where it can occur. */
4441 if (bl->all_reduced == 1 && bl->eliminable
4442 && maybe_eliminate_biv (loop, bl, 1, threshold, insn_count))
4444 /* ?? If we created a new test to bypass the loop entirely,
4445 or otherwise drop straight in, based on this test, then
4446 we might want to rewrite it also. This way some later
4447 pass has more hope of removing the initialization of this
4450 /* If final_value != 0, then the biv may be used after loop end
4451 and we must emit an insn to set it just in case.
4453 Reversed bivs already have an insn after the loop setting their
4454 value, so we don't need another one. We can't calculate the
4455 proper final value for such a biv here anyways. */
4456 if (bl->final_value && ! bl->reversed)
4457 loop_insn_sink_or_swim (loop, gen_move_insn
4458 (bl->biv->dest_reg, bl->final_value));
4460 if (loop_dump_stream)
4461 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
4466 /* Go through all the instructions in the loop, making all the
4467 register substitutions scheduled in REG_MAP. */
4469 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
4470 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4471 || GET_CODE (p) == CALL_INSN)
4473 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
4474 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
4478 if (loop_info->n_iterations > 0)
4480 /* When we completely unroll a loop we will likely not need the increment
4481 of the loop BIV and we will not need the conditional branch at the
4483 unrolled_insn_copies = insn_count - 2;
4486 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
4487 need the comparison before the conditional branch at the end of the
4489 unrolled_insn_copies -= 1;
4492 /* We'll need one copy for each loop iteration. */
4493 unrolled_insn_copies *= loop_info->n_iterations;
4495 /* A little slop to account for the ability to remove initialization
4496 code, better CSE, and other secondary benefits of completely
4497 unrolling some loops. */
4498 unrolled_insn_copies -= 1;
4500 /* Clamp the value. */
4501 if (unrolled_insn_copies < 0)
4502 unrolled_insn_copies = 0;
4505 /* Unroll loops from within strength reduction so that we can use the
4506 induction variable information that strength_reduce has already
4507 collected. Always unroll loops that would be as small or smaller
4508 unrolled than when rolled. */
4509 if ((flags & LOOP_UNROLL)
4510 || (loop_info->n_iterations > 0
4511 && unrolled_insn_copies <= insn_count))
4512 unroll_loop (loop, insn_count, 1);
4514 #ifdef HAVE_doloop_end
4515 if (HAVE_doloop_end && (flags & LOOP_BCT) && flag_branch_on_count_reg)
4516 doloop_optimize (loop);
4517 #endif /* HAVE_doloop_end */
4519 /* In case number of iterations is known, drop branch prediction note
4520 in the branch. Do that only in second loop pass, as loop unrolling
4521 may change the number of iterations performed. */
4522 if ((flags & LOOP_BCT)
4523 && loop_info->n_iterations / loop_info->unroll_number > 1)
4525 int n = loop_info->n_iterations / loop_info->unroll_number;
4526 predict_insn (PREV_INSN (loop->end),
4527 PRED_LOOP_ITERATIONS,
4528 REG_BR_PROB_BASE - REG_BR_PROB_BASE / n);
4531 if (loop_dump_stream)
4532 fprintf (loop_dump_stream, "\n");
4534 loop_ivs_free (loop);
4539 /*Record all basic induction variables calculated in the insn. */
4541 check_insn_for_bivs (loop, p, not_every_iteration, maybe_multiple)
4544 int not_every_iteration;
4547 struct loop_ivs *ivs = LOOP_IVS (loop);
4554 if (GET_CODE (p) == INSN
4555 && (set = single_set (p))
4556 && GET_CODE (SET_DEST (set)) == REG)
4558 dest_reg = SET_DEST (set);
4559 if (REGNO (dest_reg) < max_reg_before_loop
4560 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
4561 && REG_IV_TYPE (ivs, REGNO (dest_reg)) != NOT_BASIC_INDUCT)
4563 if (basic_induction_var (loop, SET_SRC (set),
4564 GET_MODE (SET_SRC (set)),
4565 dest_reg, p, &inc_val, &mult_val,
4568 /* It is a possible basic induction variable.
4569 Create and initialize an induction structure for it. */
4572 = (struct induction *) xmalloc (sizeof (struct induction));
4574 record_biv (loop, v, p, dest_reg, inc_val, mult_val, location,
4575 not_every_iteration, maybe_multiple);
4576 REG_IV_TYPE (ivs, REGNO (dest_reg)) = BASIC_INDUCT;
4578 else if (REGNO (dest_reg) < ivs->n_regs)
4579 REG_IV_TYPE (ivs, REGNO (dest_reg)) = NOT_BASIC_INDUCT;
4585 /* Record all givs calculated in the insn.
4586 A register is a giv if: it is only set once, it is a function of a
4587 biv and a constant (or invariant), and it is not a biv. */
4589 check_insn_for_givs (loop, p, not_every_iteration, maybe_multiple)
4592 int not_every_iteration;
4595 struct loop_regs *regs = LOOP_REGS (loop);
4598 /* Look for a general induction variable in a register. */
4599 if (GET_CODE (p) == INSN
4600 && (set = single_set (p))
4601 && GET_CODE (SET_DEST (set)) == REG
4602 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
4611 rtx last_consec_insn;
4613 dest_reg = SET_DEST (set);
4614 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
4617 if (/* SET_SRC is a giv. */
4618 (general_induction_var (loop, SET_SRC (set), &src_reg, &add_val,
4619 &mult_val, &ext_val, 0, &benefit, VOIDmode)
4620 /* Equivalent expression is a giv. */
4621 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
4622 && general_induction_var (loop, XEXP (regnote, 0), &src_reg,
4623 &add_val, &mult_val, &ext_val, 0,
4624 &benefit, VOIDmode)))
4625 /* Don't try to handle any regs made by loop optimization.
4626 We have nothing on them in regno_first_uid, etc. */
4627 && REGNO (dest_reg) < max_reg_before_loop
4628 /* Don't recognize a BASIC_INDUCT_VAR here. */
4629 && dest_reg != src_reg
4630 /* This must be the only place where the register is set. */
4631 && (regs->array[REGNO (dest_reg)].n_times_set == 1
4632 /* or all sets must be consecutive and make a giv. */
4633 || (benefit = consec_sets_giv (loop, benefit, p,
4635 &add_val, &mult_val, &ext_val,
4636 &last_consec_insn))))
4639 = (struct induction *) xmalloc (sizeof (struct induction));
4641 /* If this is a library call, increase benefit. */
4642 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
4643 benefit += libcall_benefit (p);
4645 /* Skip the consecutive insns, if there are any. */
4646 if (regs->array[REGNO (dest_reg)].n_times_set != 1)
4647 p = last_consec_insn;
4649 record_giv (loop, v, p, src_reg, dest_reg, mult_val, add_val,
4650 ext_val, benefit, DEST_REG, not_every_iteration,
4651 maybe_multiple, (rtx*)0);
4656 #ifndef DONT_REDUCE_ADDR
4657 /* Look for givs which are memory addresses. */
4658 /* This resulted in worse code on a VAX 8600. I wonder if it
4660 if (GET_CODE (p) == INSN)
4661 find_mem_givs (loop, PATTERN (p), p, not_every_iteration,
4665 /* Update the status of whether giv can derive other givs. This can
4666 change when we pass a label or an insn that updates a biv. */
4667 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4668 || GET_CODE (p) == CODE_LABEL)
4669 update_giv_derive (loop, p);
4673 /* Return 1 if X is a valid source for an initial value (or as value being
4674 compared against in an initial test).
4676 X must be either a register or constant and must not be clobbered between
4677 the current insn and the start of the loop.
4679 INSN is the insn containing X. */
4682 valid_initial_value_p (x, insn, call_seen, loop_start)
4691 /* Only consider pseudos we know about initialized in insns whose luids
4693 if (GET_CODE (x) != REG
4694 || REGNO (x) >= max_reg_before_loop)
4697 /* Don't use call-clobbered registers across a call which clobbers it. On
4698 some machines, don't use any hard registers at all. */
4699 if (REGNO (x) < FIRST_PSEUDO_REGISTER
4700 && (SMALL_REGISTER_CLASSES
4701 || (call_used_regs[REGNO (x)] && call_seen)))
4704 /* Don't use registers that have been clobbered before the start of the
4706 if (reg_set_between_p (x, insn, loop_start))
4712 /* Scan X for memory refs and check each memory address
4713 as a possible giv. INSN is the insn whose pattern X comes from.
4714 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4715 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
4716 more thanonce in each loop iteration. */
4719 find_mem_givs (loop, x, insn, not_every_iteration, maybe_multiple)
4720 const struct loop *loop;
4723 int not_every_iteration, maybe_multiple;
4726 register enum rtx_code code;
4727 register const char *fmt;
4732 code = GET_CODE (x);
4757 /* This code used to disable creating GIVs with mult_val == 1 and
4758 add_val == 0. However, this leads to lost optimizations when
4759 it comes time to combine a set of related DEST_ADDR GIVs, since
4760 this one would not be seen. */
4762 if (general_induction_var (loop, XEXP (x, 0), &src_reg, &add_val,
4763 &mult_val, &ext_val, 1, &benefit,
4766 /* Found one; record it. */
4768 = (struct induction *) xmalloc (sizeof (struct induction));
4770 record_giv (loop, v, insn, src_reg, addr_placeholder, mult_val,
4771 add_val, ext_val, benefit, DEST_ADDR,
4772 not_every_iteration, maybe_multiple, &XEXP (x, 0));
4783 /* Recursively scan the subexpressions for other mem refs. */
4785 fmt = GET_RTX_FORMAT (code);
4786 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4788 find_mem_givs (loop, XEXP (x, i), insn, not_every_iteration,
4790 else if (fmt[i] == 'E')
4791 for (j = 0; j < XVECLEN (x, i); j++)
4792 find_mem_givs (loop, XVECEXP (x, i, j), insn, not_every_iteration,
4796 /* Fill in the data about one biv update.
4797 V is the `struct induction' in which we record the biv. (It is
4798 allocated by the caller, with alloca.)
4799 INSN is the insn that sets it.
4800 DEST_REG is the biv's reg.
4802 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4803 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4804 being set to INC_VAL.
4806 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4807 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4808 can be executed more than once per iteration. If MAYBE_MULTIPLE
4809 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4810 executed exactly once per iteration. */
4813 record_biv (loop, v, insn, dest_reg, inc_val, mult_val, location,
4814 not_every_iteration, maybe_multiple)
4816 struct induction *v;
4822 int not_every_iteration;
4825 struct loop_ivs *ivs = LOOP_IVS (loop);
4826 struct iv_class *bl;
4829 v->src_reg = dest_reg;
4830 v->dest_reg = dest_reg;
4831 v->mult_val = mult_val;
4832 v->add_val = inc_val;
4833 v->ext_dependant = NULL_RTX;
4834 v->location = location;
4835 v->mode = GET_MODE (dest_reg);
4836 v->always_computable = ! not_every_iteration;
4837 v->always_executed = ! not_every_iteration;
4838 v->maybe_multiple = maybe_multiple;
4840 /* Add this to the reg's iv_class, creating a class
4841 if this is the first incrementation of the reg. */
4843 bl = REG_IV_CLASS (ivs, REGNO (dest_reg));
4846 /* Create and initialize new iv_class. */
4848 bl = (struct iv_class *) xmalloc (sizeof (struct iv_class));
4850 bl->regno = REGNO (dest_reg);
4856 /* Set initial value to the reg itself. */
4857 bl->initial_value = dest_reg;
4858 bl->final_value = 0;
4859 /* We haven't seen the initializing insn yet */
4862 bl->initial_test = 0;
4863 bl->incremented = 0;
4867 bl->total_benefit = 0;
4869 /* Add this class to ivs->list. */
4870 bl->next = ivs->list;
4873 /* Put it in the array of biv register classes. */
4874 REG_IV_CLASS (ivs, REGNO (dest_reg)) = bl;
4877 /* Update IV_CLASS entry for this biv. */
4878 v->next_iv = bl->biv;
4881 if (mult_val == const1_rtx)
4882 bl->incremented = 1;
4884 if (loop_dump_stream)
4885 loop_biv_dump (v, loop_dump_stream, 0);
4888 /* Fill in the data about one giv.
4889 V is the `struct induction' in which we record the giv. (It is
4890 allocated by the caller, with alloca.)
4891 INSN is the insn that sets it.
4892 BENEFIT estimates the savings from deleting this insn.
4893 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4894 into a register or is used as a memory address.
4896 SRC_REG is the biv reg which the giv is computed from.
4897 DEST_REG is the giv's reg (if the giv is stored in a reg).
4898 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4899 LOCATION points to the place where this giv's value appears in INSN. */
4902 record_giv (loop, v, insn, src_reg, dest_reg, mult_val, add_val, ext_val,
4903 benefit, type, not_every_iteration, maybe_multiple, location)
4904 const struct loop *loop;
4905 struct induction *v;
4909 rtx mult_val, add_val, ext_val;
4912 int not_every_iteration, maybe_multiple;
4915 struct loop_ivs *ivs = LOOP_IVS (loop);
4916 struct induction *b;
4917 struct iv_class *bl;
4918 rtx set = single_set (insn);
4921 /* Attempt to prove constantness of the values. Don't let simplity_rtx
4922 undo the MULT canonicalization that we performed earlier. */
4923 temp = simplify_rtx (add_val);
4925 && ! (GET_CODE (add_val) == MULT
4926 && GET_CODE (temp) == ASHIFT))
4930 v->src_reg = src_reg;
4932 v->dest_reg = dest_reg;
4933 v->mult_val = mult_val;
4934 v->add_val = add_val;
4935 v->ext_dependant = ext_val;
4936 v->benefit = benefit;
4937 v->location = location;
4939 v->combined_with = 0;
4940 v->maybe_multiple = maybe_multiple;
4942 v->derive_adjustment = 0;
4948 v->auto_inc_opt = 0;
4952 /* The v->always_computable field is used in update_giv_derive, to
4953 determine whether a giv can be used to derive another giv. For a
4954 DEST_REG giv, INSN computes a new value for the giv, so its value
4955 isn't computable if INSN insn't executed every iteration.
4956 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4957 it does not compute a new value. Hence the value is always computable
4958 regardless of whether INSN is executed each iteration. */
4960 if (type == DEST_ADDR)
4961 v->always_computable = 1;
4963 v->always_computable = ! not_every_iteration;
4965 v->always_executed = ! not_every_iteration;
4967 if (type == DEST_ADDR)
4969 v->mode = GET_MODE (*location);
4972 else /* type == DEST_REG */
4974 v->mode = GET_MODE (SET_DEST (set));
4976 v->lifetime = LOOP_REG_LIFETIME (loop, REGNO (dest_reg));
4978 /* If the lifetime is zero, it means that this register is
4979 really a dead store. So mark this as a giv that can be
4980 ignored. This will not prevent the biv from being eliminated. */
4981 if (v->lifetime == 0)
4984 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
4985 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
4988 /* Add the giv to the class of givs computed from one biv. */
4990 bl = REG_IV_CLASS (ivs, REGNO (src_reg));
4993 v->next_iv = bl->giv;
4995 /* Don't count DEST_ADDR. This is supposed to count the number of
4996 insns that calculate givs. */
4997 if (type == DEST_REG)
4999 bl->total_benefit += benefit;
5002 /* Fatal error, biv missing for this giv? */
5005 if (type == DEST_ADDR)
5009 /* The giv can be replaced outright by the reduced register only if all
5010 of the following conditions are true:
5011 - the insn that sets the giv is always executed on any iteration
5012 on which the giv is used at all
5013 (there are two ways to deduce this:
5014 either the insn is executed on every iteration,
5015 or all uses follow that insn in the same basic block),
5016 - the giv is not used outside the loop
5017 - no assignments to the biv occur during the giv's lifetime. */
5019 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5020 /* Previous line always fails if INSN was moved by loop opt. */
5021 && REGNO_LAST_LUID (REGNO (dest_reg))
5022 < INSN_LUID (loop->end)
5023 && (! not_every_iteration
5024 || last_use_this_basic_block (dest_reg, insn)))
5026 /* Now check that there are no assignments to the biv within the
5027 giv's lifetime. This requires two separate checks. */
5029 /* Check each biv update, and fail if any are between the first
5030 and last use of the giv.
5032 If this loop contains an inner loop that was unrolled, then
5033 the insn modifying the biv may have been emitted by the loop
5034 unrolling code, and hence does not have a valid luid. Just
5035 mark the biv as not replaceable in this case. It is not very
5036 useful as a biv, because it is used in two different loops.
5037 It is very unlikely that we would be able to optimize the giv
5038 using this biv anyways. */
5041 for (b = bl->biv; b; b = b->next_iv)
5043 if (INSN_UID (b->insn) >= max_uid_for_loop
5044 || ((INSN_LUID (b->insn)
5045 >= REGNO_FIRST_LUID (REGNO (dest_reg)))
5046 && (INSN_LUID (b->insn)
5047 <= REGNO_LAST_LUID (REGNO (dest_reg)))))
5050 v->not_replaceable = 1;
5055 /* If there are any backwards branches that go from after the
5056 biv update to before it, then this giv is not replaceable. */
5058 for (b = bl->biv; b; b = b->next_iv)
5059 if (back_branch_in_range_p (loop, b->insn))
5062 v->not_replaceable = 1;
5068 /* May still be replaceable, we don't have enough info here to
5071 v->not_replaceable = 0;
5075 /* Record whether the add_val contains a const_int, for later use by
5080 v->no_const_addval = 1;
5081 if (tem == const0_rtx)
5083 else if (CONSTANT_P (add_val))
5084 v->no_const_addval = 0;
5085 if (GET_CODE (tem) == PLUS)
5089 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5090 tem = XEXP (tem, 0);
5091 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5092 tem = XEXP (tem, 1);
5096 if (CONSTANT_P (XEXP (tem, 1)))
5097 v->no_const_addval = 0;
5101 if (loop_dump_stream)
5102 loop_giv_dump (v, loop_dump_stream, 0);
5105 /* All this does is determine whether a giv can be made replaceable because
5106 its final value can be calculated. This code can not be part of record_giv
5107 above, because final_giv_value requires that the number of loop iterations
5108 be known, and that can not be accurately calculated until after all givs
5109 have been identified. */
5112 check_final_value (loop, v)
5113 const struct loop *loop;
5114 struct induction *v;
5116 struct loop_ivs *ivs = LOOP_IVS (loop);
5117 struct iv_class *bl;
5118 rtx final_value = 0;
5120 bl = REG_IV_CLASS (ivs, REGNO (v->src_reg));
5122 /* DEST_ADDR givs will never reach here, because they are always marked
5123 replaceable above in record_giv. */
5125 /* The giv can be replaced outright by the reduced register only if all
5126 of the following conditions are true:
5127 - the insn that sets the giv is always executed on any iteration
5128 on which the giv is used at all
5129 (there are two ways to deduce this:
5130 either the insn is executed on every iteration,
5131 or all uses follow that insn in the same basic block),
5132 - its final value can be calculated (this condition is different
5133 than the one above in record_giv)
5134 - it's not used before the it's set
5135 - no assignments to the biv occur during the giv's lifetime. */
5138 /* This is only called now when replaceable is known to be false. */
5139 /* Clear replaceable, so that it won't confuse final_giv_value. */
5143 if ((final_value = final_giv_value (loop, v))
5144 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5146 int biv_increment_seen = 0, before_giv_insn = 0;
5152 /* When trying to determine whether or not a biv increment occurs
5153 during the lifetime of the giv, we can ignore uses of the variable
5154 outside the loop because final_value is true. Hence we can not
5155 use regno_last_uid and regno_first_uid as above in record_giv. */
5157 /* Search the loop to determine whether any assignments to the
5158 biv occur during the giv's lifetime. Start with the insn
5159 that sets the giv, and search around the loop until we come
5160 back to that insn again.
5162 Also fail if there is a jump within the giv's lifetime that jumps
5163 to somewhere outside the lifetime but still within the loop. This
5164 catches spaghetti code where the execution order is not linear, and
5165 hence the above test fails. Here we assume that the giv lifetime
5166 does not extend from one iteration of the loop to the next, so as
5167 to make the test easier. Since the lifetime isn't known yet,
5168 this requires two loops. See also record_giv above. */
5170 last_giv_use = v->insn;
5177 before_giv_insn = 1;
5178 p = NEXT_INSN (loop->start);
5183 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5184 || GET_CODE (p) == CALL_INSN)
5186 /* It is possible for the BIV increment to use the GIV if we
5187 have a cycle. Thus we must be sure to check each insn for
5188 both BIV and GIV uses, and we must check for BIV uses
5191 if (! biv_increment_seen
5192 && reg_set_p (v->src_reg, PATTERN (p)))
5193 biv_increment_seen = 1;
5195 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5197 if (biv_increment_seen || before_giv_insn)
5200 v->not_replaceable = 1;
5208 /* Now that the lifetime of the giv is known, check for branches
5209 from within the lifetime to outside the lifetime if it is still
5219 p = NEXT_INSN (loop->start);
5220 if (p == last_giv_use)
5223 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5224 && LABEL_NAME (JUMP_LABEL (p))
5225 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
5226 && loop_insn_first_p (loop->start, JUMP_LABEL (p)))
5227 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
5228 && loop_insn_first_p (JUMP_LABEL (p), loop->end))))
5231 v->not_replaceable = 1;
5233 if (loop_dump_stream)
5234 fprintf (loop_dump_stream,
5235 "Found branch outside giv lifetime.\n");
5242 /* If it is replaceable, then save the final value. */
5244 v->final_value = final_value;
5247 if (loop_dump_stream && v->replaceable)
5248 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5249 INSN_UID (v->insn), REGNO (v->dest_reg));
5252 /* Update the status of whether a giv can derive other givs.
5254 We need to do something special if there is or may be an update to the biv
5255 between the time the giv is defined and the time it is used to derive
5258 In addition, a giv that is only conditionally set is not allowed to
5259 derive another giv once a label has been passed.
5261 The cases we look at are when a label or an update to a biv is passed. */
5264 update_giv_derive (loop, p)
5265 const struct loop *loop;
5268 struct loop_ivs *ivs = LOOP_IVS (loop);
5269 struct iv_class *bl;
5270 struct induction *biv, *giv;
5274 /* Search all IV classes, then all bivs, and finally all givs.
5276 There are three cases we are concerned with. First we have the situation
5277 of a giv that is only updated conditionally. In that case, it may not
5278 derive any givs after a label is passed.
5280 The second case is when a biv update occurs, or may occur, after the
5281 definition of a giv. For certain biv updates (see below) that are
5282 known to occur between the giv definition and use, we can adjust the
5283 giv definition. For others, or when the biv update is conditional,
5284 we must prevent the giv from deriving any other givs. There are two
5285 sub-cases within this case.
5287 If this is a label, we are concerned with any biv update that is done
5288 conditionally, since it may be done after the giv is defined followed by
5289 a branch here (actually, we need to pass both a jump and a label, but
5290 this extra tracking doesn't seem worth it).
5292 If this is a jump, we are concerned about any biv update that may be
5293 executed multiple times. We are actually only concerned about
5294 backward jumps, but it is probably not worth performing the test
5295 on the jump again here.
5297 If this is a biv update, we must adjust the giv status to show that a
5298 subsequent biv update was performed. If this adjustment cannot be done,
5299 the giv cannot derive further givs. */
5301 for (bl = ivs->list; bl; bl = bl->next)
5302 for (biv = bl->biv; biv; biv = biv->next_iv)
5303 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5306 for (giv = bl->giv; giv; giv = giv->next_iv)
5308 /* If cant_derive is already true, there is no point in
5309 checking all of these conditions again. */
5310 if (giv->cant_derive)
5313 /* If this giv is conditionally set and we have passed a label,
5314 it cannot derive anything. */
5315 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5316 giv->cant_derive = 1;
5318 /* Skip givs that have mult_val == 0, since
5319 they are really invariants. Also skip those that are
5320 replaceable, since we know their lifetime doesn't contain
5322 else if (giv->mult_val == const0_rtx || giv->replaceable)
5325 /* The only way we can allow this giv to derive another
5326 is if this is a biv increment and we can form the product
5327 of biv->add_val and giv->mult_val. In this case, we will
5328 be able to compute a compensation. */
5329 else if (biv->insn == p)
5334 if (biv->mult_val == const1_rtx)
5335 tem = simplify_giv_expr (loop,
5336 gen_rtx_MULT (giv->mode,
5339 &ext_val_dummy, &dummy);
5341 if (tem && giv->derive_adjustment)
5342 tem = simplify_giv_expr
5344 gen_rtx_PLUS (giv->mode, tem, giv->derive_adjustment),
5345 &ext_val_dummy, &dummy);
5348 giv->derive_adjustment = tem;
5350 giv->cant_derive = 1;
5352 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
5353 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
5354 giv->cant_derive = 1;
5359 /* Check whether an insn is an increment legitimate for a basic induction var.
5360 X is the source of insn P, or a part of it.
5361 MODE is the mode in which X should be interpreted.
5363 DEST_REG is the putative biv, also the destination of the insn.
5364 We accept patterns of these forms:
5365 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5366 REG = INVARIANT + REG
5368 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5369 store the additive term into *INC_VAL, and store the place where
5370 we found the additive term into *LOCATION.
5372 If X is an assignment of an invariant into DEST_REG, we set
5373 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5375 We also want to detect a BIV when it corresponds to a variable
5376 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5377 of the variable may be a PLUS that adds a SUBREG of that variable to
5378 an invariant and then sign- or zero-extends the result of the PLUS
5381 Most GIVs in such cases will be in the promoted mode, since that is the
5382 probably the natural computation mode (and almost certainly the mode
5383 used for addresses) on the machine. So we view the pseudo-reg containing
5384 the variable as the BIV, as if it were simply incremented.
5386 Note that treating the entire pseudo as a BIV will result in making
5387 simple increments to any GIVs based on it. However, if the variable
5388 overflows in its declared mode but not its promoted mode, the result will
5389 be incorrect. This is acceptable if the variable is signed, since
5390 overflows in such cases are undefined, but not if it is unsigned, since
5391 those overflows are defined. So we only check for SIGN_EXTEND and
5394 If we cannot find a biv, we return 0. */
5397 basic_induction_var (loop, x, mode, dest_reg, p, inc_val, mult_val, location)
5398 const struct loop *loop;
5400 enum machine_mode mode;
5407 register enum rtx_code code;
5411 code = GET_CODE (x);
5416 if (rtx_equal_p (XEXP (x, 0), dest_reg)
5417 || (GET_CODE (XEXP (x, 0)) == SUBREG
5418 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
5419 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
5421 argp = &XEXP (x, 1);
5423 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
5424 || (GET_CODE (XEXP (x, 1)) == SUBREG
5425 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
5426 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
5428 argp = &XEXP (x, 0);
5434 if (loop_invariant_p (loop, arg) != 1)
5437 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
5438 *mult_val = const1_rtx;
5443 /* If this is a SUBREG for a promoted variable, check the inner
5445 if (SUBREG_PROMOTED_VAR_P (x))
5446 return basic_induction_var (loop, SUBREG_REG (x),
5447 GET_MODE (SUBREG_REG (x)),
5448 dest_reg, p, inc_val, mult_val, location);
5452 /* If this register is assigned in a previous insn, look at its
5453 source, but don't go outside the loop or past a label. */
5455 /* If this sets a register to itself, we would repeat any previous
5456 biv increment if we applied this strategy blindly. */
5457 if (rtx_equal_p (dest_reg, x))
5466 insn = PREV_INSN (insn);
5468 while (insn && GET_CODE (insn) == NOTE
5469 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5473 set = single_set (insn);
5476 dest = SET_DEST (set);
5478 || (GET_CODE (dest) == SUBREG
5479 && (GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD)
5480 && (GET_MODE_CLASS (GET_MODE (dest)) == MODE_INT)
5481 && SUBREG_REG (dest) == x))
5482 return basic_induction_var (loop, SET_SRC (set),
5483 (GET_MODE (SET_SRC (set)) == VOIDmode
5485 : GET_MODE (SET_SRC (set))),
5487 inc_val, mult_val, location);
5489 while (GET_CODE (dest) == SIGN_EXTRACT
5490 || GET_CODE (dest) == ZERO_EXTRACT
5491 || GET_CODE (dest) == SUBREG
5492 || GET_CODE (dest) == STRICT_LOW_PART)
5493 dest = XEXP (dest, 0);
5499 /* Can accept constant setting of biv only when inside inner most loop.
5500 Otherwise, a biv of an inner loop may be incorrectly recognized
5501 as a biv of the outer loop,
5502 causing code to be moved INTO the inner loop. */
5504 if (loop_invariant_p (loop, x) != 1)
5509 /* convert_modes aborts if we try to convert to or from CCmode, so just
5510 exclude that case. It is very unlikely that a condition code value
5511 would be a useful iterator anyways. */
5512 if (loop->level == 1
5513 && GET_MODE_CLASS (mode) != MODE_CC
5514 && GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
5516 /* Possible bug here? Perhaps we don't know the mode of X. */
5517 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
5518 *mult_val = const0_rtx;
5525 return basic_induction_var (loop, XEXP (x, 0), GET_MODE (XEXP (x, 0)),
5526 dest_reg, p, inc_val, mult_val, location);
5529 /* Similar, since this can be a sign extension. */
5530 for (insn = PREV_INSN (p);
5531 (insn && GET_CODE (insn) == NOTE
5532 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5533 insn = PREV_INSN (insn))
5537 set = single_set (insn);
5539 if (! rtx_equal_p (dest_reg, XEXP (x, 0))
5540 && set && SET_DEST (set) == XEXP (x, 0)
5541 && GET_CODE (XEXP (x, 1)) == CONST_INT
5542 && INTVAL (XEXP (x, 1)) >= 0
5543 && GET_CODE (SET_SRC (set)) == ASHIFT
5544 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
5545 return basic_induction_var (loop, XEXP (SET_SRC (set), 0),
5546 GET_MODE (XEXP (x, 0)),
5547 dest_reg, insn, inc_val, mult_val,
5556 /* A general induction variable (giv) is any quantity that is a linear
5557 function of a basic induction variable,
5558 i.e. giv = biv * mult_val + add_val.
5559 The coefficients can be any loop invariant quantity.
5560 A giv need not be computed directly from the biv;
5561 it can be computed by way of other givs. */
5563 /* Determine whether X computes a giv.
5564 If it does, return a nonzero value
5565 which is the benefit from eliminating the computation of X;
5566 set *SRC_REG to the register of the biv that it is computed from;
5567 set *ADD_VAL and *MULT_VAL to the coefficients,
5568 such that the value of X is biv * mult + add; */
5571 general_induction_var (loop, x, src_reg, add_val, mult_val, ext_val,
5572 is_addr, pbenefit, addr_mode)
5573 const struct loop *loop;
5581 enum machine_mode addr_mode;
5583 struct loop_ivs *ivs = LOOP_IVS (loop);
5586 /* If this is an invariant, forget it, it isn't a giv. */
5587 if (loop_invariant_p (loop, x) == 1)
5591 *ext_val = NULL_RTX;
5592 x = simplify_giv_expr (loop, x, ext_val, pbenefit);
5596 switch (GET_CODE (x))
5600 /* Since this is now an invariant and wasn't before, it must be a giv
5601 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5603 *src_reg = ivs->list->biv->dest_reg;
5604 *mult_val = const0_rtx;
5609 /* This is equivalent to a BIV. */
5611 *mult_val = const1_rtx;
5612 *add_val = const0_rtx;
5616 /* Either (plus (biv) (invar)) or
5617 (plus (mult (biv) (invar_1)) (invar_2)). */
5618 if (GET_CODE (XEXP (x, 0)) == MULT)
5620 *src_reg = XEXP (XEXP (x, 0), 0);
5621 *mult_val = XEXP (XEXP (x, 0), 1);
5625 *src_reg = XEXP (x, 0);
5626 *mult_val = const1_rtx;
5628 *add_val = XEXP (x, 1);
5632 /* ADD_VAL is zero. */
5633 *src_reg = XEXP (x, 0);
5634 *mult_val = XEXP (x, 1);
5635 *add_val = const0_rtx;
5642 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5643 unless they are CONST_INT). */
5644 if (GET_CODE (*add_val) == USE)
5645 *add_val = XEXP (*add_val, 0);
5646 if (GET_CODE (*mult_val) == USE)
5647 *mult_val = XEXP (*mult_val, 0);
5650 *pbenefit += address_cost (orig_x, addr_mode) - reg_address_cost;
5652 *pbenefit += rtx_cost (orig_x, SET);
5654 /* Always return true if this is a giv so it will be detected as such,
5655 even if the benefit is zero or negative. This allows elimination
5656 of bivs that might otherwise not be eliminated. */
5660 /* Given an expression, X, try to form it as a linear function of a biv.
5661 We will canonicalize it to be of the form
5662 (plus (mult (BIV) (invar_1))
5664 with possible degeneracies.
5666 The invariant expressions must each be of a form that can be used as a
5667 machine operand. We surround then with a USE rtx (a hack, but localized
5668 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5669 routine; it is the caller's responsibility to strip them.
5671 If no such canonicalization is possible (i.e., two biv's are used or an
5672 expression that is neither invariant nor a biv or giv), this routine
5675 For a non-zero return, the result will have a code of CONST_INT, USE,
5676 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5678 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5680 static rtx sge_plus PARAMS ((enum machine_mode, rtx, rtx));
5681 static rtx sge_plus_constant PARAMS ((rtx, rtx));
5684 simplify_giv_expr (loop, x, ext_val, benefit)
5685 const struct loop *loop;
5690 struct loop_ivs *ivs = LOOP_IVS (loop);
5691 struct loop_regs *regs = LOOP_REGS (loop);
5692 enum machine_mode mode = GET_MODE (x);
5696 /* If this is not an integer mode, or if we cannot do arithmetic in this
5697 mode, this can't be a giv. */
5698 if (mode != VOIDmode
5699 && (GET_MODE_CLASS (mode) != MODE_INT
5700 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
5703 switch (GET_CODE (x))
5706 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
5707 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
5708 if (arg0 == 0 || arg1 == 0)
5711 /* Put constant last, CONST_INT last if both constant. */
5712 if ((GET_CODE (arg0) == USE
5713 || GET_CODE (arg0) == CONST_INT)
5714 && ! ((GET_CODE (arg0) == USE
5715 && GET_CODE (arg1) == USE)
5716 || GET_CODE (arg1) == CONST_INT))
5717 tem = arg0, arg0 = arg1, arg1 = tem;
5719 /* Handle addition of zero, then addition of an invariant. */
5720 if (arg1 == const0_rtx)
5722 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
5723 switch (GET_CODE (arg0))
5727 /* Adding two invariants must result in an invariant, so enclose
5728 addition operation inside a USE and return it. */
5729 if (GET_CODE (arg0) == USE)
5730 arg0 = XEXP (arg0, 0);
5731 if (GET_CODE (arg1) == USE)
5732 arg1 = XEXP (arg1, 0);
5734 if (GET_CODE (arg0) == CONST_INT)
5735 tem = arg0, arg0 = arg1, arg1 = tem;
5736 if (GET_CODE (arg1) == CONST_INT)
5737 tem = sge_plus_constant (arg0, arg1);
5739 tem = sge_plus (mode, arg0, arg1);
5741 if (GET_CODE (tem) != CONST_INT)
5742 tem = gen_rtx_USE (mode, tem);
5747 /* biv + invar or mult + invar. Return sum. */
5748 return gen_rtx_PLUS (mode, arg0, arg1);
5751 /* (a + invar_1) + invar_2. Associate. */
5753 simplify_giv_expr (loop,
5765 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5766 MULT to reduce cases. */
5767 if (GET_CODE (arg0) == REG)
5768 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
5769 if (GET_CODE (arg1) == REG)
5770 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
5772 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5773 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5774 Recurse to associate the second PLUS. */
5775 if (GET_CODE (arg1) == MULT)
5776 tem = arg0, arg0 = arg1, arg1 = tem;
5778 if (GET_CODE (arg1) == PLUS)
5780 simplify_giv_expr (loop,
5782 gen_rtx_PLUS (mode, arg0,
5787 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5788 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
5791 if (!rtx_equal_p (arg0, arg1))
5794 return simplify_giv_expr (loop,
5803 /* Handle "a - b" as "a + b * (-1)". */
5804 return simplify_giv_expr (loop,
5813 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
5814 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
5815 if (arg0 == 0 || arg1 == 0)
5818 /* Put constant last, CONST_INT last if both constant. */
5819 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
5820 && GET_CODE (arg1) != CONST_INT)
5821 tem = arg0, arg0 = arg1, arg1 = tem;
5823 /* If second argument is not now constant, not giv. */
5824 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
5827 /* Handle multiply by 0 or 1. */
5828 if (arg1 == const0_rtx)
5831 else if (arg1 == const1_rtx)
5834 switch (GET_CODE (arg0))
5837 /* biv * invar. Done. */
5838 return gen_rtx_MULT (mode, arg0, arg1);
5841 /* Product of two constants. */
5842 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
5845 /* invar * invar is a giv, but attempt to simplify it somehow. */
5846 if (GET_CODE (arg1) != CONST_INT)
5849 arg0 = XEXP (arg0, 0);
5850 if (GET_CODE (arg0) == MULT)
5852 /* (invar_0 * invar_1) * invar_2. Associate. */
5853 return simplify_giv_expr (loop,
5862 /* Porpagate the MULT expressions to the intermost nodes. */
5863 else if (GET_CODE (arg0) == PLUS)
5865 /* (invar_0 + invar_1) * invar_2. Distribute. */
5866 return simplify_giv_expr (loop,
5878 return gen_rtx_USE (mode, gen_rtx_MULT (mode, arg0, arg1));
5881 /* (a * invar_1) * invar_2. Associate. */
5882 return simplify_giv_expr (loop,
5891 /* (a + invar_1) * invar_2. Distribute. */
5892 return simplify_giv_expr (loop,
5907 /* Shift by constant is multiply by power of two. */
5908 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
5912 simplify_giv_expr (loop,
5915 GEN_INT ((HOST_WIDE_INT) 1
5916 << INTVAL (XEXP (x, 1)))),
5920 /* "-a" is "a * (-1)" */
5921 return simplify_giv_expr (loop,
5922 gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
5926 /* "~a" is "-a - 1". Silly, but easy. */
5927 return simplify_giv_expr (loop,
5928 gen_rtx_MINUS (mode,
5929 gen_rtx_NEG (mode, XEXP (x, 0)),
5934 /* Already in proper form for invariant. */
5940 /* Conditionally recognize extensions of simple IVs. After we've
5941 computed loop traversal counts and verified the range of the
5942 source IV, we'll reevaluate this as a GIV. */
5943 if (*ext_val == NULL_RTX)
5945 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
5946 if (arg0 && *ext_val == NULL_RTX && GET_CODE (arg0) == REG)
5948 *ext_val = gen_rtx_fmt_e (GET_CODE (x), mode, arg0);
5955 /* If this is a new register, we can't deal with it. */
5956 if (REGNO (x) >= max_reg_before_loop)
5959 /* Check for biv or giv. */
5960 switch (REG_IV_TYPE (ivs, REGNO (x)))
5964 case GENERAL_INDUCT:
5966 struct induction *v = REG_IV_INFO (ivs, REGNO (x));
5968 /* Form expression from giv and add benefit. Ensure this giv
5969 can derive another and subtract any needed adjustment if so. */
5971 /* Increasing the benefit here is risky. The only case in which it
5972 is arguably correct is if this is the only use of V. In other
5973 cases, this will artificially inflate the benefit of the current
5974 giv, and lead to suboptimal code. Thus, it is disabled, since
5975 potentially not reducing an only marginally beneficial giv is
5976 less harmful than reducing many givs that are not really
5979 rtx single_use = regs->array[REGNO (x)].single_usage;
5980 if (single_use && single_use != const0_rtx)
5981 *benefit += v->benefit;
5987 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode,
5988 v->src_reg, v->mult_val),
5991 if (v->derive_adjustment)
5992 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
5993 arg0 = simplify_giv_expr (loop, tem, ext_val, benefit);
5996 if (!v->ext_dependant)
6001 *ext_val = v->ext_dependant;
6009 /* If it isn't an induction variable, and it is invariant, we
6010 may be able to simplify things further by looking through
6011 the bits we just moved outside the loop. */
6012 if (loop_invariant_p (loop, x) == 1)
6015 struct loop_movables *movables = LOOP_MOVABLES (loop);
6017 for (m = movables->head; m; m = m->next)
6018 if (rtx_equal_p (x, m->set_dest))
6020 /* Ok, we found a match. Substitute and simplify. */
6022 /* If we match another movable, we must use that, as
6023 this one is going away. */
6025 return simplify_giv_expr (loop, m->match->set_dest,
6028 /* If consec is non-zero, this is a member of a group of
6029 instructions that were moved together. We handle this
6030 case only to the point of seeking to the last insn and
6031 looking for a REG_EQUAL. Fail if we don't find one. */
6038 tem = NEXT_INSN (tem);
6042 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6044 tem = XEXP (tem, 0);
6048 tem = single_set (m->insn);
6050 tem = SET_SRC (tem);
6055 /* What we are most interested in is pointer
6056 arithmetic on invariants -- only take
6057 patterns we may be able to do something with. */
6058 if (GET_CODE (tem) == PLUS
6059 || GET_CODE (tem) == MULT
6060 || GET_CODE (tem) == ASHIFT
6061 || GET_CODE (tem) == CONST_INT
6062 || GET_CODE (tem) == SYMBOL_REF)
6064 tem = simplify_giv_expr (loop, tem, ext_val,
6069 else if (GET_CODE (tem) == CONST
6070 && GET_CODE (XEXP (tem, 0)) == PLUS
6071 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6072 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6074 tem = simplify_giv_expr (loop, XEXP (tem, 0),
6086 /* Fall through to general case. */
6088 /* If invariant, return as USE (unless CONST_INT).
6089 Otherwise, not giv. */
6090 if (GET_CODE (x) == USE)
6093 if (loop_invariant_p (loop, x) == 1)
6095 if (GET_CODE (x) == CONST_INT)
6097 if (GET_CODE (x) == CONST
6098 && GET_CODE (XEXP (x, 0)) == PLUS
6099 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6100 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6102 return gen_rtx_USE (mode, x);
6109 /* This routine folds invariants such that there is only ever one
6110 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6113 sge_plus_constant (x, c)
6116 if (GET_CODE (x) == CONST_INT)
6117 return GEN_INT (INTVAL (x) + INTVAL (c));
6118 else if (GET_CODE (x) != PLUS)
6119 return gen_rtx_PLUS (GET_MODE (x), x, c);
6120 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6122 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6123 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6125 else if (GET_CODE (XEXP (x, 0)) == PLUS
6126 || GET_CODE (XEXP (x, 1)) != PLUS)
6128 return gen_rtx_PLUS (GET_MODE (x),
6129 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6133 return gen_rtx_PLUS (GET_MODE (x),
6134 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6139 sge_plus (mode, x, y)
6140 enum machine_mode mode;
6143 while (GET_CODE (y) == PLUS)
6145 rtx a = XEXP (y, 0);
6146 if (GET_CODE (a) == CONST_INT)
6147 x = sge_plus_constant (x, a);
6149 x = gen_rtx_PLUS (mode, x, a);
6152 if (GET_CODE (y) == CONST_INT)
6153 x = sge_plus_constant (x, y);
6155 x = gen_rtx_PLUS (mode, x, y);
6159 /* Help detect a giv that is calculated by several consecutive insns;
6163 The caller has already identified the first insn P as having a giv as dest;
6164 we check that all other insns that set the same register follow
6165 immediately after P, that they alter nothing else,
6166 and that the result of the last is still a giv.
6168 The value is 0 if the reg set in P is not really a giv.
6169 Otherwise, the value is the amount gained by eliminating
6170 all the consecutive insns that compute the value.
6172 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6173 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6175 The coefficients of the ultimate giv value are stored in
6176 *MULT_VAL and *ADD_VAL. */
6179 consec_sets_giv (loop, first_benefit, p, src_reg, dest_reg,
6180 add_val, mult_val, ext_val, last_consec_insn)
6181 const struct loop *loop;
6189 rtx *last_consec_insn;
6191 struct loop_ivs *ivs = LOOP_IVS (loop);
6192 struct loop_regs *regs = LOOP_REGS (loop);
6199 /* Indicate that this is a giv so that we can update the value produced in
6200 each insn of the multi-insn sequence.
6202 This induction structure will be used only by the call to
6203 general_induction_var below, so we can allocate it on our stack.
6204 If this is a giv, our caller will replace the induct var entry with
6205 a new induction structure. */
6206 struct induction *v;
6208 if (REG_IV_TYPE (ivs, REGNO (dest_reg)) != UNKNOWN_INDUCT)
6211 v = (struct induction *) alloca (sizeof (struct induction));
6212 v->src_reg = src_reg;
6213 v->mult_val = *mult_val;
6214 v->add_val = *add_val;
6215 v->benefit = first_benefit;
6217 v->derive_adjustment = 0;
6218 v->ext_dependant = NULL_RTX;
6220 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
6221 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
6223 count = regs->array[REGNO (dest_reg)].n_times_set - 1;
6228 code = GET_CODE (p);
6230 /* If libcall, skip to end of call sequence. */
6231 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6235 && (set = single_set (p))
6236 && GET_CODE (SET_DEST (set)) == REG
6237 && SET_DEST (set) == dest_reg
6238 && (general_induction_var (loop, SET_SRC (set), &src_reg,
6239 add_val, mult_val, ext_val, 0,
6241 /* Giv created by equivalent expression. */
6242 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6243 && general_induction_var (loop, XEXP (temp, 0), &src_reg,
6244 add_val, mult_val, ext_val, 0,
6245 &benefit, VOIDmode)))
6246 && src_reg == v->src_reg)
6248 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6249 benefit += libcall_benefit (p);
6252 v->mult_val = *mult_val;
6253 v->add_val = *add_val;
6254 v->benefit += benefit;
6256 else if (code != NOTE)
6258 /* Allow insns that set something other than this giv to a
6259 constant. Such insns are needed on machines which cannot
6260 include long constants and should not disqualify a giv. */
6262 && (set = single_set (p))
6263 && SET_DEST (set) != dest_reg
6264 && CONSTANT_P (SET_SRC (set)))
6267 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
6272 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
6273 *last_consec_insn = p;
6277 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6278 represented by G1. If no such expression can be found, or it is clear that
6279 it cannot possibly be a valid address, 0 is returned.
6281 To perform the computation, we note that
6284 where `v' is the biv.
6286 So G2 = (y/b) * G1 + (b - a*y/x).
6288 Note that MULT = y/x.
6290 Update: A and B are now allowed to be additive expressions such that
6291 B contains all variables in A. That is, computing B-A will not require
6292 subtracting variables. */
6295 express_from_1 (a, b, mult)
6298 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6300 if (mult == const0_rtx)
6303 /* If MULT is not 1, we cannot handle A with non-constants, since we
6304 would then be required to subtract multiples of the registers in A.
6305 This is theoretically possible, and may even apply to some Fortran
6306 constructs, but it is a lot of work and we do not attempt it here. */
6308 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
6311 /* In general these structures are sorted top to bottom (down the PLUS
6312 chain), but not left to right across the PLUS. If B is a higher
6313 order giv than A, we can strip one level and recurse. If A is higher
6314 order, we'll eventually bail out, but won't know that until the end.
6315 If they are the same, we'll strip one level around this loop. */
6317 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
6319 rtx ra, rb, oa, ob, tmp;
6321 ra = XEXP (a, 0), oa = XEXP (a, 1);
6322 if (GET_CODE (ra) == PLUS)
6323 tmp = ra, ra = oa, oa = tmp;
6325 rb = XEXP (b, 0), ob = XEXP (b, 1);
6326 if (GET_CODE (rb) == PLUS)
6327 tmp = rb, rb = ob, ob = tmp;
6329 if (rtx_equal_p (ra, rb))
6330 /* We matched: remove one reg completely. */
6332 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
6333 /* An alternate match. */
6335 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
6336 /* An alternate match. */
6340 /* Indicates an extra register in B. Strip one level from B and
6341 recurse, hoping B was the higher order expression. */
6342 ob = express_from_1 (a, ob, mult);
6345 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
6349 /* Here we are at the last level of A, go through the cases hoping to
6350 get rid of everything but a constant. */
6352 if (GET_CODE (a) == PLUS)
6356 ra = XEXP (a, 0), oa = XEXP (a, 1);
6357 if (rtx_equal_p (oa, b))
6359 else if (!rtx_equal_p (ra, b))
6362 if (GET_CODE (oa) != CONST_INT)
6365 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
6367 else if (GET_CODE (a) == CONST_INT)
6369 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
6371 else if (CONSTANT_P (a))
6373 enum machine_mode mode_a = GET_MODE (a);
6374 enum machine_mode mode_b = GET_MODE (b);
6375 enum machine_mode mode = mode_b == VOIDmode ? mode_a : mode_b;
6376 return simplify_gen_binary (MINUS, mode, b, a);
6378 else if (GET_CODE (b) == PLUS)
6380 if (rtx_equal_p (a, XEXP (b, 0)))
6382 else if (rtx_equal_p (a, XEXP (b, 1)))
6387 else if (rtx_equal_p (a, b))
6394 express_from (g1, g2)
6395 struct induction *g1, *g2;
6399 /* The value that G1 will be multiplied by must be a constant integer. Also,
6400 the only chance we have of getting a valid address is if b*c/a (see above
6401 for notation) is also an integer. */
6402 if (GET_CODE (g1->mult_val) == CONST_INT
6403 && GET_CODE (g2->mult_val) == CONST_INT)
6405 if (g1->mult_val == const0_rtx
6406 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
6408 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
6410 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
6414 /* ??? Find out if the one is a multiple of the other? */
6418 add = express_from_1 (g1->add_val, g2->add_val, mult);
6419 if (add == NULL_RTX)
6421 /* Failed. If we've got a multiplication factor between G1 and G2,
6422 scale G1's addend and try again. */
6423 if (INTVAL (mult) > 1)
6425 rtx g1_add_val = g1->add_val;
6426 if (GET_CODE (g1_add_val) == MULT
6427 && GET_CODE (XEXP (g1_add_val, 1)) == CONST_INT)
6430 m = INTVAL (mult) * INTVAL (XEXP (g1_add_val, 1));
6431 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val),
6432 XEXP (g1_add_val, 0), GEN_INT (m));
6436 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val), g1_add_val,
6440 add = express_from_1 (g1_add_val, g2->add_val, const1_rtx);
6443 if (add == NULL_RTX)
6446 /* Form simplified final result. */
6447 if (mult == const0_rtx)
6449 else if (mult == const1_rtx)
6450 mult = g1->dest_reg;
6452 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
6454 if (add == const0_rtx)
6458 if (GET_CODE (add) == PLUS
6459 && CONSTANT_P (XEXP (add, 1)))
6461 rtx tem = XEXP (add, 1);
6462 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
6466 return gen_rtx_PLUS (g2->mode, mult, add);
6470 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6471 represented by G1. This indicates that G2 should be combined with G1 and
6472 that G2 can use (either directly or via an address expression) a register
6473 used to represent G1. */
6476 combine_givs_p (g1, g2)
6477 struct induction *g1, *g2;
6481 /* With the introduction of ext dependant givs, we must care for modes.
6482 G2 must not use a wider mode than G1. */
6483 if (GET_MODE_SIZE (g1->mode) < GET_MODE_SIZE (g2->mode))
6486 ret = comb = express_from (g1, g2);
6487 if (comb == NULL_RTX)
6489 if (g1->mode != g2->mode)
6490 ret = gen_lowpart (g2->mode, comb);
6492 /* If these givs are identical, they can be combined. We use the results
6493 of express_from because the addends are not in a canonical form, so
6494 rtx_equal_p is a weaker test. */
6495 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
6496 combination to be the other way round. */
6497 if (comb == g1->dest_reg
6498 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
6503 /* If G2 can be expressed as a function of G1 and that function is valid
6504 as an address and no more expensive than using a register for G2,
6505 the expression of G2 in terms of G1 can be used. */
6507 && g2->giv_type == DEST_ADDR
6508 && memory_address_p (GET_MODE (g2->mem), ret)
6509 /* ??? Looses, especially with -fforce-addr, where *g2->location
6510 will always be a register, and so anything more complicated
6514 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
6516 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
6527 /* Check each extension dependant giv in this class to see if its
6528 root biv is safe from wrapping in the interior mode, which would
6529 make the giv illegal. */
6532 check_ext_dependant_givs (bl, loop_info)
6533 struct iv_class *bl;
6534 struct loop_info *loop_info;
6536 int ze_ok = 0, se_ok = 0, info_ok = 0;
6537 enum machine_mode biv_mode = GET_MODE (bl->biv->src_reg);
6538 HOST_WIDE_INT start_val;
6539 unsigned HOST_WIDE_INT u_end_val = 0;
6540 unsigned HOST_WIDE_INT u_start_val = 0;
6542 struct induction *v;
6544 /* Make sure the iteration data is available. We must have
6545 constants in order to be certain of no overflow. */
6546 /* ??? An unknown iteration count with an increment of +-1
6547 combined with friendly exit tests of against an invariant
6548 value is also ameanable to optimization. Not implemented. */
6549 if (loop_info->n_iterations > 0
6550 && bl->initial_value
6551 && GET_CODE (bl->initial_value) == CONST_INT
6552 && (incr = biv_total_increment (bl))
6553 && GET_CODE (incr) == CONST_INT
6554 /* Make sure the host can represent the arithmetic. */
6555 && HOST_BITS_PER_WIDE_INT >= GET_MODE_BITSIZE (biv_mode))
6557 unsigned HOST_WIDE_INT abs_incr, total_incr;
6558 HOST_WIDE_INT s_end_val;
6562 start_val = INTVAL (bl->initial_value);
6563 u_start_val = start_val;
6565 neg_incr = 0, abs_incr = INTVAL (incr);
6566 if (INTVAL (incr) < 0)
6567 neg_incr = 1, abs_incr = -abs_incr;
6568 total_incr = abs_incr * loop_info->n_iterations;
6570 /* Check for host arithmatic overflow. */
6571 if (total_incr / loop_info->n_iterations == abs_incr)
6573 unsigned HOST_WIDE_INT u_max;
6574 HOST_WIDE_INT s_max;
6576 u_end_val = start_val + (neg_incr ? -total_incr : total_incr);
6577 s_end_val = u_end_val;
6578 u_max = GET_MODE_MASK (biv_mode);
6581 /* Check zero extension of biv ok. */
6583 /* Check for host arithmatic overflow. */
6585 ? u_end_val < u_start_val
6586 : u_end_val > u_start_val)
6587 /* Check for target arithmetic overflow. */
6589 ? 1 /* taken care of with host overflow */
6590 : u_end_val <= u_max))
6595 /* Check sign extension of biv ok. */
6596 /* ??? While it is true that overflow with signed and pointer
6597 arithmetic is undefined, I fear too many programmers don't
6598 keep this fact in mind -- myself included on occasion.
6599 So leave alone with the signed overflow optimizations. */
6600 if (start_val >= -s_max - 1
6601 /* Check for host arithmatic overflow. */
6603 ? s_end_val < start_val
6604 : s_end_val > start_val)
6605 /* Check for target arithmetic overflow. */
6607 ? s_end_val >= -s_max - 1
6608 : s_end_val <= s_max))
6615 /* Invalidate givs that fail the tests. */
6616 for (v = bl->giv; v; v = v->next_iv)
6617 if (v->ext_dependant)
6619 enum rtx_code code = GET_CODE (v->ext_dependant);
6632 /* We don't know whether this value is being used as either
6633 signed or unsigned, so to safely truncate we must satisfy
6634 both. The initial check here verifies the BIV itself;
6635 once that is successful we may check its range wrt the
6639 enum machine_mode outer_mode = GET_MODE (v->ext_dependant);
6640 unsigned HOST_WIDE_INT max = GET_MODE_MASK (outer_mode) >> 1;
6642 /* We know from the above that both endpoints are nonnegative,
6643 and that there is no wrapping. Verify that both endpoints
6644 are within the (signed) range of the outer mode. */
6645 if (u_start_val <= max && u_end_val <= max)
6656 if (loop_dump_stream)
6658 fprintf (loop_dump_stream,
6659 "Verified ext dependant giv at %d of reg %d\n",
6660 INSN_UID (v->insn), bl->regno);
6665 if (loop_dump_stream)
6670 why = "biv iteration values overflowed";
6674 incr = biv_total_increment (bl);
6675 if (incr == const1_rtx)
6676 why = "biv iteration info incomplete; incr by 1";
6678 why = "biv iteration info incomplete";
6681 fprintf (loop_dump_stream,
6682 "Failed ext dependant giv at %d, %s\n",
6683 INSN_UID (v->insn), why);
6686 bl->all_reduced = 0;
6691 /* Generate a version of VALUE in a mode appropriate for initializing V. */
6694 extend_value_for_giv (v, value)
6695 struct induction *v;
6698 rtx ext_dep = v->ext_dependant;
6703 /* Recall that check_ext_dependant_givs verified that the known bounds
6704 of a biv did not overflow or wrap with respect to the extension for
6705 the giv. Therefore, constants need no additional adjustment. */
6706 if (CONSTANT_P (value) && GET_MODE (value) == VOIDmode)
6709 /* Otherwise, we must adjust the value to compensate for the
6710 differing modes of the biv and the giv. */
6711 return gen_rtx_fmt_e (GET_CODE (ext_dep), GET_MODE (ext_dep), value);
6714 struct combine_givs_stats
6721 cmp_combine_givs_stats (xp, yp)
6725 const struct combine_givs_stats * const x =
6726 (const struct combine_givs_stats *) xp;
6727 const struct combine_givs_stats * const y =
6728 (const struct combine_givs_stats *) yp;
6730 d = y->total_benefit - x->total_benefit;
6731 /* Stabilize the sort. */
6733 d = x->giv_number - y->giv_number;
6737 /* Check all pairs of givs for iv_class BL and see if any can be combined with
6738 any other. If so, point SAME to the giv combined with and set NEW_REG to
6739 be an expression (in terms of the other giv's DEST_REG) equivalent to the
6740 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
6743 combine_givs (regs, bl)
6744 struct loop_regs *regs;
6745 struct iv_class *bl;
6747 /* Additional benefit to add for being combined multiple times. */
6748 const int extra_benefit = 3;
6750 struct induction *g1, *g2, **giv_array;
6751 int i, j, k, giv_count;
6752 struct combine_givs_stats *stats;
6755 /* Count givs, because bl->giv_count is incorrect here. */
6757 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6762 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
6764 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6766 giv_array[i++] = g1;
6768 stats = (struct combine_givs_stats *) xcalloc (giv_count, sizeof (*stats));
6769 can_combine = (rtx *) xcalloc (giv_count, giv_count * sizeof (rtx));
6771 for (i = 0; i < giv_count; i++)
6777 stats[i].giv_number = i;
6779 /* If a DEST_REG GIV is used only once, do not allow it to combine
6780 with anything, for in doing so we will gain nothing that cannot
6781 be had by simply letting the GIV with which we would have combined
6782 to be reduced on its own. The losage shows up in particular with
6783 DEST_ADDR targets on hosts with reg+reg addressing, though it can
6784 be seen elsewhere as well. */
6785 if (g1->giv_type == DEST_REG
6786 && (single_use = regs->array[REGNO (g1->dest_reg)].single_usage)
6787 && single_use != const0_rtx)
6790 this_benefit = g1->benefit;
6791 /* Add an additional weight for zero addends. */
6792 if (g1->no_const_addval)
6795 for (j = 0; j < giv_count; j++)
6801 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
6803 can_combine[i * giv_count + j] = this_combine;
6804 this_benefit += g2->benefit + extra_benefit;
6807 stats[i].total_benefit = this_benefit;
6810 /* Iterate, combining until we can't. */
6812 qsort (stats, giv_count, sizeof (*stats), cmp_combine_givs_stats);
6814 if (loop_dump_stream)
6816 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
6817 for (k = 0; k < giv_count; k++)
6819 g1 = giv_array[stats[k].giv_number];
6820 if (!g1->combined_with && !g1->same)
6821 fprintf (loop_dump_stream, " {%d, %d}",
6822 INSN_UID (giv_array[stats[k].giv_number]->insn),
6823 stats[k].total_benefit);
6825 putc ('\n', loop_dump_stream);
6828 for (k = 0; k < giv_count; k++)
6830 int g1_add_benefit = 0;
6832 i = stats[k].giv_number;
6835 /* If it has already been combined, skip. */
6836 if (g1->combined_with || g1->same)
6839 for (j = 0; j < giv_count; j++)
6842 if (g1 != g2 && can_combine[i * giv_count + j]
6843 /* If it has already been combined, skip. */
6844 && ! g2->same && ! g2->combined_with)
6848 g2->new_reg = can_combine[i * giv_count + j];
6850 /* For destination, we now may replace by mem expression instead
6851 of register. This changes the costs considerably, so add the
6853 if (g2->giv_type == DEST_ADDR)
6854 g2->benefit = (g2->benefit + reg_address_cost
6855 - address_cost (g2->new_reg,
6856 GET_MODE (g2->mem)));
6857 g1->combined_with++;
6858 g1->lifetime += g2->lifetime;
6860 g1_add_benefit += g2->benefit;
6862 /* ??? The new final_[bg]iv_value code does a much better job
6863 of finding replaceable giv's, and hence this code may no
6864 longer be necessary. */
6865 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
6866 g1_add_benefit -= copy_cost;
6868 /* To help optimize the next set of combinations, remove
6869 this giv from the benefits of other potential mates. */
6870 for (l = 0; l < giv_count; ++l)
6872 int m = stats[l].giv_number;
6873 if (can_combine[m * giv_count + j])
6874 stats[l].total_benefit -= g2->benefit + extra_benefit;
6877 if (loop_dump_stream)
6878 fprintf (loop_dump_stream,
6879 "giv at %d combined with giv at %d; new benefit %d + %d, lifetime %d\n",
6880 INSN_UID (g2->insn), INSN_UID (g1->insn),
6881 g1->benefit, g1_add_benefit, g1->lifetime);
6885 /* To help optimize the next set of combinations, remove
6886 this giv from the benefits of other potential mates. */
6887 if (g1->combined_with)
6889 for (j = 0; j < giv_count; ++j)
6891 int m = stats[j].giv_number;
6892 if (can_combine[m * giv_count + i])
6893 stats[j].total_benefit -= g1->benefit + extra_benefit;
6896 g1->benefit += g1_add_benefit;
6898 /* We've finished with this giv, and everything it touched.
6899 Restart the combination so that proper weights for the
6900 rest of the givs are properly taken into account. */
6901 /* ??? Ideally we would compact the arrays at this point, so
6902 as to not cover old ground. But sanely compacting
6903 can_combine is tricky. */
6913 /* Generate sequence for REG = B * M + A. */
6916 gen_add_mult (b, m, a, reg)
6917 rtx b; /* initial value of basic induction variable */
6918 rtx m; /* multiplicative constant */
6919 rtx a; /* additive constant */
6920 rtx reg; /* destination register */
6926 /* Use unsigned arithmetic. */
6927 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
6929 emit_move_insn (reg, result);
6930 seq = gen_sequence ();
6937 /* Update registers created in insn sequence SEQ. */
6940 loop_regs_update (loop, seq)
6941 const struct loop *loop ATTRIBUTE_UNUSED;
6944 /* Update register info for alias analysis. */
6946 if (GET_CODE (seq) == SEQUENCE)
6949 for (i = 0; i < XVECLEN (seq, 0); ++i)
6951 rtx set = single_set (XVECEXP (seq, 0, i));
6952 if (set && GET_CODE (SET_DEST (set)) == REG)
6953 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
6958 rtx set = single_set (seq);
6959 if (set && GET_CODE (SET_DEST (set)) == REG)
6960 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
6965 /* EMIT code before BEFORE_BB/BEFORE_INSN to set REG = B * M + A. */
6968 loop_iv_add_mult_emit_before (loop, b, m, a, reg, before_bb, before_insn)
6969 const struct loop *loop;
6970 rtx b; /* initial value of basic induction variable */
6971 rtx m; /* multiplicative constant */
6972 rtx a; /* additive constant */
6973 rtx reg; /* destination register */
6974 basic_block before_bb;
6981 loop_iv_add_mult_hoist (loop, b, m, a, reg);
6985 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
6986 seq = gen_add_mult (copy_rtx (b), m, copy_rtx (a), reg);
6988 /* Increase the lifetime of any invariants moved further in code. */
6989 update_reg_last_use (a, before_insn);
6990 update_reg_last_use (b, before_insn);
6991 update_reg_last_use (m, before_insn);
6993 loop_insn_emit_before (loop, before_bb, before_insn, seq);
6995 /* It is possible that the expansion created lots of new registers.
6996 Iterate over the sequence we just created and record them all. */
6997 loop_regs_update (loop, seq);
7001 /* Emit insns in loop pre-header to set REG = B * M + A. */
7004 loop_iv_add_mult_sink (loop, b, m, a, reg)
7005 const struct loop *loop;
7006 rtx b; /* initial value of basic induction variable */
7007 rtx m; /* multiplicative constant */
7008 rtx a; /* additive constant */
7009 rtx reg; /* destination register */
7013 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7014 seq = gen_add_mult (copy_rtx (b), m, copy_rtx (a), reg);
7016 /* Increase the lifetime of any invariants moved further in code.
7017 ???? Is this really necessary? */
7018 update_reg_last_use (a, loop->sink);
7019 update_reg_last_use (b, loop->sink);
7020 update_reg_last_use (m, loop->sink);
7022 loop_insn_sink (loop, seq);
7024 /* It is possible that the expansion created lots of new registers.
7025 Iterate over the sequence we just created and record them all. */
7026 loop_regs_update (loop, seq);
7030 /* Emit insns after loop to set REG = B * M + A. */
7033 loop_iv_add_mult_hoist (loop, b, m, a, reg)
7034 const struct loop *loop;
7035 rtx b; /* initial value of basic induction variable */
7036 rtx m; /* multiplicative constant */
7037 rtx a; /* additive constant */
7038 rtx reg; /* destination register */
7042 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7043 seq = gen_add_mult (copy_rtx (b), m, copy_rtx (a), reg);
7045 loop_insn_hoist (loop, seq);
7047 /* It is possible that the expansion created lots of new registers.
7048 Iterate over the sequence we just created and record them all. */
7049 loop_regs_update (loop, seq);
7054 /* Similar to gen_add_mult, but compute cost rather than generating
7058 iv_add_mult_cost (b, m, a, reg)
7059 rtx b; /* initial value of basic induction variable */
7060 rtx m; /* multiplicative constant */
7061 rtx a; /* additive constant */
7062 rtx reg; /* destination register */
7068 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
7070 emit_move_insn (reg, result);
7071 last = get_last_insn ();
7074 rtx t = single_set (last);
7076 cost += rtx_cost (SET_SRC (t), SET);
7077 last = PREV_INSN (last);
7083 /* Test whether A * B can be computed without
7084 an actual multiply insn. Value is 1 if so. */
7087 product_cheap_p (a, b)
7095 /* If only one is constant, make it B. */
7096 if (GET_CODE (a) == CONST_INT)
7097 tmp = a, a = b, b = tmp;
7099 /* If first constant, both constant, so don't need multiply. */
7100 if (GET_CODE (a) == CONST_INT)
7103 /* If second not constant, neither is constant, so would need multiply. */
7104 if (GET_CODE (b) != CONST_INT)
7107 /* One operand is constant, so might not need multiply insn. Generate the
7108 code for the multiply and see if a call or multiply, or long sequence
7109 of insns is generated. */
7112 expand_mult (GET_MODE (a), a, b, NULL_RTX, 1);
7113 tmp = gen_sequence ();
7116 if (GET_CODE (tmp) == SEQUENCE)
7118 if (XVEC (tmp, 0) == 0)
7120 else if (XVECLEN (tmp, 0) > 3)
7123 for (i = 0; i < XVECLEN (tmp, 0); i++)
7125 rtx insn = XVECEXP (tmp, 0, i);
7127 if (GET_CODE (insn) != INSN
7128 || (GET_CODE (PATTERN (insn)) == SET
7129 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7130 || (GET_CODE (PATTERN (insn)) == PARALLEL
7131 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7132 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7139 else if (GET_CODE (tmp) == SET
7140 && GET_CODE (SET_SRC (tmp)) == MULT)
7142 else if (GET_CODE (tmp) == PARALLEL
7143 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7144 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7150 /* Check to see if loop can be terminated by a "decrement and branch until
7151 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7152 Also try reversing an increment loop to a decrement loop
7153 to see if the optimization can be performed.
7154 Value is nonzero if optimization was performed. */
7156 /* This is useful even if the architecture doesn't have such an insn,
7157 because it might change a loops which increments from 0 to n to a loop
7158 which decrements from n to 0. A loop that decrements to zero is usually
7159 faster than one that increments from zero. */
7161 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7162 such as approx_final_value, biv_total_increment, loop_iterations, and
7163 final_[bg]iv_value. */
7166 check_dbra_loop (loop, insn_count)
7170 struct loop_info *loop_info = LOOP_INFO (loop);
7171 struct loop_regs *regs = LOOP_REGS (loop);
7172 struct loop_ivs *ivs = LOOP_IVS (loop);
7173 struct iv_class *bl;
7180 rtx before_comparison;
7184 int compare_and_branch;
7185 rtx loop_start = loop->start;
7186 rtx loop_end = loop->end;
7188 /* If last insn is a conditional branch, and the insn before tests a
7189 register value, try to optimize it. Otherwise, we can't do anything. */
7191 jump = PREV_INSN (loop_end);
7192 comparison = get_condition_for_loop (loop, jump);
7193 if (comparison == 0)
7195 if (!onlyjump_p (jump))
7198 /* Try to compute whether the compare/branch at the loop end is one or
7199 two instructions. */
7200 get_condition (jump, &first_compare);
7201 if (first_compare == jump)
7202 compare_and_branch = 1;
7203 else if (first_compare == prev_nonnote_insn (jump))
7204 compare_and_branch = 2;
7209 /* If more than one condition is present to control the loop, then
7210 do not proceed, as this function does not know how to rewrite
7211 loop tests with more than one condition.
7213 Look backwards from the first insn in the last comparison
7214 sequence and see if we've got another comparison sequence. */
7217 if ((jump1 = prev_nonnote_insn (first_compare)) != loop->cont)
7218 if (GET_CODE (jump1) == JUMP_INSN)
7222 /* Check all of the bivs to see if the compare uses one of them.
7223 Skip biv's set more than once because we can't guarantee that
7224 it will be zero on the last iteration. Also skip if the biv is
7225 used between its update and the test insn. */
7227 for (bl = ivs->list; bl; bl = bl->next)
7229 if (bl->biv_count == 1
7230 && ! bl->biv->maybe_multiple
7231 && bl->biv->dest_reg == XEXP (comparison, 0)
7232 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
7240 /* Look for the case where the basic induction variable is always
7241 nonnegative, and equals zero on the last iteration.
7242 In this case, add a reg_note REG_NONNEG, which allows the
7243 m68k DBRA instruction to be used. */
7245 if (((GET_CODE (comparison) == GT
7246 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
7247 && INTVAL (XEXP (comparison, 1)) == -1)
7248 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
7249 && GET_CODE (bl->biv->add_val) == CONST_INT
7250 && INTVAL (bl->biv->add_val) < 0)
7252 /* Initial value must be greater than 0,
7253 init_val % -dec_value == 0 to ensure that it equals zero on
7254 the last iteration */
7256 if (GET_CODE (bl->initial_value) == CONST_INT
7257 && INTVAL (bl->initial_value) > 0
7258 && (INTVAL (bl->initial_value)
7259 % (-INTVAL (bl->biv->add_val))) == 0)
7261 /* register always nonnegative, add REG_NOTE to branch */
7262 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
7264 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
7271 /* If the decrement is 1 and the value was tested as >= 0 before
7272 the loop, then we can safely optimize. */
7273 for (p = loop_start; p; p = PREV_INSN (p))
7275 if (GET_CODE (p) == CODE_LABEL)
7277 if (GET_CODE (p) != JUMP_INSN)
7280 before_comparison = get_condition_for_loop (loop, p);
7281 if (before_comparison
7282 && XEXP (before_comparison, 0) == bl->biv->dest_reg
7283 && GET_CODE (before_comparison) == LT
7284 && XEXP (before_comparison, 1) == const0_rtx
7285 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
7286 && INTVAL (bl->biv->add_val) == -1)
7288 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
7290 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
7298 else if (GET_CODE (bl->biv->add_val) == CONST_INT
7299 && INTVAL (bl->biv->add_val) > 0)
7301 /* Try to change inc to dec, so can apply above optimization. */
7303 all registers modified are induction variables or invariant,
7304 all memory references have non-overlapping addresses
7305 (obviously true if only one write)
7306 allow 2 insns for the compare/jump at the end of the loop. */
7307 /* Also, we must avoid any instructions which use both the reversed
7308 biv and another biv. Such instructions will fail if the loop is
7309 reversed. We meet this condition by requiring that either
7310 no_use_except_counting is true, or else that there is only
7312 int num_nonfixed_reads = 0;
7313 /* 1 if the iteration var is used only to count iterations. */
7314 int no_use_except_counting = 0;
7315 /* 1 if the loop has no memory store, or it has a single memory store
7316 which is reversible. */
7317 int reversible_mem_store = 1;
7319 if (bl->giv_count == 0 && ! loop->exit_count)
7321 rtx bivreg = regno_reg_rtx[bl->regno];
7322 struct iv_class *blt;
7324 /* If there are no givs for this biv, and the only exit is the
7325 fall through at the end of the loop, then
7326 see if perhaps there are no uses except to count. */
7327 no_use_except_counting = 1;
7328 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7331 rtx set = single_set (p);
7333 if (set && GET_CODE (SET_DEST (set)) == REG
7334 && REGNO (SET_DEST (set)) == bl->regno)
7335 /* An insn that sets the biv is okay. */
7337 else if ((p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
7338 || p == prev_nonnote_insn (loop_end))
7339 && reg_mentioned_p (bivreg, PATTERN (p)))
7341 /* If either of these insns uses the biv and sets a pseudo
7342 that has more than one usage, then the biv has uses
7343 other than counting since it's used to derive a value
7344 that is used more than one time. */
7345 note_stores (PATTERN (p), note_set_pseudo_multiple_uses,
7347 if (regs->multiple_uses)
7349 no_use_except_counting = 0;
7353 else if (reg_mentioned_p (bivreg, PATTERN (p)))
7355 no_use_except_counting = 0;
7360 /* A biv has uses besides counting if it is used to set another biv. */
7361 for (blt = ivs->list; blt; blt = blt->next)
7362 if (blt->init_set && reg_mentioned_p (bivreg, SET_SRC (blt->init_set)))
7364 no_use_except_counting = 0;
7369 if (no_use_except_counting)
7370 /* No need to worry about MEMs. */
7372 else if (loop_info->num_mem_sets <= 1)
7374 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7376 num_nonfixed_reads += count_nonfixed_reads (loop, PATTERN (p));
7378 /* If the loop has a single store, and the destination address is
7379 invariant, then we can't reverse the loop, because this address
7380 might then have the wrong value at loop exit.
7381 This would work if the source was invariant also, however, in that
7382 case, the insn should have been moved out of the loop. */
7384 if (loop_info->num_mem_sets == 1)
7386 struct induction *v;
7388 /* If we could prove that each of the memory locations
7389 written to was different, then we could reverse the
7390 store -- but we don't presently have any way of
7392 reversible_mem_store = 0;
7394 /* If the store depends on a register that is set after the
7395 store, it depends on the initial value, and is thus not
7397 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
7399 if (v->giv_type == DEST_REG
7400 && reg_mentioned_p (v->dest_reg,
7401 PATTERN (loop_info->first_loop_store_insn))
7402 && loop_insn_first_p (loop_info->first_loop_store_insn,
7404 reversible_mem_store = 0;
7411 /* This code only acts for innermost loops. Also it simplifies
7412 the memory address check by only reversing loops with
7413 zero or one memory access.
7414 Two memory accesses could involve parts of the same array,
7415 and that can't be reversed.
7416 If the biv is used only for counting, than we don't need to worry
7417 about all these things. */
7419 if ((num_nonfixed_reads <= 1
7420 && ! loop_info->has_nonconst_call
7421 && ! loop_info->has_volatile
7422 && reversible_mem_store
7423 && (bl->giv_count + bl->biv_count + loop_info->num_mem_sets
7424 + num_unmoved_movables (loop) + compare_and_branch == insn_count)
7425 && (bl == ivs->list && bl->next == 0))
7426 || no_use_except_counting)
7430 /* Loop can be reversed. */
7431 if (loop_dump_stream)
7432 fprintf (loop_dump_stream, "Can reverse loop\n");
7434 /* Now check other conditions:
7436 The increment must be a constant, as must the initial value,
7437 and the comparison code must be LT.
7439 This test can probably be improved since +/- 1 in the constant
7440 can be obtained by changing LT to LE and vice versa; this is
7444 /* for constants, LE gets turned into LT */
7445 && (GET_CODE (comparison) == LT
7446 || (GET_CODE (comparison) == LE
7447 && no_use_except_counting)))
7449 HOST_WIDE_INT add_val, add_adjust, comparison_val = 0;
7450 rtx initial_value, comparison_value;
7452 enum rtx_code cmp_code;
7453 int comparison_const_width;
7454 unsigned HOST_WIDE_INT comparison_sign_mask;
7456 add_val = INTVAL (bl->biv->add_val);
7457 comparison_value = XEXP (comparison, 1);
7458 if (GET_MODE (comparison_value) == VOIDmode)
7459 comparison_const_width
7460 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
7462 comparison_const_width
7463 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
7464 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
7465 comparison_const_width = HOST_BITS_PER_WIDE_INT;
7466 comparison_sign_mask
7467 = (unsigned HOST_WIDE_INT) 1 << (comparison_const_width - 1);
7469 /* If the comparison value is not a loop invariant, then we
7470 can not reverse this loop.
7472 ??? If the insns which initialize the comparison value as
7473 a whole compute an invariant result, then we could move
7474 them out of the loop and proceed with loop reversal. */
7475 if (! loop_invariant_p (loop, comparison_value))
7478 if (GET_CODE (comparison_value) == CONST_INT)
7479 comparison_val = INTVAL (comparison_value);
7480 initial_value = bl->initial_value;
7482 /* Normalize the initial value if it is an integer and
7483 has no other use except as a counter. This will allow
7484 a few more loops to be reversed. */
7485 if (no_use_except_counting
7486 && GET_CODE (comparison_value) == CONST_INT
7487 && GET_CODE (initial_value) == CONST_INT)
7489 comparison_val = comparison_val - INTVAL (bl->initial_value);
7490 /* The code below requires comparison_val to be a multiple
7491 of add_val in order to do the loop reversal, so
7492 round up comparison_val to a multiple of add_val.
7493 Since comparison_value is constant, we know that the
7494 current comparison code is LT. */
7495 comparison_val = comparison_val + add_val - 1;
7497 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
7498 /* We postpone overflow checks for COMPARISON_VAL here;
7499 even if there is an overflow, we might still be able to
7500 reverse the loop, if converting the loop exit test to
7502 initial_value = const0_rtx;
7505 /* First check if we can do a vanilla loop reversal. */
7506 if (initial_value == const0_rtx
7507 /* If we have a decrement_and_branch_on_count,
7508 prefer the NE test, since this will allow that
7509 instruction to be generated. Note that we must
7510 use a vanilla loop reversal if the biv is used to
7511 calculate a giv or has a non-counting use. */
7512 #if ! defined (HAVE_decrement_and_branch_until_zero) \
7513 && defined (HAVE_decrement_and_branch_on_count)
7514 && (! (add_val == 1 && loop->vtop
7515 && (bl->biv_count == 0
7516 || no_use_except_counting)))
7518 && GET_CODE (comparison_value) == CONST_INT
7519 /* Now do postponed overflow checks on COMPARISON_VAL. */
7520 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
7521 & comparison_sign_mask))
7523 /* Register will always be nonnegative, with value
7524 0 on last iteration */
7525 add_adjust = add_val;
7529 else if (add_val == 1 && loop->vtop
7530 && (bl->biv_count == 0
7531 || no_use_except_counting))
7539 if (GET_CODE (comparison) == LE)
7540 add_adjust -= add_val;
7542 /* If the initial value is not zero, or if the comparison
7543 value is not an exact multiple of the increment, then we
7544 can not reverse this loop. */
7545 if (initial_value == const0_rtx
7546 && GET_CODE (comparison_value) == CONST_INT)
7548 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
7553 if (! no_use_except_counting || add_val != 1)
7557 final_value = comparison_value;
7559 /* Reset these in case we normalized the initial value
7560 and comparison value above. */
7561 if (GET_CODE (comparison_value) == CONST_INT
7562 && GET_CODE (initial_value) == CONST_INT)
7564 comparison_value = GEN_INT (comparison_val);
7566 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
7568 bl->initial_value = initial_value;
7570 /* Save some info needed to produce the new insns. */
7571 reg = bl->biv->dest_reg;
7572 jump_label = condjump_label (PREV_INSN (loop_end));
7573 new_add_val = GEN_INT (-INTVAL (bl->biv->add_val));
7575 /* Set start_value; if this is not a CONST_INT, we need
7577 Initialize biv to start_value before loop start.
7578 The old initializing insn will be deleted as a
7579 dead store by flow.c. */
7580 if (initial_value == const0_rtx
7581 && GET_CODE (comparison_value) == CONST_INT)
7583 start_value = GEN_INT (comparison_val - add_adjust);
7584 loop_insn_hoist (loop, gen_move_insn (reg, start_value));
7586 else if (GET_CODE (initial_value) == CONST_INT)
7588 enum machine_mode mode = GET_MODE (reg);
7589 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
7590 rtx add_insn = gen_add3_insn (reg, comparison_value, offset);
7596 = gen_rtx_PLUS (mode, comparison_value, offset);
7597 loop_insn_hoist (loop, add_insn);
7598 if (GET_CODE (comparison) == LE)
7599 final_value = gen_rtx_PLUS (mode, comparison_value,
7602 else if (! add_adjust)
7604 enum machine_mode mode = GET_MODE (reg);
7605 rtx sub_insn = gen_sub3_insn (reg, comparison_value,
7611 = gen_rtx_MINUS (mode, comparison_value, initial_value);
7612 loop_insn_hoist (loop, sub_insn);
7615 /* We could handle the other cases too, but it'll be
7616 better to have a testcase first. */
7619 /* We may not have a single insn which can increment a reg, so
7620 create a sequence to hold all the insns from expand_inc. */
7622 expand_inc (reg, new_add_val);
7623 tem = gen_sequence ();
7626 p = loop_insn_emit_before (loop, 0, bl->biv->insn, tem);
7627 delete_insn (bl->biv->insn);
7629 /* Update biv info to reflect its new status. */
7631 bl->initial_value = start_value;
7632 bl->biv->add_val = new_add_val;
7634 /* Update loop info. */
7635 loop_info->initial_value = reg;
7636 loop_info->initial_equiv_value = reg;
7637 loop_info->final_value = const0_rtx;
7638 loop_info->final_equiv_value = const0_rtx;
7639 loop_info->comparison_value = const0_rtx;
7640 loop_info->comparison_code = cmp_code;
7641 loop_info->increment = new_add_val;
7643 /* Inc LABEL_NUSES so that delete_insn will
7644 not delete the label. */
7645 LABEL_NUSES (XEXP (jump_label, 0))++;
7647 /* Emit an insn after the end of the loop to set the biv's
7648 proper exit value if it is used anywhere outside the loop. */
7649 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
7651 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
7652 loop_insn_sink (loop, gen_move_insn (reg, final_value));
7654 /* Delete compare/branch at end of loop. */
7655 delete_related_insns (PREV_INSN (loop_end));
7656 if (compare_and_branch == 2)
7657 delete_related_insns (first_compare);
7659 /* Add new compare/branch insn at end of loop. */
7661 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
7662 GET_MODE (reg), 0, 0,
7663 XEXP (jump_label, 0));
7664 tem = gen_sequence ();
7666 emit_jump_insn_before (tem, loop_end);
7668 for (tem = PREV_INSN (loop_end);
7669 tem && GET_CODE (tem) != JUMP_INSN;
7670 tem = PREV_INSN (tem))
7674 JUMP_LABEL (tem) = XEXP (jump_label, 0);
7680 /* Increment of LABEL_NUSES done above. */
7681 /* Register is now always nonnegative,
7682 so add REG_NONNEG note to the branch. */
7683 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, reg,
7689 /* No insn may reference both the reversed and another biv or it
7690 will fail (see comment near the top of the loop reversal
7692 Earlier on, we have verified that the biv has no use except
7693 counting, or it is the only biv in this function.
7694 However, the code that computes no_use_except_counting does
7695 not verify reg notes. It's possible to have an insn that
7696 references another biv, and has a REG_EQUAL note with an
7697 expression based on the reversed biv. To avoid this case,
7698 remove all REG_EQUAL notes based on the reversed biv
7700 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7704 rtx set = single_set (p);
7705 /* If this is a set of a GIV based on the reversed biv, any
7706 REG_EQUAL notes should still be correct. */
7708 || GET_CODE (SET_DEST (set)) != REG
7709 || (size_t) REGNO (SET_DEST (set)) >= ivs->n_regs
7710 || REG_IV_TYPE (ivs, REGNO (SET_DEST (set))) != GENERAL_INDUCT
7711 || REG_IV_INFO (ivs, REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
7712 for (pnote = ®_NOTES (p); *pnote;)
7714 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
7715 && reg_mentioned_p (regno_reg_rtx[bl->regno],
7717 *pnote = XEXP (*pnote, 1);
7719 pnote = &XEXP (*pnote, 1);
7723 /* Mark that this biv has been reversed. Each giv which depends
7724 on this biv, and which is also live past the end of the loop
7725 will have to be fixed up. */
7729 if (loop_dump_stream)
7731 fprintf (loop_dump_stream, "Reversed loop");
7733 fprintf (loop_dump_stream, " and added reg_nonneg\n");
7735 fprintf (loop_dump_stream, "\n");
7746 /* Verify whether the biv BL appears to be eliminable,
7747 based on the insns in the loop that refer to it.
7749 If ELIMINATE_P is non-zero, actually do the elimination.
7751 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
7752 determine whether invariant insns should be placed inside or at the
7753 start of the loop. */
7756 maybe_eliminate_biv (loop, bl, eliminate_p, threshold, insn_count)
7757 const struct loop *loop;
7758 struct iv_class *bl;
7760 int threshold, insn_count;
7762 struct loop_ivs *ivs = LOOP_IVS (loop);
7763 rtx reg = bl->biv->dest_reg;
7766 /* Scan all insns in the loop, stopping if we find one that uses the
7767 biv in a way that we cannot eliminate. */
7769 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
7771 enum rtx_code code = GET_CODE (p);
7772 basic_block where_bb = 0;
7773 rtx where_insn = threshold >= insn_count ? 0 : p;
7775 /* If this is a libcall that sets a giv, skip ahead to its end. */
7776 if (GET_RTX_CLASS (code) == 'i')
7778 rtx note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
7782 rtx last = XEXP (note, 0);
7783 rtx set = single_set (last);
7785 if (set && GET_CODE (SET_DEST (set)) == REG)
7787 unsigned int regno = REGNO (SET_DEST (set));
7789 if (regno < ivs->n_regs
7790 && REG_IV_TYPE (ivs, regno) == GENERAL_INDUCT
7791 && REG_IV_INFO (ivs, regno)->src_reg == bl->biv->src_reg)
7796 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
7797 && reg_mentioned_p (reg, PATTERN (p))
7798 && ! maybe_eliminate_biv_1 (loop, PATTERN (p), p, bl,
7799 eliminate_p, where_bb, where_insn))
7801 if (loop_dump_stream)
7802 fprintf (loop_dump_stream,
7803 "Cannot eliminate biv %d: biv used in insn %d.\n",
7804 bl->regno, INSN_UID (p));
7811 if (loop_dump_stream)
7812 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
7813 bl->regno, eliminate_p ? "was" : "can be");
7820 /* INSN and REFERENCE are instructions in the same insn chain.
7821 Return non-zero if INSN is first. */
7824 loop_insn_first_p (insn, reference)
7825 rtx insn, reference;
7829 for (p = insn, q = reference;;)
7831 /* Start with test for not first so that INSN == REFERENCE yields not
7833 if (q == insn || ! p)
7835 if (p == reference || ! q)
7838 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
7839 previous insn, hence the <= comparison below does not work if
7841 if (INSN_UID (p) < max_uid_for_loop
7842 && INSN_UID (q) < max_uid_for_loop
7843 && GET_CODE (p) != NOTE)
7844 return INSN_LUID (p) <= INSN_LUID (q);
7846 if (INSN_UID (p) >= max_uid_for_loop
7847 || GET_CODE (p) == NOTE)
7849 if (INSN_UID (q) >= max_uid_for_loop)
7854 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
7855 the offset that we have to take into account due to auto-increment /
7856 div derivation is zero. */
7858 biv_elimination_giv_has_0_offset (biv, giv, insn)
7859 struct induction *biv, *giv;
7862 /* If the giv V had the auto-inc address optimization applied
7863 to it, and INSN occurs between the giv insn and the biv
7864 insn, then we'd have to adjust the value used here.
7865 This is rare, so we don't bother to make this possible. */
7866 if (giv->auto_inc_opt
7867 && ((loop_insn_first_p (giv->insn, insn)
7868 && loop_insn_first_p (insn, biv->insn))
7869 || (loop_insn_first_p (biv->insn, insn)
7870 && loop_insn_first_p (insn, giv->insn))))
7876 /* If BL appears in X (part of the pattern of INSN), see if we can
7877 eliminate its use. If so, return 1. If not, return 0.
7879 If BIV does not appear in X, return 1.
7881 If ELIMINATE_P is non-zero, actually do the elimination.
7882 WHERE_INSN/WHERE_BB indicate where extra insns should be added.
7883 Depending on how many items have been moved out of the loop, it
7884 will either be before INSN (when WHERE_INSN is non-zero) or at the
7885 start of the loop (when WHERE_INSN is zero). */
7888 maybe_eliminate_biv_1 (loop, x, insn, bl, eliminate_p, where_bb, where_insn)
7889 const struct loop *loop;
7891 struct iv_class *bl;
7893 basic_block where_bb;
7896 enum rtx_code code = GET_CODE (x);
7897 rtx reg = bl->biv->dest_reg;
7898 enum machine_mode mode = GET_MODE (reg);
7899 struct induction *v;
7911 /* If we haven't already been able to do something with this BIV,
7912 we can't eliminate it. */
7918 /* If this sets the BIV, it is not a problem. */
7919 if (SET_DEST (x) == reg)
7922 /* If this is an insn that defines a giv, it is also ok because
7923 it will go away when the giv is reduced. */
7924 for (v = bl->giv; v; v = v->next_iv)
7925 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
7929 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
7931 /* Can replace with any giv that was reduced and
7932 that has (MULT_VAL != 0) and (ADD_VAL == 0).
7933 Require a constant for MULT_VAL, so we know it's nonzero.
7934 ??? We disable this optimization to avoid potential
7937 for (v = bl->giv; v; v = v->next_iv)
7938 if (GET_CODE (v->mult_val) == CONST_INT && v->mult_val != const0_rtx
7939 && v->add_val == const0_rtx
7940 && ! v->ignore && ! v->maybe_dead && v->always_computable
7944 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
7950 /* If the giv has the opposite direction of change,
7951 then reverse the comparison. */
7952 if (INTVAL (v->mult_val) < 0)
7953 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
7954 const0_rtx, v->new_reg);
7958 /* We can probably test that giv's reduced reg. */
7959 if (validate_change (insn, &SET_SRC (x), new, 0))
7963 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
7964 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
7965 Require a constant for MULT_VAL, so we know it's nonzero.
7966 ??? Do this only if ADD_VAL is a pointer to avoid a potential
7967 overflow problem. */
7969 for (v = bl->giv; v; v = v->next_iv)
7970 if (GET_CODE (v->mult_val) == CONST_INT
7971 && v->mult_val != const0_rtx
7972 && ! v->ignore && ! v->maybe_dead && v->always_computable
7974 && (GET_CODE (v->add_val) == SYMBOL_REF
7975 || GET_CODE (v->add_val) == LABEL_REF
7976 || GET_CODE (v->add_val) == CONST
7977 || (GET_CODE (v->add_val) == REG
7978 && REG_POINTER (v->add_val))))
7980 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
7986 /* If the giv has the opposite direction of change,
7987 then reverse the comparison. */
7988 if (INTVAL (v->mult_val) < 0)
7989 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
7992 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
7993 copy_rtx (v->add_val));
7995 /* Replace biv with the giv's reduced register. */
7996 update_reg_last_use (v->add_val, insn);
7997 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8000 /* Insn doesn't support that constant or invariant. Copy it
8001 into a register (it will be a loop invariant.) */
8002 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8004 loop_insn_emit_before (loop, 0, where_insn,
8006 copy_rtx (v->add_val)));
8008 /* Substitute the new register for its invariant value in
8009 the compare expression. */
8010 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8011 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8020 case GT: case GE: case GTU: case GEU:
8021 case LT: case LE: case LTU: case LEU:
8022 /* See if either argument is the biv. */
8023 if (XEXP (x, 0) == reg)
8024 arg = XEXP (x, 1), arg_operand = 1;
8025 else if (XEXP (x, 1) == reg)
8026 arg = XEXP (x, 0), arg_operand = 0;
8030 if (CONSTANT_P (arg))
8032 /* First try to replace with any giv that has constant positive
8033 mult_val and constant add_val. We might be able to support
8034 negative mult_val, but it seems complex to do it in general. */
8036 for (v = bl->giv; v; v = v->next_iv)
8037 if (GET_CODE (v->mult_val) == CONST_INT
8038 && INTVAL (v->mult_val) > 0
8039 && (GET_CODE (v->add_val) == SYMBOL_REF
8040 || GET_CODE (v->add_val) == LABEL_REF
8041 || GET_CODE (v->add_val) == CONST
8042 || (GET_CODE (v->add_val) == REG
8043 && REG_POINTER (v->add_val)))
8044 && ! v->ignore && ! v->maybe_dead && v->always_computable
8047 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8053 /* Replace biv with the giv's reduced reg. */
8054 validate_change (insn, &XEXP (x, 1 - arg_operand), v->new_reg, 1);
8056 /* If all constants are actually constant integers and
8057 the derived constant can be directly placed in the COMPARE,
8059 if (GET_CODE (arg) == CONST_INT
8060 && GET_CODE (v->mult_val) == CONST_INT
8061 && GET_CODE (v->add_val) == CONST_INT)
8063 validate_change (insn, &XEXP (x, arg_operand),
8064 GEN_INT (INTVAL (arg)
8065 * INTVAL (v->mult_val)
8066 + INTVAL (v->add_val)), 1);
8070 /* Otherwise, load it into a register. */
8071 tem = gen_reg_rtx (mode);
8072 loop_iv_add_mult_emit_before (loop, arg,
8073 v->mult_val, v->add_val,
8074 tem, where_bb, where_insn);
8075 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8077 if (apply_change_group ())
8081 /* Look for giv with positive constant mult_val and nonconst add_val.
8082 Insert insns to calculate new compare value.
8083 ??? Turn this off due to possible overflow. */
8085 for (v = bl->giv; v; v = v->next_iv)
8086 if (GET_CODE (v->mult_val) == CONST_INT
8087 && INTVAL (v->mult_val) > 0
8088 && ! v->ignore && ! v->maybe_dead && v->always_computable
8094 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8100 tem = gen_reg_rtx (mode);
8102 /* Replace biv with giv's reduced register. */
8103 validate_change (insn, &XEXP (x, 1 - arg_operand),
8106 /* Compute value to compare against. */
8107 loop_iv_add_mult_emit_before (loop, arg,
8108 v->mult_val, v->add_val,
8109 tem, where_bb, where_insn);
8110 /* Use it in this insn. */
8111 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8112 if (apply_change_group ())
8116 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8118 if (loop_invariant_p (loop, arg) == 1)
8120 /* Look for giv with constant positive mult_val and nonconst
8121 add_val. Insert insns to compute new compare value.
8122 ??? Turn this off due to possible overflow. */
8124 for (v = bl->giv; v; v = v->next_iv)
8125 if (GET_CODE (v->mult_val) == CONST_INT && INTVAL (v->mult_val) > 0
8126 && ! v->ignore && ! v->maybe_dead && v->always_computable
8132 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8138 tem = gen_reg_rtx (mode);
8140 /* Replace biv with giv's reduced register. */
8141 validate_change (insn, &XEXP (x, 1 - arg_operand),
8144 /* Compute value to compare against. */
8145 loop_iv_add_mult_emit_before (loop, arg,
8146 v->mult_val, v->add_val,
8147 tem, where_bb, where_insn);
8148 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8149 if (apply_change_group ())
8154 /* This code has problems. Basically, you can't know when
8155 seeing if we will eliminate BL, whether a particular giv
8156 of ARG will be reduced. If it isn't going to be reduced,
8157 we can't eliminate BL. We can try forcing it to be reduced,
8158 but that can generate poor code.
8160 The problem is that the benefit of reducing TV, below should
8161 be increased if BL can actually be eliminated, but this means
8162 we might have to do a topological sort of the order in which
8163 we try to process biv. It doesn't seem worthwhile to do
8164 this sort of thing now. */
8167 /* Otherwise the reg compared with had better be a biv. */
8168 if (GET_CODE (arg) != REG
8169 || REG_IV_TYPE (ivs, REGNO (arg)) != BASIC_INDUCT)
8172 /* Look for a pair of givs, one for each biv,
8173 with identical coefficients. */
8174 for (v = bl->giv; v; v = v->next_iv)
8176 struct induction *tv;
8178 if (v->ignore || v->maybe_dead || v->mode != mode)
8181 for (tv = REG_IV_CLASS (ivs, REGNO (arg))->giv; tv;
8183 if (! tv->ignore && ! tv->maybe_dead
8184 && rtx_equal_p (tv->mult_val, v->mult_val)
8185 && rtx_equal_p (tv->add_val, v->add_val)
8186 && tv->mode == mode)
8188 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8194 /* Replace biv with its giv's reduced reg. */
8195 XEXP (x, 1 - arg_operand) = v->new_reg;
8196 /* Replace other operand with the other giv's
8198 XEXP (x, arg_operand) = tv->new_reg;
8205 /* If we get here, the biv can't be eliminated. */
8209 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8210 biv is used in it, since it will be replaced. */
8211 for (v = bl->giv; v; v = v->next_iv)
8212 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8220 /* See if any subexpression fails elimination. */
8221 fmt = GET_RTX_FORMAT (code);
8222 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8227 if (! maybe_eliminate_biv_1 (loop, XEXP (x, i), insn, bl,
8228 eliminate_p, where_bb, where_insn))
8233 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8234 if (! maybe_eliminate_biv_1 (loop, XVECEXP (x, i, j), insn, bl,
8235 eliminate_p, where_bb, where_insn))
8244 /* Return nonzero if the last use of REG
8245 is in an insn following INSN in the same basic block. */
8248 last_use_this_basic_block (reg, insn)
8254 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
8257 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
8263 /* Called via `note_stores' to record the initial value of a biv. Here we
8264 just record the location of the set and process it later. */
8267 record_initial (dest, set, data)
8270 void *data ATTRIBUTE_UNUSED;
8272 struct loop_ivs *ivs = (struct loop_ivs *) data;
8273 struct iv_class *bl;
8275 if (GET_CODE (dest) != REG
8276 || REGNO (dest) >= ivs->n_regs
8277 || REG_IV_TYPE (ivs, REGNO (dest)) != BASIC_INDUCT)
8280 bl = REG_IV_CLASS (ivs, REGNO (dest));
8282 /* If this is the first set found, record it. */
8283 if (bl->init_insn == 0)
8285 bl->init_insn = note_insn;
8290 /* If any of the registers in X are "old" and currently have a last use earlier
8291 than INSN, update them to have a last use of INSN. Their actual last use
8292 will be the previous insn but it will not have a valid uid_luid so we can't
8293 use it. X must be a source expression only. */
8296 update_reg_last_use (x, insn)
8300 /* Check for the case where INSN does not have a valid luid. In this case,
8301 there is no need to modify the regno_last_uid, as this can only happen
8302 when code is inserted after the loop_end to set a pseudo's final value,
8303 and hence this insn will never be the last use of x.
8304 ???? This comment is not correct. See for example loop_givs_reduce.
8305 This may insert an insn before another new insn. */
8306 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
8307 && INSN_UID (insn) < max_uid_for_loop
8308 && REGNO_LAST_LUID (REGNO (x)) < INSN_LUID (insn))
8310 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
8315 register const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
8316 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
8319 update_reg_last_use (XEXP (x, i), insn);
8320 else if (fmt[i] == 'E')
8321 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8322 update_reg_last_use (XVECEXP (x, i, j), insn);
8327 /* Given an insn INSN and condition COND, return the condition in a
8328 canonical form to simplify testing by callers. Specifically:
8330 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
8331 (2) Both operands will be machine operands; (cc0) will have been replaced.
8332 (3) If an operand is a constant, it will be the second operand.
8333 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
8334 for GE, GEU, and LEU.
8336 If the condition cannot be understood, or is an inequality floating-point
8337 comparison which needs to be reversed, 0 will be returned.
8339 If REVERSE is non-zero, then reverse the condition prior to canonizing it.
8341 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8342 insn used in locating the condition was found. If a replacement test
8343 of the condition is desired, it should be placed in front of that
8344 insn and we will be sure that the inputs are still valid.
8346 If WANT_REG is non-zero, we wish the condition to be relative to that
8347 register, if possible. Therefore, do not canonicalize the condition
8351 canonicalize_condition (insn, cond, reverse, earliest, want_reg)
8363 int reverse_code = 0;
8364 enum machine_mode mode;
8366 code = GET_CODE (cond);
8367 mode = GET_MODE (cond);
8368 op0 = XEXP (cond, 0);
8369 op1 = XEXP (cond, 1);
8372 code = reversed_comparison_code (cond, insn);
8373 if (code == UNKNOWN)
8379 /* If we are comparing a register with zero, see if the register is set
8380 in the previous insn to a COMPARE or a comparison operation. Perform
8381 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
8384 while (GET_RTX_CLASS (code) == '<'
8385 && op1 == CONST0_RTX (GET_MODE (op0))
8388 /* Set non-zero when we find something of interest. */
8392 /* If comparison with cc0, import actual comparison from compare
8396 if ((prev = prev_nonnote_insn (prev)) == 0
8397 || GET_CODE (prev) != INSN
8398 || (set = single_set (prev)) == 0
8399 || SET_DEST (set) != cc0_rtx)
8402 op0 = SET_SRC (set);
8403 op1 = CONST0_RTX (GET_MODE (op0));
8409 /* If this is a COMPARE, pick up the two things being compared. */
8410 if (GET_CODE (op0) == COMPARE)
8412 op1 = XEXP (op0, 1);
8413 op0 = XEXP (op0, 0);
8416 else if (GET_CODE (op0) != REG)
8419 /* Go back to the previous insn. Stop if it is not an INSN. We also
8420 stop if it isn't a single set or if it has a REG_INC note because
8421 we don't want to bother dealing with it. */
8423 if ((prev = prev_nonnote_insn (prev)) == 0
8424 || GET_CODE (prev) != INSN
8425 || FIND_REG_INC_NOTE (prev, 0))
8428 set = set_of (op0, prev);
8431 && (GET_CODE (set) != SET
8432 || !rtx_equal_p (SET_DEST (set), op0)))
8435 /* If this is setting OP0, get what it sets it to if it looks
8439 enum machine_mode inner_mode = GET_MODE (SET_DEST (set));
8441 /* ??? We may not combine comparisons done in a CCmode with
8442 comparisons not done in a CCmode. This is to aid targets
8443 like Alpha that have an IEEE compliant EQ instruction, and
8444 a non-IEEE compliant BEQ instruction. The use of CCmode is
8445 actually artificial, simply to prevent the combination, but
8446 should not affect other platforms.
8448 However, we must allow VOIDmode comparisons to match either
8449 CCmode or non-CCmode comparison, because some ports have
8450 modeless comparisons inside branch patterns.
8452 ??? This mode check should perhaps look more like the mode check
8453 in simplify_comparison in combine. */
8455 if ((GET_CODE (SET_SRC (set)) == COMPARE
8458 && GET_MODE_CLASS (inner_mode) == MODE_INT
8459 && (GET_MODE_BITSIZE (inner_mode)
8460 <= HOST_BITS_PER_WIDE_INT)
8461 && (STORE_FLAG_VALUE
8462 & ((HOST_WIDE_INT) 1
8463 << (GET_MODE_BITSIZE (inner_mode) - 1))))
8464 #ifdef FLOAT_STORE_FLAG_VALUE
8466 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
8467 && (REAL_VALUE_NEGATIVE
8468 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
8471 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
8472 && (((GET_MODE_CLASS (mode) == MODE_CC)
8473 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
8474 || mode == VOIDmode || inner_mode == VOIDmode))
8476 else if (((code == EQ
8478 && (GET_MODE_BITSIZE (inner_mode)
8479 <= HOST_BITS_PER_WIDE_INT)
8480 && GET_MODE_CLASS (inner_mode) == MODE_INT
8481 && (STORE_FLAG_VALUE
8482 & ((HOST_WIDE_INT) 1
8483 << (GET_MODE_BITSIZE (inner_mode) - 1))))
8484 #ifdef FLOAT_STORE_FLAG_VALUE
8486 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
8487 && (REAL_VALUE_NEGATIVE
8488 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
8491 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
8492 && (((GET_MODE_CLASS (mode) == MODE_CC)
8493 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
8494 || mode == VOIDmode || inner_mode == VOIDmode))
8504 else if (reg_set_p (op0, prev))
8505 /* If this sets OP0, but not directly, we have to give up. */
8510 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
8511 code = GET_CODE (x);
8514 code = reversed_comparison_code (x, prev);
8515 if (code == UNKNOWN)
8520 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
8526 /* If constant is first, put it last. */
8527 if (CONSTANT_P (op0))
8528 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
8530 /* If OP0 is the result of a comparison, we weren't able to find what
8531 was really being compared, so fail. */
8532 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
8535 /* Canonicalize any ordered comparison with integers involving equality
8536 if we can do computations in the relevant mode and we do not
8539 if (GET_CODE (op1) == CONST_INT
8540 && GET_MODE (op0) != VOIDmode
8541 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
8543 HOST_WIDE_INT const_val = INTVAL (op1);
8544 unsigned HOST_WIDE_INT uconst_val = const_val;
8545 unsigned HOST_WIDE_INT max_val
8546 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
8551 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
8552 code = LT, op1 = GEN_INT (const_val + 1);
8555 /* When cross-compiling, const_val might be sign-extended from
8556 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
8558 if ((HOST_WIDE_INT) (const_val & max_val)
8559 != (((HOST_WIDE_INT) 1
8560 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
8561 code = GT, op1 = GEN_INT (const_val - 1);
8565 if (uconst_val < max_val)
8566 code = LTU, op1 = GEN_INT (uconst_val + 1);
8570 if (uconst_val != 0)
8571 code = GTU, op1 = GEN_INT (uconst_val - 1);
8580 /* Never return CC0; return zero instead. */
8585 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
8588 /* Given a jump insn JUMP, return the condition that will cause it to branch
8589 to its JUMP_LABEL. If the condition cannot be understood, or is an
8590 inequality floating-point comparison which needs to be reversed, 0 will
8593 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8594 insn used in locating the condition was found. If a replacement test
8595 of the condition is desired, it should be placed in front of that
8596 insn and we will be sure that the inputs are still valid. */
8599 get_condition (jump, earliest)
8607 /* If this is not a standard conditional jump, we can't parse it. */
8608 if (GET_CODE (jump) != JUMP_INSN
8609 || ! any_condjump_p (jump))
8611 set = pc_set (jump);
8613 cond = XEXP (SET_SRC (set), 0);
8615 /* If this branches to JUMP_LABEL when the condition is false, reverse
8618 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
8619 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump);
8621 return canonicalize_condition (jump, cond, reverse, earliest, NULL_RTX);
8624 /* Similar to above routine, except that we also put an invariant last
8625 unless both operands are invariants. */
8628 get_condition_for_loop (loop, x)
8629 const struct loop *loop;
8632 rtx comparison = get_condition (x, (rtx*)0);
8635 || ! loop_invariant_p (loop, XEXP (comparison, 0))
8636 || loop_invariant_p (loop, XEXP (comparison, 1)))
8639 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
8640 XEXP (comparison, 1), XEXP (comparison, 0));
8643 /* Scan the function and determine whether it has indirect (computed) jumps.
8645 This is taken mostly from flow.c; similar code exists elsewhere
8646 in the compiler. It may be useful to put this into rtlanal.c. */
8648 indirect_jump_in_function_p (start)
8653 for (insn = start; insn; insn = NEXT_INSN (insn))
8654 if (computed_jump_p (insn))
8660 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
8661 documentation for LOOP_MEMS for the definition of `appropriate'.
8662 This function is called from prescan_loop via for_each_rtx. */
8665 insert_loop_mem (mem, data)
8667 void *data ATTRIBUTE_UNUSED;
8669 struct loop_info *loop_info = data;
8676 switch (GET_CODE (m))
8682 /* We're not interested in MEMs that are only clobbered. */
8686 /* We're not interested in the MEM associated with a
8687 CONST_DOUBLE, so there's no need to traverse into this. */
8691 /* We're not interested in any MEMs that only appear in notes. */
8695 /* This is not a MEM. */
8699 /* See if we've already seen this MEM. */
8700 for (i = 0; i < loop_info->mems_idx; ++i)
8701 if (rtx_equal_p (m, loop_info->mems[i].mem))
8703 if (GET_MODE (m) != GET_MODE (loop_info->mems[i].mem))
8704 /* The modes of the two memory accesses are different. If
8705 this happens, something tricky is going on, and we just
8706 don't optimize accesses to this MEM. */
8707 loop_info->mems[i].optimize = 0;
8712 /* Resize the array, if necessary. */
8713 if (loop_info->mems_idx == loop_info->mems_allocated)
8715 if (loop_info->mems_allocated != 0)
8716 loop_info->mems_allocated *= 2;
8718 loop_info->mems_allocated = 32;
8720 loop_info->mems = (loop_mem_info *)
8721 xrealloc (loop_info->mems,
8722 loop_info->mems_allocated * sizeof (loop_mem_info));
8725 /* Actually insert the MEM. */
8726 loop_info->mems[loop_info->mems_idx].mem = m;
8727 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
8728 because we can't put it in a register. We still store it in the
8729 table, though, so that if we see the same address later, but in a
8730 non-BLK mode, we'll not think we can optimize it at that point. */
8731 loop_info->mems[loop_info->mems_idx].optimize = (GET_MODE (m) != BLKmode);
8732 loop_info->mems[loop_info->mems_idx].reg = NULL_RTX;
8733 ++loop_info->mems_idx;
8739 /* Allocate REGS->ARRAY or reallocate it if it is too small.
8741 Increment REGS->ARRAY[I].SET_IN_LOOP at the index I of each
8742 register that is modified by an insn between FROM and TO. If the
8743 value of an element of REGS->array[I].SET_IN_LOOP becomes 127 or
8744 more, stop incrementing it, to avoid overflow.
8746 Store in REGS->ARRAY[I].SINGLE_USAGE the single insn in which
8747 register I is used, if it is only used once. Otherwise, it is set
8748 to 0 (for no uses) or const0_rtx for more than one use. This
8749 parameter may be zero, in which case this processing is not done.
8751 Set REGS->ARRAY[I].MAY_NOT_OPTIMIZE nonzero if we should not
8752 optimize register I. */
8755 loop_regs_scan (loop, extra_size)
8756 const struct loop *loop;
8759 struct loop_regs *regs = LOOP_REGS (loop);
8761 /* last_set[n] is nonzero iff reg n has been set in the current
8762 basic block. In that case, it is the insn that last set reg n. */
8767 old_nregs = regs->num;
8768 regs->num = max_reg_num ();
8770 /* Grow the regs array if not allocated or too small. */
8771 if (regs->num >= regs->size)
8773 regs->size = regs->num + extra_size;
8775 regs->array = (struct loop_reg *)
8776 xrealloc (regs->array, regs->size * sizeof (*regs->array));
8778 /* Zero the new elements. */
8779 memset (regs->array + old_nregs, 0,
8780 (regs->size - old_nregs) * sizeof (*regs->array));
8783 /* Clear previously scanned fields but do not clear n_times_set. */
8784 for (i = 0; i < old_nregs; i++)
8786 regs->array[i].set_in_loop = 0;
8787 regs->array[i].may_not_optimize = 0;
8788 regs->array[i].single_usage = NULL_RTX;
8791 last_set = (rtx *) xcalloc (regs->num, sizeof (rtx));
8793 /* Scan the loop, recording register usage. */
8794 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
8795 insn = NEXT_INSN (insn))
8799 /* Record registers that have exactly one use. */
8800 find_single_use_in_loop (regs, insn, PATTERN (insn));
8802 /* Include uses in REG_EQUAL notes. */
8803 if (REG_NOTES (insn))
8804 find_single_use_in_loop (regs, insn, REG_NOTES (insn));
8806 if (GET_CODE (PATTERN (insn)) == SET
8807 || GET_CODE (PATTERN (insn)) == CLOBBER)
8808 count_one_set (regs, insn, PATTERN (insn), last_set);
8809 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
8812 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
8813 count_one_set (regs, insn, XVECEXP (PATTERN (insn), 0, i),
8818 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
8819 memset (last_set, 0, regs->num * sizeof (rtx));
8822 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
8824 regs->array[i].may_not_optimize = 1;
8825 regs->array[i].set_in_loop = 1;
8828 #ifdef AVOID_CCMODE_COPIES
8829 /* Don't try to move insns which set CC registers if we should not
8830 create CCmode register copies. */
8831 for (i = regs->num - 1; i >= FIRST_PSEUDO_REGISTER; i--)
8832 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
8833 regs->array[i].may_not_optimize = 1;
8836 /* Set regs->array[I].n_times_set for the new registers. */
8837 for (i = old_nregs; i < regs->num; i++)
8838 regs->array[i].n_times_set = regs->array[i].set_in_loop;
8843 /* Returns the number of real INSNs in the LOOP. */
8846 count_insns_in_loop (loop)
8847 const struct loop *loop;
8852 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
8853 insn = NEXT_INSN (insn))
8860 /* Move MEMs into registers for the duration of the loop. */
8864 const struct loop *loop;
8866 struct loop_info *loop_info = LOOP_INFO (loop);
8867 struct loop_regs *regs = LOOP_REGS (loop);
8868 int maybe_never = 0;
8870 rtx p, prev_ebb_head;
8871 rtx label = NULL_RTX;
8873 /* Nonzero if the next instruction may never be executed. */
8874 int next_maybe_never = 0;
8875 unsigned int last_max_reg = max_reg_num ();
8877 if (loop_info->mems_idx == 0)
8880 /* We cannot use next_label here because it skips over normal insns. */
8881 end_label = next_nonnote_insn (loop->end);
8882 if (end_label && GET_CODE (end_label) != CODE_LABEL)
8883 end_label = NULL_RTX;
8885 /* Check to see if it's possible that some instructions in the loop are
8886 never executed. Also check if there is a goto out of the loop other
8887 than right after the end of the loop. */
8888 for (p = next_insn_in_loop (loop, loop->scan_start);
8890 p = next_insn_in_loop (loop, p))
8892 if (GET_CODE (p) == CODE_LABEL)
8894 else if (GET_CODE (p) == JUMP_INSN
8895 /* If we enter the loop in the middle, and scan
8896 around to the beginning, don't set maybe_never
8897 for that. This must be an unconditional jump,
8898 otherwise the code at the top of the loop might
8899 never be executed. Unconditional jumps are
8900 followed a by barrier then loop end. */
8901 && ! (GET_CODE (p) == JUMP_INSN
8902 && JUMP_LABEL (p) == loop->top
8903 && NEXT_INSN (NEXT_INSN (p)) == loop->end
8904 && any_uncondjump_p (p)))
8906 /* If this is a jump outside of the loop but not right
8907 after the end of the loop, we would have to emit new fixup
8908 sequences for each such label. */
8909 if (/* If we can't tell where control might go when this
8910 JUMP_INSN is executed, we must be conservative. */
8912 || (JUMP_LABEL (p) != end_label
8913 && (INSN_UID (JUMP_LABEL (p)) >= max_uid_for_loop
8914 || INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop->start)
8915 || INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop->end))))
8918 if (!any_condjump_p (p))
8919 /* Something complicated. */
8922 /* If there are any more instructions in the loop, they
8923 might not be reached. */
8924 next_maybe_never = 1;
8926 else if (next_maybe_never)
8930 /* Find start of the extended basic block that enters the loop. */
8931 for (p = loop->start;
8932 PREV_INSN (p) && GET_CODE (p) != CODE_LABEL;
8939 /* Build table of mems that get set to constant values before the
8941 for (; p != loop->start; p = NEXT_INSN (p))
8942 cselib_process_insn (p);
8944 /* Actually move the MEMs. */
8945 for (i = 0; i < loop_info->mems_idx; ++i)
8947 regset_head load_copies;
8948 regset_head store_copies;
8951 rtx mem = loop_info->mems[i].mem;
8954 if (MEM_VOLATILE_P (mem)
8955 || loop_invariant_p (loop, XEXP (mem, 0)) != 1)
8956 /* There's no telling whether or not MEM is modified. */
8957 loop_info->mems[i].optimize = 0;
8959 /* Go through the MEMs written to in the loop to see if this
8960 one is aliased by one of them. */
8961 mem_list_entry = loop_info->store_mems;
8962 while (mem_list_entry)
8964 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
8966 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
8969 /* MEM is indeed aliased by this store. */
8970 loop_info->mems[i].optimize = 0;
8973 mem_list_entry = XEXP (mem_list_entry, 1);
8976 if (flag_float_store && written
8977 && GET_MODE_CLASS (GET_MODE (mem)) == MODE_FLOAT)
8978 loop_info->mems[i].optimize = 0;
8980 /* If this MEM is written to, we must be sure that there
8981 are no reads from another MEM that aliases this one. */
8982 if (loop_info->mems[i].optimize && written)
8986 for (j = 0; j < loop_info->mems_idx; ++j)
8990 else if (true_dependence (mem,
8992 loop_info->mems[j].mem,
8995 /* It's not safe to hoist loop_info->mems[i] out of
8996 the loop because writes to it might not be
8997 seen by reads from loop_info->mems[j]. */
8998 loop_info->mems[i].optimize = 0;
9004 if (maybe_never && may_trap_p (mem))
9005 /* We can't access the MEM outside the loop; it might
9006 cause a trap that wouldn't have happened otherwise. */
9007 loop_info->mems[i].optimize = 0;
9009 if (!loop_info->mems[i].optimize)
9010 /* We thought we were going to lift this MEM out of the
9011 loop, but later discovered that we could not. */
9014 INIT_REG_SET (&load_copies);
9015 INIT_REG_SET (&store_copies);
9017 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9018 order to keep scan_loop from moving stores to this MEM
9019 out of the loop just because this REG is neither a
9020 user-variable nor used in the loop test. */
9021 reg = gen_reg_rtx (GET_MODE (mem));
9022 REG_USERVAR_P (reg) = 1;
9023 loop_info->mems[i].reg = reg;
9025 /* Now, replace all references to the MEM with the
9026 corresponding pseudos. */
9028 for (p = next_insn_in_loop (loop, loop->scan_start);
9030 p = next_insn_in_loop (loop, p))
9036 set = single_set (p);
9038 /* See if this copies the mem into a register that isn't
9039 modified afterwards. We'll try to do copy propagation
9040 a little further on. */
9042 /* @@@ This test is _way_ too conservative. */
9044 && GET_CODE (SET_DEST (set)) == REG
9045 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
9046 && REGNO (SET_DEST (set)) < last_max_reg
9047 && regs->array[REGNO (SET_DEST (set))].n_times_set == 1
9048 && rtx_equal_p (SET_SRC (set), mem))
9049 SET_REGNO_REG_SET (&load_copies, REGNO (SET_DEST (set)));
9051 /* See if this copies the mem from a register that isn't
9052 modified afterwards. We'll try to remove the
9053 redundant copy later on by doing a little register
9054 renaming and copy propagation. This will help
9055 to untangle things for the BIV detection code. */
9058 && GET_CODE (SET_SRC (set)) == REG
9059 && REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER
9060 && REGNO (SET_SRC (set)) < last_max_reg
9061 && regs->array[REGNO (SET_SRC (set))].n_times_set == 1
9062 && rtx_equal_p (SET_DEST (set), mem))
9063 SET_REGNO_REG_SET (&store_copies, REGNO (SET_SRC (set)));
9065 /* Replace the memory reference with the shadow register. */
9066 replace_loop_mems (p, loop_info->mems[i].mem,
9067 loop_info->mems[i].reg);
9070 if (GET_CODE (p) == CODE_LABEL
9071 || GET_CODE (p) == JUMP_INSN)
9075 if (! apply_change_group ())
9076 /* We couldn't replace all occurrences of the MEM. */
9077 loop_info->mems[i].optimize = 0;
9080 /* Load the memory immediately before LOOP->START, which is
9081 the NOTE_LOOP_BEG. */
9082 cselib_val *e = cselib_lookup (mem, VOIDmode, 0);
9086 struct elt_loc_list *const_equiv = 0;
9090 struct elt_loc_list *equiv;
9091 struct elt_loc_list *best_equiv = 0;
9092 for (equiv = e->locs; equiv; equiv = equiv->next)
9094 if (CONSTANT_P (equiv->loc))
9095 const_equiv = equiv;
9096 else if (GET_CODE (equiv->loc) == REG
9097 /* Extending hard register lifetimes causes crash
9098 on SRC targets. Doing so on non-SRC is
9099 probably also not good idea, since we most
9100 probably have pseudoregister equivalence as
9102 && REGNO (equiv->loc) >= FIRST_PSEUDO_REGISTER)
9105 /* Use the constant equivalence if that is cheap enough. */
9107 best_equiv = const_equiv;
9108 else if (const_equiv
9109 && (rtx_cost (const_equiv->loc, SET)
9110 <= rtx_cost (best_equiv->loc, SET)))
9112 best_equiv = const_equiv;
9116 /* If best_equiv is nonzero, we know that MEM is set to a
9117 constant or register before the loop. We will use this
9118 knowledge to initialize the shadow register with that
9119 constant or reg rather than by loading from MEM. */
9121 best = copy_rtx (best_equiv->loc);
9124 set = gen_move_insn (reg, best);
9125 set = loop_insn_hoist (loop, set);
9128 for (p = prev_ebb_head; p != loop->start; p = NEXT_INSN (p))
9129 if (REGNO_LAST_UID (REGNO (best)) == INSN_UID (p))
9131 REGNO_LAST_UID (REGNO (best)) = INSN_UID (set);
9137 REG_NOTES (set) = gen_rtx_EXPR_LIST (REG_EQUAL,
9138 copy_rtx (const_equiv->loc),
9143 if (label == NULL_RTX)
9145 label = gen_label_rtx ();
9146 emit_label_after (label, loop->end);
9149 /* Store the memory immediately after END, which is
9150 the NOTE_LOOP_END. */
9151 set = gen_move_insn (copy_rtx (mem), reg);
9152 loop_insn_emit_after (loop, 0, label, set);
9155 if (loop_dump_stream)
9157 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9158 REGNO (reg), (written ? "r/w" : "r/o"));
9159 print_rtl (loop_dump_stream, mem);
9160 fputc ('\n', loop_dump_stream);
9163 /* Attempt a bit of copy propagation. This helps untangle the
9164 data flow, and enables {basic,general}_induction_var to find
9166 EXECUTE_IF_SET_IN_REG_SET
9167 (&load_copies, FIRST_PSEUDO_REGISTER, j,
9169 try_copy_prop (loop, reg, j);
9171 CLEAR_REG_SET (&load_copies);
9173 EXECUTE_IF_SET_IN_REG_SET
9174 (&store_copies, FIRST_PSEUDO_REGISTER, j,
9176 try_swap_copy_prop (loop, reg, j);
9178 CLEAR_REG_SET (&store_copies);
9182 if (label != NULL_RTX && end_label != NULL_RTX)
9184 /* Now, we need to replace all references to the previous exit
9185 label with the new one. */
9190 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
9192 for_each_rtx (&p, replace_label, &rr);
9194 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9195 field. This is not handled by for_each_rtx because it doesn't
9196 handle unprinted ('0') fields. We need to update JUMP_LABEL
9197 because the immediately following unroll pass will use it.
9198 replace_label would not work anyways, because that only handles
9200 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9201 JUMP_LABEL (p) = label;
9208 /* For communication between note_reg_stored and its caller. */
9209 struct note_reg_stored_arg
9215 /* Called via note_stores, record in SET_SEEN whether X, which is written,
9218 note_reg_stored (x, setter, arg)
9219 rtx x, setter ATTRIBUTE_UNUSED;
9222 struct note_reg_stored_arg *t = (struct note_reg_stored_arg *) arg;
9227 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
9228 There must be exactly one insn that sets this pseudo; it will be
9229 deleted if all replacements succeed and we can prove that the register
9230 is not used after the loop. */
9233 try_copy_prop (loop, replacement, regno)
9234 const struct loop *loop;
9238 /* This is the reg that we are copying from. */
9239 rtx reg_rtx = regno_reg_rtx[regno];
9242 /* These help keep track of whether we replaced all uses of the reg. */
9243 int replaced_last = 0;
9244 int store_is_first = 0;
9246 for (insn = next_insn_in_loop (loop, loop->scan_start);
9248 insn = next_insn_in_loop (loop, insn))
9252 /* Only substitute within one extended basic block from the initializing
9254 if (GET_CODE (insn) == CODE_LABEL && init_insn)
9257 if (! INSN_P (insn))
9260 /* Is this the initializing insn? */
9261 set = single_set (insn);
9263 && GET_CODE (SET_DEST (set)) == REG
9264 && REGNO (SET_DEST (set)) == regno)
9270 if (REGNO_FIRST_UID (regno) == INSN_UID (insn))
9274 /* Only substitute after seeing the initializing insn. */
9275 if (init_insn && insn != init_insn)
9277 struct note_reg_stored_arg arg;
9279 replace_loop_regs (insn, reg_rtx, replacement);
9280 if (REGNO_LAST_UID (regno) == INSN_UID (insn))
9283 /* Stop replacing when REPLACEMENT is modified. */
9284 arg.reg = replacement;
9286 note_stores (PATTERN (insn), note_reg_stored, &arg);
9289 rtx note = find_reg_note (insn, REG_EQUAL, NULL);
9291 /* It is possible that we've turned previously valid REG_EQUAL to
9292 invalid, as we change the REGNO to REPLACEMENT and unlike REGNO,
9293 REPLACEMENT is modified, we get different meaning. */
9294 if (note && reg_mentioned_p (replacement, XEXP (note, 0)))
9295 remove_note (insn, note);
9302 if (apply_change_group ())
9304 if (loop_dump_stream)
9305 fprintf (loop_dump_stream, " Replaced reg %d", regno);
9306 if (store_is_first && replaced_last)
9311 /* Assume we're just deleting INIT_INSN. */
9313 /* Look for REG_RETVAL note. If we're deleting the end of
9314 the libcall sequence, the whole sequence can go. */
9315 retval_note = find_reg_note (init_insn, REG_RETVAL, NULL_RTX);
9316 /* If we found a REG_RETVAL note, find the first instruction
9319 first = XEXP (retval_note, 0);
9321 /* Delete the instructions. */
9322 loop_delete_insns (first, init_insn);
9324 if (loop_dump_stream)
9325 fprintf (loop_dump_stream, ".\n");
9329 /* Replace all the instructions from FIRST up to and including LAST
9330 with NOTE_INSN_DELETED notes. */
9333 loop_delete_insns (first, last)
9339 if (loop_dump_stream)
9340 fprintf (loop_dump_stream, ", deleting init_insn (%d)",
9342 delete_insn (first);
9344 /* If this was the LAST instructions we're supposed to delete,
9349 first = NEXT_INSN (first);
9353 /* Try to replace occurrences of pseudo REGNO with REPLACEMENT within
9354 loop LOOP if the order of the sets of these registers can be
9355 swapped. There must be exactly one insn within the loop that sets
9356 this pseudo followed immediately by a move insn that sets
9357 REPLACEMENT with REGNO. */
9359 try_swap_copy_prop (loop, replacement, regno)
9360 const struct loop *loop;
9366 unsigned int new_regno;
9368 new_regno = REGNO (replacement);
9370 for (insn = next_insn_in_loop (loop, loop->scan_start);
9372 insn = next_insn_in_loop (loop, insn))
9374 /* Search for the insn that copies REGNO to NEW_REGNO? */
9376 && (set = single_set (insn))
9377 && GET_CODE (SET_DEST (set)) == REG
9378 && REGNO (SET_DEST (set)) == new_regno
9379 && GET_CODE (SET_SRC (set)) == REG
9380 && REGNO (SET_SRC (set)) == regno)
9384 if (insn != NULL_RTX)
9389 /* Some DEF-USE info would come in handy here to make this
9390 function more general. For now, just check the previous insn
9391 which is the most likely candidate for setting REGNO. */
9393 prev_insn = PREV_INSN (insn);
9396 && (prev_set = single_set (prev_insn))
9397 && GET_CODE (SET_DEST (prev_set)) == REG
9398 && REGNO (SET_DEST (prev_set)) == regno)
9401 (set (reg regno) (expr))
9402 (set (reg new_regno) (reg regno))
9404 so try converting this to:
9405 (set (reg new_regno) (expr))
9406 (set (reg regno) (reg new_regno))
9408 The former construct is often generated when a global
9409 variable used for an induction variable is shadowed by a
9410 register (NEW_REGNO). The latter construct improves the
9411 chances of GIV replacement and BIV elimination. */
9413 validate_change (prev_insn, &SET_DEST (prev_set),
9415 validate_change (insn, &SET_DEST (set),
9417 validate_change (insn, &SET_SRC (set),
9420 if (apply_change_group ())
9422 if (loop_dump_stream)
9423 fprintf (loop_dump_stream,
9424 " Swapped set of reg %d at %d with reg %d at %d.\n",
9425 regno, INSN_UID (insn),
9426 new_regno, INSN_UID (prev_insn));
9428 /* Update first use of REGNO. */
9429 if (REGNO_FIRST_UID (regno) == INSN_UID (prev_insn))
9430 REGNO_FIRST_UID (regno) = INSN_UID (insn);
9432 /* Now perform copy propagation to hopefully
9433 remove all uses of REGNO within the loop. */
9434 try_copy_prop (loop, replacement, regno);
9440 /* Replace MEM with its associated pseudo register. This function is
9441 called from load_mems via for_each_rtx. DATA is actually a pointer
9442 to a structure describing the instruction currently being scanned
9443 and the MEM we are currently replacing. */
9446 replace_loop_mem (mem, data)
9450 loop_replace_args *args = (loop_replace_args *) data;
9456 switch (GET_CODE (m))
9462 /* We're not interested in the MEM associated with a
9463 CONST_DOUBLE, so there's no need to traverse into one. */
9467 /* This is not a MEM. */
9471 if (!rtx_equal_p (args->match, m))
9472 /* This is not the MEM we are currently replacing. */
9475 /* Actually replace the MEM. */
9476 validate_change (args->insn, mem, args->replacement, 1);
9482 replace_loop_mems (insn, mem, reg)
9487 loop_replace_args args;
9491 args.replacement = reg;
9493 for_each_rtx (&insn, replace_loop_mem, &args);
9496 /* Replace one register with another. Called through for_each_rtx; PX points
9497 to the rtx being scanned. DATA is actually a pointer to
9498 a structure of arguments. */
9501 replace_loop_reg (px, data)
9506 loop_replace_args *args = (loop_replace_args *) data;
9511 if (x == args->match)
9512 validate_change (args->insn, px, args->replacement, 1);
9518 replace_loop_regs (insn, reg, replacement)
9523 loop_replace_args args;
9527 args.replacement = replacement;
9529 for_each_rtx (&insn, replace_loop_reg, &args);
9532 /* Replace occurrences of the old exit label for the loop with the new
9533 one. DATA is an rtx_pair containing the old and new labels,
9537 replace_label (x, data)
9542 rtx old_label = ((rtx_pair *) data)->r1;
9543 rtx new_label = ((rtx_pair *) data)->r2;
9548 if (GET_CODE (l) != LABEL_REF)
9551 if (XEXP (l, 0) != old_label)
9554 XEXP (l, 0) = new_label;
9555 ++LABEL_NUSES (new_label);
9556 --LABEL_NUSES (old_label);
9561 /* Emit insn for PATTERN after WHERE_INSN in basic block WHERE_BB
9562 (ignored in the interim). */
9565 loop_insn_emit_after (loop, where_bb, where_insn, pattern)
9566 const struct loop *loop ATTRIBUTE_UNUSED;
9567 basic_block where_bb ATTRIBUTE_UNUSED;
9571 return emit_insn_after (pattern, where_insn);
9575 /* If WHERE_INSN is non-zero emit insn for PATTERN before WHERE_INSN
9576 in basic block WHERE_BB (ignored in the interim) within the loop
9577 otherwise hoist PATTERN into the loop pre-header. */
9580 loop_insn_emit_before (loop, where_bb, where_insn, pattern)
9581 const struct loop *loop;
9582 basic_block where_bb ATTRIBUTE_UNUSED;
9587 return loop_insn_hoist (loop, pattern);
9588 return emit_insn_before (pattern, where_insn);
9592 /* Emit call insn for PATTERN before WHERE_INSN in basic block
9593 WHERE_BB (ignored in the interim) within the loop. */
9596 loop_call_insn_emit_before (loop, where_bb, where_insn, pattern)
9597 const struct loop *loop ATTRIBUTE_UNUSED;
9598 basic_block where_bb ATTRIBUTE_UNUSED;
9602 return emit_call_insn_before (pattern, where_insn);
9606 /* Hoist insn for PATTERN into the loop pre-header. */
9609 loop_insn_hoist (loop, pattern)
9610 const struct loop *loop;
9613 return loop_insn_emit_before (loop, 0, loop->start, pattern);
9617 /* Hoist call insn for PATTERN into the loop pre-header. */
9620 loop_call_insn_hoist (loop, pattern)
9621 const struct loop *loop;
9624 return loop_call_insn_emit_before (loop, 0, loop->start, pattern);
9628 /* Sink insn for PATTERN after the loop end. */
9631 loop_insn_sink (loop, pattern)
9632 const struct loop *loop;
9635 return loop_insn_emit_before (loop, 0, loop->sink, pattern);
9639 /* If the loop has multiple exits, emit insn for PATTERN before the
9640 loop to ensure that it will always be executed no matter how the
9641 loop exits. Otherwise, emit the insn for PATTERN after the loop,
9642 since this is slightly more efficient. */
9645 loop_insn_sink_or_swim (loop, pattern)
9646 const struct loop *loop;
9649 if (loop->exit_count)
9650 return loop_insn_hoist (loop, pattern);
9652 return loop_insn_sink (loop, pattern);
9656 loop_ivs_dump (loop, file, verbose)
9657 const struct loop *loop;
9661 struct iv_class *bl;
9664 if (! loop || ! file)
9667 for (bl = LOOP_IVS (loop)->list; bl; bl = bl->next)
9670 fprintf (file, "Loop %d: %d IV classes\n", loop->num, iv_num);
9672 for (bl = LOOP_IVS (loop)->list; bl; bl = bl->next)
9674 loop_iv_class_dump (bl, file, verbose);
9681 loop_iv_class_dump (bl, file, verbose)
9682 const struct iv_class *bl;
9684 int verbose ATTRIBUTE_UNUSED;
9686 struct induction *v;
9693 fprintf (file, "IV class for reg %d, benefit %d\n",
9694 bl->regno, bl->total_benefit);
9696 fprintf (file, " Init insn %d", INSN_UID (bl->init_insn));
9697 if (bl->initial_value)
9699 fprintf (file, ", init val: ");
9700 print_simple_rtl (file, bl->initial_value);
9702 if (bl->initial_test)
9704 fprintf (file, ", init test: ");
9705 print_simple_rtl (file, bl->initial_test);
9709 if (bl->final_value)
9711 fprintf (file, " Final val: ");
9712 print_simple_rtl (file, bl->final_value);
9716 if ((incr = biv_total_increment (bl)))
9718 fprintf (file, " Total increment: ");
9719 print_simple_rtl (file, incr);
9723 /* List the increments. */
9724 for (i = 0, v = bl->biv; v; v = v->next_iv, i++)
9726 fprintf (file, " Inc%d: insn %d, incr: ", i, INSN_UID (v->insn));
9727 print_simple_rtl (file, v->add_val);
9731 /* List the givs. */
9732 for (i = 0, v = bl->giv; v; v = v->next_iv, i++)
9734 fprintf (file, " Giv%d: insn %d, benefit %d, ",
9735 i, INSN_UID (v->insn), v->benefit);
9736 if (v->giv_type == DEST_ADDR)
9737 print_simple_rtl (file, v->mem);
9739 print_simple_rtl (file, single_set (v->insn));
9746 loop_biv_dump (v, file, verbose)
9747 const struct induction *v;
9756 REGNO (v->dest_reg), INSN_UID (v->insn));
9757 fprintf (file, " const ");
9758 print_simple_rtl (file, v->add_val);
9760 if (verbose && v->final_value)
9763 fprintf (file, " final ");
9764 print_simple_rtl (file, v->final_value);
9772 loop_giv_dump (v, file, verbose)
9773 const struct induction *v;
9780 if (v->giv_type == DEST_REG)
9781 fprintf (file, "Giv %d: insn %d",
9782 REGNO (v->dest_reg), INSN_UID (v->insn));
9784 fprintf (file, "Dest address: insn %d",
9785 INSN_UID (v->insn));
9787 fprintf (file, " src reg %d benefit %d",
9788 REGNO (v->src_reg), v->benefit);
9789 fprintf (file, " lifetime %d",
9793 fprintf (file, " replaceable");
9795 if (v->no_const_addval)
9796 fprintf (file, " ncav");
9798 if (v->ext_dependant)
9800 switch (GET_CODE (v->ext_dependant))
9803 fprintf (file, " ext se");
9806 fprintf (file, " ext ze");
9809 fprintf (file, " ext tr");
9817 fprintf (file, " mult ");
9818 print_simple_rtl (file, v->mult_val);
9821 fprintf (file, " add ");
9822 print_simple_rtl (file, v->add_val);
9824 if (verbose && v->final_value)
9827 fprintf (file, " final ");
9828 print_simple_rtl (file, v->final_value);
9837 const struct loop *loop;
9839 loop_ivs_dump (loop, stderr, 1);
9845 const struct iv_class *bl;
9847 loop_iv_class_dump (bl, stderr, 1);
9853 const struct induction *v;
9855 loop_biv_dump (v, stderr, 1);
9861 const struct induction *v;
9863 loop_giv_dump (v, stderr, 1);
9867 #define LOOP_BLOCK_NUM_1(INSN) \
9868 ((INSN) ? (BLOCK_FOR_INSN (INSN) ? BLOCK_NUM (INSN) : - 1) : -1)
9870 /* The notes do not have an assigned block, so look at the next insn. */
9871 #define LOOP_BLOCK_NUM(INSN) \
9872 ((INSN) ? (GET_CODE (INSN) == NOTE \
9873 ? LOOP_BLOCK_NUM_1 (next_nonnote_insn (INSN)) \
9874 : LOOP_BLOCK_NUM_1 (INSN)) \
9877 #define LOOP_INSN_UID(INSN) ((INSN) ? INSN_UID (INSN) : -1)
9880 loop_dump_aux (loop, file, verbose)
9881 const struct loop *loop;
9883 int verbose ATTRIBUTE_UNUSED;
9887 if (! loop || ! file)
9890 /* Print diagnostics to compare our concept of a loop with
9891 what the loop notes say. */
9892 if (! PREV_INSN (loop->first->head)
9893 || GET_CODE (PREV_INSN (loop->first->head)) != NOTE
9894 || NOTE_LINE_NUMBER (PREV_INSN (loop->first->head))
9895 != NOTE_INSN_LOOP_BEG)
9896 fprintf (file, ";; No NOTE_INSN_LOOP_BEG at %d\n",
9897 INSN_UID (PREV_INSN (loop->first->head)));
9898 if (! NEXT_INSN (loop->last->end)
9899 || GET_CODE (NEXT_INSN (loop->last->end)) != NOTE
9900 || NOTE_LINE_NUMBER (NEXT_INSN (loop->last->end))
9901 != NOTE_INSN_LOOP_END)
9902 fprintf (file, ";; No NOTE_INSN_LOOP_END at %d\n",
9903 INSN_UID (NEXT_INSN (loop->last->end)));
9908 ";; start %d (%d), cont dom %d (%d), cont %d (%d), vtop %d (%d), end %d (%d)\n",
9909 LOOP_BLOCK_NUM (loop->start),
9910 LOOP_INSN_UID (loop->start),
9911 LOOP_BLOCK_NUM (loop->cont),
9912 LOOP_INSN_UID (loop->cont),
9913 LOOP_BLOCK_NUM (loop->cont),
9914 LOOP_INSN_UID (loop->cont),
9915 LOOP_BLOCK_NUM (loop->vtop),
9916 LOOP_INSN_UID (loop->vtop),
9917 LOOP_BLOCK_NUM (loop->end),
9918 LOOP_INSN_UID (loop->end));
9919 fprintf (file, ";; top %d (%d), scan start %d (%d)\n",
9920 LOOP_BLOCK_NUM (loop->top),
9921 LOOP_INSN_UID (loop->top),
9922 LOOP_BLOCK_NUM (loop->scan_start),
9923 LOOP_INSN_UID (loop->scan_start));
9924 fprintf (file, ";; exit_count %d", loop->exit_count);
9925 if (loop->exit_count)
9927 fputs (", labels:", file);
9928 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
9930 fprintf (file, " %d ",
9931 LOOP_INSN_UID (XEXP (label, 0)));
9936 /* This can happen when a marked loop appears as two nested loops,
9937 say from while (a || b) {}. The inner loop won't match
9938 the loop markers but the outer one will. */
9939 if (LOOP_BLOCK_NUM (loop->cont) != loop->latch->index)
9940 fprintf (file, ";; NOTE_INSN_LOOP_CONT not in loop latch\n");
9944 /* Call this function from the debugger to dump LOOP. */
9948 const struct loop *loop;
9950 flow_loop_dump (loop, stderr, loop_dump_aux, 1);
9953 /* Call this function from the debugger to dump LOOPS. */
9957 const struct loops *loops;
9959 flow_loops_dump (loops, stderr, loop_dump_aux, 1);
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