1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-99, 2000 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
44 #include "basic-block.h"
45 #include "insn-config.h"
46 #include "insn-flags.h"
48 #include "hard-reg-set.h"
56 /* Information about the current loop being processed used to compute
57 the number of loop iterations for loop unrolling and doloop
59 static struct loop_info *current_loop_info;
61 /* Vector mapping INSN_UIDs to luids.
62 The luids are like uids but increase monotonically always.
63 We use them to see whether a jump comes from outside a given loop. */
67 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
68 number the insn is contained in. */
70 struct loop **uid_loop;
72 /* 1 + largest uid of any insn. */
76 /* 1 + luid of last insn. */
80 /* Number of loops detected in current function. Used as index to the
83 static int max_loop_num;
85 /* Indexed by register number, contains the number of times the reg
86 is set during the loop being scanned.
87 During code motion, a negative value indicates a reg that has been
88 made a candidate; in particular -2 means that it is an candidate that
89 we know is equal to a constant and -1 means that it is an candidate
90 not known equal to a constant.
91 After code motion, regs moved have 0 (which is accurate now)
92 while the failed candidates have the original number of times set.
94 Therefore, at all times, == 0 indicates an invariant register;
95 < 0 a conditionally invariant one. */
97 static varray_type set_in_loop;
99 /* Original value of set_in_loop; same except that this value
100 is not set negative for a reg whose sets have been made candidates
101 and not set to 0 for a reg that is moved. */
103 static varray_type n_times_set;
105 /* Index by register number, 1 indicates that the register
106 cannot be moved or strength reduced. */
108 static varray_type may_not_optimize;
110 /* Contains the insn in which a register was used if it was used
111 exactly once; contains const0_rtx if it was used more than once. */
113 static varray_type reg_single_usage;
115 /* Nonzero means reg N has already been moved out of one loop.
116 This reduces the desire to move it out of another. */
118 static char *moved_once;
120 /* List of MEMs that are stored in this loop. */
122 static rtx loop_store_mems;
124 /* The insn where the first of these was found. */
125 static rtx first_loop_store_insn;
127 typedef struct loop_mem_info {
128 rtx mem; /* The MEM itself. */
129 rtx reg; /* Corresponding pseudo, if any. */
130 int optimize; /* Nonzero if we can optimize access to this MEM. */
133 /* Array of MEMs that are used (read or written) in this loop, but
134 cannot be aliased by anything in this loop, except perhaps
135 themselves. In other words, if loop_mems[i] is altered during the
136 loop, it is altered by an expression that is rtx_equal_p to it. */
138 static loop_mem_info *loop_mems;
140 /* The index of the next available slot in LOOP_MEMS. */
142 static int loop_mems_idx;
144 /* The number of elements allocated in LOOP_MEMs. */
146 static int loop_mems_allocated;
148 /* Nonzero if we don't know what MEMs were changed in the current
149 loop. This happens if the loop contains a call (in which case
150 `loop_info->has_call' will also be set) or if we store into more
151 than NUM_STORES MEMs. */
153 static int unknown_address_altered;
155 /* The above doesn't count any readonly memory locations that are stored.
158 static int unknown_constant_address_altered;
160 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
161 static int num_movables;
163 /* Count of memory write instructions discovered in the loop. */
164 static int num_mem_sets;
166 /* Bound on pseudo register number before loop optimization.
167 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
168 int max_reg_before_loop;
170 /* The value to pass to the next call of reg_scan_update. */
171 static int loop_max_reg;
173 /* This obstack is used in product_cheap_p to allocate its rtl. It
174 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
175 If we used the same obstack that it did, we would be deallocating
178 static struct obstack temp_obstack;
180 /* This is where the pointer to the obstack being used for RTL is stored. */
182 extern struct obstack *rtl_obstack;
184 #define obstack_chunk_alloc xmalloc
185 #define obstack_chunk_free free
187 /* During the analysis of a loop, a chain of `struct movable's
188 is made to record all the movable insns found.
189 Then the entire chain can be scanned to decide which to move. */
193 rtx insn; /* A movable insn */
194 rtx set_src; /* The expression this reg is set from. */
195 rtx set_dest; /* The destination of this SET. */
196 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
197 of any registers used within the LIBCALL. */
198 int consec; /* Number of consecutive following insns
199 that must be moved with this one. */
200 int regno; /* The register it sets */
201 short lifetime; /* lifetime of that register;
202 may be adjusted when matching movables
203 that load the same value are found. */
204 short savings; /* Number of insns we can move for this reg,
205 including other movables that force this
206 or match this one. */
207 unsigned int cond : 1; /* 1 if only conditionally movable */
208 unsigned int force : 1; /* 1 means MUST move this insn */
209 unsigned int global : 1; /* 1 means reg is live outside this loop */
210 /* If PARTIAL is 1, GLOBAL means something different:
211 that the reg is live outside the range from where it is set
212 to the following label. */
213 unsigned int done : 1; /* 1 inhibits further processing of this */
215 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
216 In particular, moving it does not make it
218 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
219 load SRC, rather than copying INSN. */
220 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
221 first insn of a consecutive sets group. */
222 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
223 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
224 that we should avoid changing when clearing
225 the rest of the reg. */
226 struct movable *match; /* First entry for same value */
227 struct movable *forces; /* An insn that must be moved if this is */
228 struct movable *next;
231 static struct movable *the_movables;
233 FILE *loop_dump_stream;
235 /* Forward declarations. */
237 static void verify_dominator PARAMS ((struct loop *));
238 static void find_and_verify_loops PARAMS ((rtx, struct loops *));
239 static void mark_loop_jump PARAMS ((rtx, struct loop *));
240 static void prescan_loop PARAMS ((struct loop *));
241 static int reg_in_basic_block_p PARAMS ((rtx, rtx));
242 static int consec_sets_invariant_p PARAMS ((rtx, int, rtx));
243 static int labels_in_range_p PARAMS ((rtx, int));
244 static void count_one_set PARAMS ((rtx, rtx, varray_type, rtx *));
246 static void count_loop_regs_set PARAMS ((rtx, rtx, varray_type, varray_type,
248 static void note_addr_stored PARAMS ((rtx, rtx, void *));
249 static void note_set_pseudo_multiple_uses PARAMS ((rtx, rtx, void *));
250 static int loop_reg_used_before_p PARAMS ((const struct loop *, rtx, rtx));
251 static void scan_loop PARAMS ((struct loop*, int, int));
253 static void replace_call_address PARAMS ((rtx, rtx, rtx));
255 static rtx skip_consec_insns PARAMS ((rtx, int));
256 static int libcall_benefit PARAMS ((rtx));
257 static void ignore_some_movables PARAMS ((struct movable *));
258 static void force_movables PARAMS ((struct movable *));
259 static void combine_movables PARAMS ((struct movable *, int));
260 static int regs_match_p PARAMS ((rtx, rtx, struct movable *));
261 static int rtx_equal_for_loop_p PARAMS ((rtx, rtx, struct movable *));
262 static void add_label_notes PARAMS ((rtx, rtx));
263 static void move_movables PARAMS ((struct movable *, int, int, rtx, rtx, int));
264 static int count_nonfixed_reads PARAMS ((rtx));
265 static void strength_reduce PARAMS ((struct loop *, int, int, int));
266 static void find_single_use_in_loop PARAMS ((rtx, rtx, varray_type));
267 static int valid_initial_value_p PARAMS ((rtx, rtx, int, rtx));
268 static void find_mem_givs PARAMS ((rtx, rtx, int, int, rtx, rtx));
269 static void record_biv PARAMS ((struct induction *, rtx, rtx, rtx, rtx, rtx *, int, int, int));
270 static void check_final_value PARAMS ((struct induction *, rtx, rtx,
271 unsigned HOST_WIDE_INT));
272 static void record_giv PARAMS ((struct induction *, rtx, rtx, rtx, rtx, rtx, int, enum g_types, int, int, rtx *, rtx, rtx));
273 static void update_giv_derive PARAMS ((rtx));
274 static int basic_induction_var PARAMS ((rtx, enum machine_mode, rtx, rtx, int, rtx *, rtx *, rtx **, int *));
275 static rtx simplify_giv_expr PARAMS ((rtx, int *));
276 static int general_induction_var PARAMS ((rtx, rtx *, rtx *, rtx *, int, int *));
277 static int consec_sets_giv PARAMS ((int, rtx, rtx, rtx, rtx *, rtx *, rtx *));
278 static int check_dbra_loop PARAMS ((struct loop *, int));
279 static rtx express_from_1 PARAMS ((rtx, rtx, rtx));
280 static rtx combine_givs_p PARAMS ((struct induction *, struct induction *));
281 static void combine_givs PARAMS ((struct iv_class *));
282 struct recombine_givs_stats;
283 static int find_life_end PARAMS ((rtx, struct recombine_givs_stats *, rtx, rtx));
284 static void recombine_givs PARAMS ((struct iv_class *, rtx, rtx, int));
285 static int product_cheap_p PARAMS ((rtx, rtx));
286 static int maybe_eliminate_biv PARAMS ((struct iv_class *, rtx, rtx, int, int, int));
287 static int maybe_eliminate_biv_1 PARAMS ((rtx, rtx, struct iv_class *, int, rtx));
288 static int last_use_this_basic_block PARAMS ((rtx, rtx));
289 static void record_initial PARAMS ((rtx, rtx, void *));
290 static void update_reg_last_use PARAMS ((rtx, rtx));
291 static rtx next_insn_in_loop PARAMS ((const struct loop *, rtx));
292 static void load_mems_and_recount_loop_regs_set PARAMS ((const struct loop*,
294 static void load_mems PARAMS ((const struct loop *));
295 static int insert_loop_mem PARAMS ((rtx *, void *));
296 static int replace_loop_mem PARAMS ((rtx *, void *));
297 static int replace_loop_reg PARAMS ((rtx *, void *));
298 static void note_reg_stored PARAMS ((rtx, rtx, void *));
299 static void try_copy_prop PARAMS ((const struct loop *, rtx, int));
300 static int replace_label PARAMS ((rtx *, void *));
302 typedef struct rtx_and_int {
307 typedef struct rtx_pair {
312 /* Nonzero iff INSN is between START and END, inclusive. */
313 #define INSN_IN_RANGE_P(INSN, START, END) \
314 (INSN_UID (INSN) < max_uid_for_loop \
315 && INSN_LUID (INSN) >= INSN_LUID (START) \
316 && INSN_LUID (INSN) <= INSN_LUID (END))
318 #ifdef HAVE_decrement_and_branch_on_count
319 /* Test whether BCT applicable and safe. */
320 static void insert_bct PARAMS ((struct loop *));
322 /* Auxiliary function that inserts the BCT pattern into the loop. */
323 static void instrument_loop_bct PARAMS ((rtx, rtx, rtx));
324 #endif /* HAVE_decrement_and_branch_on_count */
326 /* Indirect_jump_in_function is computed once per function. */
327 int indirect_jump_in_function = 0;
328 static int indirect_jump_in_function_p PARAMS ((rtx));
330 static int compute_luids PARAMS ((rtx, rtx, int));
332 static int biv_elimination_giv_has_0_offset PARAMS ((struct induction *,
333 struct induction *, rtx));
335 /* Relative gain of eliminating various kinds of operations. */
338 static int shift_cost;
339 static int mult_cost;
342 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
343 copy the value of the strength reduced giv to its original register. */
344 static int copy_cost;
346 /* Cost of using a register, to normalize the benefits of a giv. */
347 static int reg_address_cost;
353 char *free_point = (char *) oballoc (1);
354 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
356 add_cost = rtx_cost (gen_rtx_PLUS (word_mode, reg, reg), SET);
359 reg_address_cost = ADDRESS_COST (reg);
361 reg_address_cost = rtx_cost (reg, MEM);
364 /* We multiply by 2 to reconcile the difference in scale between
365 these two ways of computing costs. Otherwise the cost of a copy
366 will be far less than the cost of an add. */
370 /* Free the objects we just allocated. */
373 /* Initialize the obstack used for rtl in product_cheap_p. */
374 gcc_obstack_init (&temp_obstack);
377 /* Compute the mapping from uids to luids.
378 LUIDs are numbers assigned to insns, like uids,
379 except that luids increase monotonically through the code.
380 Start at insn START and stop just before END. Assign LUIDs
381 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
383 compute_luids (start, end, prev_luid)
390 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
392 if (INSN_UID (insn) >= max_uid_for_loop)
394 /* Don't assign luids to line-number NOTEs, so that the distance in
395 luids between two insns is not affected by -g. */
396 if (GET_CODE (insn) != NOTE
397 || NOTE_LINE_NUMBER (insn) <= 0)
398 uid_luid[INSN_UID (insn)] = ++i;
400 /* Give a line number note the same luid as preceding insn. */
401 uid_luid[INSN_UID (insn)] = i;
406 /* Entry point of this file. Perform loop optimization
407 on the current function. F is the first insn of the function
408 and DUMPFILE is a stream for output of a trace of actions taken
409 (or 0 if none should be output). */
412 loop_optimize (f, dumpfile, unroll_p, bct_p)
413 /* f is the first instruction of a chain of insns for one function */
420 struct loops loops_data;
421 struct loops *loops = &loops_data;
423 loop_dump_stream = dumpfile;
425 init_recog_no_volatile ();
427 max_reg_before_loop = max_reg_num ();
428 loop_max_reg = max_reg_before_loop;
432 /* Count the number of loops. */
435 for (insn = f; insn; insn = NEXT_INSN (insn))
437 if (GET_CODE (insn) == NOTE
438 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
442 /* Don't waste time if no loops. */
443 if (max_loop_num == 0)
446 loops->num = max_loop_num;
448 moved_once = (char *) xcalloc (max_reg_before_loop, sizeof (char));
450 /* Get size to use for tables indexed by uids.
451 Leave some space for labels allocated by find_and_verify_loops. */
452 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
454 uid_luid = (int *) xcalloc (max_uid_for_loop, sizeof (int));
455 uid_loop = (struct loop **) xcalloc (max_uid_for_loop,
456 sizeof (struct loop *));
458 /* Find and process each loop.
459 First, find them, and record them in order of their beginnings. */
460 find_and_verify_loops (f, loops);
462 /* Now find all register lifetimes. This must be done after
463 find_and_verify_loops, because it might reorder the insns in the
465 reg_scan (f, max_reg_before_loop, 1);
467 /* This must occur after reg_scan so that registers created by gcse
468 will have entries in the register tables.
470 We could have added a call to reg_scan after gcse_main in toplev.c,
471 but moving this call to init_alias_analysis is more efficient. */
472 init_alias_analysis ();
474 /* See if we went too far. Note that get_max_uid already returns
475 one more that the maximum uid of all insn. */
476 if (get_max_uid () > max_uid_for_loop)
478 /* Now reset it to the actual size we need. See above. */
479 max_uid_for_loop = get_max_uid ();
481 /* find_and_verify_loops has already called compute_luids, but it
482 might have rearranged code afterwards, so we need to recompute
484 max_luid = compute_luids (f, NULL_RTX, 0);
486 /* Don't leave gaps in uid_luid for insns that have been
487 deleted. It is possible that the first or last insn
488 using some register has been deleted by cross-jumping.
489 Make sure that uid_luid for that former insn's uid
490 points to the general area where that insn used to be. */
491 for (i = 0; i < max_uid_for_loop; i++)
493 uid_luid[0] = uid_luid[i];
494 if (uid_luid[0] != 0)
497 for (i = 0; i < max_uid_for_loop; i++)
498 if (uid_luid[i] == 0)
499 uid_luid[i] = uid_luid[i - 1];
501 /* If debugging and unrolling loops, we must replicate the tree
502 nodes corresponding to the BLOCKs inside the loop, so that the
503 original one to one mapping will remain. We sometimes unroll
504 loops even when unroll_p is false, so we must always do this when
506 if (write_symbols != NO_DEBUG)
507 find_loop_tree_blocks ();
509 /* Determine if the function has indirect jump. On some systems
510 this prevents low overhead loop instructions from being used. */
511 indirect_jump_in_function = indirect_jump_in_function_p (f);
513 /* Now scan the loops, last ones first, since this means inner ones are done
514 before outer ones. */
515 for (i = max_loop_num - 1; i >= 0; i--)
517 struct loop *loop = &loops->array[i];
519 loop->info = (struct loop_info *) alloca (sizeof (struct loop_info));
520 memset (loop->info, 0, sizeof (struct loop_info));
522 if (! loop->invalid && loop->end)
523 scan_loop (loop, unroll_p, bct_p);
526 /* Replicate the BLOCKs. */
527 if (write_symbols != NO_DEBUG)
528 unroll_block_trees ();
530 end_alias_analysis ();
538 /* Returns the next insn, in execution order, after INSN. START and
539 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
540 respectively. LOOP_TOP, if non-NULL, is the top of the loop in the
541 insn-stream; it is used with loops that are entered near the
545 next_insn_in_loop (loop, insn)
546 const struct loop *loop;
549 insn = NEXT_INSN (insn);
551 if (insn == loop->end)
554 /* Go to the top of the loop, and continue there. */
561 if (insn == loop->scan_start)
568 /* Optimize one loop described by LOOP. */
570 /* ??? Could also move memory writes out of loops if the destination address
571 is invariant, the source is invariant, the memory write is not volatile,
572 and if we can prove that no read inside the loop can read this address
573 before the write occurs. If there is a read of this address after the
574 write, then we can also mark the memory read as invariant. */
577 scan_loop (loop, unroll_p, bct_p)
582 rtx loop_start = loop->start;
583 rtx loop_end = loop->end;
584 struct loop_info *loop_info = loop->info;
586 /* 1 if we are scanning insns that could be executed zero times. */
588 /* 1 if we are scanning insns that might never be executed
589 due to a subroutine call which might exit before they are reached. */
591 /* Jump insn that enters the loop, or 0 if control drops in. */
592 rtx loop_entry_jump = 0;
593 /* Number of insns in the loop. */
597 rtx temp, update_start, update_end;
598 /* The SET from an insn, if it is the only SET in the insn. */
600 /* Chain describing insns movable in current loop. */
601 struct movable *movables = 0;
602 /* Last element in `movables' -- so we can add elements at the end. */
603 struct movable *last_movable = 0;
604 /* Ratio of extra register life span we can justify
605 for saving an instruction. More if loop doesn't call subroutines
606 since in that case saving an insn makes more difference
607 and more registers are available. */
609 /* Nonzero if we are scanning instructions in a sub-loop. */
613 current_loop_info = loop_info;
616 /* Determine whether this loop starts with a jump down to a test at
617 the end. This will occur for a small number of loops with a test
618 that is too complex to duplicate in front of the loop.
620 We search for the first insn or label in the loop, skipping NOTEs.
621 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
622 (because we might have a loop executed only once that contains a
623 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
624 (in case we have a degenerate loop).
626 Note that if we mistakenly think that a loop is entered at the top
627 when, in fact, it is entered at the exit test, the only effect will be
628 slightly poorer optimization. Making the opposite error can generate
629 incorrect code. Since very few loops now start with a jump to the
630 exit test, the code here to detect that case is very conservative. */
632 for (p = NEXT_INSN (loop_start);
634 && GET_CODE (p) != CODE_LABEL && GET_RTX_CLASS (GET_CODE (p)) != 'i'
635 && (GET_CODE (p) != NOTE
636 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
637 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
641 loop->scan_start = p;
643 /* Set up variables describing this loop. */
645 threshold = (loop_info->has_call ? 1 : 2) * (1 + n_non_fixed_regs);
647 /* If loop has a jump before the first label,
648 the true entry is the target of that jump.
649 Start scan from there.
650 But record in LOOP->TOP the place where the end-test jumps
651 back to so we can scan that after the end of the loop. */
652 if (GET_CODE (p) == JUMP_INSN)
656 /* Loop entry must be unconditional jump (and not a RETURN) */
658 && JUMP_LABEL (p) != 0
659 /* Check to see whether the jump actually
660 jumps out of the loop (meaning it's no loop).
661 This case can happen for things like
662 do {..} while (0). If this label was generated previously
663 by loop, we can't tell anything about it and have to reject
665 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, loop_end))
667 loop->top = next_label (loop->scan_start);
668 loop->scan_start = JUMP_LABEL (p);
672 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
673 as required by loop_reg_used_before_p. So skip such loops. (This
674 test may never be true, but it's best to play it safe.)
676 Also, skip loops where we do not start scanning at a label. This
677 test also rejects loops starting with a JUMP_INSN that failed the
680 if (INSN_UID (loop->scan_start) >= max_uid_for_loop
681 || GET_CODE (loop->scan_start) != CODE_LABEL)
683 if (loop_dump_stream)
684 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
685 INSN_UID (loop_start), INSN_UID (loop_end));
689 /* Count number of times each reg is set during this loop.
690 Set VARRAY_CHAR (may_not_optimize, I) if it is not safe to move out
691 the setting of register I. Set VARRAY_RTX (reg_single_usage, I). */
693 /* Allocate extra space for REGS that might be created by
694 load_mems. We allocate a little extra slop as well, in the hopes
695 that even after the moving of movables creates some new registers
696 we won't have to reallocate these arrays. However, we do grow
697 the arrays, if necessary, in load_mems_recount_loop_regs_set. */
698 nregs = max_reg_num () + loop_mems_idx + 16;
699 VARRAY_INT_INIT (set_in_loop, nregs, "set_in_loop");
700 VARRAY_INT_INIT (n_times_set, nregs, "n_times_set");
701 VARRAY_CHAR_INIT (may_not_optimize, nregs, "may_not_optimize");
702 VARRAY_RTX_INIT (reg_single_usage, nregs, "reg_single_usage");
704 count_loop_regs_set (loop->top ? loop->top : loop->start, loop->end,
705 may_not_optimize, reg_single_usage, &insn_count, nregs);
707 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
709 VARRAY_CHAR (may_not_optimize, i) = 1;
710 VARRAY_INT (set_in_loop, i) = 1;
713 #ifdef AVOID_CCMODE_COPIES
714 /* Don't try to move insns which set CC registers if we should not
715 create CCmode register copies. */
716 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
717 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
718 VARRAY_CHAR (may_not_optimize, i) = 1;
721 bcopy ((char *) &set_in_loop->data,
722 (char *) &n_times_set->data, nregs * sizeof (int));
724 if (loop_dump_stream)
726 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
727 INSN_UID (loop_start), INSN_UID (loop_end), insn_count);
729 fprintf (loop_dump_stream, "Continue at insn %d.\n",
730 INSN_UID (loop->cont));
733 /* Scan through the loop finding insns that are safe to move.
734 Set set_in_loop negative for the reg being set, so that
735 this reg will be considered invariant for subsequent insns.
736 We consider whether subsequent insns use the reg
737 in deciding whether it is worth actually moving.
739 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
740 and therefore it is possible that the insns we are scanning
741 would never be executed. At such times, we must make sure
742 that it is safe to execute the insn once instead of zero times.
743 When MAYBE_NEVER is 0, all insns will be executed at least once
744 so that is not a problem. */
746 for (p = next_insn_in_loop (loop, loop->scan_start);
748 p = next_insn_in_loop (loop, p))
750 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
751 && find_reg_note (p, REG_LIBCALL, NULL_RTX))
753 else if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
754 && find_reg_note (p, REG_RETVAL, NULL_RTX))
757 if (GET_CODE (p) == INSN
758 && (set = single_set (p))
759 && GET_CODE (SET_DEST (set)) == REG
760 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
765 rtx src = SET_SRC (set);
766 rtx dependencies = 0;
768 /* Figure out what to use as a source of this insn. If a REG_EQUIV
769 note is given or if a REG_EQUAL note with a constant operand is
770 specified, use it as the source and mark that we should move
771 this insn by calling emit_move_insn rather that duplicating the
774 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
776 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
778 src = XEXP (temp, 0), move_insn = 1;
781 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
782 if (temp && CONSTANT_P (XEXP (temp, 0)))
783 src = XEXP (temp, 0), move_insn = 1;
784 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
786 src = XEXP (temp, 0);
787 /* A libcall block can use regs that don't appear in
788 the equivalent expression. To move the libcall,
789 we must move those regs too. */
790 dependencies = libcall_other_reg (p, src);
794 /* Don't try to optimize a register that was made
795 by loop-optimization for an inner loop.
796 We don't know its life-span, so we can't compute the benefit. */
797 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
799 else if (/* The register is used in basic blocks other
800 than the one where it is set (meaning that
801 something after this point in the loop might
802 depend on its value before the set). */
803 ! reg_in_basic_block_p (p, SET_DEST (set))
804 /* And the set is not guaranteed to be executed one
805 the loop starts, or the value before the set is
806 needed before the set occurs...
808 ??? Note we have quadratic behaviour here, mitigated
809 by the fact that the previous test will often fail for
810 large loops. Rather than re-scanning the entire loop
811 each time for register usage, we should build tables
812 of the register usage and use them here instead. */
814 || loop_reg_used_before_p (loop, set, p)))
815 /* It is unsafe to move the set.
817 This code used to consider it OK to move a set of a variable
818 which was not created by the user and not used in an exit test.
819 That behavior is incorrect and was removed. */
821 else if ((tem = invariant_p (src))
822 && (dependencies == 0
823 || (tem2 = invariant_p (dependencies)) != 0)
824 && (VARRAY_INT (set_in_loop,
825 REGNO (SET_DEST (set))) == 1
827 = consec_sets_invariant_p
829 VARRAY_INT (set_in_loop, REGNO (SET_DEST (set))),
831 /* If the insn can cause a trap (such as divide by zero),
832 can't move it unless it's guaranteed to be executed
833 once loop is entered. Even a function call might
834 prevent the trap insn from being reached
835 (since it might exit!) */
836 && ! ((maybe_never || call_passed)
837 && may_trap_p (src)))
839 register struct movable *m;
840 register int regno = REGNO (SET_DEST (set));
842 /* A potential lossage is where we have a case where two insns
843 can be combined as long as they are both in the loop, but
844 we move one of them outside the loop. For large loops,
845 this can lose. The most common case of this is the address
846 of a function being called.
848 Therefore, if this register is marked as being used exactly
849 once if we are in a loop with calls (a "large loop"), see if
850 we can replace the usage of this register with the source
851 of this SET. If we can, delete this insn.
853 Don't do this if P has a REG_RETVAL note or if we have
854 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
856 if (loop_info->has_call
857 && VARRAY_RTX (reg_single_usage, regno) != 0
858 && VARRAY_RTX (reg_single_usage, regno) != const0_rtx
859 && REGNO_FIRST_UID (regno) == INSN_UID (p)
860 && (REGNO_LAST_UID (regno)
861 == INSN_UID (VARRAY_RTX (reg_single_usage, regno)))
862 && VARRAY_INT (set_in_loop, regno) == 1
863 && ! side_effects_p (SET_SRC (set))
864 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
865 && (! SMALL_REGISTER_CLASSES
866 || (! (GET_CODE (SET_SRC (set)) == REG
867 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
868 /* This test is not redundant; SET_SRC (set) might be
869 a call-clobbered register and the life of REGNO
870 might span a call. */
871 && ! modified_between_p (SET_SRC (set), p,
873 (reg_single_usage, regno))
874 && no_labels_between_p (p, VARRAY_RTX (reg_single_usage, regno))
875 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
877 (reg_single_usage, regno)))
879 /* Replace any usage in a REG_EQUAL note. Must copy the
880 new source, so that we don't get rtx sharing between the
881 SET_SOURCE and REG_NOTES of insn p. */
882 REG_NOTES (VARRAY_RTX (reg_single_usage, regno))
883 = replace_rtx (REG_NOTES (VARRAY_RTX
884 (reg_single_usage, regno)),
885 SET_DEST (set), copy_rtx (SET_SRC (set)));
888 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
889 NOTE_SOURCE_FILE (p) = 0;
890 VARRAY_INT (set_in_loop, regno) = 0;
894 m = (struct movable *) alloca (sizeof (struct movable));
898 m->dependencies = dependencies;
899 m->set_dest = SET_DEST (set);
901 m->consec = VARRAY_INT (set_in_loop,
902 REGNO (SET_DEST (set))) - 1;
906 m->move_insn = move_insn;
907 m->move_insn_first = 0;
908 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
909 m->savemode = VOIDmode;
911 /* Set M->cond if either invariant_p or consec_sets_invariant_p
912 returned 2 (only conditionally invariant). */
913 m->cond = ((tem | tem1 | tem2) > 1);
914 m->global = (uid_luid[REGNO_LAST_UID (regno)]
915 > INSN_LUID (loop_end)
916 || uid_luid[REGNO_FIRST_UID (regno)] < INSN_LUID (loop_start));
918 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
919 - uid_luid[REGNO_FIRST_UID (regno)]);
920 m->savings = VARRAY_INT (n_times_set, regno);
921 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
922 m->savings += libcall_benefit (p);
923 VARRAY_INT (set_in_loop, regno) = move_insn ? -2 : -1;
924 /* Add M to the end of the chain MOVABLES. */
928 last_movable->next = m;
933 /* It is possible for the first instruction to have a
934 REG_EQUAL note but a non-invariant SET_SRC, so we must
935 remember the status of the first instruction in case
936 the last instruction doesn't have a REG_EQUAL note. */
937 m->move_insn_first = m->move_insn;
939 /* Skip this insn, not checking REG_LIBCALL notes. */
940 p = next_nonnote_insn (p);
941 /* Skip the consecutive insns, if there are any. */
942 p = skip_consec_insns (p, m->consec);
943 /* Back up to the last insn of the consecutive group. */
944 p = prev_nonnote_insn (p);
946 /* We must now reset m->move_insn, m->is_equiv, and possibly
947 m->set_src to correspond to the effects of all the
949 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
951 m->set_src = XEXP (temp, 0), m->move_insn = 1;
954 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
955 if (temp && CONSTANT_P (XEXP (temp, 0)))
956 m->set_src = XEXP (temp, 0), m->move_insn = 1;
961 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
964 /* If this register is always set within a STRICT_LOW_PART
965 or set to zero, then its high bytes are constant.
966 So clear them outside the loop and within the loop
967 just load the low bytes.
968 We must check that the machine has an instruction to do so.
969 Also, if the value loaded into the register
970 depends on the same register, this cannot be done. */
971 else if (SET_SRC (set) == const0_rtx
972 && GET_CODE (NEXT_INSN (p)) == INSN
973 && (set1 = single_set (NEXT_INSN (p)))
974 && GET_CODE (set1) == SET
975 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
976 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
977 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
979 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
981 register int regno = REGNO (SET_DEST (set));
982 if (VARRAY_INT (set_in_loop, regno) == 2)
984 register struct movable *m;
985 m = (struct movable *) alloca (sizeof (struct movable));
988 m->set_dest = SET_DEST (set);
995 m->move_insn_first = 0;
997 /* If the insn may not be executed on some cycles,
998 we can't clear the whole reg; clear just high part.
999 Not even if the reg is used only within this loop.
1006 Clearing x before the inner loop could clobber a value
1007 being saved from the last time around the outer loop.
1008 However, if the reg is not used outside this loop
1009 and all uses of the register are in the same
1010 basic block as the store, there is no problem.
1012 If this insn was made by loop, we don't know its
1013 INSN_LUID and hence must make a conservative
1015 m->global = (INSN_UID (p) >= max_uid_for_loop
1016 || (uid_luid[REGNO_LAST_UID (regno)]
1017 > INSN_LUID (loop_end))
1018 || (uid_luid[REGNO_FIRST_UID (regno)]
1020 || (labels_in_range_p
1021 (p, uid_luid[REGNO_FIRST_UID (regno)])));
1022 if (maybe_never && m->global)
1023 m->savemode = GET_MODE (SET_SRC (set1));
1025 m->savemode = VOIDmode;
1029 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
1030 - uid_luid[REGNO_FIRST_UID (regno)]);
1032 VARRAY_INT (set_in_loop, regno) = -1;
1033 /* Add M to the end of the chain MOVABLES. */
1037 last_movable->next = m;
1042 /* Past a call insn, we get to insns which might not be executed
1043 because the call might exit. This matters for insns that trap.
1044 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1045 so they don't count. */
1046 else if (GET_CODE (p) == CALL_INSN && ! in_libcall)
1048 /* Past a label or a jump, we get to insns for which we
1049 can't count on whether or how many times they will be
1050 executed during each iteration. Therefore, we can
1051 only move out sets of trivial variables
1052 (those not used after the loop). */
1053 /* Similar code appears twice in strength_reduce. */
1054 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1055 /* If we enter the loop in the middle, and scan around to the
1056 beginning, don't set maybe_never for that. This must be an
1057 unconditional jump, otherwise the code at the top of the
1058 loop might never be executed. Unconditional jumps are
1059 followed a by barrier then loop end. */
1060 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop->top
1061 && NEXT_INSN (NEXT_INSN (p)) == loop_end
1062 && simplejump_p (p)))
1064 else if (GET_CODE (p) == NOTE)
1066 /* At the virtual top of a converted loop, insns are again known to
1067 be executed: logically, the loop begins here even though the exit
1068 code has been duplicated. */
1069 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1070 maybe_never = call_passed = 0;
1071 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1073 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1078 /* If one movable subsumes another, ignore that other. */
1080 ignore_some_movables (movables);
1082 /* For each movable insn, see if the reg that it loads
1083 leads when it dies right into another conditionally movable insn.
1084 If so, record that the second insn "forces" the first one,
1085 since the second can be moved only if the first is. */
1087 force_movables (movables);
1089 /* See if there are multiple movable insns that load the same value.
1090 If there are, make all but the first point at the first one
1091 through the `match' field, and add the priorities of them
1092 all together as the priority of the first. */
1094 combine_movables (movables, nregs);
1096 /* Now consider each movable insn to decide whether it is worth moving.
1097 Store 0 in set_in_loop for each reg that is moved.
1099 Generally this increases code size, so do not move moveables when
1100 optimizing for code size. */
1102 if (! optimize_size)
1103 move_movables (movables, threshold,
1104 insn_count, loop_start, loop_end, nregs);
1106 /* Now candidates that still are negative are those not moved.
1107 Change set_in_loop to indicate that those are not actually invariant. */
1108 for (i = 0; i < nregs; i++)
1109 if (VARRAY_INT (set_in_loop, i) < 0)
1110 VARRAY_INT (set_in_loop, i) = VARRAY_INT (n_times_set, i);
1112 /* Now that we've moved some things out of the loop, we might be able to
1113 hoist even more memory references. */
1114 load_mems_and_recount_loop_regs_set (loop, &insn_count);
1116 for (update_start = loop_start;
1117 PREV_INSN (update_start) && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1118 update_start = PREV_INSN (update_start))
1120 update_end = NEXT_INSN (loop_end);
1122 reg_scan_update (update_start, update_end, loop_max_reg);
1123 loop_max_reg = max_reg_num ();
1125 if (flag_strength_reduce)
1127 the_movables = movables;
1128 strength_reduce (loop, insn_count, unroll_p, bct_p);
1130 reg_scan_update (update_start, update_end, loop_max_reg);
1131 loop_max_reg = max_reg_num ();
1134 VARRAY_FREE (reg_single_usage);
1135 VARRAY_FREE (set_in_loop);
1136 VARRAY_FREE (n_times_set);
1137 VARRAY_FREE (may_not_optimize);
1140 /* Add elements to *OUTPUT to record all the pseudo-regs
1141 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1144 record_excess_regs (in_this, not_in_this, output)
1145 rtx in_this, not_in_this;
1152 code = GET_CODE (in_this);
1166 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1167 && ! reg_mentioned_p (in_this, not_in_this))
1168 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1175 fmt = GET_RTX_FORMAT (code);
1176 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1183 for (j = 0; j < XVECLEN (in_this, i); j++)
1184 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1188 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1194 /* Check what regs are referred to in the libcall block ending with INSN,
1195 aside from those mentioned in the equivalent value.
1196 If there are none, return 0.
1197 If there are one or more, return an EXPR_LIST containing all of them. */
1200 libcall_other_reg (insn, equiv)
1203 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1204 rtx p = XEXP (note, 0);
1207 /* First, find all the regs used in the libcall block
1208 that are not mentioned as inputs to the result. */
1212 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1213 || GET_CODE (p) == CALL_INSN)
1214 record_excess_regs (PATTERN (p), equiv, &output);
1221 /* Return 1 if all uses of REG
1222 are between INSN and the end of the basic block. */
1225 reg_in_basic_block_p (insn, reg)
1228 int regno = REGNO (reg);
1231 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1234 /* Search this basic block for the already recorded last use of the reg. */
1235 for (p = insn; p; p = NEXT_INSN (p))
1237 switch (GET_CODE (p))
1244 /* Ordinary insn: if this is the last use, we win. */
1245 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1250 /* Jump insn: if this is the last use, we win. */
1251 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1253 /* Otherwise, it's the end of the basic block, so we lose. */
1258 /* It's the end of the basic block, so we lose. */
1266 /* The "last use" doesn't follow the "first use"?? */
1270 /* Compute the benefit of eliminating the insns in the block whose
1271 last insn is LAST. This may be a group of insns used to compute a
1272 value directly or can contain a library call. */
1275 libcall_benefit (last)
1281 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1282 insn != last; insn = NEXT_INSN (insn))
1284 if (GET_CODE (insn) == CALL_INSN)
1285 benefit += 10; /* Assume at least this many insns in a library
1287 else if (GET_CODE (insn) == INSN
1288 && GET_CODE (PATTERN (insn)) != USE
1289 && GET_CODE (PATTERN (insn)) != CLOBBER)
1296 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1299 skip_consec_insns (insn, count)
1303 for (; count > 0; count--)
1307 /* If first insn of libcall sequence, skip to end. */
1308 /* Do this at start of loop, since INSN is guaranteed to
1310 if (GET_CODE (insn) != NOTE
1311 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1312 insn = XEXP (temp, 0);
1314 do insn = NEXT_INSN (insn);
1315 while (GET_CODE (insn) == NOTE);
1321 /* Ignore any movable whose insn falls within a libcall
1322 which is part of another movable.
1323 We make use of the fact that the movable for the libcall value
1324 was made later and so appears later on the chain. */
1327 ignore_some_movables (movables)
1328 struct movable *movables;
1330 register struct movable *m, *m1;
1332 for (m = movables; m; m = m->next)
1334 /* Is this a movable for the value of a libcall? */
1335 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1339 /* Check for earlier movables inside that range,
1340 and mark them invalid. We cannot use LUIDs here because
1341 insns created by loop.c for prior loops don't have LUIDs.
1342 Rather than reject all such insns from movables, we just
1343 explicitly check each insn in the libcall (since invariant
1344 libcalls aren't that common). */
1345 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1346 for (m1 = movables; m1 != m; m1 = m1->next)
1347 if (m1->insn == insn)
1353 /* For each movable insn, see if the reg that it loads
1354 leads when it dies right into another conditionally movable insn.
1355 If so, record that the second insn "forces" the first one,
1356 since the second can be moved only if the first is. */
1359 force_movables (movables)
1360 struct movable *movables;
1362 register struct movable *m, *m1;
1363 for (m1 = movables; m1; m1 = m1->next)
1364 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1365 if (!m1->partial && !m1->done)
1367 int regno = m1->regno;
1368 for (m = m1->next; m; m = m->next)
1369 /* ??? Could this be a bug? What if CSE caused the
1370 register of M1 to be used after this insn?
1371 Since CSE does not update regno_last_uid,
1372 this insn M->insn might not be where it dies.
1373 But very likely this doesn't matter; what matters is
1374 that M's reg is computed from M1's reg. */
1375 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1378 if (m != 0 && m->set_src == m1->set_dest
1379 /* If m->consec, m->set_src isn't valid. */
1383 /* Increase the priority of the moving the first insn
1384 since it permits the second to be moved as well. */
1388 m1->lifetime += m->lifetime;
1389 m1->savings += m->savings;
1394 /* Find invariant expressions that are equal and can be combined into
1398 combine_movables (movables, nregs)
1399 struct movable *movables;
1402 register struct movable *m;
1403 char *matched_regs = (char *) xmalloc (nregs);
1404 enum machine_mode mode;
1406 /* Regs that are set more than once are not allowed to match
1407 or be matched. I'm no longer sure why not. */
1408 /* Perhaps testing m->consec_sets would be more appropriate here? */
1410 for (m = movables; m; m = m->next)
1411 if (m->match == 0 && VARRAY_INT (n_times_set, m->regno) == 1 && !m->partial)
1413 register struct movable *m1;
1414 int regno = m->regno;
1416 bzero (matched_regs, nregs);
1417 matched_regs[regno] = 1;
1419 /* We want later insns to match the first one. Don't make the first
1420 one match any later ones. So start this loop at m->next. */
1421 for (m1 = m->next; m1; m1 = m1->next)
1422 if (m != m1 && m1->match == 0 && VARRAY_INT (n_times_set, m1->regno) == 1
1423 /* A reg used outside the loop mustn't be eliminated. */
1425 /* A reg used for zero-extending mustn't be eliminated. */
1427 && (matched_regs[m1->regno]
1430 /* Can combine regs with different modes loaded from the
1431 same constant only if the modes are the same or
1432 if both are integer modes with M wider or the same
1433 width as M1. The check for integer is redundant, but
1434 safe, since the only case of differing destination
1435 modes with equal sources is when both sources are
1436 VOIDmode, i.e., CONST_INT. */
1437 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1438 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1439 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1440 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1441 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1442 /* See if the source of M1 says it matches M. */
1443 && ((GET_CODE (m1->set_src) == REG
1444 && matched_regs[REGNO (m1->set_src)])
1445 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1447 && ((m->dependencies == m1->dependencies)
1448 || rtx_equal_p (m->dependencies, m1->dependencies)))
1450 m->lifetime += m1->lifetime;
1451 m->savings += m1->savings;
1454 matched_regs[m1->regno] = 1;
1458 /* Now combine the regs used for zero-extension.
1459 This can be done for those not marked `global'
1460 provided their lives don't overlap. */
1462 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1463 mode = GET_MODE_WIDER_MODE (mode))
1465 register struct movable *m0 = 0;
1467 /* Combine all the registers for extension from mode MODE.
1468 Don't combine any that are used outside this loop. */
1469 for (m = movables; m; m = m->next)
1470 if (m->partial && ! m->global
1471 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1473 register struct movable *m1;
1474 int first = uid_luid[REGNO_FIRST_UID (m->regno)];
1475 int last = uid_luid[REGNO_LAST_UID (m->regno)];
1479 /* First one: don't check for overlap, just record it. */
1484 /* Make sure they extend to the same mode.
1485 (Almost always true.) */
1486 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1489 /* We already have one: check for overlap with those
1490 already combined together. */
1491 for (m1 = movables; m1 != m; m1 = m1->next)
1492 if (m1 == m0 || (m1->partial && m1->match == m0))
1493 if (! (uid_luid[REGNO_FIRST_UID (m1->regno)] > last
1494 || uid_luid[REGNO_LAST_UID (m1->regno)] < first))
1497 /* No overlap: we can combine this with the others. */
1498 m0->lifetime += m->lifetime;
1499 m0->savings += m->savings;
1508 free (matched_regs);
1511 /* Return 1 if regs X and Y will become the same if moved. */
1514 regs_match_p (x, y, movables)
1516 struct movable *movables;
1520 struct movable *mx, *my;
1522 for (mx = movables; mx; mx = mx->next)
1523 if (mx->regno == xn)
1526 for (my = movables; my; my = my->next)
1527 if (my->regno == yn)
1531 && ((mx->match == my->match && mx->match != 0)
1533 || mx == my->match));
1536 /* Return 1 if X and Y are identical-looking rtx's.
1537 This is the Lisp function EQUAL for rtx arguments.
1539 If two registers are matching movables or a movable register and an
1540 equivalent constant, consider them equal. */
1543 rtx_equal_for_loop_p (x, y, movables)
1545 struct movable *movables;
1549 register struct movable *m;
1550 register enum rtx_code code;
1551 register const char *fmt;
1555 if (x == 0 || y == 0)
1558 code = GET_CODE (x);
1560 /* If we have a register and a constant, they may sometimes be
1562 if (GET_CODE (x) == REG && VARRAY_INT (set_in_loop, REGNO (x)) == -2
1565 for (m = movables; m; m = m->next)
1566 if (m->move_insn && m->regno == REGNO (x)
1567 && rtx_equal_p (m->set_src, y))
1570 else if (GET_CODE (y) == REG && VARRAY_INT (set_in_loop, REGNO (y)) == -2
1573 for (m = movables; m; m = m->next)
1574 if (m->move_insn && m->regno == REGNO (y)
1575 && rtx_equal_p (m->set_src, x))
1579 /* Otherwise, rtx's of different codes cannot be equal. */
1580 if (code != GET_CODE (y))
1583 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1584 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1586 if (GET_MODE (x) != GET_MODE (y))
1589 /* These three types of rtx's can be compared nonrecursively. */
1591 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1593 if (code == LABEL_REF)
1594 return XEXP (x, 0) == XEXP (y, 0);
1595 if (code == SYMBOL_REF)
1596 return XSTR (x, 0) == XSTR (y, 0);
1598 /* Compare the elements. If any pair of corresponding elements
1599 fail to match, return 0 for the whole things. */
1601 fmt = GET_RTX_FORMAT (code);
1602 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1607 if (XWINT (x, i) != XWINT (y, i))
1612 if (XINT (x, i) != XINT (y, i))
1617 /* Two vectors must have the same length. */
1618 if (XVECLEN (x, i) != XVECLEN (y, i))
1621 /* And the corresponding elements must match. */
1622 for (j = 0; j < XVECLEN (x, i); j++)
1623 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j), movables) == 0)
1628 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables) == 0)
1633 if (strcmp (XSTR (x, i), XSTR (y, i)))
1638 /* These are just backpointers, so they don't matter. */
1644 /* It is believed that rtx's at this level will never
1645 contain anything but integers and other rtx's,
1646 except for within LABEL_REFs and SYMBOL_REFs. */
1654 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1655 insns in INSNS which use the reference. */
1658 add_label_notes (x, insns)
1662 enum rtx_code code = GET_CODE (x);
1667 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1669 /* This code used to ignore labels that referred to dispatch tables to
1670 avoid flow generating (slighly) worse code.
1672 We no longer ignore such label references (see LABEL_REF handling in
1673 mark_jump_label for additional information). */
1674 for (insn = insns; insn; insn = NEXT_INSN (insn))
1675 if (reg_mentioned_p (XEXP (x, 0), insn))
1676 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, XEXP (x, 0),
1680 fmt = GET_RTX_FORMAT (code);
1681 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1684 add_label_notes (XEXP (x, i), insns);
1685 else if (fmt[i] == 'E')
1686 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1687 add_label_notes (XVECEXP (x, i, j), insns);
1691 /* Scan MOVABLES, and move the insns that deserve to be moved.
1692 If two matching movables are combined, replace one reg with the
1693 other throughout. */
1696 move_movables (movables, threshold, insn_count, loop_start, end, nregs)
1697 struct movable *movables;
1705 register struct movable *m;
1707 /* Map of pseudo-register replacements to handle combining
1708 when we move several insns that load the same value
1709 into different pseudo-registers. */
1710 rtx *reg_map = (rtx *) xcalloc (nregs, sizeof (rtx));
1711 char *already_moved = (char *) xcalloc (nregs, sizeof (char));
1715 for (m = movables; m; m = m->next)
1717 /* Describe this movable insn. */
1719 if (loop_dump_stream)
1721 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1722 INSN_UID (m->insn), m->regno, m->lifetime);
1724 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1726 fprintf (loop_dump_stream, "cond ");
1728 fprintf (loop_dump_stream, "force ");
1730 fprintf (loop_dump_stream, "global ");
1732 fprintf (loop_dump_stream, "done ");
1734 fprintf (loop_dump_stream, "move-insn ");
1736 fprintf (loop_dump_stream, "matches %d ",
1737 INSN_UID (m->match->insn));
1739 fprintf (loop_dump_stream, "forces %d ",
1740 INSN_UID (m->forces->insn));
1743 /* Count movables. Value used in heuristics in strength_reduce. */
1746 /* Ignore the insn if it's already done (it matched something else).
1747 Otherwise, see if it is now safe to move. */
1751 || (1 == invariant_p (m->set_src)
1752 && (m->dependencies == 0
1753 || 1 == invariant_p (m->dependencies))
1755 || 1 == consec_sets_invariant_p (m->set_dest,
1758 && (! m->forces || m->forces->done))
1762 int savings = m->savings;
1764 /* We have an insn that is safe to move.
1765 Compute its desirability. */
1770 if (loop_dump_stream)
1771 fprintf (loop_dump_stream, "savings %d ", savings);
1773 if (moved_once[regno] && loop_dump_stream)
1774 fprintf (loop_dump_stream, "halved since already moved ");
1776 /* An insn MUST be moved if we already moved something else
1777 which is safe only if this one is moved too: that is,
1778 if already_moved[REGNO] is nonzero. */
1780 /* An insn is desirable to move if the new lifetime of the
1781 register is no more than THRESHOLD times the old lifetime.
1782 If it's not desirable, it means the loop is so big
1783 that moving won't speed things up much,
1784 and it is liable to make register usage worse. */
1786 /* It is also desirable to move if it can be moved at no
1787 extra cost because something else was already moved. */
1789 if (already_moved[regno]
1790 || flag_move_all_movables
1791 || (threshold * savings * m->lifetime) >=
1792 (moved_once[regno] ? insn_count * 2 : insn_count)
1793 || (m->forces && m->forces->done
1794 && VARRAY_INT (n_times_set, m->forces->regno) == 1))
1797 register struct movable *m1;
1798 rtx first = NULL_RTX;
1800 /* Now move the insns that set the reg. */
1802 if (m->partial && m->match)
1806 /* Find the end of this chain of matching regs.
1807 Thus, we load each reg in the chain from that one reg.
1808 And that reg is loaded with 0 directly,
1809 since it has ->match == 0. */
1810 for (m1 = m; m1->match; m1 = m1->match);
1811 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1812 SET_DEST (PATTERN (m1->insn)));
1813 i1 = emit_insn_before (newpat, loop_start);
1815 /* Mark the moved, invariant reg as being allowed to
1816 share a hard reg with the other matching invariant. */
1817 REG_NOTES (i1) = REG_NOTES (m->insn);
1818 r1 = SET_DEST (PATTERN (m->insn));
1819 r2 = SET_DEST (PATTERN (m1->insn));
1821 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1822 gen_rtx_EXPR_LIST (VOIDmode, r2,
1824 delete_insn (m->insn);
1829 if (loop_dump_stream)
1830 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1832 /* If we are to re-generate the item being moved with a
1833 new move insn, first delete what we have and then emit
1834 the move insn before the loop. */
1835 else if (m->move_insn)
1839 for (count = m->consec; count >= 0; count--)
1841 /* If this is the first insn of a library call sequence,
1843 if (GET_CODE (p) != NOTE
1844 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1847 /* If this is the last insn of a libcall sequence, then
1848 delete every insn in the sequence except the last.
1849 The last insn is handled in the normal manner. */
1850 if (GET_CODE (p) != NOTE
1851 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1853 temp = XEXP (temp, 0);
1855 temp = delete_insn (temp);
1859 p = delete_insn (p);
1861 /* simplify_giv_expr expects that it can walk the insns
1862 at m->insn forwards and see this old sequence we are
1863 tossing here. delete_insn does preserve the next
1864 pointers, but when we skip over a NOTE we must fix
1865 it up. Otherwise that code walks into the non-deleted
1867 while (p && GET_CODE (p) == NOTE)
1868 p = NEXT_INSN (temp) = NEXT_INSN (p);
1872 emit_move_insn (m->set_dest, m->set_src);
1873 temp = get_insns ();
1876 add_label_notes (m->set_src, temp);
1878 i1 = emit_insns_before (temp, loop_start);
1879 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1881 = gen_rtx_EXPR_LIST (m->is_equiv ? REG_EQUIV : REG_EQUAL,
1882 m->set_src, REG_NOTES (i1));
1884 if (loop_dump_stream)
1885 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1887 /* The more regs we move, the less we like moving them. */
1892 for (count = m->consec; count >= 0; count--)
1896 /* If first insn of libcall sequence, skip to end. */
1897 /* Do this at start of loop, since p is guaranteed to
1899 if (GET_CODE (p) != NOTE
1900 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1903 /* If last insn of libcall sequence, move all
1904 insns except the last before the loop. The last
1905 insn is handled in the normal manner. */
1906 if (GET_CODE (p) != NOTE
1907 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1911 rtx fn_address_insn = 0;
1914 for (temp = XEXP (temp, 0); temp != p;
1915 temp = NEXT_INSN (temp))
1921 if (GET_CODE (temp) == NOTE)
1924 body = PATTERN (temp);
1926 /* Find the next insn after TEMP,
1927 not counting USE or NOTE insns. */
1928 for (next = NEXT_INSN (temp); next != p;
1929 next = NEXT_INSN (next))
1930 if (! (GET_CODE (next) == INSN
1931 && GET_CODE (PATTERN (next)) == USE)
1932 && GET_CODE (next) != NOTE)
1935 /* If that is the call, this may be the insn
1936 that loads the function address.
1938 Extract the function address from the insn
1939 that loads it into a register.
1940 If this insn was cse'd, we get incorrect code.
1942 So emit a new move insn that copies the
1943 function address into the register that the
1944 call insn will use. flow.c will delete any
1945 redundant stores that we have created. */
1946 if (GET_CODE (next) == CALL_INSN
1947 && GET_CODE (body) == SET
1948 && GET_CODE (SET_DEST (body)) == REG
1949 && (n = find_reg_note (temp, REG_EQUAL,
1952 fn_reg = SET_SRC (body);
1953 if (GET_CODE (fn_reg) != REG)
1954 fn_reg = SET_DEST (body);
1955 fn_address = XEXP (n, 0);
1956 fn_address_insn = temp;
1958 /* We have the call insn.
1959 If it uses the register we suspect it might,
1960 load it with the correct address directly. */
1961 if (GET_CODE (temp) == CALL_INSN
1963 && reg_referenced_p (fn_reg, body))
1964 emit_insn_after (gen_move_insn (fn_reg,
1968 if (GET_CODE (temp) == CALL_INSN)
1970 i1 = emit_call_insn_before (body, loop_start);
1971 /* Because the USAGE information potentially
1972 contains objects other than hard registers
1973 we need to copy it. */
1974 if (CALL_INSN_FUNCTION_USAGE (temp))
1975 CALL_INSN_FUNCTION_USAGE (i1)
1976 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
1979 i1 = emit_insn_before (body, loop_start);
1982 if (temp == fn_address_insn)
1983 fn_address_insn = i1;
1984 REG_NOTES (i1) = REG_NOTES (temp);
1990 if (m->savemode != VOIDmode)
1992 /* P sets REG to zero; but we should clear only
1993 the bits that are not covered by the mode
1995 rtx reg = m->set_dest;
2001 (GET_MODE (reg), and_optab, reg,
2002 GEN_INT ((((HOST_WIDE_INT) 1
2003 << GET_MODE_BITSIZE (m->savemode)))
2005 reg, 1, OPTAB_LIB_WIDEN);
2009 emit_move_insn (reg, tem);
2010 sequence = gen_sequence ();
2012 i1 = emit_insn_before (sequence, loop_start);
2014 else if (GET_CODE (p) == CALL_INSN)
2016 i1 = emit_call_insn_before (PATTERN (p), loop_start);
2017 /* Because the USAGE information potentially
2018 contains objects other than hard registers
2019 we need to copy it. */
2020 if (CALL_INSN_FUNCTION_USAGE (p))
2021 CALL_INSN_FUNCTION_USAGE (i1)
2022 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2024 else if (count == m->consec && m->move_insn_first)
2026 /* The SET_SRC might not be invariant, so we must
2027 use the REG_EQUAL note. */
2029 emit_move_insn (m->set_dest, m->set_src);
2030 temp = get_insns ();
2033 add_label_notes (m->set_src, temp);
2035 i1 = emit_insns_before (temp, loop_start);
2036 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2038 = gen_rtx_EXPR_LIST ((m->is_equiv ? REG_EQUIV
2040 m->set_src, REG_NOTES (i1));
2043 i1 = emit_insn_before (PATTERN (p), loop_start);
2045 if (REG_NOTES (i1) == 0)
2047 REG_NOTES (i1) = REG_NOTES (p);
2049 /* If there is a REG_EQUAL note present whose value
2050 is not loop invariant, then delete it, since it
2051 may cause problems with later optimization passes.
2052 It is possible for cse to create such notes
2053 like this as a result of record_jump_cond. */
2055 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2056 && ! invariant_p (XEXP (temp, 0)))
2057 remove_note (i1, temp);
2063 if (loop_dump_stream)
2064 fprintf (loop_dump_stream, " moved to %d",
2067 /* If library call, now fix the REG_NOTES that contain
2068 insn pointers, namely REG_LIBCALL on FIRST
2069 and REG_RETVAL on I1. */
2070 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2072 XEXP (temp, 0) = first;
2073 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2074 XEXP (temp, 0) = i1;
2081 /* simplify_giv_expr expects that it can walk the insns
2082 at m->insn forwards and see this old sequence we are
2083 tossing here. delete_insn does preserve the next
2084 pointers, but when we skip over a NOTE we must fix
2085 it up. Otherwise that code walks into the non-deleted
2087 while (p && GET_CODE (p) == NOTE)
2088 p = NEXT_INSN (temp) = NEXT_INSN (p);
2091 /* The more regs we move, the less we like moving them. */
2095 /* Any other movable that loads the same register
2097 already_moved[regno] = 1;
2099 /* This reg has been moved out of one loop. */
2100 moved_once[regno] = 1;
2102 /* The reg set here is now invariant. */
2104 VARRAY_INT (set_in_loop, regno) = 0;
2108 /* Change the length-of-life info for the register
2109 to say it lives at least the full length of this loop.
2110 This will help guide optimizations in outer loops. */
2112 if (uid_luid[REGNO_FIRST_UID (regno)] > INSN_LUID (loop_start))
2113 /* This is the old insn before all the moved insns.
2114 We can't use the moved insn because it is out of range
2115 in uid_luid. Only the old insns have luids. */
2116 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2117 if (uid_luid[REGNO_LAST_UID (regno)] < INSN_LUID (end))
2118 REGNO_LAST_UID (regno) = INSN_UID (end);
2120 /* Combine with this moved insn any other matching movables. */
2123 for (m1 = movables; m1; m1 = m1->next)
2128 /* Schedule the reg loaded by M1
2129 for replacement so that shares the reg of M.
2130 If the modes differ (only possible in restricted
2131 circumstances, make a SUBREG.
2133 Note this assumes that the target dependent files
2134 treat REG and SUBREG equally, including within
2135 GO_IF_LEGITIMATE_ADDRESS and in all the
2136 predicates since we never verify that replacing the
2137 original register with a SUBREG results in a
2138 recognizable insn. */
2139 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2140 reg_map[m1->regno] = m->set_dest;
2143 = gen_lowpart_common (GET_MODE (m1->set_dest),
2146 /* Get rid of the matching insn
2147 and prevent further processing of it. */
2150 /* if library call, delete all insn except last, which
2152 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2155 for (temp = XEXP (temp, 0); temp != m1->insn;
2156 temp = NEXT_INSN (temp))
2159 delete_insn (m1->insn);
2161 /* Any other movable that loads the same register
2163 already_moved[m1->regno] = 1;
2165 /* The reg merged here is now invariant,
2166 if the reg it matches is invariant. */
2168 VARRAY_INT (set_in_loop, m1->regno) = 0;
2171 else if (loop_dump_stream)
2172 fprintf (loop_dump_stream, "not desirable");
2174 else if (loop_dump_stream && !m->match)
2175 fprintf (loop_dump_stream, "not safe");
2177 if (loop_dump_stream)
2178 fprintf (loop_dump_stream, "\n");
2182 new_start = loop_start;
2184 /* Go through all the instructions in the loop, making
2185 all the register substitutions scheduled in REG_MAP. */
2186 for (p = new_start; p != end; p = NEXT_INSN (p))
2187 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2188 || GET_CODE (p) == CALL_INSN)
2190 replace_regs (PATTERN (p), reg_map, nregs, 0);
2191 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2197 free (already_moved);
2201 /* Scan X and replace the address of any MEM in it with ADDR.
2202 REG is the address that MEM should have before the replacement. */
2205 replace_call_address (x, reg, addr)
2208 register enum rtx_code code;
2210 register const char *fmt;
2214 code = GET_CODE (x);
2228 /* Short cut for very common case. */
2229 replace_call_address (XEXP (x, 1), reg, addr);
2233 /* Short cut for very common case. */
2234 replace_call_address (XEXP (x, 0), reg, addr);
2238 /* If this MEM uses a reg other than the one we expected,
2239 something is wrong. */
2240 if (XEXP (x, 0) != reg)
2249 fmt = GET_RTX_FORMAT (code);
2250 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2253 replace_call_address (XEXP (x, i), reg, addr);
2254 else if (fmt[i] == 'E')
2257 for (j = 0; j < XVECLEN (x, i); j++)
2258 replace_call_address (XVECEXP (x, i, j), reg, addr);
2264 /* Return the number of memory refs to addresses that vary
2268 count_nonfixed_reads (x)
2271 register enum rtx_code code;
2273 register const char *fmt;
2279 code = GET_CODE (x);
2293 return ((invariant_p (XEXP (x, 0)) != 1)
2294 + count_nonfixed_reads (XEXP (x, 0)));
2301 fmt = GET_RTX_FORMAT (code);
2302 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2305 value += count_nonfixed_reads (XEXP (x, i));
2306 else if (fmt[i] == 'E')
2309 for (j = 0; j < XVECLEN (x, i); j++)
2310 value += count_nonfixed_reads (XVECEXP (x, i, j));
2318 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2319 Replace it with an instruction to load just the low bytes
2320 if the machine supports such an instruction,
2321 and insert above LOOP_START an instruction to clear the register. */
2324 constant_high_bytes (p, loop_start)
2328 register int insn_code_number;
2330 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2331 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2336 gen_rtx_STRICT_LOW_PART
2338 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p)), 0)),
2339 SET_DEST (PATTERN (p)), 0)),
2340 XEXP (SET_SRC (PATTERN (p)), 0));
2342 insn_code_number = recog (new, p);
2344 if (insn_code_number)
2348 /* Clear destination register before the loop. */
2349 emit_insn_before (gen_rtx_SET (VOIDmode,
2350 SET_DEST (PATTERN (p)), const0_rtx),
2353 /* Inside the loop, just load the low part. */
2359 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2360 `has_call', `has_volatile', and `has_tablejump' within LOOP_INFO.
2361 Set the global variables `unknown_address_altered',
2362 `unknown_constant_address_altered', and `num_mem_sets'. Also, fill
2363 in the array `loop_mems' and the list `loop_store_mems'. */
2369 register int level = 1;
2371 struct loop_info *loop_info = loop->info;
2372 rtx start = loop->start;
2373 rtx end = loop->end;
2374 /* The label after END. Jumping here is just like falling off the
2375 end of the loop. We use next_nonnote_insn instead of next_label
2376 as a hedge against the (pathological) case where some actual insn
2377 might end up between the two. */
2378 rtx exit_target = next_nonnote_insn (end);
2380 loop_info->has_indirect_jump = indirect_jump_in_function;
2381 loop_info->has_call = 0;
2382 loop_info->has_volatile = 0;
2383 loop_info->has_tablejump = 0;
2384 loop_info->has_multiple_exit_targets = 0;
2389 unknown_address_altered = 0;
2390 unknown_constant_address_altered = 0;
2391 loop_store_mems = NULL_RTX;
2392 first_loop_store_insn = NULL_RTX;
2396 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2397 insn = NEXT_INSN (insn))
2399 if (GET_CODE (insn) == NOTE)
2401 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2404 /* Count number of loops contained in this one. */
2407 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2416 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2421 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP)
2423 /* If there is a NOTE_INSN_LOOP_VTOP, then this is a for
2424 or while style loop, with a loop exit test at the
2425 start. Thus, we can assume that the loop condition
2426 was true when the loop was entered. */
2431 else if (GET_CODE (insn) == CALL_INSN)
2433 if (! CONST_CALL_P (insn))
2434 unknown_address_altered = 1;
2435 loop_info->has_call = 1;
2437 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2439 rtx label1 = NULL_RTX;
2440 rtx label2 = NULL_RTX;
2442 if (volatile_refs_p (PATTERN (insn)))
2443 loop_info->has_volatile = 1;
2445 if (GET_CODE (insn) == JUMP_INSN
2446 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2447 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2448 loop_info->has_tablejump = 1;
2450 note_stores (PATTERN (insn), note_addr_stored, NULL);
2451 if (! first_loop_store_insn && loop_store_mems)
2452 first_loop_store_insn = insn;
2454 if (! loop_info->has_multiple_exit_targets
2455 && GET_CODE (insn) == JUMP_INSN
2456 && GET_CODE (PATTERN (insn)) == SET
2457 && SET_DEST (PATTERN (insn)) == pc_rtx)
2459 if (GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
2461 label1 = XEXP (SET_SRC (PATTERN (insn)), 1);
2462 label2 = XEXP (SET_SRC (PATTERN (insn)), 2);
2466 label1 = SET_SRC (PATTERN (insn));
2470 if (label1 && label1 != pc_rtx)
2472 if (GET_CODE (label1) != LABEL_REF)
2474 /* Something tricky. */
2475 loop_info->has_multiple_exit_targets = 1;
2478 else if (XEXP (label1, 0) != exit_target
2479 && LABEL_OUTSIDE_LOOP_P (label1))
2481 /* A jump outside the current loop. */
2482 loop_info->has_multiple_exit_targets = 1;
2492 else if (GET_CODE (insn) == RETURN)
2493 loop_info->has_multiple_exit_targets = 1;
2496 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2497 if (/* We can't tell what MEMs are aliased by what. */
2498 ! unknown_address_altered
2499 /* An exception thrown by a called function might land us
2501 && ! loop_info->has_call
2502 /* We don't want loads for MEMs moved to a location before the
2503 one at which their stack memory becomes allocated. (Note
2504 that this is not a problem for malloc, etc., since those
2505 require actual function calls. */
2506 && ! current_function_calls_alloca
2507 /* There are ways to leave the loop other than falling off the
2509 && ! loop_info->has_multiple_exit_targets)
2510 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2511 insn = NEXT_INSN (insn))
2512 for_each_rtx (&insn, insert_loop_mem, 0);
2515 /* LOOP->CONT_DOMINATOR is now the last label between the loop start
2516 and the continue note that is a the destination of a (cond)jump after
2517 the continue note. If there is any (cond)jump between the loop start
2518 and what we have so far as LOOP->CONT_DOMINATOR that has a
2519 target between LOOP->DOMINATOR and the continue note, move
2520 LOOP->CONT_DOMINATOR forward to that label; if a jump's
2521 destination cannot be determined, clear LOOP->CONT_DOMINATOR. */
2524 verify_dominator (loop)
2529 if (! loop->cont_dominator)
2530 /* This can happen for an empty loop, e.g. in
2531 gcc.c-torture/compile/920410-2.c */
2533 if (loop->cont_dominator == const0_rtx)
2535 loop->cont_dominator = 0;
2538 for (insn = loop->start; insn != loop->cont_dominator;
2539 insn = NEXT_INSN (insn))
2541 if (GET_CODE (insn) == JUMP_INSN
2542 && GET_CODE (PATTERN (insn)) != RETURN)
2544 rtx label = JUMP_LABEL (insn);
2547 /* If it is not a jump we can easily understand or for
2548 which we do not have jump target information in the JUMP_LABEL
2549 field (consider ADDR_VEC and ADDR_DIFF_VEC insns), then clear
2550 LOOP->CONT_DOMINATOR. */
2551 if ((! condjump_p (insn)
2552 && ! condjump_in_parallel_p (insn))
2553 || label == NULL_RTX)
2555 loop->cont_dominator = NULL_RTX;
2559 label_luid = INSN_LUID (label);
2560 if (label_luid < INSN_LUID (loop->cont)
2562 > INSN_LUID (loop->cont)))
2563 loop->cont_dominator = label;
2568 /* Scan the function looking for loops. Record the start and end of each loop.
2569 Also mark as invalid loops any loops that contain a setjmp or are branched
2570 to from outside the loop. */
2573 find_and_verify_loops (f, loops)
2575 struct loops *loops;
2580 struct loop *current_loop;
2581 struct loop *next_loop;
2584 num_loops = loops->num;
2586 compute_luids (f, NULL_RTX, 0);
2588 /* If there are jumps to undefined labels,
2589 treat them as jumps out of any/all loops.
2590 This also avoids writing past end of tables when there are no loops. */
2593 loops->array = (struct loop *)
2594 xmalloc (num_loops * sizeof (struct loop));
2595 bzero ((char *)loops->array, num_loops * sizeof (struct loop));
2597 /* Find boundaries of loops, mark which loops are contained within
2598 loops, and invalidate loops that have setjmp. */
2601 current_loop = NULL;
2602 for (insn = f; insn; insn = NEXT_INSN (insn))
2604 if (GET_CODE (insn) == NOTE)
2605 switch (NOTE_LINE_NUMBER (insn))
2607 case NOTE_INSN_LOOP_BEG:
2608 next_loop = loops->array + num_loops;
2609 next_loop->num = num_loops;
2611 next_loop->start = insn;
2612 next_loop->outer = current_loop;
2613 current_loop = next_loop;
2616 case NOTE_INSN_SETJMP:
2617 /* In this case, we must invalidate our current loop and any
2619 for (loop = current_loop; loop; loop = loop->outer)
2622 if (loop_dump_stream)
2623 fprintf (loop_dump_stream,
2624 "\nLoop at %d ignored due to setjmp.\n",
2625 INSN_UID (loop->start));
2629 case NOTE_INSN_LOOP_CONT:
2630 current_loop->cont = insn;
2632 case NOTE_INSN_LOOP_END:
2636 current_loop->end = insn;
2637 verify_dominator (current_loop);
2638 current_loop = current_loop->outer;
2644 /* If for any loop, this is a jump insn between the NOTE_INSN_LOOP_CONT
2645 and NOTE_INSN_LOOP_END notes, update loop->dominator. */
2646 else if (GET_CODE (insn) == JUMP_INSN
2647 && GET_CODE (PATTERN (insn)) != RETURN
2650 rtx label = JUMP_LABEL (insn);
2652 if (! condjump_p (insn) && ! condjump_in_parallel_p (insn))
2655 loop = current_loop;
2658 /* First see if we care about this loop. */
2659 if (loop->cont && loop->cont_dominator != const0_rtx)
2661 /* If the jump destination is not known, invalidate
2662 loop->const_dominator. */
2664 loop->cont_dominator = const0_rtx;
2666 /* Check if the destination is between loop start and
2668 if ((INSN_LUID (label)
2669 < INSN_LUID (loop->cont))
2670 && (INSN_LUID (label)
2671 > INSN_LUID (loop->start))
2672 /* And if there is no later destination already
2674 && (! loop->cont_dominator
2675 || (INSN_LUID (label)
2676 > INSN_LUID (loop->cont_dominator))))
2677 loop->cont_dominator = label;
2684 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2685 enclosing loop, but this doesn't matter. */
2686 uid_loop[INSN_UID (insn)] = current_loop;
2689 /* Any loop containing a label used in an initializer must be invalidated,
2690 because it can be jumped into from anywhere. */
2692 for (label = forced_labels; label; label = XEXP (label, 1))
2694 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2695 loop; loop = loop->outer)
2699 /* Any loop containing a label used for an exception handler must be
2700 invalidated, because it can be jumped into from anywhere. */
2702 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2704 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2705 loop; loop = loop->outer)
2709 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2710 loop that it is not contained within, that loop is marked invalid.
2711 If any INSN or CALL_INSN uses a label's address, then the loop containing
2712 that label is marked invalid, because it could be jumped into from
2715 Also look for blocks of code ending in an unconditional branch that
2716 exits the loop. If such a block is surrounded by a conditional
2717 branch around the block, move the block elsewhere (see below) and
2718 invert the jump to point to the code block. This may eliminate a
2719 label in our loop and will simplify processing by both us and a
2720 possible second cse pass. */
2722 for (insn = f; insn; insn = NEXT_INSN (insn))
2723 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2725 struct loop *this_loop = uid_loop[INSN_UID (insn)];
2727 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2729 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2732 for (loop = uid_loop[INSN_UID (XEXP (note, 0))];
2733 loop; loop = loop->outer)
2738 if (GET_CODE (insn) != JUMP_INSN)
2741 mark_loop_jump (PATTERN (insn), this_loop);
2743 /* See if this is an unconditional branch outside the loop. */
2745 && (GET_CODE (PATTERN (insn)) == RETURN
2746 || (simplejump_p (insn)
2747 && (uid_loop[INSN_UID (JUMP_LABEL (insn))]
2749 && get_max_uid () < max_uid_for_loop)
2752 rtx our_next = next_real_insn (insn);
2753 rtx last_insn_to_move = NEXT_INSN (insn);
2754 struct loop *dest_loop;
2755 struct loop *outer_loop = NULL;
2757 /* Go backwards until we reach the start of the loop, a label,
2759 for (p = PREV_INSN (insn);
2760 GET_CODE (p) != CODE_LABEL
2761 && ! (GET_CODE (p) == NOTE
2762 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2763 && GET_CODE (p) != JUMP_INSN;
2767 /* Check for the case where we have a jump to an inner nested
2768 loop, and do not perform the optimization in that case. */
2770 if (JUMP_LABEL (insn))
2772 dest_loop = uid_loop[INSN_UID (JUMP_LABEL (insn))];
2775 for (outer_loop = dest_loop; outer_loop;
2776 outer_loop = outer_loop->outer)
2777 if (outer_loop == this_loop)
2782 /* Make sure that the target of P is within the current loop. */
2784 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2785 && uid_loop[INSN_UID (JUMP_LABEL (p))] != this_loop)
2786 outer_loop = this_loop;
2788 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2789 we have a block of code to try to move.
2791 We look backward and then forward from the target of INSN
2792 to find a BARRIER at the same loop depth as the target.
2793 If we find such a BARRIER, we make a new label for the start
2794 of the block, invert the jump in P and point it to that label,
2795 and move the block of code to the spot we found. */
2798 && GET_CODE (p) == JUMP_INSN
2799 && JUMP_LABEL (p) != 0
2800 /* Just ignore jumps to labels that were never emitted.
2801 These always indicate compilation errors. */
2802 && INSN_UID (JUMP_LABEL (p)) != 0
2804 && ! simplejump_p (p)
2805 && next_real_insn (JUMP_LABEL (p)) == our_next
2806 /* If it's not safe to move the sequence, then we
2808 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2809 &last_insn_to_move))
2812 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2813 struct loop *target_loop = uid_loop[INSN_UID (target)];
2816 for (loc = target; loc; loc = PREV_INSN (loc))
2817 if (GET_CODE (loc) == BARRIER
2818 /* Don't move things inside a tablejump. */
2819 && ((loc2 = next_nonnote_insn (loc)) == 0
2820 || GET_CODE (loc2) != CODE_LABEL
2821 || (loc2 = next_nonnote_insn (loc2)) == 0
2822 || GET_CODE (loc2) != JUMP_INSN
2823 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2824 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2825 && uid_loop[INSN_UID (loc)] == target_loop)
2829 for (loc = target; loc; loc = NEXT_INSN (loc))
2830 if (GET_CODE (loc) == BARRIER
2831 /* Don't move things inside a tablejump. */
2832 && ((loc2 = next_nonnote_insn (loc)) == 0
2833 || GET_CODE (loc2) != CODE_LABEL
2834 || (loc2 = next_nonnote_insn (loc2)) == 0
2835 || GET_CODE (loc2) != JUMP_INSN
2836 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2837 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2838 && uid_loop[INSN_UID (loc)] == target_loop)
2843 rtx cond_label = JUMP_LABEL (p);
2844 rtx new_label = get_label_after (p);
2846 /* Ensure our label doesn't go away. */
2847 LABEL_NUSES (cond_label)++;
2849 /* Verify that uid_loop is large enough and that
2851 if (invert_jump (p, new_label))
2855 /* If no suitable BARRIER was found, create a suitable
2856 one before TARGET. Since TARGET is a fall through
2857 path, we'll need to insert an jump around our block
2858 and a add a BARRIER before TARGET.
2860 This creates an extra unconditional jump outside
2861 the loop. However, the benefits of removing rarely
2862 executed instructions from inside the loop usually
2863 outweighs the cost of the extra unconditional jump
2864 outside the loop. */
2869 temp = gen_jump (JUMP_LABEL (insn));
2870 temp = emit_jump_insn_before (temp, target);
2871 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2872 LABEL_NUSES (JUMP_LABEL (insn))++;
2873 loc = emit_barrier_before (target);
2876 /* Include the BARRIER after INSN and copy the
2878 new_label = squeeze_notes (new_label,
2880 reorder_insns (new_label, last_insn_to_move, loc);
2882 /* All those insns are now in TARGET_LOOP. */
2884 q != NEXT_INSN (last_insn_to_move);
2886 uid_loop[INSN_UID (q)] = target_loop;
2888 /* The label jumped to by INSN is no longer a loop exit.
2889 Unless INSN does not have a label (e.g., it is a
2890 RETURN insn), search loop->exit_labels to find
2891 its label_ref, and remove it. Also turn off
2892 LABEL_OUTSIDE_LOOP_P bit. */
2893 if (JUMP_LABEL (insn))
2896 r = this_loop->exit_labels;
2897 r; q = r, r = LABEL_NEXTREF (r))
2898 if (XEXP (r, 0) == JUMP_LABEL (insn))
2900 LABEL_OUTSIDE_LOOP_P (r) = 0;
2902 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2904 this_loop->exit_labels = LABEL_NEXTREF (r);
2908 for (loop = this_loop; loop && loop != target_loop;
2912 /* If we didn't find it, then something is
2918 /* P is now a jump outside the loop, so it must be put
2919 in loop->exit_labels, and marked as such.
2920 The easiest way to do this is to just call
2921 mark_loop_jump again for P. */
2922 mark_loop_jump (PATTERN (p), this_loop);
2924 /* If INSN now jumps to the insn after it,
2926 if (JUMP_LABEL (insn) != 0
2927 && (next_real_insn (JUMP_LABEL (insn))
2928 == next_real_insn (insn)))
2932 /* Continue the loop after where the conditional
2933 branch used to jump, since the only branch insn
2934 in the block (if it still remains) is an inter-loop
2935 branch and hence needs no processing. */
2936 insn = NEXT_INSN (cond_label);
2938 if (--LABEL_NUSES (cond_label) == 0)
2939 delete_insn (cond_label);
2941 /* This loop will be continued with NEXT_INSN (insn). */
2942 insn = PREV_INSN (insn);
2949 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2950 loops it is contained in, mark the target loop invalid.
2952 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2955 mark_loop_jump (x, loop)
2959 struct loop *dest_loop;
2960 struct loop *outer_loop;
2963 switch (GET_CODE (x))
2976 /* There could be a label reference in here. */
2977 mark_loop_jump (XEXP (x, 0), loop);
2983 mark_loop_jump (XEXP (x, 0), loop);
2984 mark_loop_jump (XEXP (x, 1), loop);
2988 /* This may refer to a LABEL_REF or SYMBOL_REF. */
2989 mark_loop_jump (XEXP (x, 1), loop);
2994 mark_loop_jump (XEXP (x, 0), loop);
2998 dest_loop = uid_loop[INSN_UID (XEXP (x, 0))];
3000 /* Link together all labels that branch outside the loop. This
3001 is used by final_[bg]iv_value and the loop unrolling code. Also
3002 mark this LABEL_REF so we know that this branch should predict
3005 /* A check to make sure the label is not in an inner nested loop,
3006 since this does not count as a loop exit. */
3009 for (outer_loop = dest_loop; outer_loop;
3010 outer_loop = outer_loop->outer)
3011 if (outer_loop == loop)
3017 if (loop && ! outer_loop)
3019 LABEL_OUTSIDE_LOOP_P (x) = 1;
3020 LABEL_NEXTREF (x) = loop->exit_labels;
3021 loop->exit_labels = x;
3023 for (outer_loop = loop;
3024 outer_loop && outer_loop != dest_loop;
3025 outer_loop = outer_loop->outer)
3026 outer_loop->exit_count++;
3029 /* If this is inside a loop, but not in the current loop or one enclosed
3030 by it, it invalidates at least one loop. */
3035 /* We must invalidate every nested loop containing the target of this
3036 label, except those that also contain the jump insn. */
3038 for (; dest_loop; dest_loop = dest_loop->outer)
3040 /* Stop when we reach a loop that also contains the jump insn. */
3041 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3042 if (dest_loop == outer_loop)
3045 /* If we get here, we know we need to invalidate a loop. */
3046 if (loop_dump_stream && ! dest_loop->invalid)
3047 fprintf (loop_dump_stream,
3048 "\nLoop at %d ignored due to multiple entry points.\n",
3049 INSN_UID (dest_loop->start));
3051 dest_loop->invalid = 1;
3056 /* If this is not setting pc, ignore. */
3057 if (SET_DEST (x) == pc_rtx)
3058 mark_loop_jump (SET_SRC (x), loop);
3062 mark_loop_jump (XEXP (x, 1), loop);
3063 mark_loop_jump (XEXP (x, 2), loop);
3068 for (i = 0; i < XVECLEN (x, 0); i++)
3069 mark_loop_jump (XVECEXP (x, 0, i), loop);
3073 for (i = 0; i < XVECLEN (x, 1); i++)
3074 mark_loop_jump (XVECEXP (x, 1, i), loop);
3078 /* Strictly speaking this is not a jump into the loop, only a possible
3079 jump out of the loop. However, we have no way to link the destination
3080 of this jump onto the list of exit labels. To be safe we mark this
3081 loop and any containing loops as invalid. */
3084 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3086 if (loop_dump_stream && ! outer_loop->invalid)
3087 fprintf (loop_dump_stream,
3088 "\nLoop at %d ignored due to unknown exit jump.\n",
3089 INSN_UID (outer_loop->start));
3090 outer_loop->invalid = 1;
3097 /* Return nonzero if there is a label in the range from
3098 insn INSN to and including the insn whose luid is END
3099 INSN must have an assigned luid (i.e., it must not have
3100 been previously created by loop.c). */
3103 labels_in_range_p (insn, end)
3107 while (insn && INSN_LUID (insn) <= end)
3109 if (GET_CODE (insn) == CODE_LABEL)
3111 insn = NEXT_INSN (insn);
3117 /* Record that a memory reference X is being set. */
3120 note_addr_stored (x, y, data)
3122 rtx y ATTRIBUTE_UNUSED;
3123 void *data ATTRIBUTE_UNUSED;
3125 if (x == 0 || GET_CODE (x) != MEM)
3128 /* Count number of memory writes.
3129 This affects heuristics in strength_reduce. */
3132 /* BLKmode MEM means all memory is clobbered. */
3133 if (GET_MODE (x) == BLKmode)
3135 if (RTX_UNCHANGING_P (x))
3136 unknown_constant_address_altered = 1;
3138 unknown_address_altered = 1;
3143 loop_store_mems = gen_rtx_EXPR_LIST (VOIDmode, x, loop_store_mems);
3146 /* X is a value modified by an INSN that references a biv inside a loop
3147 exit test (ie, X is somehow related to the value of the biv). If X
3148 is a pseudo that is used more than once, then the biv is (effectively)
3149 used more than once. DATA is really an `int *', and is set if the
3150 biv is used more than once. */
3153 note_set_pseudo_multiple_uses (x, y, data)
3155 rtx y ATTRIBUTE_UNUSED;
3161 while (GET_CODE (x) == STRICT_LOW_PART
3162 || GET_CODE (x) == SIGN_EXTRACT
3163 || GET_CODE (x) == ZERO_EXTRACT
3164 || GET_CODE (x) == SUBREG)
3167 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
3170 /* If we do not have usage information, or if we know the register
3171 is used more than once, note that fact for check_dbra_loop. */
3172 if (REGNO (x) >= max_reg_before_loop
3173 || ! VARRAY_RTX (reg_single_usage, REGNO (x))
3174 || VARRAY_RTX (reg_single_usage, REGNO (x)) == const0_rtx)
3175 *((int *) data) = 1;
3178 /* Return nonzero if the rtx X is invariant over the current loop.
3180 The value is 2 if we refer to something only conditionally invariant.
3182 If `unknown_address_altered' is nonzero, no memory ref is invariant.
3183 Otherwise, a memory ref is invariant if it does not conflict with
3184 anything stored in `loop_store_mems'. */
3191 register enum rtx_code code;
3192 register const char *fmt;
3193 int conditional = 0;
3198 code = GET_CODE (x);
3208 /* A LABEL_REF is normally invariant, however, if we are unrolling
3209 loops, and this label is inside the loop, then it isn't invariant.
3210 This is because each unrolled copy of the loop body will have
3211 a copy of this label. If this was invariant, then an insn loading
3212 the address of this label into a register might get moved outside
3213 the loop, and then each loop body would end up using the same label.
3215 We don't know the loop bounds here though, so just fail for all
3217 if (flag_unroll_loops)
3224 case UNSPEC_VOLATILE:
3228 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3229 since the reg might be set by initialization within the loop. */
3231 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3232 || x == arg_pointer_rtx)
3233 && ! current_function_has_nonlocal_goto)
3236 if (current_loop_info->has_call
3237 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3240 if (VARRAY_INT (set_in_loop, REGNO (x)) < 0)
3243 return VARRAY_INT (set_in_loop, REGNO (x)) == 0;
3246 /* Volatile memory references must be rejected. Do this before
3247 checking for read-only items, so that volatile read-only items
3248 will be rejected also. */
3249 if (MEM_VOLATILE_P (x))
3252 /* If we had a subroutine call, any location in memory could
3253 have been clobbered. We used to test here for volatile and
3254 readonly, but true_dependence knows how to do that better
3256 if (RTX_UNCHANGING_P (x)
3257 ? unknown_constant_address_altered : unknown_address_altered)
3260 /* See if there is any dependence between a store and this load. */
3261 mem_list_entry = loop_store_mems;
3262 while (mem_list_entry)
3264 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3268 mem_list_entry = XEXP (mem_list_entry, 1);
3271 /* It's not invalidated by a store in memory
3272 but we must still verify the address is invariant. */
3276 /* Don't mess with insns declared volatile. */
3277 if (MEM_VOLATILE_P (x))
3285 fmt = GET_RTX_FORMAT (code);
3286 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3290 int tem = invariant_p (XEXP (x, i));
3296 else if (fmt[i] == 'E')
3299 for (j = 0; j < XVECLEN (x, i); j++)
3301 int tem = invariant_p (XVECEXP (x, i, j));
3311 return 1 + conditional;
3315 /* Return nonzero if all the insns in the loop that set REG
3316 are INSN and the immediately following insns,
3317 and if each of those insns sets REG in an invariant way
3318 (not counting uses of REG in them).
3320 The value is 2 if some of these insns are only conditionally invariant.
3322 We assume that INSN itself is the first set of REG
3323 and that its source is invariant. */
3326 consec_sets_invariant_p (reg, n_sets, insn)
3330 register rtx p = insn;
3331 register int regno = REGNO (reg);
3333 /* Number of sets we have to insist on finding after INSN. */
3334 int count = n_sets - 1;
3335 int old = VARRAY_INT (set_in_loop, regno);
3339 /* If N_SETS hit the limit, we can't rely on its value. */
3343 VARRAY_INT (set_in_loop, regno) = 0;
3347 register enum rtx_code code;
3351 code = GET_CODE (p);
3353 /* If library call, skip to end of it. */
3354 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3359 && (set = single_set (p))
3360 && GET_CODE (SET_DEST (set)) == REG
3361 && REGNO (SET_DEST (set)) == regno)
3363 this = invariant_p (SET_SRC (set));
3366 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3368 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3369 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3371 this = (CONSTANT_P (XEXP (temp, 0))
3372 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3373 && invariant_p (XEXP (temp, 0))));
3380 else if (code != NOTE)
3382 VARRAY_INT (set_in_loop, regno) = old;
3387 VARRAY_INT (set_in_loop, regno) = old;
3388 /* If invariant_p ever returned 2, we return 2. */
3389 return 1 + (value & 2);
3393 /* I don't think this condition is sufficient to allow INSN
3394 to be moved, so we no longer test it. */
3396 /* Return 1 if all insns in the basic block of INSN and following INSN
3397 that set REG are invariant according to TABLE. */
3400 all_sets_invariant_p (reg, insn, table)
3404 register rtx p = insn;
3405 register int regno = REGNO (reg);
3409 register enum rtx_code code;
3411 code = GET_CODE (p);
3412 if (code == CODE_LABEL || code == JUMP_INSN)
3414 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3415 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3416 && REGNO (SET_DEST (PATTERN (p))) == regno)
3418 if (!invariant_p (SET_SRC (PATTERN (p)), table))
3425 /* Look at all uses (not sets) of registers in X. For each, if it is
3426 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3427 a different insn, set USAGE[REGNO] to const0_rtx. */
3430 find_single_use_in_loop (insn, x, usage)
3435 enum rtx_code code = GET_CODE (x);
3436 const char *fmt = GET_RTX_FORMAT (code);
3440 VARRAY_RTX (usage, REGNO (x))
3441 = (VARRAY_RTX (usage, REGNO (x)) != 0
3442 && VARRAY_RTX (usage, REGNO (x)) != insn)
3443 ? const0_rtx : insn;
3445 else if (code == SET)
3447 /* Don't count SET_DEST if it is a REG; otherwise count things
3448 in SET_DEST because if a register is partially modified, it won't
3449 show up as a potential movable so we don't care how USAGE is set
3451 if (GET_CODE (SET_DEST (x)) != REG)
3452 find_single_use_in_loop (insn, SET_DEST (x), usage);
3453 find_single_use_in_loop (insn, SET_SRC (x), usage);
3456 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3458 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3459 find_single_use_in_loop (insn, XEXP (x, i), usage);
3460 else if (fmt[i] == 'E')
3461 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3462 find_single_use_in_loop (insn, XVECEXP (x, i, j), usage);
3466 /* Count and record any set in X which is contained in INSN. Update
3467 MAY_NOT_MOVE and LAST_SET for any register set in X. */
3470 count_one_set (insn, x, may_not_move, last_set)
3472 varray_type may_not_move;
3475 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3476 /* Don't move a reg that has an explicit clobber.
3477 It's not worth the pain to try to do it correctly. */
3478 VARRAY_CHAR (may_not_move, REGNO (XEXP (x, 0))) = 1;
3480 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3482 rtx dest = SET_DEST (x);
3483 while (GET_CODE (dest) == SUBREG
3484 || GET_CODE (dest) == ZERO_EXTRACT
3485 || GET_CODE (dest) == SIGN_EXTRACT
3486 || GET_CODE (dest) == STRICT_LOW_PART)
3487 dest = XEXP (dest, 0);
3488 if (GET_CODE (dest) == REG)
3490 register int regno = REGNO (dest);
3491 /* If this is the first setting of this reg
3492 in current basic block, and it was set before,
3493 it must be set in two basic blocks, so it cannot
3494 be moved out of the loop. */
3495 if (VARRAY_INT (set_in_loop, regno) > 0
3496 && last_set[regno] == 0)
3497 VARRAY_CHAR (may_not_move, regno) = 1;
3498 /* If this is not first setting in current basic block,
3499 see if reg was used in between previous one and this.
3500 If so, neither one can be moved. */
3501 if (last_set[regno] != 0
3502 && reg_used_between_p (dest, last_set[regno], insn))
3503 VARRAY_CHAR (may_not_move, regno) = 1;
3504 if (VARRAY_INT (set_in_loop, regno) < 127)
3505 ++VARRAY_INT (set_in_loop, regno);
3506 last_set[regno] = insn;
3511 /* Increment SET_IN_LOOP at the index of each register
3512 that is modified by an insn between FROM and TO.
3513 If the value of an element of SET_IN_LOOP becomes 127 or more,
3514 stop incrementing it, to avoid overflow.
3516 Store in SINGLE_USAGE[I] the single insn in which register I is
3517 used, if it is only used once. Otherwise, it is set to 0 (for no
3518 uses) or const0_rtx for more than one use. This parameter may be zero,
3519 in which case this processing is not done.
3521 Store in *COUNT_PTR the number of actual instruction
3522 in the loop. We use this to decide what is worth moving out. */
3524 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3525 In that case, it is the insn that last set reg n. */
3528 count_loop_regs_set (from, to, may_not_move, single_usage, count_ptr, nregs)
3529 register rtx from, to;
3530 varray_type may_not_move;
3531 varray_type single_usage;
3535 register rtx *last_set = (rtx *) xcalloc (nregs, sizeof (rtx));
3537 register int count = 0;
3539 for (insn = from; insn != to; insn = NEXT_INSN (insn))
3541 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
3545 /* Record registers that have exactly one use. */
3546 find_single_use_in_loop (insn, PATTERN (insn), single_usage);
3548 /* Include uses in REG_EQUAL notes. */
3549 if (REG_NOTES (insn))
3550 find_single_use_in_loop (insn, REG_NOTES (insn), single_usage);
3552 if (GET_CODE (PATTERN (insn)) == SET
3553 || GET_CODE (PATTERN (insn)) == CLOBBER)
3554 count_one_set (insn, PATTERN (insn), may_not_move, last_set);
3555 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3558 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
3559 count_one_set (insn, XVECEXP (PATTERN (insn), 0, i),
3560 may_not_move, last_set);
3564 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3565 bzero ((char *) last_set, nregs * sizeof (rtx));
3573 /* Given a loop that is bounded by LOOP_START and LOOP_END
3574 and that is entered at LOOP_SCAN_START,
3575 return 1 if the register set in SET contained in insn INSN is used by
3576 any insn that precedes INSN in cyclic order starting
3577 from the loop entry point.
3579 We don't want to use INSN_LUID here because if we restrict INSN to those
3580 that have a valid INSN_LUID, it means we cannot move an invariant out
3581 from an inner loop past two loops. */
3584 loop_reg_used_before_p (loop, set, insn)
3585 const struct loop *loop;
3588 rtx reg = SET_DEST (set);
3591 /* Scan forward checking for register usage. If we hit INSN, we
3592 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3593 for (p = loop->scan_start; p != insn; p = NEXT_INSN (p))
3595 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
3596 && reg_overlap_mentioned_p (reg, PATTERN (p)))
3606 /* A "basic induction variable" or biv is a pseudo reg that is set
3607 (within this loop) only by incrementing or decrementing it. */
3608 /* A "general induction variable" or giv is a pseudo reg whose
3609 value is a linear function of a biv. */
3611 /* Bivs are recognized by `basic_induction_var';
3612 Givs by `general_induction_var'. */
3614 /* Indexed by register number, indicates whether or not register is an
3615 induction variable, and if so what type. */
3617 varray_type reg_iv_type;
3619 /* Indexed by register number, contains pointer to `struct induction'
3620 if register is an induction variable. This holds general info for
3621 all induction variables. */
3623 varray_type reg_iv_info;
3625 /* Indexed by register number, contains pointer to `struct iv_class'
3626 if register is a basic induction variable. This holds info describing
3627 the class (a related group) of induction variables that the biv belongs
3630 struct iv_class **reg_biv_class;
3632 /* The head of a list which links together (via the next field)
3633 every iv class for the current loop. */
3635 struct iv_class *loop_iv_list;
3637 /* Givs made from biv increments are always splittable for loop unrolling.
3638 Since there is no regscan info for them, we have to keep track of them
3640 int first_increment_giv, last_increment_giv;
3642 /* Communication with routines called via `note_stores'. */
3644 static rtx note_insn;
3646 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3648 static rtx addr_placeholder;
3650 /* ??? Unfinished optimizations, and possible future optimizations,
3651 for the strength reduction code. */
3653 /* ??? The interaction of biv elimination, and recognition of 'constant'
3654 bivs, may cause problems. */
3656 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3657 performance problems.
3659 Perhaps don't eliminate things that can be combined with an addressing
3660 mode. Find all givs that have the same biv, mult_val, and add_val;
3661 then for each giv, check to see if its only use dies in a following
3662 memory address. If so, generate a new memory address and check to see
3663 if it is valid. If it is valid, then store the modified memory address,
3664 otherwise, mark the giv as not done so that it will get its own iv. */
3666 /* ??? Could try to optimize branches when it is known that a biv is always
3669 /* ??? When replace a biv in a compare insn, we should replace with closest
3670 giv so that an optimized branch can still be recognized by the combiner,
3671 e.g. the VAX acb insn. */
3673 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3674 was rerun in loop_optimize whenever a register was added or moved.
3675 Also, some of the optimizations could be a little less conservative. */
3677 /* Perform strength reduction and induction variable elimination.
3679 Pseudo registers created during this function will be beyond the last
3680 valid index in several tables including n_times_set and regno_last_uid.
3681 This does not cause a problem here, because the added registers cannot be
3682 givs outside of their loop, and hence will never be reconsidered.
3683 But scan_loop must check regnos to make sure they are in bounds.
3685 LOOP_SCAN_START is the first instruction in the loop, as the loop would
3686 actually be executed. END is the NOTE_INSN_LOOP_END. LOOP_TOP is
3687 the first instruction in the loop, as it is layed out in the
3688 instruction stream. LOOP_START is the NOTE_INSN_LOOP_BEG.
3689 LOOP_CONT is the NOTE_INSN_LOOP_CONT. */
3692 strength_reduce (loop, insn_count, unroll_p, bct_p)
3695 int unroll_p, bct_p ATTRIBUTE_UNUSED;
3703 /* This is 1 if current insn is not executed at least once for every loop
3705 int not_every_iteration = 0;
3706 /* This is 1 if current insn may be executed more than once for every
3708 int maybe_multiple = 0;
3709 /* This is 1 if we have past a branch back to the top of the loop
3710 (aka a loop latch). */
3711 int past_loop_latch = 0;
3712 /* Temporary list pointers for traversing loop_iv_list. */
3713 struct iv_class *bl, **backbl;
3714 struct loop_info *loop_info = loop->info;
3715 /* Ratio of extra register life span we can justify
3716 for saving an instruction. More if loop doesn't call subroutines
3717 since in that case saving an insn makes more difference
3718 and more registers are available. */
3719 /* ??? could set this to last value of threshold in move_movables */
3720 int threshold = (loop_info->has_call ? 1 : 2) * (3 + n_non_fixed_regs);
3721 /* Map of pseudo-register replacements. */
3722 rtx *reg_map = NULL;
3726 rtx end_insert_before;
3728 int n_extra_increment;
3729 int unrolled_insn_copies = 0;
3730 rtx loop_start = loop->start;
3731 rtx loop_end = loop->end;
3732 rtx loop_scan_start = loop->scan_start;
3733 rtx loop_top = loop->top;
3734 rtx loop_cont = loop->cont;
3736 /* If loop_scan_start points to the loop exit test, we have to be wary of
3737 subversive use of gotos inside expression statements. */
3738 if (prev_nonnote_insn (loop_scan_start) != prev_nonnote_insn (loop_start))
3739 maybe_multiple = back_branch_in_range_p (loop_scan_start, loop_start, loop_end);
3741 VARRAY_INT_INIT (reg_iv_type, max_reg_before_loop, "reg_iv_type");
3742 VARRAY_GENERIC_PTR_INIT (reg_iv_info, max_reg_before_loop, "reg_iv_info");
3743 reg_biv_class = (struct iv_class **)
3744 xcalloc (max_reg_before_loop, sizeof (struct iv_class *));
3747 addr_placeholder = gen_reg_rtx (Pmode);
3749 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3750 must be put before this insn, so that they will appear in the right
3751 order (i.e. loop order).
3753 If loop_end is the end of the current function, then emit a
3754 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3756 if (NEXT_INSN (loop_end) != 0)
3757 end_insert_before = NEXT_INSN (loop_end);
3759 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop_end);
3761 /* Scan through loop to find all possible bivs. */
3763 for (p = next_insn_in_loop (loop, loop_scan_start);
3765 p = next_insn_in_loop (loop, p))
3767 if (GET_CODE (p) == INSN
3768 && (set = single_set (p))
3769 && GET_CODE (SET_DEST (set)) == REG)
3771 dest_reg = SET_DEST (set);
3772 if (REGNO (dest_reg) < max_reg_before_loop
3773 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
3774 && REG_IV_TYPE (REGNO (dest_reg)) != NOT_BASIC_INDUCT)
3776 int multi_insn_incr = 0;
3778 if (basic_induction_var (SET_SRC (set), GET_MODE (SET_SRC (set)),
3779 dest_reg, p, loop->level,
3780 &inc_val, &mult_val,
3781 &location, &multi_insn_incr))
3783 /* It is a possible basic induction variable.
3784 Create and initialize an induction structure for it. */
3787 = (struct induction *) alloca (sizeof (struct induction));
3789 record_biv (v, p, dest_reg, inc_val, mult_val, location,
3790 not_every_iteration, maybe_multiple,
3792 REG_IV_TYPE (REGNO (dest_reg)) = BASIC_INDUCT;
3794 else if (REGNO (dest_reg) < max_reg_before_loop)
3795 REG_IV_TYPE (REGNO (dest_reg)) = NOT_BASIC_INDUCT;
3799 /* Past CODE_LABEL, we get to insns that may be executed multiple
3800 times. The only way we can be sure that they can't is if every
3801 jump insn between here and the end of the loop either
3802 returns, exits the loop, is a jump to a location that is still
3803 behind the label, or is a jump to the loop start. */
3805 if (GET_CODE (p) == CODE_LABEL)
3813 insn = NEXT_INSN (insn);
3814 if (insn == loop_scan_start)
3816 if (insn == loop_end)
3822 if (insn == loop_scan_start)
3826 if (GET_CODE (insn) == JUMP_INSN
3827 && GET_CODE (PATTERN (insn)) != RETURN
3828 && (! condjump_p (insn)
3829 || (JUMP_LABEL (insn) != 0
3830 && JUMP_LABEL (insn) != loop_scan_start
3831 && ! loop_insn_first_p (p, JUMP_LABEL (insn)))))
3839 /* Past a jump, we get to insns for which we can't count
3840 on whether they will be executed during each iteration. */
3841 /* This code appears twice in strength_reduce. There is also similar
3842 code in scan_loop. */
3843 if (GET_CODE (p) == JUMP_INSN
3844 /* If we enter the loop in the middle, and scan around to the
3845 beginning, don't set not_every_iteration for that.
3846 This can be any kind of jump, since we want to know if insns
3847 will be executed if the loop is executed. */
3848 && ! (JUMP_LABEL (p) == loop_top
3849 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3850 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
3854 /* If this is a jump outside the loop, then it also doesn't
3855 matter. Check to see if the target of this branch is on the
3856 loop->exits_labels list. */
3858 for (label = uid_loop[INSN_UID (loop_start)]->exit_labels;
3860 label = LABEL_NEXTREF (label))
3861 if (XEXP (label, 0) == JUMP_LABEL (p))
3865 not_every_iteration = 1;
3868 else if (GET_CODE (p) == NOTE)
3870 /* At the virtual top of a converted loop, insns are again known to
3871 be executed each iteration: logically, the loop begins here
3872 even though the exit code has been duplicated.
3874 Insns are also again known to be executed each iteration at
3875 the LOOP_CONT note. */
3876 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
3877 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
3879 not_every_iteration = 0;
3880 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3882 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3886 /* Note if we pass a loop latch. If we do, then we can not clear
3887 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
3888 a loop since a jump before the last CODE_LABEL may have started
3889 a new loop iteration.
3891 Note that LOOP_TOP is only set for rotated loops and we need
3892 this check for all loops, so compare against the CODE_LABEL
3893 which immediately follows LOOP_START. */
3894 if (GET_CODE (p) == JUMP_INSN
3895 && JUMP_LABEL (p) == NEXT_INSN (loop_start))
3896 past_loop_latch = 1;
3898 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3899 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3900 or not an insn is known to be executed each iteration of the
3901 loop, whether or not any iterations are known to occur.
3903 Therefore, if we have just passed a label and have no more labels
3904 between here and the test insn of the loop, and we have not passed
3905 a jump to the top of the loop, then we know these insns will be
3906 executed each iteration. */
3908 if (not_every_iteration
3909 && ! past_loop_latch
3910 && GET_CODE (p) == CODE_LABEL
3911 && no_labels_between_p (p, loop_end)
3912 && loop_insn_first_p (p, loop_cont))
3913 not_every_iteration = 0;
3916 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3917 Make a sanity check against n_times_set. */
3918 for (backbl = &loop_iv_list, bl = *backbl; bl; bl = bl->next)
3922 if (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3923 /* Above happens if register modified by subreg, etc. */
3924 /* Make sure it is not recognized as a basic induction var: */
3925 || VARRAY_INT (n_times_set, bl->regno) != bl->biv_count
3926 /* If never incremented, it is invariant that we decided not to
3927 move. So leave it alone. */
3928 || ! bl->incremented)
3930 else if (bl->biv_count > 1)
3932 /* ??? If we have multiple increments for this BIV, and any of
3933 them take multiple insns to perform the increment, drop the
3934 BIV, since the bit below that converts the extra increments
3935 into GIVs can't handle the multiple insn increment. */
3937 struct induction *v;
3938 for (v = bl->biv; v ; v = v->next_iv)
3939 if (v->multi_insn_incr)
3945 if (loop_dump_stream)
3946 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
3948 (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3949 ? "not induction variable"
3950 : (! bl->incremented ? "never incremented"
3953 REG_IV_TYPE (bl->regno) = NOT_BASIC_INDUCT;
3960 if (loop_dump_stream)
3961 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
3965 /* Exit if there are no bivs. */
3968 /* Can still unroll the loop anyways, but indicate that there is no
3969 strength reduction info available. */
3971 unroll_loop (loop, insn_count, end_insert_before, 0);
3976 /* Find initial value for each biv by searching backwards from loop_start,
3977 halting at first label. Also record any test condition. */
3980 for (p = loop_start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
3984 if (GET_CODE (p) == CALL_INSN)
3987 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
3988 || GET_CODE (p) == CALL_INSN)
3989 note_stores (PATTERN (p), record_initial, NULL);
3991 /* Record any test of a biv that branches around the loop if no store
3992 between it and the start of loop. We only care about tests with
3993 constants and registers and only certain of those. */
3994 if (GET_CODE (p) == JUMP_INSN
3995 && JUMP_LABEL (p) != 0
3996 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop_end)
3997 && (test = get_condition_for_loop (p)) != 0
3998 && GET_CODE (XEXP (test, 0)) == REG
3999 && REGNO (XEXP (test, 0)) < max_reg_before_loop
4000 && (bl = reg_biv_class[REGNO (XEXP (test, 0))]) != 0
4001 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop_start)
4002 && bl->init_insn == 0)
4004 /* If an NE test, we have an initial value! */
4005 if (GET_CODE (test) == NE)
4008 bl->init_set = gen_rtx_SET (VOIDmode,
4009 XEXP (test, 0), XEXP (test, 1));
4012 bl->initial_test = test;
4016 /* Look at the each biv and see if we can say anything better about its
4017 initial value from any initializing insns set up above. (This is done
4018 in two passes to avoid missing SETs in a PARALLEL.) */
4019 for (backbl = &loop_iv_list; (bl = *backbl); backbl = &bl->next)
4024 if (! bl->init_insn)
4027 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
4028 is a constant, use the value of that. */
4029 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
4030 && CONSTANT_P (XEXP (note, 0)))
4031 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
4032 && CONSTANT_P (XEXP (note, 0))))
4033 src = XEXP (note, 0);
4035 src = SET_SRC (bl->init_set);
4037 if (loop_dump_stream)
4038 fprintf (loop_dump_stream,
4039 "Biv %d initialized at insn %d: initial value ",
4040 bl->regno, INSN_UID (bl->init_insn));
4042 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
4043 || GET_MODE (src) == VOIDmode)
4044 && valid_initial_value_p (src, bl->init_insn, call_seen, loop_start))
4046 bl->initial_value = src;
4048 if (loop_dump_stream)
4050 if (GET_CODE (src) == CONST_INT)
4052 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (src));
4053 fputc ('\n', loop_dump_stream);
4057 print_rtl (loop_dump_stream, src);
4058 fprintf (loop_dump_stream, "\n");
4064 struct iv_class *bl2 = 0;
4065 rtx increment = NULL_RTX;
4067 /* Biv initial value is not a simple move. If it is the sum of
4068 another biv and a constant, check if both bivs are incremented
4069 in lockstep. Then we are actually looking at a giv.
4070 For simplicity, we only handle the case where there is but a
4071 single increment, and the register is not used elsewhere. */
4072 if (bl->biv_count == 1
4073 && bl->regno < max_reg_before_loop
4074 && uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4075 && GET_CODE (src) == PLUS
4076 && GET_CODE (XEXP (src, 0)) == REG
4077 && CONSTANT_P (XEXP (src, 1))
4078 && ((increment = biv_total_increment (bl, loop_start, loop_end))
4081 int regno = REGNO (XEXP (src, 0));
4083 for (bl2 = loop_iv_list; bl2; bl2 = bl2->next)
4084 if (bl2->regno == regno)
4088 /* Now, can we transform this biv into a giv? */
4090 && bl2->biv_count == 1
4091 && rtx_equal_p (increment,
4092 biv_total_increment (bl2, loop_start, loop_end))
4093 /* init_insn is only set to insns that are before loop_start
4094 without any intervening labels. */
4095 && ! reg_set_between_p (bl2->biv->src_reg,
4096 PREV_INSN (bl->init_insn), loop_start)
4097 /* The register from BL2 must be set before the register from
4098 BL is set, or we must be able to move the latter set after
4099 the former set. Currently there can't be any labels
4100 in-between when biv_total_increment returns nonzero both times
4101 but we test it here in case some day some real cfg analysis
4102 gets used to set always_computable. */
4103 && (loop_insn_first_p (bl2->biv->insn, bl->biv->insn)
4104 ? no_labels_between_p (bl2->biv->insn, bl->biv->insn)
4105 : (! reg_used_between_p (bl->biv->src_reg, bl->biv->insn,
4107 && no_jumps_between_p (bl->biv->insn, bl2->biv->insn)))
4108 && validate_change (bl->biv->insn,
4109 &SET_SRC (single_set (bl->biv->insn)),
4112 rtx dominator = uid_loop[INSN_UID (loop_start)]->cont_dominator;
4113 rtx giv = bl->biv->src_reg;
4114 rtx giv_insn = bl->biv->insn;
4115 rtx after_giv = NEXT_INSN (giv_insn);
4117 if (loop_dump_stream)
4118 fprintf (loop_dump_stream, "is giv of biv %d\n", bl2->regno);
4119 /* Let this giv be discovered by the generic code. */
4120 REG_IV_TYPE (bl->regno) = UNKNOWN_INDUCT;
4121 reg_biv_class[bl->regno] = (struct iv_class *) NULL_PTR;
4122 /* We can get better optimization if we can move the giv setting
4123 before the first giv use. */
4125 && ! loop_insn_first_p (dominator, loop_scan_start)
4126 && ! reg_set_between_p (bl2->biv->src_reg, loop_start,
4128 && ! reg_used_between_p (giv, loop_start, dominator)
4129 && ! reg_used_between_p (giv, giv_insn, loop_end))
4134 for (next = NEXT_INSN (dominator); ; next = NEXT_INSN (next))
4136 if ((GET_RTX_CLASS (GET_CODE (next)) == 'i'
4137 && (reg_mentioned_p (giv, PATTERN (next))
4138 || reg_set_p (bl2->biv->src_reg, next)))
4139 || GET_CODE (next) == JUMP_INSN)
4142 if (GET_RTX_CLASS (GET_CODE (next)) != 'i'
4143 || ! sets_cc0_p (PATTERN (next)))
4147 if (loop_dump_stream)
4148 fprintf (loop_dump_stream, "move after insn %d\n",
4149 INSN_UID (dominator));
4150 /* Avoid problems with luids by actually moving the insn
4151 and adjusting all luids in the range. */
4152 reorder_insns (giv_insn, giv_insn, dominator);
4153 for (p = dominator; INSN_UID (p) >= max_uid_for_loop; )
4155 compute_luids (giv_insn, after_giv, INSN_LUID (p));
4156 /* If the only purpose of the init insn is to initialize
4157 this giv, delete it. */
4158 if (single_set (bl->init_insn)
4159 && ! reg_used_between_p (giv, bl->init_insn, loop_start))
4160 delete_insn (bl->init_insn);
4162 else if (! loop_insn_first_p (bl2->biv->insn, bl->biv->insn))
4164 rtx p = PREV_INSN (giv_insn);
4165 while (INSN_UID (p) >= max_uid_for_loop)
4167 reorder_insns (giv_insn, giv_insn, bl2->biv->insn);
4168 compute_luids (after_giv, NEXT_INSN (giv_insn),
4171 /* Remove this biv from the chain. */
4174 /* We move the following giv from *bl->next into *bl.
4175 We have to update reg_biv_class for that moved biv
4176 to point to its new address. */
4178 reg_biv_class[bl->regno] = bl;
4187 /* If we can't make it a giv,
4188 let biv keep initial value of "itself". */
4189 else if (loop_dump_stream)
4190 fprintf (loop_dump_stream, "is complex\n");
4194 /* If a biv is unconditionally incremented several times in a row, convert
4195 all but the last increment into a giv. */
4197 /* Get an upper bound for the number of registers
4198 we might have after all bivs have been processed. */
4199 first_increment_giv = max_reg_num ();
4200 for (n_extra_increment = 0, bl = loop_iv_list; bl; bl = bl->next)
4201 n_extra_increment += bl->biv_count - 1;
4203 /* If the loop contains volatile memory references do not allow any
4204 replacements to take place, since this could loose the volatile
4206 if (n_extra_increment && ! loop_info->has_volatile)
4208 int nregs = first_increment_giv + n_extra_increment;
4210 /* Reallocate reg_iv_type and reg_iv_info. */
4211 VARRAY_GROW (reg_iv_type, nregs);
4212 VARRAY_GROW (reg_iv_info, nregs);
4214 for (bl = loop_iv_list; bl; bl = bl->next)
4216 struct induction **vp, *v, *next;
4217 int biv_dead_after_loop = 0;
4219 /* The biv increments lists are in reverse order. Fix this
4221 for (v = bl->biv, bl->biv = 0; v; v = next)
4224 v->next_iv = bl->biv;
4228 /* We must guard against the case that an early exit between v->insn
4229 and next->insn leaves the biv live after the loop, since that
4230 would mean that we'd be missing an increment for the final
4231 value. The following test to set biv_dead_after_loop is like
4232 the first part of the test to set bl->eliminable.
4233 We don't check here if we can calculate the final value, since
4234 this can't succeed if we already know that there is a jump
4235 between v->insn and next->insn, yet next->always_executed is
4236 set and next->maybe_multiple is cleared. Such a combination
4237 implies that the jump destination is outside the loop.
4238 If we want to make this check more sophisticated, we should
4239 check each branch between v->insn and next->insn individually
4240 to see if the biv is dead at its destination. */
4242 if (uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4244 && INSN_UID (bl->init_insn) < max_uid_for_loop
4245 && (uid_luid[REGNO_FIRST_UID (bl->regno)]
4246 >= INSN_LUID (bl->init_insn))
4247 #ifdef HAVE_decrement_and_branch_until_zero
4250 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4251 biv_dead_after_loop = 1;
4253 for (vp = &bl->biv, next = *vp; v = next, next = v->next_iv;)
4255 HOST_WIDE_INT offset;
4256 rtx set, add_val, old_reg, dest_reg, last_use_insn, note;
4257 int old_regno, new_regno;
4259 if (! v->always_executed
4260 || v->maybe_multiple
4261 || GET_CODE (v->add_val) != CONST_INT
4262 || ! next->always_executed
4263 || next->maybe_multiple
4264 || ! CONSTANT_P (next->add_val)
4265 || v->mult_val != const1_rtx
4266 || next->mult_val != const1_rtx
4267 || ! (biv_dead_after_loop
4268 || no_jumps_between_p (v->insn, next->insn)))
4273 offset = INTVAL (v->add_val);
4274 set = single_set (v->insn);
4275 add_val = plus_constant (next->add_val, offset);
4276 old_reg = v->dest_reg;
4277 dest_reg = gen_reg_rtx (v->mode);
4279 /* Unlike reg_iv_type / reg_iv_info, the other three arrays
4280 have been allocated with some slop space, so we may not
4281 actually need to reallocate them. If we do, the following
4282 if statement will be executed just once in this loop. */
4283 if ((unsigned) max_reg_num () > n_times_set->num_elements)
4285 /* Grow all the remaining arrays. */
4286 VARRAY_GROW (set_in_loop, nregs);
4287 VARRAY_GROW (n_times_set, nregs);
4288 VARRAY_GROW (may_not_optimize, nregs);
4289 VARRAY_GROW (reg_single_usage, nregs);
4292 if (! validate_change (next->insn, next->location, add_val, 0))
4298 /* Here we can try to eliminate the increment by combining
4299 it into the uses. */
4301 /* Set last_use_insn so that we can check against it. */
4303 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4305 p = next_insn_in_loop (loop, p))
4307 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
4309 if (reg_mentioned_p (old_reg, PATTERN (p)))
4315 /* If we can't get the LUIDs for the insns, we can't
4316 calculate the lifetime. This is likely from unrolling
4317 of an inner loop, so there is little point in making this
4318 a DEST_REG giv anyways. */
4319 if (INSN_UID (v->insn) >= max_uid_for_loop
4320 || INSN_UID (last_use_insn) >= max_uid_for_loop
4321 || ! validate_change (v->insn, &SET_DEST (set), dest_reg, 0))
4323 /* Change the increment at NEXT back to what it was. */
4324 if (! validate_change (next->insn, next->location,
4330 next->add_val = add_val;
4331 v->dest_reg = dest_reg;
4332 v->giv_type = DEST_REG;
4333 v->location = &SET_SRC (set);
4335 v->combined_with = 0;
4337 v->derive_adjustment = 0;
4343 v->auto_inc_opt = 0;
4346 v->derived_from = 0;
4347 v->always_computable = 1;
4348 v->always_executed = 1;
4350 v->no_const_addval = 0;
4352 old_regno = REGNO (old_reg);
4353 new_regno = REGNO (dest_reg);
4354 VARRAY_INT (set_in_loop, old_regno)--;
4355 VARRAY_INT (set_in_loop, new_regno) = 1;
4356 VARRAY_INT (n_times_set, old_regno)--;
4357 VARRAY_INT (n_times_set, new_regno) = 1;
4358 VARRAY_CHAR (may_not_optimize, new_regno) = 0;
4360 REG_IV_TYPE (new_regno) = GENERAL_INDUCT;
4361 REG_IV_INFO (new_regno) = v;
4363 /* If next_insn has a REG_EQUAL note that mentiones OLD_REG,
4364 it must be replaced. */
4365 note = find_reg_note (next->insn, REG_EQUAL, NULL_RTX);
4366 if (note && reg_mentioned_p (old_reg, XEXP (note, 0)))
4367 XEXP (note, 0) = copy_rtx (SET_SRC (single_set (next->insn)));
4369 /* Remove the increment from the list of biv increments,
4370 and record it as a giv. */
4373 v->next_iv = bl->giv;
4376 v->benefit = rtx_cost (SET_SRC (set), SET);
4377 bl->total_benefit += v->benefit;
4379 /* Now replace the biv with DEST_REG in all insns between
4380 the replaced increment and the next increment, and
4381 remember the last insn that needed a replacement. */
4382 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4384 p = next_insn_in_loop (loop, p))
4388 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
4390 if (reg_mentioned_p (old_reg, PATTERN (p)))
4393 if (! validate_replace_rtx (old_reg, dest_reg, p))
4396 for (note = REG_NOTES (p); note; note = XEXP (note, 1))
4398 if (GET_CODE (note) == EXPR_LIST)
4400 = replace_rtx (XEXP (note, 0), old_reg, dest_reg);
4404 v->last_use = last_use_insn;
4405 v->lifetime = INSN_LUID (last_use_insn) - INSN_LUID (v->insn);
4406 /* If the lifetime is zero, it means that this register is really
4407 a dead store. So mark this as a giv that can be ignored.
4408 This will not prevent the biv from being eliminated. */
4409 if (v->lifetime == 0)
4412 if (loop_dump_stream)
4413 fprintf (loop_dump_stream,
4414 "Increment %d of biv %d converted to giv %d.\n",
4415 INSN_UID (v->insn), old_regno, new_regno);
4419 last_increment_giv = max_reg_num () - 1;
4421 /* Search the loop for general induction variables. */
4423 /* A register is a giv if: it is only set once, it is a function of a
4424 biv and a constant (or invariant), and it is not a biv. */
4426 not_every_iteration = 0;
4429 p = loop_scan_start;
4433 /* At end of a straight-in loop, we are done.
4434 At end of a loop entered at the bottom, scan the top. */
4435 if (p == loop_scan_start)
4443 if (p == loop_scan_start)
4447 /* Look for a general induction variable in a register. */
4448 if (GET_CODE (p) == INSN
4449 && (set = single_set (p))
4450 && GET_CODE (SET_DEST (set)) == REG
4451 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
4458 rtx last_consec_insn;
4460 dest_reg = SET_DEST (set);
4461 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
4464 if (/* SET_SRC is a giv. */
4465 (general_induction_var (SET_SRC (set), &src_reg, &add_val,
4466 &mult_val, 0, &benefit)
4467 /* Equivalent expression is a giv. */
4468 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
4469 && general_induction_var (XEXP (regnote, 0), &src_reg,
4470 &add_val, &mult_val, 0,
4472 /* Don't try to handle any regs made by loop optimization.
4473 We have nothing on them in regno_first_uid, etc. */
4474 && REGNO (dest_reg) < max_reg_before_loop
4475 /* Don't recognize a BASIC_INDUCT_VAR here. */
4476 && dest_reg != src_reg
4477 /* This must be the only place where the register is set. */
4478 && (VARRAY_INT (n_times_set, REGNO (dest_reg)) == 1
4479 /* or all sets must be consecutive and make a giv. */
4480 || (benefit = consec_sets_giv (benefit, p,
4482 &add_val, &mult_val,
4483 &last_consec_insn))))
4486 = (struct induction *) alloca (sizeof (struct induction));
4488 /* If this is a library call, increase benefit. */
4489 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
4490 benefit += libcall_benefit (p);
4492 /* Skip the consecutive insns, if there are any. */
4493 if (VARRAY_INT (n_times_set, REGNO (dest_reg)) != 1)
4494 p = last_consec_insn;
4496 record_giv (v, p, src_reg, dest_reg, mult_val, add_val, benefit,
4497 DEST_REG, not_every_iteration, maybe_multiple,
4498 NULL_PTR, loop_start, loop_end);
4503 #ifndef DONT_REDUCE_ADDR
4504 /* Look for givs which are memory addresses. */
4505 /* This resulted in worse code on a VAX 8600. I wonder if it
4507 if (GET_CODE (p) == INSN)
4508 find_mem_givs (PATTERN (p), p, not_every_iteration, maybe_multiple,
4509 loop_start, loop_end);
4512 /* Update the status of whether giv can derive other givs. This can
4513 change when we pass a label or an insn that updates a biv. */
4514 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4515 || GET_CODE (p) == CODE_LABEL)
4516 update_giv_derive (p);
4518 /* Past CODE_LABEL, we get to insns that may be executed multiple
4519 times. The only way we can be sure that they can't is if every
4520 every jump insn between here and the end of the loop either
4521 returns, exits the loop, is a forward jump, or is a jump
4522 to the loop start. */
4524 if (GET_CODE (p) == CODE_LABEL)
4532 insn = NEXT_INSN (insn);
4533 if (insn == loop_scan_start)
4535 if (insn == loop_end)
4541 if (insn == loop_scan_start)
4545 if (GET_CODE (insn) == JUMP_INSN
4546 && GET_CODE (PATTERN (insn)) != RETURN
4547 && (! condjump_p (insn)
4548 || (JUMP_LABEL (insn) != 0
4549 && JUMP_LABEL (insn) != loop_scan_start
4550 && (INSN_UID (JUMP_LABEL (insn)) >= max_uid_for_loop
4551 || INSN_UID (insn) >= max_uid_for_loop
4552 || (INSN_LUID (JUMP_LABEL (insn))
4553 < INSN_LUID (insn))))))
4561 /* Past a jump, we get to insns for which we can't count
4562 on whether they will be executed during each iteration. */
4563 /* This code appears twice in strength_reduce. There is also similar
4564 code in scan_loop. */
4565 if (GET_CODE (p) == JUMP_INSN
4566 /* If we enter the loop in the middle, and scan around to the
4567 beginning, don't set not_every_iteration for that.
4568 This can be any kind of jump, since we want to know if insns
4569 will be executed if the loop is executed. */
4570 && ! (JUMP_LABEL (p) == loop_top
4571 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
4572 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
4576 /* If this is a jump outside the loop, then it also doesn't
4577 matter. Check to see if the target of this branch is on the
4578 loop->exits_labels list. */
4580 for (label = uid_loop[INSN_UID (loop_start)]->exit_labels;
4582 label = LABEL_NEXTREF (label))
4583 if (XEXP (label, 0) == JUMP_LABEL (p))
4587 not_every_iteration = 1;
4590 else if (GET_CODE (p) == NOTE)
4592 /* At the virtual top of a converted loop, insns are again known to
4593 be executed each iteration: logically, the loop begins here
4594 even though the exit code has been duplicated.
4596 Insns are also again known to be executed each iteration at
4597 the LOOP_CONT note. */
4598 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
4599 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
4601 not_every_iteration = 0;
4602 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
4604 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
4608 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4609 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4610 or not an insn is known to be executed each iteration of the
4611 loop, whether or not any iterations are known to occur.
4613 Therefore, if we have just passed a label and have no more labels
4614 between here and the test insn of the loop, we know these insns
4615 will be executed each iteration. */
4617 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
4618 && no_labels_between_p (p, loop_end)
4619 && loop_insn_first_p (p, loop_cont))
4620 not_every_iteration = 0;
4623 /* Try to calculate and save the number of loop iterations. This is
4624 set to zero if the actual number can not be calculated. This must
4625 be called after all giv's have been identified, since otherwise it may
4626 fail if the iteration variable is a giv. */
4628 loop_iterations (loop);
4630 /* Now for each giv for which we still don't know whether or not it is
4631 replaceable, check to see if it is replaceable because its final value
4632 can be calculated. This must be done after loop_iterations is called,
4633 so that final_giv_value will work correctly. */
4635 for (bl = loop_iv_list; bl; bl = bl->next)
4637 struct induction *v;
4639 for (v = bl->giv; v; v = v->next_iv)
4640 if (! v->replaceable && ! v->not_replaceable)
4641 check_final_value (v, loop_start, loop_end, loop_info->n_iterations);
4644 /* Try to prove that the loop counter variable (if any) is always
4645 nonnegative; if so, record that fact with a REG_NONNEG note
4646 so that "decrement and branch until zero" insn can be used. */
4647 check_dbra_loop (loop, insn_count);
4649 /* Create reg_map to hold substitutions for replaceable giv regs.
4650 Some givs might have been made from biv increments, so look at
4651 reg_iv_type for a suitable size. */
4652 reg_map_size = reg_iv_type->num_elements;
4653 reg_map = (rtx *) xcalloc (reg_map_size, sizeof (rtx));
4655 /* Examine each iv class for feasibility of strength reduction/induction
4656 variable elimination. */
4658 for (bl = loop_iv_list; bl; bl = bl->next)
4660 struct induction *v;
4663 rtx final_value = 0;
4666 /* Test whether it will be possible to eliminate this biv
4667 provided all givs are reduced. This is possible if either
4668 the reg is not used outside the loop, or we can compute
4669 what its final value will be.
4671 For architectures with a decrement_and_branch_until_zero insn,
4672 don't do this if we put a REG_NONNEG note on the endtest for
4675 /* Compare against bl->init_insn rather than loop_start.
4676 We aren't concerned with any uses of the biv between
4677 init_insn and loop_start since these won't be affected
4678 by the value of the biv elsewhere in the function, so
4679 long as init_insn doesn't use the biv itself.
4680 March 14, 1989 -- self@bayes.arc.nasa.gov */
4682 if ((uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4684 && INSN_UID (bl->init_insn) < max_uid_for_loop
4685 && uid_luid[REGNO_FIRST_UID (bl->regno)] >= INSN_LUID (bl->init_insn)
4686 #ifdef HAVE_decrement_and_branch_until_zero
4689 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4690 || ((final_value = final_biv_value (bl, loop_start, loop_end,
4691 loop_info->n_iterations))
4692 #ifdef HAVE_decrement_and_branch_until_zero
4696 bl->eliminable = maybe_eliminate_biv (bl, loop_start, loop_end, 0,
4697 threshold, insn_count);
4700 if (loop_dump_stream)
4702 fprintf (loop_dump_stream,
4703 "Cannot eliminate biv %d.\n",
4705 fprintf (loop_dump_stream,
4706 "First use: insn %d, last use: insn %d.\n",
4707 REGNO_FIRST_UID (bl->regno),
4708 REGNO_LAST_UID (bl->regno));
4712 /* Combine all giv's for this iv_class. */
4715 /* This will be true at the end, if all givs which depend on this
4716 biv have been strength reduced.
4717 We can't (currently) eliminate the biv unless this is so. */
4720 /* Check each giv in this class to see if we will benefit by reducing
4721 it. Skip giv's combined with others. */
4722 for (v = bl->giv; v; v = v->next_iv)
4724 struct induction *tv;
4726 if (v->ignore || v->same)
4729 benefit = v->benefit;
4731 /* Reduce benefit if not replaceable, since we will insert
4732 a move-insn to replace the insn that calculates this giv.
4733 Don't do this unless the giv is a user variable, since it
4734 will often be marked non-replaceable because of the duplication
4735 of the exit code outside the loop. In such a case, the copies
4736 we insert are dead and will be deleted. So they don't have
4737 a cost. Similar situations exist. */
4738 /* ??? The new final_[bg]iv_value code does a much better job
4739 of finding replaceable giv's, and hence this code may no longer
4741 if (! v->replaceable && ! bl->eliminable
4742 && REG_USERVAR_P (v->dest_reg))
4743 benefit -= copy_cost;
4745 /* Decrease the benefit to count the add-insns that we will
4746 insert to increment the reduced reg for the giv. */
4747 benefit -= add_cost * bl->biv_count;
4749 /* Decide whether to strength-reduce this giv or to leave the code
4750 unchanged (recompute it from the biv each time it is used).
4751 This decision can be made independently for each giv. */
4754 /* Attempt to guess whether autoincrement will handle some of the
4755 new add insns; if so, increase BENEFIT (undo the subtraction of
4756 add_cost that was done above). */
4757 if (v->giv_type == DEST_ADDR
4758 && GET_CODE (v->mult_val) == CONST_INT)
4760 if (HAVE_POST_INCREMENT
4761 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4762 benefit += add_cost * bl->biv_count;
4763 else if (HAVE_PRE_INCREMENT
4764 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4765 benefit += add_cost * bl->biv_count;
4766 else if (HAVE_POST_DECREMENT
4767 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4768 benefit += add_cost * bl->biv_count;
4769 else if (HAVE_PRE_DECREMENT
4770 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4771 benefit += add_cost * bl->biv_count;
4775 /* If an insn is not to be strength reduced, then set its ignore
4776 flag, and clear all_reduced. */
4778 /* A giv that depends on a reversed biv must be reduced if it is
4779 used after the loop exit, otherwise, it would have the wrong
4780 value after the loop exit. To make it simple, just reduce all
4781 of such giv's whether or not we know they are used after the loop
4784 if ( ! flag_reduce_all_givs && v->lifetime * threshold * benefit < insn_count
4787 if (loop_dump_stream)
4788 fprintf (loop_dump_stream,
4789 "giv of insn %d not worth while, %d vs %d.\n",
4791 v->lifetime * threshold * benefit, insn_count);
4797 /* Check that we can increment the reduced giv without a
4798 multiply insn. If not, reject it. */
4800 for (tv = bl->biv; tv; tv = tv->next_iv)
4801 if (tv->mult_val == const1_rtx
4802 && ! product_cheap_p (tv->add_val, v->mult_val))
4804 if (loop_dump_stream)
4805 fprintf (loop_dump_stream,
4806 "giv of insn %d: would need a multiply.\n",
4807 INSN_UID (v->insn));
4815 /* Check for givs whose first use is their definition and whose
4816 last use is the definition of another giv. If so, it is likely
4817 dead and should not be used to derive another giv nor to
4819 for (v = bl->giv; v; v = v->next_iv)
4822 || (v->same && v->same->ignore))
4827 struct induction *v1;
4829 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4830 if (v->last_use == v1->insn)
4833 else if (v->giv_type == DEST_REG
4834 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4836 struct induction *v1;
4838 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4839 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4844 /* Now that we know which givs will be reduced, try to rearrange the
4845 combinations to reduce register pressure.
4846 recombine_givs calls find_life_end, which needs reg_iv_type and
4847 reg_iv_info to be valid for all pseudos. We do the necessary
4848 reallocation here since it allows to check if there are still
4849 more bivs to process. */
4850 nregs = max_reg_num ();
4851 if (nregs > reg_iv_type->num_elements)
4853 /* If there are still more bivs to process, allocate some slack
4854 space so that we're not constantly reallocating these arrays. */
4857 /* Reallocate reg_iv_type and reg_iv_info. */
4858 VARRAY_GROW (reg_iv_type, nregs);
4859 VARRAY_GROW (reg_iv_info, nregs);
4861 recombine_givs (bl, loop_start, loop_end, unroll_p);
4863 /* Reduce each giv that we decided to reduce. */
4865 for (v = bl->giv; v; v = v->next_iv)
4867 struct induction *tv;
4868 if (! v->ignore && v->same == 0)
4870 int auto_inc_opt = 0;
4872 /* If the code for derived givs immediately below has already
4873 allocated a new_reg, we must keep it. */
4875 v->new_reg = gen_reg_rtx (v->mode);
4877 if (v->derived_from)
4879 struct induction *d = v->derived_from;
4881 /* In case d->dest_reg is not replaceable, we have
4882 to replace it in v->insn now. */
4884 d->new_reg = gen_reg_rtx (d->mode);
4886 = replace_rtx (PATTERN (v->insn), d->dest_reg, d->new_reg);
4888 = replace_rtx (PATTERN (v->insn), v->dest_reg, v->new_reg);
4889 /* For each place where the biv is incremented, add an
4890 insn to set the new, reduced reg for the giv.
4891 We used to do this only for biv_count != 1, but
4892 this fails when there is a giv after a single biv
4893 increment, e.g. when the last giv was expressed as
4895 for (tv = bl->biv; tv; tv = tv->next_iv)
4897 /* We always emit reduced giv increments before the
4898 biv increment when bl->biv_count != 1. So by
4899 emitting the add insns for derived givs after the
4900 biv increment, they pick up the updated value of
4902 If the reduced giv is processed with
4903 auto_inc_opt == 1, then it is incremented earlier
4904 than the biv, hence we'll still pick up the right
4906 If it's processed with auto_inc_opt == -1,
4907 that implies that the biv increment is before the
4908 first reduced giv's use. The derived giv's lifetime
4909 is after the reduced giv's lifetime, hence in this
4910 case, the biv increment doesn't matter. */
4911 emit_insn_after (copy_rtx (PATTERN (v->insn)), tv->insn);
4917 /* If the target has auto-increment addressing modes, and
4918 this is an address giv, then try to put the increment
4919 immediately after its use, so that flow can create an
4920 auto-increment addressing mode. */
4921 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4922 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4923 /* We don't handle reversed biv's because bl->biv->insn
4924 does not have a valid INSN_LUID. */
4926 && v->always_executed && ! v->maybe_multiple
4927 && INSN_UID (v->insn) < max_uid_for_loop)
4929 /* If other giv's have been combined with this one, then
4930 this will work only if all uses of the other giv's occur
4931 before this giv's insn. This is difficult to check.
4933 We simplify this by looking for the common case where
4934 there is one DEST_REG giv, and this giv's insn is the
4935 last use of the dest_reg of that DEST_REG giv. If the
4936 increment occurs after the address giv, then we can
4937 perform the optimization. (Otherwise, the increment
4938 would have to go before other_giv, and we would not be
4939 able to combine it with the address giv to get an
4940 auto-inc address.) */
4941 if (v->combined_with)
4943 struct induction *other_giv = 0;
4945 for (tv = bl->giv; tv; tv = tv->next_iv)
4953 if (! tv && other_giv
4954 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4955 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4956 == INSN_UID (v->insn))
4957 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4960 /* Check for case where increment is before the address
4961 giv. Do this test in "loop order". */
4962 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4963 && (INSN_LUID (v->insn) < INSN_LUID (loop_scan_start)
4964 || (INSN_LUID (bl->biv->insn)
4965 > INSN_LUID (loop_scan_start))))
4966 || (INSN_LUID (v->insn) < INSN_LUID (loop_scan_start)
4967 && (INSN_LUID (loop_scan_start)
4968 < INSN_LUID (bl->biv->insn))))
4977 /* We can't put an insn immediately after one setting
4978 cc0, or immediately before one using cc0. */
4979 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4980 || (auto_inc_opt == -1
4981 && (prev = prev_nonnote_insn (v->insn)) != 0
4982 && GET_RTX_CLASS (GET_CODE (prev)) == 'i'
4983 && sets_cc0_p (PATTERN (prev))))
4989 v->auto_inc_opt = 1;
4993 /* For each place where the biv is incremented, add an insn
4994 to increment the new, reduced reg for the giv. */
4995 for (tv = bl->biv; tv; tv = tv->next_iv)
5000 insert_before = tv->insn;
5001 else if (auto_inc_opt == 1)
5002 insert_before = NEXT_INSN (v->insn);
5004 insert_before = v->insn;
5006 if (tv->mult_val == const1_rtx)
5007 emit_iv_add_mult (tv->add_val, v->mult_val,
5008 v->new_reg, v->new_reg, insert_before);
5009 else /* tv->mult_val == const0_rtx */
5010 /* A multiply is acceptable here
5011 since this is presumed to be seldom executed. */
5012 emit_iv_add_mult (tv->add_val, v->mult_val,
5013 v->add_val, v->new_reg, insert_before);
5016 /* Add code at loop start to initialize giv's reduced reg. */
5018 emit_iv_add_mult (bl->initial_value, v->mult_val,
5019 v->add_val, v->new_reg, loop_start);
5023 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
5026 For each giv register that can be reduced now: if replaceable,
5027 substitute reduced reg wherever the old giv occurs;
5028 else add new move insn "giv_reg = reduced_reg". */
5030 for (v = bl->giv; v; v = v->next_iv)
5032 if (v->same && v->same->ignore)
5038 /* Update expression if this was combined, in case other giv was
5041 v->new_reg = replace_rtx (v->new_reg,
5042 v->same->dest_reg, v->same->new_reg);
5044 if (v->giv_type == DEST_ADDR)
5045 /* Store reduced reg as the address in the memref where we found
5047 validate_change (v->insn, v->location, v->new_reg, 0);
5048 else if (v->replaceable)
5050 reg_map[REGNO (v->dest_reg)] = v->new_reg;
5053 /* I can no longer duplicate the original problem. Perhaps
5054 this is unnecessary now? */
5056 /* Replaceable; it isn't strictly necessary to delete the old
5057 insn and emit a new one, because v->dest_reg is now dead.
5059 However, especially when unrolling loops, the special
5060 handling for (set REG0 REG1) in the second cse pass may
5061 make v->dest_reg live again. To avoid this problem, emit
5062 an insn to set the original giv reg from the reduced giv.
5063 We can not delete the original insn, since it may be part
5064 of a LIBCALL, and the code in flow that eliminates dead
5065 libcalls will fail if it is deleted. */
5066 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
5072 /* Not replaceable; emit an insn to set the original giv reg from
5073 the reduced giv, same as above. */
5074 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
5078 /* When a loop is reversed, givs which depend on the reversed
5079 biv, and which are live outside the loop, must be set to their
5080 correct final value. This insn is only needed if the giv is
5081 not replaceable. The correct final value is the same as the
5082 value that the giv starts the reversed loop with. */
5083 if (bl->reversed && ! v->replaceable)
5084 emit_iv_add_mult (bl->initial_value, v->mult_val,
5085 v->add_val, v->dest_reg, end_insert_before);
5086 else if (v->final_value)
5090 /* If the loop has multiple exits, emit the insn before the
5091 loop to ensure that it will always be executed no matter
5092 how the loop exits. Otherwise, emit the insn after the loop,
5093 since this is slightly more efficient. */
5094 if (uid_loop[INSN_UID (loop_start)]->exit_count)
5095 insert_before = loop_start;
5097 insert_before = end_insert_before;
5098 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
5102 /* If the insn to set the final value of the giv was emitted
5103 before the loop, then we must delete the insn inside the loop
5104 that sets it. If this is a LIBCALL, then we must delete
5105 every insn in the libcall. Note, however, that
5106 final_giv_value will only succeed when there are multiple
5107 exits if the giv is dead at each exit, hence it does not
5108 matter that the original insn remains because it is dead
5110 /* Delete the insn inside the loop that sets the giv since
5111 the giv is now set before (or after) the loop. */
5112 delete_insn (v->insn);
5116 if (loop_dump_stream)
5118 fprintf (loop_dump_stream, "giv at %d reduced to ",
5119 INSN_UID (v->insn));
5120 print_rtl (loop_dump_stream, v->new_reg);
5121 fprintf (loop_dump_stream, "\n");
5125 /* All the givs based on the biv bl have been reduced if they
5128 /* For each giv not marked as maybe dead that has been combined with a
5129 second giv, clear any "maybe dead" mark on that second giv.
5130 v->new_reg will either be or refer to the register of the giv it
5133 Doing this clearing avoids problems in biv elimination where a
5134 giv's new_reg is a complex value that can't be put in the insn but
5135 the giv combined with (with a reg as new_reg) is marked maybe_dead.
5136 Since the register will be used in either case, we'd prefer it be
5137 used from the simpler giv. */
5139 for (v = bl->giv; v; v = v->next_iv)
5140 if (! v->maybe_dead && v->same)
5141 v->same->maybe_dead = 0;
5143 /* Try to eliminate the biv, if it is a candidate.
5144 This won't work if ! all_reduced,
5145 since the givs we planned to use might not have been reduced.
5147 We have to be careful that we didn't initially think we could eliminate
5148 this biv because of a giv that we now think may be dead and shouldn't
5149 be used as a biv replacement.
5151 Also, there is the possibility that we may have a giv that looks
5152 like it can be used to eliminate a biv, but the resulting insn
5153 isn't valid. This can happen, for example, on the 88k, where a
5154 JUMP_INSN can compare a register only with zero. Attempts to
5155 replace it with a compare with a constant will fail.
5157 Note that in cases where this call fails, we may have replaced some
5158 of the occurrences of the biv with a giv, but no harm was done in
5159 doing so in the rare cases where it can occur. */
5161 if (all_reduced == 1 && bl->eliminable
5162 && maybe_eliminate_biv (bl, loop_start, loop_end, 1,
5163 threshold, insn_count))
5166 /* ?? If we created a new test to bypass the loop entirely,
5167 or otherwise drop straight in, based on this test, then
5168 we might want to rewrite it also. This way some later
5169 pass has more hope of removing the initialization of this
5172 /* If final_value != 0, then the biv may be used after loop end
5173 and we must emit an insn to set it just in case.
5175 Reversed bivs already have an insn after the loop setting their
5176 value, so we don't need another one. We can't calculate the
5177 proper final value for such a biv here anyways. */
5178 if (final_value != 0 && ! bl->reversed)
5182 /* If the loop has multiple exits, emit the insn before the
5183 loop to ensure that it will always be executed no matter
5184 how the loop exits. Otherwise, emit the insn after the
5185 loop, since this is slightly more efficient. */
5186 if (uid_loop[INSN_UID (loop_start)]->exit_count)
5187 insert_before = loop_start;
5189 insert_before = end_insert_before;
5191 emit_insn_before (gen_move_insn (bl->biv->dest_reg, final_value),
5196 /* Delete all of the instructions inside the loop which set
5197 the biv, as they are all dead. If is safe to delete them,
5198 because an insn setting a biv will never be part of a libcall. */
5199 /* However, deleting them will invalidate the regno_last_uid info,
5200 so keeping them around is more convenient. Final_biv_value
5201 will only succeed when there are multiple exits if the biv
5202 is dead at each exit, hence it does not matter that the original
5203 insn remains, because it is dead anyways. */
5204 for (v = bl->biv; v; v = v->next_iv)
5205 delete_insn (v->insn);
5208 if (loop_dump_stream)
5209 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
5214 /* Go through all the instructions in the loop, making all the
5215 register substitutions scheduled in REG_MAP. */
5217 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
5218 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5219 || GET_CODE (p) == CALL_INSN)
5221 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
5222 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
5226 if (loop_info->n_iterations > 0)
5228 /* When we completely unroll a loop we will likely not need the increment
5229 of the loop BIV and we will not need the conditional branch at the
5231 unrolled_insn_copies = insn_count - 2;
5234 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
5235 need the comparison before the conditional branch at the end of the
5237 unrolled_insn_copies -= 1;
5240 /* We'll need one copy for each loop iteration. */
5241 unrolled_insn_copies *= loop_info->n_iterations;
5243 /* A little slop to account for the ability to remove initialization
5244 code, better CSE, and other secondary benefits of completely
5245 unrolling some loops. */
5246 unrolled_insn_copies -= 1;
5248 /* Clamp the value. */
5249 if (unrolled_insn_copies < 0)
5250 unrolled_insn_copies = 0;
5253 /* Unroll loops from within strength reduction so that we can use the
5254 induction variable information that strength_reduce has already
5255 collected. Always unroll loops that would be as small or smaller
5256 unrolled than when rolled. */
5258 || (loop_info->n_iterations > 0
5259 && unrolled_insn_copies <= insn_count))
5260 unroll_loop (loop, insn_count, end_insert_before, 1);
5262 #ifdef HAVE_decrement_and_branch_on_count
5263 /* Instrument the loop with BCT insn. */
5264 if (HAVE_decrement_and_branch_on_count && bct_p
5265 && flag_branch_on_count_reg)
5267 #endif /* HAVE_decrement_and_branch_on_count */
5269 if (loop_dump_stream)
5270 fprintf (loop_dump_stream, "\n");
5273 VARRAY_FREE (reg_iv_type);
5274 VARRAY_FREE (reg_iv_info);
5275 free (reg_biv_class);
5280 /* Return 1 if X is a valid source for an initial value (or as value being
5281 compared against in an initial test).
5283 X must be either a register or constant and must not be clobbered between
5284 the current insn and the start of the loop.
5286 INSN is the insn containing X. */
5289 valid_initial_value_p (x, insn, call_seen, loop_start)
5298 /* Only consider pseudos we know about initialized in insns whose luids
5300 if (GET_CODE (x) != REG
5301 || REGNO (x) >= max_reg_before_loop)
5304 /* Don't use call-clobbered registers across a call which clobbers it. On
5305 some machines, don't use any hard registers at all. */
5306 if (REGNO (x) < FIRST_PSEUDO_REGISTER
5307 && (SMALL_REGISTER_CLASSES
5308 || (call_used_regs[REGNO (x)] && call_seen)))
5311 /* Don't use registers that have been clobbered before the start of the
5313 if (reg_set_between_p (x, insn, loop_start))
5319 /* Scan X for memory refs and check each memory address
5320 as a possible giv. INSN is the insn whose pattern X comes from.
5321 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5322 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
5323 more thanonce in each loop iteration. */
5326 find_mem_givs (x, insn, not_every_iteration, maybe_multiple, loop_start,
5330 int not_every_iteration, maybe_multiple;
5331 rtx loop_start, loop_end;
5334 register enum rtx_code code;
5335 register const char *fmt;
5340 code = GET_CODE (x);
5364 /* This code used to disable creating GIVs with mult_val == 1 and
5365 add_val == 0. However, this leads to lost optimizations when
5366 it comes time to combine a set of related DEST_ADDR GIVs, since
5367 this one would not be seen. */
5369 if (general_induction_var (XEXP (x, 0), &src_reg, &add_val,
5370 &mult_val, 1, &benefit))
5372 /* Found one; record it. */
5374 = (struct induction *) oballoc (sizeof (struct induction));
5376 record_giv (v, insn, src_reg, addr_placeholder, mult_val,
5377 add_val, benefit, DEST_ADDR, not_every_iteration,
5378 maybe_multiple, &XEXP (x, 0), loop_start, loop_end);
5380 v->mem_mode = GET_MODE (x);
5389 /* Recursively scan the subexpressions for other mem refs. */
5391 fmt = GET_RTX_FORMAT (code);
5392 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5394 find_mem_givs (XEXP (x, i), insn, not_every_iteration, maybe_multiple,
5395 loop_start, loop_end);
5396 else if (fmt[i] == 'E')
5397 for (j = 0; j < XVECLEN (x, i); j++)
5398 find_mem_givs (XVECEXP (x, i, j), insn, not_every_iteration,
5399 maybe_multiple, loop_start, loop_end);
5402 /* Fill in the data about one biv update.
5403 V is the `struct induction' in which we record the biv. (It is
5404 allocated by the caller, with alloca.)
5405 INSN is the insn that sets it.
5406 DEST_REG is the biv's reg.
5408 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5409 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5410 being set to INC_VAL.
5412 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5413 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5414 can be executed more than once per iteration. If MAYBE_MULTIPLE
5415 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5416 executed exactly once per iteration. */
5419 record_biv (v, insn, dest_reg, inc_val, mult_val, location,
5420 not_every_iteration, maybe_multiple, multi_insn_incr)
5421 struct induction *v;
5427 int not_every_iteration;
5429 int multi_insn_incr;
5431 struct iv_class *bl;
5434 v->src_reg = dest_reg;
5435 v->dest_reg = dest_reg;
5436 v->mult_val = mult_val;
5437 v->add_val = inc_val;
5438 v->location = location;
5439 v->mode = GET_MODE (dest_reg);
5440 v->always_computable = ! not_every_iteration;
5441 v->always_executed = ! not_every_iteration;
5442 v->maybe_multiple = maybe_multiple;
5443 v->multi_insn_incr = multi_insn_incr;
5445 /* Add this to the reg's iv_class, creating a class
5446 if this is the first incrementation of the reg. */
5448 bl = reg_biv_class[REGNO (dest_reg)];
5451 /* Create and initialize new iv_class. */
5453 bl = (struct iv_class *) oballoc (sizeof (struct iv_class));
5455 bl->regno = REGNO (dest_reg);
5461 /* Set initial value to the reg itself. */
5462 bl->initial_value = dest_reg;
5463 /* We haven't seen the initializing insn yet */
5466 bl->initial_test = 0;
5467 bl->incremented = 0;
5471 bl->total_benefit = 0;
5473 /* Add this class to loop_iv_list. */
5474 bl->next = loop_iv_list;
5477 /* Put it in the array of biv register classes. */
5478 reg_biv_class[REGNO (dest_reg)] = bl;
5481 /* Update IV_CLASS entry for this biv. */
5482 v->next_iv = bl->biv;
5485 if (mult_val == const1_rtx)
5486 bl->incremented = 1;
5488 if (loop_dump_stream)
5490 fprintf (loop_dump_stream,
5491 "Insn %d: possible biv, reg %d,",
5492 INSN_UID (insn), REGNO (dest_reg));
5493 if (GET_CODE (inc_val) == CONST_INT)
5495 fprintf (loop_dump_stream, " const =");
5496 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (inc_val));
5497 fputc ('\n', loop_dump_stream);
5501 fprintf (loop_dump_stream, " const = ");
5502 print_rtl (loop_dump_stream, inc_val);
5503 fprintf (loop_dump_stream, "\n");
5508 /* Fill in the data about one giv.
5509 V is the `struct induction' in which we record the giv. (It is
5510 allocated by the caller, with alloca.)
5511 INSN is the insn that sets it.
5512 BENEFIT estimates the savings from deleting this insn.
5513 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5514 into a register or is used as a memory address.
5516 SRC_REG is the biv reg which the giv is computed from.
5517 DEST_REG is the giv's reg (if the giv is stored in a reg).
5518 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5519 LOCATION points to the place where this giv's value appears in INSN. */
5522 record_giv (v, insn, src_reg, dest_reg, mult_val, add_val, benefit,
5523 type, not_every_iteration, maybe_multiple, location, loop_start,
5525 struct induction *v;
5529 rtx mult_val, add_val;
5532 int not_every_iteration, maybe_multiple;
5534 rtx loop_start, loop_end;
5536 struct induction *b;
5537 struct iv_class *bl;
5538 rtx set = single_set (insn);
5541 v->src_reg = src_reg;
5543 v->dest_reg = dest_reg;
5544 v->mult_val = mult_val;
5545 v->add_val = add_val;
5546 v->benefit = benefit;
5547 v->location = location;
5549 v->combined_with = 0;
5550 v->maybe_multiple = maybe_multiple;
5551 v->multi_insn_incr = 0;
5553 v->derive_adjustment = 0;
5559 v->auto_inc_opt = 0;
5562 v->derived_from = 0;
5565 /* The v->always_computable field is used in update_giv_derive, to
5566 determine whether a giv can be used to derive another giv. For a
5567 DEST_REG giv, INSN computes a new value for the giv, so its value
5568 isn't computable if INSN insn't executed every iteration.
5569 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5570 it does not compute a new value. Hence the value is always computable
5571 regardless of whether INSN is executed each iteration. */
5573 if (type == DEST_ADDR)
5574 v->always_computable = 1;
5576 v->always_computable = ! not_every_iteration;
5578 v->always_executed = ! not_every_iteration;
5580 if (type == DEST_ADDR)
5582 v->mode = GET_MODE (*location);
5585 else /* type == DEST_REG */
5587 v->mode = GET_MODE (SET_DEST (set));
5589 v->lifetime = (uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
5590 - uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))]);
5592 /* If the lifetime is zero, it means that this register is
5593 really a dead store. So mark this as a giv that can be
5594 ignored. This will not prevent the biv from being eliminated. */
5595 if (v->lifetime == 0)
5598 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
5599 REG_IV_INFO (REGNO (dest_reg)) = v;
5602 /* Add the giv to the class of givs computed from one biv. */
5604 bl = reg_biv_class[REGNO (src_reg)];
5607 v->next_iv = bl->giv;
5609 /* Don't count DEST_ADDR. This is supposed to count the number of
5610 insns that calculate givs. */
5611 if (type == DEST_REG)
5613 bl->total_benefit += benefit;
5616 /* Fatal error, biv missing for this giv? */
5619 if (type == DEST_ADDR)
5623 /* The giv can be replaced outright by the reduced register only if all
5624 of the following conditions are true:
5625 - the insn that sets the giv is always executed on any iteration
5626 on which the giv is used at all
5627 (there are two ways to deduce this:
5628 either the insn is executed on every iteration,
5629 or all uses follow that insn in the same basic block),
5630 - the giv is not used outside the loop
5631 - no assignments to the biv occur during the giv's lifetime. */
5633 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5634 /* Previous line always fails if INSN was moved by loop opt. */
5635 && uid_luid[REGNO_LAST_UID (REGNO (dest_reg))] < INSN_LUID (loop_end)
5636 && (! not_every_iteration
5637 || last_use_this_basic_block (dest_reg, insn)))
5639 /* Now check that there are no assignments to the biv within the
5640 giv's lifetime. This requires two separate checks. */
5642 /* Check each biv update, and fail if any are between the first
5643 and last use of the giv.
5645 If this loop contains an inner loop that was unrolled, then
5646 the insn modifying the biv may have been emitted by the loop
5647 unrolling code, and hence does not have a valid luid. Just
5648 mark the biv as not replaceable in this case. It is not very
5649 useful as a biv, because it is used in two different loops.
5650 It is very unlikely that we would be able to optimize the giv
5651 using this biv anyways. */
5654 for (b = bl->biv; b; b = b->next_iv)
5656 if (INSN_UID (b->insn) >= max_uid_for_loop
5657 || ((uid_luid[INSN_UID (b->insn)]
5658 >= uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))])
5659 && (uid_luid[INSN_UID (b->insn)]
5660 <= uid_luid[REGNO_LAST_UID (REGNO (dest_reg))])))
5663 v->not_replaceable = 1;
5668 /* If there are any backwards branches that go from after the
5669 biv update to before it, then this giv is not replaceable. */
5671 for (b = bl->biv; b; b = b->next_iv)
5672 if (back_branch_in_range_p (b->insn, loop_start, loop_end))
5675 v->not_replaceable = 1;
5681 /* May still be replaceable, we don't have enough info here to
5684 v->not_replaceable = 0;
5688 /* Record whether the add_val contains a const_int, for later use by
5693 v->no_const_addval = 1;
5694 if (tem == const0_rtx)
5696 else if (GET_CODE (tem) == CONST_INT)
5697 v->no_const_addval = 0;
5698 else if (GET_CODE (tem) == PLUS)
5702 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5703 tem = XEXP (tem, 0);
5704 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5705 tem = XEXP (tem, 1);
5709 if (GET_CODE (XEXP (tem, 1)) == CONST_INT)
5710 v->no_const_addval = 0;
5714 if (loop_dump_stream)
5716 if (type == DEST_REG)
5717 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
5718 INSN_UID (insn), REGNO (dest_reg));
5720 fprintf (loop_dump_stream, "Insn %d: dest address",
5723 fprintf (loop_dump_stream, " src reg %d benefit %d",
5724 REGNO (src_reg), v->benefit);
5725 fprintf (loop_dump_stream, " lifetime %d",
5729 fprintf (loop_dump_stream, " replaceable");
5731 if (v->no_const_addval)
5732 fprintf (loop_dump_stream, " ncav");
5734 if (GET_CODE (mult_val) == CONST_INT)
5736 fprintf (loop_dump_stream, " mult ");
5737 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (mult_val));
5741 fprintf (loop_dump_stream, " mult ");
5742 print_rtl (loop_dump_stream, mult_val);
5745 if (GET_CODE (add_val) == CONST_INT)
5747 fprintf (loop_dump_stream, " add ");
5748 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (add_val));
5752 fprintf (loop_dump_stream, " add ");
5753 print_rtl (loop_dump_stream, add_val);
5757 if (loop_dump_stream)
5758 fprintf (loop_dump_stream, "\n");
5763 /* All this does is determine whether a giv can be made replaceable because
5764 its final value can be calculated. This code can not be part of record_giv
5765 above, because final_giv_value requires that the number of loop iterations
5766 be known, and that can not be accurately calculated until after all givs
5767 have been identified. */
5770 check_final_value (v, loop_start, loop_end, n_iterations)
5771 struct induction *v;
5772 rtx loop_start, loop_end;
5773 unsigned HOST_WIDE_INT n_iterations;
5775 struct iv_class *bl;
5776 rtx final_value = 0;
5778 bl = reg_biv_class[REGNO (v->src_reg)];
5780 /* DEST_ADDR givs will never reach here, because they are always marked
5781 replaceable above in record_giv. */
5783 /* The giv can be replaced outright by the reduced register only if all
5784 of the following conditions are true:
5785 - the insn that sets the giv is always executed on any iteration
5786 on which the giv is used at all
5787 (there are two ways to deduce this:
5788 either the insn is executed on every iteration,
5789 or all uses follow that insn in the same basic block),
5790 - its final value can be calculated (this condition is different
5791 than the one above in record_giv)
5792 - no assignments to the biv occur during the giv's lifetime. */
5795 /* This is only called now when replaceable is known to be false. */
5796 /* Clear replaceable, so that it won't confuse final_giv_value. */
5800 if ((final_value = final_giv_value (v, loop_start, loop_end, n_iterations))
5801 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5803 int biv_increment_seen = 0;
5809 /* When trying to determine whether or not a biv increment occurs
5810 during the lifetime of the giv, we can ignore uses of the variable
5811 outside the loop because final_value is true. Hence we can not
5812 use regno_last_uid and regno_first_uid as above in record_giv. */
5814 /* Search the loop to determine whether any assignments to the
5815 biv occur during the giv's lifetime. Start with the insn
5816 that sets the giv, and search around the loop until we come
5817 back to that insn again.
5819 Also fail if there is a jump within the giv's lifetime that jumps
5820 to somewhere outside the lifetime but still within the loop. This
5821 catches spaghetti code where the execution order is not linear, and
5822 hence the above test fails. Here we assume that the giv lifetime
5823 does not extend from one iteration of the loop to the next, so as
5824 to make the test easier. Since the lifetime isn't known yet,
5825 this requires two loops. See also record_giv above. */
5827 last_giv_use = v->insn;
5833 p = NEXT_INSN (loop_start);
5837 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5838 || GET_CODE (p) == CALL_INSN)
5840 if (biv_increment_seen)
5842 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5845 v->not_replaceable = 1;
5849 else if (reg_set_p (v->src_reg, PATTERN (p)))
5850 biv_increment_seen = 1;
5851 else if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5856 /* Now that the lifetime of the giv is known, check for branches
5857 from within the lifetime to outside the lifetime if it is still
5867 p = NEXT_INSN (loop_start);
5868 if (p == last_giv_use)
5871 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5872 && LABEL_NAME (JUMP_LABEL (p))
5873 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
5874 && loop_insn_first_p (loop_start, JUMP_LABEL (p)))
5875 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
5876 && loop_insn_first_p (JUMP_LABEL (p), loop_end))))
5879 v->not_replaceable = 1;
5881 if (loop_dump_stream)
5882 fprintf (loop_dump_stream,
5883 "Found branch outside giv lifetime.\n");
5890 /* If it is replaceable, then save the final value. */
5892 v->final_value = final_value;
5895 if (loop_dump_stream && v->replaceable)
5896 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5897 INSN_UID (v->insn), REGNO (v->dest_reg));
5900 /* Update the status of whether a giv can derive other givs.
5902 We need to do something special if there is or may be an update to the biv
5903 between the time the giv is defined and the time it is used to derive
5906 In addition, a giv that is only conditionally set is not allowed to
5907 derive another giv once a label has been passed.
5909 The cases we look at are when a label or an update to a biv is passed. */
5912 update_giv_derive (p)
5915 struct iv_class *bl;
5916 struct induction *biv, *giv;
5920 /* Search all IV classes, then all bivs, and finally all givs.
5922 There are three cases we are concerned with. First we have the situation
5923 of a giv that is only updated conditionally. In that case, it may not
5924 derive any givs after a label is passed.
5926 The second case is when a biv update occurs, or may occur, after the
5927 definition of a giv. For certain biv updates (see below) that are
5928 known to occur between the giv definition and use, we can adjust the
5929 giv definition. For others, or when the biv update is conditional,
5930 we must prevent the giv from deriving any other givs. There are two
5931 sub-cases within this case.
5933 If this is a label, we are concerned with any biv update that is done
5934 conditionally, since it may be done after the giv is defined followed by
5935 a branch here (actually, we need to pass both a jump and a label, but
5936 this extra tracking doesn't seem worth it).
5938 If this is a jump, we are concerned about any biv update that may be
5939 executed multiple times. We are actually only concerned about
5940 backward jumps, but it is probably not worth performing the test
5941 on the jump again here.
5943 If this is a biv update, we must adjust the giv status to show that a
5944 subsequent biv update was performed. If this adjustment cannot be done,
5945 the giv cannot derive further givs. */
5947 for (bl = loop_iv_list; bl; bl = bl->next)
5948 for (biv = bl->biv; biv; biv = biv->next_iv)
5949 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5952 for (giv = bl->giv; giv; giv = giv->next_iv)
5954 /* If cant_derive is already true, there is no point in
5955 checking all of these conditions again. */
5956 if (giv->cant_derive)
5959 /* If this giv is conditionally set and we have passed a label,
5960 it cannot derive anything. */
5961 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5962 giv->cant_derive = 1;
5964 /* Skip givs that have mult_val == 0, since
5965 they are really invariants. Also skip those that are
5966 replaceable, since we know their lifetime doesn't contain
5968 else if (giv->mult_val == const0_rtx || giv->replaceable)
5971 /* The only way we can allow this giv to derive another
5972 is if this is a biv increment and we can form the product
5973 of biv->add_val and giv->mult_val. In this case, we will
5974 be able to compute a compensation. */
5975 else if (biv->insn == p)
5979 if (biv->mult_val == const1_rtx)
5980 tem = simplify_giv_expr (gen_rtx_MULT (giv->mode,
5985 if (tem && giv->derive_adjustment)
5986 tem = simplify_giv_expr
5987 (gen_rtx_PLUS (giv->mode, tem, giv->derive_adjustment),
5991 giv->derive_adjustment = tem;
5993 giv->cant_derive = 1;
5995 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
5996 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
5997 giv->cant_derive = 1;
6002 /* Check whether an insn is an increment legitimate for a basic induction var.
6003 X is the source of insn P, or a part of it.
6004 MODE is the mode in which X should be interpreted.
6006 DEST_REG is the putative biv, also the destination of the insn.
6007 We accept patterns of these forms:
6008 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
6009 REG = INVARIANT + REG
6011 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
6012 store the additive term into *INC_VAL, and store the place where
6013 we found the additive term into *LOCATION.
6015 If X is an assignment of an invariant into DEST_REG, we set
6016 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
6018 We also want to detect a BIV when it corresponds to a variable
6019 whose mode was promoted via PROMOTED_MODE. In that case, an increment
6020 of the variable may be a PLUS that adds a SUBREG of that variable to
6021 an invariant and then sign- or zero-extends the result of the PLUS
6024 Most GIVs in such cases will be in the promoted mode, since that is the
6025 probably the natural computation mode (and almost certainly the mode
6026 used for addresses) on the machine. So we view the pseudo-reg containing
6027 the variable as the BIV, as if it were simply incremented.
6029 Note that treating the entire pseudo as a BIV will result in making
6030 simple increments to any GIVs based on it. However, if the variable
6031 overflows in its declared mode but not its promoted mode, the result will
6032 be incorrect. This is acceptable if the variable is signed, since
6033 overflows in such cases are undefined, but not if it is unsigned, since
6034 those overflows are defined. So we only check for SIGN_EXTEND and
6037 If we cannot find a biv, we return 0. */
6040 basic_induction_var (x, mode, dest_reg, p, level, inc_val, mult_val,
6041 location, multi_insn_incr)
6043 enum machine_mode mode;
6050 int *multi_insn_incr;
6052 register enum rtx_code code;
6056 code = GET_CODE (x);
6061 if (rtx_equal_p (XEXP (x, 0), dest_reg)
6062 || (GET_CODE (XEXP (x, 0)) == SUBREG
6063 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
6064 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
6066 argp = &XEXP (x, 1);
6068 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
6069 || (GET_CODE (XEXP (x, 1)) == SUBREG
6070 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
6071 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
6073 argp = &XEXP (x, 0);
6079 if (invariant_p (arg) != 1)
6082 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
6083 *mult_val = const1_rtx;
6088 /* If this is a SUBREG for a promoted variable, check the inner
6090 if (SUBREG_PROMOTED_VAR_P (x))
6091 return basic_induction_var (SUBREG_REG (x), GET_MODE (SUBREG_REG (x)),
6093 inc_val, mult_val, location,
6098 /* If this register is assigned in a previous insn, look at its
6099 source, but don't go outside the loop or past a label. */
6105 insn = PREV_INSN (insn);
6106 } while (insn && GET_CODE (insn) == NOTE
6107 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6111 set = single_set (insn);
6115 if ((SET_DEST (set) == x
6116 || (GET_CODE (SET_DEST (set)) == SUBREG
6117 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set)))
6119 && (GET_MODE_CLASS (GET_MODE (SET_DEST (set)))
6121 && SUBREG_REG (SET_DEST (set)) == x))
6122 && basic_induction_var (SET_SRC (set),
6123 (GET_MODE (SET_SRC (set)) == VOIDmode
6125 : GET_MODE (SET_SRC (set))),
6126 dest_reg, insn, level,
6127 inc_val, mult_val, location,
6130 *multi_insn_incr = 1;
6134 /* ... fall through ... */
6136 /* Can accept constant setting of biv only when inside inner most loop.
6137 Otherwise, a biv of an inner loop may be incorrectly recognized
6138 as a biv of the outer loop,
6139 causing code to be moved INTO the inner loop. */
6141 if (invariant_p (x) != 1)
6146 /* convert_modes aborts if we try to convert to or from CCmode, so just
6147 exclude that case. It is very unlikely that a condition code value
6148 would be a useful iterator anyways. */
6150 && GET_MODE_CLASS (mode) != MODE_CC
6151 && GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
6153 /* Possible bug here? Perhaps we don't know the mode of X. */
6154 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
6155 *mult_val = const0_rtx;
6162 return basic_induction_var (XEXP (x, 0), GET_MODE (XEXP (x, 0)),
6163 dest_reg, p, level, inc_val, mult_val,
6164 location, multi_insn_incr);
6167 /* Similar, since this can be a sign extension. */
6168 for (insn = PREV_INSN (p);
6169 (insn && GET_CODE (insn) == NOTE
6170 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6171 insn = PREV_INSN (insn))
6175 set = single_set (insn);
6177 if (set && SET_DEST (set) == XEXP (x, 0)
6178 && GET_CODE (XEXP (x, 1)) == CONST_INT
6179 && INTVAL (XEXP (x, 1)) >= 0
6180 && GET_CODE (SET_SRC (set)) == ASHIFT
6181 && XEXP (x, 1) == XEXP (SET_SRC (set), 1)
6182 && basic_induction_var (XEXP (SET_SRC (set), 0),
6183 GET_MODE (XEXP (x, 0)),
6184 dest_reg, insn, level, inc_val, mult_val,
6185 location, multi_insn_incr))
6187 *multi_insn_incr = 1;
6197 /* A general induction variable (giv) is any quantity that is a linear
6198 function of a basic induction variable,
6199 i.e. giv = biv * mult_val + add_val.
6200 The coefficients can be any loop invariant quantity.
6201 A giv need not be computed directly from the biv;
6202 it can be computed by way of other givs. */
6204 /* Determine whether X computes a giv.
6205 If it does, return a nonzero value
6206 which is the benefit from eliminating the computation of X;
6207 set *SRC_REG to the register of the biv that it is computed from;
6208 set *ADD_VAL and *MULT_VAL to the coefficients,
6209 such that the value of X is biv * mult + add; */
6212 general_induction_var (x, src_reg, add_val, mult_val, is_addr, pbenefit)
6223 /* If this is an invariant, forget it, it isn't a giv. */
6224 if (invariant_p (x) == 1)
6227 /* See if the expression could be a giv and get its form.
6228 Mark our place on the obstack in case we don't find a giv. */
6229 storage = (char *) oballoc (0);
6231 x = simplify_giv_expr (x, pbenefit);
6238 switch (GET_CODE (x))
6242 /* Since this is now an invariant and wasn't before, it must be a giv
6243 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6245 *src_reg = loop_iv_list->biv->dest_reg;
6246 *mult_val = const0_rtx;
6251 /* This is equivalent to a BIV. */
6253 *mult_val = const1_rtx;
6254 *add_val = const0_rtx;
6258 /* Either (plus (biv) (invar)) or
6259 (plus (mult (biv) (invar_1)) (invar_2)). */
6260 if (GET_CODE (XEXP (x, 0)) == MULT)
6262 *src_reg = XEXP (XEXP (x, 0), 0);
6263 *mult_val = XEXP (XEXP (x, 0), 1);
6267 *src_reg = XEXP (x, 0);
6268 *mult_val = const1_rtx;
6270 *add_val = XEXP (x, 1);
6274 /* ADD_VAL is zero. */
6275 *src_reg = XEXP (x, 0);
6276 *mult_val = XEXP (x, 1);
6277 *add_val = const0_rtx;
6284 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6285 unless they are CONST_INT). */
6286 if (GET_CODE (*add_val) == USE)
6287 *add_val = XEXP (*add_val, 0);
6288 if (GET_CODE (*mult_val) == USE)
6289 *mult_val = XEXP (*mult_val, 0);
6294 *pbenefit += ADDRESS_COST (orig_x) - reg_address_cost;
6296 *pbenefit += rtx_cost (orig_x, MEM) - reg_address_cost;
6300 *pbenefit += rtx_cost (orig_x, SET);
6302 /* Always return true if this is a giv so it will be detected as such,
6303 even if the benefit is zero or negative. This allows elimination
6304 of bivs that might otherwise not be eliminated. */
6308 /* Given an expression, X, try to form it as a linear function of a biv.
6309 We will canonicalize it to be of the form
6310 (plus (mult (BIV) (invar_1))
6312 with possible degeneracies.
6314 The invariant expressions must each be of a form that can be used as a
6315 machine operand. We surround then with a USE rtx (a hack, but localized
6316 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6317 routine; it is the caller's responsibility to strip them.
6319 If no such canonicalization is possible (i.e., two biv's are used or an
6320 expression that is neither invariant nor a biv or giv), this routine
6323 For a non-zero return, the result will have a code of CONST_INT, USE,
6324 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6326 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6328 static rtx sge_plus PARAMS ((enum machine_mode, rtx, rtx));
6329 static rtx sge_plus_constant PARAMS ((rtx, rtx));
6330 static int cmp_combine_givs_stats PARAMS ((const PTR, const PTR));
6331 static int cmp_recombine_givs_stats PARAMS ((const PTR, const PTR));
6334 simplify_giv_expr (x, benefit)
6338 enum machine_mode mode = GET_MODE (x);
6342 /* If this is not an integer mode, or if we cannot do arithmetic in this
6343 mode, this can't be a giv. */
6344 if (mode != VOIDmode
6345 && (GET_MODE_CLASS (mode) != MODE_INT
6346 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
6349 switch (GET_CODE (x))
6352 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
6353 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
6354 if (arg0 == 0 || arg1 == 0)
6357 /* Put constant last, CONST_INT last if both constant. */
6358 if ((GET_CODE (arg0) == USE
6359 || GET_CODE (arg0) == CONST_INT)
6360 && ! ((GET_CODE (arg0) == USE
6361 && GET_CODE (arg1) == USE)
6362 || GET_CODE (arg1) == CONST_INT))
6363 tem = arg0, arg0 = arg1, arg1 = tem;
6365 /* Handle addition of zero, then addition of an invariant. */
6366 if (arg1 == const0_rtx)
6368 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
6369 switch (GET_CODE (arg0))
6373 /* Adding two invariants must result in an invariant, so enclose
6374 addition operation inside a USE and return it. */
6375 if (GET_CODE (arg0) == USE)
6376 arg0 = XEXP (arg0, 0);
6377 if (GET_CODE (arg1) == USE)
6378 arg1 = XEXP (arg1, 0);
6380 if (GET_CODE (arg0) == CONST_INT)
6381 tem = arg0, arg0 = arg1, arg1 = tem;
6382 if (GET_CODE (arg1) == CONST_INT)
6383 tem = sge_plus_constant (arg0, arg1);
6385 tem = sge_plus (mode, arg0, arg1);
6387 if (GET_CODE (tem) != CONST_INT)
6388 tem = gen_rtx_USE (mode, tem);
6393 /* biv + invar or mult + invar. Return sum. */
6394 return gen_rtx_PLUS (mode, arg0, arg1);
6397 /* (a + invar_1) + invar_2. Associate. */
6399 simplify_giv_expr (gen_rtx_PLUS (mode,
6410 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6411 MULT to reduce cases. */
6412 if (GET_CODE (arg0) == REG)
6413 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
6414 if (GET_CODE (arg1) == REG)
6415 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
6417 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6418 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6419 Recurse to associate the second PLUS. */
6420 if (GET_CODE (arg1) == MULT)
6421 tem = arg0, arg0 = arg1, arg1 = tem;
6423 if (GET_CODE (arg1) == PLUS)
6425 simplify_giv_expr (gen_rtx_PLUS (mode,
6426 gen_rtx_PLUS (mode, arg0,
6431 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6432 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
6435 if (!rtx_equal_p (arg0, arg1))
6438 return simplify_giv_expr (gen_rtx_MULT (mode,
6446 /* Handle "a - b" as "a + b * (-1)". */
6447 return simplify_giv_expr (gen_rtx_PLUS (mode,
6455 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
6456 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
6457 if (arg0 == 0 || arg1 == 0)
6460 /* Put constant last, CONST_INT last if both constant. */
6461 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
6462 && GET_CODE (arg1) != CONST_INT)
6463 tem = arg0, arg0 = arg1, arg1 = tem;
6465 /* If second argument is not now constant, not giv. */
6466 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
6469 /* Handle multiply by 0 or 1. */
6470 if (arg1 == const0_rtx)
6473 else if (arg1 == const1_rtx)
6476 switch (GET_CODE (arg0))
6479 /* biv * invar. Done. */
6480 return gen_rtx_MULT (mode, arg0, arg1);
6483 /* Product of two constants. */
6484 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6487 /* invar * invar. It is a giv, but very few of these will
6488 actually pay off, so limit to simple registers. */
6489 if (GET_CODE (arg1) != CONST_INT)
6492 arg0 = XEXP (arg0, 0);
6493 if (GET_CODE (arg0) == REG)
6494 tem = gen_rtx_MULT (mode, arg0, arg1);
6495 else if (GET_CODE (arg0) == MULT
6496 && GET_CODE (XEXP (arg0, 0)) == REG
6497 && GET_CODE (XEXP (arg0, 1)) == CONST_INT)
6499 tem = gen_rtx_MULT (mode, XEXP (arg0, 0),
6500 GEN_INT (INTVAL (XEXP (arg0, 1))
6505 return gen_rtx_USE (mode, tem);
6508 /* (a * invar_1) * invar_2. Associate. */
6509 return simplify_giv_expr (gen_rtx_MULT (mode,
6517 /* (a + invar_1) * invar_2. Distribute. */
6518 return simplify_giv_expr (gen_rtx_PLUS (mode,
6532 /* Shift by constant is multiply by power of two. */
6533 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6537 simplify_giv_expr (gen_rtx_MULT (mode,
6539 GEN_INT ((HOST_WIDE_INT) 1
6540 << INTVAL (XEXP (x, 1)))),
6544 /* "-a" is "a * (-1)" */
6545 return simplify_giv_expr (gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6549 /* "~a" is "-a - 1". Silly, but easy. */
6550 return simplify_giv_expr (gen_rtx_MINUS (mode,
6551 gen_rtx_NEG (mode, XEXP (x, 0)),
6556 /* Already in proper form for invariant. */
6560 /* If this is a new register, we can't deal with it. */
6561 if (REGNO (x) >= max_reg_before_loop)
6564 /* Check for biv or giv. */
6565 switch (REG_IV_TYPE (REGNO (x)))
6569 case GENERAL_INDUCT:
6571 struct induction *v = REG_IV_INFO (REGNO (x));
6573 /* Form expression from giv and add benefit. Ensure this giv
6574 can derive another and subtract any needed adjustment if so. */
6575 *benefit += v->benefit;
6579 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode,
6580 v->src_reg, v->mult_val),
6583 if (v->derive_adjustment)
6584 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6585 return simplify_giv_expr (tem, benefit);
6589 /* If it isn't an induction variable, and it is invariant, we
6590 may be able to simplify things further by looking through
6591 the bits we just moved outside the loop. */
6592 if (invariant_p (x) == 1)
6596 for (m = the_movables; m ; m = m->next)
6597 if (rtx_equal_p (x, m->set_dest))
6599 /* Ok, we found a match. Substitute and simplify. */
6601 /* If we match another movable, we must use that, as
6602 this one is going away. */
6604 return simplify_giv_expr (m->match->set_dest, benefit);
6606 /* If consec is non-zero, this is a member of a group of
6607 instructions that were moved together. We handle this
6608 case only to the point of seeking to the last insn and
6609 looking for a REG_EQUAL. Fail if we don't find one. */
6614 do { tem = NEXT_INSN (tem); } while (--i > 0);
6616 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6618 tem = XEXP (tem, 0);
6622 tem = single_set (m->insn);
6624 tem = SET_SRC (tem);
6629 /* What we are most interested in is pointer
6630 arithmetic on invariants -- only take
6631 patterns we may be able to do something with. */
6632 if (GET_CODE (tem) == PLUS
6633 || GET_CODE (tem) == MULT
6634 || GET_CODE (tem) == ASHIFT
6635 || GET_CODE (tem) == CONST_INT
6636 || GET_CODE (tem) == SYMBOL_REF)
6638 tem = simplify_giv_expr (tem, benefit);
6642 else if (GET_CODE (tem) == CONST
6643 && GET_CODE (XEXP (tem, 0)) == PLUS
6644 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6645 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6647 tem = simplify_giv_expr (XEXP (tem, 0), benefit);
6658 /* Fall through to general case. */
6660 /* If invariant, return as USE (unless CONST_INT).
6661 Otherwise, not giv. */
6662 if (GET_CODE (x) == USE)
6665 if (invariant_p (x) == 1)
6667 if (GET_CODE (x) == CONST_INT)
6669 if (GET_CODE (x) == CONST
6670 && GET_CODE (XEXP (x, 0)) == PLUS
6671 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6672 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6674 return gen_rtx_USE (mode, x);
6681 /* This routine folds invariants such that there is only ever one
6682 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6685 sge_plus_constant (x, c)
6688 if (GET_CODE (x) == CONST_INT)
6689 return GEN_INT (INTVAL (x) + INTVAL (c));
6690 else if (GET_CODE (x) != PLUS)
6691 return gen_rtx_PLUS (GET_MODE (x), x, c);
6692 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6694 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6695 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6697 else if (GET_CODE (XEXP (x, 0)) == PLUS
6698 || GET_CODE (XEXP (x, 1)) != PLUS)
6700 return gen_rtx_PLUS (GET_MODE (x),
6701 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6705 return gen_rtx_PLUS (GET_MODE (x),
6706 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6711 sge_plus (mode, x, y)
6712 enum machine_mode mode;
6715 while (GET_CODE (y) == PLUS)
6717 rtx a = XEXP (y, 0);
6718 if (GET_CODE (a) == CONST_INT)
6719 x = sge_plus_constant (x, a);
6721 x = gen_rtx_PLUS (mode, x, a);
6724 if (GET_CODE (y) == CONST_INT)
6725 x = sge_plus_constant (x, y);
6727 x = gen_rtx_PLUS (mode, x, y);
6731 /* Help detect a giv that is calculated by several consecutive insns;
6735 The caller has already identified the first insn P as having a giv as dest;
6736 we check that all other insns that set the same register follow
6737 immediately after P, that they alter nothing else,
6738 and that the result of the last is still a giv.
6740 The value is 0 if the reg set in P is not really a giv.
6741 Otherwise, the value is the amount gained by eliminating
6742 all the consecutive insns that compute the value.
6744 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6745 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6747 The coefficients of the ultimate giv value are stored in
6748 *MULT_VAL and *ADD_VAL. */
6751 consec_sets_giv (first_benefit, p, src_reg, dest_reg,
6752 add_val, mult_val, last_consec_insn)
6759 rtx *last_consec_insn;
6767 /* Indicate that this is a giv so that we can update the value produced in
6768 each insn of the multi-insn sequence.
6770 This induction structure will be used only by the call to
6771 general_induction_var below, so we can allocate it on our stack.
6772 If this is a giv, our caller will replace the induct var entry with
6773 a new induction structure. */
6775 = (struct induction *) alloca (sizeof (struct induction));
6776 v->src_reg = src_reg;
6777 v->mult_val = *mult_val;
6778 v->add_val = *add_val;
6779 v->benefit = first_benefit;
6781 v->derive_adjustment = 0;
6783 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
6784 REG_IV_INFO (REGNO (dest_reg)) = v;
6786 count = VARRAY_INT (n_times_set, REGNO (dest_reg)) - 1;
6791 code = GET_CODE (p);
6793 /* If libcall, skip to end of call sequence. */
6794 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6798 && (set = single_set (p))
6799 && GET_CODE (SET_DEST (set)) == REG
6800 && SET_DEST (set) == dest_reg
6801 && (general_induction_var (SET_SRC (set), &src_reg,
6802 add_val, mult_val, 0, &benefit)
6803 /* Giv created by equivalent expression. */
6804 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6805 && general_induction_var (XEXP (temp, 0), &src_reg,
6806 add_val, mult_val, 0, &benefit)))
6807 && src_reg == v->src_reg)
6809 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6810 benefit += libcall_benefit (p);
6813 v->mult_val = *mult_val;
6814 v->add_val = *add_val;
6815 v->benefit = benefit;
6817 else if (code != NOTE)
6819 /* Allow insns that set something other than this giv to a
6820 constant. Such insns are needed on machines which cannot
6821 include long constants and should not disqualify a giv. */
6823 && (set = single_set (p))
6824 && SET_DEST (set) != dest_reg
6825 && CONSTANT_P (SET_SRC (set)))
6828 REG_IV_TYPE (REGNO (dest_reg)) = UNKNOWN_INDUCT;
6833 *last_consec_insn = p;
6837 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6838 represented by G1. If no such expression can be found, or it is clear that
6839 it cannot possibly be a valid address, 0 is returned.
6841 To perform the computation, we note that
6844 where `v' is the biv.
6846 So G2 = (y/b) * G1 + (b - a*y/x).
6848 Note that MULT = y/x.
6850 Update: A and B are now allowed to be additive expressions such that
6851 B contains all variables in A. That is, computing B-A will not require
6852 subtracting variables. */
6855 express_from_1 (a, b, mult)
6858 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6860 if (mult == const0_rtx)
6863 /* If MULT is not 1, we cannot handle A with non-constants, since we
6864 would then be required to subtract multiples of the registers in A.
6865 This is theoretically possible, and may even apply to some Fortran
6866 constructs, but it is a lot of work and we do not attempt it here. */
6868 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
6871 /* In general these structures are sorted top to bottom (down the PLUS
6872 chain), but not left to right across the PLUS. If B is a higher
6873 order giv than A, we can strip one level and recurse. If A is higher
6874 order, we'll eventually bail out, but won't know that until the end.
6875 If they are the same, we'll strip one level around this loop. */
6877 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
6879 rtx ra, rb, oa, ob, tmp;
6881 ra = XEXP (a, 0), oa = XEXP (a, 1);
6882 if (GET_CODE (ra) == PLUS)
6883 tmp = ra, ra = oa, oa = tmp;
6885 rb = XEXP (b, 0), ob = XEXP (b, 1);
6886 if (GET_CODE (rb) == PLUS)
6887 tmp = rb, rb = ob, ob = tmp;
6889 if (rtx_equal_p (ra, rb))
6890 /* We matched: remove one reg completely. */
6892 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
6893 /* An alternate match. */
6895 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
6896 /* An alternate match. */
6900 /* Indicates an extra register in B. Strip one level from B and
6901 recurse, hoping B was the higher order expression. */
6902 ob = express_from_1 (a, ob, mult);
6905 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
6909 /* Here we are at the last level of A, go through the cases hoping to
6910 get rid of everything but a constant. */
6912 if (GET_CODE (a) == PLUS)
6916 ra = XEXP (a, 0), oa = XEXP (a, 1);
6917 if (rtx_equal_p (oa, b))
6919 else if (!rtx_equal_p (ra, b))
6922 if (GET_CODE (oa) != CONST_INT)
6925 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
6927 else if (GET_CODE (a) == CONST_INT)
6929 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
6931 else if (GET_CODE (b) == PLUS)
6933 if (rtx_equal_p (a, XEXP (b, 0)))
6935 else if (rtx_equal_p (a, XEXP (b, 1)))
6940 else if (rtx_equal_p (a, b))
6947 express_from (g1, g2)
6948 struct induction *g1, *g2;
6952 /* The value that G1 will be multiplied by must be a constant integer. Also,
6953 the only chance we have of getting a valid address is if b*c/a (see above
6954 for notation) is also an integer. */
6955 if (GET_CODE (g1->mult_val) == CONST_INT
6956 && GET_CODE (g2->mult_val) == CONST_INT)
6958 if (g1->mult_val == const0_rtx
6959 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
6961 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
6963 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
6967 /* ??? Find out if the one is a multiple of the other? */
6971 add = express_from_1 (g1->add_val, g2->add_val, mult);
6972 if (add == NULL_RTX)
6974 /* Failed. If we've got a multiplication factor between G1 and G2,
6975 scale G1's addend and try again. */
6976 if (INTVAL (mult) > 1)
6978 rtx g1_add_val = g1->add_val;
6979 if (GET_CODE (g1_add_val) == MULT
6980 && GET_CODE (XEXP (g1_add_val, 1)) == CONST_INT)
6983 m = INTVAL (mult) * INTVAL (XEXP (g1_add_val, 1));
6984 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val),
6985 XEXP (g1_add_val, 0), GEN_INT (m));
6989 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val), g1_add_val,
6993 add = express_from_1 (g1_add_val, g2->add_val, const1_rtx);
6996 if (add == NULL_RTX)
6999 /* Form simplified final result. */
7000 if (mult == const0_rtx)
7002 else if (mult == const1_rtx)
7003 mult = g1->dest_reg;
7005 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
7007 if (add == const0_rtx)
7011 if (GET_CODE (add) == PLUS
7012 && CONSTANT_P (XEXP (add, 1)))
7014 rtx tem = XEXP (add, 1);
7015 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
7019 return gen_rtx_PLUS (g2->mode, mult, add);
7024 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7025 represented by G1. This indicates that G2 should be combined with G1 and
7026 that G2 can use (either directly or via an address expression) a register
7027 used to represent G1. */
7030 combine_givs_p (g1, g2)
7031 struct induction *g1, *g2;
7033 rtx tem = express_from (g1, g2);
7035 /* If these givs are identical, they can be combined. We use the results
7036 of express_from because the addends are not in a canonical form, so
7037 rtx_equal_p is a weaker test. */
7038 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
7039 combination to be the other way round. */
7040 if (tem == g1->dest_reg
7041 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
7043 return g1->dest_reg;
7046 /* If G2 can be expressed as a function of G1 and that function is valid
7047 as an address and no more expensive than using a register for G2,
7048 the expression of G2 in terms of G1 can be used. */
7050 && g2->giv_type == DEST_ADDR
7051 && memory_address_p (g2->mem_mode, tem)
7052 /* ??? Looses, especially with -fforce-addr, where *g2->location
7053 will always be a register, and so anything more complicated
7057 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
7059 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
7070 struct combine_givs_stats
7077 cmp_combine_givs_stats (xp, yp)
7081 const struct combine_givs_stats * const x =
7082 (const struct combine_givs_stats *) xp;
7083 const struct combine_givs_stats * const y =
7084 (const struct combine_givs_stats *) yp;
7086 d = y->total_benefit - x->total_benefit;
7087 /* Stabilize the sort. */
7089 d = x->giv_number - y->giv_number;
7093 /* Check all pairs of givs for iv_class BL and see if any can be combined with
7094 any other. If so, point SAME to the giv combined with and set NEW_REG to
7095 be an expression (in terms of the other giv's DEST_REG) equivalent to the
7096 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
7100 struct iv_class *bl;
7102 /* Additional benefit to add for being combined multiple times. */
7103 const int extra_benefit = 3;
7105 struct induction *g1, *g2, **giv_array;
7106 int i, j, k, giv_count;
7107 struct combine_givs_stats *stats;
7110 /* Count givs, because bl->giv_count is incorrect here. */
7112 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7117 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
7119 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7121 giv_array[i++] = g1;
7123 stats = (struct combine_givs_stats *) xcalloc (giv_count, sizeof (*stats));
7124 can_combine = (rtx *) xcalloc (giv_count, giv_count * sizeof(rtx));
7126 for (i = 0; i < giv_count; i++)
7132 stats[i].giv_number = i;
7134 /* If a DEST_REG GIV is used only once, do not allow it to combine
7135 with anything, for in doing so we will gain nothing that cannot
7136 be had by simply letting the GIV with which we would have combined
7137 to be reduced on its own. The losage shows up in particular with
7138 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7139 be seen elsewhere as well. */
7140 if (g1->giv_type == DEST_REG
7141 && (single_use = VARRAY_RTX (reg_single_usage, REGNO (g1->dest_reg)))
7142 && single_use != const0_rtx)
7145 this_benefit = g1->benefit;
7146 /* Add an additional weight for zero addends. */
7147 if (g1->no_const_addval)
7150 for (j = 0; j < giv_count; j++)
7156 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
7158 can_combine[i*giv_count + j] = this_combine;
7159 this_benefit += g2->benefit + extra_benefit;
7162 stats[i].total_benefit = this_benefit;
7165 /* Iterate, combining until we can't. */
7167 qsort (stats, giv_count, sizeof(*stats), cmp_combine_givs_stats);
7169 if (loop_dump_stream)
7171 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
7172 for (k = 0; k < giv_count; k++)
7174 g1 = giv_array[stats[k].giv_number];
7175 if (!g1->combined_with && !g1->same)
7176 fprintf (loop_dump_stream, " {%d, %d}",
7177 INSN_UID (giv_array[stats[k].giv_number]->insn),
7178 stats[k].total_benefit);
7180 putc ('\n', loop_dump_stream);
7183 for (k = 0; k < giv_count; k++)
7185 int g1_add_benefit = 0;
7187 i = stats[k].giv_number;
7190 /* If it has already been combined, skip. */
7191 if (g1->combined_with || g1->same)
7194 for (j = 0; j < giv_count; j++)
7197 if (g1 != g2 && can_combine[i*giv_count + j]
7198 /* If it has already been combined, skip. */
7199 && ! g2->same && ! g2->combined_with)
7203 g2->new_reg = can_combine[i*giv_count + j];
7205 g1->combined_with++;
7206 g1->lifetime += g2->lifetime;
7208 g1_add_benefit += g2->benefit;
7210 /* ??? The new final_[bg]iv_value code does a much better job
7211 of finding replaceable giv's, and hence this code may no
7212 longer be necessary. */
7213 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
7214 g1_add_benefit -= copy_cost;
7216 /* To help optimize the next set of combinations, remove
7217 this giv from the benefits of other potential mates. */
7218 for (l = 0; l < giv_count; ++l)
7220 int m = stats[l].giv_number;
7221 if (can_combine[m*giv_count + j])
7222 stats[l].total_benefit -= g2->benefit + extra_benefit;
7225 if (loop_dump_stream)
7226 fprintf (loop_dump_stream,
7227 "giv at %d combined with giv at %d\n",
7228 INSN_UID (g2->insn), INSN_UID (g1->insn));
7232 /* To help optimize the next set of combinations, remove
7233 this giv from the benefits of other potential mates. */
7234 if (g1->combined_with)
7236 for (j = 0; j < giv_count; ++j)
7238 int m = stats[j].giv_number;
7239 if (can_combine[m*giv_count + i])
7240 stats[j].total_benefit -= g1->benefit + extra_benefit;
7243 g1->benefit += g1_add_benefit;
7245 /* We've finished with this giv, and everything it touched.
7246 Restart the combination so that proper weights for the
7247 rest of the givs are properly taken into account. */
7248 /* ??? Ideally we would compact the arrays at this point, so
7249 as to not cover old ground. But sanely compacting
7250 can_combine is tricky. */
7260 struct recombine_givs_stats
7263 int start_luid, end_luid;
7266 /* Used below as comparison function for qsort. We want a ascending luid
7267 when scanning the array starting at the end, thus the arguments are
7270 cmp_recombine_givs_stats (xp, yp)
7274 const struct recombine_givs_stats * const x =
7275 (const struct recombine_givs_stats *) xp;
7276 const struct recombine_givs_stats * const y =
7277 (const struct recombine_givs_stats *) yp;
7279 d = y->start_luid - x->start_luid;
7280 /* Stabilize the sort. */
7282 d = y->giv_number - x->giv_number;
7286 /* Scan X, which is a part of INSN, for the end of life of a giv. Also
7287 look for the start of life of a giv where the start has not been seen
7288 yet to unlock the search for the end of its life.
7289 Only consider givs that belong to BIV.
7290 Return the total number of lifetime ends that have been found. */
7292 find_life_end (x, stats, insn, biv)
7294 struct recombine_givs_stats *stats;
7301 code = GET_CODE (x);
7306 rtx reg = SET_DEST (x);
7307 if (GET_CODE (reg) == REG)
7309 int regno = REGNO (reg);
7310 struct induction *v = REG_IV_INFO (regno);
7312 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7314 && v->src_reg == biv
7315 && stats[v->ix].end_luid <= 0)
7317 /* If we see a 0 here for end_luid, it means that we have
7318 scanned the entire loop without finding any use at all.
7319 We must not predicate this code on a start_luid match
7320 since that would make the test fail for givs that have
7321 been hoisted out of inner loops. */
7322 if (stats[v->ix].end_luid == 0)
7324 stats[v->ix].end_luid = stats[v->ix].start_luid;
7325 return 1 + find_life_end (SET_SRC (x), stats, insn, biv);
7327 else if (stats[v->ix].start_luid == INSN_LUID (insn))
7328 stats[v->ix].end_luid = 0;
7330 return find_life_end (SET_SRC (x), stats, insn, biv);
7336 int regno = REGNO (x);
7337 struct induction *v = REG_IV_INFO (regno);
7339 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7341 && v->src_reg == biv
7342 && stats[v->ix].end_luid == 0)
7344 while (INSN_UID (insn) >= max_uid_for_loop)
7345 insn = NEXT_INSN (insn);
7346 stats[v->ix].end_luid = INSN_LUID (insn);
7359 fmt = GET_RTX_FORMAT (code);
7361 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7364 retval += find_life_end (XEXP (x, i), stats, insn, biv);
7366 else if (fmt[i] == 'E')
7367 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7368 retval += find_life_end (XVECEXP (x, i, j), stats, insn, biv);
7373 /* For each giv that has been combined with another, look if
7374 we can combine it with the most recently used one instead.
7375 This tends to shorten giv lifetimes, and helps the next step:
7376 try to derive givs from other givs. */
7378 recombine_givs (bl, loop_start, loop_end, unroll_p)
7379 struct iv_class *bl;
7380 rtx loop_start, loop_end;
7383 struct induction *v, **giv_array, *last_giv;
7384 struct recombine_givs_stats *stats;
7387 int ends_need_computing;
7389 for (giv_count = 0, v = bl->giv; v; v = v->next_iv)
7395 = (struct induction **) xmalloc (giv_count * sizeof (struct induction *));
7396 stats = (struct recombine_givs_stats *) xmalloc (giv_count * sizeof *stats);
7398 /* Initialize stats and set up the ix field for each giv in stats to name
7399 the corresponding index into stats. */
7400 for (i = 0, v = bl->giv; v; v = v->next_iv)
7407 stats[i].giv_number = i;
7408 /* If this giv has been hoisted out of an inner loop, use the luid of
7409 the previous insn. */
7410 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7412 stats[i].start_luid = INSN_LUID (p);
7416 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7418 /* Set up the ix field for each giv in stats to name
7419 the corresponding index into stats, and
7420 do the actual most-recently-used recombination. */
7421 for (last_giv = 0, i = giv_count - 1; i >= 0; i--)
7423 v = giv_array[stats[i].giv_number];
7427 struct induction *old_same = v->same;
7430 /* combine_givs_p actually says if we can make this transformation.
7431 The other tests are here only to avoid keeping a giv alive
7432 that could otherwise be eliminated. */
7434 && ((old_same->maybe_dead && ! old_same->combined_with)
7435 || ! last_giv->maybe_dead
7436 || last_giv->combined_with)
7437 && (new_combine = combine_givs_p (last_giv, v)))
7439 old_same->combined_with--;
7440 v->new_reg = new_combine;
7442 last_giv->combined_with++;
7443 /* No need to update lifetimes / benefits here since we have
7444 already decided what to reduce. */
7446 if (loop_dump_stream)
7448 fprintf (loop_dump_stream,
7449 "giv at %d recombined with giv at %d as ",
7450 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7451 print_rtl (loop_dump_stream, v->new_reg);
7452 putc ('\n', loop_dump_stream);
7458 else if (v->giv_type != DEST_REG)
7461 || (last_giv->maybe_dead && ! last_giv->combined_with)
7463 || v->combined_with)
7467 ends_need_computing = 0;
7468 /* For each DEST_REG giv, compute lifetime starts, and try to compute
7469 lifetime ends from regscan info. */
7470 for (i = giv_count - 1; i >= 0; i--)
7472 v = giv_array[stats[i].giv_number];
7475 if (v->giv_type == DEST_ADDR)
7477 /* Loop unrolling of an inner loop can even create new DEST_REG
7480 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7482 stats[i].start_luid = stats[i].end_luid = INSN_LUID (p);
7484 stats[i].end_luid++;
7486 else /* v->giv_type == DEST_REG */
7490 stats[i].start_luid = INSN_LUID (v->insn);
7491 stats[i].end_luid = INSN_LUID (v->last_use);
7493 else if (INSN_UID (v->insn) >= max_uid_for_loop)
7496 /* This insn has been created by loop optimization on an inner
7497 loop. We don't have a proper start_luid that will match
7498 when we see the first set. But we do know that there will
7499 be no use before the set, so we can set end_luid to 0 so that
7500 we'll start looking for the last use right away. */
7501 for (p = PREV_INSN (v->insn); INSN_UID (p) >= max_uid_for_loop; )
7503 stats[i].start_luid = INSN_LUID (p);
7504 stats[i].end_luid = 0;
7505 ends_need_computing++;
7509 int regno = REGNO (v->dest_reg);
7510 int count = VARRAY_INT (n_times_set, regno) - 1;
7513 /* Find the first insn that sets the giv, so that we can verify
7514 if this giv's lifetime wraps around the loop. We also need
7515 the luid of the first setting insn in order to detect the
7516 last use properly. */
7519 p = prev_nonnote_insn (p);
7520 if (reg_set_p (v->dest_reg, p))
7524 stats[i].start_luid = INSN_LUID (p);
7525 if (stats[i].start_luid > uid_luid[REGNO_FIRST_UID (regno)])
7527 stats[i].end_luid = -1;
7528 ends_need_computing++;
7532 stats[i].end_luid = uid_luid[REGNO_LAST_UID (regno)];
7533 if (stats[i].end_luid > INSN_LUID (loop_end))
7535 stats[i].end_luid = -1;
7536 ends_need_computing++;
7543 /* If the regscan information was unconclusive for one or more DEST_REG
7544 givs, scan the all insn in the loop to find out lifetime ends. */
7545 if (ends_need_computing)
7547 rtx biv = bl->biv->src_reg;
7552 if (p == loop_start)
7555 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
7557 ends_need_computing -= find_life_end (PATTERN (p), stats, p, biv);
7559 while (ends_need_computing);
7562 /* Set start_luid back to the last insn that sets the giv. This allows
7563 more combinations. */
7564 for (i = giv_count - 1; i >= 0; i--)
7566 v = giv_array[stats[i].giv_number];
7569 if (INSN_UID (v->insn) < max_uid_for_loop)
7570 stats[i].start_luid = INSN_LUID (v->insn);
7573 /* Now adjust lifetime ends by taking combined givs into account. */
7574 for (i = giv_count - 1; i >= 0; i--)
7579 v = giv_array[stats[i].giv_number];
7582 if (v->same && ! v->same->ignore)
7585 luid = stats[i].start_luid;
7586 /* Use unsigned arithmetic to model loop wrap-around. */
7587 if (luid - stats[j].start_luid
7588 > (unsigned) stats[j].end_luid - stats[j].start_luid)
7589 stats[j].end_luid = luid;
7593 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7595 /* Try to derive DEST_REG givs from previous DEST_REG givs with the
7596 same mult_val and non-overlapping lifetime. This reduces register
7598 Once we find a DEST_REG giv that is suitable to derive others from,
7599 we set last_giv to this giv, and try to derive as many other DEST_REG
7600 givs from it without joining overlapping lifetimes. If we then
7601 encounter a DEST_REG giv that we can't derive, we set rescan to the
7602 index for this giv (unless rescan is already set).
7603 When we are finished with the current LAST_GIV (i.e. the inner loop
7604 terminates), we start again with rescan, which then becomes the new
7606 for (i = giv_count - 1; i >= 0; i = rescan)
7608 int life_start = 0, life_end = 0;
7610 for (last_giv = 0, rescan = -1; i >= 0; i--)
7614 v = giv_array[stats[i].giv_number];
7615 if (v->giv_type != DEST_REG || v->derived_from || v->same)
7619 /* Don't use a giv that's likely to be dead to derive
7620 others - that would be likely to keep that giv alive. */
7621 if (! v->maybe_dead || v->combined_with)
7624 life_start = stats[i].start_luid;
7625 life_end = stats[i].end_luid;
7629 /* Use unsigned arithmetic to model loop wrap around. */
7630 if (((unsigned) stats[i].start_luid - life_start
7631 >= (unsigned) life_end - life_start)
7632 && ((unsigned) stats[i].end_luid - life_start
7633 > (unsigned) life_end - life_start)
7634 /* Check that the giv insn we're about to use for deriving
7635 precedes all uses of that giv. Note that initializing the
7636 derived giv would defeat the purpose of reducing register
7638 ??? We could arrange to move the insn. */
7639 && ((unsigned) stats[i].end_luid - INSN_LUID (loop_start)
7640 > (unsigned) stats[i].start_luid - INSN_LUID (loop_start))
7641 && rtx_equal_p (last_giv->mult_val, v->mult_val)
7642 /* ??? Could handle libcalls, but would need more logic. */
7643 && ! find_reg_note (v->insn, REG_RETVAL, NULL_RTX)
7644 /* We would really like to know if for any giv that v
7645 is combined with, v->insn or any intervening biv increment
7646 dominates that combined giv. However, we
7647 don't have this detailed control flow information.
7648 N.B. since last_giv will be reduced, it is valid
7649 anywhere in the loop, so we don't need to check the
7650 validity of last_giv.
7651 We rely here on the fact that v->always_executed implies that
7652 there is no jump to someplace else in the loop before the
7653 giv insn, and hence any insn that is executed before the
7654 giv insn in the loop will have a lower luid. */
7655 && (v->always_executed || ! v->combined_with)
7656 && (sum = express_from (last_giv, v))
7657 /* Make sure we don't make the add more expensive. ADD_COST
7658 doesn't take different costs of registers and constants into
7659 account, so compare the cost of the actual SET_SRCs. */
7660 && (rtx_cost (sum, SET)
7661 <= rtx_cost (SET_SRC (single_set (v->insn)), SET))
7662 /* ??? unroll can't understand anything but reg + const_int
7663 sums. It would be cleaner to fix unroll. */
7664 && ((GET_CODE (sum) == PLUS
7665 && GET_CODE (XEXP (sum, 0)) == REG
7666 && GET_CODE (XEXP (sum, 1)) == CONST_INT)
7668 && validate_change (v->insn, &PATTERN (v->insn),
7669 gen_rtx_SET (VOIDmode, v->dest_reg, sum), 0))
7671 v->derived_from = last_giv;
7672 life_end = stats[i].end_luid;
7674 if (loop_dump_stream)
7676 fprintf (loop_dump_stream,
7677 "giv at %d derived from %d as ",
7678 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7679 print_rtl (loop_dump_stream, sum);
7680 putc ('\n', loop_dump_stream);
7683 else if (rescan < 0)
7693 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
7696 emit_iv_add_mult (b, m, a, reg, insert_before)
7697 rtx b; /* initial value of basic induction variable */
7698 rtx m; /* multiplicative constant */
7699 rtx a; /* additive constant */
7700 rtx reg; /* destination register */
7706 /* Prevent unexpected sharing of these rtx. */
7710 /* Increase the lifetime of any invariants moved further in code. */
7711 update_reg_last_use (a, insert_before);
7712 update_reg_last_use (b, insert_before);
7713 update_reg_last_use (m, insert_before);
7716 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
7718 emit_move_insn (reg, result);
7719 seq = gen_sequence ();
7722 emit_insn_before (seq, insert_before);
7724 /* It is entirely possible that the expansion created lots of new
7725 registers. Iterate over the sequence we just created and
7728 if (GET_CODE (seq) == SEQUENCE)
7731 for (i = 0; i < XVECLEN (seq, 0); ++i)
7733 rtx set = single_set (XVECEXP (seq, 0, i));
7734 if (set && GET_CODE (SET_DEST (set)) == REG)
7735 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7738 else if (GET_CODE (seq) == SET
7739 && GET_CODE (SET_DEST (seq)) == REG)
7740 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
7743 /* Test whether A * B can be computed without
7744 an actual multiply insn. Value is 1 if so. */
7747 product_cheap_p (a, b)
7753 struct obstack *old_rtl_obstack = rtl_obstack;
7754 char *storage = (char *) obstack_alloc (&temp_obstack, 0);
7757 /* If only one is constant, make it B. */
7758 if (GET_CODE (a) == CONST_INT)
7759 tmp = a, a = b, b = tmp;
7761 /* If first constant, both constant, so don't need multiply. */
7762 if (GET_CODE (a) == CONST_INT)
7765 /* If second not constant, neither is constant, so would need multiply. */
7766 if (GET_CODE (b) != CONST_INT)
7769 /* One operand is constant, so might not need multiply insn. Generate the
7770 code for the multiply and see if a call or multiply, or long sequence
7771 of insns is generated. */
7773 rtl_obstack = &temp_obstack;
7775 expand_mult (GET_MODE (a), a, b, NULL_RTX, 0);
7776 tmp = gen_sequence ();
7779 if (GET_CODE (tmp) == SEQUENCE)
7781 if (XVEC (tmp, 0) == 0)
7783 else if (XVECLEN (tmp, 0) > 3)
7786 for (i = 0; i < XVECLEN (tmp, 0); i++)
7788 rtx insn = XVECEXP (tmp, 0, i);
7790 if (GET_CODE (insn) != INSN
7791 || (GET_CODE (PATTERN (insn)) == SET
7792 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7793 || (GET_CODE (PATTERN (insn)) == PARALLEL
7794 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7795 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7802 else if (GET_CODE (tmp) == SET
7803 && GET_CODE (SET_SRC (tmp)) == MULT)
7805 else if (GET_CODE (tmp) == PARALLEL
7806 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7807 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7810 /* Free any storage we obtained in generating this multiply and restore rtl
7811 allocation to its normal obstack. */
7812 obstack_free (&temp_obstack, storage);
7813 rtl_obstack = old_rtl_obstack;
7818 /* Check to see if loop can be terminated by a "decrement and branch until
7819 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7820 Also try reversing an increment loop to a decrement loop
7821 to see if the optimization can be performed.
7822 Value is nonzero if optimization was performed. */
7824 /* This is useful even if the architecture doesn't have such an insn,
7825 because it might change a loops which increments from 0 to n to a loop
7826 which decrements from n to 0. A loop that decrements to zero is usually
7827 faster than one that increments from zero. */
7829 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7830 such as approx_final_value, biv_total_increment, loop_iterations, and
7831 final_[bg]iv_value. */
7834 check_dbra_loop (loop, insn_count)
7838 struct iv_class *bl;
7845 rtx before_comparison;
7849 int compare_and_branch;
7850 rtx loop_start = loop->start;
7851 rtx loop_end = loop->end;
7852 struct loop_info *loop_info = loop->info;
7854 /* If last insn is a conditional branch, and the insn before tests a
7855 register value, try to optimize it. Otherwise, we can't do anything. */
7857 jump = PREV_INSN (loop_end);
7858 comparison = get_condition_for_loop (jump);
7859 if (comparison == 0)
7862 /* Try to compute whether the compare/branch at the loop end is one or
7863 two instructions. */
7864 get_condition (jump, &first_compare);
7865 if (first_compare == jump)
7866 compare_and_branch = 1;
7867 else if (first_compare == prev_nonnote_insn (jump))
7868 compare_and_branch = 2;
7872 /* Check all of the bivs to see if the compare uses one of them.
7873 Skip biv's set more than once because we can't guarantee that
7874 it will be zero on the last iteration. Also skip if the biv is
7875 used between its update and the test insn. */
7877 for (bl = loop_iv_list; bl; bl = bl->next)
7879 if (bl->biv_count == 1
7880 && ! bl->biv->maybe_multiple
7881 && bl->biv->dest_reg == XEXP (comparison, 0)
7882 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
7890 /* Look for the case where the basic induction variable is always
7891 nonnegative, and equals zero on the last iteration.
7892 In this case, add a reg_note REG_NONNEG, which allows the
7893 m68k DBRA instruction to be used. */
7895 if (((GET_CODE (comparison) == GT
7896 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
7897 && INTVAL (XEXP (comparison, 1)) == -1)
7898 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
7899 && GET_CODE (bl->biv->add_val) == CONST_INT
7900 && INTVAL (bl->biv->add_val) < 0)
7902 /* Initial value must be greater than 0,
7903 init_val % -dec_value == 0 to ensure that it equals zero on
7904 the last iteration */
7906 if (GET_CODE (bl->initial_value) == CONST_INT
7907 && INTVAL (bl->initial_value) > 0
7908 && (INTVAL (bl->initial_value)
7909 % (-INTVAL (bl->biv->add_val))) == 0)
7911 /* register always nonnegative, add REG_NOTE to branch */
7912 REG_NOTES (PREV_INSN (loop_end))
7913 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7914 REG_NOTES (PREV_INSN (loop_end)));
7920 /* If the decrement is 1 and the value was tested as >= 0 before
7921 the loop, then we can safely optimize. */
7922 for (p = loop_start; p; p = PREV_INSN (p))
7924 if (GET_CODE (p) == CODE_LABEL)
7926 if (GET_CODE (p) != JUMP_INSN)
7929 before_comparison = get_condition_for_loop (p);
7930 if (before_comparison
7931 && XEXP (before_comparison, 0) == bl->biv->dest_reg
7932 && GET_CODE (before_comparison) == LT
7933 && XEXP (before_comparison, 1) == const0_rtx
7934 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
7935 && INTVAL (bl->biv->add_val) == -1)
7937 REG_NOTES (PREV_INSN (loop_end))
7938 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7939 REG_NOTES (PREV_INSN (loop_end)));
7946 else if (GET_CODE (bl->biv->add_val) == CONST_INT
7947 && INTVAL (bl->biv->add_val) > 0)
7949 /* Try to change inc to dec, so can apply above optimization. */
7951 all registers modified are induction variables or invariant,
7952 all memory references have non-overlapping addresses
7953 (obviously true if only one write)
7954 allow 2 insns for the compare/jump at the end of the loop. */
7955 /* Also, we must avoid any instructions which use both the reversed
7956 biv and another biv. Such instructions will fail if the loop is
7957 reversed. We meet this condition by requiring that either
7958 no_use_except_counting is true, or else that there is only
7960 int num_nonfixed_reads = 0;
7961 /* 1 if the iteration var is used only to count iterations. */
7962 int no_use_except_counting = 0;
7963 /* 1 if the loop has no memory store, or it has a single memory store
7964 which is reversible. */
7965 int reversible_mem_store = 1;
7967 if (bl->giv_count == 0
7968 && ! uid_loop[INSN_UID (loop_start)]->exit_count)
7970 rtx bivreg = regno_reg_rtx[bl->regno];
7972 /* If there are no givs for this biv, and the only exit is the
7973 fall through at the end of the loop, then
7974 see if perhaps there are no uses except to count. */
7975 no_use_except_counting = 1;
7976 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7977 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
7979 rtx set = single_set (p);
7981 if (set && GET_CODE (SET_DEST (set)) == REG
7982 && REGNO (SET_DEST (set)) == bl->regno)
7983 /* An insn that sets the biv is okay. */
7985 else if ((p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
7986 || p == prev_nonnote_insn (loop_end))
7987 && reg_mentioned_p (bivreg, PATTERN (p)))
7989 /* If either of these insns uses the biv and sets a pseudo
7990 that has more than one usage, then the biv has uses
7991 other than counting since it's used to derive a value
7992 that is used more than one time. */
7993 int note_set_pseudo_multiple_uses_retval = 0;
7994 note_stores (PATTERN (p), note_set_pseudo_multiple_uses,
7995 ¬e_set_pseudo_multiple_uses_retval);
7996 if (note_set_pseudo_multiple_uses_retval)
7998 no_use_except_counting = 0;
8002 else if (reg_mentioned_p (bivreg, PATTERN (p)))
8004 no_use_except_counting = 0;
8010 if (no_use_except_counting)
8011 ; /* no need to worry about MEMs. */
8012 else if (num_mem_sets <= 1)
8014 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8015 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
8016 num_nonfixed_reads += count_nonfixed_reads (PATTERN (p));
8018 /* If the loop has a single store, and the destination address is
8019 invariant, then we can't reverse the loop, because this address
8020 might then have the wrong value at loop exit.
8021 This would work if the source was invariant also, however, in that
8022 case, the insn should have been moved out of the loop. */
8024 if (num_mem_sets == 1)
8026 struct induction *v;
8028 reversible_mem_store
8029 = (! unknown_address_altered
8030 && ! unknown_constant_address_altered
8031 && ! invariant_p (XEXP (XEXP (loop_store_mems, 0), 0)));
8033 /* If the store depends on a register that is set after the
8034 store, it depends on the initial value, and is thus not
8036 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
8038 if (v->giv_type == DEST_REG
8039 && reg_mentioned_p (v->dest_reg,
8040 XEXP (loop_store_mems, 0))
8041 && loop_insn_first_p (first_loop_store_insn, v->insn))
8042 reversible_mem_store = 0;
8049 /* This code only acts for innermost loops. Also it simplifies
8050 the memory address check by only reversing loops with
8051 zero or one memory access.
8052 Two memory accesses could involve parts of the same array,
8053 and that can't be reversed.
8054 If the biv is used only for counting, than we don't need to worry
8055 about all these things. */
8057 if ((num_nonfixed_reads <= 1
8058 && ! loop_info->has_call
8059 && ! loop_info->has_volatile
8060 && reversible_mem_store
8061 && (bl->giv_count + bl->biv_count + num_mem_sets
8062 + num_movables + compare_and_branch == insn_count)
8063 && (bl == loop_iv_list && bl->next == 0))
8064 || no_use_except_counting)
8068 /* Loop can be reversed. */
8069 if (loop_dump_stream)
8070 fprintf (loop_dump_stream, "Can reverse loop\n");
8072 /* Now check other conditions:
8074 The increment must be a constant, as must the initial value,
8075 and the comparison code must be LT.
8077 This test can probably be improved since +/- 1 in the constant
8078 can be obtained by changing LT to LE and vice versa; this is
8082 /* for constants, LE gets turned into LT */
8083 && (GET_CODE (comparison) == LT
8084 || (GET_CODE (comparison) == LE
8085 && no_use_except_counting)))
8087 HOST_WIDE_INT add_val, add_adjust, comparison_val = 0;
8088 rtx initial_value, comparison_value;
8090 enum rtx_code cmp_code;
8091 int comparison_const_width;
8092 unsigned HOST_WIDE_INT comparison_sign_mask;
8094 add_val = INTVAL (bl->biv->add_val);
8095 comparison_value = XEXP (comparison, 1);
8096 if (GET_MODE (comparison_value) == VOIDmode)
8097 comparison_const_width
8098 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
8100 comparison_const_width
8101 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
8102 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
8103 comparison_const_width = HOST_BITS_PER_WIDE_INT;
8104 comparison_sign_mask
8105 = (unsigned HOST_WIDE_INT)1 << (comparison_const_width - 1);
8107 /* If the comparison value is not a loop invariant, then we
8108 can not reverse this loop.
8110 ??? If the insns which initialize the comparison value as
8111 a whole compute an invariant result, then we could move
8112 them out of the loop and proceed with loop reversal. */
8113 if (!invariant_p (comparison_value))
8116 if (GET_CODE (comparison_value) == CONST_INT)
8117 comparison_val = INTVAL (comparison_value);
8118 initial_value = bl->initial_value;
8120 /* Normalize the initial value if it is an integer and
8121 has no other use except as a counter. This will allow
8122 a few more loops to be reversed. */
8123 if (no_use_except_counting
8124 && GET_CODE (comparison_value) == CONST_INT
8125 && GET_CODE (initial_value) == CONST_INT)
8127 comparison_val = comparison_val - INTVAL (bl->initial_value);
8128 /* The code below requires comparison_val to be a multiple
8129 of add_val in order to do the loop reversal, so
8130 round up comparison_val to a multiple of add_val.
8131 Since comparison_value is constant, we know that the
8132 current comparison code is LT. */
8133 comparison_val = comparison_val + add_val - 1;
8135 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
8136 /* We postpone overflow checks for COMPARISON_VAL here;
8137 even if there is an overflow, we might still be able to
8138 reverse the loop, if converting the loop exit test to
8140 initial_value = const0_rtx;
8143 /* First check if we can do a vanilla loop reversal. */
8144 if (initial_value == const0_rtx
8145 /* If we have a decrement_and_branch_on_count,
8146 prefer the NE test, since this will allow that
8147 instruction to be generated. Note that we must
8148 use a vanilla loop reversal if the biv is used to
8149 calculate a giv or has a non-counting use. */
8150 #if ! defined (HAVE_decrement_and_branch_until_zero) \
8151 && defined (HAVE_decrement_and_branch_on_count)
8152 && (! (add_val == 1 && loop->vtop
8153 && (bl->biv_count == 0
8154 || no_use_except_counting)))
8156 && GET_CODE (comparison_value) == CONST_INT
8157 /* Now do postponed overflow checks on COMPARISON_VAL. */
8158 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
8159 & comparison_sign_mask))
8161 /* Register will always be nonnegative, with value
8162 0 on last iteration */
8163 add_adjust = add_val;
8167 else if (add_val == 1 && loop->vtop
8168 && (bl->biv_count == 0
8169 || no_use_except_counting))
8177 if (GET_CODE (comparison) == LE)
8178 add_adjust -= add_val;
8180 /* If the initial value is not zero, or if the comparison
8181 value is not an exact multiple of the increment, then we
8182 can not reverse this loop. */
8183 if (initial_value == const0_rtx
8184 && GET_CODE (comparison_value) == CONST_INT)
8186 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
8191 if (! no_use_except_counting || add_val != 1)
8195 final_value = comparison_value;
8197 /* Reset these in case we normalized the initial value
8198 and comparison value above. */
8199 if (GET_CODE (comparison_value) == CONST_INT
8200 && GET_CODE (initial_value) == CONST_INT)
8202 comparison_value = GEN_INT (comparison_val);
8204 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
8206 bl->initial_value = initial_value;
8208 /* Save some info needed to produce the new insns. */
8209 reg = bl->biv->dest_reg;
8210 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
8211 if (jump_label == pc_rtx)
8212 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
8213 new_add_val = GEN_INT (- INTVAL (bl->biv->add_val));
8215 /* Set start_value; if this is not a CONST_INT, we need
8217 Initialize biv to start_value before loop start.
8218 The old initializing insn will be deleted as a
8219 dead store by flow.c. */
8220 if (initial_value == const0_rtx
8221 && GET_CODE (comparison_value) == CONST_INT)
8223 start_value = GEN_INT (comparison_val - add_adjust);
8224 emit_insn_before (gen_move_insn (reg, start_value),
8227 else if (GET_CODE (initial_value) == CONST_INT)
8229 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
8230 enum machine_mode mode = GET_MODE (reg);
8231 enum insn_code icode
8232 = add_optab->handlers[(int) mode].insn_code;
8234 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
8235 || ! ((*insn_data[icode].operand[1].predicate)
8236 (comparison_value, mode))
8237 || ! ((*insn_data[icode].operand[2].predicate)
8241 = gen_rtx_PLUS (mode, comparison_value, offset);
8242 emit_insn_before ((GEN_FCN (icode)
8243 (reg, comparison_value, offset)),
8245 if (GET_CODE (comparison) == LE)
8246 final_value = gen_rtx_PLUS (mode, comparison_value,
8249 else if (! add_adjust)
8251 enum machine_mode mode = GET_MODE (reg);
8252 enum insn_code icode
8253 = sub_optab->handlers[(int) mode].insn_code;
8254 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
8255 || ! ((*insn_data[icode].operand[1].predicate)
8256 (comparison_value, mode))
8257 || ! ((*insn_data[icode].operand[2].predicate)
8258 (initial_value, mode)))
8261 = gen_rtx_MINUS (mode, comparison_value, initial_value);
8262 emit_insn_before ((GEN_FCN (icode)
8263 (reg, comparison_value, initial_value)),
8267 /* We could handle the other cases too, but it'll be
8268 better to have a testcase first. */
8271 /* We may not have a single insn which can increment a reg, so
8272 create a sequence to hold all the insns from expand_inc. */
8274 expand_inc (reg, new_add_val);
8275 tem = gen_sequence ();
8278 p = emit_insn_before (tem, bl->biv->insn);
8279 delete_insn (bl->biv->insn);
8281 /* Update biv info to reflect its new status. */
8283 bl->initial_value = start_value;
8284 bl->biv->add_val = new_add_val;
8286 /* Update loop info. */
8287 loop_info->initial_value = reg;
8288 loop_info->initial_equiv_value = reg;
8289 loop_info->final_value = const0_rtx;
8290 loop_info->final_equiv_value = const0_rtx;
8291 loop_info->comparison_value = const0_rtx;
8292 loop_info->comparison_code = cmp_code;
8293 loop_info->increment = new_add_val;
8295 /* Inc LABEL_NUSES so that delete_insn will
8296 not delete the label. */
8297 LABEL_NUSES (XEXP (jump_label, 0)) ++;
8299 /* Emit an insn after the end of the loop to set the biv's
8300 proper exit value if it is used anywhere outside the loop. */
8301 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
8303 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
8304 emit_insn_after (gen_move_insn (reg, final_value),
8307 /* Delete compare/branch at end of loop. */
8308 delete_insn (PREV_INSN (loop_end));
8309 if (compare_and_branch == 2)
8310 delete_insn (first_compare);
8312 /* Add new compare/branch insn at end of loop. */
8314 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
8315 GET_MODE (reg), 0, 0,
8316 XEXP (jump_label, 0));
8317 tem = gen_sequence ();
8319 emit_jump_insn_before (tem, loop_end);
8321 for (tem = PREV_INSN (loop_end);
8322 tem && GET_CODE (tem) != JUMP_INSN;
8323 tem = PREV_INSN (tem))
8327 JUMP_LABEL (tem) = XEXP (jump_label, 0);
8333 /* Increment of LABEL_NUSES done above. */
8334 /* Register is now always nonnegative,
8335 so add REG_NONNEG note to the branch. */
8336 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
8342 /* No insn may reference both the reversed and another biv or it
8343 will fail (see comment near the top of the loop reversal
8345 Earlier on, we have verified that the biv has no use except
8346 counting, or it is the only biv in this function.
8347 However, the code that computes no_use_except_counting does
8348 not verify reg notes. It's possible to have an insn that
8349 references another biv, and has a REG_EQUAL note with an
8350 expression based on the reversed biv. To avoid this case,
8351 remove all REG_EQUAL notes based on the reversed biv
8353 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8354 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
8357 rtx set = single_set (p);
8358 /* If this is a set of a GIV based on the reversed biv, any
8359 REG_EQUAL notes should still be correct. */
8361 || GET_CODE (SET_DEST (set)) != REG
8362 || (size_t) REGNO (SET_DEST (set)) >= reg_iv_type->num_elements
8363 || REG_IV_TYPE (REGNO (SET_DEST (set))) != GENERAL_INDUCT
8364 || REG_IV_INFO (REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
8365 for (pnote = ®_NOTES (p); *pnote;)
8367 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
8368 && reg_mentioned_p (regno_reg_rtx[bl->regno],
8370 *pnote = XEXP (*pnote, 1);
8372 pnote = &XEXP (*pnote, 1);
8376 /* Mark that this biv has been reversed. Each giv which depends
8377 on this biv, and which is also live past the end of the loop
8378 will have to be fixed up. */
8382 if (loop_dump_stream)
8384 fprintf (loop_dump_stream, "Reversed loop");
8386 fprintf (loop_dump_stream, " and added reg_nonneg\n");
8388 fprintf (loop_dump_stream, "\n");
8399 /* Verify whether the biv BL appears to be eliminable,
8400 based on the insns in the loop that refer to it.
8401 LOOP_START is the first insn of the loop, and END is the end insn.
8403 If ELIMINATE_P is non-zero, actually do the elimination.
8405 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8406 determine whether invariant insns should be placed inside or at the
8407 start of the loop. */
8410 maybe_eliminate_biv (bl, loop_start, loop_end, eliminate_p, threshold,
8412 struct iv_class *bl;
8416 int threshold, insn_count;
8418 rtx reg = bl->biv->dest_reg;
8421 /* Scan all insns in the loop, stopping if we find one that uses the
8422 biv in a way that we cannot eliminate. */
8424 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8426 enum rtx_code code = GET_CODE (p);
8427 rtx where = threshold >= insn_count ? loop_start : p;
8429 /* If this is a libcall that sets a giv, skip ahead to its end. */
8430 if (GET_RTX_CLASS (code) == 'i')
8432 rtx note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
8436 rtx last = XEXP (note, 0);
8437 rtx set = single_set (last);
8439 if (set && GET_CODE (SET_DEST (set)) == REG)
8441 int regno = REGNO (SET_DEST (set));
8443 if (regno < max_reg_before_loop
8444 && REG_IV_TYPE (regno) == GENERAL_INDUCT
8445 && REG_IV_INFO (regno)->src_reg == bl->biv->src_reg)
8450 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
8451 && reg_mentioned_p (reg, PATTERN (p))
8452 && ! maybe_eliminate_biv_1 (PATTERN (p), p, bl, eliminate_p, where))
8454 if (loop_dump_stream)
8455 fprintf (loop_dump_stream,
8456 "Cannot eliminate biv %d: biv used in insn %d.\n",
8457 bl->regno, INSN_UID (p));
8464 if (loop_dump_stream)
8465 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
8466 bl->regno, eliminate_p ? "was" : "can be");
8473 /* INSN and REFERENCE are instructions in the same insn chain.
8474 Return non-zero if INSN is first. */
8477 loop_insn_first_p (insn, reference)
8478 rtx insn, reference;
8482 for (p = insn, q = reference; ;)
8484 /* Start with test for not first so that INSN == REFERENCE yields not
8486 if (q == insn || ! p)
8488 if (p == reference || ! q)
8491 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8492 previous insn, hence the <= comparison below does not work if
8494 if (INSN_UID (p) < max_uid_for_loop
8495 && INSN_UID (q) < max_uid_for_loop
8496 && GET_CODE (p) != NOTE)
8497 return INSN_LUID (p) <= INSN_LUID (q);
8499 if (INSN_UID (p) >= max_uid_for_loop
8500 || GET_CODE (p) == NOTE)
8502 if (INSN_UID (q) >= max_uid_for_loop)
8507 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
8508 the offset that we have to take into account due to auto-increment /
8509 div derivation is zero. */
8511 biv_elimination_giv_has_0_offset (biv, giv, insn)
8512 struct induction *biv, *giv;
8515 /* If the giv V had the auto-inc address optimization applied
8516 to it, and INSN occurs between the giv insn and the biv
8517 insn, then we'd have to adjust the value used here.
8518 This is rare, so we don't bother to make this possible. */
8519 if (giv->auto_inc_opt
8520 && ((loop_insn_first_p (giv->insn, insn)
8521 && loop_insn_first_p (insn, biv->insn))
8522 || (loop_insn_first_p (biv->insn, insn)
8523 && loop_insn_first_p (insn, giv->insn))))
8526 /* If the giv V was derived from another giv, and INSN does
8527 not occur between the giv insn and the biv insn, then we'd
8528 have to adjust the value used here. This is rare, so we don't
8529 bother to make this possible. */
8530 if (giv->derived_from
8531 && ! (giv->always_executed
8532 && loop_insn_first_p (giv->insn, insn)
8533 && loop_insn_first_p (insn, biv->insn)))
8536 && giv->same->derived_from
8537 && ! (giv->same->always_executed
8538 && loop_insn_first_p (giv->same->insn, insn)
8539 && loop_insn_first_p (insn, biv->insn)))
8545 /* If BL appears in X (part of the pattern of INSN), see if we can
8546 eliminate its use. If so, return 1. If not, return 0.
8548 If BIV does not appear in X, return 1.
8550 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
8551 where extra insns should be added. Depending on how many items have been
8552 moved out of the loop, it will either be before INSN or at the start of
8556 maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
8558 struct iv_class *bl;
8562 enum rtx_code code = GET_CODE (x);
8563 rtx reg = bl->biv->dest_reg;
8564 enum machine_mode mode = GET_MODE (reg);
8565 struct induction *v;
8577 /* If we haven't already been able to do something with this BIV,
8578 we can't eliminate it. */
8584 /* If this sets the BIV, it is not a problem. */
8585 if (SET_DEST (x) == reg)
8588 /* If this is an insn that defines a giv, it is also ok because
8589 it will go away when the giv is reduced. */
8590 for (v = bl->giv; v; v = v->next_iv)
8591 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
8595 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
8597 /* Can replace with any giv that was reduced and
8598 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8599 Require a constant for MULT_VAL, so we know it's nonzero.
8600 ??? We disable this optimization to avoid potential
8603 for (v = bl->giv; v; v = v->next_iv)
8604 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8605 && v->add_val == const0_rtx
8606 && ! v->ignore && ! v->maybe_dead && v->always_computable
8610 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8616 /* If the giv has the opposite direction of change,
8617 then reverse the comparison. */
8618 if (INTVAL (v->mult_val) < 0)
8619 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8620 const0_rtx, v->new_reg);
8624 /* We can probably test that giv's reduced reg. */
8625 if (validate_change (insn, &SET_SRC (x), new, 0))
8629 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8630 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8631 Require a constant for MULT_VAL, so we know it's nonzero.
8632 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8633 overflow problem. */
8635 for (v = bl->giv; v; v = v->next_iv)
8636 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8637 && ! v->ignore && ! v->maybe_dead && v->always_computable
8639 && (GET_CODE (v->add_val) == SYMBOL_REF
8640 || GET_CODE (v->add_val) == LABEL_REF
8641 || GET_CODE (v->add_val) == CONST
8642 || (GET_CODE (v->add_val) == REG
8643 && REGNO_POINTER_FLAG (REGNO (v->add_val)))))
8645 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8651 /* If the giv has the opposite direction of change,
8652 then reverse the comparison. */
8653 if (INTVAL (v->mult_val) < 0)
8654 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8657 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8658 copy_rtx (v->add_val));
8660 /* Replace biv with the giv's reduced register. */
8661 update_reg_last_use (v->add_val, insn);
8662 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8665 /* Insn doesn't support that constant or invariant. Copy it
8666 into a register (it will be a loop invariant.) */
8667 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8669 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
8672 /* Substitute the new register for its invariant value in
8673 the compare expression. */
8674 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8675 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8684 case GT: case GE: case GTU: case GEU:
8685 case LT: case LE: case LTU: case LEU:
8686 /* See if either argument is the biv. */
8687 if (XEXP (x, 0) == reg)
8688 arg = XEXP (x, 1), arg_operand = 1;
8689 else if (XEXP (x, 1) == reg)
8690 arg = XEXP (x, 0), arg_operand = 0;
8694 if (CONSTANT_P (arg))
8696 /* First try to replace with any giv that has constant positive
8697 mult_val and constant add_val. We might be able to support
8698 negative mult_val, but it seems complex to do it in general. */
8700 for (v = bl->giv; v; v = v->next_iv)
8701 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8702 && (GET_CODE (v->add_val) == SYMBOL_REF
8703 || GET_CODE (v->add_val) == LABEL_REF
8704 || GET_CODE (v->add_val) == CONST
8705 || (GET_CODE (v->add_val) == REG
8706 && REGNO_POINTER_FLAG (REGNO (v->add_val))))
8707 && ! v->ignore && ! v->maybe_dead && v->always_computable
8710 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8716 /* Replace biv with the giv's reduced reg. */
8717 XEXP (x, 1-arg_operand) = v->new_reg;
8719 /* If all constants are actually constant integers and
8720 the derived constant can be directly placed in the COMPARE,
8722 if (GET_CODE (arg) == CONST_INT
8723 && GET_CODE (v->mult_val) == CONST_INT
8724 && GET_CODE (v->add_val) == CONST_INT
8725 && validate_change (insn, &XEXP (x, arg_operand),
8726 GEN_INT (INTVAL (arg)
8727 * INTVAL (v->mult_val)
8728 + INTVAL (v->add_val)), 0))
8731 /* Otherwise, load it into a register. */
8732 tem = gen_reg_rtx (mode);
8733 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8734 if (validate_change (insn, &XEXP (x, arg_operand), tem, 0))
8737 /* If that failed, put back the change we made above. */
8738 XEXP (x, 1-arg_operand) = reg;
8741 /* Look for giv with positive constant mult_val and nonconst add_val.
8742 Insert insns to calculate new compare value.
8743 ??? Turn this off due to possible overflow. */
8745 for (v = bl->giv; v; v = v->next_iv)
8746 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8747 && ! v->ignore && ! v->maybe_dead && v->always_computable
8753 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8759 tem = gen_reg_rtx (mode);
8761 /* Replace biv with giv's reduced register. */
8762 validate_change (insn, &XEXP (x, 1 - arg_operand),
8765 /* Compute value to compare against. */
8766 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8767 /* Use it in this insn. */
8768 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8769 if (apply_change_group ())
8773 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8775 if (invariant_p (arg) == 1)
8777 /* Look for giv with constant positive mult_val and nonconst
8778 add_val. Insert insns to compute new compare value.
8779 ??? Turn this off due to possible overflow. */
8781 for (v = bl->giv; v; v = v->next_iv)
8782 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8783 && ! v->ignore && ! v->maybe_dead && v->always_computable
8789 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8795 tem = gen_reg_rtx (mode);
8797 /* Replace biv with giv's reduced register. */
8798 validate_change (insn, &XEXP (x, 1 - arg_operand),
8801 /* Compute value to compare against. */
8802 emit_iv_add_mult (arg, v->mult_val, v->add_val,
8804 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8805 if (apply_change_group ())
8810 /* This code has problems. Basically, you can't know when
8811 seeing if we will eliminate BL, whether a particular giv
8812 of ARG will be reduced. If it isn't going to be reduced,
8813 we can't eliminate BL. We can try forcing it to be reduced,
8814 but that can generate poor code.
8816 The problem is that the benefit of reducing TV, below should
8817 be increased if BL can actually be eliminated, but this means
8818 we might have to do a topological sort of the order in which
8819 we try to process biv. It doesn't seem worthwhile to do
8820 this sort of thing now. */
8823 /* Otherwise the reg compared with had better be a biv. */
8824 if (GET_CODE (arg) != REG
8825 || REG_IV_TYPE (REGNO (arg)) != BASIC_INDUCT)
8828 /* Look for a pair of givs, one for each biv,
8829 with identical coefficients. */
8830 for (v = bl->giv; v; v = v->next_iv)
8832 struct induction *tv;
8834 if (v->ignore || v->maybe_dead || v->mode != mode)
8837 for (tv = reg_biv_class[REGNO (arg)]->giv; tv; tv = tv->next_iv)
8838 if (! tv->ignore && ! tv->maybe_dead
8839 && rtx_equal_p (tv->mult_val, v->mult_val)
8840 && rtx_equal_p (tv->add_val, v->add_val)
8841 && tv->mode == mode)
8843 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8849 /* Replace biv with its giv's reduced reg. */
8850 XEXP (x, 1-arg_operand) = v->new_reg;
8851 /* Replace other operand with the other giv's
8853 XEXP (x, arg_operand) = tv->new_reg;
8860 /* If we get here, the biv can't be eliminated. */
8864 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8865 biv is used in it, since it will be replaced. */
8866 for (v = bl->giv; v; v = v->next_iv)
8867 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8875 /* See if any subexpression fails elimination. */
8876 fmt = GET_RTX_FORMAT (code);
8877 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8882 if (! maybe_eliminate_biv_1 (XEXP (x, i), insn, bl,
8883 eliminate_p, where))
8888 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8889 if (! maybe_eliminate_biv_1 (XVECEXP (x, i, j), insn, bl,
8890 eliminate_p, where))
8899 /* Return nonzero if the last use of REG
8900 is in an insn following INSN in the same basic block. */
8903 last_use_this_basic_block (reg, insn)
8909 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
8912 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
8918 /* Called via `note_stores' to record the initial value of a biv. Here we
8919 just record the location of the set and process it later. */
8922 record_initial (dest, set, data)
8925 void *data ATTRIBUTE_UNUSED;
8927 struct iv_class *bl;
8929 if (GET_CODE (dest) != REG
8930 || REGNO (dest) >= max_reg_before_loop
8931 || REG_IV_TYPE (REGNO (dest)) != BASIC_INDUCT)
8934 bl = reg_biv_class[REGNO (dest)];
8936 /* If this is the first set found, record it. */
8937 if (bl->init_insn == 0)
8939 bl->init_insn = note_insn;
8944 /* If any of the registers in X are "old" and currently have a last use earlier
8945 than INSN, update them to have a last use of INSN. Their actual last use
8946 will be the previous insn but it will not have a valid uid_luid so we can't
8950 update_reg_last_use (x, insn)
8954 /* Check for the case where INSN does not have a valid luid. In this case,
8955 there is no need to modify the regno_last_uid, as this can only happen
8956 when code is inserted after the loop_end to set a pseudo's final value,
8957 and hence this insn will never be the last use of x. */
8958 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
8959 && INSN_UID (insn) < max_uid_for_loop
8960 && uid_luid[REGNO_LAST_UID (REGNO (x))] < uid_luid[INSN_UID (insn)])
8961 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
8965 register const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
8966 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
8969 update_reg_last_use (XEXP (x, i), insn);
8970 else if (fmt[i] == 'E')
8971 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8972 update_reg_last_use (XVECEXP (x, i, j), insn);
8977 /* Given a jump insn JUMP, return the condition that will cause it to branch
8978 to its JUMP_LABEL. If the condition cannot be understood, or is an
8979 inequality floating-point comparison which needs to be reversed, 0 will
8982 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8983 insn used in locating the condition was found. If a replacement test
8984 of the condition is desired, it should be placed in front of that
8985 insn and we will be sure that the inputs are still valid.
8987 The condition will be returned in a canonical form to simplify testing by
8988 callers. Specifically:
8990 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
8991 (2) Both operands will be machine operands; (cc0) will have been replaced.
8992 (3) If an operand is a constant, it will be the second operand.
8993 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
8994 for GE, GEU, and LEU. */
8997 get_condition (jump, earliest)
9006 int reverse_code = 0;
9007 int did_reverse_condition = 0;
9008 enum machine_mode mode;
9010 /* If this is not a standard conditional jump, we can't parse it. */
9011 if (GET_CODE (jump) != JUMP_INSN
9012 || ! condjump_p (jump) || simplejump_p (jump))
9015 code = GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 0));
9016 mode = GET_MODE (XEXP (SET_SRC (PATTERN (jump)), 0));
9017 op0 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 0);
9018 op1 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 1);
9023 /* If this branches to JUMP_LABEL when the condition is false, reverse
9025 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 2)) == LABEL_REF
9026 && XEXP (XEXP (SET_SRC (PATTERN (jump)), 2), 0) == JUMP_LABEL (jump))
9027 code = reverse_condition (code), did_reverse_condition ^= 1;
9029 /* If we are comparing a register with zero, see if the register is set
9030 in the previous insn to a COMPARE or a comparison operation. Perform
9031 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
9034 while (GET_RTX_CLASS (code) == '<' && op1 == CONST0_RTX (GET_MODE (op0)))
9036 /* Set non-zero when we find something of interest. */
9040 /* If comparison with cc0, import actual comparison from compare
9044 if ((prev = prev_nonnote_insn (prev)) == 0
9045 || GET_CODE (prev) != INSN
9046 || (set = single_set (prev)) == 0
9047 || SET_DEST (set) != cc0_rtx)
9050 op0 = SET_SRC (set);
9051 op1 = CONST0_RTX (GET_MODE (op0));
9057 /* If this is a COMPARE, pick up the two things being compared. */
9058 if (GET_CODE (op0) == COMPARE)
9060 op1 = XEXP (op0, 1);
9061 op0 = XEXP (op0, 0);
9064 else if (GET_CODE (op0) != REG)
9067 /* Go back to the previous insn. Stop if it is not an INSN. We also
9068 stop if it isn't a single set or if it has a REG_INC note because
9069 we don't want to bother dealing with it. */
9071 if ((prev = prev_nonnote_insn (prev)) == 0
9072 || GET_CODE (prev) != INSN
9073 || FIND_REG_INC_NOTE (prev, 0)
9074 || (set = single_set (prev)) == 0)
9077 /* If this is setting OP0, get what it sets it to if it looks
9079 if (rtx_equal_p (SET_DEST (set), op0))
9081 enum machine_mode inner_mode = GET_MODE (SET_SRC (set));
9083 /* ??? We may not combine comparisons done in a CCmode with
9084 comparisons not done in a CCmode. This is to aid targets
9085 like Alpha that have an IEEE compliant EQ instruction, and
9086 a non-IEEE compliant BEQ instruction. The use of CCmode is
9087 actually artificial, simply to prevent the combination, but
9088 should not affect other platforms.
9090 However, we must allow VOIDmode comparisons to match either
9091 CCmode or non-CCmode comparison, because some ports have
9092 modeless comparisons inside branch patterns.
9094 ??? This mode check should perhaps look more like the mode check
9095 in simplify_comparison in combine. */
9097 if ((GET_CODE (SET_SRC (set)) == COMPARE
9100 && GET_MODE_CLASS (inner_mode) == MODE_INT
9101 && (GET_MODE_BITSIZE (inner_mode)
9102 <= HOST_BITS_PER_WIDE_INT)
9103 && (STORE_FLAG_VALUE
9104 & ((HOST_WIDE_INT) 1
9105 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9106 #ifdef FLOAT_STORE_FLAG_VALUE
9108 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9109 && (REAL_VALUE_NEGATIVE
9110 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
9113 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
9114 && (((GET_MODE_CLASS (mode) == MODE_CC)
9115 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9116 || mode == VOIDmode || inner_mode == VOIDmode))
9118 else if (((code == EQ
9120 && (GET_MODE_BITSIZE (inner_mode)
9121 <= HOST_BITS_PER_WIDE_INT)
9122 && GET_MODE_CLASS (inner_mode) == MODE_INT
9123 && (STORE_FLAG_VALUE
9124 & ((HOST_WIDE_INT) 1
9125 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9126 #ifdef FLOAT_STORE_FLAG_VALUE
9128 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9129 && (REAL_VALUE_NEGATIVE
9130 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
9133 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
9134 && (((GET_MODE_CLASS (mode) == MODE_CC)
9135 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9136 || mode == VOIDmode || inner_mode == VOIDmode))
9139 /* We might have reversed a LT to get a GE here. But this wasn't
9140 actually the comparison of data, so we don't flag that we
9141 have had to reverse the condition. */
9142 did_reverse_condition ^= 1;
9150 else if (reg_set_p (op0, prev))
9151 /* If this sets OP0, but not directly, we have to give up. */
9156 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
9157 code = GET_CODE (x);
9160 code = reverse_condition (code);
9161 did_reverse_condition ^= 1;
9165 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
9171 /* If constant is first, put it last. */
9172 if (CONSTANT_P (op0))
9173 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
9175 /* If OP0 is the result of a comparison, we weren't able to find what
9176 was really being compared, so fail. */
9177 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
9180 /* Canonicalize any ordered comparison with integers involving equality
9181 if we can do computations in the relevant mode and we do not
9184 if (GET_CODE (op1) == CONST_INT
9185 && GET_MODE (op0) != VOIDmode
9186 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
9188 HOST_WIDE_INT const_val = INTVAL (op1);
9189 unsigned HOST_WIDE_INT uconst_val = const_val;
9190 unsigned HOST_WIDE_INT max_val
9191 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
9196 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
9197 code = LT, op1 = GEN_INT (const_val + 1);
9200 /* When cross-compiling, const_val might be sign-extended from
9201 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9203 if ((HOST_WIDE_INT) (const_val & max_val)
9204 != (((HOST_WIDE_INT) 1
9205 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
9206 code = GT, op1 = GEN_INT (const_val - 1);
9210 if (uconst_val < max_val)
9211 code = LTU, op1 = GEN_INT (uconst_val + 1);
9215 if (uconst_val != 0)
9216 code = GTU, op1 = GEN_INT (uconst_val - 1);
9224 /* If this was floating-point and we reversed anything other than an
9225 EQ or NE, return zero. */
9226 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
9227 && did_reverse_condition && code != NE && code != EQ
9229 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
9233 /* Never return CC0; return zero instead. */
9238 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
9241 /* Similar to above routine, except that we also put an invariant last
9242 unless both operands are invariants. */
9245 get_condition_for_loop (x)
9248 rtx comparison = get_condition (x, NULL_PTR);
9251 || ! invariant_p (XEXP (comparison, 0))
9252 || invariant_p (XEXP (comparison, 1)))
9255 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
9256 XEXP (comparison, 1), XEXP (comparison, 0));
9259 #ifdef HAVE_decrement_and_branch_on_count
9260 /* Instrument loop for insertion of bct instruction. We distinguish between
9261 loops with compile-time bounds and those with run-time bounds.
9262 Information from loop_iterations() is used to compute compile-time bounds.
9263 Run-time bounds should use loop preconditioning, but currently ignored.
9270 unsigned HOST_WIDE_INT n_iterations;
9271 rtx loop_start = loop->start;
9272 rtx loop_end = loop->end;
9273 struct loop_info *loop_info = loop->info;
9274 int loop_num = loop->num;
9277 int increment_direction, compare_direction;
9278 /* If the loop condition is <= or >=, the number of iteration
9279 is 1 more than the range of the bounds of the loop. */
9280 int add_iteration = 0;
9281 enum machine_mode loop_var_mode = word_mode;
9284 /* It's impossible to instrument a competely unrolled loop. */
9285 if (loop_info->unroll_number == loop_info->n_iterations)
9288 /* Make sure that the count register is not in use. */
9289 if (loop_info->used_count_register)
9291 if (loop_dump_stream)
9292 fprintf (loop_dump_stream,
9293 "insert_bct %d: BCT instrumentation failed: count register already in use\n",
9298 /* Make sure that the function has no indirect jumps. */
9299 if (indirect_jump_in_function)
9301 if (loop_dump_stream)
9302 fprintf (loop_dump_stream,
9303 "insert_bct %d: BCT instrumentation failed: indirect jump in function\n",
9308 /* Make sure that the last loop insn is a conditional jump. */
9309 if (GET_CODE (PREV_INSN (loop_end)) != JUMP_INSN
9310 || ! condjump_p (PREV_INSN (loop_end))
9311 || simplejump_p (PREV_INSN (loop_end)))
9313 if (loop_dump_stream)
9314 fprintf (loop_dump_stream,
9315 "insert_bct %d: BCT instrumentation failed: invalid jump at loop end\n",
9320 /* Make sure that the loop does not contain a function call
9321 (the count register might be altered by the called function). */
9322 if (loop_info->has_call)
9324 if (loop_dump_stream)
9325 fprintf (loop_dump_stream,
9326 "insert_bct %d: BCT instrumentation failed: function call in loop\n",
9331 /* Make sure that the loop does not jump via a table.
9332 (the count register might be used to perform the branch on table). */
9333 if (loop_info->has_tablejump)
9335 if (loop_dump_stream)
9336 fprintf (loop_dump_stream,
9337 "insert_bct %d: BCT instrumentation failed: computed branch in the loop\n",
9342 /* Account for loop unrolling in instrumented iteration count. */
9343 if (loop_info->unroll_number > 1)
9344 n_iterations = loop_info->n_iterations / loop_info->unroll_number;
9346 n_iterations = loop_info->n_iterations;
9348 if (n_iterations != 0 && n_iterations < 3)
9350 /* Allow an enclosing outer loop to benefit if possible. */
9351 if (loop_dump_stream)
9352 fprintf (loop_dump_stream,
9353 "insert_bct %d: Too few iterations to benefit from BCT optimization\n",
9358 /* Try to instrument the loop. */
9360 /* Handle the simpler case, where the bounds are known at compile time. */
9361 if (n_iterations > 0)
9363 struct loop *outer_loop;
9364 struct loop_info *outer_loop_info;
9366 /* Mark all enclosing loops that they cannot use count register. */
9367 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
9369 outer_loop_info = outer_loop->info;
9370 outer_loop_info->used_count_register = 1;
9372 instrument_loop_bct (loop_start, loop_end, GEN_INT (n_iterations));
9376 /* Handle the more complex case, that the bounds are NOT known
9377 at compile time. In this case we generate run_time calculation
9378 of the number of iterations. */
9380 if (loop_info->iteration_var == 0)
9382 if (loop_dump_stream)
9383 fprintf (loop_dump_stream,
9384 "insert_bct %d: BCT Runtime Instrumentation failed: no loop iteration variable found\n",
9389 if (GET_MODE_CLASS (GET_MODE (loop_info->iteration_var)) != MODE_INT
9390 || GET_MODE_SIZE (GET_MODE (loop_info->iteration_var)) != UNITS_PER_WORD)
9392 if (loop_dump_stream)
9393 fprintf (loop_dump_stream,
9394 "insert_bct %d: BCT Runtime Instrumentation failed: loop variable not integer\n",
9399 /* With runtime bounds, if the compare is of the form '!=' we give up */
9400 if (loop_info->comparison_code == NE)
9402 if (loop_dump_stream)
9403 fprintf (loop_dump_stream,
9404 "insert_bct %d: BCT Runtime Instrumentation failed: runtime bounds with != comparison\n",
9408 /* Use common loop preconditioning code instead. */
9412 /* We rely on the existence of run-time guard to ensure that the
9413 loop executes at least once. */
9415 rtx iterations_num_reg;
9417 unsigned HOST_WIDE_INT increment_value_abs
9418 = INTVAL (increment) * increment_direction;
9420 /* make sure that the increment is a power of two, otherwise (an
9421 expensive) divide is needed. */
9422 if (exact_log2 (increment_value_abs) == -1)
9424 if (loop_dump_stream)
9425 fprintf (loop_dump_stream,
9426 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
9430 /* compute the number of iterations */
9435 /* Again, the number of iterations is calculated by:
9437 ; compare-val - initial-val + (increment -1) + additional-iteration
9438 ; num_iterations = -----------------------------------------------------------------
9441 /* ??? Do we have to call copy_rtx here before passing rtx to
9443 if (compare_direction > 0)
9445 /* <, <= :the loop variable is increasing */
9446 temp_reg = expand_binop (loop_var_mode, sub_optab,
9447 comparison_value, initial_value,
9448 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9452 temp_reg = expand_binop (loop_var_mode, sub_optab,
9453 initial_value, comparison_value,
9454 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9457 if (increment_value_abs - 1 + add_iteration != 0)
9458 temp_reg = expand_binop (loop_var_mode, add_optab, temp_reg,
9459 GEN_INT (increment_value_abs - 1
9461 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9463 if (increment_value_abs != 1)
9464 iterations_num_reg = expand_binop (loop_var_mode, asr_optab,
9466 GEN_INT (exact_log2 (increment_value_abs)),
9467 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9469 iterations_num_reg = temp_reg;
9471 sequence = gen_sequence ();
9473 emit_insn_before (sequence, loop_start);
9474 instrument_loop_bct (loop_start, loop_end, iterations_num_reg);
9478 #endif /* Complex case */
9481 /* Instrument loop by inserting a bct in it as follows:
9482 1. A new counter register is created.
9483 2. In the head of the loop the new variable is initialized to the value
9484 passed in the loop_num_iterations parameter.
9485 3. At the end of the loop, comparison of the register with 0 is generated.
9486 The created comparison follows the pattern defined for the
9487 decrement_and_branch_on_count insn, so this insn will be generated.
9488 4. The branch on the old variable are deleted. The compare must remain
9489 because it might be used elsewhere. If the loop-variable or condition
9490 register are used elsewhere, they will be eliminated by flow. */
9493 instrument_loop_bct (loop_start, loop_end, loop_num_iterations)
9494 rtx loop_start, loop_end;
9495 rtx loop_num_iterations;
9501 if (HAVE_decrement_and_branch_on_count)
9503 if (loop_dump_stream)
9505 fputs ("instrument_bct: Inserting BCT (", loop_dump_stream);
9506 if (GET_CODE (loop_num_iterations) == CONST_INT)
9507 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC,
9508 INTVAL (loop_num_iterations));
9510 fputs ("runtime", loop_dump_stream);
9511 fputs (" iterations)", loop_dump_stream);
9514 /* Discard original jump to continue loop. Original compare result
9515 may still be live, so it cannot be discarded explicitly. */
9516 delete_insn (PREV_INSN (loop_end));
9518 /* Insert the label which will delimit the start of the loop. */
9519 start_label = gen_label_rtx ();
9520 emit_label_after (start_label, loop_start);
9522 /* Insert initialization of the count register into the loop header. */
9524 counter_reg = gen_reg_rtx (word_mode);
9525 emit_insn (gen_move_insn (counter_reg, loop_num_iterations));
9526 sequence = gen_sequence ();
9528 emit_insn_before (sequence, loop_start);
9530 /* Insert new comparison on the count register instead of the
9531 old one, generating the needed BCT pattern (that will be
9532 later recognized by assembly generation phase). */
9533 emit_jump_insn_before (gen_decrement_and_branch_on_count (counter_reg,
9536 LABEL_NUSES (start_label)++;
9540 #endif /* HAVE_decrement_and_branch_on_count */
9542 /* Scan the function and determine whether it has indirect (computed) jumps.
9544 This is taken mostly from flow.c; similar code exists elsewhere
9545 in the compiler. It may be useful to put this into rtlanal.c. */
9547 indirect_jump_in_function_p (start)
9552 for (insn = start; insn; insn = NEXT_INSN (insn))
9553 if (computed_jump_p (insn))
9559 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9560 documentation for LOOP_MEMS for the definition of `appropriate'.
9561 This function is called from prescan_loop via for_each_rtx. */
9564 insert_loop_mem (mem, data)
9566 void *data ATTRIBUTE_UNUSED;
9574 switch (GET_CODE (m))
9580 /* We're not interested in MEMs that are only clobbered. */
9584 /* We're not interested in the MEM associated with a
9585 CONST_DOUBLE, so there's no need to traverse into this. */
9589 /* We're not interested in any MEMs that only appear in notes. */
9593 /* This is not a MEM. */
9597 /* See if we've already seen this MEM. */
9598 for (i = 0; i < loop_mems_idx; ++i)
9599 if (rtx_equal_p (m, loop_mems[i].mem))
9601 if (GET_MODE (m) != GET_MODE (loop_mems[i].mem))
9602 /* The modes of the two memory accesses are different. If
9603 this happens, something tricky is going on, and we just
9604 don't optimize accesses to this MEM. */
9605 loop_mems[i].optimize = 0;
9610 /* Resize the array, if necessary. */
9611 if (loop_mems_idx == loop_mems_allocated)
9613 if (loop_mems_allocated != 0)
9614 loop_mems_allocated *= 2;
9616 loop_mems_allocated = 32;
9618 loop_mems = (loop_mem_info*)
9619 xrealloc (loop_mems,
9620 loop_mems_allocated * sizeof (loop_mem_info));
9623 /* Actually insert the MEM. */
9624 loop_mems[loop_mems_idx].mem = m;
9625 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9626 because we can't put it in a register. We still store it in the
9627 table, though, so that if we see the same address later, but in a
9628 non-BLK mode, we'll not think we can optimize it at that point. */
9629 loop_mems[loop_mems_idx].optimize = (GET_MODE (m) != BLKmode);
9630 loop_mems[loop_mems_idx].reg = NULL_RTX;
9636 /* Like load_mems, but also ensures that SET_IN_LOOP,
9637 MAY_NOT_OPTIMIZE, REG_SINGLE_USAGE, and INSN_COUNT have the correct
9638 values after load_mems. */
9641 load_mems_and_recount_loop_regs_set (loop, insn_count)
9642 const struct loop *loop;
9645 int nregs = max_reg_num ();
9649 /* Recalculate set_in_loop and friends since load_mems may have
9650 created new registers. */
9651 if (max_reg_num () > nregs)
9657 nregs = max_reg_num ();
9659 if ((unsigned) nregs > set_in_loop->num_elements)
9661 /* Grow all the arrays. */
9662 VARRAY_GROW (set_in_loop, nregs);
9663 VARRAY_GROW (n_times_set, nregs);
9664 VARRAY_GROW (may_not_optimize, nregs);
9665 VARRAY_GROW (reg_single_usage, nregs);
9667 /* Clear the arrays */
9668 bzero ((char *) &set_in_loop->data, nregs * sizeof (int));
9669 bzero ((char *) &may_not_optimize->data, nregs * sizeof (char));
9670 bzero ((char *) ®_single_usage->data, nregs * sizeof (rtx));
9672 count_loop_regs_set (loop->top ? loop->top : loop->start, loop->end,
9673 may_not_optimize, reg_single_usage,
9676 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
9678 VARRAY_CHAR (may_not_optimize, i) = 1;
9679 VARRAY_INT (set_in_loop, i) = 1;
9682 #ifdef AVOID_CCMODE_COPIES
9683 /* Don't try to move insns which set CC registers if we should not
9684 create CCmode register copies. */
9685 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
9686 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
9687 VARRAY_CHAR (may_not_optimize, i) = 1;
9690 /* Set n_times_set for the new registers. */
9691 bcopy ((char *) (&set_in_loop->data.i[0] + old_nregs),
9692 (char *) (&n_times_set->data.i[0] + old_nregs),
9693 (nregs - old_nregs) * sizeof (int));
9697 /* Move MEMs into registers for the duration of the loop. */
9701 const struct loop *loop;
9703 int maybe_never = 0;
9706 rtx label = NULL_RTX;
9707 rtx end_label = NULL_RTX;
9708 /* Nonzero if the next instruction may never be executed. */
9709 int next_maybe_never = 0;
9710 int last_max_reg = max_reg_num ();
9712 if (loop_mems_idx == 0)
9715 /* Check to see if it's possible that some instructions in the
9716 loop are never executed. */
9717 for (p = next_insn_in_loop (loop, loop->scan_start);
9718 p != NULL_RTX && ! maybe_never;
9719 p = next_insn_in_loop (loop, p))
9721 if (GET_CODE (p) == CODE_LABEL)
9723 else if (GET_CODE (p) == JUMP_INSN
9724 /* If we enter the loop in the middle, and scan
9725 around to the beginning, don't set maybe_never
9726 for that. This must be an unconditional jump,
9727 otherwise the code at the top of the loop might
9728 never be executed. Unconditional jumps are
9729 followed a by barrier then loop end. */
9730 && ! (GET_CODE (p) == JUMP_INSN
9731 && JUMP_LABEL (p) == loop->top
9732 && NEXT_INSN (NEXT_INSN (p)) == loop->end
9733 && simplejump_p (p)))
9735 if (!condjump_p (p))
9736 /* Something complicated. */
9739 /* If there are any more instructions in the loop, they
9740 might not be reached. */
9741 next_maybe_never = 1;
9743 else if (next_maybe_never)
9747 /* Actually move the MEMs. */
9748 for (i = 0; i < loop_mems_idx; ++i)
9753 rtx mem = loop_mems[i].mem;
9756 if (MEM_VOLATILE_P (mem)
9757 || invariant_p (XEXP (mem, 0)) != 1)
9758 /* There's no telling whether or not MEM is modified. */
9759 loop_mems[i].optimize = 0;
9761 /* Go through the MEMs written to in the loop to see if this
9762 one is aliased by one of them. */
9763 mem_list_entry = loop_store_mems;
9764 while (mem_list_entry)
9766 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
9768 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
9771 /* MEM is indeed aliased by this store. */
9772 loop_mems[i].optimize = 0;
9775 mem_list_entry = XEXP (mem_list_entry, 1);
9778 if (flag_float_store && written
9779 && GET_MODE_CLASS (GET_MODE (mem)) == MODE_FLOAT)
9780 loop_mems[i].optimize = 0;
9782 /* If this MEM is written to, we must be sure that there
9783 are no reads from another MEM that aliases this one. */
9784 if (loop_mems[i].optimize && written)
9788 for (j = 0; j < loop_mems_idx; ++j)
9792 else if (true_dependence (mem,
9797 /* It's not safe to hoist loop_mems[i] out of
9798 the loop because writes to it might not be
9799 seen by reads from loop_mems[j]. */
9800 loop_mems[i].optimize = 0;
9806 if (maybe_never && may_trap_p (mem))
9807 /* We can't access the MEM outside the loop; it might
9808 cause a trap that wouldn't have happened otherwise. */
9809 loop_mems[i].optimize = 0;
9811 if (!loop_mems[i].optimize)
9812 /* We thought we were going to lift this MEM out of the
9813 loop, but later discovered that we could not. */
9816 INIT_REG_SET (&copies);
9818 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9819 order to keep scan_loop from moving stores to this MEM
9820 out of the loop just because this REG is neither a
9821 user-variable nor used in the loop test. */
9822 reg = gen_reg_rtx (GET_MODE (mem));
9823 REG_USERVAR_P (reg) = 1;
9824 loop_mems[i].reg = reg;
9826 /* Now, replace all references to the MEM with the
9827 corresponding pesudos. */
9829 for (p = next_insn_in_loop (loop, loop->scan_start);
9831 p = next_insn_in_loop (loop, p))
9836 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
9838 /* See if this copies the mem into a register that isn't
9839 modified afterwards. We'll try to do copy propagation
9840 a little further on. */
9841 set = single_set (p);
9843 /* @@@ This test is _way_ too conservative. */
9845 && GET_CODE (SET_DEST (set)) == REG
9846 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
9847 && REGNO (SET_DEST (set)) < last_max_reg
9848 && VARRAY_INT (n_times_set, REGNO (SET_DEST (set))) == 1
9849 && rtx_equal_p (SET_SRC (set), loop_mems[i].mem))
9850 SET_REGNO_REG_SET (&copies, REGNO (SET_DEST (set)));
9853 for_each_rtx (&p, replace_loop_mem, &ri);
9856 if (GET_CODE (p) == CODE_LABEL
9857 || GET_CODE (p) == JUMP_INSN)
9861 if (! apply_change_group ())
9862 /* We couldn't replace all occurrences of the MEM. */
9863 loop_mems[i].optimize = 0;
9869 /* Load the memory immediately before START, which is
9870 the NOTE_LOOP_BEG. */
9871 set = gen_move_insn (reg, mem);
9872 emit_insn_before (set, loop->start);
9876 if (label == NULL_RTX)
9878 /* We must compute the former
9879 right-after-the-end label before we insert
9881 end_label = next_label (loop->end);
9882 label = gen_label_rtx ();
9883 emit_label_after (label, loop->end);
9886 /* Store the memory immediately after END, which is
9887 the NOTE_LOOP_END. */
9888 set = gen_move_insn (copy_rtx (mem), reg);
9889 emit_insn_after (set, label);
9892 if (loop_dump_stream)
9894 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9895 REGNO (reg), (written ? "r/w" : "r/o"));
9896 print_rtl (loop_dump_stream, mem);
9897 fputc ('\n', loop_dump_stream);
9900 /* Attempt a bit of copy propagation. This helps untangle the
9901 data flow, and enables {basic,general}_induction_var to find
9903 EXECUTE_IF_SET_IN_REG_SET
9904 (&copies, FIRST_PSEUDO_REGISTER, j,
9906 try_copy_prop (loop, loop_mems[i].reg, j);
9908 CLEAR_REG_SET (&copies);
9912 if (label != NULL_RTX)
9914 /* Now, we need to replace all references to the previous exit
9915 label with the new one. */
9920 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
9922 for_each_rtx (&p, replace_label, &rr);
9924 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9925 field. This is not handled by for_each_rtx because it doesn't
9926 handle unprinted ('0') fields. We need to update JUMP_LABEL
9927 because the immediately following unroll pass will use it.
9928 replace_label would not work anyways, because that only handles
9930 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9931 JUMP_LABEL (p) = label;
9936 /* For communication between note_reg_stored and its caller. */
9937 struct note_reg_stored_arg
9943 /* Called via note_stores, record in SET_SEEN whether X, which is written,
9946 note_reg_stored (x, setter, arg)
9947 rtx x, setter ATTRIBUTE_UNUSED;
9950 struct note_reg_stored_arg *t = (struct note_reg_stored_arg *)arg;
9955 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
9956 There must be exactly one insn that sets this pseudo; it will be
9957 deleted if all replacements succeed and we can prove that the register
9958 is not used after the loop.
9959 The arguments SCAN_START, LOOP_TOP and END are as in load_mems. */
9961 try_copy_prop (loop, replacement, regno)
9962 const struct loop *loop;
9966 /* This is the reg that we are copying from. */
9967 rtx reg_rtx = regno_reg_rtx[regno];
9970 /* These help keep track of whether we replaced all uses of the reg. */
9971 int replaced_last = 0;
9972 int store_is_first = 0;
9974 for (insn = next_insn_in_loop (loop, loop->scan_start);
9976 insn = next_insn_in_loop (loop, insn))
9980 /* Only substitute within one extended basic block from the initializing
9982 if (GET_CODE (insn) == CODE_LABEL && init_insn)
9985 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
9988 /* Is this the initializing insn? */
9989 set = single_set (insn);
9991 && GET_CODE (SET_DEST (set)) == REG
9992 && REGNO (SET_DEST (set)) == regno)
9998 if (REGNO_FIRST_UID (regno) == INSN_UID (insn))
10002 /* Only substitute after seeing the initializing insn. */
10003 if (init_insn && insn != init_insn)
10005 struct note_reg_stored_arg arg;
10007 array[0] = reg_rtx;
10008 array[1] = replacement;
10011 for_each_rtx (&insn, replace_loop_reg, array);
10012 if (REGNO_LAST_UID (regno) == INSN_UID (insn))
10015 /* Stop replacing when REPLACEMENT is modified. */
10016 arg.reg = replacement;
10018 note_stores (PATTERN (insn), note_reg_stored, &arg);
10025 if (apply_change_group ())
10027 if (loop_dump_stream)
10028 fprintf (loop_dump_stream, " Replaced reg %d", regno);
10029 if (store_is_first && replaced_last)
10031 PUT_CODE (init_insn, NOTE);
10032 NOTE_LINE_NUMBER (init_insn) = NOTE_INSN_DELETED;
10033 if (loop_dump_stream)
10034 fprintf (loop_dump_stream, ", deleting init_insn (%d)",
10035 INSN_UID (init_insn));
10037 if (loop_dump_stream)
10038 fprintf (loop_dump_stream, ".\n");
10042 /* Replace MEM with its associated pseudo register. This function is
10043 called from load_mems via for_each_rtx. DATA is actually an
10044 rtx_and_int * describing the instruction currently being scanned
10045 and the MEM we are currently replacing. */
10048 replace_loop_mem (mem, data)
10060 switch (GET_CODE (m))
10066 /* We're not interested in the MEM associated with a
10067 CONST_DOUBLE, so there's no need to traverse into one. */
10071 /* This is not a MEM. */
10075 ri = (rtx_and_int*) data;
10078 if (!rtx_equal_p (loop_mems[i].mem, m))
10079 /* This is not the MEM we are currently replacing. */
10084 /* Actually replace the MEM. */
10085 validate_change (insn, mem, loop_mems[i].reg, 1);
10090 /* Replace one register with another. Called through for_each_rtx; PX points
10091 to the rtx being scanned. DATA is actually an array of three rtx's; the
10092 first one is the one to be replaced, and the second one the replacement.
10093 The third one is the current insn. */
10096 replace_loop_reg (px, data)
10101 rtx *array = (rtx *)data;
10107 validate_change (array[2], px, array[1], 1);
10112 /* Replace occurrences of the old exit label for the loop with the new
10113 one. DATA is an rtx_pair containing the old and new labels,
10117 replace_label (x, data)
10122 rtx old_label = ((rtx_pair*) data)->r1;
10123 rtx new_label = ((rtx_pair*) data)->r2;
10128 if (GET_CODE (l) != LABEL_REF)
10131 if (XEXP (l, 0) != old_label)
10134 XEXP (l, 0) = new_label;
10135 ++LABEL_NUSES (new_label);
10136 --LABEL_NUSES (old_label);