1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
44 #include "hard-reg-set.h"
45 #include "basic-block.h"
46 #include "insn-config.h"
47 #include "insn-flags.h"
57 #define LOOP_REG_LIFETIME(LOOP, REGNO) \
58 ((REGNO_LAST_LUID (REGNO) - REGNO_FIRST_LUID (REGNO)))
60 #define LOOP_REG_GLOBAL_P(LOOP, REGNO) \
61 ((REGNO_LAST_LUID (REGNO) > INSN_LUID ((LOOP)->end) \
62 || REGNO_FIRST_LUID (REGNO) < INSN_LUID ((LOOP)->start)))
65 /* Vector mapping INSN_UIDs to luids.
66 The luids are like uids but increase monotonically always.
67 We use them to see whether a jump comes from outside a given loop. */
71 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
72 number the insn is contained in. */
74 struct loop **uid_loop;
76 /* 1 + largest uid of any insn. */
80 /* 1 + luid of last insn. */
84 /* Number of loops detected in current function. Used as index to the
87 static int max_loop_num;
89 /* Bound on pseudo register number before loop optimization.
90 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
91 unsigned int max_reg_before_loop;
93 /* The value to pass to the next call of reg_scan_update. */
94 static int loop_max_reg;
96 #define obstack_chunk_alloc xmalloc
97 #define obstack_chunk_free free
99 /* During the analysis of a loop, a chain of `struct movable's
100 is made to record all the movable insns found.
101 Then the entire chain can be scanned to decide which to move. */
105 rtx insn; /* A movable insn */
106 rtx set_src; /* The expression this reg is set from. */
107 rtx set_dest; /* The destination of this SET. */
108 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
109 of any registers used within the LIBCALL. */
110 int consec; /* Number of consecutive following insns
111 that must be moved with this one. */
112 unsigned int regno; /* The register it sets */
113 short lifetime; /* lifetime of that register;
114 may be adjusted when matching movables
115 that load the same value are found. */
116 short savings; /* Number of insns we can move for this reg,
117 including other movables that force this
118 or match this one. */
119 unsigned int cond : 1; /* 1 if only conditionally movable */
120 unsigned int force : 1; /* 1 means MUST move this insn */
121 unsigned int global : 1; /* 1 means reg is live outside this loop */
122 /* If PARTIAL is 1, GLOBAL means something different:
123 that the reg is live outside the range from where it is set
124 to the following label. */
125 unsigned int done : 1; /* 1 inhibits further processing of this */
127 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
128 In particular, moving it does not make it
130 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
131 load SRC, rather than copying INSN. */
132 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
133 first insn of a consecutive sets group. */
134 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
135 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
136 that we should avoid changing when clearing
137 the rest of the reg. */
138 struct movable *match; /* First entry for same value */
139 struct movable *forces; /* An insn that must be moved if this is */
140 struct movable *next;
144 FILE *loop_dump_stream;
146 /* Forward declarations. */
148 static void find_and_verify_loops PARAMS ((rtx, struct loops *));
149 static void mark_loop_jump PARAMS ((rtx, struct loop *));
150 static void prescan_loop PARAMS ((struct loop *));
151 static int reg_in_basic_block_p PARAMS ((rtx, rtx));
152 static int consec_sets_invariant_p PARAMS ((const struct loop *,
154 static int labels_in_range_p PARAMS ((rtx, int));
155 static void count_one_set PARAMS ((struct loop_regs *, rtx, rtx,
156 varray_type, rtx *));
158 static void count_loop_regs_set PARAMS ((const struct loop*,
159 varray_type, varray_type,
161 static void note_addr_stored PARAMS ((rtx, rtx, void *));
162 static void note_set_pseudo_multiple_uses PARAMS ((rtx, rtx, void *));
163 static int loop_reg_used_before_p PARAMS ((const struct loop *, rtx, rtx));
164 static void scan_loop PARAMS ((struct loop*, int));
166 static void replace_call_address PARAMS ((rtx, rtx, rtx));
168 static rtx skip_consec_insns PARAMS ((rtx, int));
169 static int libcall_benefit PARAMS ((rtx));
170 static void ignore_some_movables PARAMS ((struct loop_movables *));
171 static void force_movables PARAMS ((struct loop_movables *));
172 static void combine_movables PARAMS ((struct loop_movables *,
173 struct loop_regs *));
174 static int regs_match_p PARAMS ((rtx, rtx, struct loop_movables *));
175 static int rtx_equal_for_loop_p PARAMS ((rtx, rtx, struct loop_movables *,
176 struct loop_regs *));
177 static void add_label_notes PARAMS ((rtx, rtx));
178 static void move_movables PARAMS ((struct loop *loop, struct loop_movables *,
180 static void loop_movables_add PARAMS((struct loop_movables *,
182 static void loop_movables_free PARAMS((struct loop_movables *));
183 static int count_nonfixed_reads PARAMS ((const struct loop *, rtx));
184 static void loop_bivs_find PARAMS((struct loop *));
185 static void loop_bivs_init_find PARAMS((struct loop *));
186 static void loop_bivs_check PARAMS((struct loop *));
187 static void loop_givs_find PARAMS((struct loop *));
188 static void loop_givs_check PARAMS((struct loop *));
189 static int loop_biv_eliminable_p PARAMS((struct loop *, struct iv_class *,
191 static int loop_giv_reduce_benefit PARAMS((struct loop *, struct iv_class *,
192 struct induction *, rtx));
193 static void loop_givs_dead_check PARAMS((struct loop *, struct iv_class *));
194 static void loop_givs_reduce PARAMS((struct loop *, struct iv_class *));
195 static void loop_givs_rescan PARAMS((struct loop *, struct iv_class *,
197 static void loop_ivs_free PARAMS((struct loop *));
198 static void strength_reduce PARAMS ((struct loop *, int, int));
199 static void find_single_use_in_loop PARAMS ((rtx, rtx, varray_type));
200 static int valid_initial_value_p PARAMS ((rtx, rtx, int, rtx));
201 static void find_mem_givs PARAMS ((const struct loop *, rtx, rtx, int, int));
202 static void record_biv PARAMS ((struct loop *, struct induction *,
203 rtx, rtx, rtx, rtx, rtx *,
205 static void check_final_value PARAMS ((const struct loop *,
206 struct induction *));
207 static void record_giv PARAMS ((const struct loop *, struct induction *,
208 rtx, rtx, rtx, rtx, rtx, rtx, int,
209 enum g_types, int, int, rtx *));
210 static void update_giv_derive PARAMS ((const struct loop *, rtx));
211 static void check_ext_dependant_givs PARAMS ((struct iv_class *,
212 struct loop_info *));
213 static int basic_induction_var PARAMS ((const struct loop *, rtx,
214 enum machine_mode, rtx, rtx,
215 rtx *, rtx *, rtx **));
216 static rtx simplify_giv_expr PARAMS ((const struct loop *, rtx, rtx *, int *));
217 static int general_induction_var PARAMS ((const struct loop *loop, rtx, rtx *,
218 rtx *, rtx *, rtx *, int, int *,
220 static int consec_sets_giv PARAMS ((const struct loop *, int, rtx,
221 rtx, rtx, rtx *, rtx *, rtx *, rtx *));
222 static int check_dbra_loop PARAMS ((struct loop *, int));
223 static rtx express_from_1 PARAMS ((rtx, rtx, rtx));
224 static rtx combine_givs_p PARAMS ((struct induction *, struct induction *));
225 static int cmp_combine_givs_stats PARAMS ((const PTR, const PTR));
226 static void combine_givs PARAMS ((struct loop_regs *, struct iv_class *));
227 static int product_cheap_p PARAMS ((rtx, rtx));
228 static int maybe_eliminate_biv PARAMS ((const struct loop *, struct iv_class *,
230 static int maybe_eliminate_biv_1 PARAMS ((const struct loop *, rtx, rtx,
231 struct iv_class *, int, rtx));
232 static int last_use_this_basic_block PARAMS ((rtx, rtx));
233 static void record_initial PARAMS ((rtx, rtx, void *));
234 static void update_reg_last_use PARAMS ((rtx, rtx));
235 static rtx next_insn_in_loop PARAMS ((const struct loop *, rtx));
236 static void load_mems_and_recount_loop_regs_set PARAMS ((const struct loop*,
238 static void load_mems PARAMS ((const struct loop *));
239 static int insert_loop_mem PARAMS ((rtx *, void *));
240 static int replace_loop_mem PARAMS ((rtx *, void *));
241 static void replace_loop_mems PARAMS ((rtx, rtx, rtx));
242 static int replace_loop_reg PARAMS ((rtx *, void *));
243 static void replace_loop_regs PARAMS ((rtx insn, rtx, rtx));
244 static void note_reg_stored PARAMS ((rtx, rtx, void *));
245 static void try_copy_prop PARAMS ((const struct loop *, rtx, unsigned int));
246 static void try_swap_copy_prop PARAMS ((const struct loop *, rtx,
248 static int replace_label PARAMS ((rtx *, void *));
249 static rtx check_insn_for_givs PARAMS((struct loop *, rtx, int, int));
250 static rtx check_insn_for_bivs PARAMS((struct loop *, rtx, int, int));
251 static int iv_add_mult_cost PARAMS ((rtx, rtx, rtx, rtx));
253 static void loop_dump_aux PARAMS ((const struct loop *, FILE *, int));
254 void debug_loop PARAMS ((const struct loop *));
255 void debug_loops PARAMS ((const struct loops *));
257 typedef struct rtx_pair
263 typedef struct loop_replace_args
270 /* Nonzero iff INSN is between START and END, inclusive. */
271 #define INSN_IN_RANGE_P(INSN, START, END) \
272 (INSN_UID (INSN) < max_uid_for_loop \
273 && INSN_LUID (INSN) >= INSN_LUID (START) \
274 && INSN_LUID (INSN) <= INSN_LUID (END))
276 /* Indirect_jump_in_function is computed once per function. */
277 static int indirect_jump_in_function;
278 static int indirect_jump_in_function_p PARAMS ((rtx));
280 static int compute_luids PARAMS ((rtx, rtx, int));
282 static int biv_elimination_giv_has_0_offset PARAMS ((struct induction *,
286 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
287 copy the value of the strength reduced giv to its original register. */
288 static int copy_cost;
290 /* Cost of using a register, to normalize the benefits of a giv. */
291 static int reg_address_cost;
296 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
298 reg_address_cost = address_cost (reg, SImode);
300 copy_cost = COSTS_N_INSNS (1);
303 /* Compute the mapping from uids to luids.
304 LUIDs are numbers assigned to insns, like uids,
305 except that luids increase monotonically through the code.
306 Start at insn START and stop just before END. Assign LUIDs
307 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
309 compute_luids (start, end, prev_luid)
316 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
318 if (INSN_UID (insn) >= max_uid_for_loop)
320 /* Don't assign luids to line-number NOTEs, so that the distance in
321 luids between two insns is not affected by -g. */
322 if (GET_CODE (insn) != NOTE
323 || NOTE_LINE_NUMBER (insn) <= 0)
324 uid_luid[INSN_UID (insn)] = ++i;
326 /* Give a line number note the same luid as preceding insn. */
327 uid_luid[INSN_UID (insn)] = i;
332 /* Entry point of this file. Perform loop optimization
333 on the current function. F is the first insn of the function
334 and DUMPFILE is a stream for output of a trace of actions taken
335 (or 0 if none should be output). */
338 loop_optimize (f, dumpfile, flags)
339 /* f is the first instruction of a chain of insns for one function */
346 struct loops loops_data;
347 struct loops *loops = &loops_data;
348 struct loop_info *loops_info;
349 static char *moved_once;
351 loop_dump_stream = dumpfile;
353 init_recog_no_volatile ();
355 max_reg_before_loop = max_reg_num ();
356 loop_max_reg = max_reg_before_loop;
360 /* Count the number of loops. */
363 for (insn = f; insn; insn = NEXT_INSN (insn))
365 if (GET_CODE (insn) == NOTE
366 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
370 /* Don't waste time if no loops. */
371 if (max_loop_num == 0)
374 loops->num = max_loop_num;
376 moved_once = (char *) xcalloc (max_reg_before_loop, sizeof (char));
378 /* Get size to use for tables indexed by uids.
379 Leave some space for labels allocated by find_and_verify_loops. */
380 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
382 uid_luid = (int *) xcalloc (max_uid_for_loop, sizeof (int));
383 uid_loop = (struct loop **) xcalloc (max_uid_for_loop,
384 sizeof (struct loop *));
386 /* Allocate storage for array of loops. */
387 loops->array = (struct loop *)
388 xcalloc (loops->num, sizeof (struct loop));
390 /* Find and process each loop.
391 First, find them, and record them in order of their beginnings. */
392 find_and_verify_loops (f, loops);
394 /* Allocate and initialize auxiliary loop information. */
395 loops_info = xcalloc (loops->num, sizeof (struct loop_info));
396 for (i = 0; i < loops->num; i++)
397 loops->array[i].aux = loops_info + i;
399 /* Now find all register lifetimes. This must be done after
400 find_and_verify_loops, because it might reorder the insns in the
402 reg_scan (f, max_reg_before_loop, 1);
404 /* This must occur after reg_scan so that registers created by gcse
405 will have entries in the register tables.
407 We could have added a call to reg_scan after gcse_main in toplev.c,
408 but moving this call to init_alias_analysis is more efficient. */
409 init_alias_analysis ();
411 /* See if we went too far. Note that get_max_uid already returns
412 one more that the maximum uid of all insn. */
413 if (get_max_uid () > max_uid_for_loop)
415 /* Now reset it to the actual size we need. See above. */
416 max_uid_for_loop = get_max_uid ();
418 /* find_and_verify_loops has already called compute_luids, but it
419 might have rearranged code afterwards, so we need to recompute
421 max_luid = compute_luids (f, NULL_RTX, 0);
423 /* Don't leave gaps in uid_luid for insns that have been
424 deleted. It is possible that the first or last insn
425 using some register has been deleted by cross-jumping.
426 Make sure that uid_luid for that former insn's uid
427 points to the general area where that insn used to be. */
428 for (i = 0; i < max_uid_for_loop; i++)
430 uid_luid[0] = uid_luid[i];
431 if (uid_luid[0] != 0)
434 for (i = 0; i < max_uid_for_loop; i++)
435 if (uid_luid[i] == 0)
436 uid_luid[i] = uid_luid[i - 1];
438 /* Determine if the function has indirect jump. On some systems
439 this prevents low overhead loop instructions from being used. */
440 indirect_jump_in_function = indirect_jump_in_function_p (f);
442 /* Now scan the loops, last ones first, since this means inner ones are done
443 before outer ones. */
444 for (i = max_loop_num - 1; i >= 0; i--)
446 struct loop *loop = &loops->array[i];
447 struct loop_regs *regs = LOOP_REGS (loop);
449 regs->moved_once = moved_once;
451 if (! loop->invalid && loop->end)
452 scan_loop (loop, flags);
455 /* If there were lexical blocks inside the loop, they have been
456 replicated. We will now have more than one NOTE_INSN_BLOCK_BEG
457 and NOTE_INSN_BLOCK_END for each such block. We must duplicate
458 the BLOCKs as well. */
459 if (write_symbols != NO_DEBUG)
462 end_alias_analysis ();
472 /* Returns the next insn, in execution order, after INSN. START and
473 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
474 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
475 insn-stream; it is used with loops that are entered near the
479 next_insn_in_loop (loop, insn)
480 const struct loop *loop;
483 insn = NEXT_INSN (insn);
485 if (insn == loop->end)
488 /* Go to the top of the loop, and continue there. */
495 if (insn == loop->scan_start)
502 /* Optimize one loop described by LOOP. */
504 /* ??? Could also move memory writes out of loops if the destination address
505 is invariant, the source is invariant, the memory write is not volatile,
506 and if we can prove that no read inside the loop can read this address
507 before the write occurs. If there is a read of this address after the
508 write, then we can also mark the memory read as invariant. */
511 scan_loop (loop, flags)
515 struct loop_info *loop_info = LOOP_INFO (loop);
516 struct loop_regs *regs = LOOP_REGS (loop);
518 rtx loop_start = loop->start;
519 rtx loop_end = loop->end;
521 /* 1 if we are scanning insns that could be executed zero times. */
523 /* 1 if we are scanning insns that might never be executed
524 due to a subroutine call which might exit before they are reached. */
526 /* Jump insn that enters the loop, or 0 if control drops in. */
527 rtx loop_entry_jump = 0;
528 /* Number of insns in the loop. */
531 rtx temp, update_start, update_end;
532 /* The SET from an insn, if it is the only SET in the insn. */
534 /* Chain describing insns movable in current loop. */
535 struct loop_movables *movables = LOOP_MOVABLES (loop);
536 /* Ratio of extra register life span we can justify
537 for saving an instruction. More if loop doesn't call subroutines
538 since in that case saving an insn makes more difference
539 and more registers are available. */
541 /* Nonzero if we are scanning instructions in a sub-loop. */
551 /* Determine whether this loop starts with a jump down to a test at
552 the end. This will occur for a small number of loops with a test
553 that is too complex to duplicate in front of the loop.
555 We search for the first insn or label in the loop, skipping NOTEs.
556 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
557 (because we might have a loop executed only once that contains a
558 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
559 (in case we have a degenerate loop).
561 Note that if we mistakenly think that a loop is entered at the top
562 when, in fact, it is entered at the exit test, the only effect will be
563 slightly poorer optimization. Making the opposite error can generate
564 incorrect code. Since very few loops now start with a jump to the
565 exit test, the code here to detect that case is very conservative. */
567 for (p = NEXT_INSN (loop_start);
569 && GET_CODE (p) != CODE_LABEL && ! INSN_P (p)
570 && (GET_CODE (p) != NOTE
571 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
572 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
576 loop->scan_start = p;
578 /* Set up variables describing this loop. */
580 threshold = (loop_info->has_call ? 1 : 2) * (1 + n_non_fixed_regs);
582 /* If loop has a jump before the first label,
583 the true entry is the target of that jump.
584 Start scan from there.
585 But record in LOOP->TOP the place where the end-test jumps
586 back to so we can scan that after the end of the loop. */
587 if (GET_CODE (p) == JUMP_INSN)
591 /* Loop entry must be unconditional jump (and not a RETURN) */
592 if (any_uncondjump_p (p)
593 && JUMP_LABEL (p) != 0
594 /* Check to see whether the jump actually
595 jumps out of the loop (meaning it's no loop).
596 This case can happen for things like
597 do {..} while (0). If this label was generated previously
598 by loop, we can't tell anything about it and have to reject
600 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, loop_end))
602 loop->top = next_label (loop->scan_start);
603 loop->scan_start = JUMP_LABEL (p);
607 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
608 as required by loop_reg_used_before_p. So skip such loops. (This
609 test may never be true, but it's best to play it safe.)
611 Also, skip loops where we do not start scanning at a label. This
612 test also rejects loops starting with a JUMP_INSN that failed the
615 if (INSN_UID (loop->scan_start) >= max_uid_for_loop
616 || GET_CODE (loop->scan_start) != CODE_LABEL)
618 if (loop_dump_stream)
619 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
620 INSN_UID (loop_start), INSN_UID (loop_end));
624 /* Count number of times each reg is set during this loop. Set
625 VARRAY_CHAR (regs->may_not_optimize, I) if it is not safe to move
626 out the setting of register I. Set VARRAY_RTX
627 (regs->single_usage, I). */
629 /* Allocate extra space for REGS that might be created by
630 load_mems. We allocate a little extra slop as well, in the hopes
631 that even after the moving of movables creates some new registers
632 we won't have to reallocate these arrays. However, we do grow
633 the arrays, if necessary, in load_mems_recount_loop_regs_set. */
634 nregs = max_reg_num () + loop_info->mems_idx + 16;
635 VARRAY_INT_INIT (regs->set_in_loop, nregs, "set_in_loop");
636 VARRAY_INT_INIT (regs->n_times_set, nregs, "n_times_set");
637 VARRAY_CHAR_INIT (regs->may_not_optimize, nregs, "may_not_optimize");
638 VARRAY_RTX_INIT (regs->single_usage, nregs, "single_usage");
642 count_loop_regs_set (loop, regs->may_not_optimize, regs->single_usage,
645 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
647 VARRAY_CHAR (regs->may_not_optimize, i) = 1;
648 VARRAY_INT (regs->set_in_loop, i) = 1;
651 #ifdef AVOID_CCMODE_COPIES
652 /* Don't try to move insns which set CC registers if we should not
653 create CCmode register copies. */
654 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
655 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
656 VARRAY_CHAR (regs->may_not_optimize, i) = 1;
659 bcopy ((char *) ®s->set_in_loop->data,
660 (char *) ®s->n_times_set->data, nregs * sizeof (int));
662 if (loop_dump_stream)
664 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
665 INSN_UID (loop_start), INSN_UID (loop_end), insn_count);
667 fprintf (loop_dump_stream, "Continue at insn %d.\n",
668 INSN_UID (loop->cont));
671 /* Scan through the loop finding insns that are safe to move.
672 Set regs->set_in_loop negative for the reg being set, so that
673 this reg will be considered invariant for subsequent insns.
674 We consider whether subsequent insns use the reg
675 in deciding whether it is worth actually moving.
677 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
678 and therefore it is possible that the insns we are scanning
679 would never be executed. At such times, we must make sure
680 that it is safe to execute the insn once instead of zero times.
681 When MAYBE_NEVER is 0, all insns will be executed at least once
682 so that is not a problem. */
684 for (p = next_insn_in_loop (loop, loop->scan_start);
686 p = next_insn_in_loop (loop, p))
688 if (GET_CODE (p) == INSN
689 && (set = single_set (p))
690 && GET_CODE (SET_DEST (set)) == REG
691 && ! VARRAY_CHAR (regs->may_not_optimize, REGNO (SET_DEST (set))))
696 rtx src = SET_SRC (set);
697 rtx dependencies = 0;
699 /* Figure out what to use as a source of this insn. If a REG_EQUIV
700 note is given or if a REG_EQUAL note with a constant operand is
701 specified, use it as the source and mark that we should move
702 this insn by calling emit_move_insn rather that duplicating the
705 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
707 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
709 src = XEXP (temp, 0), move_insn = 1;
712 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
713 if (temp && CONSTANT_P (XEXP (temp, 0)))
714 src = XEXP (temp, 0), move_insn = 1;
715 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
717 src = XEXP (temp, 0);
718 /* A libcall block can use regs that don't appear in
719 the equivalent expression. To move the libcall,
720 we must move those regs too. */
721 dependencies = libcall_other_reg (p, src);
725 /* Don't try to optimize a register that was made
726 by loop-optimization for an inner loop.
727 We don't know its life-span, so we can't compute the benefit. */
728 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
730 else if (/* The register is used in basic blocks other
731 than the one where it is set (meaning that
732 something after this point in the loop might
733 depend on its value before the set). */
734 ! reg_in_basic_block_p (p, SET_DEST (set))
735 /* And the set is not guaranteed to be executed one
736 the loop starts, or the value before the set is
737 needed before the set occurs...
739 ??? Note we have quadratic behaviour here, mitigated
740 by the fact that the previous test will often fail for
741 large loops. Rather than re-scanning the entire loop
742 each time for register usage, we should build tables
743 of the register usage and use them here instead. */
745 || loop_reg_used_before_p (loop, set, p)))
746 /* It is unsafe to move the set.
748 This code used to consider it OK to move a set of a variable
749 which was not created by the user and not used in an exit test.
750 That behavior is incorrect and was removed. */
752 else if ((tem = loop_invariant_p (loop, src))
753 && (dependencies == 0
754 || (tem2 = loop_invariant_p (loop, dependencies)) != 0)
755 && (VARRAY_INT (regs->set_in_loop,
756 REGNO (SET_DEST (set))) == 1
758 = consec_sets_invariant_p
759 (loop, SET_DEST (set),
760 VARRAY_INT (regs->set_in_loop,
761 REGNO (SET_DEST (set))),
763 /* If the insn can cause a trap (such as divide by zero),
764 can't move it unless it's guaranteed to be executed
765 once loop is entered. Even a function call might
766 prevent the trap insn from being reached
767 (since it might exit!) */
768 && ! ((maybe_never || call_passed)
769 && may_trap_p (src)))
771 register struct movable *m;
772 register int regno = REGNO (SET_DEST (set));
774 /* A potential lossage is where we have a case where two insns
775 can be combined as long as they are both in the loop, but
776 we move one of them outside the loop. For large loops,
777 this can lose. The most common case of this is the address
778 of a function being called.
780 Therefore, if this register is marked as being used exactly
781 once if we are in a loop with calls (a "large loop"), see if
782 we can replace the usage of this register with the source
783 of this SET. If we can, delete this insn.
785 Don't do this if P has a REG_RETVAL note or if we have
786 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
788 if (loop_info->has_call
789 && VARRAY_RTX (regs->single_usage, regno) != 0
790 && VARRAY_RTX (regs->single_usage, regno) != const0_rtx
791 && REGNO_FIRST_UID (regno) == INSN_UID (p)
792 && (REGNO_LAST_UID (regno)
793 == INSN_UID (VARRAY_RTX (regs->single_usage, regno)))
794 && VARRAY_INT (regs->set_in_loop, regno) == 1
795 && ! side_effects_p (SET_SRC (set))
796 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
797 && (! SMALL_REGISTER_CLASSES
798 || (! (GET_CODE (SET_SRC (set)) == REG
799 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
800 /* This test is not redundant; SET_SRC (set) might be
801 a call-clobbered register and the life of REGNO
802 might span a call. */
803 && ! modified_between_p (SET_SRC (set), p,
805 (regs->single_usage, regno))
806 && no_labels_between_p (p, VARRAY_RTX (regs->single_usage,
808 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
810 (regs->single_usage, regno)))
812 /* Replace any usage in a REG_EQUAL note. Must copy the
813 new source, so that we don't get rtx sharing between the
814 SET_SOURCE and REG_NOTES of insn p. */
815 REG_NOTES (VARRAY_RTX (regs->single_usage, regno))
816 = replace_rtx (REG_NOTES (VARRAY_RTX
817 (regs->single_usage, regno)),
818 SET_DEST (set), copy_rtx (SET_SRC (set)));
821 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
822 NOTE_SOURCE_FILE (p) = 0;
823 VARRAY_INT (regs->set_in_loop, regno) = 0;
827 m = (struct movable *) xmalloc (sizeof (struct movable));
831 m->dependencies = dependencies;
832 m->set_dest = SET_DEST (set);
834 m->consec = VARRAY_INT (regs->set_in_loop,
835 REGNO (SET_DEST (set))) - 1;
839 m->move_insn = move_insn;
840 m->move_insn_first = 0;
841 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
842 m->savemode = VOIDmode;
844 /* Set M->cond if either loop_invariant_p
845 or consec_sets_invariant_p returned 2
846 (only conditionally invariant). */
847 m->cond = ((tem | tem1 | tem2) > 1);
848 m->global = LOOP_REG_GLOBAL_P (loop, regno);
850 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
851 m->savings = VARRAY_INT (regs->n_times_set, regno);
852 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
853 m->savings += libcall_benefit (p);
854 VARRAY_INT (regs->set_in_loop, regno) = move_insn ? -2 : -1;
855 /* Add M to the end of the chain MOVABLES. */
856 loop_movables_add (movables, m);
860 /* It is possible for the first instruction to have a
861 REG_EQUAL note but a non-invariant SET_SRC, so we must
862 remember the status of the first instruction in case
863 the last instruction doesn't have a REG_EQUAL note. */
864 m->move_insn_first = m->move_insn;
866 /* Skip this insn, not checking REG_LIBCALL notes. */
867 p = next_nonnote_insn (p);
868 /* Skip the consecutive insns, if there are any. */
869 p = skip_consec_insns (p, m->consec);
870 /* Back up to the last insn of the consecutive group. */
871 p = prev_nonnote_insn (p);
873 /* We must now reset m->move_insn, m->is_equiv, and possibly
874 m->set_src to correspond to the effects of all the
876 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
878 m->set_src = XEXP (temp, 0), m->move_insn = 1;
881 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
882 if (temp && CONSTANT_P (XEXP (temp, 0)))
883 m->set_src = XEXP (temp, 0), m->move_insn = 1;
888 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
891 /* If this register is always set within a STRICT_LOW_PART
892 or set to zero, then its high bytes are constant.
893 So clear them outside the loop and within the loop
894 just load the low bytes.
895 We must check that the machine has an instruction to do so.
896 Also, if the value loaded into the register
897 depends on the same register, this cannot be done. */
898 else if (SET_SRC (set) == const0_rtx
899 && GET_CODE (NEXT_INSN (p)) == INSN
900 && (set1 = single_set (NEXT_INSN (p)))
901 && GET_CODE (set1) == SET
902 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
903 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
904 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
906 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
908 register int regno = REGNO (SET_DEST (set));
909 if (VARRAY_INT (regs->set_in_loop, regno) == 2)
911 register struct movable *m;
912 m = (struct movable *) xmalloc (sizeof (struct movable));
915 m->set_dest = SET_DEST (set);
922 m->move_insn_first = 0;
924 /* If the insn may not be executed on some cycles,
925 we can't clear the whole reg; clear just high part.
926 Not even if the reg is used only within this loop.
933 Clearing x before the inner loop could clobber a value
934 being saved from the last time around the outer loop.
935 However, if the reg is not used outside this loop
936 and all uses of the register are in the same
937 basic block as the store, there is no problem.
939 If this insn was made by loop, we don't know its
940 INSN_LUID and hence must make a conservative
942 m->global = (INSN_UID (p) >= max_uid_for_loop
943 || LOOP_REG_GLOBAL_P (loop, regno)
944 || (labels_in_range_p
945 (p, REGNO_FIRST_LUID (regno))));
946 if (maybe_never && m->global)
947 m->savemode = GET_MODE (SET_SRC (set1));
949 m->savemode = VOIDmode;
953 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
955 VARRAY_INT (regs->set_in_loop, regno) = -1;
956 /* Add M to the end of the chain MOVABLES. */
957 loop_movables_add (movables, m);
961 /* Past a call insn, we get to insns which might not be executed
962 because the call might exit. This matters for insns that trap.
963 Constant and pure call insns always return, so they don't count. */
964 else if (GET_CODE (p) == CALL_INSN && ! CONST_CALL_P (p))
966 /* Past a label or a jump, we get to insns for which we
967 can't count on whether or how many times they will be
968 executed during each iteration. Therefore, we can
969 only move out sets of trivial variables
970 (those not used after the loop). */
971 /* Similar code appears twice in strength_reduce. */
972 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
973 /* If we enter the loop in the middle, and scan around to the
974 beginning, don't set maybe_never for that. This must be an
975 unconditional jump, otherwise the code at the top of the
976 loop might never be executed. Unconditional jumps are
977 followed a by barrier then loop end. */
978 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop->top
979 && NEXT_INSN (NEXT_INSN (p)) == loop_end
980 && any_uncondjump_p (p)))
982 else if (GET_CODE (p) == NOTE)
984 /* At the virtual top of a converted loop, insns are again known to
985 be executed: logically, the loop begins here even though the exit
986 code has been duplicated. */
987 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
988 maybe_never = call_passed = 0;
989 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
991 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
996 /* If one movable subsumes another, ignore that other. */
998 ignore_some_movables (movables);
1000 /* For each movable insn, see if the reg that it loads
1001 leads when it dies right into another conditionally movable insn.
1002 If so, record that the second insn "forces" the first one,
1003 since the second can be moved only if the first is. */
1005 force_movables (movables);
1007 /* See if there are multiple movable insns that load the same value.
1008 If there are, make all but the first point at the first one
1009 through the `match' field, and add the priorities of them
1010 all together as the priority of the first. */
1012 combine_movables (movables, regs);
1014 /* Now consider each movable insn to decide whether it is worth moving.
1015 Store 0 in regs->set_in_loop for each reg that is moved.
1017 Generally this increases code size, so do not move moveables when
1018 optimizing for code size. */
1020 if (! optimize_size)
1021 move_movables (loop, movables, threshold, insn_count);
1023 /* Now candidates that still are negative are those not moved.
1024 Change regs->set_in_loop to indicate that those are not actually
1026 for (i = 0; i < nregs; i++)
1027 if (VARRAY_INT (regs->set_in_loop, i) < 0)
1028 VARRAY_INT (regs->set_in_loop, i) = VARRAY_INT (regs->n_times_set, i);
1030 /* Now that we've moved some things out of the loop, we might be able to
1031 hoist even more memory references. */
1032 load_mems_and_recount_loop_regs_set (loop, &insn_count);
1034 for (update_start = loop_start;
1035 PREV_INSN (update_start)
1036 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1037 update_start = PREV_INSN (update_start))
1039 update_end = NEXT_INSN (loop_end);
1041 reg_scan_update (update_start, update_end, loop_max_reg);
1042 loop_max_reg = max_reg_num ();
1044 if (flag_strength_reduce)
1046 if (update_end && GET_CODE (update_end) == CODE_LABEL)
1047 /* Ensure our label doesn't go away. */
1048 LABEL_NUSES (update_end)++;
1050 strength_reduce (loop, insn_count, flags);
1052 reg_scan_update (update_start, update_end, loop_max_reg);
1053 loop_max_reg = max_reg_num ();
1055 if (update_end && GET_CODE (update_end) == CODE_LABEL
1056 && --LABEL_NUSES (update_end) == 0)
1057 delete_insn (update_end);
1061 /* The movable information is required for strength reduction. */
1062 loop_movables_free (movables);
1064 VARRAY_FREE (regs->single_usage);
1065 VARRAY_FREE (regs->set_in_loop);
1066 VARRAY_FREE (regs->n_times_set);
1067 VARRAY_FREE (regs->may_not_optimize);
1070 /* Add elements to *OUTPUT to record all the pseudo-regs
1071 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1074 record_excess_regs (in_this, not_in_this, output)
1075 rtx in_this, not_in_this;
1082 code = GET_CODE (in_this);
1096 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1097 && ! reg_mentioned_p (in_this, not_in_this))
1098 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1105 fmt = GET_RTX_FORMAT (code);
1106 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1113 for (j = 0; j < XVECLEN (in_this, i); j++)
1114 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1118 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1124 /* Check what regs are referred to in the libcall block ending with INSN,
1125 aside from those mentioned in the equivalent value.
1126 If there are none, return 0.
1127 If there are one or more, return an EXPR_LIST containing all of them. */
1130 libcall_other_reg (insn, equiv)
1133 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1134 rtx p = XEXP (note, 0);
1137 /* First, find all the regs used in the libcall block
1138 that are not mentioned as inputs to the result. */
1142 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1143 || GET_CODE (p) == CALL_INSN)
1144 record_excess_regs (PATTERN (p), equiv, &output);
1151 /* Return 1 if all uses of REG
1152 are between INSN and the end of the basic block. */
1155 reg_in_basic_block_p (insn, reg)
1158 int regno = REGNO (reg);
1161 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1164 /* Search this basic block for the already recorded last use of the reg. */
1165 for (p = insn; p; p = NEXT_INSN (p))
1167 switch (GET_CODE (p))
1174 /* Ordinary insn: if this is the last use, we win. */
1175 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1180 /* Jump insn: if this is the last use, we win. */
1181 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1183 /* Otherwise, it's the end of the basic block, so we lose. */
1188 /* It's the end of the basic block, so we lose. */
1196 /* The "last use" that was recorded can't be found after the first
1197 use. This can happen when the last use was deleted while
1198 processing an inner loop, this inner loop was then completely
1199 unrolled, and the outer loop is always exited after the inner loop,
1200 so that everything after the first use becomes a single basic block. */
1204 /* Compute the benefit of eliminating the insns in the block whose
1205 last insn is LAST. This may be a group of insns used to compute a
1206 value directly or can contain a library call. */
1209 libcall_benefit (last)
1215 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1216 insn != last; insn = NEXT_INSN (insn))
1218 if (GET_CODE (insn) == CALL_INSN)
1219 benefit += 10; /* Assume at least this many insns in a library
1221 else if (GET_CODE (insn) == INSN
1222 && GET_CODE (PATTERN (insn)) != USE
1223 && GET_CODE (PATTERN (insn)) != CLOBBER)
1230 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1233 skip_consec_insns (insn, count)
1237 for (; count > 0; count--)
1241 /* If first insn of libcall sequence, skip to end. */
1242 /* Do this at start of loop, since INSN is guaranteed to
1244 if (GET_CODE (insn) != NOTE
1245 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1246 insn = XEXP (temp, 0);
1249 insn = NEXT_INSN (insn);
1250 while (GET_CODE (insn) == NOTE);
1256 /* Ignore any movable whose insn falls within a libcall
1257 which is part of another movable.
1258 We make use of the fact that the movable for the libcall value
1259 was made later and so appears later on the chain. */
1262 ignore_some_movables (movables)
1263 struct loop_movables *movables;
1265 register struct movable *m, *m1;
1267 for (m = movables->head; m; m = m->next)
1269 /* Is this a movable for the value of a libcall? */
1270 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1274 /* Check for earlier movables inside that range,
1275 and mark them invalid. We cannot use LUIDs here because
1276 insns created by loop.c for prior loops don't have LUIDs.
1277 Rather than reject all such insns from movables, we just
1278 explicitly check each insn in the libcall (since invariant
1279 libcalls aren't that common). */
1280 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1281 for (m1 = movables->head; m1 != m; m1 = m1->next)
1282 if (m1->insn == insn)
1288 /* For each movable insn, see if the reg that it loads
1289 leads when it dies right into another conditionally movable insn.
1290 If so, record that the second insn "forces" the first one,
1291 since the second can be moved only if the first is. */
1294 force_movables (movables)
1295 struct loop_movables *movables;
1297 register struct movable *m, *m1;
1298 for (m1 = movables->head; m1; m1 = m1->next)
1299 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1300 if (!m1->partial && !m1->done)
1302 int regno = m1->regno;
1303 for (m = m1->next; m; m = m->next)
1304 /* ??? Could this be a bug? What if CSE caused the
1305 register of M1 to be used after this insn?
1306 Since CSE does not update regno_last_uid,
1307 this insn M->insn might not be where it dies.
1308 But very likely this doesn't matter; what matters is
1309 that M's reg is computed from M1's reg. */
1310 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1313 if (m != 0 && m->set_src == m1->set_dest
1314 /* If m->consec, m->set_src isn't valid. */
1318 /* Increase the priority of the moving the first insn
1319 since it permits the second to be moved as well. */
1323 m1->lifetime += m->lifetime;
1324 m1->savings += m->savings;
1329 /* Find invariant expressions that are equal and can be combined into
1333 combine_movables (movables, regs)
1334 struct loop_movables *movables;
1335 struct loop_regs *regs;
1337 register struct movable *m;
1338 char *matched_regs = (char *) xmalloc (regs->num);
1339 enum machine_mode mode;
1341 /* Regs that are set more than once are not allowed to match
1342 or be matched. I'm no longer sure why not. */
1343 /* Perhaps testing m->consec_sets would be more appropriate here? */
1345 for (m = movables->head; m; m = m->next)
1346 if (m->match == 0 && VARRAY_INT (regs->n_times_set, m->regno) == 1
1349 register struct movable *m1;
1350 int regno = m->regno;
1352 memset (matched_regs, 0, regs->num);
1353 matched_regs[regno] = 1;
1355 /* We want later insns to match the first one. Don't make the first
1356 one match any later ones. So start this loop at m->next. */
1357 for (m1 = m->next; m1; m1 = m1->next)
1358 if (m != m1 && m1->match == 0 && VARRAY_INT (regs->n_times_set,
1360 /* A reg used outside the loop mustn't be eliminated. */
1362 /* A reg used for zero-extending mustn't be eliminated. */
1364 && (matched_regs[m1->regno]
1367 /* Can combine regs with different modes loaded from the
1368 same constant only if the modes are the same or
1369 if both are integer modes with M wider or the same
1370 width as M1. The check for integer is redundant, but
1371 safe, since the only case of differing destination
1372 modes with equal sources is when both sources are
1373 VOIDmode, i.e., CONST_INT. */
1374 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1375 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1376 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1377 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1378 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1379 /* See if the source of M1 says it matches M. */
1380 && ((GET_CODE (m1->set_src) == REG
1381 && matched_regs[REGNO (m1->set_src)])
1382 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1384 && ((m->dependencies == m1->dependencies)
1385 || rtx_equal_p (m->dependencies, m1->dependencies)))
1387 m->lifetime += m1->lifetime;
1388 m->savings += m1->savings;
1391 matched_regs[m1->regno] = 1;
1395 /* Now combine the regs used for zero-extension.
1396 This can be done for those not marked `global'
1397 provided their lives don't overlap. */
1399 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1400 mode = GET_MODE_WIDER_MODE (mode))
1402 register struct movable *m0 = 0;
1404 /* Combine all the registers for extension from mode MODE.
1405 Don't combine any that are used outside this loop. */
1406 for (m = movables->head; m; m = m->next)
1407 if (m->partial && ! m->global
1408 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1410 register struct movable *m1;
1411 int first = REGNO_FIRST_LUID (m->regno);
1412 int last = REGNO_LAST_LUID (m->regno);
1416 /* First one: don't check for overlap, just record it. */
1421 /* Make sure they extend to the same mode.
1422 (Almost always true.) */
1423 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1426 /* We already have one: check for overlap with those
1427 already combined together. */
1428 for (m1 = movables->head; m1 != m; m1 = m1->next)
1429 if (m1 == m0 || (m1->partial && m1->match == m0))
1430 if (! (REGNO_FIRST_LUID (m1->regno) > last
1431 || REGNO_LAST_LUID (m1->regno) < first))
1434 /* No overlap: we can combine this with the others. */
1435 m0->lifetime += m->lifetime;
1436 m0->savings += m->savings;
1446 free (matched_regs);
1449 /* Return 1 if regs X and Y will become the same if moved. */
1452 regs_match_p (x, y, movables)
1454 struct loop_movables *movables;
1456 unsigned int xn = REGNO (x);
1457 unsigned int yn = REGNO (y);
1458 struct movable *mx, *my;
1460 for (mx = movables->head; mx; mx = mx->next)
1461 if (mx->regno == xn)
1464 for (my = movables->head; my; my = my->next)
1465 if (my->regno == yn)
1469 && ((mx->match == my->match && mx->match != 0)
1471 || mx == my->match));
1474 /* Return 1 if X and Y are identical-looking rtx's.
1475 This is the Lisp function EQUAL for rtx arguments.
1477 If two registers are matching movables or a movable register and an
1478 equivalent constant, consider them equal. */
1481 rtx_equal_for_loop_p (x, y, movables, regs)
1483 struct loop_movables *movables;
1484 struct loop_regs *regs;
1488 register struct movable *m;
1489 register enum rtx_code code;
1490 register const char *fmt;
1494 if (x == 0 || y == 0)
1497 code = GET_CODE (x);
1499 /* If we have a register and a constant, they may sometimes be
1501 if (GET_CODE (x) == REG && VARRAY_INT (regs->set_in_loop, REGNO (x)) == -2
1504 for (m = movables->head; m; m = m->next)
1505 if (m->move_insn && m->regno == REGNO (x)
1506 && rtx_equal_p (m->set_src, y))
1509 else if (GET_CODE (y) == REG && VARRAY_INT (regs->set_in_loop,
1513 for (m = movables->head; m; m = m->next)
1514 if (m->move_insn && m->regno == REGNO (y)
1515 && rtx_equal_p (m->set_src, x))
1519 /* Otherwise, rtx's of different codes cannot be equal. */
1520 if (code != GET_CODE (y))
1523 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1524 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1526 if (GET_MODE (x) != GET_MODE (y))
1529 /* These three types of rtx's can be compared nonrecursively. */
1531 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1533 if (code == LABEL_REF)
1534 return XEXP (x, 0) == XEXP (y, 0);
1535 if (code == SYMBOL_REF)
1536 return XSTR (x, 0) == XSTR (y, 0);
1538 /* Compare the elements. If any pair of corresponding elements
1539 fail to match, return 0 for the whole things. */
1541 fmt = GET_RTX_FORMAT (code);
1542 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1547 if (XWINT (x, i) != XWINT (y, i))
1552 if (XINT (x, i) != XINT (y, i))
1557 /* Two vectors must have the same length. */
1558 if (XVECLEN (x, i) != XVECLEN (y, i))
1561 /* And the corresponding elements must match. */
1562 for (j = 0; j < XVECLEN (x, i); j++)
1563 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
1564 movables, regs) == 0)
1569 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables, regs)
1575 if (strcmp (XSTR (x, i), XSTR (y, i)))
1580 /* These are just backpointers, so they don't matter. */
1586 /* It is believed that rtx's at this level will never
1587 contain anything but integers and other rtx's,
1588 except for within LABEL_REFs and SYMBOL_REFs. */
1596 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1597 insns in INSNS which use the reference. LABEL_NUSES for CODE_LABEL
1598 references is incremented once for each added note. */
1601 add_label_notes (x, insns)
1605 enum rtx_code code = GET_CODE (x);
1610 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1612 /* This code used to ignore labels that referred to dispatch tables to
1613 avoid flow generating (slighly) worse code.
1615 We no longer ignore such label references (see LABEL_REF handling in
1616 mark_jump_label for additional information). */
1617 for (insn = insns; insn; insn = NEXT_INSN (insn))
1618 if (reg_mentioned_p (XEXP (x, 0), insn))
1620 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, XEXP (x, 0),
1622 if (LABEL_P (XEXP (x, 0)))
1623 LABEL_NUSES (XEXP (x, 0))++;
1627 fmt = GET_RTX_FORMAT (code);
1628 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1631 add_label_notes (XEXP (x, i), insns);
1632 else if (fmt[i] == 'E')
1633 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1634 add_label_notes (XVECEXP (x, i, j), insns);
1638 /* Scan MOVABLES, and move the insns that deserve to be moved.
1639 If two matching movables are combined, replace one reg with the
1640 other throughout. */
1643 move_movables (loop, movables, threshold, insn_count)
1645 struct loop_movables *movables;
1649 struct loop_regs *regs = LOOP_REGS (loop);
1650 int nregs = regs->num;
1652 register struct movable *m;
1654 rtx loop_start = loop->start;
1655 rtx loop_end = loop->end;
1656 /* Map of pseudo-register replacements to handle combining
1657 when we move several insns that load the same value
1658 into different pseudo-registers. */
1659 rtx *reg_map = (rtx *) xcalloc (nregs, sizeof (rtx));
1660 char *already_moved = (char *) xcalloc (nregs, sizeof (char));
1664 for (m = movables->head; m; m = m->next)
1666 /* Describe this movable insn. */
1668 if (loop_dump_stream)
1670 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1671 INSN_UID (m->insn), m->regno, m->lifetime);
1673 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1675 fprintf (loop_dump_stream, "cond ");
1677 fprintf (loop_dump_stream, "force ");
1679 fprintf (loop_dump_stream, "global ");
1681 fprintf (loop_dump_stream, "done ");
1683 fprintf (loop_dump_stream, "move-insn ");
1685 fprintf (loop_dump_stream, "matches %d ",
1686 INSN_UID (m->match->insn));
1688 fprintf (loop_dump_stream, "forces %d ",
1689 INSN_UID (m->forces->insn));
1692 /* Count movables. Value used in heuristics in strength_reduce. */
1695 /* Ignore the insn if it's already done (it matched something else).
1696 Otherwise, see if it is now safe to move. */
1700 || (1 == loop_invariant_p (loop, m->set_src)
1701 && (m->dependencies == 0
1702 || 1 == loop_invariant_p (loop, m->dependencies))
1704 || 1 == consec_sets_invariant_p (loop, m->set_dest,
1707 && (! m->forces || m->forces->done))
1711 int savings = m->savings;
1713 /* We have an insn that is safe to move.
1714 Compute its desirability. */
1719 if (loop_dump_stream)
1720 fprintf (loop_dump_stream, "savings %d ", savings);
1722 if (regs->moved_once[regno] && loop_dump_stream)
1723 fprintf (loop_dump_stream, "halved since already moved ");
1725 /* An insn MUST be moved if we already moved something else
1726 which is safe only if this one is moved too: that is,
1727 if already_moved[REGNO] is nonzero. */
1729 /* An insn is desirable to move if the new lifetime of the
1730 register is no more than THRESHOLD times the old lifetime.
1731 If it's not desirable, it means the loop is so big
1732 that moving won't speed things up much,
1733 and it is liable to make register usage worse. */
1735 /* It is also desirable to move if it can be moved at no
1736 extra cost because something else was already moved. */
1738 if (already_moved[regno]
1739 || flag_move_all_movables
1740 || (threshold * savings * m->lifetime) >=
1741 (regs->moved_once[regno] ? insn_count * 2 : insn_count)
1742 || (m->forces && m->forces->done
1743 && VARRAY_INT (regs->n_times_set, m->forces->regno) == 1))
1746 register struct movable *m1;
1747 rtx first = NULL_RTX;
1749 /* Now move the insns that set the reg. */
1751 if (m->partial && m->match)
1755 /* Find the end of this chain of matching regs.
1756 Thus, we load each reg in the chain from that one reg.
1757 And that reg is loaded with 0 directly,
1758 since it has ->match == 0. */
1759 for (m1 = m; m1->match; m1 = m1->match);
1760 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1761 SET_DEST (PATTERN (m1->insn)));
1762 i1 = emit_insn_before (newpat, loop_start);
1764 /* Mark the moved, invariant reg as being allowed to
1765 share a hard reg with the other matching invariant. */
1766 REG_NOTES (i1) = REG_NOTES (m->insn);
1767 r1 = SET_DEST (PATTERN (m->insn));
1768 r2 = SET_DEST (PATTERN (m1->insn));
1770 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1771 gen_rtx_EXPR_LIST (VOIDmode, r2,
1773 delete_insn (m->insn);
1778 if (loop_dump_stream)
1779 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1781 /* If we are to re-generate the item being moved with a
1782 new move insn, first delete what we have and then emit
1783 the move insn before the loop. */
1784 else if (m->move_insn)
1788 for (count = m->consec; count >= 0; count--)
1790 /* If this is the first insn of a library call sequence,
1792 if (GET_CODE (p) != NOTE
1793 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1796 /* If this is the last insn of a libcall sequence, then
1797 delete every insn in the sequence except the last.
1798 The last insn is handled in the normal manner. */
1799 if (GET_CODE (p) != NOTE
1800 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1802 temp = XEXP (temp, 0);
1804 temp = delete_insn (temp);
1808 p = delete_insn (p);
1810 /* simplify_giv_expr expects that it can walk the insns
1811 at m->insn forwards and see this old sequence we are
1812 tossing here. delete_insn does preserve the next
1813 pointers, but when we skip over a NOTE we must fix
1814 it up. Otherwise that code walks into the non-deleted
1816 while (p && GET_CODE (p) == NOTE)
1817 p = NEXT_INSN (temp) = NEXT_INSN (p);
1821 emit_move_insn (m->set_dest, m->set_src);
1822 temp = get_insns ();
1825 add_label_notes (m->set_src, temp);
1827 i1 = emit_insns_before (temp, loop_start);
1828 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1830 = gen_rtx_EXPR_LIST (m->is_equiv ? REG_EQUIV : REG_EQUAL,
1831 m->set_src, REG_NOTES (i1));
1833 if (loop_dump_stream)
1834 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1836 /* The more regs we move, the less we like moving them. */
1841 for (count = m->consec; count >= 0; count--)
1845 /* If first insn of libcall sequence, skip to end. */
1846 /* Do this at start of loop, since p is guaranteed to
1848 if (GET_CODE (p) != NOTE
1849 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1852 /* If last insn of libcall sequence, move all
1853 insns except the last before the loop. The last
1854 insn is handled in the normal manner. */
1855 if (GET_CODE (p) != NOTE
1856 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1860 rtx fn_address_insn = 0;
1863 for (temp = XEXP (temp, 0); temp != p;
1864 temp = NEXT_INSN (temp))
1870 if (GET_CODE (temp) == NOTE)
1873 body = PATTERN (temp);
1875 /* Find the next insn after TEMP,
1876 not counting USE or NOTE insns. */
1877 for (next = NEXT_INSN (temp); next != p;
1878 next = NEXT_INSN (next))
1879 if (! (GET_CODE (next) == INSN
1880 && GET_CODE (PATTERN (next)) == USE)
1881 && GET_CODE (next) != NOTE)
1884 /* If that is the call, this may be the insn
1885 that loads the function address.
1887 Extract the function address from the insn
1888 that loads it into a register.
1889 If this insn was cse'd, we get incorrect code.
1891 So emit a new move insn that copies the
1892 function address into the register that the
1893 call insn will use. flow.c will delete any
1894 redundant stores that we have created. */
1895 if (GET_CODE (next) == CALL_INSN
1896 && GET_CODE (body) == SET
1897 && GET_CODE (SET_DEST (body)) == REG
1898 && (n = find_reg_note (temp, REG_EQUAL,
1901 fn_reg = SET_SRC (body);
1902 if (GET_CODE (fn_reg) != REG)
1903 fn_reg = SET_DEST (body);
1904 fn_address = XEXP (n, 0);
1905 fn_address_insn = temp;
1907 /* We have the call insn.
1908 If it uses the register we suspect it might,
1909 load it with the correct address directly. */
1910 if (GET_CODE (temp) == CALL_INSN
1912 && reg_referenced_p (fn_reg, body))
1913 emit_insn_after (gen_move_insn (fn_reg,
1917 if (GET_CODE (temp) == CALL_INSN)
1919 i1 = emit_call_insn_before (body, loop_start);
1920 /* Because the USAGE information potentially
1921 contains objects other than hard registers
1922 we need to copy it. */
1923 if (CALL_INSN_FUNCTION_USAGE (temp))
1924 CALL_INSN_FUNCTION_USAGE (i1)
1925 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
1928 i1 = emit_insn_before (body, loop_start);
1931 if (temp == fn_address_insn)
1932 fn_address_insn = i1;
1933 REG_NOTES (i1) = REG_NOTES (temp);
1939 if (m->savemode != VOIDmode)
1941 /* P sets REG to zero; but we should clear only
1942 the bits that are not covered by the mode
1944 rtx reg = m->set_dest;
1950 (GET_MODE (reg), and_optab, reg,
1951 GEN_INT ((((HOST_WIDE_INT) 1
1952 << GET_MODE_BITSIZE (m->savemode)))
1954 reg, 1, OPTAB_LIB_WIDEN);
1958 emit_move_insn (reg, tem);
1959 sequence = gen_sequence ();
1961 i1 = emit_insn_before (sequence, loop_start);
1963 else if (GET_CODE (p) == CALL_INSN)
1965 i1 = emit_call_insn_before (PATTERN (p), loop_start);
1966 /* Because the USAGE information potentially
1967 contains objects other than hard registers
1968 we need to copy it. */
1969 if (CALL_INSN_FUNCTION_USAGE (p))
1970 CALL_INSN_FUNCTION_USAGE (i1)
1971 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
1973 else if (count == m->consec && m->move_insn_first)
1975 /* The SET_SRC might not be invariant, so we must
1976 use the REG_EQUAL note. */
1978 emit_move_insn (m->set_dest, m->set_src);
1979 temp = get_insns ();
1982 add_label_notes (m->set_src, temp);
1984 i1 = emit_insns_before (temp, loop_start);
1985 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1987 = gen_rtx_EXPR_LIST ((m->is_equiv ? REG_EQUIV
1989 m->set_src, REG_NOTES (i1));
1992 i1 = emit_insn_before (PATTERN (p), loop_start);
1994 if (REG_NOTES (i1) == 0)
1996 REG_NOTES (i1) = REG_NOTES (p);
1998 /* If there is a REG_EQUAL note present whose value
1999 is not loop invariant, then delete it, since it
2000 may cause problems with later optimization passes.
2001 It is possible for cse to create such notes
2002 like this as a result of record_jump_cond. */
2004 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2005 && ! loop_invariant_p (loop, XEXP (temp, 0)))
2006 remove_note (i1, temp);
2012 if (loop_dump_stream)
2013 fprintf (loop_dump_stream, " moved to %d",
2016 /* If library call, now fix the REG_NOTES that contain
2017 insn pointers, namely REG_LIBCALL on FIRST
2018 and REG_RETVAL on I1. */
2019 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2021 XEXP (temp, 0) = first;
2022 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2023 XEXP (temp, 0) = i1;
2030 /* simplify_giv_expr expects that it can walk the insns
2031 at m->insn forwards and see this old sequence we are
2032 tossing here. delete_insn does preserve the next
2033 pointers, but when we skip over a NOTE we must fix
2034 it up. Otherwise that code walks into the non-deleted
2036 while (p && GET_CODE (p) == NOTE)
2037 p = NEXT_INSN (temp) = NEXT_INSN (p);
2040 /* The more regs we move, the less we like moving them. */
2044 /* Any other movable that loads the same register
2046 already_moved[regno] = 1;
2048 /* This reg has been moved out of one loop. */
2049 regs->moved_once[regno] = 1;
2051 /* The reg set here is now invariant. */
2053 VARRAY_INT (regs->set_in_loop, regno) = 0;
2057 /* Change the length-of-life info for the register
2058 to say it lives at least the full length of this loop.
2059 This will help guide optimizations in outer loops. */
2061 if (REGNO_FIRST_LUID (regno) > INSN_LUID (loop_start))
2062 /* This is the old insn before all the moved insns.
2063 We can't use the moved insn because it is out of range
2064 in uid_luid. Only the old insns have luids. */
2065 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2066 if (REGNO_LAST_LUID (regno) < INSN_LUID (loop_end))
2067 REGNO_LAST_UID (regno) = INSN_UID (loop_end);
2069 /* Combine with this moved insn any other matching movables. */
2072 for (m1 = movables->head; m1; m1 = m1->next)
2077 /* Schedule the reg loaded by M1
2078 for replacement so that shares the reg of M.
2079 If the modes differ (only possible in restricted
2080 circumstances, make a SUBREG.
2082 Note this assumes that the target dependent files
2083 treat REG and SUBREG equally, including within
2084 GO_IF_LEGITIMATE_ADDRESS and in all the
2085 predicates since we never verify that replacing the
2086 original register with a SUBREG results in a
2087 recognizable insn. */
2088 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2089 reg_map[m1->regno] = m->set_dest;
2092 = gen_lowpart_common (GET_MODE (m1->set_dest),
2095 /* Get rid of the matching insn
2096 and prevent further processing of it. */
2099 /* if library call, delete all insn except last, which
2101 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2104 for (temp = XEXP (temp, 0); temp != m1->insn;
2105 temp = NEXT_INSN (temp))
2108 delete_insn (m1->insn);
2110 /* Any other movable that loads the same register
2112 already_moved[m1->regno] = 1;
2114 /* The reg merged here is now invariant,
2115 if the reg it matches is invariant. */
2117 VARRAY_INT (regs->set_in_loop, m1->regno) = 0;
2120 else if (loop_dump_stream)
2121 fprintf (loop_dump_stream, "not desirable");
2123 else if (loop_dump_stream && !m->match)
2124 fprintf (loop_dump_stream, "not safe");
2126 if (loop_dump_stream)
2127 fprintf (loop_dump_stream, "\n");
2131 new_start = loop_start;
2133 /* Go through all the instructions in the loop, making
2134 all the register substitutions scheduled in REG_MAP. */
2135 for (p = new_start; p != loop_end; p = NEXT_INSN (p))
2136 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2137 || GET_CODE (p) == CALL_INSN)
2139 replace_regs (PATTERN (p), reg_map, nregs, 0);
2140 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2146 free (already_moved);
2151 loop_movables_add (movables, m)
2152 struct loop_movables *movables;
2155 if (movables->head == 0)
2158 movables->last->next = m;
2164 loop_movables_free (movables)
2165 struct loop_movables *movables;
2168 struct movable *m_next;
2170 for (m = movables->head; m; m = m_next)
2178 /* Scan X and replace the address of any MEM in it with ADDR.
2179 REG is the address that MEM should have before the replacement. */
2182 replace_call_address (x, reg, addr)
2185 register enum rtx_code code;
2187 register const char *fmt;
2191 code = GET_CODE (x);
2205 /* Short cut for very common case. */
2206 replace_call_address (XEXP (x, 1), reg, addr);
2210 /* Short cut for very common case. */
2211 replace_call_address (XEXP (x, 0), reg, addr);
2215 /* If this MEM uses a reg other than the one we expected,
2216 something is wrong. */
2217 if (XEXP (x, 0) != reg)
2226 fmt = GET_RTX_FORMAT (code);
2227 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2230 replace_call_address (XEXP (x, i), reg, addr);
2231 else if (fmt[i] == 'E')
2234 for (j = 0; j < XVECLEN (x, i); j++)
2235 replace_call_address (XVECEXP (x, i, j), reg, addr);
2241 /* Return the number of memory refs to addresses that vary
2245 count_nonfixed_reads (loop, x)
2246 const struct loop *loop;
2249 register enum rtx_code code;
2251 register const char *fmt;
2257 code = GET_CODE (x);
2271 return ((loop_invariant_p (loop, XEXP (x, 0)) != 1)
2272 + count_nonfixed_reads (loop, XEXP (x, 0)));
2279 fmt = GET_RTX_FORMAT (code);
2280 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2283 value += count_nonfixed_reads (loop, XEXP (x, i));
2287 for (j = 0; j < XVECLEN (x, i); j++)
2288 value += count_nonfixed_reads (loop, XVECEXP (x, i, j));
2294 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2295 `has_call', `has_volatile', `has_tablejump',
2296 `unknown_address_altered', `unknown_constant_address_altered', and
2297 `num_mem_sets' in LOOP. Also, fill in the array `mems' and the
2298 list `store_mems' in LOOP. */
2304 register int level = 1;
2306 struct loop_info *loop_info = LOOP_INFO (loop);
2307 rtx start = loop->start;
2308 rtx end = loop->end;
2309 /* The label after END. Jumping here is just like falling off the
2310 end of the loop. We use next_nonnote_insn instead of next_label
2311 as a hedge against the (pathological) case where some actual insn
2312 might end up between the two. */
2313 rtx exit_target = next_nonnote_insn (end);
2315 loop_info->has_indirect_jump = indirect_jump_in_function;
2316 loop_info->pre_header_has_call = 0;
2317 loop_info->has_call = 0;
2318 loop_info->has_volatile = 0;
2319 loop_info->has_tablejump = 0;
2320 loop_info->has_multiple_exit_targets = 0;
2323 loop_info->unknown_address_altered = 0;
2324 loop_info->unknown_constant_address_altered = 0;
2325 loop_info->store_mems = NULL_RTX;
2326 loop_info->first_loop_store_insn = NULL_RTX;
2327 loop_info->mems_idx = 0;
2328 loop_info->num_mem_sets = 0;
2331 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
2332 insn = PREV_INSN (insn))
2334 if (GET_CODE (insn) == CALL_INSN)
2336 loop_info->pre_header_has_call = 1;
2341 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2342 insn = NEXT_INSN (insn))
2344 if (GET_CODE (insn) == NOTE)
2346 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2349 /* Count number of loops contained in this one. */
2352 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2357 else if (GET_CODE (insn) == CALL_INSN)
2359 if (! CONST_CALL_P (insn))
2360 loop_info->unknown_address_altered = 1;
2361 loop_info->has_call = 1;
2363 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2365 rtx label1 = NULL_RTX;
2366 rtx label2 = NULL_RTX;
2368 if (volatile_refs_p (PATTERN (insn)))
2369 loop_info->has_volatile = 1;
2371 if (GET_CODE (insn) == JUMP_INSN
2372 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2373 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2374 loop_info->has_tablejump = 1;
2376 note_stores (PATTERN (insn), note_addr_stored, loop_info);
2377 if (! loop_info->first_loop_store_insn && loop_info->store_mems)
2378 loop_info->first_loop_store_insn = insn;
2380 if (! loop_info->has_multiple_exit_targets
2381 && GET_CODE (insn) == JUMP_INSN
2382 && GET_CODE (PATTERN (insn)) == SET
2383 && SET_DEST (PATTERN (insn)) == pc_rtx)
2385 if (GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
2387 label1 = XEXP (SET_SRC (PATTERN (insn)), 1);
2388 label2 = XEXP (SET_SRC (PATTERN (insn)), 2);
2392 label1 = SET_SRC (PATTERN (insn));
2397 if (label1 && label1 != pc_rtx)
2399 if (GET_CODE (label1) != LABEL_REF)
2401 /* Something tricky. */
2402 loop_info->has_multiple_exit_targets = 1;
2405 else if (XEXP (label1, 0) != exit_target
2406 && LABEL_OUTSIDE_LOOP_P (label1))
2408 /* A jump outside the current loop. */
2409 loop_info->has_multiple_exit_targets = 1;
2420 else if (GET_CODE (insn) == RETURN)
2421 loop_info->has_multiple_exit_targets = 1;
2424 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2425 if (/* An exception thrown by a called function might land us
2427 ! loop_info->has_call
2428 /* We don't want loads for MEMs moved to a location before the
2429 one at which their stack memory becomes allocated. (Note
2430 that this is not a problem for malloc, etc., since those
2431 require actual function calls. */
2432 && ! current_function_calls_alloca
2433 /* There are ways to leave the loop other than falling off the
2435 && ! loop_info->has_multiple_exit_targets)
2436 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2437 insn = NEXT_INSN (insn))
2438 for_each_rtx (&insn, insert_loop_mem, loop_info);
2440 /* BLKmode MEMs are added to LOOP_STORE_MEM as necessary so
2441 that loop_invariant_p and load_mems can use true_dependence
2442 to determine what is really clobbered. */
2443 if (loop_info->unknown_address_altered)
2445 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2447 loop_info->store_mems
2448 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2450 if (loop_info->unknown_constant_address_altered)
2452 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2454 RTX_UNCHANGING_P (mem) = 1;
2455 loop_info->store_mems
2456 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2460 /* Scan the function looking for loops. Record the start and end of each loop.
2461 Also mark as invalid loops any loops that contain a setjmp or are branched
2462 to from outside the loop. */
2465 find_and_verify_loops (f, loops)
2467 struct loops *loops;
2472 struct loop *current_loop;
2473 struct loop *next_loop;
2476 num_loops = loops->num;
2478 compute_luids (f, NULL_RTX, 0);
2480 /* If there are jumps to undefined labels,
2481 treat them as jumps out of any/all loops.
2482 This also avoids writing past end of tables when there are no loops. */
2485 /* Find boundaries of loops, mark which loops are contained within
2486 loops, and invalidate loops that have setjmp. */
2489 current_loop = NULL;
2490 for (insn = f; insn; insn = NEXT_INSN (insn))
2492 if (GET_CODE (insn) == NOTE)
2493 switch (NOTE_LINE_NUMBER (insn))
2495 case NOTE_INSN_LOOP_BEG:
2496 next_loop = loops->array + num_loops;
2497 next_loop->num = num_loops;
2499 next_loop->start = insn;
2500 next_loop->outer = current_loop;
2501 current_loop = next_loop;
2504 case NOTE_INSN_SETJMP:
2505 /* In this case, we must invalidate our current loop and any
2507 for (loop = current_loop; loop; loop = loop->outer)
2510 if (loop_dump_stream)
2511 fprintf (loop_dump_stream,
2512 "\nLoop at %d ignored due to setjmp.\n",
2513 INSN_UID (loop->start));
2517 case NOTE_INSN_LOOP_CONT:
2518 current_loop->cont = insn;
2521 case NOTE_INSN_LOOP_VTOP:
2522 current_loop->vtop = insn;
2525 case NOTE_INSN_LOOP_END:
2529 current_loop->end = insn;
2530 current_loop = current_loop->outer;
2537 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2538 enclosing loop, but this doesn't matter. */
2539 uid_loop[INSN_UID (insn)] = current_loop;
2542 /* Any loop containing a label used in an initializer must be invalidated,
2543 because it can be jumped into from anywhere. */
2545 for (label = forced_labels; label; label = XEXP (label, 1))
2547 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2548 loop; loop = loop->outer)
2552 /* Any loop containing a label used for an exception handler must be
2553 invalidated, because it can be jumped into from anywhere. */
2555 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2557 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2558 loop; loop = loop->outer)
2562 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2563 loop that it is not contained within, that loop is marked invalid.
2564 If any INSN or CALL_INSN uses a label's address, then the loop containing
2565 that label is marked invalid, because it could be jumped into from
2568 Also look for blocks of code ending in an unconditional branch that
2569 exits the loop. If such a block is surrounded by a conditional
2570 branch around the block, move the block elsewhere (see below) and
2571 invert the jump to point to the code block. This may eliminate a
2572 label in our loop and will simplify processing by both us and a
2573 possible second cse pass. */
2575 for (insn = f; insn; insn = NEXT_INSN (insn))
2578 struct loop *this_loop = uid_loop[INSN_UID (insn)];
2580 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2582 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2585 for (loop = uid_loop[INSN_UID (XEXP (note, 0))];
2586 loop; loop = loop->outer)
2591 if (GET_CODE (insn) != JUMP_INSN)
2594 mark_loop_jump (PATTERN (insn), this_loop);
2596 /* See if this is an unconditional branch outside the loop. */
2598 && (GET_CODE (PATTERN (insn)) == RETURN
2599 || (any_uncondjump_p (insn)
2600 && onlyjump_p (insn)
2601 && (uid_loop[INSN_UID (JUMP_LABEL (insn))]
2603 && get_max_uid () < max_uid_for_loop)
2606 rtx our_next = next_real_insn (insn);
2607 rtx last_insn_to_move = NEXT_INSN (insn);
2608 struct loop *dest_loop;
2609 struct loop *outer_loop = NULL;
2611 /* Go backwards until we reach the start of the loop, a label,
2613 for (p = PREV_INSN (insn);
2614 GET_CODE (p) != CODE_LABEL
2615 && ! (GET_CODE (p) == NOTE
2616 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2617 && GET_CODE (p) != JUMP_INSN;
2621 /* Check for the case where we have a jump to an inner nested
2622 loop, and do not perform the optimization in that case. */
2624 if (JUMP_LABEL (insn))
2626 dest_loop = uid_loop[INSN_UID (JUMP_LABEL (insn))];
2629 for (outer_loop = dest_loop; outer_loop;
2630 outer_loop = outer_loop->outer)
2631 if (outer_loop == this_loop)
2636 /* Make sure that the target of P is within the current loop. */
2638 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2639 && uid_loop[INSN_UID (JUMP_LABEL (p))] != this_loop)
2640 outer_loop = this_loop;
2642 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2643 we have a block of code to try to move.
2645 We look backward and then forward from the target of INSN
2646 to find a BARRIER at the same loop depth as the target.
2647 If we find such a BARRIER, we make a new label for the start
2648 of the block, invert the jump in P and point it to that label,
2649 and move the block of code to the spot we found. */
2652 && GET_CODE (p) == JUMP_INSN
2653 && JUMP_LABEL (p) != 0
2654 /* Just ignore jumps to labels that were never emitted.
2655 These always indicate compilation errors. */
2656 && INSN_UID (JUMP_LABEL (p)) != 0
2657 && any_condjump_p (p) && onlyjump_p (p)
2658 && next_real_insn (JUMP_LABEL (p)) == our_next
2659 /* If it's not safe to move the sequence, then we
2661 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2662 &last_insn_to_move))
2665 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2666 struct loop *target_loop = uid_loop[INSN_UID (target)];
2669 for (loc = target; loc; loc = PREV_INSN (loc))
2670 if (GET_CODE (loc) == BARRIER
2671 /* Don't move things inside a tablejump. */
2672 && ((loc2 = next_nonnote_insn (loc)) == 0
2673 || GET_CODE (loc2) != CODE_LABEL
2674 || (loc2 = next_nonnote_insn (loc2)) == 0
2675 || GET_CODE (loc2) != JUMP_INSN
2676 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2677 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2678 && uid_loop[INSN_UID (loc)] == target_loop)
2682 for (loc = target; loc; loc = NEXT_INSN (loc))
2683 if (GET_CODE (loc) == BARRIER
2684 /* Don't move things inside a tablejump. */
2685 && ((loc2 = next_nonnote_insn (loc)) == 0
2686 || GET_CODE (loc2) != CODE_LABEL
2687 || (loc2 = next_nonnote_insn (loc2)) == 0
2688 || GET_CODE (loc2) != JUMP_INSN
2689 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2690 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2691 && uid_loop[INSN_UID (loc)] == target_loop)
2696 rtx cond_label = JUMP_LABEL (p);
2697 rtx new_label = get_label_after (p);
2699 /* Ensure our label doesn't go away. */
2700 LABEL_NUSES (cond_label)++;
2702 /* Verify that uid_loop is large enough and that
2704 if (invert_jump (p, new_label, 1))
2708 /* If no suitable BARRIER was found, create a suitable
2709 one before TARGET. Since TARGET is a fall through
2710 path, we'll need to insert an jump around our block
2711 and a add a BARRIER before TARGET.
2713 This creates an extra unconditional jump outside
2714 the loop. However, the benefits of removing rarely
2715 executed instructions from inside the loop usually
2716 outweighs the cost of the extra unconditional jump
2717 outside the loop. */
2722 temp = gen_jump (JUMP_LABEL (insn));
2723 temp = emit_jump_insn_before (temp, target);
2724 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2725 LABEL_NUSES (JUMP_LABEL (insn))++;
2726 loc = emit_barrier_before (target);
2729 /* Include the BARRIER after INSN and copy the
2731 new_label = squeeze_notes (new_label,
2733 reorder_insns (new_label, last_insn_to_move, loc);
2735 /* All those insns are now in TARGET_LOOP. */
2737 q != NEXT_INSN (last_insn_to_move);
2739 uid_loop[INSN_UID (q)] = target_loop;
2741 /* The label jumped to by INSN is no longer a loop
2742 exit. Unless INSN does not have a label (e.g.,
2743 it is a RETURN insn), search loop->exit_labels
2744 to find its label_ref, and remove it. Also turn
2745 off LABEL_OUTSIDE_LOOP_P bit. */
2746 if (JUMP_LABEL (insn))
2748 for (q = 0, r = this_loop->exit_labels;
2750 q = r, r = LABEL_NEXTREF (r))
2751 if (XEXP (r, 0) == JUMP_LABEL (insn))
2753 LABEL_OUTSIDE_LOOP_P (r) = 0;
2755 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2757 this_loop->exit_labels = LABEL_NEXTREF (r);
2761 for (loop = this_loop; loop && loop != target_loop;
2765 /* If we didn't find it, then something is
2771 /* P is now a jump outside the loop, so it must be put
2772 in loop->exit_labels, and marked as such.
2773 The easiest way to do this is to just call
2774 mark_loop_jump again for P. */
2775 mark_loop_jump (PATTERN (p), this_loop);
2777 /* If INSN now jumps to the insn after it,
2779 if (JUMP_LABEL (insn) != 0
2780 && (next_real_insn (JUMP_LABEL (insn))
2781 == next_real_insn (insn)))
2785 /* Continue the loop after where the conditional
2786 branch used to jump, since the only branch insn
2787 in the block (if it still remains) is an inter-loop
2788 branch and hence needs no processing. */
2789 insn = NEXT_INSN (cond_label);
2791 if (--LABEL_NUSES (cond_label) == 0)
2792 delete_insn (cond_label);
2794 /* This loop will be continued with NEXT_INSN (insn). */
2795 insn = PREV_INSN (insn);
2802 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2803 loops it is contained in, mark the target loop invalid.
2805 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2808 mark_loop_jump (x, loop)
2812 struct loop *dest_loop;
2813 struct loop *outer_loop;
2816 switch (GET_CODE (x))
2829 /* There could be a label reference in here. */
2830 mark_loop_jump (XEXP (x, 0), loop);
2836 mark_loop_jump (XEXP (x, 0), loop);
2837 mark_loop_jump (XEXP (x, 1), loop);
2841 /* This may refer to a LABEL_REF or SYMBOL_REF. */
2842 mark_loop_jump (XEXP (x, 1), loop);
2847 mark_loop_jump (XEXP (x, 0), loop);
2851 dest_loop = uid_loop[INSN_UID (XEXP (x, 0))];
2853 /* Link together all labels that branch outside the loop. This
2854 is used by final_[bg]iv_value and the loop unrolling code. Also
2855 mark this LABEL_REF so we know that this branch should predict
2858 /* A check to make sure the label is not in an inner nested loop,
2859 since this does not count as a loop exit. */
2862 for (outer_loop = dest_loop; outer_loop;
2863 outer_loop = outer_loop->outer)
2864 if (outer_loop == loop)
2870 if (loop && ! outer_loop)
2872 LABEL_OUTSIDE_LOOP_P (x) = 1;
2873 LABEL_NEXTREF (x) = loop->exit_labels;
2874 loop->exit_labels = x;
2876 for (outer_loop = loop;
2877 outer_loop && outer_loop != dest_loop;
2878 outer_loop = outer_loop->outer)
2879 outer_loop->exit_count++;
2882 /* If this is inside a loop, but not in the current loop or one enclosed
2883 by it, it invalidates at least one loop. */
2888 /* We must invalidate every nested loop containing the target of this
2889 label, except those that also contain the jump insn. */
2891 for (; dest_loop; dest_loop = dest_loop->outer)
2893 /* Stop when we reach a loop that also contains the jump insn. */
2894 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
2895 if (dest_loop == outer_loop)
2898 /* If we get here, we know we need to invalidate a loop. */
2899 if (loop_dump_stream && ! dest_loop->invalid)
2900 fprintf (loop_dump_stream,
2901 "\nLoop at %d ignored due to multiple entry points.\n",
2902 INSN_UID (dest_loop->start));
2904 dest_loop->invalid = 1;
2909 /* If this is not setting pc, ignore. */
2910 if (SET_DEST (x) == pc_rtx)
2911 mark_loop_jump (SET_SRC (x), loop);
2915 mark_loop_jump (XEXP (x, 1), loop);
2916 mark_loop_jump (XEXP (x, 2), loop);
2921 for (i = 0; i < XVECLEN (x, 0); i++)
2922 mark_loop_jump (XVECEXP (x, 0, i), loop);
2926 for (i = 0; i < XVECLEN (x, 1); i++)
2927 mark_loop_jump (XVECEXP (x, 1, i), loop);
2931 /* Strictly speaking this is not a jump into the loop, only a possible
2932 jump out of the loop. However, we have no way to link the destination
2933 of this jump onto the list of exit labels. To be safe we mark this
2934 loop and any containing loops as invalid. */
2937 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
2939 if (loop_dump_stream && ! outer_loop->invalid)
2940 fprintf (loop_dump_stream,
2941 "\nLoop at %d ignored due to unknown exit jump.\n",
2942 INSN_UID (outer_loop->start));
2943 outer_loop->invalid = 1;
2950 /* Return nonzero if there is a label in the range from
2951 insn INSN to and including the insn whose luid is END
2952 INSN must have an assigned luid (i.e., it must not have
2953 been previously created by loop.c). */
2956 labels_in_range_p (insn, end)
2960 while (insn && INSN_LUID (insn) <= end)
2962 if (GET_CODE (insn) == CODE_LABEL)
2964 insn = NEXT_INSN (insn);
2970 /* Record that a memory reference X is being set. */
2973 note_addr_stored (x, y, data)
2975 rtx y ATTRIBUTE_UNUSED;
2976 void *data ATTRIBUTE_UNUSED;
2978 struct loop_info *loop_info = data;
2980 if (x == 0 || GET_CODE (x) != MEM)
2983 /* Count number of memory writes.
2984 This affects heuristics in strength_reduce. */
2985 loop_info->num_mem_sets++;
2987 /* BLKmode MEM means all memory is clobbered. */
2988 if (GET_MODE (x) == BLKmode)
2990 if (RTX_UNCHANGING_P (x))
2991 loop_info->unknown_constant_address_altered = 1;
2993 loop_info->unknown_address_altered = 1;
2998 loop_info->store_mems = gen_rtx_EXPR_LIST (VOIDmode, x,
2999 loop_info->store_mems);
3002 /* X is a value modified by an INSN that references a biv inside a loop
3003 exit test (ie, X is somehow related to the value of the biv). If X
3004 is a pseudo that is used more than once, then the biv is (effectively)
3005 used more than once. DATA is a pointer to a loop_regs structure. */
3008 note_set_pseudo_multiple_uses (x, y, data)
3010 rtx y ATTRIBUTE_UNUSED;
3013 struct loop_regs *regs = (struct loop_regs *) data;
3018 while (GET_CODE (x) == STRICT_LOW_PART
3019 || GET_CODE (x) == SIGN_EXTRACT
3020 || GET_CODE (x) == ZERO_EXTRACT
3021 || GET_CODE (x) == SUBREG)
3024 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
3027 /* If we do not have usage information, or if we know the register
3028 is used more than once, note that fact for check_dbra_loop. */
3029 if (REGNO (x) >= max_reg_before_loop
3030 || ! VARRAY_RTX (regs->single_usage, REGNO (x))
3031 || VARRAY_RTX (regs->single_usage, REGNO (x)) == const0_rtx)
3032 regs->multiple_uses = 1;
3035 /* Return nonzero if the rtx X is invariant over the current loop.
3037 The value is 2 if we refer to something only conditionally invariant.
3039 A memory ref is invariant if it is not volatile and does not conflict
3040 with anything stored in `loop_info->store_mems'. */
3043 loop_invariant_p (loop, x)
3044 const struct loop *loop;
3047 struct loop_info *loop_info = LOOP_INFO (loop);
3048 struct loop_regs *regs = LOOP_REGS (loop);
3050 register enum rtx_code code;
3051 register const char *fmt;
3052 int conditional = 0;
3057 code = GET_CODE (x);
3067 /* A LABEL_REF is normally invariant, however, if we are unrolling
3068 loops, and this label is inside the loop, then it isn't invariant.
3069 This is because each unrolled copy of the loop body will have
3070 a copy of this label. If this was invariant, then an insn loading
3071 the address of this label into a register might get moved outside
3072 the loop, and then each loop body would end up using the same label.
3074 We don't know the loop bounds here though, so just fail for all
3076 if (flag_unroll_loops)
3083 case UNSPEC_VOLATILE:
3087 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3088 since the reg might be set by initialization within the loop. */
3090 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3091 || x == arg_pointer_rtx)
3092 && ! current_function_has_nonlocal_goto)
3095 if (LOOP_INFO (loop)->has_call
3096 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3099 if (VARRAY_INT (regs->set_in_loop, REGNO (x)) < 0)
3102 return VARRAY_INT (regs->set_in_loop, REGNO (x)) == 0;
3105 /* Volatile memory references must be rejected. Do this before
3106 checking for read-only items, so that volatile read-only items
3107 will be rejected also. */
3108 if (MEM_VOLATILE_P (x))
3111 /* See if there is any dependence between a store and this load. */
3112 mem_list_entry = loop_info->store_mems;
3113 while (mem_list_entry)
3115 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3119 mem_list_entry = XEXP (mem_list_entry, 1);
3122 /* It's not invalidated by a store in memory
3123 but we must still verify the address is invariant. */
3127 /* Don't mess with insns declared volatile. */
3128 if (MEM_VOLATILE_P (x))
3136 fmt = GET_RTX_FORMAT (code);
3137 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3141 int tem = loop_invariant_p (loop, XEXP (x, i));
3147 else if (fmt[i] == 'E')
3150 for (j = 0; j < XVECLEN (x, i); j++)
3152 int tem = loop_invariant_p (loop, XVECEXP (x, i, j));
3162 return 1 + conditional;
3165 /* Return nonzero if all the insns in the loop that set REG
3166 are INSN and the immediately following insns,
3167 and if each of those insns sets REG in an invariant way
3168 (not counting uses of REG in them).
3170 The value is 2 if some of these insns are only conditionally invariant.
3172 We assume that INSN itself is the first set of REG
3173 and that its source is invariant. */
3176 consec_sets_invariant_p (loop, reg, n_sets, insn)
3177 const struct loop *loop;
3181 struct loop_regs *regs = LOOP_REGS (loop);
3183 unsigned int regno = REGNO (reg);
3185 /* Number of sets we have to insist on finding after INSN. */
3186 int count = n_sets - 1;
3187 int old = VARRAY_INT (regs->set_in_loop, regno);
3191 /* If N_SETS hit the limit, we can't rely on its value. */
3195 VARRAY_INT (regs->set_in_loop, regno) = 0;
3199 register enum rtx_code code;
3203 code = GET_CODE (p);
3205 /* If library call, skip to end of it. */
3206 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3211 && (set = single_set (p))
3212 && GET_CODE (SET_DEST (set)) == REG
3213 && REGNO (SET_DEST (set)) == regno)
3215 this = loop_invariant_p (loop, SET_SRC (set));
3218 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3220 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3221 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3223 this = (CONSTANT_P (XEXP (temp, 0))
3224 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3225 && loop_invariant_p (loop, XEXP (temp, 0))));
3232 else if (code != NOTE)
3234 VARRAY_INT (regs->set_in_loop, regno) = old;
3239 VARRAY_INT (regs->set_in_loop, regno) = old;
3240 /* If loop_invariant_p ever returned 2, we return 2. */
3241 return 1 + (value & 2);
3245 /* I don't think this condition is sufficient to allow INSN
3246 to be moved, so we no longer test it. */
3248 /* Return 1 if all insns in the basic block of INSN and following INSN
3249 that set REG are invariant according to TABLE. */
3252 all_sets_invariant_p (reg, insn, table)
3256 register rtx p = insn;
3257 register int regno = REGNO (reg);
3261 register enum rtx_code code;
3263 code = GET_CODE (p);
3264 if (code == CODE_LABEL || code == JUMP_INSN)
3266 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3267 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3268 && REGNO (SET_DEST (PATTERN (p))) == regno)
3270 if (! loop_invariant_p (loop, SET_SRC (PATTERN (p)), table))
3277 /* Look at all uses (not sets) of registers in X. For each, if it is
3278 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3279 a different insn, set USAGE[REGNO] to const0_rtx. */
3282 find_single_use_in_loop (insn, x, usage)
3287 enum rtx_code code = GET_CODE (x);
3288 const char *fmt = GET_RTX_FORMAT (code);
3292 VARRAY_RTX (usage, REGNO (x))
3293 = (VARRAY_RTX (usage, REGNO (x)) != 0
3294 && VARRAY_RTX (usage, REGNO (x)) != insn)
3295 ? const0_rtx : insn;
3297 else if (code == SET)
3299 /* Don't count SET_DEST if it is a REG; otherwise count things
3300 in SET_DEST because if a register is partially modified, it won't
3301 show up as a potential movable so we don't care how USAGE is set
3303 if (GET_CODE (SET_DEST (x)) != REG)
3304 find_single_use_in_loop (insn, SET_DEST (x), usage);
3305 find_single_use_in_loop (insn, SET_SRC (x), usage);
3308 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3310 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3311 find_single_use_in_loop (insn, XEXP (x, i), usage);
3312 else if (fmt[i] == 'E')
3313 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3314 find_single_use_in_loop (insn, XVECEXP (x, i, j), usage);
3318 /* Count and record any set in X which is contained in INSN. Update
3319 MAY_NOT_MOVE and LAST_SET for any register set in X. */
3322 count_one_set (regs, insn, x, may_not_move, last_set)
3323 struct loop_regs *regs;
3325 varray_type may_not_move;
3328 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3329 /* Don't move a reg that has an explicit clobber.
3330 It's not worth the pain to try to do it correctly. */
3331 VARRAY_CHAR (may_not_move, REGNO (XEXP (x, 0))) = 1;
3333 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3335 rtx dest = SET_DEST (x);
3336 while (GET_CODE (dest) == SUBREG
3337 || GET_CODE (dest) == ZERO_EXTRACT
3338 || GET_CODE (dest) == SIGN_EXTRACT
3339 || GET_CODE (dest) == STRICT_LOW_PART)
3340 dest = XEXP (dest, 0);
3341 if (GET_CODE (dest) == REG)
3343 register int regno = REGNO (dest);
3344 /* If this is the first setting of this reg
3345 in current basic block, and it was set before,
3346 it must be set in two basic blocks, so it cannot
3347 be moved out of the loop. */
3348 if (VARRAY_INT (regs->set_in_loop, regno) > 0
3349 && last_set[regno] == 0)
3350 VARRAY_CHAR (may_not_move, regno) = 1;
3351 /* If this is not first setting in current basic block,
3352 see if reg was used in between previous one and this.
3353 If so, neither one can be moved. */
3354 if (last_set[regno] != 0
3355 && reg_used_between_p (dest, last_set[regno], insn))
3356 VARRAY_CHAR (may_not_move, regno) = 1;
3357 if (VARRAY_INT (regs->set_in_loop, regno) < 127)
3358 ++VARRAY_INT (regs->set_in_loop, regno);
3359 last_set[regno] = insn;
3364 /* Increment REGS->SET_IN_LOOP at the index of each register
3365 that is modified by an insn between FROM and TO.
3366 If the value of an element of REGS->SET_IN_LOOP becomes 127 or more,
3367 stop incrementing it, to avoid overflow.
3369 Store in SINGLE_USAGE[I] the single insn in which register I is
3370 used, if it is only used once. Otherwise, it is set to 0 (for no
3371 uses) or const0_rtx for more than one use. This parameter may be zero,
3372 in which case this processing is not done.
3374 Store in *COUNT_PTR the number of actual instruction
3375 in the loop. We use this to decide what is worth moving out. */
3377 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3378 In that case, it is the insn that last set reg n. */
3381 count_loop_regs_set (loop, may_not_move, single_usage, count_ptr, nregs)
3382 const struct loop *loop;
3383 varray_type may_not_move;
3384 varray_type single_usage;
3388 struct loop_regs *regs = LOOP_REGS (loop);
3389 register rtx *last_set = (rtx *) xcalloc (nregs, sizeof (rtx));
3391 register int count = 0;
3393 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
3394 insn = NEXT_INSN (insn))
3400 /* Record registers that have exactly one use. */
3401 find_single_use_in_loop (insn, PATTERN (insn), single_usage);
3403 /* Include uses in REG_EQUAL notes. */
3404 if (REG_NOTES (insn))
3405 find_single_use_in_loop (insn, REG_NOTES (insn), single_usage);
3407 if (GET_CODE (PATTERN (insn)) == SET
3408 || GET_CODE (PATTERN (insn)) == CLOBBER)
3409 count_one_set (regs, insn, PATTERN (insn), may_not_move, last_set);
3410 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3413 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
3414 count_one_set (regs, insn, XVECEXP (PATTERN (insn), 0, i),
3415 may_not_move, last_set);
3419 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3420 memset ((char *) last_set, 0, nregs * sizeof (rtx));
3428 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3429 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3430 contained in insn INSN is used by any insn that precedes INSN in
3431 cyclic order starting from the loop entry point.
3433 We don't want to use INSN_LUID here because if we restrict INSN to those
3434 that have a valid INSN_LUID, it means we cannot move an invariant out
3435 from an inner loop past two loops. */
3438 loop_reg_used_before_p (loop, set, insn)
3439 const struct loop *loop;
3442 rtx reg = SET_DEST (set);
3445 /* Scan forward checking for register usage. If we hit INSN, we
3446 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3447 for (p = loop->scan_start; p != insn; p = NEXT_INSN (p))
3449 if (INSN_P (p) && reg_overlap_mentioned_p (reg, PATTERN (p)))
3459 /* A "basic induction variable" or biv is a pseudo reg that is set
3460 (within this loop) only by incrementing or decrementing it. */
3461 /* A "general induction variable" or giv is a pseudo reg whose
3462 value is a linear function of a biv. */
3464 /* Bivs are recognized by `basic_induction_var';
3465 Givs by `general_induction_var'. */
3467 /* Communication with routines called via `note_stores'. */
3469 static rtx note_insn;
3471 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3473 static rtx addr_placeholder;
3475 /* ??? Unfinished optimizations, and possible future optimizations,
3476 for the strength reduction code. */
3478 /* ??? The interaction of biv elimination, and recognition of 'constant'
3479 bivs, may cause problems. */
3481 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3482 performance problems.
3484 Perhaps don't eliminate things that can be combined with an addressing
3485 mode. Find all givs that have the same biv, mult_val, and add_val;
3486 then for each giv, check to see if its only use dies in a following
3487 memory address. If so, generate a new memory address and check to see
3488 if it is valid. If it is valid, then store the modified memory address,
3489 otherwise, mark the giv as not done so that it will get its own iv. */
3491 /* ??? Could try to optimize branches when it is known that a biv is always
3494 /* ??? When replace a biv in a compare insn, we should replace with closest
3495 giv so that an optimized branch can still be recognized by the combiner,
3496 e.g. the VAX acb insn. */
3498 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3499 was rerun in loop_optimize whenever a register was added or moved.
3500 Also, some of the optimizations could be a little less conservative. */
3502 /* Scan the loop body and call FNCALL for each insn. In the addition to the
3503 LOOP and INSN parameters pass MAYBE_MULTIPLE and NOT_EVERY_ITERATION to the
3506 NOT_EVERY_ITERATION if current insn is not executed at least once for every
3507 loop iteration except for the last one.
3509 MAYBE_MULTIPLE is 1 if current insn may be executed more than once for every
3513 for_each_insn_in_loop (loop, fncall)
3515 loop_insn_callback fncall;
3517 /* This is 1 if current insn is not executed at least once for every loop
3519 int not_every_iteration = 0;
3520 int maybe_multiple = 0;
3521 int past_loop_latch = 0;
3525 /* If loop_scan_start points to the loop exit test, we have to be wary of
3526 subversive use of gotos inside expression statements. */
3527 if (prev_nonnote_insn (loop->scan_start) != prev_nonnote_insn (loop->start))
3528 maybe_multiple = back_branch_in_range_p (loop, loop->scan_start);
3530 /* Scan through loop to find all possible bivs. */
3532 for (p = next_insn_in_loop (loop, loop->scan_start);
3534 p = next_insn_in_loop (loop, p))
3536 p = fncall (loop, p, not_every_iteration, maybe_multiple);
3538 /* Past CODE_LABEL, we get to insns that may be executed multiple
3539 times. The only way we can be sure that they can't is if every
3540 jump insn between here and the end of the loop either
3541 returns, exits the loop, is a jump to a location that is still
3542 behind the label, or is a jump to the loop start. */
3544 if (GET_CODE (p) == CODE_LABEL)
3552 insn = NEXT_INSN (insn);
3553 if (insn == loop->scan_start)
3555 if (insn == loop->end)
3561 if (insn == loop->scan_start)
3565 if (GET_CODE (insn) == JUMP_INSN
3566 && GET_CODE (PATTERN (insn)) != RETURN
3567 && (!any_condjump_p (insn)
3568 || (JUMP_LABEL (insn) != 0
3569 && JUMP_LABEL (insn) != loop->scan_start
3570 && !loop_insn_first_p (p, JUMP_LABEL (insn)))))
3578 /* Past a jump, we get to insns for which we can't count
3579 on whether they will be executed during each iteration. */
3580 /* This code appears twice in strength_reduce. There is also similar
3581 code in scan_loop. */
3582 if (GET_CODE (p) == JUMP_INSN
3583 /* If we enter the loop in the middle, and scan around to the
3584 beginning, don't set not_every_iteration for that.
3585 This can be any kind of jump, since we want to know if insns
3586 will be executed if the loop is executed. */
3587 && !(JUMP_LABEL (p) == loop->top
3588 && ((NEXT_INSN (NEXT_INSN (p)) == loop->end
3589 && any_uncondjump_p (p))
3590 || (NEXT_INSN (p) == loop->end && any_condjump_p (p)))))
3594 /* If this is a jump outside the loop, then it also doesn't
3595 matter. Check to see if the target of this branch is on the
3596 loop->exits_labels list. */
3598 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
3599 if (XEXP (label, 0) == JUMP_LABEL (p))
3603 not_every_iteration = 1;
3606 else if (GET_CODE (p) == NOTE)
3608 /* At the virtual top of a converted loop, insns are again known to
3609 be executed each iteration: logically, the loop begins here
3610 even though the exit code has been duplicated.
3612 Insns are also again known to be executed each iteration at
3613 the LOOP_CONT note. */
3614 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
3615 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
3617 not_every_iteration = 0;
3618 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3620 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3624 /* Note if we pass a loop latch. If we do, then we can not clear
3625 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
3626 a loop since a jump before the last CODE_LABEL may have started
3627 a new loop iteration.
3629 Note that LOOP_TOP is only set for rotated loops and we need
3630 this check for all loops, so compare against the CODE_LABEL
3631 which immediately follows LOOP_START. */
3632 if (GET_CODE (p) == JUMP_INSN
3633 && JUMP_LABEL (p) == NEXT_INSN (loop->start))
3634 past_loop_latch = 1;
3636 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3637 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3638 or not an insn is known to be executed each iteration of the
3639 loop, whether or not any iterations are known to occur.
3641 Therefore, if we have just passed a label and have no more labels
3642 between here and the test insn of the loop, and we have not passed
3643 a jump to the top of the loop, then we know these insns will be
3644 executed each iteration. */
3646 if (not_every_iteration
3648 && GET_CODE (p) == CODE_LABEL
3649 && no_labels_between_p (p, loop->end)
3650 && loop_insn_first_p (p, loop->cont))
3651 not_every_iteration = 0;
3656 loop_bivs_find (loop)
3659 struct loop_regs *regs = LOOP_REGS (loop);
3660 struct loop_ivs *ivs = LOOP_IVS (loop);
3661 /* Temporary list pointers for traversing ivs->list. */
3662 struct iv_class *bl, **backbl;
3666 for_each_insn_in_loop (loop, check_insn_for_bivs);
3668 /* Scan ivs->list to remove all regs that proved not to be bivs.
3669 Make a sanity check against regs->n_times_set. */
3670 for (backbl = &ivs->list, bl = *backbl; bl; bl = bl->next)
3672 if (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
3673 /* Above happens if register modified by subreg, etc. */
3674 /* Make sure it is not recognized as a basic induction var: */
3675 || VARRAY_INT (regs->n_times_set, bl->regno) != bl->biv_count
3676 /* If never incremented, it is invariant that we decided not to
3677 move. So leave it alone. */
3678 || ! bl->incremented)
3680 if (loop_dump_stream)
3681 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
3683 (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
3684 ? "not induction variable"
3685 : (! bl->incremented ? "never incremented"
3688 REG_IV_TYPE (ivs, bl->regno) = NOT_BASIC_INDUCT;
3695 if (loop_dump_stream)
3696 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
3702 /* Determine how BIVS are initialised by looking through pre-header
3703 extended basic block. */
3705 loop_bivs_init_find (loop)
3708 struct loop_ivs *ivs = LOOP_IVS (loop);
3709 /* Temporary list pointers for traversing ivs->list. */
3710 struct iv_class *bl;
3714 /* Find initial value for each biv by searching backwards from loop_start,
3715 halting at first label. Also record any test condition. */
3718 for (p = loop->start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
3724 if (GET_CODE (p) == CALL_INSN)
3728 note_stores (PATTERN (p), record_initial, ivs);
3730 /* Record any test of a biv that branches around the loop if no store
3731 between it and the start of loop. We only care about tests with
3732 constants and registers and only certain of those. */
3733 if (GET_CODE (p) == JUMP_INSN
3734 && JUMP_LABEL (p) != 0
3735 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop->end)
3736 && (test = get_condition_for_loop (loop, p)) != 0
3737 && GET_CODE (XEXP (test, 0)) == REG
3738 && REGNO (XEXP (test, 0)) < max_reg_before_loop
3739 && (bl = REG_IV_CLASS (ivs, REGNO (XEXP (test, 0)))) != 0
3740 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop->start)
3741 && bl->init_insn == 0)
3743 /* If an NE test, we have an initial value! */
3744 if (GET_CODE (test) == NE)
3747 bl->init_set = gen_rtx_SET (VOIDmode,
3748 XEXP (test, 0), XEXP (test, 1));
3751 bl->initial_test = test;
3757 /* Look at the each biv and see if we can say anything better about its
3758 initial value from any initializing insns set up above. (This is done
3759 in two passes to avoid missing SETs in a PARALLEL.) */
3761 loop_bivs_check (loop)
3764 struct loop_ivs *ivs = LOOP_IVS (loop);
3765 /* Temporary list pointers for traversing ivs->list. */
3766 struct iv_class *bl;
3767 struct iv_class **backbl;
3769 for (backbl = &ivs->list; (bl = *backbl); backbl = &bl->next)
3774 if (! bl->init_insn)
3777 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3778 is a constant, use the value of that. */
3779 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
3780 && CONSTANT_P (XEXP (note, 0)))
3781 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
3782 && CONSTANT_P (XEXP (note, 0))))
3783 src = XEXP (note, 0);
3785 src = SET_SRC (bl->init_set);
3787 if (loop_dump_stream)
3788 fprintf (loop_dump_stream,
3789 "Biv %d initialized at insn %d: initial value ",
3790 bl->regno, INSN_UID (bl->init_insn));
3792 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
3793 || GET_MODE (src) == VOIDmode)
3794 && valid_initial_value_p (src, bl->init_insn,
3795 LOOP_INFO (loop)->pre_header_has_call,
3798 bl->initial_value = src;
3800 if (loop_dump_stream)
3802 if (GET_CODE (src) == CONST_INT)
3804 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC,
3806 fputc ('\n', loop_dump_stream);
3810 print_rtl (loop_dump_stream, src);
3811 fprintf (loop_dump_stream, "\n");
3815 /* If we can't make it a giv,
3816 let biv keep initial value of "itself". */
3817 else if (loop_dump_stream)
3818 fprintf (loop_dump_stream, "is complex\n");
3823 /* Search the loop for general induction variables. */
3826 loop_givs_find (loop)
3829 for_each_insn_in_loop (loop, check_insn_for_givs);
3833 /* For each giv for which we still don't know whether or not it is
3834 replaceable, check to see if it is replaceable because its final value
3835 can be calculated. */
3838 loop_givs_check (loop)
3841 struct loop_ivs *ivs = LOOP_IVS (loop);
3842 struct iv_class *bl;
3844 for (bl = ivs->list; bl; bl = bl->next)
3846 struct induction *v;
3848 for (v = bl->giv; v; v = v->next_iv)
3849 if (! v->replaceable && ! v->not_replaceable)
3850 check_final_value (loop, v);
3855 /* Return non-zero if it is possible to eliminate the biv BL provided
3856 all givs are reduced. This is possible if either the reg is not
3857 used outside the loop, or we can compute what its final value will
3861 loop_biv_eliminable_p (loop, bl, threshold, insn_count)
3863 struct iv_class *bl;
3867 /* For architectures with a decrement_and_branch_until_zero insn,
3868 don't do this if we put a REG_NONNEG note on the endtest for this
3871 #ifdef HAVE_decrement_and_branch_until_zero
3874 if (loop_dump_stream)
3875 fprintf (loop_dump_stream,
3876 "Cannot eliminate nonneg biv %d.\n", bl->regno);
3881 /* Check that biv is used outside loop or if it has a final value.
3882 Compare against bl->init_insn rather than loop->start. We aren't
3883 concerned with any uses of the biv between init_insn and
3884 loop->start since these won't be affected by the value of the biv
3885 elsewhere in the function, so long as init_insn doesn't use the
3888 if ((REGNO_LAST_LUID (bl->regno) < INSN_LUID (loop->end)
3890 && INSN_UID (bl->init_insn) < max_uid_for_loop
3891 && REGNO_FIRST_LUID (bl->regno) >= INSN_LUID (bl->init_insn)
3892 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
3893 || (bl->final_value = final_biv_value (loop, bl)))
3894 return maybe_eliminate_biv (loop, bl, 0, threshold, insn_count);
3896 if (loop_dump_stream)
3898 fprintf (loop_dump_stream,
3899 "Cannot eliminate biv %d.\n",
3901 fprintf (loop_dump_stream,
3902 "First use: insn %d, last use: insn %d.\n",
3903 REGNO_FIRST_UID (bl->regno),
3904 REGNO_LAST_UID (bl->regno));
3910 /* Reduce each giv of BL that we have decided to reduce. */
3913 loop_givs_reduce (loop, bl)
3915 struct iv_class *bl;
3917 struct induction *v;
3919 for (v = bl->giv; v; v = v->next_iv)
3921 struct induction *tv;
3922 if (! v->ignore && v->same == 0)
3924 int auto_inc_opt = 0;
3926 /* If the code for derived givs immediately below has already
3927 allocated a new_reg, we must keep it. */
3929 v->new_reg = gen_reg_rtx (v->mode);
3932 /* If the target has auto-increment addressing modes, and
3933 this is an address giv, then try to put the increment
3934 immediately after its use, so that flow can create an
3935 auto-increment addressing mode. */
3936 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
3937 && bl->biv->always_executed && ! bl->biv->maybe_multiple
3938 /* We don't handle reversed biv's because bl->biv->insn
3939 does not have a valid INSN_LUID. */
3941 && v->always_executed && ! v->maybe_multiple
3942 && INSN_UID (v->insn) < max_uid_for_loop)
3944 /* If other giv's have been combined with this one, then
3945 this will work only if all uses of the other giv's occur
3946 before this giv's insn. This is difficult to check.
3948 We simplify this by looking for the common case where
3949 there is one DEST_REG giv, and this giv's insn is the
3950 last use of the dest_reg of that DEST_REG giv. If the
3951 increment occurs after the address giv, then we can
3952 perform the optimization. (Otherwise, the increment
3953 would have to go before other_giv, and we would not be
3954 able to combine it with the address giv to get an
3955 auto-inc address.) */
3956 if (v->combined_with)
3958 struct induction *other_giv = 0;
3960 for (tv = bl->giv; tv; tv = tv->next_iv)
3968 if (! tv && other_giv
3969 && REGNO (other_giv->dest_reg) < max_reg_before_loop
3970 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
3971 == INSN_UID (v->insn))
3972 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
3975 /* Check for case where increment is before the address
3976 giv. Do this test in "loop order". */
3977 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
3978 && (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
3979 || (INSN_LUID (bl->biv->insn)
3980 > INSN_LUID (loop->scan_start))))
3981 || (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
3982 && (INSN_LUID (loop->scan_start)
3983 < INSN_LUID (bl->biv->insn))))
3992 /* We can't put an insn immediately after one setting
3993 cc0, or immediately before one using cc0. */
3994 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
3995 || (auto_inc_opt == -1
3996 && (prev = prev_nonnote_insn (v->insn)) != 0
3998 && sets_cc0_p (PATTERN (prev))))
4004 v->auto_inc_opt = 1;
4008 /* For each place where the biv is incremented, add an insn
4009 to increment the new, reduced reg for the giv. */
4010 for (tv = bl->biv; tv; tv = tv->next_iv)
4015 insert_before = tv->insn;
4016 else if (auto_inc_opt == 1)
4017 insert_before = NEXT_INSN (v->insn);
4019 insert_before = v->insn;
4021 if (tv->mult_val == const1_rtx)
4022 emit_iv_add_mult (tv->add_val, v->mult_val,
4023 v->new_reg, v->new_reg, insert_before);
4024 else /* tv->mult_val == const0_rtx */
4025 /* A multiply is acceptable here
4026 since this is presumed to be seldom executed. */
4027 emit_iv_add_mult (tv->add_val, v->mult_val,
4028 v->add_val, v->new_reg, insert_before);
4031 /* Add code at loop start to initialize giv's reduced reg. */
4033 emit_iv_add_mult (extend_value_for_giv (v, bl->initial_value),
4034 v->mult_val, v->add_val, v->new_reg,
4041 /* Check for givs whose first use is their definition and whose
4042 last use is the definition of another giv. If so, it is likely
4043 dead and should not be used to derive another giv nor to
4047 loop_givs_dead_check (loop, bl)
4048 struct loop *loop ATTRIBUTE_UNUSED;
4049 struct iv_class *bl;
4051 struct induction *v;
4053 for (v = bl->giv; v; v = v->next_iv)
4056 || (v->same && v->same->ignore))
4059 if (v->giv_type == DEST_REG
4060 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4062 struct induction *v1;
4064 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4065 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4073 loop_givs_rescan (loop, bl, reg_map, end_insert_before)
4075 struct iv_class *bl;
4077 rtx end_insert_before;
4079 struct induction *v;
4081 for (v = bl->giv; v; v = v->next_iv)
4083 if (v->same && v->same->ignore)
4089 /* Update expression if this was combined, in case other giv was
4092 v->new_reg = replace_rtx (v->new_reg,
4093 v->same->dest_reg, v->same->new_reg);
4095 /* See if this register is known to be a pointer to something. If
4096 so, see if we can find the alignment. First see if there is a
4097 destination register that is a pointer. If so, this shares the
4098 alignment too. Next see if we can deduce anything from the
4099 computational information. If not, and this is a DEST_ADDR
4100 giv, at least we know that it's a pointer, though we don't know
4102 if (GET_CODE (v->new_reg) == REG
4103 && v->giv_type == DEST_REG
4104 && REG_POINTER (v->dest_reg))
4105 mark_reg_pointer (v->new_reg,
4106 REGNO_POINTER_ALIGN (REGNO (v->dest_reg)));
4107 else if (GET_CODE (v->new_reg) == REG
4108 && REG_POINTER (v->src_reg))
4110 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->src_reg));
4113 || GET_CODE (v->add_val) != CONST_INT
4114 || INTVAL (v->add_val) % (align / BITS_PER_UNIT) != 0)
4117 mark_reg_pointer (v->new_reg, align);
4119 else if (GET_CODE (v->new_reg) == REG
4120 && GET_CODE (v->add_val) == REG
4121 && REG_POINTER (v->add_val))
4123 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->add_val));
4125 if (align == 0 || GET_CODE (v->mult_val) != CONST_INT
4126 || INTVAL (v->mult_val) % (align / BITS_PER_UNIT) != 0)
4129 mark_reg_pointer (v->new_reg, align);
4131 else if (GET_CODE (v->new_reg) == REG && v->giv_type == DEST_ADDR)
4132 mark_reg_pointer (v->new_reg, 0);
4134 if (v->giv_type == DEST_ADDR)
4135 /* Store reduced reg as the address in the memref where we found
4137 validate_change (v->insn, v->location, v->new_reg, 0);
4138 else if (v->replaceable)
4140 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4144 /* Not replaceable; emit an insn to set the original giv reg from
4145 the reduced giv, same as above. */
4146 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4150 /* When a loop is reversed, givs which depend on the reversed
4151 biv, and which are live outside the loop, must be set to their
4152 correct final value. This insn is only needed if the giv is
4153 not replaceable. The correct final value is the same as the
4154 value that the giv starts the reversed loop with. */
4155 if (bl->reversed && ! v->replaceable)
4156 emit_iv_add_mult (extend_value_for_giv (v, bl->initial_value),
4157 v->mult_val, v->add_val, v->dest_reg,
4159 else if (v->final_value)
4163 /* If the loop has multiple exits, emit the insn before the
4164 loop to ensure that it will always be executed no matter
4165 how the loop exits. Otherwise, emit the insn after the loop,
4166 since this is slightly more efficient. */
4167 if (loop->exit_count)
4168 insert_before = loop->start;
4170 insert_before = end_insert_before;
4171 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
4175 if (loop_dump_stream)
4177 fprintf (loop_dump_stream, "giv at %d reduced to ",
4178 INSN_UID (v->insn));
4179 print_rtl (loop_dump_stream, v->new_reg);
4180 fprintf (loop_dump_stream, "\n");
4187 loop_giv_reduce_benefit (loop, bl, v, test_reg)
4188 struct loop *loop ATTRIBUTE_UNUSED;
4189 struct iv_class *bl;
4190 struct induction *v;
4196 benefit = v->benefit;
4197 PUT_MODE (test_reg, v->mode);
4198 add_cost = iv_add_mult_cost (bl->biv->add_val, v->mult_val,
4199 test_reg, test_reg);
4201 /* Reduce benefit if not replaceable, since we will insert a
4202 move-insn to replace the insn that calculates this giv. Don't do
4203 this unless the giv is a user variable, since it will often be
4204 marked non-replaceable because of the duplication of the exit
4205 code outside the loop. In such a case, the copies we insert are
4206 dead and will be deleted. So they don't have a cost. Similar
4207 situations exist. */
4208 /* ??? The new final_[bg]iv_value code does a much better job of
4209 finding replaceable giv's, and hence this code may no longer be
4211 if (! v->replaceable && ! bl->eliminable
4212 && REG_USERVAR_P (v->dest_reg))
4213 benefit -= copy_cost;
4215 /* Decrease the benefit to count the add-insns that we will insert
4216 to increment the reduced reg for the giv. ??? This can
4217 overestimate the run-time cost of the additional insns, e.g. if
4218 there are multiple basic blocks that increment the biv, but only
4219 one of these blocks is executed during each iteration. There is
4220 no good way to detect cases like this with the current structure
4221 of the loop optimizer. This code is more accurate for
4222 determining code size than run-time benefits. */
4223 benefit -= add_cost * bl->biv_count;
4225 /* Decide whether to strength-reduce this giv or to leave the code
4226 unchanged (recompute it from the biv each time it is used). This
4227 decision can be made independently for each giv. */
4230 /* Attempt to guess whether autoincrement will handle some of the
4231 new add insns; if so, increase BENEFIT (undo the subtraction of
4232 add_cost that was done above). */
4233 if (v->giv_type == DEST_ADDR
4234 /* Increasing the benefit is risky, since this is only a guess.
4235 Avoid increasing register pressure in cases where there would
4236 be no other benefit from reducing this giv. */
4238 && GET_CODE (v->mult_val) == CONST_INT)
4240 if (HAVE_POST_INCREMENT
4241 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4242 benefit += add_cost * bl->biv_count;
4243 else if (HAVE_PRE_INCREMENT
4244 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4245 benefit += add_cost * bl->biv_count;
4246 else if (HAVE_POST_DECREMENT
4247 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4248 benefit += add_cost * bl->biv_count;
4249 else if (HAVE_PRE_DECREMENT
4250 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4251 benefit += add_cost * bl->biv_count;
4259 /* Free IV structures for LOOP. */
4262 loop_ivs_free (loop)
4265 struct loop_ivs *ivs = LOOP_IVS (loop);
4266 struct iv_class *iv = ivs->list;
4272 struct iv_class *next = iv->next;
4273 struct induction *induction;
4274 struct induction *next_induction;
4276 for (induction = iv->biv; induction; induction = next_induction)
4278 next_induction = induction->next_iv;
4281 for (induction = iv->giv; induction; induction = next_induction)
4283 next_induction = induction->next_iv;
4293 /* Perform strength reduction and induction variable elimination.
4295 Pseudo registers created during this function will be beyond the
4296 last valid index in several tables including regs->n_times_set and
4297 regno_last_uid. This does not cause a problem here, because the
4298 added registers cannot be givs outside of their loop, and hence
4299 will never be reconsidered. But scan_loop must check regnos to
4300 make sure they are in bounds. */
4303 strength_reduce (loop, insn_count, flags)
4308 struct loop_info *loop_info = LOOP_INFO (loop);
4309 struct loop_regs *regs = LOOP_REGS (loop);
4310 struct loop_ivs *ivs = LOOP_IVS (loop);
4312 /* Temporary list pointer for traversing ivs->list. */
4313 struct iv_class *bl;
4314 /* Ratio of extra register life span we can justify
4315 for saving an instruction. More if loop doesn't call subroutines
4316 since in that case saving an insn makes more difference
4317 and more registers are available. */
4318 /* ??? could set this to last value of threshold in move_movables */
4319 int threshold = (loop_info->has_call ? 1 : 2) * (3 + n_non_fixed_regs);
4320 /* Map of pseudo-register replacements. */
4321 rtx *reg_map = NULL;
4323 rtx end_insert_before;
4324 int unrolled_insn_copies = 0;
4325 rtx test_reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
4327 addr_placeholder = gen_reg_rtx (Pmode);
4329 /* Save insn immediately after the loop_end. Insns inserted after loop_end
4330 must be put before this insn, so that they will appear in the right
4331 order (i.e. loop order).
4333 If loop_end is the end of the current function, then emit a
4334 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
4336 if (NEXT_INSN (loop->end) != 0)
4337 end_insert_before = NEXT_INSN (loop->end);
4339 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop->end);
4341 ivs->n_regs = max_reg_before_loop;
4342 ivs->regs = (struct iv *) xcalloc (ivs->n_regs, sizeof (struct iv));
4344 /* Find all BIVs in loop. */
4345 loop_bivs_find (loop);
4347 /* Exit if there are no bivs. */
4350 /* Can still unroll the loop anyways, but indicate that there is no
4351 strength reduction info available. */
4352 if (flags & LOOP_UNROLL)
4353 unroll_loop (loop, insn_count, end_insert_before, 0);
4355 loop_ivs_free (loop);
4359 /* Determine how BIVS are initialised by looking through pre-header
4360 extended basic block. */
4361 loop_bivs_init_find (loop);
4363 /* Look at the each biv and see if we can say anything better about its
4364 initial value from any initializing insns set up above. */
4365 loop_bivs_check (loop);
4367 /* Search the loop for general induction variables. */
4368 loop_givs_find (loop);
4370 /* Try to calculate and save the number of loop iterations. This is
4371 set to zero if the actual number can not be calculated. This must
4372 be called after all giv's have been identified, since otherwise it may
4373 fail if the iteration variable is a giv. */
4374 loop_iterations (loop);
4376 /* Now for each giv for which we still don't know whether or not it is
4377 replaceable, check to see if it is replaceable because its final value
4378 can be calculated. This must be done after loop_iterations is called,
4379 so that final_giv_value will work correctly. */
4380 loop_givs_check (loop);
4382 /* Try to prove that the loop counter variable (if any) is always
4383 nonnegative; if so, record that fact with a REG_NONNEG note
4384 so that "decrement and branch until zero" insn can be used. */
4385 check_dbra_loop (loop, insn_count);
4387 /* Create reg_map to hold substitutions for replaceable giv regs.
4388 Some givs might have been made from biv increments, so look at
4389 ivs->reg_iv_type for a suitable size. */
4390 reg_map_size = ivs->n_regs;
4391 reg_map = (rtx *) xcalloc (reg_map_size, sizeof (rtx));
4393 /* Examine each iv class for feasibility of strength reduction/induction
4394 variable elimination. */
4396 for (bl = ivs->list; bl; bl = bl->next)
4398 struct induction *v;
4401 /* Test whether it will be possible to eliminate this biv
4402 provided all givs are reduced. */
4403 bl->eliminable = loop_biv_eliminable_p (loop, bl, threshold, insn_count);
4405 /* Check each extension dependent giv in this class to see if its
4406 root biv is safe from wrapping in the interior mode. */
4407 check_ext_dependant_givs (bl, loop_info);
4409 /* Combine all giv's for this iv_class. */
4410 combine_givs (regs, bl);
4412 /* This will be true at the end, if all givs which depend on this
4413 biv have been strength reduced.
4414 We can't (currently) eliminate the biv unless this is so. */
4415 bl->all_reduced = 1;
4417 for (v = bl->giv; v; v = v->next_iv)
4419 struct induction *tv;
4421 if (v->ignore || v->same)
4424 benefit = loop_giv_reduce_benefit (loop, bl, v, test_reg);
4426 /* If an insn is not to be strength reduced, then set its ignore
4427 flag, and clear bl->all_reduced. */
4429 /* A giv that depends on a reversed biv must be reduced if it is
4430 used after the loop exit, otherwise, it would have the wrong
4431 value after the loop exit. To make it simple, just reduce all
4432 of such giv's whether or not we know they are used after the loop
4435 if (! flag_reduce_all_givs
4436 && v->lifetime * threshold * benefit < insn_count
4439 if (loop_dump_stream)
4440 fprintf (loop_dump_stream,
4441 "giv of insn %d not worth while, %d vs %d.\n",
4443 v->lifetime * threshold * benefit, insn_count);
4445 bl->all_reduced = 0;
4449 /* Check that we can increment the reduced giv without a
4450 multiply insn. If not, reject it. */
4452 for (tv = bl->biv; tv; tv = tv->next_iv)
4453 if (tv->mult_val == const1_rtx
4454 && ! product_cheap_p (tv->add_val, v->mult_val))
4456 if (loop_dump_stream)
4457 fprintf (loop_dump_stream,
4458 "giv of insn %d: would need a multiply.\n",
4459 INSN_UID (v->insn));
4461 bl->all_reduced = 0;
4467 /* Check for givs whose first use is their definition and whose
4468 last use is the definition of another giv. If so, it is likely
4469 dead and should not be used to derive another giv nor to
4471 loop_givs_dead_check (loop, bl);
4473 /* Reduce each giv that we decided to reduce. */
4474 loop_givs_reduce (loop, bl);
4476 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4479 For each giv register that can be reduced now: if replaceable,
4480 substitute reduced reg wherever the old giv occurs;
4481 else add new move insn "giv_reg = reduced_reg". */
4482 loop_givs_rescan (loop, bl, reg_map, end_insert_before);
4484 /* All the givs based on the biv bl have been reduced if they
4487 /* For each giv not marked as maybe dead that has been combined with a
4488 second giv, clear any "maybe dead" mark on that second giv.
4489 v->new_reg will either be or refer to the register of the giv it
4492 Doing this clearing avoids problems in biv elimination where
4493 a giv's new_reg is a complex value that can't be put in the
4494 insn but the giv combined with (with a reg as new_reg) is
4495 marked maybe_dead. Since the register will be used in either
4496 case, we'd prefer it be used from the simpler giv. */
4498 for (v = bl->giv; v; v = v->next_iv)
4499 if (! v->maybe_dead && v->same)
4500 v->same->maybe_dead = 0;
4502 /* Try to eliminate the biv, if it is a candidate.
4503 This won't work if ! bl->all_reduced,
4504 since the givs we planned to use might not have been reduced.
4506 We have to be careful that we didn't initially think we could
4507 eliminate this biv because of a giv that we now think may be
4508 dead and shouldn't be used as a biv replacement.
4510 Also, there is the possibility that we may have a giv that looks
4511 like it can be used to eliminate a biv, but the resulting insn
4512 isn't valid. This can happen, for example, on the 88k, where a
4513 JUMP_INSN can compare a register only with zero. Attempts to
4514 replace it with a compare with a constant will fail.
4516 Note that in cases where this call fails, we may have replaced some
4517 of the occurrences of the biv with a giv, but no harm was done in
4518 doing so in the rare cases where it can occur. */
4520 if (bl->all_reduced == 1 && bl->eliminable
4521 && maybe_eliminate_biv (loop, bl, 1, threshold, insn_count))
4523 /* ?? If we created a new test to bypass the loop entirely,
4524 or otherwise drop straight in, based on this test, then
4525 we might want to rewrite it also. This way some later
4526 pass has more hope of removing the initialization of this
4529 /* If final_value != 0, then the biv may be used after loop end
4530 and we must emit an insn to set it just in case.
4532 Reversed bivs already have an insn after the loop setting their
4533 value, so we don't need another one. We can't calculate the
4534 proper final value for such a biv here anyways. */
4535 if (bl->final_value && ! bl->reversed)
4539 /* If the loop has multiple exits, emit the insn before the
4540 loop to ensure that it will always be executed no matter
4541 how the loop exits. Otherwise, emit the insn after the
4542 loop, since this is slightly more efficient. */
4543 if (loop->exit_count)
4544 insert_before = loop->start;
4546 insert_before = end_insert_before;
4548 emit_insn_before (gen_move_insn (bl->biv->dest_reg,
4553 if (loop_dump_stream)
4554 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
4559 /* Go through all the instructions in the loop, making all the
4560 register substitutions scheduled in REG_MAP. */
4562 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
4563 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4564 || GET_CODE (p) == CALL_INSN)
4566 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
4567 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
4571 if (loop_info->n_iterations > 0)
4573 /* When we completely unroll a loop we will likely not need the increment
4574 of the loop BIV and we will not need the conditional branch at the
4576 unrolled_insn_copies = insn_count - 2;
4579 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
4580 need the comparison before the conditional branch at the end of the
4582 unrolled_insn_copies -= 1;
4585 /* We'll need one copy for each loop iteration. */
4586 unrolled_insn_copies *= loop_info->n_iterations;
4588 /* A little slop to account for the ability to remove initialization
4589 code, better CSE, and other secondary benefits of completely
4590 unrolling some loops. */
4591 unrolled_insn_copies -= 1;
4593 /* Clamp the value. */
4594 if (unrolled_insn_copies < 0)
4595 unrolled_insn_copies = 0;
4598 /* Unroll loops from within strength reduction so that we can use the
4599 induction variable information that strength_reduce has already
4600 collected. Always unroll loops that would be as small or smaller
4601 unrolled than when rolled. */
4602 if ((flags & LOOP_UNROLL)
4603 || (loop_info->n_iterations > 0
4604 && unrolled_insn_copies <= insn_count))
4605 unroll_loop (loop, insn_count, end_insert_before, 1);
4607 #ifdef HAVE_doloop_end
4608 if (HAVE_doloop_end && (flags & LOOP_BCT) && flag_branch_on_count_reg)
4609 doloop_optimize (loop);
4610 #endif /* HAVE_doloop_end */
4612 if (loop_dump_stream)
4613 fprintf (loop_dump_stream, "\n");
4615 loop_ivs_free (loop);
4620 /*Record all basic induction variables calculated in the insn. */
4622 check_insn_for_bivs (loop, p, not_every_iteration, maybe_multiple)
4625 int not_every_iteration;
4628 struct loop_ivs *ivs = LOOP_IVS (loop);
4635 if (GET_CODE (p) == INSN
4636 && (set = single_set (p))
4637 && GET_CODE (SET_DEST (set)) == REG)
4639 dest_reg = SET_DEST (set);
4640 if (REGNO (dest_reg) < max_reg_before_loop
4641 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
4642 && REG_IV_TYPE (ivs, REGNO (dest_reg)) != NOT_BASIC_INDUCT)
4644 if (basic_induction_var (loop, SET_SRC (set),
4645 GET_MODE (SET_SRC (set)),
4646 dest_reg, p, &inc_val, &mult_val,
4649 /* It is a possible basic induction variable.
4650 Create and initialize an induction structure for it. */
4653 = (struct induction *) xmalloc (sizeof (struct induction));
4655 record_biv (loop, v, p, dest_reg, inc_val, mult_val, location,
4656 not_every_iteration, maybe_multiple);
4657 REG_IV_TYPE (ivs, REGNO (dest_reg)) = BASIC_INDUCT;
4659 else if (REGNO (dest_reg) < ivs->n_regs)
4660 REG_IV_TYPE (ivs, REGNO (dest_reg)) = NOT_BASIC_INDUCT;
4666 /* Record all givs calculated in the insn.
4667 A register is a giv if: it is only set once, it is a function of a
4668 biv and a constant (or invariant), and it is not a biv. */
4670 check_insn_for_givs (loop, p, not_every_iteration, maybe_multiple)
4673 int not_every_iteration;
4676 struct loop_regs *regs = LOOP_REGS (loop);
4679 /* Look for a general induction variable in a register. */
4680 if (GET_CODE (p) == INSN
4681 && (set = single_set (p))
4682 && GET_CODE (SET_DEST (set)) == REG
4683 && ! VARRAY_CHAR (regs->may_not_optimize, REGNO (SET_DEST (set))))
4692 rtx last_consec_insn;
4694 dest_reg = SET_DEST (set);
4695 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
4698 if (/* SET_SRC is a giv. */
4699 (general_induction_var (loop, SET_SRC (set), &src_reg, &add_val,
4700 &mult_val, &ext_val, 0, &benefit, VOIDmode)
4701 /* Equivalent expression is a giv. */
4702 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
4703 && general_induction_var (loop, XEXP (regnote, 0), &src_reg,
4704 &add_val, &mult_val, &ext_val, 0,
4705 &benefit, VOIDmode)))
4706 /* Don't try to handle any regs made by loop optimization.
4707 We have nothing on them in regno_first_uid, etc. */
4708 && REGNO (dest_reg) < max_reg_before_loop
4709 /* Don't recognize a BASIC_INDUCT_VAR here. */
4710 && dest_reg != src_reg
4711 /* This must be the only place where the register is set. */
4712 && (VARRAY_INT (regs->n_times_set, REGNO (dest_reg)) == 1
4713 /* or all sets must be consecutive and make a giv. */
4714 || (benefit = consec_sets_giv (loop, benefit, p,
4716 &add_val, &mult_val, &ext_val,
4717 &last_consec_insn))))
4720 = (struct induction *) xmalloc (sizeof (struct induction));
4722 /* If this is a library call, increase benefit. */
4723 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
4724 benefit += libcall_benefit (p);
4726 /* Skip the consecutive insns, if there are any. */
4727 if (VARRAY_INT (regs->n_times_set, REGNO (dest_reg)) != 1)
4728 p = last_consec_insn;
4730 record_giv (loop, v, p, src_reg, dest_reg, mult_val, add_val,
4731 ext_val, benefit, DEST_REG, not_every_iteration,
4732 maybe_multiple, NULL_PTR);
4737 #ifndef DONT_REDUCE_ADDR
4738 /* Look for givs which are memory addresses. */
4739 /* This resulted in worse code on a VAX 8600. I wonder if it
4741 if (GET_CODE (p) == INSN)
4742 find_mem_givs (loop, PATTERN (p), p, not_every_iteration,
4746 /* Update the status of whether giv can derive other givs. This can
4747 change when we pass a label or an insn that updates a biv. */
4748 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4749 || GET_CODE (p) == CODE_LABEL)
4750 update_giv_derive (loop, p);
4754 /* Return 1 if X is a valid source for an initial value (or as value being
4755 compared against in an initial test).
4757 X must be either a register or constant and must not be clobbered between
4758 the current insn and the start of the loop.
4760 INSN is the insn containing X. */
4763 valid_initial_value_p (x, insn, call_seen, loop_start)
4772 /* Only consider pseudos we know about initialized in insns whose luids
4774 if (GET_CODE (x) != REG
4775 || REGNO (x) >= max_reg_before_loop)
4778 /* Don't use call-clobbered registers across a call which clobbers it. On
4779 some machines, don't use any hard registers at all. */
4780 if (REGNO (x) < FIRST_PSEUDO_REGISTER
4781 && (SMALL_REGISTER_CLASSES
4782 || (call_used_regs[REGNO (x)] && call_seen)))
4785 /* Don't use registers that have been clobbered before the start of the
4787 if (reg_set_between_p (x, insn, loop_start))
4793 /* Scan X for memory refs and check each memory address
4794 as a possible giv. INSN is the insn whose pattern X comes from.
4795 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4796 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
4797 more thanonce in each loop iteration. */
4800 find_mem_givs (loop, x, insn, not_every_iteration, maybe_multiple)
4801 const struct loop *loop;
4804 int not_every_iteration, maybe_multiple;
4807 register enum rtx_code code;
4808 register const char *fmt;
4813 code = GET_CODE (x);
4838 /* This code used to disable creating GIVs with mult_val == 1 and
4839 add_val == 0. However, this leads to lost optimizations when
4840 it comes time to combine a set of related DEST_ADDR GIVs, since
4841 this one would not be seen. */
4843 if (general_induction_var (loop, XEXP (x, 0), &src_reg, &add_val,
4844 &mult_val, &ext_val, 1, &benefit,
4847 /* Found one; record it. */
4849 = (struct induction *) xmalloc (sizeof (struct induction));
4851 record_giv (loop, v, insn, src_reg, addr_placeholder, mult_val,
4852 add_val, ext_val, benefit, DEST_ADDR,
4853 not_every_iteration, maybe_multiple, &XEXP (x, 0));
4855 v->mem_mode = GET_MODE (x);
4864 /* Recursively scan the subexpressions for other mem refs. */
4866 fmt = GET_RTX_FORMAT (code);
4867 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4869 find_mem_givs (loop, XEXP (x, i), insn, not_every_iteration,
4871 else if (fmt[i] == 'E')
4872 for (j = 0; j < XVECLEN (x, i); j++)
4873 find_mem_givs (loop, XVECEXP (x, i, j), insn, not_every_iteration,
4877 /* Fill in the data about one biv update.
4878 V is the `struct induction' in which we record the biv. (It is
4879 allocated by the caller, with alloca.)
4880 INSN is the insn that sets it.
4881 DEST_REG is the biv's reg.
4883 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4884 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4885 being set to INC_VAL.
4887 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4888 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4889 can be executed more than once per iteration. If MAYBE_MULTIPLE
4890 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4891 executed exactly once per iteration. */
4894 record_biv (loop, v, insn, dest_reg, inc_val, mult_val, location,
4895 not_every_iteration, maybe_multiple)
4897 struct induction *v;
4903 int not_every_iteration;
4906 struct loop_ivs *ivs = LOOP_IVS (loop);
4907 struct iv_class *bl;
4910 v->src_reg = dest_reg;
4911 v->dest_reg = dest_reg;
4912 v->mult_val = mult_val;
4913 v->add_val = inc_val;
4914 v->ext_dependant = NULL_RTX;
4915 v->location = location;
4916 v->mode = GET_MODE (dest_reg);
4917 v->always_computable = ! not_every_iteration;
4918 v->always_executed = ! not_every_iteration;
4919 v->maybe_multiple = maybe_multiple;
4921 /* Add this to the reg's iv_class, creating a class
4922 if this is the first incrementation of the reg. */
4924 bl = REG_IV_CLASS (ivs, REGNO (dest_reg));
4927 /* Create and initialize new iv_class. */
4929 bl = (struct iv_class *) xmalloc (sizeof (struct iv_class));
4931 bl->regno = REGNO (dest_reg);
4937 /* Set initial value to the reg itself. */
4938 bl->initial_value = dest_reg;
4939 bl->final_value = 0;
4940 /* We haven't seen the initializing insn yet */
4943 bl->initial_test = 0;
4944 bl->incremented = 0;
4948 bl->total_benefit = 0;
4950 /* Add this class to ivs->list. */
4951 bl->next = ivs->list;
4954 /* Put it in the array of biv register classes. */
4955 REG_IV_CLASS (ivs, REGNO (dest_reg)) = bl;
4958 /* Update IV_CLASS entry for this biv. */
4959 v->next_iv = bl->biv;
4962 if (mult_val == const1_rtx)
4963 bl->incremented = 1;
4965 if (loop_dump_stream)
4967 fprintf (loop_dump_stream,
4968 "Insn %d: possible biv, reg %d,",
4969 INSN_UID (insn), REGNO (dest_reg));
4970 if (GET_CODE (inc_val) == CONST_INT)
4972 fprintf (loop_dump_stream, " const =");
4973 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (inc_val));
4974 fputc ('\n', loop_dump_stream);
4978 fprintf (loop_dump_stream, " const = ");
4979 print_rtl (loop_dump_stream, inc_val);
4980 fprintf (loop_dump_stream, "\n");
4985 /* Fill in the data about one giv.
4986 V is the `struct induction' in which we record the giv. (It is
4987 allocated by the caller, with alloca.)
4988 INSN is the insn that sets it.
4989 BENEFIT estimates the savings from deleting this insn.
4990 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4991 into a register or is used as a memory address.
4993 SRC_REG is the biv reg which the giv is computed from.
4994 DEST_REG is the giv's reg (if the giv is stored in a reg).
4995 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4996 LOCATION points to the place where this giv's value appears in INSN. */
4999 record_giv (loop, v, insn, src_reg, dest_reg, mult_val, add_val, ext_val,
5000 benefit, type, not_every_iteration, maybe_multiple, location)
5001 const struct loop *loop;
5002 struct induction *v;
5006 rtx mult_val, add_val, ext_val;
5009 int not_every_iteration, maybe_multiple;
5012 struct loop_ivs *ivs = LOOP_IVS (loop);
5013 struct induction *b;
5014 struct iv_class *bl;
5015 rtx set = single_set (insn);
5018 /* Attempt to prove constantness of the values. */
5019 temp = simplify_rtx (add_val);
5024 v->src_reg = src_reg;
5026 v->dest_reg = dest_reg;
5027 v->mult_val = mult_val;
5028 v->add_val = add_val;
5029 v->ext_dependant = ext_val;
5030 v->benefit = benefit;
5031 v->location = location;
5033 v->combined_with = 0;
5034 v->maybe_multiple = maybe_multiple;
5036 v->derive_adjustment = 0;
5042 v->auto_inc_opt = 0;
5046 /* The v->always_computable field is used in update_giv_derive, to
5047 determine whether a giv can be used to derive another giv. For a
5048 DEST_REG giv, INSN computes a new value for the giv, so its value
5049 isn't computable if INSN insn't executed every iteration.
5050 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5051 it does not compute a new value. Hence the value is always computable
5052 regardless of whether INSN is executed each iteration. */
5054 if (type == DEST_ADDR)
5055 v->always_computable = 1;
5057 v->always_computable = ! not_every_iteration;
5059 v->always_executed = ! not_every_iteration;
5061 if (type == DEST_ADDR)
5063 v->mode = GET_MODE (*location);
5066 else /* type == DEST_REG */
5068 v->mode = GET_MODE (SET_DEST (set));
5070 v->lifetime = LOOP_REG_LIFETIME (loop, REGNO (dest_reg));
5072 /* If the lifetime is zero, it means that this register is
5073 really a dead store. So mark this as a giv that can be
5074 ignored. This will not prevent the biv from being eliminated. */
5075 if (v->lifetime == 0)
5078 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
5079 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
5082 /* Add the giv to the class of givs computed from one biv. */
5084 bl = REG_IV_CLASS (ivs, REGNO (src_reg));
5087 v->next_iv = bl->giv;
5089 /* Don't count DEST_ADDR. This is supposed to count the number of
5090 insns that calculate givs. */
5091 if (type == DEST_REG)
5093 bl->total_benefit += benefit;
5096 /* Fatal error, biv missing for this giv? */
5099 if (type == DEST_ADDR)
5103 /* The giv can be replaced outright by the reduced register only if all
5104 of the following conditions are true:
5105 - the insn that sets the giv is always executed on any iteration
5106 on which the giv is used at all
5107 (there are two ways to deduce this:
5108 either the insn is executed on every iteration,
5109 or all uses follow that insn in the same basic block),
5110 - the giv is not used outside the loop
5111 - no assignments to the biv occur during the giv's lifetime. */
5113 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5114 /* Previous line always fails if INSN was moved by loop opt. */
5115 && REGNO_LAST_LUID (REGNO (dest_reg))
5116 < INSN_LUID (loop->end)
5117 && (! not_every_iteration
5118 || last_use_this_basic_block (dest_reg, insn)))
5120 /* Now check that there are no assignments to the biv within the
5121 giv's lifetime. This requires two separate checks. */
5123 /* Check each biv update, and fail if any are between the first
5124 and last use of the giv.
5126 If this loop contains an inner loop that was unrolled, then
5127 the insn modifying the biv may have been emitted by the loop
5128 unrolling code, and hence does not have a valid luid. Just
5129 mark the biv as not replaceable in this case. It is not very
5130 useful as a biv, because it is used in two different loops.
5131 It is very unlikely that we would be able to optimize the giv
5132 using this biv anyways. */
5135 for (b = bl->biv; b; b = b->next_iv)
5137 if (INSN_UID (b->insn) >= max_uid_for_loop
5138 || ((INSN_LUID (b->insn)
5139 >= REGNO_FIRST_LUID (REGNO (dest_reg)))
5140 && (INSN_LUID (b->insn)
5141 <= REGNO_LAST_LUID (REGNO (dest_reg)))))
5144 v->not_replaceable = 1;
5149 /* If there are any backwards branches that go from after the
5150 biv update to before it, then this giv is not replaceable. */
5152 for (b = bl->biv; b; b = b->next_iv)
5153 if (back_branch_in_range_p (loop, b->insn))
5156 v->not_replaceable = 1;
5162 /* May still be replaceable, we don't have enough info here to
5165 v->not_replaceable = 0;
5169 /* Record whether the add_val contains a const_int, for later use by
5174 v->no_const_addval = 1;
5175 if (tem == const0_rtx)
5177 else if (CONSTANT_P (add_val))
5178 v->no_const_addval = 0;
5179 if (GET_CODE (tem) == PLUS)
5183 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5184 tem = XEXP (tem, 0);
5185 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5186 tem = XEXP (tem, 1);
5190 if (CONSTANT_P (XEXP (tem, 1)))
5191 v->no_const_addval = 0;
5195 if (loop_dump_stream)
5197 if (type == DEST_REG)
5198 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
5199 INSN_UID (insn), REGNO (dest_reg));
5201 fprintf (loop_dump_stream, "Insn %d: dest address",
5204 fprintf (loop_dump_stream, " src reg %d benefit %d",
5205 REGNO (src_reg), v->benefit);
5206 fprintf (loop_dump_stream, " lifetime %d",
5210 fprintf (loop_dump_stream, " replaceable");
5212 if (v->no_const_addval)
5213 fprintf (loop_dump_stream, " ncav");
5215 if (v->ext_dependant)
5217 switch (GET_CODE (v->ext_dependant))
5220 fprintf (loop_dump_stream, " ext se");
5223 fprintf (loop_dump_stream, " ext ze");
5226 fprintf (loop_dump_stream, " ext tr");
5233 if (GET_CODE (mult_val) == CONST_INT)
5235 fprintf (loop_dump_stream, " mult ");
5236 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (mult_val));
5240 fprintf (loop_dump_stream, " mult ");
5241 print_rtl (loop_dump_stream, mult_val);
5244 if (GET_CODE (add_val) == CONST_INT)
5246 fprintf (loop_dump_stream, " add ");
5247 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (add_val));
5251 fprintf (loop_dump_stream, " add ");
5252 print_rtl (loop_dump_stream, add_val);
5256 if (loop_dump_stream)
5257 fprintf (loop_dump_stream, "\n");
5261 /* All this does is determine whether a giv can be made replaceable because
5262 its final value can be calculated. This code can not be part of record_giv
5263 above, because final_giv_value requires that the number of loop iterations
5264 be known, and that can not be accurately calculated until after all givs
5265 have been identified. */
5268 check_final_value (loop, v)
5269 const struct loop *loop;
5270 struct induction *v;
5272 struct loop_ivs *ivs = LOOP_IVS (loop);
5273 struct iv_class *bl;
5274 rtx final_value = 0;
5276 bl = REG_IV_CLASS (ivs, REGNO (v->src_reg));
5278 /* DEST_ADDR givs will never reach here, because they are always marked
5279 replaceable above in record_giv. */
5281 /* The giv can be replaced outright by the reduced register only if all
5282 of the following conditions are true:
5283 - the insn that sets the giv is always executed on any iteration
5284 on which the giv is used at all
5285 (there are two ways to deduce this:
5286 either the insn is executed on every iteration,
5287 or all uses follow that insn in the same basic block),
5288 - its final value can be calculated (this condition is different
5289 than the one above in record_giv)
5290 - it's not used before the it's set
5291 - no assignments to the biv occur during the giv's lifetime. */
5294 /* This is only called now when replaceable is known to be false. */
5295 /* Clear replaceable, so that it won't confuse final_giv_value. */
5299 if ((final_value = final_giv_value (loop, v))
5300 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5302 int biv_increment_seen = 0, before_giv_insn = 0;
5308 /* When trying to determine whether or not a biv increment occurs
5309 during the lifetime of the giv, we can ignore uses of the variable
5310 outside the loop because final_value is true. Hence we can not
5311 use regno_last_uid and regno_first_uid as above in record_giv. */
5313 /* Search the loop to determine whether any assignments to the
5314 biv occur during the giv's lifetime. Start with the insn
5315 that sets the giv, and search around the loop until we come
5316 back to that insn again.
5318 Also fail if there is a jump within the giv's lifetime that jumps
5319 to somewhere outside the lifetime but still within the loop. This
5320 catches spaghetti code where the execution order is not linear, and
5321 hence the above test fails. Here we assume that the giv lifetime
5322 does not extend from one iteration of the loop to the next, so as
5323 to make the test easier. Since the lifetime isn't known yet,
5324 this requires two loops. See also record_giv above. */
5326 last_giv_use = v->insn;
5333 before_giv_insn = 1;
5334 p = NEXT_INSN (loop->start);
5339 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5340 || GET_CODE (p) == CALL_INSN)
5342 /* It is possible for the BIV increment to use the GIV if we
5343 have a cycle. Thus we must be sure to check each insn for
5344 both BIV and GIV uses, and we must check for BIV uses
5347 if (! biv_increment_seen
5348 && reg_set_p (v->src_reg, PATTERN (p)))
5349 biv_increment_seen = 1;
5351 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5353 if (biv_increment_seen || before_giv_insn)
5356 v->not_replaceable = 1;
5364 /* Now that the lifetime of the giv is known, check for branches
5365 from within the lifetime to outside the lifetime if it is still
5375 p = NEXT_INSN (loop->start);
5376 if (p == last_giv_use)
5379 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5380 && LABEL_NAME (JUMP_LABEL (p))
5381 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
5382 && loop_insn_first_p (loop->start, JUMP_LABEL (p)))
5383 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
5384 && loop_insn_first_p (JUMP_LABEL (p), loop->end))))
5387 v->not_replaceable = 1;
5389 if (loop_dump_stream)
5390 fprintf (loop_dump_stream,
5391 "Found branch outside giv lifetime.\n");
5398 /* If it is replaceable, then save the final value. */
5400 v->final_value = final_value;
5403 if (loop_dump_stream && v->replaceable)
5404 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5405 INSN_UID (v->insn), REGNO (v->dest_reg));
5408 /* Update the status of whether a giv can derive other givs.
5410 We need to do something special if there is or may be an update to the biv
5411 between the time the giv is defined and the time it is used to derive
5414 In addition, a giv that is only conditionally set is not allowed to
5415 derive another giv once a label has been passed.
5417 The cases we look at are when a label or an update to a biv is passed. */
5420 update_giv_derive (loop, p)
5421 const struct loop *loop;
5424 struct loop_ivs *ivs = LOOP_IVS (loop);
5425 struct iv_class *bl;
5426 struct induction *biv, *giv;
5430 /* Search all IV classes, then all bivs, and finally all givs.
5432 There are three cases we are concerned with. First we have the situation
5433 of a giv that is only updated conditionally. In that case, it may not
5434 derive any givs after a label is passed.
5436 The second case is when a biv update occurs, or may occur, after the
5437 definition of a giv. For certain biv updates (see below) that are
5438 known to occur between the giv definition and use, we can adjust the
5439 giv definition. For others, or when the biv update is conditional,
5440 we must prevent the giv from deriving any other givs. There are two
5441 sub-cases within this case.
5443 If this is a label, we are concerned with any biv update that is done
5444 conditionally, since it may be done after the giv is defined followed by
5445 a branch here (actually, we need to pass both a jump and a label, but
5446 this extra tracking doesn't seem worth it).
5448 If this is a jump, we are concerned about any biv update that may be
5449 executed multiple times. We are actually only concerned about
5450 backward jumps, but it is probably not worth performing the test
5451 on the jump again here.
5453 If this is a biv update, we must adjust the giv status to show that a
5454 subsequent biv update was performed. If this adjustment cannot be done,
5455 the giv cannot derive further givs. */
5457 for (bl = ivs->list; bl; bl = bl->next)
5458 for (biv = bl->biv; biv; biv = biv->next_iv)
5459 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5462 for (giv = bl->giv; giv; giv = giv->next_iv)
5464 /* If cant_derive is already true, there is no point in
5465 checking all of these conditions again. */
5466 if (giv->cant_derive)
5469 /* If this giv is conditionally set and we have passed a label,
5470 it cannot derive anything. */
5471 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5472 giv->cant_derive = 1;
5474 /* Skip givs that have mult_val == 0, since
5475 they are really invariants. Also skip those that are
5476 replaceable, since we know their lifetime doesn't contain
5478 else if (giv->mult_val == const0_rtx || giv->replaceable)
5481 /* The only way we can allow this giv to derive another
5482 is if this is a biv increment and we can form the product
5483 of biv->add_val and giv->mult_val. In this case, we will
5484 be able to compute a compensation. */
5485 else if (biv->insn == p)
5490 if (biv->mult_val == const1_rtx)
5491 tem = simplify_giv_expr (loop,
5492 gen_rtx_MULT (giv->mode,
5495 &ext_val_dummy, &dummy);
5497 if (tem && giv->derive_adjustment)
5498 tem = simplify_giv_expr
5500 gen_rtx_PLUS (giv->mode, tem, giv->derive_adjustment),
5501 &ext_val_dummy, &dummy);
5504 giv->derive_adjustment = tem;
5506 giv->cant_derive = 1;
5508 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
5509 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
5510 giv->cant_derive = 1;
5515 /* Check whether an insn is an increment legitimate for a basic induction var.
5516 X is the source of insn P, or a part of it.
5517 MODE is the mode in which X should be interpreted.
5519 DEST_REG is the putative biv, also the destination of the insn.
5520 We accept patterns of these forms:
5521 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5522 REG = INVARIANT + REG
5524 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5525 store the additive term into *INC_VAL, and store the place where
5526 we found the additive term into *LOCATION.
5528 If X is an assignment of an invariant into DEST_REG, we set
5529 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5531 We also want to detect a BIV when it corresponds to a variable
5532 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5533 of the variable may be a PLUS that adds a SUBREG of that variable to
5534 an invariant and then sign- or zero-extends the result of the PLUS
5537 Most GIVs in such cases will be in the promoted mode, since that is the
5538 probably the natural computation mode (and almost certainly the mode
5539 used for addresses) on the machine. So we view the pseudo-reg containing
5540 the variable as the BIV, as if it were simply incremented.
5542 Note that treating the entire pseudo as a BIV will result in making
5543 simple increments to any GIVs based on it. However, if the variable
5544 overflows in its declared mode but not its promoted mode, the result will
5545 be incorrect. This is acceptable if the variable is signed, since
5546 overflows in such cases are undefined, but not if it is unsigned, since
5547 those overflows are defined. So we only check for SIGN_EXTEND and
5550 If we cannot find a biv, we return 0. */
5553 basic_induction_var (loop, x, mode, dest_reg, p, inc_val, mult_val, location)
5554 const struct loop *loop;
5556 enum machine_mode mode;
5563 register enum rtx_code code;
5567 code = GET_CODE (x);
5572 if (rtx_equal_p (XEXP (x, 0), dest_reg)
5573 || (GET_CODE (XEXP (x, 0)) == SUBREG
5574 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
5575 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
5577 argp = &XEXP (x, 1);
5579 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
5580 || (GET_CODE (XEXP (x, 1)) == SUBREG
5581 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
5582 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
5584 argp = &XEXP (x, 0);
5590 if (loop_invariant_p (loop, arg) != 1)
5593 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
5594 *mult_val = const1_rtx;
5599 /* If this is a SUBREG for a promoted variable, check the inner
5601 if (SUBREG_PROMOTED_VAR_P (x))
5602 return basic_induction_var (loop, SUBREG_REG (x),
5603 GET_MODE (SUBREG_REG (x)),
5604 dest_reg, p, inc_val, mult_val, location);
5608 /* If this register is assigned in a previous insn, look at its
5609 source, but don't go outside the loop or past a label. */
5611 /* If this sets a register to itself, we would repeat any previous
5612 biv increment if we applied this strategy blindly. */
5613 if (rtx_equal_p (dest_reg, x))
5622 insn = PREV_INSN (insn);
5624 while (insn && GET_CODE (insn) == NOTE
5625 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5629 set = single_set (insn);
5632 dest = SET_DEST (set);
5634 || (GET_CODE (dest) == SUBREG
5635 && (GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD)
5636 && (GET_MODE_CLASS (GET_MODE (dest)) == MODE_INT)
5637 && SUBREG_REG (dest) == x))
5638 return basic_induction_var (loop, SET_SRC (set),
5639 (GET_MODE (SET_SRC (set)) == VOIDmode
5641 : GET_MODE (SET_SRC (set))),
5643 inc_val, mult_val, location);
5645 while (GET_CODE (dest) == SIGN_EXTRACT
5646 || GET_CODE (dest) == ZERO_EXTRACT
5647 || GET_CODE (dest) == SUBREG
5648 || GET_CODE (dest) == STRICT_LOW_PART)
5649 dest = XEXP (dest, 0);
5655 /* Can accept constant setting of biv only when inside inner most loop.
5656 Otherwise, a biv of an inner loop may be incorrectly recognized
5657 as a biv of the outer loop,
5658 causing code to be moved INTO the inner loop. */
5660 if (loop_invariant_p (loop, x) != 1)
5665 /* convert_modes aborts if we try to convert to or from CCmode, so just
5666 exclude that case. It is very unlikely that a condition code value
5667 would be a useful iterator anyways. */
5668 if (loop->level == 1
5669 && GET_MODE_CLASS (mode) != MODE_CC
5670 && GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
5672 /* Possible bug here? Perhaps we don't know the mode of X. */
5673 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
5674 *mult_val = const0_rtx;
5681 return basic_induction_var (loop, XEXP (x, 0), GET_MODE (XEXP (x, 0)),
5682 dest_reg, p, inc_val, mult_val, location);
5685 /* Similar, since this can be a sign extension. */
5686 for (insn = PREV_INSN (p);
5687 (insn && GET_CODE (insn) == NOTE
5688 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5689 insn = PREV_INSN (insn))
5693 set = single_set (insn);
5695 if (! rtx_equal_p (dest_reg, XEXP (x, 0))
5696 && set && SET_DEST (set) == XEXP (x, 0)
5697 && GET_CODE (XEXP (x, 1)) == CONST_INT
5698 && INTVAL (XEXP (x, 1)) >= 0
5699 && GET_CODE (SET_SRC (set)) == ASHIFT
5700 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
5701 return basic_induction_var (loop, XEXP (SET_SRC (set), 0),
5702 GET_MODE (XEXP (x, 0)),
5703 dest_reg, insn, inc_val, mult_val,
5712 /* A general induction variable (giv) is any quantity that is a linear
5713 function of a basic induction variable,
5714 i.e. giv = biv * mult_val + add_val.
5715 The coefficients can be any loop invariant quantity.
5716 A giv need not be computed directly from the biv;
5717 it can be computed by way of other givs. */
5719 /* Determine whether X computes a giv.
5720 If it does, return a nonzero value
5721 which is the benefit from eliminating the computation of X;
5722 set *SRC_REG to the register of the biv that it is computed from;
5723 set *ADD_VAL and *MULT_VAL to the coefficients,
5724 such that the value of X is biv * mult + add; */
5727 general_induction_var (loop, x, src_reg, add_val, mult_val, ext_val,
5728 is_addr, pbenefit, addr_mode)
5729 const struct loop *loop;
5737 enum machine_mode addr_mode;
5739 struct loop_ivs *ivs = LOOP_IVS (loop);
5742 /* If this is an invariant, forget it, it isn't a giv. */
5743 if (loop_invariant_p (loop, x) == 1)
5747 *ext_val = NULL_RTX;
5748 x = simplify_giv_expr (loop, x, ext_val, pbenefit);
5752 switch (GET_CODE (x))
5756 /* Since this is now an invariant and wasn't before, it must be a giv
5757 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5759 *src_reg = ivs->list->biv->dest_reg;
5760 *mult_val = const0_rtx;
5765 /* This is equivalent to a BIV. */
5767 *mult_val = const1_rtx;
5768 *add_val = const0_rtx;
5772 /* Either (plus (biv) (invar)) or
5773 (plus (mult (biv) (invar_1)) (invar_2)). */
5774 if (GET_CODE (XEXP (x, 0)) == MULT)
5776 *src_reg = XEXP (XEXP (x, 0), 0);
5777 *mult_val = XEXP (XEXP (x, 0), 1);
5781 *src_reg = XEXP (x, 0);
5782 *mult_val = const1_rtx;
5784 *add_val = XEXP (x, 1);
5788 /* ADD_VAL is zero. */
5789 *src_reg = XEXP (x, 0);
5790 *mult_val = XEXP (x, 1);
5791 *add_val = const0_rtx;
5798 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5799 unless they are CONST_INT). */
5800 if (GET_CODE (*add_val) == USE)
5801 *add_val = XEXP (*add_val, 0);
5802 if (GET_CODE (*mult_val) == USE)
5803 *mult_val = XEXP (*mult_val, 0);
5806 *pbenefit += address_cost (orig_x, addr_mode) - reg_address_cost;
5808 *pbenefit += rtx_cost (orig_x, SET);
5810 /* Always return true if this is a giv so it will be detected as such,
5811 even if the benefit is zero or negative. This allows elimination
5812 of bivs that might otherwise not be eliminated. */
5816 /* Given an expression, X, try to form it as a linear function of a biv.
5817 We will canonicalize it to be of the form
5818 (plus (mult (BIV) (invar_1))
5820 with possible degeneracies.
5822 The invariant expressions must each be of a form that can be used as a
5823 machine operand. We surround then with a USE rtx (a hack, but localized
5824 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5825 routine; it is the caller's responsibility to strip them.
5827 If no such canonicalization is possible (i.e., two biv's are used or an
5828 expression that is neither invariant nor a biv or giv), this routine
5831 For a non-zero return, the result will have a code of CONST_INT, USE,
5832 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5834 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5836 static rtx sge_plus PARAMS ((enum machine_mode, rtx, rtx));
5837 static rtx sge_plus_constant PARAMS ((rtx, rtx));
5840 simplify_giv_expr (loop, x, ext_val, benefit)
5841 const struct loop *loop;
5846 struct loop_ivs *ivs = LOOP_IVS (loop);
5847 struct loop_regs *regs = LOOP_REGS (loop);
5848 enum machine_mode mode = GET_MODE (x);
5852 /* If this is not an integer mode, or if we cannot do arithmetic in this
5853 mode, this can't be a giv. */
5854 if (mode != VOIDmode
5855 && (GET_MODE_CLASS (mode) != MODE_INT
5856 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
5859 switch (GET_CODE (x))
5862 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
5863 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
5864 if (arg0 == 0 || arg1 == 0)
5867 /* Put constant last, CONST_INT last if both constant. */
5868 if ((GET_CODE (arg0) == USE
5869 || GET_CODE (arg0) == CONST_INT)
5870 && ! ((GET_CODE (arg0) == USE
5871 && GET_CODE (arg1) == USE)
5872 || GET_CODE (arg1) == CONST_INT))
5873 tem = arg0, arg0 = arg1, arg1 = tem;
5875 /* Handle addition of zero, then addition of an invariant. */
5876 if (arg1 == const0_rtx)
5878 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
5879 switch (GET_CODE (arg0))
5883 /* Adding two invariants must result in an invariant, so enclose
5884 addition operation inside a USE and return it. */
5885 if (GET_CODE (arg0) == USE)
5886 arg0 = XEXP (arg0, 0);
5887 if (GET_CODE (arg1) == USE)
5888 arg1 = XEXP (arg1, 0);
5890 if (GET_CODE (arg0) == CONST_INT)
5891 tem = arg0, arg0 = arg1, arg1 = tem;
5892 if (GET_CODE (arg1) == CONST_INT)
5893 tem = sge_plus_constant (arg0, arg1);
5895 tem = sge_plus (mode, arg0, arg1);
5897 if (GET_CODE (tem) != CONST_INT)
5898 tem = gen_rtx_USE (mode, tem);
5903 /* biv + invar or mult + invar. Return sum. */
5904 return gen_rtx_PLUS (mode, arg0, arg1);
5907 /* (a + invar_1) + invar_2. Associate. */
5909 simplify_giv_expr (loop,
5921 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5922 MULT to reduce cases. */
5923 if (GET_CODE (arg0) == REG)
5924 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
5925 if (GET_CODE (arg1) == REG)
5926 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
5928 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5929 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5930 Recurse to associate the second PLUS. */
5931 if (GET_CODE (arg1) == MULT)
5932 tem = arg0, arg0 = arg1, arg1 = tem;
5934 if (GET_CODE (arg1) == PLUS)
5936 simplify_giv_expr (loop,
5938 gen_rtx_PLUS (mode, arg0,
5943 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5944 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
5947 if (!rtx_equal_p (arg0, arg1))
5950 return simplify_giv_expr (loop,
5959 /* Handle "a - b" as "a + b * (-1)". */
5960 return simplify_giv_expr (loop,
5969 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
5970 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
5971 if (arg0 == 0 || arg1 == 0)
5974 /* Put constant last, CONST_INT last if both constant. */
5975 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
5976 && GET_CODE (arg1) != CONST_INT)
5977 tem = arg0, arg0 = arg1, arg1 = tem;
5979 /* If second argument is not now constant, not giv. */
5980 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
5983 /* Handle multiply by 0 or 1. */
5984 if (arg1 == const0_rtx)
5987 else if (arg1 == const1_rtx)
5990 switch (GET_CODE (arg0))
5993 /* biv * invar. Done. */
5994 return gen_rtx_MULT (mode, arg0, arg1);
5997 /* Product of two constants. */
5998 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6001 /* invar * invar is a giv, but attempt to simplify it somehow. */
6002 if (GET_CODE (arg1) != CONST_INT)
6005 arg0 = XEXP (arg0, 0);
6006 if (GET_CODE (arg0) == MULT)
6008 /* (invar_0 * invar_1) * invar_2. Associate. */
6009 return simplify_giv_expr (loop,
6018 /* Porpagate the MULT expressions to the intermost nodes. */
6019 else if (GET_CODE (arg0) == PLUS)
6021 /* (invar_0 + invar_1) * invar_2. Distribute. */
6022 return simplify_giv_expr (loop,
6034 return gen_rtx_USE (mode, gen_rtx_MULT (mode, arg0, arg1));
6037 /* (a * invar_1) * invar_2. Associate. */
6038 return simplify_giv_expr (loop,
6047 /* (a + invar_1) * invar_2. Distribute. */
6048 return simplify_giv_expr (loop,
6063 /* Shift by constant is multiply by power of two. */
6064 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6068 simplify_giv_expr (loop,
6071 GEN_INT ((HOST_WIDE_INT) 1
6072 << INTVAL (XEXP (x, 1)))),
6076 /* "-a" is "a * (-1)" */
6077 return simplify_giv_expr (loop,
6078 gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6082 /* "~a" is "-a - 1". Silly, but easy. */
6083 return simplify_giv_expr (loop,
6084 gen_rtx_MINUS (mode,
6085 gen_rtx_NEG (mode, XEXP (x, 0)),
6090 /* Already in proper form for invariant. */
6096 /* Conditionally recognize extensions of simple IVs. After we've
6097 computed loop traversal counts and verified the range of the
6098 source IV, we'll reevaluate this as a GIV. */
6099 if (*ext_val == NULL_RTX)
6101 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6102 if (arg0 && *ext_val == NULL_RTX && GET_CODE (arg0) == REG)
6104 *ext_val = gen_rtx_fmt_e (GET_CODE (x), mode, arg0);
6111 /* If this is a new register, we can't deal with it. */
6112 if (REGNO (x) >= max_reg_before_loop)
6115 /* Check for biv or giv. */
6116 switch (REG_IV_TYPE (ivs, REGNO (x)))
6120 case GENERAL_INDUCT:
6122 struct induction *v = REG_IV_INFO (ivs, REGNO (x));
6124 /* Form expression from giv and add benefit. Ensure this giv
6125 can derive another and subtract any needed adjustment if so. */
6127 /* Increasing the benefit here is risky. The only case in which it
6128 is arguably correct is if this is the only use of V. In other
6129 cases, this will artificially inflate the benefit of the current
6130 giv, and lead to suboptimal code. Thus, it is disabled, since
6131 potentially not reducing an only marginally beneficial giv is
6132 less harmful than reducing many givs that are not really
6135 rtx single_use = VARRAY_RTX (regs->single_usage, REGNO (x));
6136 if (single_use && single_use != const0_rtx)
6137 *benefit += v->benefit;
6143 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode,
6144 v->src_reg, v->mult_val),
6147 if (v->derive_adjustment)
6148 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6149 arg0 = simplify_giv_expr (loop, tem, ext_val, benefit);
6152 if (!v->ext_dependant)
6157 *ext_val = v->ext_dependant;
6165 /* If it isn't an induction variable, and it is invariant, we
6166 may be able to simplify things further by looking through
6167 the bits we just moved outside the loop. */
6168 if (loop_invariant_p (loop, x) == 1)
6171 struct loop_movables *movables = LOOP_MOVABLES (loop);
6173 for (m = movables->head; m; m = m->next)
6174 if (rtx_equal_p (x, m->set_dest))
6176 /* Ok, we found a match. Substitute and simplify. */
6178 /* If we match another movable, we must use that, as
6179 this one is going away. */
6181 return simplify_giv_expr (loop, m->match->set_dest,
6184 /* If consec is non-zero, this is a member of a group of
6185 instructions that were moved together. We handle this
6186 case only to the point of seeking to the last insn and
6187 looking for a REG_EQUAL. Fail if we don't find one. */
6194 tem = NEXT_INSN (tem);
6198 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6200 tem = XEXP (tem, 0);
6204 tem = single_set (m->insn);
6206 tem = SET_SRC (tem);
6211 /* What we are most interested in is pointer
6212 arithmetic on invariants -- only take
6213 patterns we may be able to do something with. */
6214 if (GET_CODE (tem) == PLUS
6215 || GET_CODE (tem) == MULT
6216 || GET_CODE (tem) == ASHIFT
6217 || GET_CODE (tem) == CONST_INT
6218 || GET_CODE (tem) == SYMBOL_REF)
6220 tem = simplify_giv_expr (loop, tem, ext_val,
6225 else if (GET_CODE (tem) == CONST
6226 && GET_CODE (XEXP (tem, 0)) == PLUS
6227 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6228 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6230 tem = simplify_giv_expr (loop, XEXP (tem, 0),
6242 /* Fall through to general case. */
6244 /* If invariant, return as USE (unless CONST_INT).
6245 Otherwise, not giv. */
6246 if (GET_CODE (x) == USE)
6249 if (loop_invariant_p (loop, x) == 1)
6251 if (GET_CODE (x) == CONST_INT)
6253 if (GET_CODE (x) == CONST
6254 && GET_CODE (XEXP (x, 0)) == PLUS
6255 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6256 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6258 return gen_rtx_USE (mode, x);
6265 /* This routine folds invariants such that there is only ever one
6266 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6269 sge_plus_constant (x, c)
6272 if (GET_CODE (x) == CONST_INT)
6273 return GEN_INT (INTVAL (x) + INTVAL (c));
6274 else if (GET_CODE (x) != PLUS)
6275 return gen_rtx_PLUS (GET_MODE (x), x, c);
6276 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6278 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6279 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6281 else if (GET_CODE (XEXP (x, 0)) == PLUS
6282 || GET_CODE (XEXP (x, 1)) != PLUS)
6284 return gen_rtx_PLUS (GET_MODE (x),
6285 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6289 return gen_rtx_PLUS (GET_MODE (x),
6290 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6295 sge_plus (mode, x, y)
6296 enum machine_mode mode;
6299 while (GET_CODE (y) == PLUS)
6301 rtx a = XEXP (y, 0);
6302 if (GET_CODE (a) == CONST_INT)
6303 x = sge_plus_constant (x, a);
6305 x = gen_rtx_PLUS (mode, x, a);
6308 if (GET_CODE (y) == CONST_INT)
6309 x = sge_plus_constant (x, y);
6311 x = gen_rtx_PLUS (mode, x, y);
6315 /* Help detect a giv that is calculated by several consecutive insns;
6319 The caller has already identified the first insn P as having a giv as dest;
6320 we check that all other insns that set the same register follow
6321 immediately after P, that they alter nothing else,
6322 and that the result of the last is still a giv.
6324 The value is 0 if the reg set in P is not really a giv.
6325 Otherwise, the value is the amount gained by eliminating
6326 all the consecutive insns that compute the value.
6328 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6329 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6331 The coefficients of the ultimate giv value are stored in
6332 *MULT_VAL and *ADD_VAL. */
6335 consec_sets_giv (loop, first_benefit, p, src_reg, dest_reg,
6336 add_val, mult_val, ext_val, last_consec_insn)
6337 const struct loop *loop;
6345 rtx *last_consec_insn;
6347 struct loop_ivs *ivs = LOOP_IVS (loop);
6348 struct loop_regs *regs = LOOP_REGS (loop);
6355 /* Indicate that this is a giv so that we can update the value produced in
6356 each insn of the multi-insn sequence.
6358 This induction structure will be used only by the call to
6359 general_induction_var below, so we can allocate it on our stack.
6360 If this is a giv, our caller will replace the induct var entry with
6361 a new induction structure. */
6362 struct induction *v;
6364 if (REG_IV_TYPE (ivs, REGNO (dest_reg)) != UNKNOWN_INDUCT)
6367 v = (struct induction *) alloca (sizeof (struct induction));
6368 v->src_reg = src_reg;
6369 v->mult_val = *mult_val;
6370 v->add_val = *add_val;
6371 v->benefit = first_benefit;
6373 v->derive_adjustment = 0;
6374 v->ext_dependant = NULL_RTX;
6376 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
6377 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
6379 count = VARRAY_INT (regs->n_times_set, REGNO (dest_reg)) - 1;
6384 code = GET_CODE (p);
6386 /* If libcall, skip to end of call sequence. */
6387 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6391 && (set = single_set (p))
6392 && GET_CODE (SET_DEST (set)) == REG
6393 && SET_DEST (set) == dest_reg
6394 && (general_induction_var (loop, SET_SRC (set), &src_reg,
6395 add_val, mult_val, ext_val, 0,
6397 /* Giv created by equivalent expression. */
6398 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6399 && general_induction_var (loop, XEXP (temp, 0), &src_reg,
6400 add_val, mult_val, ext_val, 0,
6401 &benefit, VOIDmode)))
6402 && src_reg == v->src_reg)
6404 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6405 benefit += libcall_benefit (p);
6408 v->mult_val = *mult_val;
6409 v->add_val = *add_val;
6410 v->benefit += benefit;
6412 else if (code != NOTE)
6414 /* Allow insns that set something other than this giv to a
6415 constant. Such insns are needed on machines which cannot
6416 include long constants and should not disqualify a giv. */
6418 && (set = single_set (p))
6419 && SET_DEST (set) != dest_reg
6420 && CONSTANT_P (SET_SRC (set)))
6423 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
6428 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
6429 *last_consec_insn = p;
6433 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6434 represented by G1. If no such expression can be found, or it is clear that
6435 it cannot possibly be a valid address, 0 is returned.
6437 To perform the computation, we note that
6440 where `v' is the biv.
6442 So G2 = (y/b) * G1 + (b - a*y/x).
6444 Note that MULT = y/x.
6446 Update: A and B are now allowed to be additive expressions such that
6447 B contains all variables in A. That is, computing B-A will not require
6448 subtracting variables. */
6451 express_from_1 (a, b, mult)
6454 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6456 if (mult == const0_rtx)
6459 /* If MULT is not 1, we cannot handle A with non-constants, since we
6460 would then be required to subtract multiples of the registers in A.
6461 This is theoretically possible, and may even apply to some Fortran
6462 constructs, but it is a lot of work and we do not attempt it here. */
6464 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
6467 /* In general these structures are sorted top to bottom (down the PLUS
6468 chain), but not left to right across the PLUS. If B is a higher
6469 order giv than A, we can strip one level and recurse. If A is higher
6470 order, we'll eventually bail out, but won't know that until the end.
6471 If they are the same, we'll strip one level around this loop. */
6473 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
6475 rtx ra, rb, oa, ob, tmp;
6477 ra = XEXP (a, 0), oa = XEXP (a, 1);
6478 if (GET_CODE (ra) == PLUS)
6479 tmp = ra, ra = oa, oa = tmp;
6481 rb = XEXP (b, 0), ob = XEXP (b, 1);
6482 if (GET_CODE (rb) == PLUS)
6483 tmp = rb, rb = ob, ob = tmp;
6485 if (rtx_equal_p (ra, rb))
6486 /* We matched: remove one reg completely. */
6488 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
6489 /* An alternate match. */
6491 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
6492 /* An alternate match. */
6496 /* Indicates an extra register in B. Strip one level from B and
6497 recurse, hoping B was the higher order expression. */
6498 ob = express_from_1 (a, ob, mult);
6501 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
6505 /* Here we are at the last level of A, go through the cases hoping to
6506 get rid of everything but a constant. */
6508 if (GET_CODE (a) == PLUS)
6512 ra = XEXP (a, 0), oa = XEXP (a, 1);
6513 if (rtx_equal_p (oa, b))
6515 else if (!rtx_equal_p (ra, b))
6518 if (GET_CODE (oa) != CONST_INT)
6521 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
6523 else if (GET_CODE (a) == CONST_INT)
6525 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
6527 else if (CONSTANT_P (a))
6529 return simplify_gen_binary (MINUS, GET_MODE (b) != VOIDmode ? GET_MODE (b) : GET_MODE (a), const0_rtx, a);
6531 else if (GET_CODE (b) == PLUS)
6533 if (rtx_equal_p (a, XEXP (b, 0)))
6535 else if (rtx_equal_p (a, XEXP (b, 1)))
6540 else if (rtx_equal_p (a, b))
6547 express_from (g1, g2)
6548 struct induction *g1, *g2;
6552 /* The value that G1 will be multiplied by must be a constant integer. Also,
6553 the only chance we have of getting a valid address is if b*c/a (see above
6554 for notation) is also an integer. */
6555 if (GET_CODE (g1->mult_val) == CONST_INT
6556 && GET_CODE (g2->mult_val) == CONST_INT)
6558 if (g1->mult_val == const0_rtx
6559 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
6561 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
6563 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
6567 /* ??? Find out if the one is a multiple of the other? */
6571 add = express_from_1 (g1->add_val, g2->add_val, mult);
6572 if (add == NULL_RTX)
6574 /* Failed. If we've got a multiplication factor between G1 and G2,
6575 scale G1's addend and try again. */
6576 if (INTVAL (mult) > 1)
6578 rtx g1_add_val = g1->add_val;
6579 if (GET_CODE (g1_add_val) == MULT
6580 && GET_CODE (XEXP (g1_add_val, 1)) == CONST_INT)
6583 m = INTVAL (mult) * INTVAL (XEXP (g1_add_val, 1));
6584 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val),
6585 XEXP (g1_add_val, 0), GEN_INT (m));
6589 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val), g1_add_val,
6593 add = express_from_1 (g1_add_val, g2->add_val, const1_rtx);
6596 if (add == NULL_RTX)
6599 /* Form simplified final result. */
6600 if (mult == const0_rtx)
6602 else if (mult == const1_rtx)
6603 mult = g1->dest_reg;
6605 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
6607 if (add == const0_rtx)
6611 if (GET_CODE (add) == PLUS
6612 && CONSTANT_P (XEXP (add, 1)))
6614 rtx tem = XEXP (add, 1);
6615 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
6619 return gen_rtx_PLUS (g2->mode, mult, add);
6623 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6624 represented by G1. This indicates that G2 should be combined with G1 and
6625 that G2 can use (either directly or via an address expression) a register
6626 used to represent G1. */
6629 combine_givs_p (g1, g2)
6630 struct induction *g1, *g2;
6634 /* With the introduction of ext dependant givs, we must care for modes.
6635 G2 must not use a wider mode than G1. */
6636 if (GET_MODE_SIZE (g1->mode) < GET_MODE_SIZE (g2->mode))
6639 ret = comb = express_from (g1, g2);
6640 if (comb == NULL_RTX)
6642 if (g1->mode != g2->mode)
6643 ret = gen_lowpart (g2->mode, comb);
6645 /* If these givs are identical, they can be combined. We use the results
6646 of express_from because the addends are not in a canonical form, so
6647 rtx_equal_p is a weaker test. */
6648 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
6649 combination to be the other way round. */
6650 if (comb == g1->dest_reg
6651 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
6656 /* If G2 can be expressed as a function of G1 and that function is valid
6657 as an address and no more expensive than using a register for G2,
6658 the expression of G2 in terms of G1 can be used. */
6660 && g2->giv_type == DEST_ADDR
6661 && memory_address_p (g2->mem_mode, ret)
6662 /* ??? Looses, especially with -fforce-addr, where *g2->location
6663 will always be a register, and so anything more complicated
6667 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
6669 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
6680 /* Check each extension dependant giv in this class to see if its
6681 root biv is safe from wrapping in the interior mode, which would
6682 make the giv illegal. */
6685 check_ext_dependant_givs (bl, loop_info)
6686 struct iv_class *bl;
6687 struct loop_info *loop_info;
6689 int ze_ok = 0, se_ok = 0, info_ok = 0;
6690 enum machine_mode biv_mode = GET_MODE (bl->biv->src_reg);
6691 HOST_WIDE_INT start_val;
6692 unsigned HOST_WIDE_INT u_end_val, u_start_val;
6694 struct induction *v;
6696 /* Make sure the iteration data is available. We must have
6697 constants in order to be certain of no overflow. */
6698 /* ??? An unknown iteration count with an increment of +-1
6699 combined with friendly exit tests of against an invariant
6700 value is also ameanable to optimization. Not implemented. */
6701 if (loop_info->n_iterations > 0
6702 && bl->initial_value
6703 && GET_CODE (bl->initial_value) == CONST_INT
6704 && (incr = biv_total_increment (bl))
6705 && GET_CODE (incr) == CONST_INT
6706 /* Make sure the host can represent the arithmetic. */
6707 && HOST_BITS_PER_WIDE_INT >= GET_MODE_BITSIZE (biv_mode))
6709 unsigned HOST_WIDE_INT abs_incr, total_incr;
6710 HOST_WIDE_INT s_end_val;
6714 start_val = INTVAL (bl->initial_value);
6715 u_start_val = start_val;
6717 neg_incr = 0, abs_incr = INTVAL (incr);
6718 if (INTVAL (incr) < 0)
6719 neg_incr = 1, abs_incr = -abs_incr;
6720 total_incr = abs_incr * loop_info->n_iterations;
6722 /* Check for host arithmatic overflow. */
6723 if (total_incr / loop_info->n_iterations == abs_incr)
6725 unsigned HOST_WIDE_INT u_max;
6726 HOST_WIDE_INT s_max;
6728 u_end_val = start_val + (neg_incr ? -total_incr : total_incr);
6729 s_end_val = u_end_val;
6730 u_max = GET_MODE_MASK (biv_mode);
6733 /* Check zero extension of biv ok. */
6735 /* Check for host arithmatic overflow. */
6737 ? u_end_val < u_start_val
6738 : u_end_val > u_start_val)
6739 /* Check for target arithmetic overflow. */
6741 ? 1 /* taken care of with host overflow */
6742 : u_end_val <= u_max))
6747 /* Check sign extension of biv ok. */
6748 /* ??? While it is true that overflow with signed and pointer
6749 arithmetic is undefined, I fear too many programmers don't
6750 keep this fact in mind -- myself included on occasion.
6751 So leave alone with the signed overflow optimizations. */
6752 if (start_val >= -s_max - 1
6753 /* Check for host arithmatic overflow. */
6755 ? s_end_val < start_val
6756 : s_end_val > start_val)
6757 /* Check for target arithmetic overflow. */
6759 ? s_end_val >= -s_max - 1
6760 : s_end_val <= s_max))
6767 /* Invalidate givs that fail the tests. */
6768 for (v = bl->giv; v; v = v->next_iv)
6769 if (v->ext_dependant)
6771 enum rtx_code code = GET_CODE (v->ext_dependant);
6784 /* We don't know whether this value is being used as either
6785 signed or unsigned, so to safely truncate we must satisfy
6786 both. The initial check here verifies the BIV itself;
6787 once that is successful we may check its range wrt the
6791 enum machine_mode outer_mode = GET_MODE (v->ext_dependant);
6792 unsigned HOST_WIDE_INT max = GET_MODE_MASK (outer_mode) >> 1;
6794 /* We know from the above that both endpoints are nonnegative,
6795 and that there is no wrapping. Verify that both endpoints
6796 are within the (signed) range of the outer mode. */
6797 if (u_start_val <= max && u_end_val <= max)
6808 if (loop_dump_stream)
6810 fprintf (loop_dump_stream,
6811 "Verified ext dependant giv at %d of reg %d\n",
6812 INSN_UID (v->insn), bl->regno);
6817 if (loop_dump_stream)
6822 why = "biv iteration values overflowed";
6826 incr = biv_total_increment (bl);
6827 if (incr == const1_rtx)
6828 why = "biv iteration info incomplete; incr by 1";
6830 why = "biv iteration info incomplete";
6833 fprintf (loop_dump_stream,
6834 "Failed ext dependant giv at %d, %s\n",
6835 INSN_UID (v->insn), why);
6842 /* Generate a version of VALUE in a mode appropriate for initializing V. */
6845 extend_value_for_giv (v, value)
6846 struct induction *v;
6849 rtx ext_dep = v->ext_dependant;
6854 /* Recall that check_ext_dependant_givs verified that the known bounds
6855 of a biv did not overflow or wrap with respect to the extension for
6856 the giv. Therefore, constants need no additional adjustment. */
6857 if (CONSTANT_P (value) && GET_MODE (value) == VOIDmode)
6860 /* Otherwise, we must adjust the value to compensate for the
6861 differing modes of the biv and the giv. */
6862 return gen_rtx_fmt_e (GET_CODE (ext_dep), GET_MODE (ext_dep), value);
6865 struct combine_givs_stats
6872 cmp_combine_givs_stats (xp, yp)
6876 const struct combine_givs_stats * const x =
6877 (const struct combine_givs_stats *) xp;
6878 const struct combine_givs_stats * const y =
6879 (const struct combine_givs_stats *) yp;
6881 d = y->total_benefit - x->total_benefit;
6882 /* Stabilize the sort. */
6884 d = x->giv_number - y->giv_number;
6888 /* Check all pairs of givs for iv_class BL and see if any can be combined with
6889 any other. If so, point SAME to the giv combined with and set NEW_REG to
6890 be an expression (in terms of the other giv's DEST_REG) equivalent to the
6891 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
6894 combine_givs (regs, bl)
6895 struct loop_regs *regs;
6896 struct iv_class *bl;
6898 /* Additional benefit to add for being combined multiple times. */
6899 const int extra_benefit = 3;
6901 struct induction *g1, *g2, **giv_array;
6902 int i, j, k, giv_count;
6903 struct combine_givs_stats *stats;
6906 /* Count givs, because bl->giv_count is incorrect here. */
6908 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6913 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
6915 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6917 giv_array[i++] = g1;
6919 stats = (struct combine_givs_stats *) xcalloc (giv_count, sizeof (*stats));
6920 can_combine = (rtx *) xcalloc (giv_count, giv_count * sizeof (rtx));
6922 for (i = 0; i < giv_count; i++)
6928 stats[i].giv_number = i;
6930 /* If a DEST_REG GIV is used only once, do not allow it to combine
6931 with anything, for in doing so we will gain nothing that cannot
6932 be had by simply letting the GIV with which we would have combined
6933 to be reduced on its own. The losage shows up in particular with
6934 DEST_ADDR targets on hosts with reg+reg addressing, though it can
6935 be seen elsewhere as well. */
6936 if (g1->giv_type == DEST_REG
6937 && (single_use = VARRAY_RTX (regs->single_usage,
6938 REGNO (g1->dest_reg)))
6939 && single_use != const0_rtx)
6942 this_benefit = g1->benefit;
6943 /* Add an additional weight for zero addends. */
6944 if (g1->no_const_addval)
6947 for (j = 0; j < giv_count; j++)
6953 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
6955 can_combine[i * giv_count + j] = this_combine;
6956 this_benefit += g2->benefit + extra_benefit;
6959 stats[i].total_benefit = this_benefit;
6962 /* Iterate, combining until we can't. */
6964 qsort (stats, giv_count, sizeof (*stats), cmp_combine_givs_stats);
6966 if (loop_dump_stream)
6968 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
6969 for (k = 0; k < giv_count; k++)
6971 g1 = giv_array[stats[k].giv_number];
6972 if (!g1->combined_with && !g1->same)
6973 fprintf (loop_dump_stream, " {%d, %d}",
6974 INSN_UID (giv_array[stats[k].giv_number]->insn),
6975 stats[k].total_benefit);
6977 putc ('\n', loop_dump_stream);
6980 for (k = 0; k < giv_count; k++)
6982 int g1_add_benefit = 0;
6984 i = stats[k].giv_number;
6987 /* If it has already been combined, skip. */
6988 if (g1->combined_with || g1->same)
6991 for (j = 0; j < giv_count; j++)
6994 if (g1 != g2 && can_combine[i * giv_count + j]
6995 /* If it has already been combined, skip. */
6996 && ! g2->same && ! g2->combined_with)
7000 g2->new_reg = can_combine[i * giv_count + j];
7002 g1->combined_with++;
7003 g1->lifetime += g2->lifetime;
7005 g1_add_benefit += g2->benefit;
7007 /* ??? The new final_[bg]iv_value code does a much better job
7008 of finding replaceable giv's, and hence this code may no
7009 longer be necessary. */
7010 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
7011 g1_add_benefit -= copy_cost;
7013 /* To help optimize the next set of combinations, remove
7014 this giv from the benefits of other potential mates. */
7015 for (l = 0; l < giv_count; ++l)
7017 int m = stats[l].giv_number;
7018 if (can_combine[m * giv_count + j])
7019 stats[l].total_benefit -= g2->benefit + extra_benefit;
7022 if (loop_dump_stream)
7023 fprintf (loop_dump_stream,
7024 "giv at %d combined with giv at %d; new benefit %d + %d, lifetime %d\n",
7025 INSN_UID (g2->insn), INSN_UID (g1->insn),
7026 g1->benefit, g1_add_benefit, g1->lifetime);
7030 /* To help optimize the next set of combinations, remove
7031 this giv from the benefits of other potential mates. */
7032 if (g1->combined_with)
7034 for (j = 0; j < giv_count; ++j)
7036 int m = stats[j].giv_number;
7037 if (can_combine[m * giv_count + i])
7038 stats[j].total_benefit -= g1->benefit + extra_benefit;
7041 g1->benefit += g1_add_benefit;
7043 /* We've finished with this giv, and everything it touched.
7044 Restart the combination so that proper weights for the
7045 rest of the givs are properly taken into account. */
7046 /* ??? Ideally we would compact the arrays at this point, so
7047 as to not cover old ground. But sanely compacting
7048 can_combine is tricky. */
7058 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
7061 emit_iv_add_mult (b, m, a, reg, insert_before)
7062 rtx b; /* initial value of basic induction variable */
7063 rtx m; /* multiplicative constant */
7064 rtx a; /* additive constant */
7065 rtx reg; /* destination register */
7071 /* Prevent unexpected sharing of these rtx. */
7075 /* Increase the lifetime of any invariants moved further in code. */
7076 update_reg_last_use (a, insert_before);
7077 update_reg_last_use (b, insert_before);
7078 update_reg_last_use (m, insert_before);
7081 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
7083 emit_move_insn (reg, result);
7084 seq = gen_sequence ();
7087 emit_insn_before (seq, insert_before);
7089 /* It is entirely possible that the expansion created lots of new
7090 registers. Iterate over the sequence we just created and
7093 if (GET_CODE (seq) == SEQUENCE)
7096 for (i = 0; i < XVECLEN (seq, 0); ++i)
7098 rtx set = single_set (XVECEXP (seq, 0, i));
7099 if (set && GET_CODE (SET_DEST (set)) == REG)
7100 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7103 else if (GET_CODE (seq) == SET
7104 && GET_CODE (SET_DEST (seq)) == REG)
7105 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
7108 /* Similar to emit_iv_add_mult, but compute cost rather than emitting
7111 iv_add_mult_cost (b, m, a, reg)
7112 rtx b; /* initial value of basic induction variable */
7113 rtx m; /* multiplicative constant */
7114 rtx a; /* additive constant */
7115 rtx reg; /* destination register */
7121 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
7123 emit_move_insn (reg, result);
7124 last = get_last_insn ();
7127 rtx t = single_set (last);
7129 cost += rtx_cost (SET_SRC (t), SET);
7130 last = PREV_INSN (last);
7136 /* Test whether A * B can be computed without
7137 an actual multiply insn. Value is 1 if so. */
7140 product_cheap_p (a, b)
7148 /* If only one is constant, make it B. */
7149 if (GET_CODE (a) == CONST_INT)
7150 tmp = a, a = b, b = tmp;
7152 /* If first constant, both constant, so don't need multiply. */
7153 if (GET_CODE (a) == CONST_INT)
7156 /* If second not constant, neither is constant, so would need multiply. */
7157 if (GET_CODE (b) != CONST_INT)
7160 /* One operand is constant, so might not need multiply insn. Generate the
7161 code for the multiply and see if a call or multiply, or long sequence
7162 of insns is generated. */
7165 expand_mult (GET_MODE (a), a, b, NULL_RTX, 1);
7166 tmp = gen_sequence ();
7169 if (GET_CODE (tmp) == SEQUENCE)
7171 if (XVEC (tmp, 0) == 0)
7173 else if (XVECLEN (tmp, 0) > 3)
7176 for (i = 0; i < XVECLEN (tmp, 0); i++)
7178 rtx insn = XVECEXP (tmp, 0, i);
7180 if (GET_CODE (insn) != INSN
7181 || (GET_CODE (PATTERN (insn)) == SET
7182 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7183 || (GET_CODE (PATTERN (insn)) == PARALLEL
7184 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7185 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7192 else if (GET_CODE (tmp) == SET
7193 && GET_CODE (SET_SRC (tmp)) == MULT)
7195 else if (GET_CODE (tmp) == PARALLEL
7196 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7197 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7203 /* Check to see if loop can be terminated by a "decrement and branch until
7204 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7205 Also try reversing an increment loop to a decrement loop
7206 to see if the optimization can be performed.
7207 Value is nonzero if optimization was performed. */
7209 /* This is useful even if the architecture doesn't have such an insn,
7210 because it might change a loops which increments from 0 to n to a loop
7211 which decrements from n to 0. A loop that decrements to zero is usually
7212 faster than one that increments from zero. */
7214 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7215 such as approx_final_value, biv_total_increment, loop_iterations, and
7216 final_[bg]iv_value. */
7219 check_dbra_loop (loop, insn_count)
7223 struct loop_info *loop_info = LOOP_INFO (loop);
7224 struct loop_regs *regs = LOOP_REGS (loop);
7225 struct loop_ivs *ivs = LOOP_IVS (loop);
7226 struct iv_class *bl;
7233 rtx before_comparison;
7237 int compare_and_branch;
7238 rtx loop_start = loop->start;
7239 rtx loop_end = loop->end;
7241 /* If last insn is a conditional branch, and the insn before tests a
7242 register value, try to optimize it. Otherwise, we can't do anything. */
7244 jump = PREV_INSN (loop_end);
7245 comparison = get_condition_for_loop (loop, jump);
7246 if (comparison == 0)
7248 if (!onlyjump_p (jump))
7251 /* Try to compute whether the compare/branch at the loop end is one or
7252 two instructions. */
7253 get_condition (jump, &first_compare);
7254 if (first_compare == jump)
7255 compare_and_branch = 1;
7256 else if (first_compare == prev_nonnote_insn (jump))
7257 compare_and_branch = 2;
7262 /* If more than one condition is present to control the loop, then
7263 do not proceed, as this function does not know how to rewrite
7264 loop tests with more than one condition.
7266 Look backwards from the first insn in the last comparison
7267 sequence and see if we've got another comparison sequence. */
7270 if ((jump1 = prev_nonnote_insn (first_compare)) != loop->cont)
7271 if (GET_CODE (jump1) == JUMP_INSN)
7275 /* Check all of the bivs to see if the compare uses one of them.
7276 Skip biv's set more than once because we can't guarantee that
7277 it will be zero on the last iteration. Also skip if the biv is
7278 used between its update and the test insn. */
7280 for (bl = ivs->list; bl; bl = bl->next)
7282 if (bl->biv_count == 1
7283 && ! bl->biv->maybe_multiple
7284 && bl->biv->dest_reg == XEXP (comparison, 0)
7285 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
7293 /* Look for the case where the basic induction variable is always
7294 nonnegative, and equals zero on the last iteration.
7295 In this case, add a reg_note REG_NONNEG, which allows the
7296 m68k DBRA instruction to be used. */
7298 if (((GET_CODE (comparison) == GT
7299 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
7300 && INTVAL (XEXP (comparison, 1)) == -1)
7301 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
7302 && GET_CODE (bl->biv->add_val) == CONST_INT
7303 && INTVAL (bl->biv->add_val) < 0)
7305 /* Initial value must be greater than 0,
7306 init_val % -dec_value == 0 to ensure that it equals zero on
7307 the last iteration */
7309 if (GET_CODE (bl->initial_value) == CONST_INT
7310 && INTVAL (bl->initial_value) > 0
7311 && (INTVAL (bl->initial_value)
7312 % (-INTVAL (bl->biv->add_val))) == 0)
7314 /* register always nonnegative, add REG_NOTE to branch */
7315 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
7317 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
7324 /* If the decrement is 1 and the value was tested as >= 0 before
7325 the loop, then we can safely optimize. */
7326 for (p = loop_start; p; p = PREV_INSN (p))
7328 if (GET_CODE (p) == CODE_LABEL)
7330 if (GET_CODE (p) != JUMP_INSN)
7333 before_comparison = get_condition_for_loop (loop, p);
7334 if (before_comparison
7335 && XEXP (before_comparison, 0) == bl->biv->dest_reg
7336 && GET_CODE (before_comparison) == LT
7337 && XEXP (before_comparison, 1) == const0_rtx
7338 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
7339 && INTVAL (bl->biv->add_val) == -1)
7341 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
7343 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
7351 else if (GET_CODE (bl->biv->add_val) == CONST_INT
7352 && INTVAL (bl->biv->add_val) > 0)
7354 /* Try to change inc to dec, so can apply above optimization. */
7356 all registers modified are induction variables or invariant,
7357 all memory references have non-overlapping addresses
7358 (obviously true if only one write)
7359 allow 2 insns for the compare/jump at the end of the loop. */
7360 /* Also, we must avoid any instructions which use both the reversed
7361 biv and another biv. Such instructions will fail if the loop is
7362 reversed. We meet this condition by requiring that either
7363 no_use_except_counting is true, or else that there is only
7365 int num_nonfixed_reads = 0;
7366 /* 1 if the iteration var is used only to count iterations. */
7367 int no_use_except_counting = 0;
7368 /* 1 if the loop has no memory store, or it has a single memory store
7369 which is reversible. */
7370 int reversible_mem_store = 1;
7372 if (bl->giv_count == 0 && ! loop->exit_count)
7374 rtx bivreg = regno_reg_rtx[bl->regno];
7376 /* If there are no givs for this biv, and the only exit is the
7377 fall through at the end of the loop, then
7378 see if perhaps there are no uses except to count. */
7379 no_use_except_counting = 1;
7380 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7383 rtx set = single_set (p);
7385 if (set && GET_CODE (SET_DEST (set)) == REG
7386 && REGNO (SET_DEST (set)) == bl->regno)
7387 /* An insn that sets the biv is okay. */
7389 else if ((p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
7390 || p == prev_nonnote_insn (loop_end))
7391 && reg_mentioned_p (bivreg, PATTERN (p)))
7393 /* If either of these insns uses the biv and sets a pseudo
7394 that has more than one usage, then the biv has uses
7395 other than counting since it's used to derive a value
7396 that is used more than one time. */
7397 note_stores (PATTERN (p), note_set_pseudo_multiple_uses,
7399 if (regs->multiple_uses)
7401 no_use_except_counting = 0;
7405 else if (reg_mentioned_p (bivreg, PATTERN (p)))
7407 no_use_except_counting = 0;
7413 if (no_use_except_counting)
7414 /* No need to worry about MEMs. */
7416 else if (loop_info->num_mem_sets <= 1)
7418 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7420 num_nonfixed_reads += count_nonfixed_reads (loop, PATTERN (p));
7422 /* If the loop has a single store, and the destination address is
7423 invariant, then we can't reverse the loop, because this address
7424 might then have the wrong value at loop exit.
7425 This would work if the source was invariant also, however, in that
7426 case, the insn should have been moved out of the loop. */
7428 if (loop_info->num_mem_sets == 1)
7430 struct induction *v;
7432 reversible_mem_store
7433 = (! loop_info->unknown_address_altered
7434 && ! loop_info->unknown_constant_address_altered
7435 && ! loop_invariant_p (loop,
7436 XEXP (XEXP (loop_info->store_mems, 0),
7439 /* If the store depends on a register that is set after the
7440 store, it depends on the initial value, and is thus not
7442 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
7444 if (v->giv_type == DEST_REG
7445 && reg_mentioned_p (v->dest_reg,
7446 PATTERN (loop_info->first_loop_store_insn))
7447 && loop_insn_first_p (loop_info->first_loop_store_insn,
7449 reversible_mem_store = 0;
7456 /* This code only acts for innermost loops. Also it simplifies
7457 the memory address check by only reversing loops with
7458 zero or one memory access.
7459 Two memory accesses could involve parts of the same array,
7460 and that can't be reversed.
7461 If the biv is used only for counting, than we don't need to worry
7462 about all these things. */
7464 if ((num_nonfixed_reads <= 1
7465 && ! loop_info->has_call
7466 && ! loop_info->has_volatile
7467 && reversible_mem_store
7468 && (bl->giv_count + bl->biv_count + loop_info->num_mem_sets
7469 + LOOP_MOVABLES (loop)->num + compare_and_branch == insn_count)
7470 && (bl == ivs->list && bl->next == 0))
7471 || no_use_except_counting)
7475 /* Loop can be reversed. */
7476 if (loop_dump_stream)
7477 fprintf (loop_dump_stream, "Can reverse loop\n");
7479 /* Now check other conditions:
7481 The increment must be a constant, as must the initial value,
7482 and the comparison code must be LT.
7484 This test can probably be improved since +/- 1 in the constant
7485 can be obtained by changing LT to LE and vice versa; this is
7489 /* for constants, LE gets turned into LT */
7490 && (GET_CODE (comparison) == LT
7491 || (GET_CODE (comparison) == LE
7492 && no_use_except_counting)))
7494 HOST_WIDE_INT add_val, add_adjust, comparison_val = 0;
7495 rtx initial_value, comparison_value;
7497 enum rtx_code cmp_code;
7498 int comparison_const_width;
7499 unsigned HOST_WIDE_INT comparison_sign_mask;
7501 add_val = INTVAL (bl->biv->add_val);
7502 comparison_value = XEXP (comparison, 1);
7503 if (GET_MODE (comparison_value) == VOIDmode)
7504 comparison_const_width
7505 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
7507 comparison_const_width
7508 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
7509 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
7510 comparison_const_width = HOST_BITS_PER_WIDE_INT;
7511 comparison_sign_mask
7512 = (unsigned HOST_WIDE_INT) 1 << (comparison_const_width - 1);
7514 /* If the comparison value is not a loop invariant, then we
7515 can not reverse this loop.
7517 ??? If the insns which initialize the comparison value as
7518 a whole compute an invariant result, then we could move
7519 them out of the loop and proceed with loop reversal. */
7520 if (! loop_invariant_p (loop, comparison_value))
7523 if (GET_CODE (comparison_value) == CONST_INT)
7524 comparison_val = INTVAL (comparison_value);
7525 initial_value = bl->initial_value;
7527 /* Normalize the initial value if it is an integer and
7528 has no other use except as a counter. This will allow
7529 a few more loops to be reversed. */
7530 if (no_use_except_counting
7531 && GET_CODE (comparison_value) == CONST_INT
7532 && GET_CODE (initial_value) == CONST_INT)
7534 comparison_val = comparison_val - INTVAL (bl->initial_value);
7535 /* The code below requires comparison_val to be a multiple
7536 of add_val in order to do the loop reversal, so
7537 round up comparison_val to a multiple of add_val.
7538 Since comparison_value is constant, we know that the
7539 current comparison code is LT. */
7540 comparison_val = comparison_val + add_val - 1;
7542 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
7543 /* We postpone overflow checks for COMPARISON_VAL here;
7544 even if there is an overflow, we might still be able to
7545 reverse the loop, if converting the loop exit test to
7547 initial_value = const0_rtx;
7550 /* First check if we can do a vanilla loop reversal. */
7551 if (initial_value == const0_rtx
7552 /* If we have a decrement_and_branch_on_count,
7553 prefer the NE test, since this will allow that
7554 instruction to be generated. Note that we must
7555 use a vanilla loop reversal if the biv is used to
7556 calculate a giv or has a non-counting use. */
7557 #if ! defined (HAVE_decrement_and_branch_until_zero) \
7558 && defined (HAVE_decrement_and_branch_on_count)
7559 && (! (add_val == 1 && loop->vtop
7560 && (bl->biv_count == 0
7561 || no_use_except_counting)))
7563 && GET_CODE (comparison_value) == CONST_INT
7564 /* Now do postponed overflow checks on COMPARISON_VAL. */
7565 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
7566 & comparison_sign_mask))
7568 /* Register will always be nonnegative, with value
7569 0 on last iteration */
7570 add_adjust = add_val;
7574 else if (add_val == 1 && loop->vtop
7575 && (bl->biv_count == 0
7576 || no_use_except_counting))
7584 if (GET_CODE (comparison) == LE)
7585 add_adjust -= add_val;
7587 /* If the initial value is not zero, or if the comparison
7588 value is not an exact multiple of the increment, then we
7589 can not reverse this loop. */
7590 if (initial_value == const0_rtx
7591 && GET_CODE (comparison_value) == CONST_INT)
7593 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
7598 if (! no_use_except_counting || add_val != 1)
7602 final_value = comparison_value;
7604 /* Reset these in case we normalized the initial value
7605 and comparison value above. */
7606 if (GET_CODE (comparison_value) == CONST_INT
7607 && GET_CODE (initial_value) == CONST_INT)
7609 comparison_value = GEN_INT (comparison_val);
7611 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
7613 bl->initial_value = initial_value;
7615 /* Save some info needed to produce the new insns. */
7616 reg = bl->biv->dest_reg;
7617 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
7618 if (jump_label == pc_rtx)
7619 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
7620 new_add_val = GEN_INT (-INTVAL (bl->biv->add_val));
7622 /* Set start_value; if this is not a CONST_INT, we need
7624 Initialize biv to start_value before loop start.
7625 The old initializing insn will be deleted as a
7626 dead store by flow.c. */
7627 if (initial_value == const0_rtx
7628 && GET_CODE (comparison_value) == CONST_INT)
7630 start_value = GEN_INT (comparison_val - add_adjust);
7631 emit_insn_before (gen_move_insn (reg, start_value),
7634 else if (GET_CODE (initial_value) == CONST_INT)
7636 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
7637 enum machine_mode mode = GET_MODE (reg);
7638 enum insn_code icode
7639 = add_optab->handlers[(int) mode].insn_code;
7641 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
7642 || ! ((*insn_data[icode].operand[1].predicate)
7643 (comparison_value, mode))
7644 || ! ((*insn_data[icode].operand[2].predicate)
7648 = gen_rtx_PLUS (mode, comparison_value, offset);
7649 emit_insn_before ((GEN_FCN (icode)
7650 (reg, comparison_value, offset)),
7652 if (GET_CODE (comparison) == LE)
7653 final_value = gen_rtx_PLUS (mode, comparison_value,
7656 else if (! add_adjust)
7658 enum machine_mode mode = GET_MODE (reg);
7659 enum insn_code icode
7660 = sub_optab->handlers[(int) mode].insn_code;
7661 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
7662 || ! ((*insn_data[icode].operand[1].predicate)
7663 (comparison_value, mode))
7664 || ! ((*insn_data[icode].operand[2].predicate)
7665 (initial_value, mode)))
7668 = gen_rtx_MINUS (mode, comparison_value, initial_value);
7669 emit_insn_before ((GEN_FCN (icode)
7670 (reg, comparison_value, initial_value)),
7674 /* We could handle the other cases too, but it'll be
7675 better to have a testcase first. */
7678 /* We may not have a single insn which can increment a reg, so
7679 create a sequence to hold all the insns from expand_inc. */
7681 expand_inc (reg, new_add_val);
7682 tem = gen_sequence ();
7685 p = emit_insn_before (tem, bl->biv->insn);
7686 delete_insn (bl->biv->insn);
7688 /* Update biv info to reflect its new status. */
7690 bl->initial_value = start_value;
7691 bl->biv->add_val = new_add_val;
7693 /* Update loop info. */
7694 loop_info->initial_value = reg;
7695 loop_info->initial_equiv_value = reg;
7696 loop_info->final_value = const0_rtx;
7697 loop_info->final_equiv_value = const0_rtx;
7698 loop_info->comparison_value = const0_rtx;
7699 loop_info->comparison_code = cmp_code;
7700 loop_info->increment = new_add_val;
7702 /* Inc LABEL_NUSES so that delete_insn will
7703 not delete the label. */
7704 LABEL_NUSES (XEXP (jump_label, 0))++;
7706 /* Emit an insn after the end of the loop to set the biv's
7707 proper exit value if it is used anywhere outside the loop. */
7708 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
7710 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
7711 emit_insn_after (gen_move_insn (reg, final_value),
7714 /* Delete compare/branch at end of loop. */
7715 delete_insn (PREV_INSN (loop_end));
7716 if (compare_and_branch == 2)
7717 delete_insn (first_compare);
7719 /* Add new compare/branch insn at end of loop. */
7721 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
7722 GET_MODE (reg), 0, 0,
7723 XEXP (jump_label, 0));
7724 tem = gen_sequence ();
7726 emit_jump_insn_before (tem, loop_end);
7728 for (tem = PREV_INSN (loop_end);
7729 tem && GET_CODE (tem) != JUMP_INSN;
7730 tem = PREV_INSN (tem))
7734 JUMP_LABEL (tem) = XEXP (jump_label, 0);
7740 /* Increment of LABEL_NUSES done above. */
7741 /* Register is now always nonnegative,
7742 so add REG_NONNEG note to the branch. */
7743 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, reg,
7749 /* No insn may reference both the reversed and another biv or it
7750 will fail (see comment near the top of the loop reversal
7752 Earlier on, we have verified that the biv has no use except
7753 counting, or it is the only biv in this function.
7754 However, the code that computes no_use_except_counting does
7755 not verify reg notes. It's possible to have an insn that
7756 references another biv, and has a REG_EQUAL note with an
7757 expression based on the reversed biv. To avoid this case,
7758 remove all REG_EQUAL notes based on the reversed biv
7760 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7764 rtx set = single_set (p);
7765 /* If this is a set of a GIV based on the reversed biv, any
7766 REG_EQUAL notes should still be correct. */
7768 || GET_CODE (SET_DEST (set)) != REG
7769 || (size_t) REGNO (SET_DEST (set)) >= ivs->n_regs
7770 || REG_IV_TYPE (ivs, REGNO (SET_DEST (set))) != GENERAL_INDUCT
7771 || REG_IV_INFO (ivs, REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
7772 for (pnote = ®_NOTES (p); *pnote;)
7774 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
7775 && reg_mentioned_p (regno_reg_rtx[bl->regno],
7777 *pnote = XEXP (*pnote, 1);
7779 pnote = &XEXP (*pnote, 1);
7783 /* Mark that this biv has been reversed. Each giv which depends
7784 on this biv, and which is also live past the end of the loop
7785 will have to be fixed up. */
7789 if (loop_dump_stream)
7791 fprintf (loop_dump_stream, "Reversed loop");
7793 fprintf (loop_dump_stream, " and added reg_nonneg\n");
7795 fprintf (loop_dump_stream, "\n");
7806 /* Verify whether the biv BL appears to be eliminable,
7807 based on the insns in the loop that refer to it.
7809 If ELIMINATE_P is non-zero, actually do the elimination.
7811 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
7812 determine whether invariant insns should be placed inside or at the
7813 start of the loop. */
7816 maybe_eliminate_biv (loop, bl, eliminate_p, threshold, insn_count)
7817 const struct loop *loop;
7818 struct iv_class *bl;
7820 int threshold, insn_count;
7822 struct loop_ivs *ivs = LOOP_IVS (loop);
7823 rtx reg = bl->biv->dest_reg;
7824 rtx loop_start = loop->start;
7825 rtx loop_end = loop->end;
7828 /* Scan all insns in the loop, stopping if we find one that uses the
7829 biv in a way that we cannot eliminate. */
7831 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7833 enum rtx_code code = GET_CODE (p);
7834 rtx where = threshold >= insn_count ? loop_start : p;
7836 /* If this is a libcall that sets a giv, skip ahead to its end. */
7837 if (GET_RTX_CLASS (code) == 'i')
7839 rtx note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
7843 rtx last = XEXP (note, 0);
7844 rtx set = single_set (last);
7846 if (set && GET_CODE (SET_DEST (set)) == REG)
7848 unsigned int regno = REGNO (SET_DEST (set));
7850 if (regno < ivs->n_regs
7851 && REG_IV_TYPE (ivs, regno) == GENERAL_INDUCT
7852 && REG_IV_INFO (ivs, regno)->src_reg == bl->biv->src_reg)
7857 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
7858 && reg_mentioned_p (reg, PATTERN (p))
7859 && ! maybe_eliminate_biv_1 (loop, PATTERN (p), p, bl,
7860 eliminate_p, where))
7862 if (loop_dump_stream)
7863 fprintf (loop_dump_stream,
7864 "Cannot eliminate biv %d: biv used in insn %d.\n",
7865 bl->regno, INSN_UID (p));
7872 if (loop_dump_stream)
7873 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
7874 bl->regno, eliminate_p ? "was" : "can be");
7881 /* INSN and REFERENCE are instructions in the same insn chain.
7882 Return non-zero if INSN is first. */
7885 loop_insn_first_p (insn, reference)
7886 rtx insn, reference;
7890 for (p = insn, q = reference;;)
7892 /* Start with test for not first so that INSN == REFERENCE yields not
7894 if (q == insn || ! p)
7896 if (p == reference || ! q)
7899 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
7900 previous insn, hence the <= comparison below does not work if
7902 if (INSN_UID (p) < max_uid_for_loop
7903 && INSN_UID (q) < max_uid_for_loop
7904 && GET_CODE (p) != NOTE)
7905 return INSN_LUID (p) <= INSN_LUID (q);
7907 if (INSN_UID (p) >= max_uid_for_loop
7908 || GET_CODE (p) == NOTE)
7910 if (INSN_UID (q) >= max_uid_for_loop)
7915 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
7916 the offset that we have to take into account due to auto-increment /
7917 div derivation is zero. */
7919 biv_elimination_giv_has_0_offset (biv, giv, insn)
7920 struct induction *biv, *giv;
7923 /* If the giv V had the auto-inc address optimization applied
7924 to it, and INSN occurs between the giv insn and the biv
7925 insn, then we'd have to adjust the value used here.
7926 This is rare, so we don't bother to make this possible. */
7927 if (giv->auto_inc_opt
7928 && ((loop_insn_first_p (giv->insn, insn)
7929 && loop_insn_first_p (insn, biv->insn))
7930 || (loop_insn_first_p (biv->insn, insn)
7931 && loop_insn_first_p (insn, giv->insn))))
7937 /* If BL appears in X (part of the pattern of INSN), see if we can
7938 eliminate its use. If so, return 1. If not, return 0.
7940 If BIV does not appear in X, return 1.
7942 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
7943 where extra insns should be added. Depending on how many items have been
7944 moved out of the loop, it will either be before INSN or at the start of
7948 maybe_eliminate_biv_1 (loop, x, insn, bl, eliminate_p, where)
7949 const struct loop *loop;
7951 struct iv_class *bl;
7955 enum rtx_code code = GET_CODE (x);
7956 rtx reg = bl->biv->dest_reg;
7957 enum machine_mode mode = GET_MODE (reg);
7958 struct induction *v;
7970 /* If we haven't already been able to do something with this BIV,
7971 we can't eliminate it. */
7977 /* If this sets the BIV, it is not a problem. */
7978 if (SET_DEST (x) == reg)
7981 /* If this is an insn that defines a giv, it is also ok because
7982 it will go away when the giv is reduced. */
7983 for (v = bl->giv; v; v = v->next_iv)
7984 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
7988 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
7990 /* Can replace with any giv that was reduced and
7991 that has (MULT_VAL != 0) and (ADD_VAL == 0).
7992 Require a constant for MULT_VAL, so we know it's nonzero.
7993 ??? We disable this optimization to avoid potential
7996 for (v = bl->giv; v; v = v->next_iv)
7997 if (GET_CODE (v->mult_val) == CONST_INT && v->mult_val != const0_rtx
7998 && v->add_val == const0_rtx
7999 && ! v->ignore && ! v->maybe_dead && v->always_computable
8003 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8009 /* If the giv has the opposite direction of change,
8010 then reverse the comparison. */
8011 if (INTVAL (v->mult_val) < 0)
8012 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8013 const0_rtx, v->new_reg);
8017 /* We can probably test that giv's reduced reg. */
8018 if (validate_change (insn, &SET_SRC (x), new, 0))
8022 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8023 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8024 Require a constant for MULT_VAL, so we know it's nonzero.
8025 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8026 overflow problem. */
8028 for (v = bl->giv; v; v = v->next_iv)
8029 if (GET_CODE (v->mult_val) == CONST_INT
8030 && v->mult_val != const0_rtx
8031 && ! v->ignore && ! v->maybe_dead && v->always_computable
8033 && (GET_CODE (v->add_val) == SYMBOL_REF
8034 || GET_CODE (v->add_val) == LABEL_REF
8035 || GET_CODE (v->add_val) == CONST
8036 || (GET_CODE (v->add_val) == REG
8037 && REG_POINTER (v->add_val))))
8039 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8045 /* If the giv has the opposite direction of change,
8046 then reverse the comparison. */
8047 if (INTVAL (v->mult_val) < 0)
8048 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8051 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8052 copy_rtx (v->add_val));
8054 /* Replace biv with the giv's reduced register. */
8055 update_reg_last_use (v->add_val, insn);
8056 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8059 /* Insn doesn't support that constant or invariant. Copy it
8060 into a register (it will be a loop invariant.) */
8061 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8063 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
8066 /* Substitute the new register for its invariant value in
8067 the compare expression. */
8068 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8069 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8078 case GT: case GE: case GTU: case GEU:
8079 case LT: case LE: case LTU: case LEU:
8080 /* See if either argument is the biv. */
8081 if (XEXP (x, 0) == reg)
8082 arg = XEXP (x, 1), arg_operand = 1;
8083 else if (XEXP (x, 1) == reg)
8084 arg = XEXP (x, 0), arg_operand = 0;
8088 if (CONSTANT_P (arg))
8090 /* First try to replace with any giv that has constant positive
8091 mult_val and constant add_val. We might be able to support
8092 negative mult_val, but it seems complex to do it in general. */
8094 for (v = bl->giv; v; v = v->next_iv)
8095 if (GET_CODE (v->mult_val) == CONST_INT
8096 && INTVAL (v->mult_val) > 0
8097 && (GET_CODE (v->add_val) == SYMBOL_REF
8098 || GET_CODE (v->add_val) == LABEL_REF
8099 || GET_CODE (v->add_val) == CONST
8100 || (GET_CODE (v->add_val) == REG
8101 && REG_POINTER (v->add_val)))
8102 && ! v->ignore && ! v->maybe_dead && v->always_computable
8105 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8111 /* Replace biv with the giv's reduced reg. */
8112 validate_change (insn, &XEXP (x, 1 - arg_operand), v->new_reg, 1);
8114 /* If all constants are actually constant integers and
8115 the derived constant can be directly placed in the COMPARE,
8117 if (GET_CODE (arg) == CONST_INT
8118 && GET_CODE (v->mult_val) == CONST_INT
8119 && GET_CODE (v->add_val) == CONST_INT)
8121 validate_change (insn, &XEXP (x, arg_operand),
8122 GEN_INT (INTVAL (arg)
8123 * INTVAL (v->mult_val)
8124 + INTVAL (v->add_val)), 1);
8128 /* Otherwise, load it into a register. */
8129 tem = gen_reg_rtx (mode);
8130 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8131 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8133 if (apply_change_group ())
8137 /* Look for giv with positive constant mult_val and nonconst add_val.
8138 Insert insns to calculate new compare value.
8139 ??? Turn this off due to possible overflow. */
8141 for (v = bl->giv; v; v = v->next_iv)
8142 if (GET_CODE (v->mult_val) == CONST_INT
8143 && INTVAL (v->mult_val) > 0
8144 && ! v->ignore && ! v->maybe_dead && v->always_computable
8150 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8156 tem = gen_reg_rtx (mode);
8158 /* Replace biv with giv's reduced register. */
8159 validate_change (insn, &XEXP (x, 1 - arg_operand),
8162 /* Compute value to compare against. */
8163 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8164 /* Use it in this insn. */
8165 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8166 if (apply_change_group ())
8170 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8172 if (loop_invariant_p (loop, arg) == 1)
8174 /* Look for giv with constant positive mult_val and nonconst
8175 add_val. Insert insns to compute new compare value.
8176 ??? Turn this off due to possible overflow. */
8178 for (v = bl->giv; v; v = v->next_iv)
8179 if (GET_CODE (v->mult_val) == CONST_INT && INTVAL (v->mult_val) > 0
8180 && ! v->ignore && ! v->maybe_dead && v->always_computable
8186 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8192 tem = gen_reg_rtx (mode);
8194 /* Replace biv with giv's reduced register. */
8195 validate_change (insn, &XEXP (x, 1 - arg_operand),
8198 /* Compute value to compare against. */
8199 emit_iv_add_mult (arg, v->mult_val, v->add_val,
8201 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8202 if (apply_change_group ())
8207 /* This code has problems. Basically, you can't know when
8208 seeing if we will eliminate BL, whether a particular giv
8209 of ARG will be reduced. If it isn't going to be reduced,
8210 we can't eliminate BL. We can try forcing it to be reduced,
8211 but that can generate poor code.
8213 The problem is that the benefit of reducing TV, below should
8214 be increased if BL can actually be eliminated, but this means
8215 we might have to do a topological sort of the order in which
8216 we try to process biv. It doesn't seem worthwhile to do
8217 this sort of thing now. */
8220 /* Otherwise the reg compared with had better be a biv. */
8221 if (GET_CODE (arg) != REG
8222 || REG_IV_TYPE (ivs, REGNO (arg)) != BASIC_INDUCT)
8225 /* Look for a pair of givs, one for each biv,
8226 with identical coefficients. */
8227 for (v = bl->giv; v; v = v->next_iv)
8229 struct induction *tv;
8231 if (v->ignore || v->maybe_dead || v->mode != mode)
8234 for (tv = REG_IV_CLASS (ivs, REGNO (arg))->giv; tv;
8236 if (! tv->ignore && ! tv->maybe_dead
8237 && rtx_equal_p (tv->mult_val, v->mult_val)
8238 && rtx_equal_p (tv->add_val, v->add_val)
8239 && tv->mode == mode)
8241 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8247 /* Replace biv with its giv's reduced reg. */
8248 XEXP (x, 1 - arg_operand) = v->new_reg;
8249 /* Replace other operand with the other giv's
8251 XEXP (x, arg_operand) = tv->new_reg;
8258 /* If we get here, the biv can't be eliminated. */
8262 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8263 biv is used in it, since it will be replaced. */
8264 for (v = bl->giv; v; v = v->next_iv)
8265 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8273 /* See if any subexpression fails elimination. */
8274 fmt = GET_RTX_FORMAT (code);
8275 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8280 if (! maybe_eliminate_biv_1 (loop, XEXP (x, i), insn, bl,
8281 eliminate_p, where))
8286 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8287 if (! maybe_eliminate_biv_1 (loop, XVECEXP (x, i, j), insn, bl,
8288 eliminate_p, where))
8297 /* Return nonzero if the last use of REG
8298 is in an insn following INSN in the same basic block. */
8301 last_use_this_basic_block (reg, insn)
8307 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
8310 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
8316 /* Called via `note_stores' to record the initial value of a biv. Here we
8317 just record the location of the set and process it later. */
8320 record_initial (dest, set, data)
8323 void *data ATTRIBUTE_UNUSED;
8325 struct loop_ivs *ivs = (struct loop_ivs *) data;
8326 struct iv_class *bl;
8328 if (GET_CODE (dest) != REG
8329 || REGNO (dest) >= ivs->n_regs
8330 || REG_IV_TYPE (ivs, REGNO (dest)) != BASIC_INDUCT)
8333 bl = REG_IV_CLASS (ivs, REGNO (dest));
8335 /* If this is the first set found, record it. */
8336 if (bl->init_insn == 0)
8338 bl->init_insn = note_insn;
8343 /* If any of the registers in X are "old" and currently have a last use earlier
8344 than INSN, update them to have a last use of INSN. Their actual last use
8345 will be the previous insn but it will not have a valid uid_luid so we can't
8349 update_reg_last_use (x, insn)
8353 /* Check for the case where INSN does not have a valid luid. In this case,
8354 there is no need to modify the regno_last_uid, as this can only happen
8355 when code is inserted after the loop_end to set a pseudo's final value,
8356 and hence this insn will never be the last use of x. */
8357 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
8358 && INSN_UID (insn) < max_uid_for_loop
8359 && REGNO_LAST_LUID (REGNO (x)) < INSN_LUID (insn))
8360 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
8364 register const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
8365 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
8368 update_reg_last_use (XEXP (x, i), insn);
8369 else if (fmt[i] == 'E')
8370 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8371 update_reg_last_use (XVECEXP (x, i, j), insn);
8376 /* Given an insn INSN and condition COND, return the condition in a
8377 canonical form to simplify testing by callers. Specifically:
8379 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
8380 (2) Both operands will be machine operands; (cc0) will have been replaced.
8381 (3) If an operand is a constant, it will be the second operand.
8382 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
8383 for GE, GEU, and LEU.
8385 If the condition cannot be understood, or is an inequality floating-point
8386 comparison which needs to be reversed, 0 will be returned.
8388 If REVERSE is non-zero, then reverse the condition prior to canonizing it.
8390 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8391 insn used in locating the condition was found. If a replacement test
8392 of the condition is desired, it should be placed in front of that
8393 insn and we will be sure that the inputs are still valid.
8395 If WANT_REG is non-zero, we wish the condition to be relative to that
8396 register, if possible. Therefore, do not canonicalize the condition
8400 canonicalize_condition (insn, cond, reverse, earliest, want_reg)
8412 int reverse_code = 0;
8413 int did_reverse_condition = 0;
8414 enum machine_mode mode;
8416 code = GET_CODE (cond);
8417 mode = GET_MODE (cond);
8418 op0 = XEXP (cond, 0);
8419 op1 = XEXP (cond, 1);
8423 code = reverse_condition (code);
8424 did_reverse_condition ^= 1;
8430 /* If we are comparing a register with zero, see if the register is set
8431 in the previous insn to a COMPARE or a comparison operation. Perform
8432 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
8435 while (GET_RTX_CLASS (code) == '<'
8436 && op1 == CONST0_RTX (GET_MODE (op0))
8439 /* Set non-zero when we find something of interest. */
8443 /* If comparison with cc0, import actual comparison from compare
8447 if ((prev = prev_nonnote_insn (prev)) == 0
8448 || GET_CODE (prev) != INSN
8449 || (set = single_set (prev)) == 0
8450 || SET_DEST (set) != cc0_rtx)
8453 op0 = SET_SRC (set);
8454 op1 = CONST0_RTX (GET_MODE (op0));
8460 /* If this is a COMPARE, pick up the two things being compared. */
8461 if (GET_CODE (op0) == COMPARE)
8463 op1 = XEXP (op0, 1);
8464 op0 = XEXP (op0, 0);
8467 else if (GET_CODE (op0) != REG)
8470 /* Go back to the previous insn. Stop if it is not an INSN. We also
8471 stop if it isn't a single set or if it has a REG_INC note because
8472 we don't want to bother dealing with it. */
8474 if ((prev = prev_nonnote_insn (prev)) == 0
8475 || GET_CODE (prev) != INSN
8476 || FIND_REG_INC_NOTE (prev, 0)
8477 || (set = single_set (prev)) == 0)
8480 /* If this is setting OP0, get what it sets it to if it looks
8482 if (rtx_equal_p (SET_DEST (set), op0))
8484 enum machine_mode inner_mode = GET_MODE (SET_DEST (set));
8486 /* ??? We may not combine comparisons done in a CCmode with
8487 comparisons not done in a CCmode. This is to aid targets
8488 like Alpha that have an IEEE compliant EQ instruction, and
8489 a non-IEEE compliant BEQ instruction. The use of CCmode is
8490 actually artificial, simply to prevent the combination, but
8491 should not affect other platforms.
8493 However, we must allow VOIDmode comparisons to match either
8494 CCmode or non-CCmode comparison, because some ports have
8495 modeless comparisons inside branch patterns.
8497 ??? This mode check should perhaps look more like the mode check
8498 in simplify_comparison in combine. */
8500 if ((GET_CODE (SET_SRC (set)) == COMPARE
8503 && GET_MODE_CLASS (inner_mode) == MODE_INT
8504 && (GET_MODE_BITSIZE (inner_mode)
8505 <= HOST_BITS_PER_WIDE_INT)
8506 && (STORE_FLAG_VALUE
8507 & ((HOST_WIDE_INT) 1
8508 << (GET_MODE_BITSIZE (inner_mode) - 1))))
8509 #ifdef FLOAT_STORE_FLAG_VALUE
8511 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
8512 && (REAL_VALUE_NEGATIVE
8513 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
8516 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
8517 && (((GET_MODE_CLASS (mode) == MODE_CC)
8518 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
8519 || mode == VOIDmode || inner_mode == VOIDmode))
8521 else if (((code == EQ
8523 && (GET_MODE_BITSIZE (inner_mode)
8524 <= HOST_BITS_PER_WIDE_INT)
8525 && GET_MODE_CLASS (inner_mode) == MODE_INT
8526 && (STORE_FLAG_VALUE
8527 & ((HOST_WIDE_INT) 1
8528 << (GET_MODE_BITSIZE (inner_mode) - 1))))
8529 #ifdef FLOAT_STORE_FLAG_VALUE
8531 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
8532 && (REAL_VALUE_NEGATIVE
8533 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
8536 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
8537 && (((GET_MODE_CLASS (mode) == MODE_CC)
8538 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
8539 || mode == VOIDmode || inner_mode == VOIDmode))
8542 /* We might have reversed a LT to get a GE here. But this wasn't
8543 actually the comparison of data, so we don't flag that we
8544 have had to reverse the condition. */
8545 did_reverse_condition ^= 1;
8553 else if (reg_set_p (op0, prev))
8554 /* If this sets OP0, but not directly, we have to give up. */
8559 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
8560 code = GET_CODE (x);
8563 code = reverse_condition (code);
8564 if (code == UNKNOWN)
8566 did_reverse_condition ^= 1;
8570 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
8576 /* If constant is first, put it last. */
8577 if (CONSTANT_P (op0))
8578 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
8580 /* If OP0 is the result of a comparison, we weren't able to find what
8581 was really being compared, so fail. */
8582 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
8585 /* Canonicalize any ordered comparison with integers involving equality
8586 if we can do computations in the relevant mode and we do not
8589 if (GET_CODE (op1) == CONST_INT
8590 && GET_MODE (op0) != VOIDmode
8591 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
8593 HOST_WIDE_INT const_val = INTVAL (op1);
8594 unsigned HOST_WIDE_INT uconst_val = const_val;
8595 unsigned HOST_WIDE_INT max_val
8596 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
8601 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
8602 code = LT, op1 = GEN_INT (const_val + 1);
8605 /* When cross-compiling, const_val might be sign-extended from
8606 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
8608 if ((HOST_WIDE_INT) (const_val & max_val)
8609 != (((HOST_WIDE_INT) 1
8610 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
8611 code = GT, op1 = GEN_INT (const_val - 1);
8615 if (uconst_val < max_val)
8616 code = LTU, op1 = GEN_INT (uconst_val + 1);
8620 if (uconst_val != 0)
8621 code = GTU, op1 = GEN_INT (uconst_val - 1);
8629 /* If this was floating-point and we reversed anything other than an
8630 EQ or NE or (UN)ORDERED, return zero. */
8631 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
8632 && did_reverse_condition
8633 && code != NE && code != EQ && code != UNORDERED && code != ORDERED
8635 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
8639 /* Never return CC0; return zero instead. */
8644 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
8647 /* Given a jump insn JUMP, return the condition that will cause it to branch
8648 to its JUMP_LABEL. If the condition cannot be understood, or is an
8649 inequality floating-point comparison which needs to be reversed, 0 will
8652 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8653 insn used in locating the condition was found. If a replacement test
8654 of the condition is desired, it should be placed in front of that
8655 insn and we will be sure that the inputs are still valid. */
8658 get_condition (jump, earliest)
8666 /* If this is not a standard conditional jump, we can't parse it. */
8667 if (GET_CODE (jump) != JUMP_INSN
8668 || ! any_condjump_p (jump))
8670 set = pc_set (jump);
8672 cond = XEXP (SET_SRC (set), 0);
8674 /* If this branches to JUMP_LABEL when the condition is false, reverse
8677 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
8678 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump);
8680 return canonicalize_condition (jump, cond, reverse, earliest, NULL_RTX);
8683 /* Similar to above routine, except that we also put an invariant last
8684 unless both operands are invariants. */
8687 get_condition_for_loop (loop, x)
8688 const struct loop *loop;
8691 rtx comparison = get_condition (x, NULL_PTR);
8694 || ! loop_invariant_p (loop, XEXP (comparison, 0))
8695 || loop_invariant_p (loop, XEXP (comparison, 1)))
8698 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
8699 XEXP (comparison, 1), XEXP (comparison, 0));
8702 /* Scan the function and determine whether it has indirect (computed) jumps.
8704 This is taken mostly from flow.c; similar code exists elsewhere
8705 in the compiler. It may be useful to put this into rtlanal.c. */
8707 indirect_jump_in_function_p (start)
8712 for (insn = start; insn; insn = NEXT_INSN (insn))
8713 if (computed_jump_p (insn))
8719 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
8720 documentation for LOOP_MEMS for the definition of `appropriate'.
8721 This function is called from prescan_loop via for_each_rtx. */
8724 insert_loop_mem (mem, data)
8726 void *data ATTRIBUTE_UNUSED;
8728 struct loop_info *loop_info = data;
8735 switch (GET_CODE (m))
8741 /* We're not interested in MEMs that are only clobbered. */
8745 /* We're not interested in the MEM associated with a
8746 CONST_DOUBLE, so there's no need to traverse into this. */
8750 /* We're not interested in any MEMs that only appear in notes. */
8754 /* This is not a MEM. */
8758 /* See if we've already seen this MEM. */
8759 for (i = 0; i < loop_info->mems_idx; ++i)
8760 if (rtx_equal_p (m, loop_info->mems[i].mem))
8762 if (GET_MODE (m) != GET_MODE (loop_info->mems[i].mem))
8763 /* The modes of the two memory accesses are different. If
8764 this happens, something tricky is going on, and we just
8765 don't optimize accesses to this MEM. */
8766 loop_info->mems[i].optimize = 0;
8771 /* Resize the array, if necessary. */
8772 if (loop_info->mems_idx == loop_info->mems_allocated)
8774 if (loop_info->mems_allocated != 0)
8775 loop_info->mems_allocated *= 2;
8777 loop_info->mems_allocated = 32;
8779 loop_info->mems = (loop_mem_info *)
8780 xrealloc (loop_info->mems,
8781 loop_info->mems_allocated * sizeof (loop_mem_info));
8784 /* Actually insert the MEM. */
8785 loop_info->mems[loop_info->mems_idx].mem = m;
8786 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
8787 because we can't put it in a register. We still store it in the
8788 table, though, so that if we see the same address later, but in a
8789 non-BLK mode, we'll not think we can optimize it at that point. */
8790 loop_info->mems[loop_info->mems_idx].optimize = (GET_MODE (m) != BLKmode);
8791 loop_info->mems[loop_info->mems_idx].reg = NULL_RTX;
8792 ++loop_info->mems_idx;
8797 /* Like load_mems, but also ensures that REGS->SET_IN_LOOP,
8798 REGS->MAY_NOT_OPTIMIZE, REGS->SINGLE_USAGE, and INSN_COUNT have the correct
8799 values after load_mems. */
8802 load_mems_and_recount_loop_regs_set (loop, insn_count)
8803 const struct loop *loop;
8806 struct loop_regs *regs = LOOP_REGS (loop);
8807 int nregs = max_reg_num ();
8811 /* Recalculate regs->set_in_loop and friends since load_mems may have
8812 created new registers. */
8813 if (max_reg_num () > nregs)
8819 nregs = max_reg_num ();
8821 if ((unsigned) nregs > regs->set_in_loop->num_elements)
8823 /* Grow all the arrays. */
8824 VARRAY_GROW (regs->set_in_loop, nregs);
8825 VARRAY_GROW (regs->n_times_set, nregs);
8826 VARRAY_GROW (regs->may_not_optimize, nregs);
8827 VARRAY_GROW (regs->single_usage, nregs);
8829 /* Clear the arrays */
8830 memset ((char *) ®s->set_in_loop->data, 0, nregs * sizeof (int));
8831 memset ((char *) ®s->may_not_optimize->data, 0, nregs * sizeof (char));
8832 memset ((char *) ®s->single_usage->data, 0, nregs * sizeof (rtx));
8834 count_loop_regs_set (loop, regs->may_not_optimize, regs->single_usage,
8837 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
8839 VARRAY_CHAR (regs->may_not_optimize, i) = 1;
8840 VARRAY_INT (regs->set_in_loop, i) = 1;
8843 #ifdef AVOID_CCMODE_COPIES
8844 /* Don't try to move insns which set CC registers if we should not
8845 create CCmode register copies. */
8846 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
8847 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
8848 VARRAY_CHAR (regs->may_not_optimize, i) = 1;
8851 /* Set regs->n_times_set for the new registers. */
8852 bcopy ((char *) (®s->set_in_loop->data.i[0] + old_nregs),
8853 (char *) (®s->n_times_set->data.i[0] + old_nregs),
8854 (nregs - old_nregs) * sizeof (int));
8858 /* Move MEMs into registers for the duration of the loop. */
8862 const struct loop *loop;
8864 struct loop_info *loop_info = LOOP_INFO (loop);
8865 struct loop_regs *regs = LOOP_REGS (loop);
8866 int maybe_never = 0;
8869 rtx label = NULL_RTX;
8871 /* Nonzero if the next instruction may never be executed. */
8872 int next_maybe_never = 0;
8873 int last_max_reg = max_reg_num ();
8875 if (loop_info->mems_idx == 0)
8878 /* We cannot use next_label here because it skips over normal insns. */
8879 end_label = next_nonnote_insn (loop->end);
8880 if (end_label && GET_CODE (end_label) != CODE_LABEL)
8881 end_label = NULL_RTX;
8883 /* Check to see if it's possible that some instructions in the loop are
8884 never executed. Also check if there is a goto out of the loop other
8885 than right after the end of the loop. */
8886 for (p = next_insn_in_loop (loop, loop->scan_start);
8887 p != NULL_RTX && ! maybe_never;
8888 p = next_insn_in_loop (loop, p))
8890 if (GET_CODE (p) == CODE_LABEL)
8892 else if (GET_CODE (p) == JUMP_INSN
8893 /* If we enter the loop in the middle, and scan
8894 around to the beginning, don't set maybe_never
8895 for that. This must be an unconditional jump,
8896 otherwise the code at the top of the loop might
8897 never be executed. Unconditional jumps are
8898 followed a by barrier then loop end. */
8899 && ! (GET_CODE (p) == JUMP_INSN
8900 && JUMP_LABEL (p) == loop->top
8901 && NEXT_INSN (NEXT_INSN (p)) == loop->end
8902 && any_uncondjump_p (p)))
8904 /* If this is a jump outside of the loop but not right
8905 after the end of the loop, we would have to emit new fixup
8906 sequences for each such label. */
8907 if (JUMP_LABEL (p) != end_label
8908 && (INSN_UID (JUMP_LABEL (p)) >= max_uid_for_loop
8909 || INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop->start)
8910 || INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop->end)))
8913 if (!any_condjump_p (p))
8914 /* Something complicated. */
8917 /* If there are any more instructions in the loop, they
8918 might not be reached. */
8919 next_maybe_never = 1;
8921 else if (next_maybe_never)
8925 /* Find start of the extended basic block that enters the loop. */
8926 for (p = loop->start;
8927 PREV_INSN (p) && GET_CODE (p) != CODE_LABEL;
8933 /* Build table of mems that get set to constant values before the
8935 for (; p != loop->start; p = NEXT_INSN (p))
8936 cselib_process_insn (p);
8938 /* Actually move the MEMs. */
8939 for (i = 0; i < loop_info->mems_idx; ++i)
8941 regset_head load_copies;
8942 regset_head store_copies;
8945 rtx mem = loop_info->mems[i].mem;
8948 if (MEM_VOLATILE_P (mem)
8949 || loop_invariant_p (loop, XEXP (mem, 0)) != 1)
8950 /* There's no telling whether or not MEM is modified. */
8951 loop_info->mems[i].optimize = 0;
8953 /* Go through the MEMs written to in the loop to see if this
8954 one is aliased by one of them. */
8955 mem_list_entry = loop_info->store_mems;
8956 while (mem_list_entry)
8958 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
8960 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
8963 /* MEM is indeed aliased by this store. */
8964 loop_info->mems[i].optimize = 0;
8967 mem_list_entry = XEXP (mem_list_entry, 1);
8970 if (flag_float_store && written
8971 && GET_MODE_CLASS (GET_MODE (mem)) == MODE_FLOAT)
8972 loop_info->mems[i].optimize = 0;
8974 /* If this MEM is written to, we must be sure that there
8975 are no reads from another MEM that aliases this one. */
8976 if (loop_info->mems[i].optimize && written)
8980 for (j = 0; j < loop_info->mems_idx; ++j)
8984 else if (true_dependence (mem,
8986 loop_info->mems[j].mem,
8989 /* It's not safe to hoist loop_info->mems[i] out of
8990 the loop because writes to it might not be
8991 seen by reads from loop_info->mems[j]. */
8992 loop_info->mems[i].optimize = 0;
8998 if (maybe_never && may_trap_p (mem))
8999 /* We can't access the MEM outside the loop; it might
9000 cause a trap that wouldn't have happened otherwise. */
9001 loop_info->mems[i].optimize = 0;
9003 if (!loop_info->mems[i].optimize)
9004 /* We thought we were going to lift this MEM out of the
9005 loop, but later discovered that we could not. */
9008 INIT_REG_SET (&load_copies);
9009 INIT_REG_SET (&store_copies);
9011 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9012 order to keep scan_loop from moving stores to this MEM
9013 out of the loop just because this REG is neither a
9014 user-variable nor used in the loop test. */
9015 reg = gen_reg_rtx (GET_MODE (mem));
9016 REG_USERVAR_P (reg) = 1;
9017 loop_info->mems[i].reg = reg;
9019 /* Now, replace all references to the MEM with the
9020 corresponding pesudos. */
9022 for (p = next_insn_in_loop (loop, loop->scan_start);
9024 p = next_insn_in_loop (loop, p))
9030 set = single_set (p);
9032 /* See if this copies the mem into a register that isn't
9033 modified afterwards. We'll try to do copy propagation
9034 a little further on. */
9036 /* @@@ This test is _way_ too conservative. */
9038 && GET_CODE (SET_DEST (set)) == REG
9039 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
9040 && REGNO (SET_DEST (set)) < last_max_reg
9041 && VARRAY_INT (regs->n_times_set,
9042 REGNO (SET_DEST (set))) == 1
9043 && rtx_equal_p (SET_SRC (set), mem))
9044 SET_REGNO_REG_SET (&load_copies, REGNO (SET_DEST (set)));
9046 /* See if this copies the mem from a register that isn't
9047 modified afterwards. We'll try to remove the
9048 redundant copy later on by doing a little register
9049 renaming and copy propagation. This will help
9050 to untangle things for the BIV detection code. */
9053 && GET_CODE (SET_SRC (set)) == REG
9054 && REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER
9055 && REGNO (SET_SRC (set)) < last_max_reg
9056 && VARRAY_INT (regs->n_times_set, REGNO (SET_SRC (set))) == 1
9057 && rtx_equal_p (SET_DEST (set), mem))
9058 SET_REGNO_REG_SET (&store_copies, REGNO (SET_SRC (set)));
9060 /* Replace the memory reference with the shadow register. */
9061 replace_loop_mems (p, loop_info->mems[i].mem,
9062 loop_info->mems[i].reg);
9065 if (GET_CODE (p) == CODE_LABEL
9066 || GET_CODE (p) == JUMP_INSN)
9070 if (! apply_change_group ())
9071 /* We couldn't replace all occurrences of the MEM. */
9072 loop_info->mems[i].optimize = 0;
9075 /* Load the memory immediately before LOOP->START, which is
9076 the NOTE_LOOP_BEG. */
9077 cselib_val *e = cselib_lookup (mem, VOIDmode, 0);
9081 struct elt_loc_list *const_equiv = 0;
9085 struct elt_loc_list *equiv;
9086 struct elt_loc_list *best_equiv = 0;
9087 for (equiv = e->locs; equiv; equiv = equiv->next)
9089 if (CONSTANT_P (equiv->loc))
9090 const_equiv = equiv;
9091 else if (GET_CODE (equiv->loc) == REG
9092 /* Extending hard register lifetimes cuases crash
9093 on SRC targets. Doing so on non-SRC is
9094 probably also not good idea, since we most
9095 probably have pseudoregister equivalence as
9097 && REGNO (equiv->loc) >= FIRST_PSEUDO_REGISTER)
9100 /* Use the constant equivalence if that is cheap enough. */
9102 best_equiv = const_equiv;
9103 else if (const_equiv
9104 && (rtx_cost (const_equiv->loc, SET)
9105 <= rtx_cost (best_equiv->loc, SET)))
9107 best_equiv = const_equiv;
9111 /* If best_equiv is nonzero, we know that MEM is set to a
9112 constant or register before the loop. We will use this
9113 knowledge to initialize the shadow register with that
9114 constant or reg rather than by loading from MEM. */
9116 best = copy_rtx (best_equiv->loc);
9118 set = gen_move_insn (reg, best);
9119 set = emit_insn_before (set, loop->start);
9121 REG_NOTES (set) = gen_rtx_EXPR_LIST (REG_EQUAL,
9122 copy_rtx (const_equiv->loc),
9127 if (label == NULL_RTX)
9129 label = gen_label_rtx ();
9130 emit_label_after (label, loop->end);
9133 /* Store the memory immediately after END, which is
9134 the NOTE_LOOP_END. */
9135 set = gen_move_insn (copy_rtx (mem), reg);
9136 emit_insn_after (set, label);
9139 if (loop_dump_stream)
9141 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9142 REGNO (reg), (written ? "r/w" : "r/o"));
9143 print_rtl (loop_dump_stream, mem);
9144 fputc ('\n', loop_dump_stream);
9147 /* Attempt a bit of copy propagation. This helps untangle the
9148 data flow, and enables {basic,general}_induction_var to find
9150 EXECUTE_IF_SET_IN_REG_SET
9151 (&load_copies, FIRST_PSEUDO_REGISTER, j,
9153 try_copy_prop (loop, reg, j);
9155 CLEAR_REG_SET (&load_copies);
9157 EXECUTE_IF_SET_IN_REG_SET
9158 (&store_copies, FIRST_PSEUDO_REGISTER, j,
9160 try_swap_copy_prop (loop, reg, j);
9162 CLEAR_REG_SET (&store_copies);
9166 if (label != NULL_RTX && end_label != NULL_RTX)
9168 /* Now, we need to replace all references to the previous exit
9169 label with the new one. */
9174 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
9176 for_each_rtx (&p, replace_label, &rr);
9178 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9179 field. This is not handled by for_each_rtx because it doesn't
9180 handle unprinted ('0') fields. We need to update JUMP_LABEL
9181 because the immediately following unroll pass will use it.
9182 replace_label would not work anyways, because that only handles
9184 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9185 JUMP_LABEL (p) = label;
9192 /* For communication between note_reg_stored and its caller. */
9193 struct note_reg_stored_arg
9199 /* Called via note_stores, record in SET_SEEN whether X, which is written,
9202 note_reg_stored (x, setter, arg)
9203 rtx x, setter ATTRIBUTE_UNUSED;
9206 struct note_reg_stored_arg *t = (struct note_reg_stored_arg *) arg;
9211 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
9212 There must be exactly one insn that sets this pseudo; it will be
9213 deleted if all replacements succeed and we can prove that the register
9214 is not used after the loop. */
9217 try_copy_prop (loop, replacement, regno)
9218 const struct loop *loop;
9222 /* This is the reg that we are copying from. */
9223 rtx reg_rtx = regno_reg_rtx[regno];
9226 /* These help keep track of whether we replaced all uses of the reg. */
9227 int replaced_last = 0;
9228 int store_is_first = 0;
9230 for (insn = next_insn_in_loop (loop, loop->scan_start);
9232 insn = next_insn_in_loop (loop, insn))
9236 /* Only substitute within one extended basic block from the initializing
9238 if (GET_CODE (insn) == CODE_LABEL && init_insn)
9241 if (! INSN_P (insn))
9244 /* Is this the initializing insn? */
9245 set = single_set (insn);
9247 && GET_CODE (SET_DEST (set)) == REG
9248 && REGNO (SET_DEST (set)) == regno)
9254 if (REGNO_FIRST_UID (regno) == INSN_UID (insn))
9258 /* Only substitute after seeing the initializing insn. */
9259 if (init_insn && insn != init_insn)
9261 struct note_reg_stored_arg arg;
9263 replace_loop_regs (insn, reg_rtx, replacement);
9264 if (REGNO_LAST_UID (regno) == INSN_UID (insn))
9267 /* Stop replacing when REPLACEMENT is modified. */
9268 arg.reg = replacement;
9270 note_stores (PATTERN (insn), note_reg_stored, &arg);
9277 if (apply_change_group ())
9279 if (loop_dump_stream)
9280 fprintf (loop_dump_stream, " Replaced reg %d", regno);
9281 if (store_is_first && replaced_last)
9283 PUT_CODE (init_insn, NOTE);
9284 NOTE_LINE_NUMBER (init_insn) = NOTE_INSN_DELETED;
9285 if (loop_dump_stream)
9286 fprintf (loop_dump_stream, ", deleting init_insn (%d)",
9287 INSN_UID (init_insn));
9289 if (loop_dump_stream)
9290 fprintf (loop_dump_stream, ".\n");
9294 /* Try to replace occurrences of pseudo REGNO with REPLACEMENT within
9295 loop LOOP if the order of the sets of these registers can be
9296 swapped. There must be exactly one insn within the loop that sets
9297 this pseudo followed immediately by a move insn that sets
9298 REPLACEMENT with REGNO. */
9300 try_swap_copy_prop (loop, replacement, regno)
9301 const struct loop *loop;
9307 unsigned int new_regno;
9309 new_regno = REGNO (replacement);
9311 for (insn = next_insn_in_loop (loop, loop->scan_start);
9313 insn = next_insn_in_loop (loop, insn))
9315 /* Search for the insn that copies REGNO to NEW_REGNO? */
9316 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
9317 && (set = single_set (insn))
9318 && GET_CODE (SET_DEST (set)) == REG
9319 && REGNO (SET_DEST (set)) == new_regno
9320 && GET_CODE (SET_SRC (set)) == REG
9321 && REGNO (SET_SRC (set)) == regno)
9325 if (insn != NULL_RTX)
9330 /* Some DEF-USE info would come in handy here to make this
9331 function more general. For now, just check the previous insn
9332 which is the most likely candidate for setting REGNO. */
9334 prev_insn = PREV_INSN (insn);
9336 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
9337 && (prev_set = single_set (prev_insn))
9338 && GET_CODE (SET_DEST (prev_set)) == REG
9339 && REGNO (SET_DEST (prev_set)) == regno)
9342 (set (reg regno) (expr))
9343 (set (reg new_regno) (reg regno))
9345 so try converting this to:
9346 (set (reg new_regno) (expr))
9347 (set (reg regno) (reg new_regno))
9349 The former construct is often generated when a global
9350 variable used for an induction variable is shadowed by a
9351 register (NEW_REGNO). The latter construct improves the
9352 chances of GIV replacement and BIV elimination. */
9354 validate_change (prev_insn, &SET_DEST (prev_set),
9356 validate_change (insn, &SET_DEST (set),
9358 validate_change (insn, &SET_SRC (set),
9361 if (apply_change_group ())
9363 if (loop_dump_stream)
9364 fprintf (loop_dump_stream,
9365 " Swapped set of reg %d at %d with reg %d at %d.\n",
9366 regno, INSN_UID (insn),
9367 new_regno, INSN_UID (prev_insn));
9369 /* Update first use of REGNO. */
9370 if (REGNO_FIRST_UID (regno) == INSN_UID (prev_insn))
9371 REGNO_FIRST_UID (regno) = INSN_UID (insn);
9373 /* Now perform copy propagation to hopefully
9374 remove all uses of REGNO within the loop. */
9375 try_copy_prop (loop, replacement, regno);
9381 /* Replace MEM with its associated pseudo register. This function is
9382 called from load_mems via for_each_rtx. DATA is actually a pointer
9383 to a structure describing the instruction currently being scanned
9384 and the MEM we are currently replacing. */
9387 replace_loop_mem (mem, data)
9391 loop_replace_args *args = (loop_replace_args *) data;
9397 switch (GET_CODE (m))
9403 /* We're not interested in the MEM associated with a
9404 CONST_DOUBLE, so there's no need to traverse into one. */
9408 /* This is not a MEM. */
9412 if (!rtx_equal_p (args->match, m))
9413 /* This is not the MEM we are currently replacing. */
9416 /* Actually replace the MEM. */
9417 validate_change (args->insn, mem, args->replacement, 1);
9423 replace_loop_mems (insn, mem, reg)
9428 loop_replace_args args;
9432 args.replacement = reg;
9434 for_each_rtx (&insn, replace_loop_mem, &args);
9437 /* Replace one register with another. Called through for_each_rtx; PX points
9438 to the rtx being scanned. DATA is actually a pointer to
9439 a structure of arguments. */
9442 replace_loop_reg (px, data)
9447 loop_replace_args *args = (loop_replace_args *) data;
9452 if (x == args->match)
9453 validate_change (args->insn, px, args->replacement, 1);
9459 replace_loop_regs (insn, reg, replacement)
9464 loop_replace_args args;
9468 args.replacement = replacement;
9470 for_each_rtx (&insn, replace_loop_reg, &args);
9473 /* Replace occurrences of the old exit label for the loop with the new
9474 one. DATA is an rtx_pair containing the old and new labels,
9478 replace_label (x, data)
9483 rtx old_label = ((rtx_pair *) data)->r1;
9484 rtx new_label = ((rtx_pair *) data)->r2;
9489 if (GET_CODE (l) != LABEL_REF)
9492 if (XEXP (l, 0) != old_label)
9495 XEXP (l, 0) = new_label;
9496 ++LABEL_NUSES (new_label);
9497 --LABEL_NUSES (old_label);
9502 #define LOOP_BLOCK_NUM_1(INSN) \
9503 ((INSN) ? (BLOCK_FOR_INSN (INSN) ? BLOCK_NUM (INSN) : - 1) : -1)
9505 /* The notes do not have an assigned block, so look at the next insn. */
9506 #define LOOP_BLOCK_NUM(INSN) \
9507 ((INSN) ? (GET_CODE (INSN) == NOTE \
9508 ? LOOP_BLOCK_NUM_1 (next_nonnote_insn (INSN)) \
9509 : LOOP_BLOCK_NUM_1 (INSN)) \
9512 #define LOOP_INSN_UID(INSN) ((INSN) ? INSN_UID (INSN) : -1)
9515 loop_dump_aux (loop, file, verbose)
9516 const struct loop *loop;
9518 int verbose ATTRIBUTE_UNUSED;
9522 if (! loop || ! file)
9525 /* Print diagnostics to compare our concept of a loop with
9526 what the loop notes say. */
9527 if (! PREV_INSN (loop->first->head)
9528 || GET_CODE (PREV_INSN (loop->first->head)) != NOTE
9529 || NOTE_LINE_NUMBER (PREV_INSN (loop->first->head))
9530 != NOTE_INSN_LOOP_BEG)
9531 fprintf (file, ";; No NOTE_INSN_LOOP_BEG at %d\n",
9532 INSN_UID (PREV_INSN (loop->first->head)));
9533 if (! NEXT_INSN (loop->last->end)
9534 || GET_CODE (NEXT_INSN (loop->last->end)) != NOTE
9535 || NOTE_LINE_NUMBER (NEXT_INSN (loop->last->end))
9536 != NOTE_INSN_LOOP_END)
9537 fprintf (file, ";; No NOTE_INSN_LOOP_END at %d\n",
9538 INSN_UID (NEXT_INSN (loop->last->end)));
9543 ";; start %d (%d), cont dom %d (%d), cont %d (%d), vtop %d (%d), end %d (%d)\n",
9544 LOOP_BLOCK_NUM (loop->start),
9545 LOOP_INSN_UID (loop->start),
9546 LOOP_BLOCK_NUM (loop->cont),
9547 LOOP_INSN_UID (loop->cont),
9548 LOOP_BLOCK_NUM (loop->cont),
9549 LOOP_INSN_UID (loop->cont),
9550 LOOP_BLOCK_NUM (loop->vtop),
9551 LOOP_INSN_UID (loop->vtop),
9552 LOOP_BLOCK_NUM (loop->end),
9553 LOOP_INSN_UID (loop->end));
9554 fprintf (file, ";; top %d (%d), scan start %d (%d)\n",
9555 LOOP_BLOCK_NUM (loop->top),
9556 LOOP_INSN_UID (loop->top),
9557 LOOP_BLOCK_NUM (loop->scan_start),
9558 LOOP_INSN_UID (loop->scan_start));
9559 fprintf (file, ";; exit_count %d", loop->exit_count);
9560 if (loop->exit_count)
9562 fputs (", labels:", file);
9563 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
9565 fprintf (file, " %d ",
9566 LOOP_INSN_UID (XEXP (label, 0)));
9571 /* This can happen when a marked loop appears as two nested loops,
9572 say from while (a || b) {}. The inner loop won't match
9573 the loop markers but the outer one will. */
9574 if (LOOP_BLOCK_NUM (loop->cont) != loop->latch->index)
9575 fprintf (file, ";; NOTE_INSN_LOOP_CONT not in loop latch\n");
9579 /* Call this function from the debugger to dump LOOP. */
9583 const struct loop *loop;
9585 flow_loop_dump (loop, stderr, loop_dump_aux, 1);
9588 /* Call this function from the debugger to dump LOOPS. */
9592 const struct loops *loops;
9594 flow_loops_dump (loops, stderr, loop_dump_aux, 1);
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