1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
44 #include "hard-reg-set.h"
45 #include "basic-block.h"
46 #include "insn-config.h"
47 #include "insn-flags.h"
57 #define LOOP_REG_LIFETIME(LOOP, REGNO) \
58 ((REGNO_LAST_LUID (REGNO) - REGNO_FIRST_LUID (REGNO)))
60 #define LOOP_REG_GLOBAL_P(LOOP, REGNO) \
61 ((REGNO_LAST_LUID (REGNO) > INSN_LUID ((LOOP)->end) \
62 || REGNO_FIRST_LUID (REGNO) < INSN_LUID ((LOOP)->start)))
65 /* Vector mapping INSN_UIDs to luids.
66 The luids are like uids but increase monotonically always.
67 We use them to see whether a jump comes from outside a given loop. */
71 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
72 number the insn is contained in. */
74 struct loop **uid_loop;
76 /* 1 + largest uid of any insn. */
80 /* 1 + luid of last insn. */
84 /* Number of loops detected in current function. Used as index to the
87 static int max_loop_num;
89 /* Bound on pseudo register number before loop optimization.
90 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
91 unsigned int max_reg_before_loop;
93 /* The value to pass to the next call of reg_scan_update. */
94 static int loop_max_reg;
96 #define obstack_chunk_alloc xmalloc
97 #define obstack_chunk_free free
99 /* During the analysis of a loop, a chain of `struct movable's
100 is made to record all the movable insns found.
101 Then the entire chain can be scanned to decide which to move. */
105 rtx insn; /* A movable insn */
106 rtx set_src; /* The expression this reg is set from. */
107 rtx set_dest; /* The destination of this SET. */
108 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
109 of any registers used within the LIBCALL. */
110 int consec; /* Number of consecutive following insns
111 that must be moved with this one. */
112 unsigned int regno; /* The register it sets */
113 short lifetime; /* lifetime of that register;
114 may be adjusted when matching movables
115 that load the same value are found. */
116 short savings; /* Number of insns we can move for this reg,
117 including other movables that force this
118 or match this one. */
119 unsigned int cond : 1; /* 1 if only conditionally movable */
120 unsigned int force : 1; /* 1 means MUST move this insn */
121 unsigned int global : 1; /* 1 means reg is live outside this loop */
122 /* If PARTIAL is 1, GLOBAL means something different:
123 that the reg is live outside the range from where it is set
124 to the following label. */
125 unsigned int done : 1; /* 1 inhibits further processing of this */
127 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
128 In particular, moving it does not make it
130 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
131 load SRC, rather than copying INSN. */
132 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
133 first insn of a consecutive sets group. */
134 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
135 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
136 that we should avoid changing when clearing
137 the rest of the reg. */
138 struct movable *match; /* First entry for same value */
139 struct movable *forces; /* An insn that must be moved if this is */
140 struct movable *next;
144 FILE *loop_dump_stream;
146 /* Forward declarations. */
148 static void find_and_verify_loops PARAMS ((rtx, struct loops *));
149 static void mark_loop_jump PARAMS ((rtx, struct loop *));
150 static void prescan_loop PARAMS ((struct loop *));
151 static int reg_in_basic_block_p PARAMS ((rtx, rtx));
152 static int consec_sets_invariant_p PARAMS ((const struct loop *,
154 static int labels_in_range_p PARAMS ((rtx, int));
155 static void count_one_set PARAMS ((struct loop_regs *, rtx, rtx, rtx *));
156 static void note_addr_stored PARAMS ((rtx, rtx, void *));
157 static void note_set_pseudo_multiple_uses PARAMS ((rtx, rtx, void *));
158 static int loop_reg_used_before_p PARAMS ((const struct loop *, rtx, rtx));
159 static void scan_loop PARAMS ((struct loop*, int));
161 static void replace_call_address PARAMS ((rtx, rtx, rtx));
163 static rtx skip_consec_insns PARAMS ((rtx, int));
164 static int libcall_benefit PARAMS ((rtx));
165 static void ignore_some_movables PARAMS ((struct loop_movables *));
166 static void force_movables PARAMS ((struct loop_movables *));
167 static void combine_movables PARAMS ((struct loop_movables *,
168 struct loop_regs *));
169 static int regs_match_p PARAMS ((rtx, rtx, struct loop_movables *));
170 static int rtx_equal_for_loop_p PARAMS ((rtx, rtx, struct loop_movables *,
171 struct loop_regs *));
172 static void add_label_notes PARAMS ((rtx, rtx));
173 static void move_movables PARAMS ((struct loop *loop, struct loop_movables *,
175 static void loop_movables_add PARAMS((struct loop_movables *,
177 static void loop_movables_free PARAMS((struct loop_movables *));
178 static int count_nonfixed_reads PARAMS ((const struct loop *, rtx));
179 static void loop_bivs_find PARAMS((struct loop *));
180 static void loop_bivs_init_find PARAMS((struct loop *));
181 static void loop_bivs_check PARAMS((struct loop *));
182 static void loop_givs_find PARAMS((struct loop *));
183 static void loop_givs_check PARAMS((struct loop *));
184 static int loop_biv_eliminable_p PARAMS((struct loop *, struct iv_class *,
186 static int loop_giv_reduce_benefit PARAMS((struct loop *, struct iv_class *,
187 struct induction *, rtx));
188 static void loop_givs_dead_check PARAMS((struct loop *, struct iv_class *));
189 static void loop_givs_reduce PARAMS((struct loop *, struct iv_class *));
190 static void loop_givs_rescan PARAMS((struct loop *, struct iv_class *,
192 static void loop_ivs_free PARAMS((struct loop *));
193 static void strength_reduce PARAMS ((struct loop *, int, int));
194 static void find_single_use_in_loop PARAMS ((struct loop_regs *, rtx, rtx));
195 static int valid_initial_value_p PARAMS ((rtx, rtx, int, rtx));
196 static void find_mem_givs PARAMS ((const struct loop *, rtx, rtx, int, int));
197 static void record_biv PARAMS ((struct loop *, struct induction *,
198 rtx, rtx, rtx, rtx, rtx *,
200 static void check_final_value PARAMS ((const struct loop *,
201 struct induction *));
202 static void loop_ivs_dump PARAMS((const struct loop *, FILE *, int));
203 static void loop_iv_class_dump PARAMS((const struct iv_class *, FILE *, int));
204 static void loop_biv_dump PARAMS((const struct induction *, FILE *, int));
205 static void loop_giv_dump PARAMS((const struct induction *, FILE *, int));
206 static void record_giv PARAMS ((const struct loop *, struct induction *,
207 rtx, rtx, rtx, rtx, rtx, rtx, int,
208 enum g_types, int, int, rtx *));
209 static void update_giv_derive PARAMS ((const struct loop *, rtx));
210 static void check_ext_dependant_givs PARAMS ((struct iv_class *,
211 struct loop_info *));
212 static int basic_induction_var PARAMS ((const struct loop *, rtx,
213 enum machine_mode, rtx, rtx,
214 rtx *, rtx *, rtx **));
215 static rtx simplify_giv_expr PARAMS ((const struct loop *, rtx, rtx *, int *));
216 static int general_induction_var PARAMS ((const struct loop *loop, rtx, rtx *,
217 rtx *, rtx *, rtx *, int, int *,
219 static int consec_sets_giv PARAMS ((const struct loop *, int, rtx,
220 rtx, rtx, rtx *, rtx *, rtx *, rtx *));
221 static int check_dbra_loop PARAMS ((struct loop *, int));
222 static rtx express_from_1 PARAMS ((rtx, rtx, rtx));
223 static rtx combine_givs_p PARAMS ((struct induction *, struct induction *));
224 static int cmp_combine_givs_stats PARAMS ((const PTR, const PTR));
225 static void combine_givs PARAMS ((struct loop_regs *, struct iv_class *));
226 static int product_cheap_p PARAMS ((rtx, rtx));
227 static int maybe_eliminate_biv PARAMS ((const struct loop *, struct iv_class *,
229 static int maybe_eliminate_biv_1 PARAMS ((const struct loop *, rtx, rtx,
230 struct iv_class *, int,
232 static int last_use_this_basic_block PARAMS ((rtx, rtx));
233 static void record_initial PARAMS ((rtx, rtx, void *));
234 static void update_reg_last_use PARAMS ((rtx, rtx));
235 static rtx next_insn_in_loop PARAMS ((const struct loop *, rtx));
236 static void loop_regs_scan PARAMS ((const struct loop*, int, int *));
237 static void load_mems PARAMS ((const struct loop *));
238 static int insert_loop_mem PARAMS ((rtx *, void *));
239 static int replace_loop_mem PARAMS ((rtx *, void *));
240 static void replace_loop_mems PARAMS ((rtx, rtx, rtx));
241 static int replace_loop_reg PARAMS ((rtx *, void *));
242 static void replace_loop_regs PARAMS ((rtx insn, rtx, rtx));
243 static void note_reg_stored PARAMS ((rtx, rtx, void *));
244 static void try_copy_prop PARAMS ((const struct loop *, rtx, unsigned int));
245 static void try_swap_copy_prop PARAMS ((const struct loop *, rtx,
247 static int replace_label PARAMS ((rtx *, void *));
248 static rtx check_insn_for_givs PARAMS((struct loop *, rtx, int, int));
249 static rtx check_insn_for_bivs PARAMS((struct loop *, rtx, int, int));
250 static rtx gen_add_mult PARAMS ((rtx, rtx, rtx, rtx));
251 static void loop_regs_update PARAMS ((const struct loop *, rtx));
252 static int iv_add_mult_cost PARAMS ((rtx, rtx, rtx, rtx));
254 static rtx loop_insn_emit_after PARAMS((const struct loop *, basic_block,
256 static rtx loop_insn_emit_before PARAMS((const struct loop *, basic_block,
258 static rtx loop_insn_sink_or_swim PARAMS((const struct loop *, rtx));
260 static void loop_dump_aux PARAMS ((const struct loop *, FILE *, int));
261 void debug_ivs PARAMS ((const struct loop *));
262 void debug_iv_class PARAMS ((const struct iv_class *));
263 void debug_biv PARAMS ((const struct induction *));
264 void debug_giv PARAMS ((const struct induction *));
265 void debug_loop PARAMS ((const struct loop *));
266 void debug_loops PARAMS ((const struct loops *));
268 typedef struct rtx_pair
274 typedef struct loop_replace_args
281 /* Nonzero iff INSN is between START and END, inclusive. */
282 #define INSN_IN_RANGE_P(INSN, START, END) \
283 (INSN_UID (INSN) < max_uid_for_loop \
284 && INSN_LUID (INSN) >= INSN_LUID (START) \
285 && INSN_LUID (INSN) <= INSN_LUID (END))
287 /* Indirect_jump_in_function is computed once per function. */
288 static int indirect_jump_in_function;
289 static int indirect_jump_in_function_p PARAMS ((rtx));
291 static int compute_luids PARAMS ((rtx, rtx, int));
293 static int biv_elimination_giv_has_0_offset PARAMS ((struct induction *,
297 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
298 copy the value of the strength reduced giv to its original register. */
299 static int copy_cost;
301 /* Cost of using a register, to normalize the benefits of a giv. */
302 static int reg_address_cost;
307 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
309 reg_address_cost = address_cost (reg, SImode);
311 copy_cost = COSTS_N_INSNS (1);
314 /* Compute the mapping from uids to luids.
315 LUIDs are numbers assigned to insns, like uids,
316 except that luids increase monotonically through the code.
317 Start at insn START and stop just before END. Assign LUIDs
318 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
320 compute_luids (start, end, prev_luid)
327 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
329 if (INSN_UID (insn) >= max_uid_for_loop)
331 /* Don't assign luids to line-number NOTEs, so that the distance in
332 luids between two insns is not affected by -g. */
333 if (GET_CODE (insn) != NOTE
334 || NOTE_LINE_NUMBER (insn) <= 0)
335 uid_luid[INSN_UID (insn)] = ++i;
337 /* Give a line number note the same luid as preceding insn. */
338 uid_luid[INSN_UID (insn)] = i;
343 /* Entry point of this file. Perform loop optimization
344 on the current function. F is the first insn of the function
345 and DUMPFILE is a stream for output of a trace of actions taken
346 (or 0 if none should be output). */
349 loop_optimize (f, dumpfile, flags)
350 /* f is the first instruction of a chain of insns for one function */
357 struct loops loops_data;
358 struct loops *loops = &loops_data;
359 struct loop_info *loops_info;
361 loop_dump_stream = dumpfile;
363 init_recog_no_volatile ();
365 max_reg_before_loop = max_reg_num ();
366 loop_max_reg = max_reg_before_loop;
370 /* Count the number of loops. */
373 for (insn = f; insn; insn = NEXT_INSN (insn))
375 if (GET_CODE (insn) == NOTE
376 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
380 /* Don't waste time if no loops. */
381 if (max_loop_num == 0)
384 loops->num = max_loop_num;
386 /* Get size to use for tables indexed by uids.
387 Leave some space for labels allocated by find_and_verify_loops. */
388 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
390 uid_luid = (int *) xcalloc (max_uid_for_loop, sizeof (int));
391 uid_loop = (struct loop **) xcalloc (max_uid_for_loop,
392 sizeof (struct loop *));
394 /* Allocate storage for array of loops. */
395 loops->array = (struct loop *)
396 xcalloc (loops->num, sizeof (struct loop));
398 /* Find and process each loop.
399 First, find them, and record them in order of their beginnings. */
400 find_and_verify_loops (f, loops);
402 /* Allocate and initialize auxiliary loop information. */
403 loops_info = xcalloc (loops->num, sizeof (struct loop_info));
404 for (i = 0; i < loops->num; i++)
405 loops->array[i].aux = loops_info + i;
407 /* Now find all register lifetimes. This must be done after
408 find_and_verify_loops, because it might reorder the insns in the
410 reg_scan (f, max_reg_before_loop, 1);
412 /* This must occur after reg_scan so that registers created by gcse
413 will have entries in the register tables.
415 We could have added a call to reg_scan after gcse_main in toplev.c,
416 but moving this call to init_alias_analysis is more efficient. */
417 init_alias_analysis ();
419 /* See if we went too far. Note that get_max_uid already returns
420 one more that the maximum uid of all insn. */
421 if (get_max_uid () > max_uid_for_loop)
423 /* Now reset it to the actual size we need. See above. */
424 max_uid_for_loop = get_max_uid ();
426 /* find_and_verify_loops has already called compute_luids, but it
427 might have rearranged code afterwards, so we need to recompute
429 max_luid = compute_luids (f, NULL_RTX, 0);
431 /* Don't leave gaps in uid_luid for insns that have been
432 deleted. It is possible that the first or last insn
433 using some register has been deleted by cross-jumping.
434 Make sure that uid_luid for that former insn's uid
435 points to the general area where that insn used to be. */
436 for (i = 0; i < max_uid_for_loop; i++)
438 uid_luid[0] = uid_luid[i];
439 if (uid_luid[0] != 0)
442 for (i = 0; i < max_uid_for_loop; i++)
443 if (uid_luid[i] == 0)
444 uid_luid[i] = uid_luid[i - 1];
446 /* Determine if the function has indirect jump. On some systems
447 this prevents low overhead loop instructions from being used. */
448 indirect_jump_in_function = indirect_jump_in_function_p (f);
450 /* Now scan the loops, last ones first, since this means inner ones are done
451 before outer ones. */
452 for (i = max_loop_num - 1; i >= 0; i--)
454 struct loop *loop = &loops->array[i];
456 if (! loop->invalid && loop->end)
457 scan_loop (loop, flags);
460 /* If there were lexical blocks inside the loop, they have been
461 replicated. We will now have more than one NOTE_INSN_BLOCK_BEG
462 and NOTE_INSN_BLOCK_END for each such block. We must duplicate
463 the BLOCKs as well. */
464 if (write_symbols != NO_DEBUG)
467 end_alias_analysis ();
476 /* Returns the next insn, in execution order, after INSN. START and
477 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
478 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
479 insn-stream; it is used with loops that are entered near the
483 next_insn_in_loop (loop, insn)
484 const struct loop *loop;
487 insn = NEXT_INSN (insn);
489 if (insn == loop->end)
492 /* Go to the top of the loop, and continue there. */
499 if (insn == loop->scan_start)
506 /* Optimize one loop described by LOOP. */
508 /* ??? Could also move memory writes out of loops if the destination address
509 is invariant, the source is invariant, the memory write is not volatile,
510 and if we can prove that no read inside the loop can read this address
511 before the write occurs. If there is a read of this address after the
512 write, then we can also mark the memory read as invariant. */
515 scan_loop (loop, flags)
519 struct loop_info *loop_info = LOOP_INFO (loop);
520 struct loop_regs *regs = LOOP_REGS (loop);
522 rtx loop_start = loop->start;
523 rtx loop_end = loop->end;
525 /* 1 if we are scanning insns that could be executed zero times. */
527 /* 1 if we are scanning insns that might never be executed
528 due to a subroutine call which might exit before they are reached. */
530 /* Jump insn that enters the loop, or 0 if control drops in. */
531 rtx loop_entry_jump = 0;
532 /* Number of insns in the loop. */
535 rtx temp, update_start, update_end;
536 /* The SET from an insn, if it is the only SET in the insn. */
538 /* Chain describing insns movable in current loop. */
539 struct loop_movables *movables = LOOP_MOVABLES (loop);
540 /* Ratio of extra register life span we can justify
541 for saving an instruction. More if loop doesn't call subroutines
542 since in that case saving an insn makes more difference
543 and more registers are available. */
545 /* Nonzero if we are scanning instructions in a sub-loop. */
554 /* Determine whether this loop starts with a jump down to a test at
555 the end. This will occur for a small number of loops with a test
556 that is too complex to duplicate in front of the loop.
558 We search for the first insn or label in the loop, skipping NOTEs.
559 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
560 (because we might have a loop executed only once that contains a
561 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
562 (in case we have a degenerate loop).
564 Note that if we mistakenly think that a loop is entered at the top
565 when, in fact, it is entered at the exit test, the only effect will be
566 slightly poorer optimization. Making the opposite error can generate
567 incorrect code. Since very few loops now start with a jump to the
568 exit test, the code here to detect that case is very conservative. */
570 for (p = NEXT_INSN (loop_start);
572 && GET_CODE (p) != CODE_LABEL && ! INSN_P (p)
573 && (GET_CODE (p) != NOTE
574 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
575 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
579 loop->scan_start = p;
581 /* If loop end is the end of the current function, then emit a
582 NOTE_INSN_DELETED after loop_end and set loop->sink to the dummy
583 note insn. This is the position we use when sinking insns out of
585 if (NEXT_INSN (loop->end) != 0)
586 loop->sink = NEXT_INSN (loop->end);
588 loop->sink = emit_note_after (NOTE_INSN_DELETED, loop->end);
590 /* Set up variables describing this loop. */
592 threshold = (loop_info->has_call ? 1 : 2) * (1 + n_non_fixed_regs);
594 /* If loop has a jump before the first label,
595 the true entry is the target of that jump.
596 Start scan from there.
597 But record in LOOP->TOP the place where the end-test jumps
598 back to so we can scan that after the end of the loop. */
599 if (GET_CODE (p) == JUMP_INSN)
603 /* Loop entry must be unconditional jump (and not a RETURN) */
604 if (any_uncondjump_p (p)
605 && JUMP_LABEL (p) != 0
606 /* Check to see whether the jump actually
607 jumps out of the loop (meaning it's no loop).
608 This case can happen for things like
609 do {..} while (0). If this label was generated previously
610 by loop, we can't tell anything about it and have to reject
612 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, loop_end))
614 loop->top = next_label (loop->scan_start);
615 loop->scan_start = JUMP_LABEL (p);
619 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
620 as required by loop_reg_used_before_p. So skip such loops. (This
621 test may never be true, but it's best to play it safe.)
623 Also, skip loops where we do not start scanning at a label. This
624 test also rejects loops starting with a JUMP_INSN that failed the
627 if (INSN_UID (loop->scan_start) >= max_uid_for_loop
628 || GET_CODE (loop->scan_start) != CODE_LABEL)
630 if (loop_dump_stream)
631 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
632 INSN_UID (loop_start), INSN_UID (loop_end));
636 /* Allocate extra space for REGs that might be created by load_mems.
637 We allocate a little extra slop as well, in the hopes that we
638 won't have to reallocate the regs array. */
639 loop_regs_scan (loop, loop_info->mems_idx + 16, &insn_count);
641 if (loop_dump_stream)
643 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
644 INSN_UID (loop_start), INSN_UID (loop_end), insn_count);
646 fprintf (loop_dump_stream, "Continue at insn %d.\n",
647 INSN_UID (loop->cont));
650 /* Scan through the loop finding insns that are safe to move.
651 Set REGS->ARRAY[I].SET_IN_LOOP negative for the reg I being set, so that
652 this reg will be considered invariant for subsequent insns.
653 We consider whether subsequent insns use the reg
654 in deciding whether it is worth actually moving.
656 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
657 and therefore it is possible that the insns we are scanning
658 would never be executed. At such times, we must make sure
659 that it is safe to execute the insn once instead of zero times.
660 When MAYBE_NEVER is 0, all insns will be executed at least once
661 so that is not a problem. */
663 for (p = next_insn_in_loop (loop, loop->scan_start);
665 p = next_insn_in_loop (loop, p))
667 if (GET_CODE (p) == INSN
668 && (set = single_set (p))
669 && GET_CODE (SET_DEST (set)) == REG
670 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
675 rtx src = SET_SRC (set);
676 rtx dependencies = 0;
678 /* Figure out what to use as a source of this insn. If a REG_EQUIV
679 note is given or if a REG_EQUAL note with a constant operand is
680 specified, use it as the source and mark that we should move
681 this insn by calling emit_move_insn rather that duplicating the
684 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
686 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
688 src = XEXP (temp, 0), move_insn = 1;
691 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
692 if (temp && CONSTANT_P (XEXP (temp, 0)))
693 src = XEXP (temp, 0), move_insn = 1;
694 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
696 src = XEXP (temp, 0);
697 /* A libcall block can use regs that don't appear in
698 the equivalent expression. To move the libcall,
699 we must move those regs too. */
700 dependencies = libcall_other_reg (p, src);
704 /* Don't try to optimize a register that was made
705 by loop-optimization for an inner loop.
706 We don't know its life-span, so we can't compute the benefit. */
707 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
709 else if (/* The register is used in basic blocks other
710 than the one where it is set (meaning that
711 something after this point in the loop might
712 depend on its value before the set). */
713 ! reg_in_basic_block_p (p, SET_DEST (set))
714 /* And the set is not guaranteed to be executed one
715 the loop starts, or the value before the set is
716 needed before the set occurs...
718 ??? Note we have quadratic behaviour here, mitigated
719 by the fact that the previous test will often fail for
720 large loops. Rather than re-scanning the entire loop
721 each time for register usage, we should build tables
722 of the register usage and use them here instead. */
724 || loop_reg_used_before_p (loop, set, p)))
725 /* It is unsafe to move the set.
727 This code used to consider it OK to move a set of a variable
728 which was not created by the user and not used in an exit test.
729 That behavior is incorrect and was removed. */
731 else if ((tem = loop_invariant_p (loop, src))
732 && (dependencies == 0
733 || (tem2 = loop_invariant_p (loop, dependencies)) != 0)
734 && (regs->array[REGNO (SET_DEST (set))].set_in_loop == 1
736 = consec_sets_invariant_p
737 (loop, SET_DEST (set),
738 regs->array[REGNO (SET_DEST (set))].set_in_loop,
740 /* If the insn can cause a trap (such as divide by zero),
741 can't move it unless it's guaranteed to be executed
742 once loop is entered. Even a function call might
743 prevent the trap insn from being reached
744 (since it might exit!) */
745 && ! ((maybe_never || call_passed)
746 && may_trap_p (src)))
748 register struct movable *m;
749 register int regno = REGNO (SET_DEST (set));
751 /* A potential lossage is where we have a case where two insns
752 can be combined as long as they are both in the loop, but
753 we move one of them outside the loop. For large loops,
754 this can lose. The most common case of this is the address
755 of a function being called.
757 Therefore, if this register is marked as being used exactly
758 once if we are in a loop with calls (a "large loop"), see if
759 we can replace the usage of this register with the source
760 of this SET. If we can, delete this insn.
762 Don't do this if P has a REG_RETVAL note or if we have
763 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
765 if (loop_info->has_call
766 && regs->array[regno].single_usage != 0
767 && regs->array[regno].single_usage != const0_rtx
768 && REGNO_FIRST_UID (regno) == INSN_UID (p)
769 && (REGNO_LAST_UID (regno)
770 == INSN_UID (regs->array[regno].single_usage))
771 && regs->array[regno].set_in_loop == 1
772 && ! side_effects_p (SET_SRC (set))
773 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
774 && (! SMALL_REGISTER_CLASSES
775 || (! (GET_CODE (SET_SRC (set)) == REG
776 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
777 /* This test is not redundant; SET_SRC (set) might be
778 a call-clobbered register and the life of REGNO
779 might span a call. */
780 && ! modified_between_p (SET_SRC (set), p,
781 regs->array[regno].single_usage)
782 && no_labels_between_p (p, regs->array[regno].single_usage)
783 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
784 regs->array[regno].single_usage))
786 /* Replace any usage in a REG_EQUAL note. Must copy the
787 new source, so that we don't get rtx sharing between the
788 SET_SOURCE and REG_NOTES of insn p. */
789 REG_NOTES (regs->array[regno].single_usage)
790 = replace_rtx (REG_NOTES (regs->array[regno].single_usage),
791 SET_DEST (set), copy_rtx (SET_SRC (set)));
794 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
795 NOTE_SOURCE_FILE (p) = 0;
796 regs->array[regno].set_in_loop = 0;
800 m = (struct movable *) xmalloc (sizeof (struct movable));
804 m->dependencies = dependencies;
805 m->set_dest = SET_DEST (set);
807 m->consec = regs->array[REGNO (SET_DEST (set))].set_in_loop - 1;
811 m->move_insn = move_insn;
812 m->move_insn_first = 0;
813 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
814 m->savemode = VOIDmode;
816 /* Set M->cond if either loop_invariant_p
817 or consec_sets_invariant_p returned 2
818 (only conditionally invariant). */
819 m->cond = ((tem | tem1 | tem2) > 1);
820 m->global = LOOP_REG_GLOBAL_P (loop, regno);
822 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
823 m->savings = regs->array[regno].n_times_set;
824 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
825 m->savings += libcall_benefit (p);
826 regs->array[regno].set_in_loop = move_insn ? -2 : -1;
827 /* Add M to the end of the chain MOVABLES. */
828 loop_movables_add (movables, m);
832 /* It is possible for the first instruction to have a
833 REG_EQUAL note but a non-invariant SET_SRC, so we must
834 remember the status of the first instruction in case
835 the last instruction doesn't have a REG_EQUAL note. */
836 m->move_insn_first = m->move_insn;
838 /* Skip this insn, not checking REG_LIBCALL notes. */
839 p = next_nonnote_insn (p);
840 /* Skip the consecutive insns, if there are any. */
841 p = skip_consec_insns (p, m->consec);
842 /* Back up to the last insn of the consecutive group. */
843 p = prev_nonnote_insn (p);
845 /* We must now reset m->move_insn, m->is_equiv, and possibly
846 m->set_src to correspond to the effects of all the
848 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
850 m->set_src = XEXP (temp, 0), m->move_insn = 1;
853 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
854 if (temp && CONSTANT_P (XEXP (temp, 0)))
855 m->set_src = XEXP (temp, 0), m->move_insn = 1;
860 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
863 /* If this register is always set within a STRICT_LOW_PART
864 or set to zero, then its high bytes are constant.
865 So clear them outside the loop and within the loop
866 just load the low bytes.
867 We must check that the machine has an instruction to do so.
868 Also, if the value loaded into the register
869 depends on the same register, this cannot be done. */
870 else if (SET_SRC (set) == const0_rtx
871 && GET_CODE (NEXT_INSN (p)) == INSN
872 && (set1 = single_set (NEXT_INSN (p)))
873 && GET_CODE (set1) == SET
874 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
875 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
876 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
878 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
880 register int regno = REGNO (SET_DEST (set));
881 if (regs->array[regno].set_in_loop == 2)
883 register struct movable *m;
884 m = (struct movable *) xmalloc (sizeof (struct movable));
887 m->set_dest = SET_DEST (set);
894 m->move_insn_first = 0;
896 /* If the insn may not be executed on some cycles,
897 we can't clear the whole reg; clear just high part.
898 Not even if the reg is used only within this loop.
905 Clearing x before the inner loop could clobber a value
906 being saved from the last time around the outer loop.
907 However, if the reg is not used outside this loop
908 and all uses of the register are in the same
909 basic block as the store, there is no problem.
911 If this insn was made by loop, we don't know its
912 INSN_LUID and hence must make a conservative
914 m->global = (INSN_UID (p) >= max_uid_for_loop
915 || LOOP_REG_GLOBAL_P (loop, regno)
916 || (labels_in_range_p
917 (p, REGNO_FIRST_LUID (regno))));
918 if (maybe_never && m->global)
919 m->savemode = GET_MODE (SET_SRC (set1));
921 m->savemode = VOIDmode;
925 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
927 regs->array[regno].set_in_loop = -1;
928 /* Add M to the end of the chain MOVABLES. */
929 loop_movables_add (movables, m);
933 /* Past a call insn, we get to insns which might not be executed
934 because the call might exit. This matters for insns that trap.
935 Constant and pure call insns always return, so they don't count. */
936 else if (GET_CODE (p) == CALL_INSN && ! CONST_CALL_P (p))
938 /* Past a label or a jump, we get to insns for which we
939 can't count on whether or how many times they will be
940 executed during each iteration. Therefore, we can
941 only move out sets of trivial variables
942 (those not used after the loop). */
943 /* Similar code appears twice in strength_reduce. */
944 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
945 /* If we enter the loop in the middle, and scan around to the
946 beginning, don't set maybe_never for that. This must be an
947 unconditional jump, otherwise the code at the top of the
948 loop might never be executed. Unconditional jumps are
949 followed a by barrier then loop end. */
950 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop->top
951 && NEXT_INSN (NEXT_INSN (p)) == loop_end
952 && any_uncondjump_p (p)))
954 else if (GET_CODE (p) == NOTE)
956 /* At the virtual top of a converted loop, insns are again known to
957 be executed: logically, the loop begins here even though the exit
958 code has been duplicated. */
959 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
960 maybe_never = call_passed = 0;
961 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
963 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
968 /* If one movable subsumes another, ignore that other. */
970 ignore_some_movables (movables);
972 /* For each movable insn, see if the reg that it loads
973 leads when it dies right into another conditionally movable insn.
974 If so, record that the second insn "forces" the first one,
975 since the second can be moved only if the first is. */
977 force_movables (movables);
979 /* See if there are multiple movable insns that load the same value.
980 If there are, make all but the first point at the first one
981 through the `match' field, and add the priorities of them
982 all together as the priority of the first. */
984 combine_movables (movables, regs);
986 /* Now consider each movable insn to decide whether it is worth moving.
987 Store 0 in regs->array[I].set_in_loop for each reg I that is moved.
989 Generally this increases code size, so do not move moveables when
990 optimizing for code size. */
993 move_movables (loop, movables, threshold, insn_count);
995 /* Now candidates that still are negative are those not moved.
996 Change regs->array[I].set_in_loop to indicate that those are not actually
998 for (i = 0; i < regs->num; i++)
999 if (regs->array[i].set_in_loop < 0)
1000 regs->array[i].set_in_loop = regs->array[i].n_times_set;
1002 /* Now that we've moved some things out of the loop, we might be able to
1003 hoist even more memory references. */
1006 /* Recalculate regs->array if load_mems has created new registers. */
1007 if (max_reg_num () > regs->num)
1008 loop_regs_scan (loop, 0, &insn_count);
1010 for (update_start = loop_start;
1011 PREV_INSN (update_start)
1012 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1013 update_start = PREV_INSN (update_start))
1015 update_end = NEXT_INSN (loop_end);
1017 reg_scan_update (update_start, update_end, loop_max_reg);
1018 loop_max_reg = max_reg_num ();
1020 if (flag_strength_reduce)
1022 if (update_end && GET_CODE (update_end) == CODE_LABEL)
1023 /* Ensure our label doesn't go away. */
1024 LABEL_NUSES (update_end)++;
1026 strength_reduce (loop, insn_count, flags);
1028 reg_scan_update (update_start, update_end, loop_max_reg);
1029 loop_max_reg = max_reg_num ();
1031 if (update_end && GET_CODE (update_end) == CODE_LABEL
1032 && --LABEL_NUSES (update_end) == 0)
1033 delete_insn (update_end);
1037 /* The movable information is required for strength reduction. */
1038 loop_movables_free (movables);
1045 /* Add elements to *OUTPUT to record all the pseudo-regs
1046 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1049 record_excess_regs (in_this, not_in_this, output)
1050 rtx in_this, not_in_this;
1057 code = GET_CODE (in_this);
1071 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1072 && ! reg_mentioned_p (in_this, not_in_this))
1073 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1080 fmt = GET_RTX_FORMAT (code);
1081 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1088 for (j = 0; j < XVECLEN (in_this, i); j++)
1089 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1093 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1099 /* Check what regs are referred to in the libcall block ending with INSN,
1100 aside from those mentioned in the equivalent value.
1101 If there are none, return 0.
1102 If there are one or more, return an EXPR_LIST containing all of them. */
1105 libcall_other_reg (insn, equiv)
1108 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1109 rtx p = XEXP (note, 0);
1112 /* First, find all the regs used in the libcall block
1113 that are not mentioned as inputs to the result. */
1117 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1118 || GET_CODE (p) == CALL_INSN)
1119 record_excess_regs (PATTERN (p), equiv, &output);
1126 /* Return 1 if all uses of REG
1127 are between INSN and the end of the basic block. */
1130 reg_in_basic_block_p (insn, reg)
1133 int regno = REGNO (reg);
1136 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1139 /* Search this basic block for the already recorded last use of the reg. */
1140 for (p = insn; p; p = NEXT_INSN (p))
1142 switch (GET_CODE (p))
1149 /* Ordinary insn: if this is the last use, we win. */
1150 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1155 /* Jump insn: if this is the last use, we win. */
1156 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1158 /* Otherwise, it's the end of the basic block, so we lose. */
1163 /* It's the end of the basic block, so we lose. */
1171 /* The "last use" that was recorded can't be found after the first
1172 use. This can happen when the last use was deleted while
1173 processing an inner loop, this inner loop was then completely
1174 unrolled, and the outer loop is always exited after the inner loop,
1175 so that everything after the first use becomes a single basic block. */
1179 /* Compute the benefit of eliminating the insns in the block whose
1180 last insn is LAST. This may be a group of insns used to compute a
1181 value directly or can contain a library call. */
1184 libcall_benefit (last)
1190 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1191 insn != last; insn = NEXT_INSN (insn))
1193 if (GET_CODE (insn) == CALL_INSN)
1194 benefit += 10; /* Assume at least this many insns in a library
1196 else if (GET_CODE (insn) == INSN
1197 && GET_CODE (PATTERN (insn)) != USE
1198 && GET_CODE (PATTERN (insn)) != CLOBBER)
1205 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1208 skip_consec_insns (insn, count)
1212 for (; count > 0; count--)
1216 /* If first insn of libcall sequence, skip to end. */
1217 /* Do this at start of loop, since INSN is guaranteed to
1219 if (GET_CODE (insn) != NOTE
1220 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1221 insn = XEXP (temp, 0);
1224 insn = NEXT_INSN (insn);
1225 while (GET_CODE (insn) == NOTE);
1231 /* Ignore any movable whose insn falls within a libcall
1232 which is part of another movable.
1233 We make use of the fact that the movable for the libcall value
1234 was made later and so appears later on the chain. */
1237 ignore_some_movables (movables)
1238 struct loop_movables *movables;
1240 register struct movable *m, *m1;
1242 for (m = movables->head; m; m = m->next)
1244 /* Is this a movable for the value of a libcall? */
1245 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1249 /* Check for earlier movables inside that range,
1250 and mark them invalid. We cannot use LUIDs here because
1251 insns created by loop.c for prior loops don't have LUIDs.
1252 Rather than reject all such insns from movables, we just
1253 explicitly check each insn in the libcall (since invariant
1254 libcalls aren't that common). */
1255 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1256 for (m1 = movables->head; m1 != m; m1 = m1->next)
1257 if (m1->insn == insn)
1263 /* For each movable insn, see if the reg that it loads
1264 leads when it dies right into another conditionally movable insn.
1265 If so, record that the second insn "forces" the first one,
1266 since the second can be moved only if the first is. */
1269 force_movables (movables)
1270 struct loop_movables *movables;
1272 register struct movable *m, *m1;
1273 for (m1 = movables->head; m1; m1 = m1->next)
1274 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1275 if (!m1->partial && !m1->done)
1277 int regno = m1->regno;
1278 for (m = m1->next; m; m = m->next)
1279 /* ??? Could this be a bug? What if CSE caused the
1280 register of M1 to be used after this insn?
1281 Since CSE does not update regno_last_uid,
1282 this insn M->insn might not be where it dies.
1283 But very likely this doesn't matter; what matters is
1284 that M's reg is computed from M1's reg. */
1285 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1288 if (m != 0 && m->set_src == m1->set_dest
1289 /* If m->consec, m->set_src isn't valid. */
1293 /* Increase the priority of the moving the first insn
1294 since it permits the second to be moved as well. */
1298 m1->lifetime += m->lifetime;
1299 m1->savings += m->savings;
1304 /* Find invariant expressions that are equal and can be combined into
1308 combine_movables (movables, regs)
1309 struct loop_movables *movables;
1310 struct loop_regs *regs;
1312 register struct movable *m;
1313 char *matched_regs = (char *) xmalloc (regs->num);
1314 enum machine_mode mode;
1316 /* Regs that are set more than once are not allowed to match
1317 or be matched. I'm no longer sure why not. */
1318 /* Perhaps testing m->consec_sets would be more appropriate here? */
1320 for (m = movables->head; m; m = m->next)
1321 if (m->match == 0 && regs->array[m->regno].n_times_set == 1
1324 register struct movable *m1;
1325 int regno = m->regno;
1327 memset (matched_regs, 0, regs->num);
1328 matched_regs[regno] = 1;
1330 /* We want later insns to match the first one. Don't make the first
1331 one match any later ones. So start this loop at m->next. */
1332 for (m1 = m->next; m1; m1 = m1->next)
1333 if (m != m1 && m1->match == 0
1334 && regs->array[m1->regno].n_times_set == 1
1335 /* A reg used outside the loop mustn't be eliminated. */
1337 /* A reg used for zero-extending mustn't be eliminated. */
1339 && (matched_regs[m1->regno]
1342 /* Can combine regs with different modes loaded from the
1343 same constant only if the modes are the same or
1344 if both are integer modes with M wider or the same
1345 width as M1. The check for integer is redundant, but
1346 safe, since the only case of differing destination
1347 modes with equal sources is when both sources are
1348 VOIDmode, i.e., CONST_INT. */
1349 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1350 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1351 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1352 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1353 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1354 /* See if the source of M1 says it matches M. */
1355 && ((GET_CODE (m1->set_src) == REG
1356 && matched_regs[REGNO (m1->set_src)])
1357 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1359 && ((m->dependencies == m1->dependencies)
1360 || rtx_equal_p (m->dependencies, m1->dependencies)))
1362 m->lifetime += m1->lifetime;
1363 m->savings += m1->savings;
1366 matched_regs[m1->regno] = 1;
1370 /* Now combine the regs used for zero-extension.
1371 This can be done for those not marked `global'
1372 provided their lives don't overlap. */
1374 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1375 mode = GET_MODE_WIDER_MODE (mode))
1377 register struct movable *m0 = 0;
1379 /* Combine all the registers for extension from mode MODE.
1380 Don't combine any that are used outside this loop. */
1381 for (m = movables->head; m; m = m->next)
1382 if (m->partial && ! m->global
1383 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1385 register struct movable *m1;
1386 int first = REGNO_FIRST_LUID (m->regno);
1387 int last = REGNO_LAST_LUID (m->regno);
1391 /* First one: don't check for overlap, just record it. */
1396 /* Make sure they extend to the same mode.
1397 (Almost always true.) */
1398 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1401 /* We already have one: check for overlap with those
1402 already combined together. */
1403 for (m1 = movables->head; m1 != m; m1 = m1->next)
1404 if (m1 == m0 || (m1->partial && m1->match == m0))
1405 if (! (REGNO_FIRST_LUID (m1->regno) > last
1406 || REGNO_LAST_LUID (m1->regno) < first))
1409 /* No overlap: we can combine this with the others. */
1410 m0->lifetime += m->lifetime;
1411 m0->savings += m->savings;
1421 free (matched_regs);
1424 /* Return 1 if regs X and Y will become the same if moved. */
1427 regs_match_p (x, y, movables)
1429 struct loop_movables *movables;
1431 unsigned int xn = REGNO (x);
1432 unsigned int yn = REGNO (y);
1433 struct movable *mx, *my;
1435 for (mx = movables->head; mx; mx = mx->next)
1436 if (mx->regno == xn)
1439 for (my = movables->head; my; my = my->next)
1440 if (my->regno == yn)
1444 && ((mx->match == my->match && mx->match != 0)
1446 || mx == my->match));
1449 /* Return 1 if X and Y are identical-looking rtx's.
1450 This is the Lisp function EQUAL for rtx arguments.
1452 If two registers are matching movables or a movable register and an
1453 equivalent constant, consider them equal. */
1456 rtx_equal_for_loop_p (x, y, movables, regs)
1458 struct loop_movables *movables;
1459 struct loop_regs *regs;
1463 register struct movable *m;
1464 register enum rtx_code code;
1465 register const char *fmt;
1469 if (x == 0 || y == 0)
1472 code = GET_CODE (x);
1474 /* If we have a register and a constant, they may sometimes be
1476 if (GET_CODE (x) == REG && regs->array[REGNO (x)].set_in_loop == -2
1479 for (m = movables->head; m; m = m->next)
1480 if (m->move_insn && m->regno == REGNO (x)
1481 && rtx_equal_p (m->set_src, y))
1484 else if (GET_CODE (y) == REG && regs->array[REGNO (y)].set_in_loop == -2
1487 for (m = movables->head; m; m = m->next)
1488 if (m->move_insn && m->regno == REGNO (y)
1489 && rtx_equal_p (m->set_src, x))
1493 /* Otherwise, rtx's of different codes cannot be equal. */
1494 if (code != GET_CODE (y))
1497 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1498 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1500 if (GET_MODE (x) != GET_MODE (y))
1503 /* These three types of rtx's can be compared nonrecursively. */
1505 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1507 if (code == LABEL_REF)
1508 return XEXP (x, 0) == XEXP (y, 0);
1509 if (code == SYMBOL_REF)
1510 return XSTR (x, 0) == XSTR (y, 0);
1512 /* Compare the elements. If any pair of corresponding elements
1513 fail to match, return 0 for the whole things. */
1515 fmt = GET_RTX_FORMAT (code);
1516 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1521 if (XWINT (x, i) != XWINT (y, i))
1526 if (XINT (x, i) != XINT (y, i))
1531 /* Two vectors must have the same length. */
1532 if (XVECLEN (x, i) != XVECLEN (y, i))
1535 /* And the corresponding elements must match. */
1536 for (j = 0; j < XVECLEN (x, i); j++)
1537 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
1538 movables, regs) == 0)
1543 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables, regs)
1549 if (strcmp (XSTR (x, i), XSTR (y, i)))
1554 /* These are just backpointers, so they don't matter. */
1560 /* It is believed that rtx's at this level will never
1561 contain anything but integers and other rtx's,
1562 except for within LABEL_REFs and SYMBOL_REFs. */
1570 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1571 insns in INSNS which use the reference. LABEL_NUSES for CODE_LABEL
1572 references is incremented once for each added note. */
1575 add_label_notes (x, insns)
1579 enum rtx_code code = GET_CODE (x);
1584 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1586 /* This code used to ignore labels that referred to dispatch tables to
1587 avoid flow generating (slighly) worse code.
1589 We no longer ignore such label references (see LABEL_REF handling in
1590 mark_jump_label for additional information). */
1591 for (insn = insns; insn; insn = NEXT_INSN (insn))
1592 if (reg_mentioned_p (XEXP (x, 0), insn))
1594 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, XEXP (x, 0),
1596 if (LABEL_P (XEXP (x, 0)))
1597 LABEL_NUSES (XEXP (x, 0))++;
1601 fmt = GET_RTX_FORMAT (code);
1602 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1605 add_label_notes (XEXP (x, i), insns);
1606 else if (fmt[i] == 'E')
1607 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1608 add_label_notes (XVECEXP (x, i, j), insns);
1612 /* Scan MOVABLES, and move the insns that deserve to be moved.
1613 If two matching movables are combined, replace one reg with the
1614 other throughout. */
1617 move_movables (loop, movables, threshold, insn_count)
1619 struct loop_movables *movables;
1623 struct loop_regs *regs = LOOP_REGS (loop);
1624 int nregs = regs->num;
1626 register struct movable *m;
1628 rtx loop_start = loop->start;
1629 rtx loop_end = loop->end;
1630 /* Map of pseudo-register replacements to handle combining
1631 when we move several insns that load the same value
1632 into different pseudo-registers. */
1633 rtx *reg_map = (rtx *) xcalloc (nregs, sizeof (rtx));
1634 char *already_moved = (char *) xcalloc (nregs, sizeof (char));
1638 for (m = movables->head; m; m = m->next)
1640 /* Describe this movable insn. */
1642 if (loop_dump_stream)
1644 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1645 INSN_UID (m->insn), m->regno, m->lifetime);
1647 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1649 fprintf (loop_dump_stream, "cond ");
1651 fprintf (loop_dump_stream, "force ");
1653 fprintf (loop_dump_stream, "global ");
1655 fprintf (loop_dump_stream, "done ");
1657 fprintf (loop_dump_stream, "move-insn ");
1659 fprintf (loop_dump_stream, "matches %d ",
1660 INSN_UID (m->match->insn));
1662 fprintf (loop_dump_stream, "forces %d ",
1663 INSN_UID (m->forces->insn));
1666 /* Count movables. Value used in heuristics in strength_reduce. */
1669 /* Ignore the insn if it's already done (it matched something else).
1670 Otherwise, see if it is now safe to move. */
1674 || (1 == loop_invariant_p (loop, m->set_src)
1675 && (m->dependencies == 0
1676 || 1 == loop_invariant_p (loop, m->dependencies))
1678 || 1 == consec_sets_invariant_p (loop, m->set_dest,
1681 && (! m->forces || m->forces->done))
1685 int savings = m->savings;
1687 /* We have an insn that is safe to move.
1688 Compute its desirability. */
1693 if (loop_dump_stream)
1694 fprintf (loop_dump_stream, "savings %d ", savings);
1696 if (regs->array[regno].moved_once && loop_dump_stream)
1697 fprintf (loop_dump_stream, "halved since already moved ");
1699 /* An insn MUST be moved if we already moved something else
1700 which is safe only if this one is moved too: that is,
1701 if already_moved[REGNO] is nonzero. */
1703 /* An insn is desirable to move if the new lifetime of the
1704 register is no more than THRESHOLD times the old lifetime.
1705 If it's not desirable, it means the loop is so big
1706 that moving won't speed things up much,
1707 and it is liable to make register usage worse. */
1709 /* It is also desirable to move if it can be moved at no
1710 extra cost because something else was already moved. */
1712 if (already_moved[regno]
1713 || flag_move_all_movables
1714 || (threshold * savings * m->lifetime) >=
1715 (regs->array[regno].moved_once ? insn_count * 2 : insn_count)
1716 || (m->forces && m->forces->done
1717 && regs->array[m->forces->regno].n_times_set == 1))
1720 register struct movable *m1;
1721 rtx first = NULL_RTX;
1723 /* Now move the insns that set the reg. */
1725 if (m->partial && m->match)
1729 /* Find the end of this chain of matching regs.
1730 Thus, we load each reg in the chain from that one reg.
1731 And that reg is loaded with 0 directly,
1732 since it has ->match == 0. */
1733 for (m1 = m; m1->match; m1 = m1->match);
1734 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1735 SET_DEST (PATTERN (m1->insn)));
1736 i1 = loop_insn_hoist (loop, newpat);
1738 /* Mark the moved, invariant reg as being allowed to
1739 share a hard reg with the other matching invariant. */
1740 REG_NOTES (i1) = REG_NOTES (m->insn);
1741 r1 = SET_DEST (PATTERN (m->insn));
1742 r2 = SET_DEST (PATTERN (m1->insn));
1744 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1745 gen_rtx_EXPR_LIST (VOIDmode, r2,
1747 delete_insn (m->insn);
1752 if (loop_dump_stream)
1753 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1755 /* If we are to re-generate the item being moved with a
1756 new move insn, first delete what we have and then emit
1757 the move insn before the loop. */
1758 else if (m->move_insn)
1762 for (count = m->consec; count >= 0; count--)
1764 /* If this is the first insn of a library call sequence,
1766 if (GET_CODE (p) != NOTE
1767 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1770 /* If this is the last insn of a libcall sequence, then
1771 delete every insn in the sequence except the last.
1772 The last insn is handled in the normal manner. */
1773 if (GET_CODE (p) != NOTE
1774 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1776 temp = XEXP (temp, 0);
1778 temp = delete_insn (temp);
1782 p = delete_insn (p);
1784 /* simplify_giv_expr expects that it can walk the insns
1785 at m->insn forwards and see this old sequence we are
1786 tossing here. delete_insn does preserve the next
1787 pointers, but when we skip over a NOTE we must fix
1788 it up. Otherwise that code walks into the non-deleted
1790 while (p && GET_CODE (p) == NOTE)
1791 p = NEXT_INSN (temp) = NEXT_INSN (p);
1795 emit_move_insn (m->set_dest, m->set_src);
1796 temp = get_insns ();
1797 seq = gen_sequence ();
1800 add_label_notes (m->set_src, temp);
1802 i1 = loop_insn_hoist (loop, seq);
1803 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1805 = gen_rtx_EXPR_LIST (m->is_equiv ? REG_EQUIV : REG_EQUAL,
1806 m->set_src, REG_NOTES (i1));
1808 if (loop_dump_stream)
1809 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1811 /* The more regs we move, the less we like moving them. */
1816 for (count = m->consec; count >= 0; count--)
1820 /* If first insn of libcall sequence, skip to end. */
1821 /* Do this at start of loop, since p is guaranteed to
1823 if (GET_CODE (p) != NOTE
1824 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1827 /* If last insn of libcall sequence, move all
1828 insns except the last before the loop. The last
1829 insn is handled in the normal manner. */
1830 if (GET_CODE (p) != NOTE
1831 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1835 rtx fn_address_insn = 0;
1838 for (temp = XEXP (temp, 0); temp != p;
1839 temp = NEXT_INSN (temp))
1845 if (GET_CODE (temp) == NOTE)
1848 body = PATTERN (temp);
1850 /* Find the next insn after TEMP,
1851 not counting USE or NOTE insns. */
1852 for (next = NEXT_INSN (temp); next != p;
1853 next = NEXT_INSN (next))
1854 if (! (GET_CODE (next) == INSN
1855 && GET_CODE (PATTERN (next)) == USE)
1856 && GET_CODE (next) != NOTE)
1859 /* If that is the call, this may be the insn
1860 that loads the function address.
1862 Extract the function address from the insn
1863 that loads it into a register.
1864 If this insn was cse'd, we get incorrect code.
1866 So emit a new move insn that copies the
1867 function address into the register that the
1868 call insn will use. flow.c will delete any
1869 redundant stores that we have created. */
1870 if (GET_CODE (next) == CALL_INSN
1871 && GET_CODE (body) == SET
1872 && GET_CODE (SET_DEST (body)) == REG
1873 && (n = find_reg_note (temp, REG_EQUAL,
1876 fn_reg = SET_SRC (body);
1877 if (GET_CODE (fn_reg) != REG)
1878 fn_reg = SET_DEST (body);
1879 fn_address = XEXP (n, 0);
1880 fn_address_insn = temp;
1882 /* We have the call insn.
1883 If it uses the register we suspect it might,
1884 load it with the correct address directly. */
1885 if (GET_CODE (temp) == CALL_INSN
1887 && reg_referenced_p (fn_reg, body))
1888 emit_insn_after (gen_move_insn (fn_reg,
1892 if (GET_CODE (temp) == CALL_INSN)
1894 i1 = emit_call_insn_before (body, loop_start);
1895 /* Because the USAGE information potentially
1896 contains objects other than hard registers
1897 we need to copy it. */
1898 if (CALL_INSN_FUNCTION_USAGE (temp))
1899 CALL_INSN_FUNCTION_USAGE (i1)
1900 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
1903 i1 = loop_insn_hoist (loop, body);
1906 if (temp == fn_address_insn)
1907 fn_address_insn = i1;
1908 REG_NOTES (i1) = REG_NOTES (temp);
1914 if (m->savemode != VOIDmode)
1916 /* P sets REG to zero; but we should clear only
1917 the bits that are not covered by the mode
1919 rtx reg = m->set_dest;
1925 (GET_MODE (reg), and_optab, reg,
1926 GEN_INT ((((HOST_WIDE_INT) 1
1927 << GET_MODE_BITSIZE (m->savemode)))
1929 reg, 1, OPTAB_LIB_WIDEN);
1933 emit_move_insn (reg, tem);
1934 sequence = gen_sequence ();
1936 i1 = loop_insn_hoist (loop, sequence);
1938 else if (GET_CODE (p) == CALL_INSN)
1940 i1 = emit_call_insn_before (PATTERN (p), loop_start);
1941 /* Because the USAGE information potentially
1942 contains objects other than hard registers
1943 we need to copy it. */
1944 if (CALL_INSN_FUNCTION_USAGE (p))
1945 CALL_INSN_FUNCTION_USAGE (i1)
1946 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
1948 else if (count == m->consec && m->move_insn_first)
1951 /* The SET_SRC might not be invariant, so we must
1952 use the REG_EQUAL note. */
1954 emit_move_insn (m->set_dest, m->set_src);
1955 temp = get_insns ();
1956 seq = gen_sequence ();
1959 add_label_notes (m->set_src, temp);
1961 i1 = loop_insn_hoist (loop, seq);
1962 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1964 = gen_rtx_EXPR_LIST ((m->is_equiv ? REG_EQUIV
1966 m->set_src, REG_NOTES (i1));
1969 i1 = loop_insn_hoist (loop, PATTERN (p));
1971 if (REG_NOTES (i1) == 0)
1973 REG_NOTES (i1) = REG_NOTES (p);
1975 /* If there is a REG_EQUAL note present whose value
1976 is not loop invariant, then delete it, since it
1977 may cause problems with later optimization passes.
1978 It is possible for cse to create such notes
1979 like this as a result of record_jump_cond. */
1981 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
1982 && ! loop_invariant_p (loop, XEXP (temp, 0)))
1983 remove_note (i1, temp);
1989 if (loop_dump_stream)
1990 fprintf (loop_dump_stream, " moved to %d",
1993 /* If library call, now fix the REG_NOTES that contain
1994 insn pointers, namely REG_LIBCALL on FIRST
1995 and REG_RETVAL on I1. */
1996 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
1998 XEXP (temp, 0) = first;
1999 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2000 XEXP (temp, 0) = i1;
2007 /* simplify_giv_expr expects that it can walk the insns
2008 at m->insn forwards and see this old sequence we are
2009 tossing here. delete_insn does preserve the next
2010 pointers, but when we skip over a NOTE we must fix
2011 it up. Otherwise that code walks into the non-deleted
2013 while (p && GET_CODE (p) == NOTE)
2014 p = NEXT_INSN (temp) = NEXT_INSN (p);
2017 /* The more regs we move, the less we like moving them. */
2021 /* Any other movable that loads the same register
2023 already_moved[regno] = 1;
2025 /* This reg has been moved out of one loop. */
2026 regs->array[regno].moved_once = 1;
2028 /* The reg set here is now invariant. */
2030 regs->array[regno].set_in_loop = 0;
2034 /* Change the length-of-life info for the register
2035 to say it lives at least the full length of this loop.
2036 This will help guide optimizations in outer loops. */
2038 if (REGNO_FIRST_LUID (regno) > INSN_LUID (loop_start))
2039 /* This is the old insn before all the moved insns.
2040 We can't use the moved insn because it is out of range
2041 in uid_luid. Only the old insns have luids. */
2042 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2043 if (REGNO_LAST_LUID (regno) < INSN_LUID (loop_end))
2044 REGNO_LAST_UID (regno) = INSN_UID (loop_end);
2046 /* Combine with this moved insn any other matching movables. */
2049 for (m1 = movables->head; m1; m1 = m1->next)
2054 /* Schedule the reg loaded by M1
2055 for replacement so that shares the reg of M.
2056 If the modes differ (only possible in restricted
2057 circumstances, make a SUBREG.
2059 Note this assumes that the target dependent files
2060 treat REG and SUBREG equally, including within
2061 GO_IF_LEGITIMATE_ADDRESS and in all the
2062 predicates since we never verify that replacing the
2063 original register with a SUBREG results in a
2064 recognizable insn. */
2065 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2066 reg_map[m1->regno] = m->set_dest;
2069 = gen_lowpart_common (GET_MODE (m1->set_dest),
2072 /* Get rid of the matching insn
2073 and prevent further processing of it. */
2076 /* if library call, delete all insn except last, which
2078 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2081 for (temp = XEXP (temp, 0); temp != m1->insn;
2082 temp = NEXT_INSN (temp))
2085 delete_insn (m1->insn);
2087 /* Any other movable that loads the same register
2089 already_moved[m1->regno] = 1;
2091 /* The reg merged here is now invariant,
2092 if the reg it matches is invariant. */
2094 regs->array[m1->regno].set_in_loop = 0;
2097 else if (loop_dump_stream)
2098 fprintf (loop_dump_stream, "not desirable");
2100 else if (loop_dump_stream && !m->match)
2101 fprintf (loop_dump_stream, "not safe");
2103 if (loop_dump_stream)
2104 fprintf (loop_dump_stream, "\n");
2108 new_start = loop_start;
2110 /* Go through all the instructions in the loop, making
2111 all the register substitutions scheduled in REG_MAP. */
2112 for (p = new_start; p != loop_end; p = NEXT_INSN (p))
2113 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2114 || GET_CODE (p) == CALL_INSN)
2116 replace_regs (PATTERN (p), reg_map, nregs, 0);
2117 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2123 free (already_moved);
2128 loop_movables_add (movables, m)
2129 struct loop_movables *movables;
2132 if (movables->head == 0)
2135 movables->last->next = m;
2141 loop_movables_free (movables)
2142 struct loop_movables *movables;
2145 struct movable *m_next;
2147 for (m = movables->head; m; m = m_next)
2155 /* Scan X and replace the address of any MEM in it with ADDR.
2156 REG is the address that MEM should have before the replacement. */
2159 replace_call_address (x, reg, addr)
2162 register enum rtx_code code;
2164 register const char *fmt;
2168 code = GET_CODE (x);
2182 /* Short cut for very common case. */
2183 replace_call_address (XEXP (x, 1), reg, addr);
2187 /* Short cut for very common case. */
2188 replace_call_address (XEXP (x, 0), reg, addr);
2192 /* If this MEM uses a reg other than the one we expected,
2193 something is wrong. */
2194 if (XEXP (x, 0) != reg)
2203 fmt = GET_RTX_FORMAT (code);
2204 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2207 replace_call_address (XEXP (x, i), reg, addr);
2208 else if (fmt[i] == 'E')
2211 for (j = 0; j < XVECLEN (x, i); j++)
2212 replace_call_address (XVECEXP (x, i, j), reg, addr);
2218 /* Return the number of memory refs to addresses that vary
2222 count_nonfixed_reads (loop, x)
2223 const struct loop *loop;
2226 register enum rtx_code code;
2228 register const char *fmt;
2234 code = GET_CODE (x);
2248 return ((loop_invariant_p (loop, XEXP (x, 0)) != 1)
2249 + count_nonfixed_reads (loop, XEXP (x, 0)));
2256 fmt = GET_RTX_FORMAT (code);
2257 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2260 value += count_nonfixed_reads (loop, XEXP (x, i));
2264 for (j = 0; j < XVECLEN (x, i); j++)
2265 value += count_nonfixed_reads (loop, XVECEXP (x, i, j));
2271 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2272 `has_call', `has_nonconst_call', `has_volatile', `has_tablejump',
2273 `unknown_address_altered', `unknown_constant_address_altered', and
2274 `num_mem_sets' in LOOP. Also, fill in the array `mems' and the
2275 list `store_mems' in LOOP. */
2281 register int level = 1;
2283 struct loop_info *loop_info = LOOP_INFO (loop);
2284 rtx start = loop->start;
2285 rtx end = loop->end;
2286 /* The label after END. Jumping here is just like falling off the
2287 end of the loop. We use next_nonnote_insn instead of next_label
2288 as a hedge against the (pathological) case where some actual insn
2289 might end up between the two. */
2290 rtx exit_target = next_nonnote_insn (end);
2292 loop_info->has_indirect_jump = indirect_jump_in_function;
2293 loop_info->pre_header_has_call = 0;
2294 loop_info->has_call = 0;
2295 loop_info->has_nonconst_call = 0;
2296 loop_info->has_volatile = 0;
2297 loop_info->has_tablejump = 0;
2298 loop_info->has_multiple_exit_targets = 0;
2301 loop_info->unknown_address_altered = 0;
2302 loop_info->unknown_constant_address_altered = 0;
2303 loop_info->store_mems = NULL_RTX;
2304 loop_info->first_loop_store_insn = NULL_RTX;
2305 loop_info->mems_idx = 0;
2306 loop_info->num_mem_sets = 0;
2309 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
2310 insn = PREV_INSN (insn))
2312 if (GET_CODE (insn) == CALL_INSN)
2314 loop_info->pre_header_has_call = 1;
2319 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2320 insn = NEXT_INSN (insn))
2322 if (GET_CODE (insn) == NOTE)
2324 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2327 /* Count number of loops contained in this one. */
2330 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2335 else if (GET_CODE (insn) == CALL_INSN)
2337 if (! CONST_CALL_P (insn))
2339 loop_info->unknown_address_altered = 1;
2340 loop_info->has_nonconst_call = 1;
2342 loop_info->has_call = 1;
2344 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2346 rtx label1 = NULL_RTX;
2347 rtx label2 = NULL_RTX;
2349 if (volatile_refs_p (PATTERN (insn)))
2350 loop_info->has_volatile = 1;
2352 if (GET_CODE (insn) == JUMP_INSN
2353 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2354 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2355 loop_info->has_tablejump = 1;
2357 note_stores (PATTERN (insn), note_addr_stored, loop_info);
2358 if (! loop_info->first_loop_store_insn && loop_info->store_mems)
2359 loop_info->first_loop_store_insn = insn;
2361 if (! loop_info->has_multiple_exit_targets
2362 && GET_CODE (insn) == JUMP_INSN
2363 && GET_CODE (PATTERN (insn)) == SET
2364 && SET_DEST (PATTERN (insn)) == pc_rtx)
2366 if (GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
2368 label1 = XEXP (SET_SRC (PATTERN (insn)), 1);
2369 label2 = XEXP (SET_SRC (PATTERN (insn)), 2);
2373 label1 = SET_SRC (PATTERN (insn));
2378 if (label1 && label1 != pc_rtx)
2380 if (GET_CODE (label1) != LABEL_REF)
2382 /* Something tricky. */
2383 loop_info->has_multiple_exit_targets = 1;
2386 else if (XEXP (label1, 0) != exit_target
2387 && LABEL_OUTSIDE_LOOP_P (label1))
2389 /* A jump outside the current loop. */
2390 loop_info->has_multiple_exit_targets = 1;
2401 else if (GET_CODE (insn) == RETURN)
2402 loop_info->has_multiple_exit_targets = 1;
2405 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2406 if (/* An exception thrown by a called function might land us
2408 ! loop_info->has_nonconst_call
2409 /* We don't want loads for MEMs moved to a location before the
2410 one at which their stack memory becomes allocated. (Note
2411 that this is not a problem for malloc, etc., since those
2412 require actual function calls. */
2413 && ! current_function_calls_alloca
2414 /* There are ways to leave the loop other than falling off the
2416 && ! loop_info->has_multiple_exit_targets)
2417 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2418 insn = NEXT_INSN (insn))
2419 for_each_rtx (&insn, insert_loop_mem, loop_info);
2421 /* BLKmode MEMs are added to LOOP_STORE_MEM as necessary so
2422 that loop_invariant_p and load_mems can use true_dependence
2423 to determine what is really clobbered. */
2424 if (loop_info->unknown_address_altered)
2426 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2428 loop_info->store_mems
2429 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2431 if (loop_info->unknown_constant_address_altered)
2433 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2435 RTX_UNCHANGING_P (mem) = 1;
2436 loop_info->store_mems
2437 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2441 /* Scan the function looking for loops. Record the start and end of each loop.
2442 Also mark as invalid loops any loops that contain a setjmp or are branched
2443 to from outside the loop. */
2446 find_and_verify_loops (f, loops)
2448 struct loops *loops;
2453 struct loop *current_loop;
2454 struct loop *next_loop;
2457 num_loops = loops->num;
2459 compute_luids (f, NULL_RTX, 0);
2461 /* If there are jumps to undefined labels,
2462 treat them as jumps out of any/all loops.
2463 This also avoids writing past end of tables when there are no loops. */
2466 /* Find boundaries of loops, mark which loops are contained within
2467 loops, and invalidate loops that have setjmp. */
2470 current_loop = NULL;
2471 for (insn = f; insn; insn = NEXT_INSN (insn))
2473 if (GET_CODE (insn) == NOTE)
2474 switch (NOTE_LINE_NUMBER (insn))
2476 case NOTE_INSN_LOOP_BEG:
2477 next_loop = loops->array + num_loops;
2478 next_loop->num = num_loops;
2480 next_loop->start = insn;
2481 next_loop->outer = current_loop;
2482 current_loop = next_loop;
2485 case NOTE_INSN_SETJMP:
2486 /* In this case, we must invalidate our current loop and any
2488 for (loop = current_loop; loop; loop = loop->outer)
2491 if (loop_dump_stream)
2492 fprintf (loop_dump_stream,
2493 "\nLoop at %d ignored due to setjmp.\n",
2494 INSN_UID (loop->start));
2498 case NOTE_INSN_LOOP_CONT:
2499 current_loop->cont = insn;
2502 case NOTE_INSN_LOOP_VTOP:
2503 current_loop->vtop = insn;
2506 case NOTE_INSN_LOOP_END:
2510 current_loop->end = insn;
2511 current_loop = current_loop->outer;
2518 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2519 enclosing loop, but this doesn't matter. */
2520 uid_loop[INSN_UID (insn)] = current_loop;
2523 /* Any loop containing a label used in an initializer must be invalidated,
2524 because it can be jumped into from anywhere. */
2526 for (label = forced_labels; label; label = XEXP (label, 1))
2528 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2529 loop; loop = loop->outer)
2533 /* Any loop containing a label used for an exception handler must be
2534 invalidated, because it can be jumped into from anywhere. */
2536 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2538 for (loop = uid_loop[INSN_UID (XEXP (label, 0))];
2539 loop; loop = loop->outer)
2543 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2544 loop that it is not contained within, that loop is marked invalid.
2545 If any INSN or CALL_INSN uses a label's address, then the loop containing
2546 that label is marked invalid, because it could be jumped into from
2549 Also look for blocks of code ending in an unconditional branch that
2550 exits the loop. If such a block is surrounded by a conditional
2551 branch around the block, move the block elsewhere (see below) and
2552 invert the jump to point to the code block. This may eliminate a
2553 label in our loop and will simplify processing by both us and a
2554 possible second cse pass. */
2556 for (insn = f; insn; insn = NEXT_INSN (insn))
2559 struct loop *this_loop = uid_loop[INSN_UID (insn)];
2561 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2563 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2566 for (loop = uid_loop[INSN_UID (XEXP (note, 0))];
2567 loop; loop = loop->outer)
2572 if (GET_CODE (insn) != JUMP_INSN)
2575 mark_loop_jump (PATTERN (insn), this_loop);
2577 /* See if this is an unconditional branch outside the loop. */
2579 && (GET_CODE (PATTERN (insn)) == RETURN
2580 || (any_uncondjump_p (insn)
2581 && onlyjump_p (insn)
2582 && (uid_loop[INSN_UID (JUMP_LABEL (insn))]
2584 && get_max_uid () < max_uid_for_loop)
2587 rtx our_next = next_real_insn (insn);
2588 rtx last_insn_to_move = NEXT_INSN (insn);
2589 struct loop *dest_loop;
2590 struct loop *outer_loop = NULL;
2592 /* Go backwards until we reach the start of the loop, a label,
2594 for (p = PREV_INSN (insn);
2595 GET_CODE (p) != CODE_LABEL
2596 && ! (GET_CODE (p) == NOTE
2597 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2598 && GET_CODE (p) != JUMP_INSN;
2602 /* Check for the case where we have a jump to an inner nested
2603 loop, and do not perform the optimization in that case. */
2605 if (JUMP_LABEL (insn))
2607 dest_loop = uid_loop[INSN_UID (JUMP_LABEL (insn))];
2610 for (outer_loop = dest_loop; outer_loop;
2611 outer_loop = outer_loop->outer)
2612 if (outer_loop == this_loop)
2617 /* Make sure that the target of P is within the current loop. */
2619 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2620 && uid_loop[INSN_UID (JUMP_LABEL (p))] != this_loop)
2621 outer_loop = this_loop;
2623 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2624 we have a block of code to try to move.
2626 We look backward and then forward from the target of INSN
2627 to find a BARRIER at the same loop depth as the target.
2628 If we find such a BARRIER, we make a new label for the start
2629 of the block, invert the jump in P and point it to that label,
2630 and move the block of code to the spot we found. */
2633 && GET_CODE (p) == JUMP_INSN
2634 && JUMP_LABEL (p) != 0
2635 /* Just ignore jumps to labels that were never emitted.
2636 These always indicate compilation errors. */
2637 && INSN_UID (JUMP_LABEL (p)) != 0
2638 && any_condjump_p (p) && onlyjump_p (p)
2639 && next_real_insn (JUMP_LABEL (p)) == our_next
2640 /* If it's not safe to move the sequence, then we
2642 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2643 &last_insn_to_move))
2646 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2647 struct loop *target_loop = uid_loop[INSN_UID (target)];
2650 for (loc = target; loc; loc = PREV_INSN (loc))
2651 if (GET_CODE (loc) == BARRIER
2652 /* Don't move things inside a tablejump. */
2653 && ((loc2 = next_nonnote_insn (loc)) == 0
2654 || GET_CODE (loc2) != CODE_LABEL
2655 || (loc2 = next_nonnote_insn (loc2)) == 0
2656 || GET_CODE (loc2) != JUMP_INSN
2657 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2658 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2659 && uid_loop[INSN_UID (loc)] == target_loop)
2663 for (loc = target; loc; loc = NEXT_INSN (loc))
2664 if (GET_CODE (loc) == BARRIER
2665 /* Don't move things inside a tablejump. */
2666 && ((loc2 = next_nonnote_insn (loc)) == 0
2667 || GET_CODE (loc2) != CODE_LABEL
2668 || (loc2 = next_nonnote_insn (loc2)) == 0
2669 || GET_CODE (loc2) != JUMP_INSN
2670 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2671 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2672 && uid_loop[INSN_UID (loc)] == target_loop)
2677 rtx cond_label = JUMP_LABEL (p);
2678 rtx new_label = get_label_after (p);
2680 /* Ensure our label doesn't go away. */
2681 LABEL_NUSES (cond_label)++;
2683 /* Verify that uid_loop is large enough and that
2685 if (invert_jump (p, new_label, 1))
2689 /* If no suitable BARRIER was found, create a suitable
2690 one before TARGET. Since TARGET is a fall through
2691 path, we'll need to insert an jump around our block
2692 and a add a BARRIER before TARGET.
2694 This creates an extra unconditional jump outside
2695 the loop. However, the benefits of removing rarely
2696 executed instructions from inside the loop usually
2697 outweighs the cost of the extra unconditional jump
2698 outside the loop. */
2703 temp = gen_jump (JUMP_LABEL (insn));
2704 temp = emit_jump_insn_before (temp, target);
2705 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2706 LABEL_NUSES (JUMP_LABEL (insn))++;
2707 loc = emit_barrier_before (target);
2710 /* Include the BARRIER after INSN and copy the
2712 new_label = squeeze_notes (new_label,
2714 reorder_insns (new_label, last_insn_to_move, loc);
2716 /* All those insns are now in TARGET_LOOP. */
2718 q != NEXT_INSN (last_insn_to_move);
2720 uid_loop[INSN_UID (q)] = target_loop;
2722 /* The label jumped to by INSN is no longer a loop
2723 exit. Unless INSN does not have a label (e.g.,
2724 it is a RETURN insn), search loop->exit_labels
2725 to find its label_ref, and remove it. Also turn
2726 off LABEL_OUTSIDE_LOOP_P bit. */
2727 if (JUMP_LABEL (insn))
2729 for (q = 0, r = this_loop->exit_labels;
2731 q = r, r = LABEL_NEXTREF (r))
2732 if (XEXP (r, 0) == JUMP_LABEL (insn))
2734 LABEL_OUTSIDE_LOOP_P (r) = 0;
2736 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2738 this_loop->exit_labels = LABEL_NEXTREF (r);
2742 for (loop = this_loop; loop && loop != target_loop;
2746 /* If we didn't find it, then something is
2752 /* P is now a jump outside the loop, so it must be put
2753 in loop->exit_labels, and marked as such.
2754 The easiest way to do this is to just call
2755 mark_loop_jump again for P. */
2756 mark_loop_jump (PATTERN (p), this_loop);
2758 /* If INSN now jumps to the insn after it,
2760 if (JUMP_LABEL (insn) != 0
2761 && (next_real_insn (JUMP_LABEL (insn))
2762 == next_real_insn (insn)))
2766 /* Continue the loop after where the conditional
2767 branch used to jump, since the only branch insn
2768 in the block (if it still remains) is an inter-loop
2769 branch and hence needs no processing. */
2770 insn = NEXT_INSN (cond_label);
2772 if (--LABEL_NUSES (cond_label) == 0)
2773 delete_insn (cond_label);
2775 /* This loop will be continued with NEXT_INSN (insn). */
2776 insn = PREV_INSN (insn);
2783 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2784 loops it is contained in, mark the target loop invalid.
2786 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2789 mark_loop_jump (x, loop)
2793 struct loop *dest_loop;
2794 struct loop *outer_loop;
2797 switch (GET_CODE (x))
2810 /* There could be a label reference in here. */
2811 mark_loop_jump (XEXP (x, 0), loop);
2817 mark_loop_jump (XEXP (x, 0), loop);
2818 mark_loop_jump (XEXP (x, 1), loop);
2822 /* This may refer to a LABEL_REF or SYMBOL_REF. */
2823 mark_loop_jump (XEXP (x, 1), loop);
2828 mark_loop_jump (XEXP (x, 0), loop);
2832 dest_loop = uid_loop[INSN_UID (XEXP (x, 0))];
2834 /* Link together all labels that branch outside the loop. This
2835 is used by final_[bg]iv_value and the loop unrolling code. Also
2836 mark this LABEL_REF so we know that this branch should predict
2839 /* A check to make sure the label is not in an inner nested loop,
2840 since this does not count as a loop exit. */
2843 for (outer_loop = dest_loop; outer_loop;
2844 outer_loop = outer_loop->outer)
2845 if (outer_loop == loop)
2851 if (loop && ! outer_loop)
2853 LABEL_OUTSIDE_LOOP_P (x) = 1;
2854 LABEL_NEXTREF (x) = loop->exit_labels;
2855 loop->exit_labels = x;
2857 for (outer_loop = loop;
2858 outer_loop && outer_loop != dest_loop;
2859 outer_loop = outer_loop->outer)
2860 outer_loop->exit_count++;
2863 /* If this is inside a loop, but not in the current loop or one enclosed
2864 by it, it invalidates at least one loop. */
2869 /* We must invalidate every nested loop containing the target of this
2870 label, except those that also contain the jump insn. */
2872 for (; dest_loop; dest_loop = dest_loop->outer)
2874 /* Stop when we reach a loop that also contains the jump insn. */
2875 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
2876 if (dest_loop == outer_loop)
2879 /* If we get here, we know we need to invalidate a loop. */
2880 if (loop_dump_stream && ! dest_loop->invalid)
2881 fprintf (loop_dump_stream,
2882 "\nLoop at %d ignored due to multiple entry points.\n",
2883 INSN_UID (dest_loop->start));
2885 dest_loop->invalid = 1;
2890 /* If this is not setting pc, ignore. */
2891 if (SET_DEST (x) == pc_rtx)
2892 mark_loop_jump (SET_SRC (x), loop);
2896 mark_loop_jump (XEXP (x, 1), loop);
2897 mark_loop_jump (XEXP (x, 2), loop);
2902 for (i = 0; i < XVECLEN (x, 0); i++)
2903 mark_loop_jump (XVECEXP (x, 0, i), loop);
2907 for (i = 0; i < XVECLEN (x, 1); i++)
2908 mark_loop_jump (XVECEXP (x, 1, i), loop);
2912 /* Strictly speaking this is not a jump into the loop, only a possible
2913 jump out of the loop. However, we have no way to link the destination
2914 of this jump onto the list of exit labels. To be safe we mark this
2915 loop and any containing loops as invalid. */
2918 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
2920 if (loop_dump_stream && ! outer_loop->invalid)
2921 fprintf (loop_dump_stream,
2922 "\nLoop at %d ignored due to unknown exit jump.\n",
2923 INSN_UID (outer_loop->start));
2924 outer_loop->invalid = 1;
2931 /* Return nonzero if there is a label in the range from
2932 insn INSN to and including the insn whose luid is END
2933 INSN must have an assigned luid (i.e., it must not have
2934 been previously created by loop.c). */
2937 labels_in_range_p (insn, end)
2941 while (insn && INSN_LUID (insn) <= end)
2943 if (GET_CODE (insn) == CODE_LABEL)
2945 insn = NEXT_INSN (insn);
2951 /* Record that a memory reference X is being set. */
2954 note_addr_stored (x, y, data)
2956 rtx y ATTRIBUTE_UNUSED;
2957 void *data ATTRIBUTE_UNUSED;
2959 struct loop_info *loop_info = data;
2961 if (x == 0 || GET_CODE (x) != MEM)
2964 /* Count number of memory writes.
2965 This affects heuristics in strength_reduce. */
2966 loop_info->num_mem_sets++;
2968 /* BLKmode MEM means all memory is clobbered. */
2969 if (GET_MODE (x) == BLKmode)
2971 if (RTX_UNCHANGING_P (x))
2972 loop_info->unknown_constant_address_altered = 1;
2974 loop_info->unknown_address_altered = 1;
2979 loop_info->store_mems = gen_rtx_EXPR_LIST (VOIDmode, x,
2980 loop_info->store_mems);
2983 /* X is a value modified by an INSN that references a biv inside a loop
2984 exit test (ie, X is somehow related to the value of the biv). If X
2985 is a pseudo that is used more than once, then the biv is (effectively)
2986 used more than once. DATA is a pointer to a loop_regs structure. */
2989 note_set_pseudo_multiple_uses (x, y, data)
2991 rtx y ATTRIBUTE_UNUSED;
2994 struct loop_regs *regs = (struct loop_regs *) data;
2999 while (GET_CODE (x) == STRICT_LOW_PART
3000 || GET_CODE (x) == SIGN_EXTRACT
3001 || GET_CODE (x) == ZERO_EXTRACT
3002 || GET_CODE (x) == SUBREG)
3005 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
3008 /* If we do not have usage information, or if we know the register
3009 is used more than once, note that fact for check_dbra_loop. */
3010 if (REGNO (x) >= max_reg_before_loop
3011 || ! regs->array[REGNO (x)].single_usage
3012 || regs->array[REGNO (x)].single_usage == const0_rtx)
3013 regs->multiple_uses = 1;
3016 /* Return nonzero if the rtx X is invariant over the current loop.
3018 The value is 2 if we refer to something only conditionally invariant.
3020 A memory ref is invariant if it is not volatile and does not conflict
3021 with anything stored in `loop_info->store_mems'. */
3024 loop_invariant_p (loop, x)
3025 const struct loop *loop;
3028 struct loop_info *loop_info = LOOP_INFO (loop);
3029 struct loop_regs *regs = LOOP_REGS (loop);
3031 register enum rtx_code code;
3032 register const char *fmt;
3033 int conditional = 0;
3038 code = GET_CODE (x);
3048 /* A LABEL_REF is normally invariant, however, if we are unrolling
3049 loops, and this label is inside the loop, then it isn't invariant.
3050 This is because each unrolled copy of the loop body will have
3051 a copy of this label. If this was invariant, then an insn loading
3052 the address of this label into a register might get moved outside
3053 the loop, and then each loop body would end up using the same label.
3055 We don't know the loop bounds here though, so just fail for all
3057 if (flag_unroll_loops)
3064 case UNSPEC_VOLATILE:
3068 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3069 since the reg might be set by initialization within the loop. */
3071 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3072 || x == arg_pointer_rtx)
3073 && ! current_function_has_nonlocal_goto)
3076 if (LOOP_INFO (loop)->has_call
3077 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3080 if (regs->array[REGNO (x)].set_in_loop < 0)
3083 return regs->array[REGNO (x)].set_in_loop == 0;
3086 /* Volatile memory references must be rejected. Do this before
3087 checking for read-only items, so that volatile read-only items
3088 will be rejected also. */
3089 if (MEM_VOLATILE_P (x))
3092 /* See if there is any dependence between a store and this load. */
3093 mem_list_entry = loop_info->store_mems;
3094 while (mem_list_entry)
3096 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3100 mem_list_entry = XEXP (mem_list_entry, 1);
3103 /* It's not invalidated by a store in memory
3104 but we must still verify the address is invariant. */
3108 /* Don't mess with insns declared volatile. */
3109 if (MEM_VOLATILE_P (x))
3117 fmt = GET_RTX_FORMAT (code);
3118 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3122 int tem = loop_invariant_p (loop, XEXP (x, i));
3128 else if (fmt[i] == 'E')
3131 for (j = 0; j < XVECLEN (x, i); j++)
3133 int tem = loop_invariant_p (loop, XVECEXP (x, i, j));
3143 return 1 + conditional;
3146 /* Return nonzero if all the insns in the loop that set REG
3147 are INSN and the immediately following insns,
3148 and if each of those insns sets REG in an invariant way
3149 (not counting uses of REG in them).
3151 The value is 2 if some of these insns are only conditionally invariant.
3153 We assume that INSN itself is the first set of REG
3154 and that its source is invariant. */
3157 consec_sets_invariant_p (loop, reg, n_sets, insn)
3158 const struct loop *loop;
3162 struct loop_regs *regs = LOOP_REGS (loop);
3164 unsigned int regno = REGNO (reg);
3166 /* Number of sets we have to insist on finding after INSN. */
3167 int count = n_sets - 1;
3168 int old = regs->array[regno].set_in_loop;
3172 /* If N_SETS hit the limit, we can't rely on its value. */
3176 regs->array[regno].set_in_loop = 0;
3180 register enum rtx_code code;
3184 code = GET_CODE (p);
3186 /* If library call, skip to end of it. */
3187 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3192 && (set = single_set (p))
3193 && GET_CODE (SET_DEST (set)) == REG
3194 && REGNO (SET_DEST (set)) == regno)
3196 this = loop_invariant_p (loop, SET_SRC (set));
3199 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3201 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3202 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3204 this = (CONSTANT_P (XEXP (temp, 0))
3205 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3206 && loop_invariant_p (loop, XEXP (temp, 0))));
3213 else if (code != NOTE)
3215 regs->array[regno].set_in_loop = old;
3220 regs->array[regno].set_in_loop = old;
3221 /* If loop_invariant_p ever returned 2, we return 2. */
3222 return 1 + (value & 2);
3226 /* I don't think this condition is sufficient to allow INSN
3227 to be moved, so we no longer test it. */
3229 /* Return 1 if all insns in the basic block of INSN and following INSN
3230 that set REG are invariant according to TABLE. */
3233 all_sets_invariant_p (reg, insn, table)
3237 register rtx p = insn;
3238 register int regno = REGNO (reg);
3242 register enum rtx_code code;
3244 code = GET_CODE (p);
3245 if (code == CODE_LABEL || code == JUMP_INSN)
3247 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3248 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3249 && REGNO (SET_DEST (PATTERN (p))) == regno)
3251 if (! loop_invariant_p (loop, SET_SRC (PATTERN (p)), table))
3258 /* Look at all uses (not sets) of registers in X. For each, if it is
3259 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3260 a different insn, set USAGE[REGNO] to const0_rtx. */
3263 find_single_use_in_loop (regs, insn, x)
3264 struct loop_regs *regs;
3268 enum rtx_code code = GET_CODE (x);
3269 const char *fmt = GET_RTX_FORMAT (code);
3273 regs->array[REGNO (x)].single_usage
3274 = (regs->array[REGNO (x)].single_usage != 0
3275 && regs->array[REGNO (x)].single_usage != insn)
3276 ? const0_rtx : insn;
3278 else if (code == SET)
3280 /* Don't count SET_DEST if it is a REG; otherwise count things
3281 in SET_DEST because if a register is partially modified, it won't
3282 show up as a potential movable so we don't care how USAGE is set
3284 if (GET_CODE (SET_DEST (x)) != REG)
3285 find_single_use_in_loop (regs, insn, SET_DEST (x));
3286 find_single_use_in_loop (regs, insn, SET_SRC (x));
3289 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3291 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3292 find_single_use_in_loop (regs, insn, XEXP (x, i));
3293 else if (fmt[i] == 'E')
3294 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3295 find_single_use_in_loop (regs, insn, XVECEXP (x, i, j));
3299 /* Count and record any set in X which is contained in INSN. Update
3300 REGS->array[I].MAY_NOT_OPTIMIZE and LAST_SET for any register I set
3304 count_one_set (regs, insn, x, last_set)
3305 struct loop_regs *regs;
3309 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3310 /* Don't move a reg that has an explicit clobber.
3311 It's not worth the pain to try to do it correctly. */
3312 regs->array[REGNO (XEXP (x, 0))].may_not_optimize = 1;
3314 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3316 rtx dest = SET_DEST (x);
3317 while (GET_CODE (dest) == SUBREG
3318 || GET_CODE (dest) == ZERO_EXTRACT
3319 || GET_CODE (dest) == SIGN_EXTRACT
3320 || GET_CODE (dest) == STRICT_LOW_PART)
3321 dest = XEXP (dest, 0);
3322 if (GET_CODE (dest) == REG)
3324 register int regno = REGNO (dest);
3325 /* If this is the first setting of this reg
3326 in current basic block, and it was set before,
3327 it must be set in two basic blocks, so it cannot
3328 be moved out of the loop. */
3329 if (regs->array[regno].set_in_loop > 0
3331 regs->array[regno].may_not_optimize = 1;
3332 /* If this is not first setting in current basic block,
3333 see if reg was used in between previous one and this.
3334 If so, neither one can be moved. */
3335 if (last_set[regno] != 0
3336 && reg_used_between_p (dest, last_set[regno], insn))
3337 regs->array[regno].may_not_optimize = 1;
3338 if (regs->array[regno].set_in_loop < 127)
3339 ++regs->array[regno].set_in_loop;
3340 last_set[regno] = insn;
3345 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3346 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3347 contained in insn INSN is used by any insn that precedes INSN in
3348 cyclic order starting from the loop entry point.
3350 We don't want to use INSN_LUID here because if we restrict INSN to those
3351 that have a valid INSN_LUID, it means we cannot move an invariant out
3352 from an inner loop past two loops. */
3355 loop_reg_used_before_p (loop, set, insn)
3356 const struct loop *loop;
3359 rtx reg = SET_DEST (set);
3362 /* Scan forward checking for register usage. If we hit INSN, we
3363 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3364 for (p = loop->scan_start; p != insn; p = NEXT_INSN (p))
3366 if (INSN_P (p) && reg_overlap_mentioned_p (reg, PATTERN (p)))
3376 /* A "basic induction variable" or biv is a pseudo reg that is set
3377 (within this loop) only by incrementing or decrementing it. */
3378 /* A "general induction variable" or giv is a pseudo reg whose
3379 value is a linear function of a biv. */
3381 /* Bivs are recognized by `basic_induction_var';
3382 Givs by `general_induction_var'. */
3384 /* Communication with routines called via `note_stores'. */
3386 static rtx note_insn;
3388 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3390 static rtx addr_placeholder;
3392 /* ??? Unfinished optimizations, and possible future optimizations,
3393 for the strength reduction code. */
3395 /* ??? The interaction of biv elimination, and recognition of 'constant'
3396 bivs, may cause problems. */
3398 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3399 performance problems.
3401 Perhaps don't eliminate things that can be combined with an addressing
3402 mode. Find all givs that have the same biv, mult_val, and add_val;
3403 then for each giv, check to see if its only use dies in a following
3404 memory address. If so, generate a new memory address and check to see
3405 if it is valid. If it is valid, then store the modified memory address,
3406 otherwise, mark the giv as not done so that it will get its own iv. */
3408 /* ??? Could try to optimize branches when it is known that a biv is always
3411 /* ??? When replace a biv in a compare insn, we should replace with closest
3412 giv so that an optimized branch can still be recognized by the combiner,
3413 e.g. the VAX acb insn. */
3415 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3416 was rerun in loop_optimize whenever a register was added or moved.
3417 Also, some of the optimizations could be a little less conservative. */
3419 /* Scan the loop body and call FNCALL for each insn. In the addition to the
3420 LOOP and INSN parameters pass MAYBE_MULTIPLE and NOT_EVERY_ITERATION to the
3423 NOT_EVERY_ITERATION if current insn is not executed at least once for every
3424 loop iteration except for the last one.
3426 MAYBE_MULTIPLE is 1 if current insn may be executed more than once for every
3430 for_each_insn_in_loop (loop, fncall)
3432 loop_insn_callback fncall;
3434 /* This is 1 if current insn is not executed at least once for every loop
3436 int not_every_iteration = 0;
3437 int maybe_multiple = 0;
3438 int past_loop_latch = 0;
3442 /* If loop_scan_start points to the loop exit test, we have to be wary of
3443 subversive use of gotos inside expression statements. */
3444 if (prev_nonnote_insn (loop->scan_start) != prev_nonnote_insn (loop->start))
3445 maybe_multiple = back_branch_in_range_p (loop, loop->scan_start);
3447 /* Scan through loop to find all possible bivs. */
3449 for (p = next_insn_in_loop (loop, loop->scan_start);
3451 p = next_insn_in_loop (loop, p))
3453 p = fncall (loop, p, not_every_iteration, maybe_multiple);
3455 /* Past CODE_LABEL, we get to insns that may be executed multiple
3456 times. The only way we can be sure that they can't is if every
3457 jump insn between here and the end of the loop either
3458 returns, exits the loop, is a jump to a location that is still
3459 behind the label, or is a jump to the loop start. */
3461 if (GET_CODE (p) == CODE_LABEL)
3469 insn = NEXT_INSN (insn);
3470 if (insn == loop->scan_start)
3472 if (insn == loop->end)
3478 if (insn == loop->scan_start)
3482 if (GET_CODE (insn) == JUMP_INSN
3483 && GET_CODE (PATTERN (insn)) != RETURN
3484 && (!any_condjump_p (insn)
3485 || (JUMP_LABEL (insn) != 0
3486 && JUMP_LABEL (insn) != loop->scan_start
3487 && !loop_insn_first_p (p, JUMP_LABEL (insn)))))
3495 /* Past a jump, we get to insns for which we can't count
3496 on whether they will be executed during each iteration. */
3497 /* This code appears twice in strength_reduce. There is also similar
3498 code in scan_loop. */
3499 if (GET_CODE (p) == JUMP_INSN
3500 /* If we enter the loop in the middle, and scan around to the
3501 beginning, don't set not_every_iteration for that.
3502 This can be any kind of jump, since we want to know if insns
3503 will be executed if the loop is executed. */
3504 && !(JUMP_LABEL (p) == loop->top
3505 && ((NEXT_INSN (NEXT_INSN (p)) == loop->end
3506 && any_uncondjump_p (p))
3507 || (NEXT_INSN (p) == loop->end && any_condjump_p (p)))))
3511 /* If this is a jump outside the loop, then it also doesn't
3512 matter. Check to see if the target of this branch is on the
3513 loop->exits_labels list. */
3515 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
3516 if (XEXP (label, 0) == JUMP_LABEL (p))
3520 not_every_iteration = 1;
3523 else if (GET_CODE (p) == NOTE)
3525 /* At the virtual top of a converted loop, insns are again known to
3526 be executed each iteration: logically, the loop begins here
3527 even though the exit code has been duplicated.
3529 Insns are also again known to be executed each iteration at
3530 the LOOP_CONT note. */
3531 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
3532 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
3534 not_every_iteration = 0;
3535 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3537 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3541 /* Note if we pass a loop latch. If we do, then we can not clear
3542 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
3543 a loop since a jump before the last CODE_LABEL may have started
3544 a new loop iteration.
3546 Note that LOOP_TOP is only set for rotated loops and we need
3547 this check for all loops, so compare against the CODE_LABEL
3548 which immediately follows LOOP_START. */
3549 if (GET_CODE (p) == JUMP_INSN
3550 && JUMP_LABEL (p) == NEXT_INSN (loop->start))
3551 past_loop_latch = 1;
3553 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3554 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3555 or not an insn is known to be executed each iteration of the
3556 loop, whether or not any iterations are known to occur.
3558 Therefore, if we have just passed a label and have no more labels
3559 between here and the test insn of the loop, and we have not passed
3560 a jump to the top of the loop, then we know these insns will be
3561 executed each iteration. */
3563 if (not_every_iteration
3565 && GET_CODE (p) == CODE_LABEL
3566 && no_labels_between_p (p, loop->end)
3567 && loop_insn_first_p (p, loop->cont))
3568 not_every_iteration = 0;
3573 loop_bivs_find (loop)
3576 struct loop_regs *regs = LOOP_REGS (loop);
3577 struct loop_ivs *ivs = LOOP_IVS (loop);
3578 /* Temporary list pointers for traversing ivs->list. */
3579 struct iv_class *bl, **backbl;
3583 for_each_insn_in_loop (loop, check_insn_for_bivs);
3585 /* Scan ivs->list to remove all regs that proved not to be bivs.
3586 Make a sanity check against regs->n_times_set. */
3587 for (backbl = &ivs->list, bl = *backbl; bl; bl = bl->next)
3589 if (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
3590 /* Above happens if register modified by subreg, etc. */
3591 /* Make sure it is not recognized as a basic induction var: */
3592 || regs->array[bl->regno].n_times_set != bl->biv_count
3593 /* If never incremented, it is invariant that we decided not to
3594 move. So leave it alone. */
3595 || ! bl->incremented)
3597 if (loop_dump_stream)
3598 fprintf (loop_dump_stream, "Biv %d: discarded, %s\n",
3600 (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
3601 ? "not induction variable"
3602 : (! bl->incremented ? "never incremented"
3605 REG_IV_TYPE (ivs, bl->regno) = NOT_BASIC_INDUCT;
3612 if (loop_dump_stream)
3613 fprintf (loop_dump_stream, "Biv %d: verified\n", bl->regno);
3619 /* Determine how BIVS are initialised by looking through pre-header
3620 extended basic block. */
3622 loop_bivs_init_find (loop)
3625 struct loop_ivs *ivs = LOOP_IVS (loop);
3626 /* Temporary list pointers for traversing ivs->list. */
3627 struct iv_class *bl;
3631 /* Find initial value for each biv by searching backwards from loop_start,
3632 halting at first label. Also record any test condition. */
3635 for (p = loop->start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
3641 if (GET_CODE (p) == CALL_INSN)
3645 note_stores (PATTERN (p), record_initial, ivs);
3647 /* Record any test of a biv that branches around the loop if no store
3648 between it and the start of loop. We only care about tests with
3649 constants and registers and only certain of those. */
3650 if (GET_CODE (p) == JUMP_INSN
3651 && JUMP_LABEL (p) != 0
3652 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop->end)
3653 && (test = get_condition_for_loop (loop, p)) != 0
3654 && GET_CODE (XEXP (test, 0)) == REG
3655 && REGNO (XEXP (test, 0)) < max_reg_before_loop
3656 && (bl = REG_IV_CLASS (ivs, REGNO (XEXP (test, 0)))) != 0
3657 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop->start)
3658 && bl->init_insn == 0)
3660 /* If an NE test, we have an initial value! */
3661 if (GET_CODE (test) == NE)
3664 bl->init_set = gen_rtx_SET (VOIDmode,
3665 XEXP (test, 0), XEXP (test, 1));
3668 bl->initial_test = test;
3674 /* Look at the each biv and see if we can say anything better about its
3675 initial value from any initializing insns set up above. (This is done
3676 in two passes to avoid missing SETs in a PARALLEL.) */
3678 loop_bivs_check (loop)
3681 struct loop_ivs *ivs = LOOP_IVS (loop);
3682 /* Temporary list pointers for traversing ivs->list. */
3683 struct iv_class *bl;
3684 struct iv_class **backbl;
3686 for (backbl = &ivs->list; (bl = *backbl); backbl = &bl->next)
3691 if (! bl->init_insn)
3694 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3695 is a constant, use the value of that. */
3696 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
3697 && CONSTANT_P (XEXP (note, 0)))
3698 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
3699 && CONSTANT_P (XEXP (note, 0))))
3700 src = XEXP (note, 0);
3702 src = SET_SRC (bl->init_set);
3704 if (loop_dump_stream)
3705 fprintf (loop_dump_stream,
3706 "Biv %d: initialized at insn %d: initial value ",
3707 bl->regno, INSN_UID (bl->init_insn));
3709 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
3710 || GET_MODE (src) == VOIDmode)
3711 && valid_initial_value_p (src, bl->init_insn,
3712 LOOP_INFO (loop)->pre_header_has_call,
3715 bl->initial_value = src;
3717 if (loop_dump_stream)
3719 print_simple_rtl (loop_dump_stream, src);
3720 fputc ('\n', loop_dump_stream);
3723 /* If we can't make it a giv,
3724 let biv keep initial value of "itself". */
3725 else if (loop_dump_stream)
3726 fprintf (loop_dump_stream, "is complex\n");
3731 /* Search the loop for general induction variables. */
3734 loop_givs_find (loop)
3737 for_each_insn_in_loop (loop, check_insn_for_givs);
3741 /* For each giv for which we still don't know whether or not it is
3742 replaceable, check to see if it is replaceable because its final value
3743 can be calculated. */
3746 loop_givs_check (loop)
3749 struct loop_ivs *ivs = LOOP_IVS (loop);
3750 struct iv_class *bl;
3752 for (bl = ivs->list; bl; bl = bl->next)
3754 struct induction *v;
3756 for (v = bl->giv; v; v = v->next_iv)
3757 if (! v->replaceable && ! v->not_replaceable)
3758 check_final_value (loop, v);
3763 /* Return non-zero if it is possible to eliminate the biv BL provided
3764 all givs are reduced. This is possible if either the reg is not
3765 used outside the loop, or we can compute what its final value will
3769 loop_biv_eliminable_p (loop, bl, threshold, insn_count)
3771 struct iv_class *bl;
3775 /* For architectures with a decrement_and_branch_until_zero insn,
3776 don't do this if we put a REG_NONNEG note on the endtest for this
3779 #ifdef HAVE_decrement_and_branch_until_zero
3782 if (loop_dump_stream)
3783 fprintf (loop_dump_stream,
3784 "Cannot eliminate nonneg biv %d.\n", bl->regno);
3789 /* Check that biv is used outside loop or if it has a final value.
3790 Compare against bl->init_insn rather than loop->start. We aren't
3791 concerned with any uses of the biv between init_insn and
3792 loop->start since these won't be affected by the value of the biv
3793 elsewhere in the function, so long as init_insn doesn't use the
3796 if ((REGNO_LAST_LUID (bl->regno) < INSN_LUID (loop->end)
3798 && INSN_UID (bl->init_insn) < max_uid_for_loop
3799 && REGNO_FIRST_LUID (bl->regno) >= INSN_LUID (bl->init_insn)
3800 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
3801 || (bl->final_value = final_biv_value (loop, bl)))
3802 return maybe_eliminate_biv (loop, bl, 0, threshold, insn_count);
3804 if (loop_dump_stream)
3806 fprintf (loop_dump_stream,
3807 "Cannot eliminate biv %d.\n",
3809 fprintf (loop_dump_stream,
3810 "First use: insn %d, last use: insn %d.\n",
3811 REGNO_FIRST_UID (bl->regno),
3812 REGNO_LAST_UID (bl->regno));
3818 /* Reduce each giv of BL that we have decided to reduce. */
3821 loop_givs_reduce (loop, bl)
3823 struct iv_class *bl;
3825 struct induction *v;
3827 for (v = bl->giv; v; v = v->next_iv)
3829 struct induction *tv;
3830 if (! v->ignore && v->same == 0)
3832 int auto_inc_opt = 0;
3834 /* If the code for derived givs immediately below has already
3835 allocated a new_reg, we must keep it. */
3837 v->new_reg = gen_reg_rtx (v->mode);
3840 /* If the target has auto-increment addressing modes, and
3841 this is an address giv, then try to put the increment
3842 immediately after its use, so that flow can create an
3843 auto-increment addressing mode. */
3844 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
3845 && bl->biv->always_executed && ! bl->biv->maybe_multiple
3846 /* We don't handle reversed biv's because bl->biv->insn
3847 does not have a valid INSN_LUID. */
3849 && v->always_executed && ! v->maybe_multiple
3850 && INSN_UID (v->insn) < max_uid_for_loop)
3852 /* If other giv's have been combined with this one, then
3853 this will work only if all uses of the other giv's occur
3854 before this giv's insn. This is difficult to check.
3856 We simplify this by looking for the common case where
3857 there is one DEST_REG giv, and this giv's insn is the
3858 last use of the dest_reg of that DEST_REG giv. If the
3859 increment occurs after the address giv, then we can
3860 perform the optimization. (Otherwise, the increment
3861 would have to go before other_giv, and we would not be
3862 able to combine it with the address giv to get an
3863 auto-inc address.) */
3864 if (v->combined_with)
3866 struct induction *other_giv = 0;
3868 for (tv = bl->giv; tv; tv = tv->next_iv)
3876 if (! tv && other_giv
3877 && REGNO (other_giv->dest_reg) < max_reg_before_loop
3878 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
3879 == INSN_UID (v->insn))
3880 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
3883 /* Check for case where increment is before the address
3884 giv. Do this test in "loop order". */
3885 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
3886 && (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
3887 || (INSN_LUID (bl->biv->insn)
3888 > INSN_LUID (loop->scan_start))))
3889 || (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
3890 && (INSN_LUID (loop->scan_start)
3891 < INSN_LUID (bl->biv->insn))))
3900 /* We can't put an insn immediately after one setting
3901 cc0, or immediately before one using cc0. */
3902 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
3903 || (auto_inc_opt == -1
3904 && (prev = prev_nonnote_insn (v->insn)) != 0
3906 && sets_cc0_p (PATTERN (prev))))
3912 v->auto_inc_opt = 1;
3916 /* For each place where the biv is incremented, add an insn
3917 to increment the new, reduced reg for the giv. */
3918 for (tv = bl->biv; tv; tv = tv->next_iv)
3923 insert_before = tv->insn;
3924 else if (auto_inc_opt == 1)
3925 insert_before = NEXT_INSN (v->insn);
3927 insert_before = v->insn;
3929 if (tv->mult_val == const1_rtx)
3930 loop_iv_add_mult_emit_before (loop, tv->add_val, v->mult_val,
3931 v->new_reg, v->new_reg,
3933 else /* tv->mult_val == const0_rtx */
3934 /* A multiply is acceptable here
3935 since this is presumed to be seldom executed. */
3936 loop_iv_add_mult_emit_before (loop, tv->add_val, v->mult_val,
3937 v->add_val, v->new_reg,
3941 /* Add code at loop start to initialize giv's reduced reg. */
3943 loop_iv_add_mult_hoist (loop,
3944 extend_value_for_giv (v, bl->initial_value),
3945 v->mult_val, v->add_val, v->new_reg);
3951 /* Check for givs whose first use is their definition and whose
3952 last use is the definition of another giv. If so, it is likely
3953 dead and should not be used to derive another giv nor to
3957 loop_givs_dead_check (loop, bl)
3958 struct loop *loop ATTRIBUTE_UNUSED;
3959 struct iv_class *bl;
3961 struct induction *v;
3963 for (v = bl->giv; v; v = v->next_iv)
3966 || (v->same && v->same->ignore))
3969 if (v->giv_type == DEST_REG
3970 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
3972 struct induction *v1;
3974 for (v1 = bl->giv; v1; v1 = v1->next_iv)
3975 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
3983 loop_givs_rescan (loop, bl, reg_map)
3985 struct iv_class *bl;
3988 struct induction *v;
3990 for (v = bl->giv; v; v = v->next_iv)
3992 if (v->same && v->same->ignore)
3998 /* Update expression if this was combined, in case other giv was
4001 v->new_reg = replace_rtx (v->new_reg,
4002 v->same->dest_reg, v->same->new_reg);
4004 /* See if this register is known to be a pointer to something. If
4005 so, see if we can find the alignment. First see if there is a
4006 destination register that is a pointer. If so, this shares the
4007 alignment too. Next see if we can deduce anything from the
4008 computational information. If not, and this is a DEST_ADDR
4009 giv, at least we know that it's a pointer, though we don't know
4011 if (GET_CODE (v->new_reg) == REG
4012 && v->giv_type == DEST_REG
4013 && REG_POINTER (v->dest_reg))
4014 mark_reg_pointer (v->new_reg,
4015 REGNO_POINTER_ALIGN (REGNO (v->dest_reg)));
4016 else if (GET_CODE (v->new_reg) == REG
4017 && REG_POINTER (v->src_reg))
4019 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->src_reg));
4022 || GET_CODE (v->add_val) != CONST_INT
4023 || INTVAL (v->add_val) % (align / BITS_PER_UNIT) != 0)
4026 mark_reg_pointer (v->new_reg, align);
4028 else if (GET_CODE (v->new_reg) == REG
4029 && GET_CODE (v->add_val) == REG
4030 && REG_POINTER (v->add_val))
4032 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->add_val));
4034 if (align == 0 || GET_CODE (v->mult_val) != CONST_INT
4035 || INTVAL (v->mult_val) % (align / BITS_PER_UNIT) != 0)
4038 mark_reg_pointer (v->new_reg, align);
4040 else if (GET_CODE (v->new_reg) == REG && v->giv_type == DEST_ADDR)
4041 mark_reg_pointer (v->new_reg, 0);
4043 if (v->giv_type == DEST_ADDR)
4044 /* Store reduced reg as the address in the memref where we found
4046 validate_change (v->insn, v->location, v->new_reg, 0);
4047 else if (v->replaceable)
4049 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4053 /* Not replaceable; emit an insn to set the original giv reg from
4054 the reduced giv, same as above. */
4055 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
4059 /* When a loop is reversed, givs which depend on the reversed
4060 biv, and which are live outside the loop, must be set to their
4061 correct final value. This insn is only needed if the giv is
4062 not replaceable. The correct final value is the same as the
4063 value that the giv starts the reversed loop with. */
4064 if (bl->reversed && ! v->replaceable)
4065 loop_iv_add_mult_sink (loop,
4066 extend_value_for_giv (v, bl->initial_value),
4067 v->mult_val, v->add_val, v->dest_reg);
4068 else if (v->final_value)
4069 loop_insn_sink_or_swim (loop,
4070 gen_move_insn (v->dest_reg, v->final_value));
4072 if (loop_dump_stream)
4074 fprintf (loop_dump_stream, "giv at %d reduced to ",
4075 INSN_UID (v->insn));
4076 print_simple_rtl (loop_dump_stream, v->new_reg);
4077 fprintf (loop_dump_stream, "\n");
4084 loop_giv_reduce_benefit (loop, bl, v, test_reg)
4085 struct loop *loop ATTRIBUTE_UNUSED;
4086 struct iv_class *bl;
4087 struct induction *v;
4093 benefit = v->benefit;
4094 PUT_MODE (test_reg, v->mode);
4095 add_cost = iv_add_mult_cost (bl->biv->add_val, v->mult_val,
4096 test_reg, test_reg);
4098 /* Reduce benefit if not replaceable, since we will insert a
4099 move-insn to replace the insn that calculates this giv. Don't do
4100 this unless the giv is a user variable, since it will often be
4101 marked non-replaceable because of the duplication of the exit
4102 code outside the loop. In such a case, the copies we insert are
4103 dead and will be deleted. So they don't have a cost. Similar
4104 situations exist. */
4105 /* ??? The new final_[bg]iv_value code does a much better job of
4106 finding replaceable giv's, and hence this code may no longer be
4108 if (! v->replaceable && ! bl->eliminable
4109 && REG_USERVAR_P (v->dest_reg))
4110 benefit -= copy_cost;
4112 /* Decrease the benefit to count the add-insns that we will insert
4113 to increment the reduced reg for the giv. ??? This can
4114 overestimate the run-time cost of the additional insns, e.g. if
4115 there are multiple basic blocks that increment the biv, but only
4116 one of these blocks is executed during each iteration. There is
4117 no good way to detect cases like this with the current structure
4118 of the loop optimizer. This code is more accurate for
4119 determining code size than run-time benefits. */
4120 benefit -= add_cost * bl->biv_count;
4122 /* Decide whether to strength-reduce this giv or to leave the code
4123 unchanged (recompute it from the biv each time it is used). This
4124 decision can be made independently for each giv. */
4127 /* Attempt to guess whether autoincrement will handle some of the
4128 new add insns; if so, increase BENEFIT (undo the subtraction of
4129 add_cost that was done above). */
4130 if (v->giv_type == DEST_ADDR
4131 /* Increasing the benefit is risky, since this is only a guess.
4132 Avoid increasing register pressure in cases where there would
4133 be no other benefit from reducing this giv. */
4135 && GET_CODE (v->mult_val) == CONST_INT)
4137 if (HAVE_POST_INCREMENT
4138 && INTVAL (v->mult_val) == GET_MODE_SIZE (GET_MODE (v->mem)))
4139 benefit += add_cost * bl->biv_count;
4140 else if (HAVE_PRE_INCREMENT
4141 && INTVAL (v->mult_val) == GET_MODE_SIZE (GET_MODE (v->mem)))
4142 benefit += add_cost * bl->biv_count;
4143 else if (HAVE_POST_DECREMENT
4144 && -INTVAL (v->mult_val) == GET_MODE_SIZE (GET_MODE (v->mem)))
4145 benefit += add_cost * bl->biv_count;
4146 else if (HAVE_PRE_DECREMENT
4147 && -INTVAL (v->mult_val) == GET_MODE_SIZE (GET_MODE (v->mem)))
4148 benefit += add_cost * bl->biv_count;
4156 /* Free IV structures for LOOP. */
4159 loop_ivs_free (loop)
4162 struct loop_ivs *ivs = LOOP_IVS (loop);
4163 struct iv_class *iv = ivs->list;
4169 struct iv_class *next = iv->next;
4170 struct induction *induction;
4171 struct induction *next_induction;
4173 for (induction = iv->biv; induction; induction = next_induction)
4175 next_induction = induction->next_iv;
4178 for (induction = iv->giv; induction; induction = next_induction)
4180 next_induction = induction->next_iv;
4190 /* Perform strength reduction and induction variable elimination.
4192 Pseudo registers created during this function will be beyond the
4193 last valid index in several tables including
4194 REGS->ARRAY[I].N_TIMES_SET and REGNO_LAST_UID. This does not cause a
4195 problem here, because the added registers cannot be givs outside of
4196 their loop, and hence will never be reconsidered. But scan_loop
4197 must check regnos to make sure they are in bounds. */
4200 strength_reduce (loop, insn_count, flags)
4205 struct loop_info *loop_info = LOOP_INFO (loop);
4206 struct loop_regs *regs = LOOP_REGS (loop);
4207 struct loop_ivs *ivs = LOOP_IVS (loop);
4209 /* Temporary list pointer for traversing ivs->list. */
4210 struct iv_class *bl;
4211 /* Ratio of extra register life span we can justify
4212 for saving an instruction. More if loop doesn't call subroutines
4213 since in that case saving an insn makes more difference
4214 and more registers are available. */
4215 /* ??? could set this to last value of threshold in move_movables */
4216 int threshold = (loop_info->has_call ? 1 : 2) * (3 + n_non_fixed_regs);
4217 /* Map of pseudo-register replacements. */
4218 rtx *reg_map = NULL;
4220 int unrolled_insn_copies = 0;
4221 rtx test_reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
4223 addr_placeholder = gen_reg_rtx (Pmode);
4225 ivs->n_regs = max_reg_before_loop;
4226 ivs->regs = (struct iv *) xcalloc (ivs->n_regs, sizeof (struct iv));
4228 /* Find all BIVs in loop. */
4229 loop_bivs_find (loop);
4231 /* Exit if there are no bivs. */
4234 /* Can still unroll the loop anyways, but indicate that there is no
4235 strength reduction info available. */
4236 if (flags & LOOP_UNROLL)
4237 unroll_loop (loop, insn_count, 0);
4239 loop_ivs_free (loop);
4243 /* Determine how BIVS are initialised by looking through pre-header
4244 extended basic block. */
4245 loop_bivs_init_find (loop);
4247 /* Look at the each biv and see if we can say anything better about its
4248 initial value from any initializing insns set up above. */
4249 loop_bivs_check (loop);
4251 /* Search the loop for general induction variables. */
4252 loop_givs_find (loop);
4254 /* Try to calculate and save the number of loop iterations. This is
4255 set to zero if the actual number can not be calculated. This must
4256 be called after all giv's have been identified, since otherwise it may
4257 fail if the iteration variable is a giv. */
4258 loop_iterations (loop);
4260 /* Now for each giv for which we still don't know whether or not it is
4261 replaceable, check to see if it is replaceable because its final value
4262 can be calculated. This must be done after loop_iterations is called,
4263 so that final_giv_value will work correctly. */
4264 loop_givs_check (loop);
4266 /* Try to prove that the loop counter variable (if any) is always
4267 nonnegative; if so, record that fact with a REG_NONNEG note
4268 so that "decrement and branch until zero" insn can be used. */
4269 check_dbra_loop (loop, insn_count);
4271 /* Create reg_map to hold substitutions for replaceable giv regs.
4272 Some givs might have been made from biv increments, so look at
4273 ivs->reg_iv_type for a suitable size. */
4274 reg_map_size = ivs->n_regs;
4275 reg_map = (rtx *) xcalloc (reg_map_size, sizeof (rtx));
4277 /* Examine each iv class for feasibility of strength reduction/induction
4278 variable elimination. */
4280 for (bl = ivs->list; bl; bl = bl->next)
4282 struct induction *v;
4285 /* Test whether it will be possible to eliminate this biv
4286 provided all givs are reduced. */
4287 bl->eliminable = loop_biv_eliminable_p (loop, bl, threshold, insn_count);
4289 /* Check each extension dependent giv in this class to see if its
4290 root biv is safe from wrapping in the interior mode. */
4291 check_ext_dependant_givs (bl, loop_info);
4293 /* Combine all giv's for this iv_class. */
4294 combine_givs (regs, bl);
4296 /* This will be true at the end, if all givs which depend on this
4297 biv have been strength reduced.
4298 We can't (currently) eliminate the biv unless this is so. */
4299 bl->all_reduced = 1;
4301 for (v = bl->giv; v; v = v->next_iv)
4303 struct induction *tv;
4305 if (v->ignore || v->same)
4308 benefit = loop_giv_reduce_benefit (loop, bl, v, test_reg);
4310 /* If an insn is not to be strength reduced, then set its ignore
4311 flag, and clear bl->all_reduced. */
4313 /* A giv that depends on a reversed biv must be reduced if it is
4314 used after the loop exit, otherwise, it would have the wrong
4315 value after the loop exit. To make it simple, just reduce all
4316 of such giv's whether or not we know they are used after the loop
4319 if (! flag_reduce_all_givs
4320 && v->lifetime * threshold * benefit < insn_count
4323 if (loop_dump_stream)
4324 fprintf (loop_dump_stream,
4325 "giv of insn %d not worth while, %d vs %d.\n",
4327 v->lifetime * threshold * benefit, insn_count);
4329 bl->all_reduced = 0;
4333 /* Check that we can increment the reduced giv without a
4334 multiply insn. If not, reject it. */
4336 for (tv = bl->biv; tv; tv = tv->next_iv)
4337 if (tv->mult_val == const1_rtx
4338 && ! product_cheap_p (tv->add_val, v->mult_val))
4340 if (loop_dump_stream)
4341 fprintf (loop_dump_stream,
4342 "giv of insn %d: would need a multiply.\n",
4343 INSN_UID (v->insn));
4345 bl->all_reduced = 0;
4351 /* Check for givs whose first use is their definition and whose
4352 last use is the definition of another giv. If so, it is likely
4353 dead and should not be used to derive another giv nor to
4355 loop_givs_dead_check (loop, bl);
4357 /* Reduce each giv that we decided to reduce. */
4358 loop_givs_reduce (loop, bl);
4360 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4363 For each giv register that can be reduced now: if replaceable,
4364 substitute reduced reg wherever the old giv occurs;
4365 else add new move insn "giv_reg = reduced_reg". */
4366 loop_givs_rescan (loop, bl, reg_map);
4368 /* All the givs based on the biv bl have been reduced if they
4371 /* For each giv not marked as maybe dead that has been combined with a
4372 second giv, clear any "maybe dead" mark on that second giv.
4373 v->new_reg will either be or refer to the register of the giv it
4376 Doing this clearing avoids problems in biv elimination where
4377 a giv's new_reg is a complex value that can't be put in the
4378 insn but the giv combined with (with a reg as new_reg) is
4379 marked maybe_dead. Since the register will be used in either
4380 case, we'd prefer it be used from the simpler giv. */
4382 for (v = bl->giv; v; v = v->next_iv)
4383 if (! v->maybe_dead && v->same)
4384 v->same->maybe_dead = 0;
4386 /* Try to eliminate the biv, if it is a candidate.
4387 This won't work if ! bl->all_reduced,
4388 since the givs we planned to use might not have been reduced.
4390 We have to be careful that we didn't initially think we could
4391 eliminate this biv because of a giv that we now think may be
4392 dead and shouldn't be used as a biv replacement.
4394 Also, there is the possibility that we may have a giv that looks
4395 like it can be used to eliminate a biv, but the resulting insn
4396 isn't valid. This can happen, for example, on the 88k, where a
4397 JUMP_INSN can compare a register only with zero. Attempts to
4398 replace it with a compare with a constant will fail.
4400 Note that in cases where this call fails, we may have replaced some
4401 of the occurrences of the biv with a giv, but no harm was done in
4402 doing so in the rare cases where it can occur. */
4404 if (bl->all_reduced == 1 && bl->eliminable
4405 && maybe_eliminate_biv (loop, bl, 1, threshold, insn_count))
4407 /* ?? If we created a new test to bypass the loop entirely,
4408 or otherwise drop straight in, based on this test, then
4409 we might want to rewrite it also. This way some later
4410 pass has more hope of removing the initialization of this
4413 /* If final_value != 0, then the biv may be used after loop end
4414 and we must emit an insn to set it just in case.
4416 Reversed bivs already have an insn after the loop setting their
4417 value, so we don't need another one. We can't calculate the
4418 proper final value for such a biv here anyways. */
4419 if (bl->final_value && ! bl->reversed)
4420 loop_insn_sink_or_swim (loop, gen_move_insn
4421 (bl->biv->dest_reg, bl->final_value));
4423 if (loop_dump_stream)
4424 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
4429 /* Go through all the instructions in the loop, making all the
4430 register substitutions scheduled in REG_MAP. */
4432 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
4433 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4434 || GET_CODE (p) == CALL_INSN)
4436 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
4437 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
4441 if (loop_info->n_iterations > 0)
4443 /* When we completely unroll a loop we will likely not need the increment
4444 of the loop BIV and we will not need the conditional branch at the
4446 unrolled_insn_copies = insn_count - 2;
4449 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
4450 need the comparison before the conditional branch at the end of the
4452 unrolled_insn_copies -= 1;
4455 /* We'll need one copy for each loop iteration. */
4456 unrolled_insn_copies *= loop_info->n_iterations;
4458 /* A little slop to account for the ability to remove initialization
4459 code, better CSE, and other secondary benefits of completely
4460 unrolling some loops. */
4461 unrolled_insn_copies -= 1;
4463 /* Clamp the value. */
4464 if (unrolled_insn_copies < 0)
4465 unrolled_insn_copies = 0;
4468 /* Unroll loops from within strength reduction so that we can use the
4469 induction variable information that strength_reduce has already
4470 collected. Always unroll loops that would be as small or smaller
4471 unrolled than when rolled. */
4472 if ((flags & LOOP_UNROLL)
4473 || (loop_info->n_iterations > 0
4474 && unrolled_insn_copies <= insn_count))
4475 unroll_loop (loop, insn_count, 1);
4477 #ifdef HAVE_doloop_end
4478 if (HAVE_doloop_end && (flags & LOOP_BCT) && flag_branch_on_count_reg)
4479 doloop_optimize (loop);
4480 #endif /* HAVE_doloop_end */
4482 if (loop_dump_stream)
4483 fprintf (loop_dump_stream, "\n");
4485 loop_ivs_free (loop);
4490 /*Record all basic induction variables calculated in the insn. */
4492 check_insn_for_bivs (loop, p, not_every_iteration, maybe_multiple)
4495 int not_every_iteration;
4498 struct loop_ivs *ivs = LOOP_IVS (loop);
4505 if (GET_CODE (p) == INSN
4506 && (set = single_set (p))
4507 && GET_CODE (SET_DEST (set)) == REG)
4509 dest_reg = SET_DEST (set);
4510 if (REGNO (dest_reg) < max_reg_before_loop
4511 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
4512 && REG_IV_TYPE (ivs, REGNO (dest_reg)) != NOT_BASIC_INDUCT)
4514 if (basic_induction_var (loop, SET_SRC (set),
4515 GET_MODE (SET_SRC (set)),
4516 dest_reg, p, &inc_val, &mult_val,
4519 /* It is a possible basic induction variable.
4520 Create and initialize an induction structure for it. */
4523 = (struct induction *) xmalloc (sizeof (struct induction));
4525 record_biv (loop, v, p, dest_reg, inc_val, mult_val, location,
4526 not_every_iteration, maybe_multiple);
4527 REG_IV_TYPE (ivs, REGNO (dest_reg)) = BASIC_INDUCT;
4529 else if (REGNO (dest_reg) < ivs->n_regs)
4530 REG_IV_TYPE (ivs, REGNO (dest_reg)) = NOT_BASIC_INDUCT;
4536 /* Record all givs calculated in the insn.
4537 A register is a giv if: it is only set once, it is a function of a
4538 biv and a constant (or invariant), and it is not a biv. */
4540 check_insn_for_givs (loop, p, not_every_iteration, maybe_multiple)
4543 int not_every_iteration;
4546 struct loop_regs *regs = LOOP_REGS (loop);
4549 /* Look for a general induction variable in a register. */
4550 if (GET_CODE (p) == INSN
4551 && (set = single_set (p))
4552 && GET_CODE (SET_DEST (set)) == REG
4553 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
4562 rtx last_consec_insn;
4564 dest_reg = SET_DEST (set);
4565 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
4568 if (/* SET_SRC is a giv. */
4569 (general_induction_var (loop, SET_SRC (set), &src_reg, &add_val,
4570 &mult_val, &ext_val, 0, &benefit, VOIDmode)
4571 /* Equivalent expression is a giv. */
4572 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
4573 && general_induction_var (loop, XEXP (regnote, 0), &src_reg,
4574 &add_val, &mult_val, &ext_val, 0,
4575 &benefit, VOIDmode)))
4576 /* Don't try to handle any regs made by loop optimization.
4577 We have nothing on them in regno_first_uid, etc. */
4578 && REGNO (dest_reg) < max_reg_before_loop
4579 /* Don't recognize a BASIC_INDUCT_VAR here. */
4580 && dest_reg != src_reg
4581 /* This must be the only place where the register is set. */
4582 && (regs->array[REGNO (dest_reg)].n_times_set == 1
4583 /* or all sets must be consecutive and make a giv. */
4584 || (benefit = consec_sets_giv (loop, benefit, p,
4586 &add_val, &mult_val, &ext_val,
4587 &last_consec_insn))))
4590 = (struct induction *) xmalloc (sizeof (struct induction));
4592 /* If this is a library call, increase benefit. */
4593 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
4594 benefit += libcall_benefit (p);
4596 /* Skip the consecutive insns, if there are any. */
4597 if (regs->array[REGNO (dest_reg)].n_times_set != 1)
4598 p = last_consec_insn;
4600 record_giv (loop, v, p, src_reg, dest_reg, mult_val, add_val,
4601 ext_val, benefit, DEST_REG, not_every_iteration,
4602 maybe_multiple, NULL_PTR);
4607 #ifndef DONT_REDUCE_ADDR
4608 /* Look for givs which are memory addresses. */
4609 /* This resulted in worse code on a VAX 8600. I wonder if it
4611 if (GET_CODE (p) == INSN)
4612 find_mem_givs (loop, PATTERN (p), p, not_every_iteration,
4616 /* Update the status of whether giv can derive other givs. This can
4617 change when we pass a label or an insn that updates a biv. */
4618 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4619 || GET_CODE (p) == CODE_LABEL)
4620 update_giv_derive (loop, p);
4624 /* Return 1 if X is a valid source for an initial value (or as value being
4625 compared against in an initial test).
4627 X must be either a register or constant and must not be clobbered between
4628 the current insn and the start of the loop.
4630 INSN is the insn containing X. */
4633 valid_initial_value_p (x, insn, call_seen, loop_start)
4642 /* Only consider pseudos we know about initialized in insns whose luids
4644 if (GET_CODE (x) != REG
4645 || REGNO (x) >= max_reg_before_loop)
4648 /* Don't use call-clobbered registers across a call which clobbers it. On
4649 some machines, don't use any hard registers at all. */
4650 if (REGNO (x) < FIRST_PSEUDO_REGISTER
4651 && (SMALL_REGISTER_CLASSES
4652 || (call_used_regs[REGNO (x)] && call_seen)))
4655 /* Don't use registers that have been clobbered before the start of the
4657 if (reg_set_between_p (x, insn, loop_start))
4663 /* Scan X for memory refs and check each memory address
4664 as a possible giv. INSN is the insn whose pattern X comes from.
4665 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4666 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
4667 more thanonce in each loop iteration. */
4670 find_mem_givs (loop, x, insn, not_every_iteration, maybe_multiple)
4671 const struct loop *loop;
4674 int not_every_iteration, maybe_multiple;
4677 register enum rtx_code code;
4678 register const char *fmt;
4683 code = GET_CODE (x);
4708 /* This code used to disable creating GIVs with mult_val == 1 and
4709 add_val == 0. However, this leads to lost optimizations when
4710 it comes time to combine a set of related DEST_ADDR GIVs, since
4711 this one would not be seen. */
4713 if (general_induction_var (loop, XEXP (x, 0), &src_reg, &add_val,
4714 &mult_val, &ext_val, 1, &benefit,
4717 /* Found one; record it. */
4719 = (struct induction *) xmalloc (sizeof (struct induction));
4721 record_giv (loop, v, insn, src_reg, addr_placeholder, mult_val,
4722 add_val, ext_val, benefit, DEST_ADDR,
4723 not_every_iteration, maybe_multiple, &XEXP (x, 0));
4734 /* Recursively scan the subexpressions for other mem refs. */
4736 fmt = GET_RTX_FORMAT (code);
4737 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4739 find_mem_givs (loop, XEXP (x, i), insn, not_every_iteration,
4741 else if (fmt[i] == 'E')
4742 for (j = 0; j < XVECLEN (x, i); j++)
4743 find_mem_givs (loop, XVECEXP (x, i, j), insn, not_every_iteration,
4747 /* Fill in the data about one biv update.
4748 V is the `struct induction' in which we record the biv. (It is
4749 allocated by the caller, with alloca.)
4750 INSN is the insn that sets it.
4751 DEST_REG is the biv's reg.
4753 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4754 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4755 being set to INC_VAL.
4757 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4758 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4759 can be executed more than once per iteration. If MAYBE_MULTIPLE
4760 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4761 executed exactly once per iteration. */
4764 record_biv (loop, v, insn, dest_reg, inc_val, mult_val, location,
4765 not_every_iteration, maybe_multiple)
4767 struct induction *v;
4773 int not_every_iteration;
4776 struct loop_ivs *ivs = LOOP_IVS (loop);
4777 struct iv_class *bl;
4780 v->src_reg = dest_reg;
4781 v->dest_reg = dest_reg;
4782 v->mult_val = mult_val;
4783 v->add_val = inc_val;
4784 v->ext_dependant = NULL_RTX;
4785 v->location = location;
4786 v->mode = GET_MODE (dest_reg);
4787 v->always_computable = ! not_every_iteration;
4788 v->always_executed = ! not_every_iteration;
4789 v->maybe_multiple = maybe_multiple;
4791 /* Add this to the reg's iv_class, creating a class
4792 if this is the first incrementation of the reg. */
4794 bl = REG_IV_CLASS (ivs, REGNO (dest_reg));
4797 /* Create and initialize new iv_class. */
4799 bl = (struct iv_class *) xmalloc (sizeof (struct iv_class));
4801 bl->regno = REGNO (dest_reg);
4807 /* Set initial value to the reg itself. */
4808 bl->initial_value = dest_reg;
4809 bl->final_value = 0;
4810 /* We haven't seen the initializing insn yet */
4813 bl->initial_test = 0;
4814 bl->incremented = 0;
4818 bl->total_benefit = 0;
4820 /* Add this class to ivs->list. */
4821 bl->next = ivs->list;
4824 /* Put it in the array of biv register classes. */
4825 REG_IV_CLASS (ivs, REGNO (dest_reg)) = bl;
4828 /* Update IV_CLASS entry for this biv. */
4829 v->next_iv = bl->biv;
4832 if (mult_val == const1_rtx)
4833 bl->incremented = 1;
4835 if (loop_dump_stream)
4836 loop_biv_dump (v, loop_dump_stream, 0);
4839 /* Fill in the data about one giv.
4840 V is the `struct induction' in which we record the giv. (It is
4841 allocated by the caller, with alloca.)
4842 INSN is the insn that sets it.
4843 BENEFIT estimates the savings from deleting this insn.
4844 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4845 into a register or is used as a memory address.
4847 SRC_REG is the biv reg which the giv is computed from.
4848 DEST_REG is the giv's reg (if the giv is stored in a reg).
4849 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4850 LOCATION points to the place where this giv's value appears in INSN. */
4853 record_giv (loop, v, insn, src_reg, dest_reg, mult_val, add_val, ext_val,
4854 benefit, type, not_every_iteration, maybe_multiple, location)
4855 const struct loop *loop;
4856 struct induction *v;
4860 rtx mult_val, add_val, ext_val;
4863 int not_every_iteration, maybe_multiple;
4866 struct loop_ivs *ivs = LOOP_IVS (loop);
4867 struct induction *b;
4868 struct iv_class *bl;
4869 rtx set = single_set (insn);
4872 /* Attempt to prove constantness of the values. */
4873 temp = simplify_rtx (add_val);
4878 v->src_reg = src_reg;
4880 v->dest_reg = dest_reg;
4881 v->mult_val = mult_val;
4882 v->add_val = add_val;
4883 v->ext_dependant = ext_val;
4884 v->benefit = benefit;
4885 v->location = location;
4887 v->combined_with = 0;
4888 v->maybe_multiple = maybe_multiple;
4890 v->derive_adjustment = 0;
4896 v->auto_inc_opt = 0;
4900 /* The v->always_computable field is used in update_giv_derive, to
4901 determine whether a giv can be used to derive another giv. For a
4902 DEST_REG giv, INSN computes a new value for the giv, so its value
4903 isn't computable if INSN insn't executed every iteration.
4904 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4905 it does not compute a new value. Hence the value is always computable
4906 regardless of whether INSN is executed each iteration. */
4908 if (type == DEST_ADDR)
4909 v->always_computable = 1;
4911 v->always_computable = ! not_every_iteration;
4913 v->always_executed = ! not_every_iteration;
4915 if (type == DEST_ADDR)
4917 v->mode = GET_MODE (*location);
4920 else /* type == DEST_REG */
4922 v->mode = GET_MODE (SET_DEST (set));
4924 v->lifetime = LOOP_REG_LIFETIME (loop, REGNO (dest_reg));
4926 /* If the lifetime is zero, it means that this register is
4927 really a dead store. So mark this as a giv that can be
4928 ignored. This will not prevent the biv from being eliminated. */
4929 if (v->lifetime == 0)
4932 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
4933 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
4936 /* Add the giv to the class of givs computed from one biv. */
4938 bl = REG_IV_CLASS (ivs, REGNO (src_reg));
4941 v->next_iv = bl->giv;
4943 /* Don't count DEST_ADDR. This is supposed to count the number of
4944 insns that calculate givs. */
4945 if (type == DEST_REG)
4947 bl->total_benefit += benefit;
4950 /* Fatal error, biv missing for this giv? */
4953 if (type == DEST_ADDR)
4957 /* The giv can be replaced outright by the reduced register only if all
4958 of the following conditions are true:
4959 - the insn that sets the giv is always executed on any iteration
4960 on which the giv is used at all
4961 (there are two ways to deduce this:
4962 either the insn is executed on every iteration,
4963 or all uses follow that insn in the same basic block),
4964 - the giv is not used outside the loop
4965 - no assignments to the biv occur during the giv's lifetime. */
4967 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
4968 /* Previous line always fails if INSN was moved by loop opt. */
4969 && REGNO_LAST_LUID (REGNO (dest_reg))
4970 < INSN_LUID (loop->end)
4971 && (! not_every_iteration
4972 || last_use_this_basic_block (dest_reg, insn)))
4974 /* Now check that there are no assignments to the biv within the
4975 giv's lifetime. This requires two separate checks. */
4977 /* Check each biv update, and fail if any are between the first
4978 and last use of the giv.
4980 If this loop contains an inner loop that was unrolled, then
4981 the insn modifying the biv may have been emitted by the loop
4982 unrolling code, and hence does not have a valid luid. Just
4983 mark the biv as not replaceable in this case. It is not very
4984 useful as a biv, because it is used in two different loops.
4985 It is very unlikely that we would be able to optimize the giv
4986 using this biv anyways. */
4989 for (b = bl->biv; b; b = b->next_iv)
4991 if (INSN_UID (b->insn) >= max_uid_for_loop
4992 || ((INSN_LUID (b->insn)
4993 >= REGNO_FIRST_LUID (REGNO (dest_reg)))
4994 && (INSN_LUID (b->insn)
4995 <= REGNO_LAST_LUID (REGNO (dest_reg)))))
4998 v->not_replaceable = 1;
5003 /* If there are any backwards branches that go from after the
5004 biv update to before it, then this giv is not replaceable. */
5006 for (b = bl->biv; b; b = b->next_iv)
5007 if (back_branch_in_range_p (loop, b->insn))
5010 v->not_replaceable = 1;
5016 /* May still be replaceable, we don't have enough info here to
5019 v->not_replaceable = 0;
5023 /* Record whether the add_val contains a const_int, for later use by
5028 v->no_const_addval = 1;
5029 if (tem == const0_rtx)
5031 else if (CONSTANT_P (add_val))
5032 v->no_const_addval = 0;
5033 if (GET_CODE (tem) == PLUS)
5037 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5038 tem = XEXP (tem, 0);
5039 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5040 tem = XEXP (tem, 1);
5044 if (CONSTANT_P (XEXP (tem, 1)))
5045 v->no_const_addval = 0;
5049 if (loop_dump_stream)
5050 loop_giv_dump (v, loop_dump_stream, 0);
5053 /* All this does is determine whether a giv can be made replaceable because
5054 its final value can be calculated. This code can not be part of record_giv
5055 above, because final_giv_value requires that the number of loop iterations
5056 be known, and that can not be accurately calculated until after all givs
5057 have been identified. */
5060 check_final_value (loop, v)
5061 const struct loop *loop;
5062 struct induction *v;
5064 struct loop_ivs *ivs = LOOP_IVS (loop);
5065 struct iv_class *bl;
5066 rtx final_value = 0;
5068 bl = REG_IV_CLASS (ivs, REGNO (v->src_reg));
5070 /* DEST_ADDR givs will never reach here, because they are always marked
5071 replaceable above in record_giv. */
5073 /* The giv can be replaced outright by the reduced register only if all
5074 of the following conditions are true:
5075 - the insn that sets the giv is always executed on any iteration
5076 on which the giv is used at all
5077 (there are two ways to deduce this:
5078 either the insn is executed on every iteration,
5079 or all uses follow that insn in the same basic block),
5080 - its final value can be calculated (this condition is different
5081 than the one above in record_giv)
5082 - it's not used before the it's set
5083 - no assignments to the biv occur during the giv's lifetime. */
5086 /* This is only called now when replaceable is known to be false. */
5087 /* Clear replaceable, so that it won't confuse final_giv_value. */
5091 if ((final_value = final_giv_value (loop, v))
5092 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5094 int biv_increment_seen = 0, before_giv_insn = 0;
5100 /* When trying to determine whether or not a biv increment occurs
5101 during the lifetime of the giv, we can ignore uses of the variable
5102 outside the loop because final_value is true. Hence we can not
5103 use regno_last_uid and regno_first_uid as above in record_giv. */
5105 /* Search the loop to determine whether any assignments to the
5106 biv occur during the giv's lifetime. Start with the insn
5107 that sets the giv, and search around the loop until we come
5108 back to that insn again.
5110 Also fail if there is a jump within the giv's lifetime that jumps
5111 to somewhere outside the lifetime but still within the loop. This
5112 catches spaghetti code where the execution order is not linear, and
5113 hence the above test fails. Here we assume that the giv lifetime
5114 does not extend from one iteration of the loop to the next, so as
5115 to make the test easier. Since the lifetime isn't known yet,
5116 this requires two loops. See also record_giv above. */
5118 last_giv_use = v->insn;
5125 before_giv_insn = 1;
5126 p = NEXT_INSN (loop->start);
5131 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5132 || GET_CODE (p) == CALL_INSN)
5134 /* It is possible for the BIV increment to use the GIV if we
5135 have a cycle. Thus we must be sure to check each insn for
5136 both BIV and GIV uses, and we must check for BIV uses
5139 if (! biv_increment_seen
5140 && reg_set_p (v->src_reg, PATTERN (p)))
5141 biv_increment_seen = 1;
5143 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5145 if (biv_increment_seen || before_giv_insn)
5148 v->not_replaceable = 1;
5156 /* Now that the lifetime of the giv is known, check for branches
5157 from within the lifetime to outside the lifetime if it is still
5167 p = NEXT_INSN (loop->start);
5168 if (p == last_giv_use)
5171 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5172 && LABEL_NAME (JUMP_LABEL (p))
5173 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
5174 && loop_insn_first_p (loop->start, JUMP_LABEL (p)))
5175 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
5176 && loop_insn_first_p (JUMP_LABEL (p), loop->end))))
5179 v->not_replaceable = 1;
5181 if (loop_dump_stream)
5182 fprintf (loop_dump_stream,
5183 "Found branch outside giv lifetime.\n");
5190 /* If it is replaceable, then save the final value. */
5192 v->final_value = final_value;
5195 if (loop_dump_stream && v->replaceable)
5196 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5197 INSN_UID (v->insn), REGNO (v->dest_reg));
5200 /* Update the status of whether a giv can derive other givs.
5202 We need to do something special if there is or may be an update to the biv
5203 between the time the giv is defined and the time it is used to derive
5206 In addition, a giv that is only conditionally set is not allowed to
5207 derive another giv once a label has been passed.
5209 The cases we look at are when a label or an update to a biv is passed. */
5212 update_giv_derive (loop, p)
5213 const struct loop *loop;
5216 struct loop_ivs *ivs = LOOP_IVS (loop);
5217 struct iv_class *bl;
5218 struct induction *biv, *giv;
5222 /* Search all IV classes, then all bivs, and finally all givs.
5224 There are three cases we are concerned with. First we have the situation
5225 of a giv that is only updated conditionally. In that case, it may not
5226 derive any givs after a label is passed.
5228 The second case is when a biv update occurs, or may occur, after the
5229 definition of a giv. For certain biv updates (see below) that are
5230 known to occur between the giv definition and use, we can adjust the
5231 giv definition. For others, or when the biv update is conditional,
5232 we must prevent the giv from deriving any other givs. There are two
5233 sub-cases within this case.
5235 If this is a label, we are concerned with any biv update that is done
5236 conditionally, since it may be done after the giv is defined followed by
5237 a branch here (actually, we need to pass both a jump and a label, but
5238 this extra tracking doesn't seem worth it).
5240 If this is a jump, we are concerned about any biv update that may be
5241 executed multiple times. We are actually only concerned about
5242 backward jumps, but it is probably not worth performing the test
5243 on the jump again here.
5245 If this is a biv update, we must adjust the giv status to show that a
5246 subsequent biv update was performed. If this adjustment cannot be done,
5247 the giv cannot derive further givs. */
5249 for (bl = ivs->list; bl; bl = bl->next)
5250 for (biv = bl->biv; biv; biv = biv->next_iv)
5251 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5254 for (giv = bl->giv; giv; giv = giv->next_iv)
5256 /* If cant_derive is already true, there is no point in
5257 checking all of these conditions again. */
5258 if (giv->cant_derive)
5261 /* If this giv is conditionally set and we have passed a label,
5262 it cannot derive anything. */
5263 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5264 giv->cant_derive = 1;
5266 /* Skip givs that have mult_val == 0, since
5267 they are really invariants. Also skip those that are
5268 replaceable, since we know their lifetime doesn't contain
5270 else if (giv->mult_val == const0_rtx || giv->replaceable)
5273 /* The only way we can allow this giv to derive another
5274 is if this is a biv increment and we can form the product
5275 of biv->add_val and giv->mult_val. In this case, we will
5276 be able to compute a compensation. */
5277 else if (biv->insn == p)
5282 if (biv->mult_val == const1_rtx)
5283 tem = simplify_giv_expr (loop,
5284 gen_rtx_MULT (giv->mode,
5287 &ext_val_dummy, &dummy);
5289 if (tem && giv->derive_adjustment)
5290 tem = simplify_giv_expr
5292 gen_rtx_PLUS (giv->mode, tem, giv->derive_adjustment),
5293 &ext_val_dummy, &dummy);
5296 giv->derive_adjustment = tem;
5298 giv->cant_derive = 1;
5300 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
5301 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
5302 giv->cant_derive = 1;
5307 /* Check whether an insn is an increment legitimate for a basic induction var.
5308 X is the source of insn P, or a part of it.
5309 MODE is the mode in which X should be interpreted.
5311 DEST_REG is the putative biv, also the destination of the insn.
5312 We accept patterns of these forms:
5313 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5314 REG = INVARIANT + REG
5316 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5317 store the additive term into *INC_VAL, and store the place where
5318 we found the additive term into *LOCATION.
5320 If X is an assignment of an invariant into DEST_REG, we set
5321 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5323 We also want to detect a BIV when it corresponds to a variable
5324 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5325 of the variable may be a PLUS that adds a SUBREG of that variable to
5326 an invariant and then sign- or zero-extends the result of the PLUS
5329 Most GIVs in such cases will be in the promoted mode, since that is the
5330 probably the natural computation mode (and almost certainly the mode
5331 used for addresses) on the machine. So we view the pseudo-reg containing
5332 the variable as the BIV, as if it were simply incremented.
5334 Note that treating the entire pseudo as a BIV will result in making
5335 simple increments to any GIVs based on it. However, if the variable
5336 overflows in its declared mode but not its promoted mode, the result will
5337 be incorrect. This is acceptable if the variable is signed, since
5338 overflows in such cases are undefined, but not if it is unsigned, since
5339 those overflows are defined. So we only check for SIGN_EXTEND and
5342 If we cannot find a biv, we return 0. */
5345 basic_induction_var (loop, x, mode, dest_reg, p, inc_val, mult_val, location)
5346 const struct loop *loop;
5348 enum machine_mode mode;
5355 register enum rtx_code code;
5359 code = GET_CODE (x);
5364 if (rtx_equal_p (XEXP (x, 0), dest_reg)
5365 || (GET_CODE (XEXP (x, 0)) == SUBREG
5366 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
5367 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
5369 argp = &XEXP (x, 1);
5371 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
5372 || (GET_CODE (XEXP (x, 1)) == SUBREG
5373 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
5374 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
5376 argp = &XEXP (x, 0);
5382 if (loop_invariant_p (loop, arg) != 1)
5385 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
5386 *mult_val = const1_rtx;
5391 /* If this is a SUBREG for a promoted variable, check the inner
5393 if (SUBREG_PROMOTED_VAR_P (x))
5394 return basic_induction_var (loop, SUBREG_REG (x),
5395 GET_MODE (SUBREG_REG (x)),
5396 dest_reg, p, inc_val, mult_val, location);
5400 /* If this register is assigned in a previous insn, look at its
5401 source, but don't go outside the loop or past a label. */
5403 /* If this sets a register to itself, we would repeat any previous
5404 biv increment if we applied this strategy blindly. */
5405 if (rtx_equal_p (dest_reg, x))
5414 insn = PREV_INSN (insn);
5416 while (insn && GET_CODE (insn) == NOTE
5417 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5421 set = single_set (insn);
5424 dest = SET_DEST (set);
5426 || (GET_CODE (dest) == SUBREG
5427 && (GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD)
5428 && (GET_MODE_CLASS (GET_MODE (dest)) == MODE_INT)
5429 && SUBREG_REG (dest) == x))
5430 return basic_induction_var (loop, SET_SRC (set),
5431 (GET_MODE (SET_SRC (set)) == VOIDmode
5433 : GET_MODE (SET_SRC (set))),
5435 inc_val, mult_val, location);
5437 while (GET_CODE (dest) == SIGN_EXTRACT
5438 || GET_CODE (dest) == ZERO_EXTRACT
5439 || GET_CODE (dest) == SUBREG
5440 || GET_CODE (dest) == STRICT_LOW_PART)
5441 dest = XEXP (dest, 0);
5447 /* Can accept constant setting of biv only when inside inner most loop.
5448 Otherwise, a biv of an inner loop may be incorrectly recognized
5449 as a biv of the outer loop,
5450 causing code to be moved INTO the inner loop. */
5452 if (loop_invariant_p (loop, x) != 1)
5457 /* convert_modes aborts if we try to convert to or from CCmode, so just
5458 exclude that case. It is very unlikely that a condition code value
5459 would be a useful iterator anyways. */
5460 if (loop->level == 1
5461 && GET_MODE_CLASS (mode) != MODE_CC
5462 && GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
5464 /* Possible bug here? Perhaps we don't know the mode of X. */
5465 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
5466 *mult_val = const0_rtx;
5473 return basic_induction_var (loop, XEXP (x, 0), GET_MODE (XEXP (x, 0)),
5474 dest_reg, p, inc_val, mult_val, location);
5477 /* Similar, since this can be a sign extension. */
5478 for (insn = PREV_INSN (p);
5479 (insn && GET_CODE (insn) == NOTE
5480 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
5481 insn = PREV_INSN (insn))
5485 set = single_set (insn);
5487 if (! rtx_equal_p (dest_reg, XEXP (x, 0))
5488 && set && SET_DEST (set) == XEXP (x, 0)
5489 && GET_CODE (XEXP (x, 1)) == CONST_INT
5490 && INTVAL (XEXP (x, 1)) >= 0
5491 && GET_CODE (SET_SRC (set)) == ASHIFT
5492 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
5493 return basic_induction_var (loop, XEXP (SET_SRC (set), 0),
5494 GET_MODE (XEXP (x, 0)),
5495 dest_reg, insn, inc_val, mult_val,
5504 /* A general induction variable (giv) is any quantity that is a linear
5505 function of a basic induction variable,
5506 i.e. giv = biv * mult_val + add_val.
5507 The coefficients can be any loop invariant quantity.
5508 A giv need not be computed directly from the biv;
5509 it can be computed by way of other givs. */
5511 /* Determine whether X computes a giv.
5512 If it does, return a nonzero value
5513 which is the benefit from eliminating the computation of X;
5514 set *SRC_REG to the register of the biv that it is computed from;
5515 set *ADD_VAL and *MULT_VAL to the coefficients,
5516 such that the value of X is biv * mult + add; */
5519 general_induction_var (loop, x, src_reg, add_val, mult_val, ext_val,
5520 is_addr, pbenefit, addr_mode)
5521 const struct loop *loop;
5529 enum machine_mode addr_mode;
5531 struct loop_ivs *ivs = LOOP_IVS (loop);
5534 /* If this is an invariant, forget it, it isn't a giv. */
5535 if (loop_invariant_p (loop, x) == 1)
5539 *ext_val = NULL_RTX;
5540 x = simplify_giv_expr (loop, x, ext_val, pbenefit);
5544 switch (GET_CODE (x))
5548 /* Since this is now an invariant and wasn't before, it must be a giv
5549 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5551 *src_reg = ivs->list->biv->dest_reg;
5552 *mult_val = const0_rtx;
5557 /* This is equivalent to a BIV. */
5559 *mult_val = const1_rtx;
5560 *add_val = const0_rtx;
5564 /* Either (plus (biv) (invar)) or
5565 (plus (mult (biv) (invar_1)) (invar_2)). */
5566 if (GET_CODE (XEXP (x, 0)) == MULT)
5568 *src_reg = XEXP (XEXP (x, 0), 0);
5569 *mult_val = XEXP (XEXP (x, 0), 1);
5573 *src_reg = XEXP (x, 0);
5574 *mult_val = const1_rtx;
5576 *add_val = XEXP (x, 1);
5580 /* ADD_VAL is zero. */
5581 *src_reg = XEXP (x, 0);
5582 *mult_val = XEXP (x, 1);
5583 *add_val = const0_rtx;
5590 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5591 unless they are CONST_INT). */
5592 if (GET_CODE (*add_val) == USE)
5593 *add_val = XEXP (*add_val, 0);
5594 if (GET_CODE (*mult_val) == USE)
5595 *mult_val = XEXP (*mult_val, 0);
5598 *pbenefit += address_cost (orig_x, addr_mode) - reg_address_cost;
5600 *pbenefit += rtx_cost (orig_x, SET);
5602 /* Always return true if this is a giv so it will be detected as such,
5603 even if the benefit is zero or negative. This allows elimination
5604 of bivs that might otherwise not be eliminated. */
5608 /* Given an expression, X, try to form it as a linear function of a biv.
5609 We will canonicalize it to be of the form
5610 (plus (mult (BIV) (invar_1))
5612 with possible degeneracies.
5614 The invariant expressions must each be of a form that can be used as a
5615 machine operand. We surround then with a USE rtx (a hack, but localized
5616 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5617 routine; it is the caller's responsibility to strip them.
5619 If no such canonicalization is possible (i.e., two biv's are used or an
5620 expression that is neither invariant nor a biv or giv), this routine
5623 For a non-zero return, the result will have a code of CONST_INT, USE,
5624 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5626 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5628 static rtx sge_plus PARAMS ((enum machine_mode, rtx, rtx));
5629 static rtx sge_plus_constant PARAMS ((rtx, rtx));
5632 simplify_giv_expr (loop, x, ext_val, benefit)
5633 const struct loop *loop;
5638 struct loop_ivs *ivs = LOOP_IVS (loop);
5639 struct loop_regs *regs = LOOP_REGS (loop);
5640 enum machine_mode mode = GET_MODE (x);
5644 /* If this is not an integer mode, or if we cannot do arithmetic in this
5645 mode, this can't be a giv. */
5646 if (mode != VOIDmode
5647 && (GET_MODE_CLASS (mode) != MODE_INT
5648 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
5651 switch (GET_CODE (x))
5654 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
5655 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
5656 if (arg0 == 0 || arg1 == 0)
5659 /* Put constant last, CONST_INT last if both constant. */
5660 if ((GET_CODE (arg0) == USE
5661 || GET_CODE (arg0) == CONST_INT)
5662 && ! ((GET_CODE (arg0) == USE
5663 && GET_CODE (arg1) == USE)
5664 || GET_CODE (arg1) == CONST_INT))
5665 tem = arg0, arg0 = arg1, arg1 = tem;
5667 /* Handle addition of zero, then addition of an invariant. */
5668 if (arg1 == const0_rtx)
5670 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
5671 switch (GET_CODE (arg0))
5675 /* Adding two invariants must result in an invariant, so enclose
5676 addition operation inside a USE and return it. */
5677 if (GET_CODE (arg0) == USE)
5678 arg0 = XEXP (arg0, 0);
5679 if (GET_CODE (arg1) == USE)
5680 arg1 = XEXP (arg1, 0);
5682 if (GET_CODE (arg0) == CONST_INT)
5683 tem = arg0, arg0 = arg1, arg1 = tem;
5684 if (GET_CODE (arg1) == CONST_INT)
5685 tem = sge_plus_constant (arg0, arg1);
5687 tem = sge_plus (mode, arg0, arg1);
5689 if (GET_CODE (tem) != CONST_INT)
5690 tem = gen_rtx_USE (mode, tem);
5695 /* biv + invar or mult + invar. Return sum. */
5696 return gen_rtx_PLUS (mode, arg0, arg1);
5699 /* (a + invar_1) + invar_2. Associate. */
5701 simplify_giv_expr (loop,
5713 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5714 MULT to reduce cases. */
5715 if (GET_CODE (arg0) == REG)
5716 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
5717 if (GET_CODE (arg1) == REG)
5718 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
5720 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5721 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5722 Recurse to associate the second PLUS. */
5723 if (GET_CODE (arg1) == MULT)
5724 tem = arg0, arg0 = arg1, arg1 = tem;
5726 if (GET_CODE (arg1) == PLUS)
5728 simplify_giv_expr (loop,
5730 gen_rtx_PLUS (mode, arg0,
5735 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5736 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
5739 if (!rtx_equal_p (arg0, arg1))
5742 return simplify_giv_expr (loop,
5751 /* Handle "a - b" as "a + b * (-1)". */
5752 return simplify_giv_expr (loop,
5761 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
5762 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
5763 if (arg0 == 0 || arg1 == 0)
5766 /* Put constant last, CONST_INT last if both constant. */
5767 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
5768 && GET_CODE (arg1) != CONST_INT)
5769 tem = arg0, arg0 = arg1, arg1 = tem;
5771 /* If second argument is not now constant, not giv. */
5772 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
5775 /* Handle multiply by 0 or 1. */
5776 if (arg1 == const0_rtx)
5779 else if (arg1 == const1_rtx)
5782 switch (GET_CODE (arg0))
5785 /* biv * invar. Done. */
5786 return gen_rtx_MULT (mode, arg0, arg1);
5789 /* Product of two constants. */
5790 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
5793 /* invar * invar is a giv, but attempt to simplify it somehow. */
5794 if (GET_CODE (arg1) != CONST_INT)
5797 arg0 = XEXP (arg0, 0);
5798 if (GET_CODE (arg0) == MULT)
5800 /* (invar_0 * invar_1) * invar_2. Associate. */
5801 return simplify_giv_expr (loop,
5810 /* Porpagate the MULT expressions to the intermost nodes. */
5811 else if (GET_CODE (arg0) == PLUS)
5813 /* (invar_0 + invar_1) * invar_2. Distribute. */
5814 return simplify_giv_expr (loop,
5826 return gen_rtx_USE (mode, gen_rtx_MULT (mode, arg0, arg1));
5829 /* (a * invar_1) * invar_2. Associate. */
5830 return simplify_giv_expr (loop,
5839 /* (a + invar_1) * invar_2. Distribute. */
5840 return simplify_giv_expr (loop,
5855 /* Shift by constant is multiply by power of two. */
5856 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
5860 simplify_giv_expr (loop,
5863 GEN_INT ((HOST_WIDE_INT) 1
5864 << INTVAL (XEXP (x, 1)))),
5868 /* "-a" is "a * (-1)" */
5869 return simplify_giv_expr (loop,
5870 gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
5874 /* "~a" is "-a - 1". Silly, but easy. */
5875 return simplify_giv_expr (loop,
5876 gen_rtx_MINUS (mode,
5877 gen_rtx_NEG (mode, XEXP (x, 0)),
5882 /* Already in proper form for invariant. */
5888 /* Conditionally recognize extensions of simple IVs. After we've
5889 computed loop traversal counts and verified the range of the
5890 source IV, we'll reevaluate this as a GIV. */
5891 if (*ext_val == NULL_RTX)
5893 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
5894 if (arg0 && *ext_val == NULL_RTX && GET_CODE (arg0) == REG)
5896 *ext_val = gen_rtx_fmt_e (GET_CODE (x), mode, arg0);
5903 /* If this is a new register, we can't deal with it. */
5904 if (REGNO (x) >= max_reg_before_loop)
5907 /* Check for biv or giv. */
5908 switch (REG_IV_TYPE (ivs, REGNO (x)))
5912 case GENERAL_INDUCT:
5914 struct induction *v = REG_IV_INFO (ivs, REGNO (x));
5916 /* Form expression from giv and add benefit. Ensure this giv
5917 can derive another and subtract any needed adjustment if so. */
5919 /* Increasing the benefit here is risky. The only case in which it
5920 is arguably correct is if this is the only use of V. In other
5921 cases, this will artificially inflate the benefit of the current
5922 giv, and lead to suboptimal code. Thus, it is disabled, since
5923 potentially not reducing an only marginally beneficial giv is
5924 less harmful than reducing many givs that are not really
5927 rtx single_use = regs->array[REGNO (x)].single_usage;
5928 if (single_use && single_use != const0_rtx)
5929 *benefit += v->benefit;
5935 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode,
5936 v->src_reg, v->mult_val),
5939 if (v->derive_adjustment)
5940 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
5941 arg0 = simplify_giv_expr (loop, tem, ext_val, benefit);
5944 if (!v->ext_dependant)
5949 *ext_val = v->ext_dependant;
5957 /* If it isn't an induction variable, and it is invariant, we
5958 may be able to simplify things further by looking through
5959 the bits we just moved outside the loop. */
5960 if (loop_invariant_p (loop, x) == 1)
5963 struct loop_movables *movables = LOOP_MOVABLES (loop);
5965 for (m = movables->head; m; m = m->next)
5966 if (rtx_equal_p (x, m->set_dest))
5968 /* Ok, we found a match. Substitute and simplify. */
5970 /* If we match another movable, we must use that, as
5971 this one is going away. */
5973 return simplify_giv_expr (loop, m->match->set_dest,
5976 /* If consec is non-zero, this is a member of a group of
5977 instructions that were moved together. We handle this
5978 case only to the point of seeking to the last insn and
5979 looking for a REG_EQUAL. Fail if we don't find one. */
5986 tem = NEXT_INSN (tem);
5990 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
5992 tem = XEXP (tem, 0);
5996 tem = single_set (m->insn);
5998 tem = SET_SRC (tem);
6003 /* What we are most interested in is pointer
6004 arithmetic on invariants -- only take
6005 patterns we may be able to do something with. */
6006 if (GET_CODE (tem) == PLUS
6007 || GET_CODE (tem) == MULT
6008 || GET_CODE (tem) == ASHIFT
6009 || GET_CODE (tem) == CONST_INT
6010 || GET_CODE (tem) == SYMBOL_REF)
6012 tem = simplify_giv_expr (loop, tem, ext_val,
6017 else if (GET_CODE (tem) == CONST
6018 && GET_CODE (XEXP (tem, 0)) == PLUS
6019 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6020 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6022 tem = simplify_giv_expr (loop, XEXP (tem, 0),
6034 /* Fall through to general case. */
6036 /* If invariant, return as USE (unless CONST_INT).
6037 Otherwise, not giv. */
6038 if (GET_CODE (x) == USE)
6041 if (loop_invariant_p (loop, x) == 1)
6043 if (GET_CODE (x) == CONST_INT)
6045 if (GET_CODE (x) == CONST
6046 && GET_CODE (XEXP (x, 0)) == PLUS
6047 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6048 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6050 return gen_rtx_USE (mode, x);
6057 /* This routine folds invariants such that there is only ever one
6058 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6061 sge_plus_constant (x, c)
6064 if (GET_CODE (x) == CONST_INT)
6065 return GEN_INT (INTVAL (x) + INTVAL (c));
6066 else if (GET_CODE (x) != PLUS)
6067 return gen_rtx_PLUS (GET_MODE (x), x, c);
6068 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6070 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6071 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6073 else if (GET_CODE (XEXP (x, 0)) == PLUS
6074 || GET_CODE (XEXP (x, 1)) != PLUS)
6076 return gen_rtx_PLUS (GET_MODE (x),
6077 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6081 return gen_rtx_PLUS (GET_MODE (x),
6082 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6087 sge_plus (mode, x, y)
6088 enum machine_mode mode;
6091 while (GET_CODE (y) == PLUS)
6093 rtx a = XEXP (y, 0);
6094 if (GET_CODE (a) == CONST_INT)
6095 x = sge_plus_constant (x, a);
6097 x = gen_rtx_PLUS (mode, x, a);
6100 if (GET_CODE (y) == CONST_INT)
6101 x = sge_plus_constant (x, y);
6103 x = gen_rtx_PLUS (mode, x, y);
6107 /* Help detect a giv that is calculated by several consecutive insns;
6111 The caller has already identified the first insn P as having a giv as dest;
6112 we check that all other insns that set the same register follow
6113 immediately after P, that they alter nothing else,
6114 and that the result of the last is still a giv.
6116 The value is 0 if the reg set in P is not really a giv.
6117 Otherwise, the value is the amount gained by eliminating
6118 all the consecutive insns that compute the value.
6120 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6121 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6123 The coefficients of the ultimate giv value are stored in
6124 *MULT_VAL and *ADD_VAL. */
6127 consec_sets_giv (loop, first_benefit, p, src_reg, dest_reg,
6128 add_val, mult_val, ext_val, last_consec_insn)
6129 const struct loop *loop;
6137 rtx *last_consec_insn;
6139 struct loop_ivs *ivs = LOOP_IVS (loop);
6140 struct loop_regs *regs = LOOP_REGS (loop);
6147 /* Indicate that this is a giv so that we can update the value produced in
6148 each insn of the multi-insn sequence.
6150 This induction structure will be used only by the call to
6151 general_induction_var below, so we can allocate it on our stack.
6152 If this is a giv, our caller will replace the induct var entry with
6153 a new induction structure. */
6154 struct induction *v;
6156 if (REG_IV_TYPE (ivs, REGNO (dest_reg)) != UNKNOWN_INDUCT)
6159 v = (struct induction *) alloca (sizeof (struct induction));
6160 v->src_reg = src_reg;
6161 v->mult_val = *mult_val;
6162 v->add_val = *add_val;
6163 v->benefit = first_benefit;
6165 v->derive_adjustment = 0;
6166 v->ext_dependant = NULL_RTX;
6168 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
6169 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
6171 count = regs->array[REGNO (dest_reg)].n_times_set - 1;
6176 code = GET_CODE (p);
6178 /* If libcall, skip to end of call sequence. */
6179 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6183 && (set = single_set (p))
6184 && GET_CODE (SET_DEST (set)) == REG
6185 && SET_DEST (set) == dest_reg
6186 && (general_induction_var (loop, SET_SRC (set), &src_reg,
6187 add_val, mult_val, ext_val, 0,
6189 /* Giv created by equivalent expression. */
6190 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6191 && general_induction_var (loop, XEXP (temp, 0), &src_reg,
6192 add_val, mult_val, ext_val, 0,
6193 &benefit, VOIDmode)))
6194 && src_reg == v->src_reg)
6196 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6197 benefit += libcall_benefit (p);
6200 v->mult_val = *mult_val;
6201 v->add_val = *add_val;
6202 v->benefit += benefit;
6204 else if (code != NOTE)
6206 /* Allow insns that set something other than this giv to a
6207 constant. Such insns are needed on machines which cannot
6208 include long constants and should not disqualify a giv. */
6210 && (set = single_set (p))
6211 && SET_DEST (set) != dest_reg
6212 && CONSTANT_P (SET_SRC (set)))
6215 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
6220 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
6221 *last_consec_insn = p;
6225 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6226 represented by G1. If no such expression can be found, or it is clear that
6227 it cannot possibly be a valid address, 0 is returned.
6229 To perform the computation, we note that
6232 where `v' is the biv.
6234 So G2 = (y/b) * G1 + (b - a*y/x).
6236 Note that MULT = y/x.
6238 Update: A and B are now allowed to be additive expressions such that
6239 B contains all variables in A. That is, computing B-A will not require
6240 subtracting variables. */
6243 express_from_1 (a, b, mult)
6246 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6248 if (mult == const0_rtx)
6251 /* If MULT is not 1, we cannot handle A with non-constants, since we
6252 would then be required to subtract multiples of the registers in A.
6253 This is theoretically possible, and may even apply to some Fortran
6254 constructs, but it is a lot of work and we do not attempt it here. */
6256 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
6259 /* In general these structures are sorted top to bottom (down the PLUS
6260 chain), but not left to right across the PLUS. If B is a higher
6261 order giv than A, we can strip one level and recurse. If A is higher
6262 order, we'll eventually bail out, but won't know that until the end.
6263 If they are the same, we'll strip one level around this loop. */
6265 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
6267 rtx ra, rb, oa, ob, tmp;
6269 ra = XEXP (a, 0), oa = XEXP (a, 1);
6270 if (GET_CODE (ra) == PLUS)
6271 tmp = ra, ra = oa, oa = tmp;
6273 rb = XEXP (b, 0), ob = XEXP (b, 1);
6274 if (GET_CODE (rb) == PLUS)
6275 tmp = rb, rb = ob, ob = tmp;
6277 if (rtx_equal_p (ra, rb))
6278 /* We matched: remove one reg completely. */
6280 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
6281 /* An alternate match. */
6283 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
6284 /* An alternate match. */
6288 /* Indicates an extra register in B. Strip one level from B and
6289 recurse, hoping B was the higher order expression. */
6290 ob = express_from_1 (a, ob, mult);
6293 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
6297 /* Here we are at the last level of A, go through the cases hoping to
6298 get rid of everything but a constant. */
6300 if (GET_CODE (a) == PLUS)
6304 ra = XEXP (a, 0), oa = XEXP (a, 1);
6305 if (rtx_equal_p (oa, b))
6307 else if (!rtx_equal_p (ra, b))
6310 if (GET_CODE (oa) != CONST_INT)
6313 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
6315 else if (GET_CODE (a) == CONST_INT)
6317 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
6319 else if (CONSTANT_P (a))
6321 return simplify_gen_binary (MINUS, GET_MODE (b) != VOIDmode ? GET_MODE (b) : GET_MODE (a), const0_rtx, a);
6323 else if (GET_CODE (b) == PLUS)
6325 if (rtx_equal_p (a, XEXP (b, 0)))
6327 else if (rtx_equal_p (a, XEXP (b, 1)))
6332 else if (rtx_equal_p (a, b))
6339 express_from (g1, g2)
6340 struct induction *g1, *g2;
6344 /* The value that G1 will be multiplied by must be a constant integer. Also,
6345 the only chance we have of getting a valid address is if b*c/a (see above
6346 for notation) is also an integer. */
6347 if (GET_CODE (g1->mult_val) == CONST_INT
6348 && GET_CODE (g2->mult_val) == CONST_INT)
6350 if (g1->mult_val == const0_rtx
6351 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
6353 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
6355 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
6359 /* ??? Find out if the one is a multiple of the other? */
6363 add = express_from_1 (g1->add_val, g2->add_val, mult);
6364 if (add == NULL_RTX)
6366 /* Failed. If we've got a multiplication factor between G1 and G2,
6367 scale G1's addend and try again. */
6368 if (INTVAL (mult) > 1)
6370 rtx g1_add_val = g1->add_val;
6371 if (GET_CODE (g1_add_val) == MULT
6372 && GET_CODE (XEXP (g1_add_val, 1)) == CONST_INT)
6375 m = INTVAL (mult) * INTVAL (XEXP (g1_add_val, 1));
6376 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val),
6377 XEXP (g1_add_val, 0), GEN_INT (m));
6381 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val), g1_add_val,
6385 add = express_from_1 (g1_add_val, g2->add_val, const1_rtx);
6388 if (add == NULL_RTX)
6391 /* Form simplified final result. */
6392 if (mult == const0_rtx)
6394 else if (mult == const1_rtx)
6395 mult = g1->dest_reg;
6397 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
6399 if (add == const0_rtx)
6403 if (GET_CODE (add) == PLUS
6404 && CONSTANT_P (XEXP (add, 1)))
6406 rtx tem = XEXP (add, 1);
6407 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
6411 return gen_rtx_PLUS (g2->mode, mult, add);
6415 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6416 represented by G1. This indicates that G2 should be combined with G1 and
6417 that G2 can use (either directly or via an address expression) a register
6418 used to represent G1. */
6421 combine_givs_p (g1, g2)
6422 struct induction *g1, *g2;
6426 /* With the introduction of ext dependant givs, we must care for modes.
6427 G2 must not use a wider mode than G1. */
6428 if (GET_MODE_SIZE (g1->mode) < GET_MODE_SIZE (g2->mode))
6431 ret = comb = express_from (g1, g2);
6432 if (comb == NULL_RTX)
6434 if (g1->mode != g2->mode)
6435 ret = gen_lowpart (g2->mode, comb);
6437 /* If these givs are identical, they can be combined. We use the results
6438 of express_from because the addends are not in a canonical form, so
6439 rtx_equal_p is a weaker test. */
6440 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
6441 combination to be the other way round. */
6442 if (comb == g1->dest_reg
6443 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
6448 /* If G2 can be expressed as a function of G1 and that function is valid
6449 as an address and no more expensive than using a register for G2,
6450 the expression of G2 in terms of G1 can be used. */
6452 && g2->giv_type == DEST_ADDR
6453 && memory_address_p (GET_MODE (g2->mem), ret)
6454 /* ??? Looses, especially with -fforce-addr, where *g2->location
6455 will always be a register, and so anything more complicated
6459 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
6461 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
6472 /* Check each extension dependant giv in this class to see if its
6473 root biv is safe from wrapping in the interior mode, which would
6474 make the giv illegal. */
6477 check_ext_dependant_givs (bl, loop_info)
6478 struct iv_class *bl;
6479 struct loop_info *loop_info;
6481 int ze_ok = 0, se_ok = 0, info_ok = 0;
6482 enum machine_mode biv_mode = GET_MODE (bl->biv->src_reg);
6483 HOST_WIDE_INT start_val;
6484 unsigned HOST_WIDE_INT u_end_val, u_start_val;
6486 struct induction *v;
6488 /* Make sure the iteration data is available. We must have
6489 constants in order to be certain of no overflow. */
6490 /* ??? An unknown iteration count with an increment of +-1
6491 combined with friendly exit tests of against an invariant
6492 value is also ameanable to optimization. Not implemented. */
6493 if (loop_info->n_iterations > 0
6494 && bl->initial_value
6495 && GET_CODE (bl->initial_value) == CONST_INT
6496 && (incr = biv_total_increment (bl))
6497 && GET_CODE (incr) == CONST_INT
6498 /* Make sure the host can represent the arithmetic. */
6499 && HOST_BITS_PER_WIDE_INT >= GET_MODE_BITSIZE (biv_mode))
6501 unsigned HOST_WIDE_INT abs_incr, total_incr;
6502 HOST_WIDE_INT s_end_val;
6506 start_val = INTVAL (bl->initial_value);
6507 u_start_val = start_val;
6509 neg_incr = 0, abs_incr = INTVAL (incr);
6510 if (INTVAL (incr) < 0)
6511 neg_incr = 1, abs_incr = -abs_incr;
6512 total_incr = abs_incr * loop_info->n_iterations;
6514 /* Check for host arithmatic overflow. */
6515 if (total_incr / loop_info->n_iterations == abs_incr)
6517 unsigned HOST_WIDE_INT u_max;
6518 HOST_WIDE_INT s_max;
6520 u_end_val = start_val + (neg_incr ? -total_incr : total_incr);
6521 s_end_val = u_end_val;
6522 u_max = GET_MODE_MASK (biv_mode);
6525 /* Check zero extension of biv ok. */
6527 /* Check for host arithmatic overflow. */
6529 ? u_end_val < u_start_val
6530 : u_end_val > u_start_val)
6531 /* Check for target arithmetic overflow. */
6533 ? 1 /* taken care of with host overflow */
6534 : u_end_val <= u_max))
6539 /* Check sign extension of biv ok. */
6540 /* ??? While it is true that overflow with signed and pointer
6541 arithmetic is undefined, I fear too many programmers don't
6542 keep this fact in mind -- myself included on occasion.
6543 So leave alone with the signed overflow optimizations. */
6544 if (start_val >= -s_max - 1
6545 /* Check for host arithmatic overflow. */
6547 ? s_end_val < start_val
6548 : s_end_val > start_val)
6549 /* Check for target arithmetic overflow. */
6551 ? s_end_val >= -s_max - 1
6552 : s_end_val <= s_max))
6559 /* Invalidate givs that fail the tests. */
6560 for (v = bl->giv; v; v = v->next_iv)
6561 if (v->ext_dependant)
6563 enum rtx_code code = GET_CODE (v->ext_dependant);
6576 /* We don't know whether this value is being used as either
6577 signed or unsigned, so to safely truncate we must satisfy
6578 both. The initial check here verifies the BIV itself;
6579 once that is successful we may check its range wrt the
6583 enum machine_mode outer_mode = GET_MODE (v->ext_dependant);
6584 unsigned HOST_WIDE_INT max = GET_MODE_MASK (outer_mode) >> 1;
6586 /* We know from the above that both endpoints are nonnegative,
6587 and that there is no wrapping. Verify that both endpoints
6588 are within the (signed) range of the outer mode. */
6589 if (u_start_val <= max && u_end_val <= max)
6600 if (loop_dump_stream)
6602 fprintf (loop_dump_stream,
6603 "Verified ext dependant giv at %d of reg %d\n",
6604 INSN_UID (v->insn), bl->regno);
6609 if (loop_dump_stream)
6614 why = "biv iteration values overflowed";
6618 incr = biv_total_increment (bl);
6619 if (incr == const1_rtx)
6620 why = "biv iteration info incomplete; incr by 1";
6622 why = "biv iteration info incomplete";
6625 fprintf (loop_dump_stream,
6626 "Failed ext dependant giv at %d, %s\n",
6627 INSN_UID (v->insn), why);
6634 /* Generate a version of VALUE in a mode appropriate for initializing V. */
6637 extend_value_for_giv (v, value)
6638 struct induction *v;
6641 rtx ext_dep = v->ext_dependant;
6646 /* Recall that check_ext_dependant_givs verified that the known bounds
6647 of a biv did not overflow or wrap with respect to the extension for
6648 the giv. Therefore, constants need no additional adjustment. */
6649 if (CONSTANT_P (value) && GET_MODE (value) == VOIDmode)
6652 /* Otherwise, we must adjust the value to compensate for the
6653 differing modes of the biv and the giv. */
6654 return gen_rtx_fmt_e (GET_CODE (ext_dep), GET_MODE (ext_dep), value);
6657 struct combine_givs_stats
6664 cmp_combine_givs_stats (xp, yp)
6668 const struct combine_givs_stats * const x =
6669 (const struct combine_givs_stats *) xp;
6670 const struct combine_givs_stats * const y =
6671 (const struct combine_givs_stats *) yp;
6673 d = y->total_benefit - x->total_benefit;
6674 /* Stabilize the sort. */
6676 d = x->giv_number - y->giv_number;
6680 /* Check all pairs of givs for iv_class BL and see if any can be combined with
6681 any other. If so, point SAME to the giv combined with and set NEW_REG to
6682 be an expression (in terms of the other giv's DEST_REG) equivalent to the
6683 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
6686 combine_givs (regs, bl)
6687 struct loop_regs *regs;
6688 struct iv_class *bl;
6690 /* Additional benefit to add for being combined multiple times. */
6691 const int extra_benefit = 3;
6693 struct induction *g1, *g2, **giv_array;
6694 int i, j, k, giv_count;
6695 struct combine_givs_stats *stats;
6698 /* Count givs, because bl->giv_count is incorrect here. */
6700 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6705 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
6707 for (g1 = bl->giv; g1; g1 = g1->next_iv)
6709 giv_array[i++] = g1;
6711 stats = (struct combine_givs_stats *) xcalloc (giv_count, sizeof (*stats));
6712 can_combine = (rtx *) xcalloc (giv_count, giv_count * sizeof (rtx));
6714 for (i = 0; i < giv_count; i++)
6720 stats[i].giv_number = i;
6722 /* If a DEST_REG GIV is used only once, do not allow it to combine
6723 with anything, for in doing so we will gain nothing that cannot
6724 be had by simply letting the GIV with which we would have combined
6725 to be reduced on its own. The losage shows up in particular with
6726 DEST_ADDR targets on hosts with reg+reg addressing, though it can
6727 be seen elsewhere as well. */
6728 if (g1->giv_type == DEST_REG
6729 && (single_use = regs->array[REGNO (g1->dest_reg)].single_usage)
6730 && single_use != const0_rtx)
6733 this_benefit = g1->benefit;
6734 /* Add an additional weight for zero addends. */
6735 if (g1->no_const_addval)
6738 for (j = 0; j < giv_count; j++)
6744 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
6746 can_combine[i * giv_count + j] = this_combine;
6747 this_benefit += g2->benefit + extra_benefit;
6750 stats[i].total_benefit = this_benefit;
6753 /* Iterate, combining until we can't. */
6755 qsort (stats, giv_count, sizeof (*stats), cmp_combine_givs_stats);
6757 if (loop_dump_stream)
6759 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
6760 for (k = 0; k < giv_count; k++)
6762 g1 = giv_array[stats[k].giv_number];
6763 if (!g1->combined_with && !g1->same)
6764 fprintf (loop_dump_stream, " {%d, %d}",
6765 INSN_UID (giv_array[stats[k].giv_number]->insn),
6766 stats[k].total_benefit);
6768 putc ('\n', loop_dump_stream);
6771 for (k = 0; k < giv_count; k++)
6773 int g1_add_benefit = 0;
6775 i = stats[k].giv_number;
6778 /* If it has already been combined, skip. */
6779 if (g1->combined_with || g1->same)
6782 for (j = 0; j < giv_count; j++)
6785 if (g1 != g2 && can_combine[i * giv_count + j]
6786 /* If it has already been combined, skip. */
6787 && ! g2->same && ! g2->combined_with)
6791 g2->new_reg = can_combine[i * giv_count + j];
6793 g1->combined_with++;
6794 g1->lifetime += g2->lifetime;
6796 g1_add_benefit += g2->benefit;
6798 /* ??? The new final_[bg]iv_value code does a much better job
6799 of finding replaceable giv's, and hence this code may no
6800 longer be necessary. */
6801 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
6802 g1_add_benefit -= copy_cost;
6804 /* To help optimize the next set of combinations, remove
6805 this giv from the benefits of other potential mates. */
6806 for (l = 0; l < giv_count; ++l)
6808 int m = stats[l].giv_number;
6809 if (can_combine[m * giv_count + j])
6810 stats[l].total_benefit -= g2->benefit + extra_benefit;
6813 if (loop_dump_stream)
6814 fprintf (loop_dump_stream,
6815 "giv at %d combined with giv at %d; new benefit %d + %d, lifetime %d\n",
6816 INSN_UID (g2->insn), INSN_UID (g1->insn),
6817 g1->benefit, g1_add_benefit, g1->lifetime);
6821 /* To help optimize the next set of combinations, remove
6822 this giv from the benefits of other potential mates. */
6823 if (g1->combined_with)
6825 for (j = 0; j < giv_count; ++j)
6827 int m = stats[j].giv_number;
6828 if (can_combine[m * giv_count + i])
6829 stats[j].total_benefit -= g1->benefit + extra_benefit;
6832 g1->benefit += g1_add_benefit;
6834 /* We've finished with this giv, and everything it touched.
6835 Restart the combination so that proper weights for the
6836 rest of the givs are properly taken into account. */
6837 /* ??? Ideally we would compact the arrays at this point, so
6838 as to not cover old ground. But sanely compacting
6839 can_combine is tricky. */
6849 /* Generate sequence for REG = B * M + A. */
6852 gen_add_mult (b, m, a, reg)
6853 rtx b; /* initial value of basic induction variable */
6854 rtx m; /* multiplicative constant */
6855 rtx a; /* additive constant */
6856 rtx reg; /* destination register */
6862 /* Use unsigned arithmetic. */
6863 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
6865 emit_move_insn (reg, result);
6866 seq = gen_sequence ();
6873 /* Update registers created in insn sequence SEQ. */
6876 loop_regs_update (loop, seq)
6877 const struct loop *loop ATTRIBUTE_UNUSED;
6880 /* Update register info for alias analysis. */
6882 if (GET_CODE (seq) == SEQUENCE)
6885 for (i = 0; i < XVECLEN (seq, 0); ++i)
6887 rtx set = single_set (XVECEXP (seq, 0, i));
6888 if (set && GET_CODE (SET_DEST (set)) == REG)
6889 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
6894 rtx set = single_set (seq);
6895 if (set && GET_CODE (SET_DEST (set)) == REG)
6896 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
6901 /* EMIT code before BEFORE_BB/BEFORE_INSN to set REG = B * M + A. */
6904 loop_iv_add_mult_emit_before (loop, b, m, a, reg, before_bb, before_insn)
6905 const struct loop *loop;
6906 rtx b; /* initial value of basic induction variable */
6907 rtx m; /* multiplicative constant */
6908 rtx a; /* additive constant */
6909 rtx reg; /* destination register */
6910 basic_block before_bb;
6917 loop_iv_add_mult_hoist (loop, b, m, a, reg);
6921 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
6922 seq = gen_add_mult (copy_rtx (b), m, copy_rtx (a), reg);
6924 /* Increase the lifetime of any invariants moved further in code. */
6925 update_reg_last_use (a, before_insn);
6926 update_reg_last_use (b, before_insn);
6927 update_reg_last_use (m, before_insn);
6929 loop_insn_emit_before (loop, before_bb, before_insn, seq);
6931 /* It is possible that the expansion created lots of new registers.
6932 Iterate over the sequence we just created and record them all. */
6933 loop_regs_update (loop, seq);
6937 /* Emit insns in loop pre-header to set REG = B * M + A. */
6940 loop_iv_add_mult_sink (loop, b, m, a, reg)
6941 const struct loop *loop;
6942 rtx b; /* initial value of basic induction variable */
6943 rtx m; /* multiplicative constant */
6944 rtx a; /* additive constant */
6945 rtx reg; /* destination register */
6949 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
6950 seq = gen_add_mult (copy_rtx (b), m, copy_rtx (a), reg);
6952 /* Increase the lifetime of any invariants moved further in code.
6953 ???? Is this really necessary? */
6954 update_reg_last_use (a, loop->sink);
6955 update_reg_last_use (b, loop->sink);
6956 update_reg_last_use (m, loop->sink);
6958 loop_insn_sink (loop, seq);
6960 /* It is possible that the expansion created lots of new registers.
6961 Iterate over the sequence we just created and record them all. */
6962 loop_regs_update (loop, seq);
6966 /* Emit insns after loop to set REG = B * M + A. */
6969 loop_iv_add_mult_hoist (loop, b, m, a, reg)
6970 const struct loop *loop;
6971 rtx b; /* initial value of basic induction variable */
6972 rtx m; /* multiplicative constant */
6973 rtx a; /* additive constant */
6974 rtx reg; /* destination register */
6978 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
6979 seq = gen_add_mult (copy_rtx (b), m, copy_rtx (a), reg);
6981 loop_insn_hoist (loop, seq);
6983 /* It is possible that the expansion created lots of new registers.
6984 Iterate over the sequence we just created and record them all. */
6985 loop_regs_update (loop, seq);
6990 /* Similar to gen_add_mult, but compute cost rather than generating
6994 iv_add_mult_cost (b, m, a, reg)
6995 rtx b; /* initial value of basic induction variable */
6996 rtx m; /* multiplicative constant */
6997 rtx a; /* additive constant */
6998 rtx reg; /* destination register */
7004 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
7006 emit_move_insn (reg, result);
7007 last = get_last_insn ();
7010 rtx t = single_set (last);
7012 cost += rtx_cost (SET_SRC (t), SET);
7013 last = PREV_INSN (last);
7019 /* Test whether A * B can be computed without
7020 an actual multiply insn. Value is 1 if so. */
7023 product_cheap_p (a, b)
7031 /* If only one is constant, make it B. */
7032 if (GET_CODE (a) == CONST_INT)
7033 tmp = a, a = b, b = tmp;
7035 /* If first constant, both constant, so don't need multiply. */
7036 if (GET_CODE (a) == CONST_INT)
7039 /* If second not constant, neither is constant, so would need multiply. */
7040 if (GET_CODE (b) != CONST_INT)
7043 /* One operand is constant, so might not need multiply insn. Generate the
7044 code for the multiply and see if a call or multiply, or long sequence
7045 of insns is generated. */
7048 expand_mult (GET_MODE (a), a, b, NULL_RTX, 1);
7049 tmp = gen_sequence ();
7052 if (GET_CODE (tmp) == SEQUENCE)
7054 if (XVEC (tmp, 0) == 0)
7056 else if (XVECLEN (tmp, 0) > 3)
7059 for (i = 0; i < XVECLEN (tmp, 0); i++)
7061 rtx insn = XVECEXP (tmp, 0, i);
7063 if (GET_CODE (insn) != INSN
7064 || (GET_CODE (PATTERN (insn)) == SET
7065 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7066 || (GET_CODE (PATTERN (insn)) == PARALLEL
7067 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7068 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7075 else if (GET_CODE (tmp) == SET
7076 && GET_CODE (SET_SRC (tmp)) == MULT)
7078 else if (GET_CODE (tmp) == PARALLEL
7079 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7080 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7086 /* Check to see if loop can be terminated by a "decrement and branch until
7087 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7088 Also try reversing an increment loop to a decrement loop
7089 to see if the optimization can be performed.
7090 Value is nonzero if optimization was performed. */
7092 /* This is useful even if the architecture doesn't have such an insn,
7093 because it might change a loops which increments from 0 to n to a loop
7094 which decrements from n to 0. A loop that decrements to zero is usually
7095 faster than one that increments from zero. */
7097 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7098 such as approx_final_value, biv_total_increment, loop_iterations, and
7099 final_[bg]iv_value. */
7102 check_dbra_loop (loop, insn_count)
7106 struct loop_info *loop_info = LOOP_INFO (loop);
7107 struct loop_regs *regs = LOOP_REGS (loop);
7108 struct loop_ivs *ivs = LOOP_IVS (loop);
7109 struct iv_class *bl;
7116 rtx before_comparison;
7120 int compare_and_branch;
7121 rtx loop_start = loop->start;
7122 rtx loop_end = loop->end;
7124 /* If last insn is a conditional branch, and the insn before tests a
7125 register value, try to optimize it. Otherwise, we can't do anything. */
7127 jump = PREV_INSN (loop_end);
7128 comparison = get_condition_for_loop (loop, jump);
7129 if (comparison == 0)
7131 if (!onlyjump_p (jump))
7134 /* Try to compute whether the compare/branch at the loop end is one or
7135 two instructions. */
7136 get_condition (jump, &first_compare);
7137 if (first_compare == jump)
7138 compare_and_branch = 1;
7139 else if (first_compare == prev_nonnote_insn (jump))
7140 compare_and_branch = 2;
7145 /* If more than one condition is present to control the loop, then
7146 do not proceed, as this function does not know how to rewrite
7147 loop tests with more than one condition.
7149 Look backwards from the first insn in the last comparison
7150 sequence and see if we've got another comparison sequence. */
7153 if ((jump1 = prev_nonnote_insn (first_compare)) != loop->cont)
7154 if (GET_CODE (jump1) == JUMP_INSN)
7158 /* Check all of the bivs to see if the compare uses one of them.
7159 Skip biv's set more than once because we can't guarantee that
7160 it will be zero on the last iteration. Also skip if the biv is
7161 used between its update and the test insn. */
7163 for (bl = ivs->list; bl; bl = bl->next)
7165 if (bl->biv_count == 1
7166 && ! bl->biv->maybe_multiple
7167 && bl->biv->dest_reg == XEXP (comparison, 0)
7168 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
7176 /* Look for the case where the basic induction variable is always
7177 nonnegative, and equals zero on the last iteration.
7178 In this case, add a reg_note REG_NONNEG, which allows the
7179 m68k DBRA instruction to be used. */
7181 if (((GET_CODE (comparison) == GT
7182 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
7183 && INTVAL (XEXP (comparison, 1)) == -1)
7184 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
7185 && GET_CODE (bl->biv->add_val) == CONST_INT
7186 && INTVAL (bl->biv->add_val) < 0)
7188 /* Initial value must be greater than 0,
7189 init_val % -dec_value == 0 to ensure that it equals zero on
7190 the last iteration */
7192 if (GET_CODE (bl->initial_value) == CONST_INT
7193 && INTVAL (bl->initial_value) > 0
7194 && (INTVAL (bl->initial_value)
7195 % (-INTVAL (bl->biv->add_val))) == 0)
7197 /* register always nonnegative, add REG_NOTE to branch */
7198 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
7200 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
7207 /* If the decrement is 1 and the value was tested as >= 0 before
7208 the loop, then we can safely optimize. */
7209 for (p = loop_start; p; p = PREV_INSN (p))
7211 if (GET_CODE (p) == CODE_LABEL)
7213 if (GET_CODE (p) != JUMP_INSN)
7216 before_comparison = get_condition_for_loop (loop, p);
7217 if (before_comparison
7218 && XEXP (before_comparison, 0) == bl->biv->dest_reg
7219 && GET_CODE (before_comparison) == LT
7220 && XEXP (before_comparison, 1) == const0_rtx
7221 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
7222 && INTVAL (bl->biv->add_val) == -1)
7224 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
7226 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
7234 else if (GET_CODE (bl->biv->add_val) == CONST_INT
7235 && INTVAL (bl->biv->add_val) > 0)
7237 /* Try to change inc to dec, so can apply above optimization. */
7239 all registers modified are induction variables or invariant,
7240 all memory references have non-overlapping addresses
7241 (obviously true if only one write)
7242 allow 2 insns for the compare/jump at the end of the loop. */
7243 /* Also, we must avoid any instructions which use both the reversed
7244 biv and another biv. Such instructions will fail if the loop is
7245 reversed. We meet this condition by requiring that either
7246 no_use_except_counting is true, or else that there is only
7248 int num_nonfixed_reads = 0;
7249 /* 1 if the iteration var is used only to count iterations. */
7250 int no_use_except_counting = 0;
7251 /* 1 if the loop has no memory store, or it has a single memory store
7252 which is reversible. */
7253 int reversible_mem_store = 1;
7255 if (bl->giv_count == 0 && ! loop->exit_count)
7257 rtx bivreg = regno_reg_rtx[bl->regno];
7259 /* If there are no givs for this biv, and the only exit is the
7260 fall through at the end of the loop, then
7261 see if perhaps there are no uses except to count. */
7262 no_use_except_counting = 1;
7263 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7266 rtx set = single_set (p);
7268 if (set && GET_CODE (SET_DEST (set)) == REG
7269 && REGNO (SET_DEST (set)) == bl->regno)
7270 /* An insn that sets the biv is okay. */
7272 else if ((p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
7273 || p == prev_nonnote_insn (loop_end))
7274 && reg_mentioned_p (bivreg, PATTERN (p)))
7276 /* If either of these insns uses the biv and sets a pseudo
7277 that has more than one usage, then the biv has uses
7278 other than counting since it's used to derive a value
7279 that is used more than one time. */
7280 note_stores (PATTERN (p), note_set_pseudo_multiple_uses,
7282 if (regs->multiple_uses)
7284 no_use_except_counting = 0;
7288 else if (reg_mentioned_p (bivreg, PATTERN (p)))
7290 no_use_except_counting = 0;
7296 if (no_use_except_counting)
7297 /* No need to worry about MEMs. */
7299 else if (loop_info->num_mem_sets <= 1)
7301 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7303 num_nonfixed_reads += count_nonfixed_reads (loop, PATTERN (p));
7305 /* If the loop has a single store, and the destination address is
7306 invariant, then we can't reverse the loop, because this address
7307 might then have the wrong value at loop exit.
7308 This would work if the source was invariant also, however, in that
7309 case, the insn should have been moved out of the loop. */
7311 if (loop_info->num_mem_sets == 1)
7313 struct induction *v;
7315 reversible_mem_store
7316 = (! loop_info->unknown_address_altered
7317 && ! loop_info->unknown_constant_address_altered
7318 && ! loop_invariant_p (loop,
7319 XEXP (XEXP (loop_info->store_mems, 0),
7322 /* If the store depends on a register that is set after the
7323 store, it depends on the initial value, and is thus not
7325 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
7327 if (v->giv_type == DEST_REG
7328 && reg_mentioned_p (v->dest_reg,
7329 PATTERN (loop_info->first_loop_store_insn))
7330 && loop_insn_first_p (loop_info->first_loop_store_insn,
7332 reversible_mem_store = 0;
7339 /* This code only acts for innermost loops. Also it simplifies
7340 the memory address check by only reversing loops with
7341 zero or one memory access.
7342 Two memory accesses could involve parts of the same array,
7343 and that can't be reversed.
7344 If the biv is used only for counting, than we don't need to worry
7345 about all these things. */
7347 if ((num_nonfixed_reads <= 1
7348 && ! loop_info->has_nonconst_call
7349 && ! loop_info->has_volatile
7350 && reversible_mem_store
7351 && (bl->giv_count + bl->biv_count + loop_info->num_mem_sets
7352 + LOOP_MOVABLES (loop)->num + compare_and_branch == insn_count)
7353 && (bl == ivs->list && bl->next == 0))
7354 || no_use_except_counting)
7358 /* Loop can be reversed. */
7359 if (loop_dump_stream)
7360 fprintf (loop_dump_stream, "Can reverse loop\n");
7362 /* Now check other conditions:
7364 The increment must be a constant, as must the initial value,
7365 and the comparison code must be LT.
7367 This test can probably be improved since +/- 1 in the constant
7368 can be obtained by changing LT to LE and vice versa; this is
7372 /* for constants, LE gets turned into LT */
7373 && (GET_CODE (comparison) == LT
7374 || (GET_CODE (comparison) == LE
7375 && no_use_except_counting)))
7377 HOST_WIDE_INT add_val, add_adjust, comparison_val = 0;
7378 rtx initial_value, comparison_value;
7380 enum rtx_code cmp_code;
7381 int comparison_const_width;
7382 unsigned HOST_WIDE_INT comparison_sign_mask;
7384 add_val = INTVAL (bl->biv->add_val);
7385 comparison_value = XEXP (comparison, 1);
7386 if (GET_MODE (comparison_value) == VOIDmode)
7387 comparison_const_width
7388 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
7390 comparison_const_width
7391 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
7392 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
7393 comparison_const_width = HOST_BITS_PER_WIDE_INT;
7394 comparison_sign_mask
7395 = (unsigned HOST_WIDE_INT) 1 << (comparison_const_width - 1);
7397 /* If the comparison value is not a loop invariant, then we
7398 can not reverse this loop.
7400 ??? If the insns which initialize the comparison value as
7401 a whole compute an invariant result, then we could move
7402 them out of the loop and proceed with loop reversal. */
7403 if (! loop_invariant_p (loop, comparison_value))
7406 if (GET_CODE (comparison_value) == CONST_INT)
7407 comparison_val = INTVAL (comparison_value);
7408 initial_value = bl->initial_value;
7410 /* Normalize the initial value if it is an integer and
7411 has no other use except as a counter. This will allow
7412 a few more loops to be reversed. */
7413 if (no_use_except_counting
7414 && GET_CODE (comparison_value) == CONST_INT
7415 && GET_CODE (initial_value) == CONST_INT)
7417 comparison_val = comparison_val - INTVAL (bl->initial_value);
7418 /* The code below requires comparison_val to be a multiple
7419 of add_val in order to do the loop reversal, so
7420 round up comparison_val to a multiple of add_val.
7421 Since comparison_value is constant, we know that the
7422 current comparison code is LT. */
7423 comparison_val = comparison_val + add_val - 1;
7425 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
7426 /* We postpone overflow checks for COMPARISON_VAL here;
7427 even if there is an overflow, we might still be able to
7428 reverse the loop, if converting the loop exit test to
7430 initial_value = const0_rtx;
7433 /* First check if we can do a vanilla loop reversal. */
7434 if (initial_value == const0_rtx
7435 /* If we have a decrement_and_branch_on_count,
7436 prefer the NE test, since this will allow that
7437 instruction to be generated. Note that we must
7438 use a vanilla loop reversal if the biv is used to
7439 calculate a giv or has a non-counting use. */
7440 #if ! defined (HAVE_decrement_and_branch_until_zero) \
7441 && defined (HAVE_decrement_and_branch_on_count)
7442 && (! (add_val == 1 && loop->vtop
7443 && (bl->biv_count == 0
7444 || no_use_except_counting)))
7446 && GET_CODE (comparison_value) == CONST_INT
7447 /* Now do postponed overflow checks on COMPARISON_VAL. */
7448 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
7449 & comparison_sign_mask))
7451 /* Register will always be nonnegative, with value
7452 0 on last iteration */
7453 add_adjust = add_val;
7457 else if (add_val == 1 && loop->vtop
7458 && (bl->biv_count == 0
7459 || no_use_except_counting))
7467 if (GET_CODE (comparison) == LE)
7468 add_adjust -= add_val;
7470 /* If the initial value is not zero, or if the comparison
7471 value is not an exact multiple of the increment, then we
7472 can not reverse this loop. */
7473 if (initial_value == const0_rtx
7474 && GET_CODE (comparison_value) == CONST_INT)
7476 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
7481 if (! no_use_except_counting || add_val != 1)
7485 final_value = comparison_value;
7487 /* Reset these in case we normalized the initial value
7488 and comparison value above. */
7489 if (GET_CODE (comparison_value) == CONST_INT
7490 && GET_CODE (initial_value) == CONST_INT)
7492 comparison_value = GEN_INT (comparison_val);
7494 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
7496 bl->initial_value = initial_value;
7498 /* Save some info needed to produce the new insns. */
7499 reg = bl->biv->dest_reg;
7500 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
7501 if (jump_label == pc_rtx)
7502 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
7503 new_add_val = GEN_INT (-INTVAL (bl->biv->add_val));
7505 /* Set start_value; if this is not a CONST_INT, we need
7507 Initialize biv to start_value before loop start.
7508 The old initializing insn will be deleted as a
7509 dead store by flow.c. */
7510 if (initial_value == const0_rtx
7511 && GET_CODE (comparison_value) == CONST_INT)
7513 start_value = GEN_INT (comparison_val - add_adjust);
7514 loop_insn_hoist (loop, gen_move_insn (reg, start_value));
7516 else if (GET_CODE (initial_value) == CONST_INT)
7518 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
7519 enum machine_mode mode = GET_MODE (reg);
7520 enum insn_code icode
7521 = add_optab->handlers[(int) mode].insn_code;
7523 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
7524 || ! ((*insn_data[icode].operand[1].predicate)
7525 (comparison_value, mode))
7526 || ! ((*insn_data[icode].operand[2].predicate)
7530 = gen_rtx_PLUS (mode, comparison_value, offset);
7531 loop_insn_hoist (loop, (GEN_FCN (icode)
7532 (reg, comparison_value, offset)));
7533 if (GET_CODE (comparison) == LE)
7534 final_value = gen_rtx_PLUS (mode, comparison_value,
7537 else if (! add_adjust)
7539 enum machine_mode mode = GET_MODE (reg);
7540 enum insn_code icode
7541 = sub_optab->handlers[(int) mode].insn_code;
7542 if (! (*insn_data[icode].operand[0].predicate) (reg, mode)
7543 || ! ((*insn_data[icode].operand[1].predicate)
7544 (comparison_value, mode))
7545 || ! ((*insn_data[icode].operand[2].predicate)
7546 (initial_value, mode)))
7549 = gen_rtx_MINUS (mode, comparison_value, initial_value);
7550 loop_insn_hoist (loop, (GEN_FCN (icode)
7551 (reg, comparison_value,
7555 /* We could handle the other cases too, but it'll be
7556 better to have a testcase first. */
7559 /* We may not have a single insn which can increment a reg, so
7560 create a sequence to hold all the insns from expand_inc. */
7562 expand_inc (reg, new_add_val);
7563 tem = gen_sequence ();
7566 p = emit_insn_before (tem, bl->biv->insn);
7567 delete_insn (bl->biv->insn);
7569 /* Update biv info to reflect its new status. */
7571 bl->initial_value = start_value;
7572 bl->biv->add_val = new_add_val;
7574 /* Update loop info. */
7575 loop_info->initial_value = reg;
7576 loop_info->initial_equiv_value = reg;
7577 loop_info->final_value = const0_rtx;
7578 loop_info->final_equiv_value = const0_rtx;
7579 loop_info->comparison_value = const0_rtx;
7580 loop_info->comparison_code = cmp_code;
7581 loop_info->increment = new_add_val;
7583 /* Inc LABEL_NUSES so that delete_insn will
7584 not delete the label. */
7585 LABEL_NUSES (XEXP (jump_label, 0))++;
7587 /* Emit an insn after the end of the loop to set the biv's
7588 proper exit value if it is used anywhere outside the loop. */
7589 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
7591 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
7592 loop_insn_sink (loop, gen_move_insn (reg, final_value));
7594 /* Delete compare/branch at end of loop. */
7595 delete_insn (PREV_INSN (loop_end));
7596 if (compare_and_branch == 2)
7597 delete_insn (first_compare);
7599 /* Add new compare/branch insn at end of loop. */
7601 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
7602 GET_MODE (reg), 0, 0,
7603 XEXP (jump_label, 0));
7604 tem = gen_sequence ();
7606 emit_jump_insn_before (tem, loop_end);
7608 for (tem = PREV_INSN (loop_end);
7609 tem && GET_CODE (tem) != JUMP_INSN;
7610 tem = PREV_INSN (tem))
7614 JUMP_LABEL (tem) = XEXP (jump_label, 0);
7620 /* Increment of LABEL_NUSES done above. */
7621 /* Register is now always nonnegative,
7622 so add REG_NONNEG note to the branch. */
7623 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, reg,
7629 /* No insn may reference both the reversed and another biv or it
7630 will fail (see comment near the top of the loop reversal
7632 Earlier on, we have verified that the biv has no use except
7633 counting, or it is the only biv in this function.
7634 However, the code that computes no_use_except_counting does
7635 not verify reg notes. It's possible to have an insn that
7636 references another biv, and has a REG_EQUAL note with an
7637 expression based on the reversed biv. To avoid this case,
7638 remove all REG_EQUAL notes based on the reversed biv
7640 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7644 rtx set = single_set (p);
7645 /* If this is a set of a GIV based on the reversed biv, any
7646 REG_EQUAL notes should still be correct. */
7648 || GET_CODE (SET_DEST (set)) != REG
7649 || (size_t) REGNO (SET_DEST (set)) >= ivs->n_regs
7650 || REG_IV_TYPE (ivs, REGNO (SET_DEST (set))) != GENERAL_INDUCT
7651 || REG_IV_INFO (ivs, REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
7652 for (pnote = ®_NOTES (p); *pnote;)
7654 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
7655 && reg_mentioned_p (regno_reg_rtx[bl->regno],
7657 *pnote = XEXP (*pnote, 1);
7659 pnote = &XEXP (*pnote, 1);
7663 /* Mark that this biv has been reversed. Each giv which depends
7664 on this biv, and which is also live past the end of the loop
7665 will have to be fixed up. */
7669 if (loop_dump_stream)
7671 fprintf (loop_dump_stream, "Reversed loop");
7673 fprintf (loop_dump_stream, " and added reg_nonneg\n");
7675 fprintf (loop_dump_stream, "\n");
7686 /* Verify whether the biv BL appears to be eliminable,
7687 based on the insns in the loop that refer to it.
7689 If ELIMINATE_P is non-zero, actually do the elimination.
7691 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
7692 determine whether invariant insns should be placed inside or at the
7693 start of the loop. */
7696 maybe_eliminate_biv (loop, bl, eliminate_p, threshold, insn_count)
7697 const struct loop *loop;
7698 struct iv_class *bl;
7700 int threshold, insn_count;
7702 struct loop_ivs *ivs = LOOP_IVS (loop);
7703 rtx reg = bl->biv->dest_reg;
7706 /* Scan all insns in the loop, stopping if we find one that uses the
7707 biv in a way that we cannot eliminate. */
7709 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
7711 enum rtx_code code = GET_CODE (p);
7712 basic_block where_bb = 0;
7713 rtx where_insn = threshold >= insn_count ? 0 : p;
7715 /* If this is a libcall that sets a giv, skip ahead to its end. */
7716 if (GET_RTX_CLASS (code) == 'i')
7718 rtx note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
7722 rtx last = XEXP (note, 0);
7723 rtx set = single_set (last);
7725 if (set && GET_CODE (SET_DEST (set)) == REG)
7727 unsigned int regno = REGNO (SET_DEST (set));
7729 if (regno < ivs->n_regs
7730 && REG_IV_TYPE (ivs, regno) == GENERAL_INDUCT
7731 && REG_IV_INFO (ivs, regno)->src_reg == bl->biv->src_reg)
7736 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
7737 && reg_mentioned_p (reg, PATTERN (p))
7738 && ! maybe_eliminate_biv_1 (loop, PATTERN (p), p, bl,
7739 eliminate_p, where_bb, where_insn))
7741 if (loop_dump_stream)
7742 fprintf (loop_dump_stream,
7743 "Cannot eliminate biv %d: biv used in insn %d.\n",
7744 bl->regno, INSN_UID (p));
7751 if (loop_dump_stream)
7752 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
7753 bl->regno, eliminate_p ? "was" : "can be");
7760 /* INSN and REFERENCE are instructions in the same insn chain.
7761 Return non-zero if INSN is first. */
7764 loop_insn_first_p (insn, reference)
7765 rtx insn, reference;
7769 for (p = insn, q = reference;;)
7771 /* Start with test for not first so that INSN == REFERENCE yields not
7773 if (q == insn || ! p)
7775 if (p == reference || ! q)
7778 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
7779 previous insn, hence the <= comparison below does not work if
7781 if (INSN_UID (p) < max_uid_for_loop
7782 && INSN_UID (q) < max_uid_for_loop
7783 && GET_CODE (p) != NOTE)
7784 return INSN_LUID (p) <= INSN_LUID (q);
7786 if (INSN_UID (p) >= max_uid_for_loop
7787 || GET_CODE (p) == NOTE)
7789 if (INSN_UID (q) >= max_uid_for_loop)
7794 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
7795 the offset that we have to take into account due to auto-increment /
7796 div derivation is zero. */
7798 biv_elimination_giv_has_0_offset (biv, giv, insn)
7799 struct induction *biv, *giv;
7802 /* If the giv V had the auto-inc address optimization applied
7803 to it, and INSN occurs between the giv insn and the biv
7804 insn, then we'd have to adjust the value used here.
7805 This is rare, so we don't bother to make this possible. */
7806 if (giv->auto_inc_opt
7807 && ((loop_insn_first_p (giv->insn, insn)
7808 && loop_insn_first_p (insn, biv->insn))
7809 || (loop_insn_first_p (biv->insn, insn)
7810 && loop_insn_first_p (insn, giv->insn))))
7816 /* If BL appears in X (part of the pattern of INSN), see if we can
7817 eliminate its use. If so, return 1. If not, return 0.
7819 If BIV does not appear in X, return 1.
7821 If ELIMINATE_P is non-zero, actually do the elimination.
7822 WHERE_INSN/WHERE_BB indicate where extra insns should be added.
7823 Depending on how many items have been moved out of the loop, it
7824 will either be before INSN (when WHERE_INSN is non-zero) or at the
7825 start of the loop (when WHERE_INSN is zero). */
7828 maybe_eliminate_biv_1 (loop, x, insn, bl, eliminate_p, where_bb, where_insn)
7829 const struct loop *loop;
7831 struct iv_class *bl;
7833 basic_block where_bb;
7836 enum rtx_code code = GET_CODE (x);
7837 rtx reg = bl->biv->dest_reg;
7838 enum machine_mode mode = GET_MODE (reg);
7839 struct induction *v;
7851 /* If we haven't already been able to do something with this BIV,
7852 we can't eliminate it. */
7858 /* If this sets the BIV, it is not a problem. */
7859 if (SET_DEST (x) == reg)
7862 /* If this is an insn that defines a giv, it is also ok because
7863 it will go away when the giv is reduced. */
7864 for (v = bl->giv; v; v = v->next_iv)
7865 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
7869 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
7871 /* Can replace with any giv that was reduced and
7872 that has (MULT_VAL != 0) and (ADD_VAL == 0).
7873 Require a constant for MULT_VAL, so we know it's nonzero.
7874 ??? We disable this optimization to avoid potential
7877 for (v = bl->giv; v; v = v->next_iv)
7878 if (GET_CODE (v->mult_val) == CONST_INT && v->mult_val != const0_rtx
7879 && v->add_val == const0_rtx
7880 && ! v->ignore && ! v->maybe_dead && v->always_computable
7884 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
7890 /* If the giv has the opposite direction of change,
7891 then reverse the comparison. */
7892 if (INTVAL (v->mult_val) < 0)
7893 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
7894 const0_rtx, v->new_reg);
7898 /* We can probably test that giv's reduced reg. */
7899 if (validate_change (insn, &SET_SRC (x), new, 0))
7903 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
7904 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
7905 Require a constant for MULT_VAL, so we know it's nonzero.
7906 ??? Do this only if ADD_VAL is a pointer to avoid a potential
7907 overflow problem. */
7909 for (v = bl->giv; v; v = v->next_iv)
7910 if (GET_CODE (v->mult_val) == CONST_INT
7911 && v->mult_val != const0_rtx
7912 && ! v->ignore && ! v->maybe_dead && v->always_computable
7914 && (GET_CODE (v->add_val) == SYMBOL_REF
7915 || GET_CODE (v->add_val) == LABEL_REF
7916 || GET_CODE (v->add_val) == CONST
7917 || (GET_CODE (v->add_val) == REG
7918 && REG_POINTER (v->add_val))))
7920 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
7926 /* If the giv has the opposite direction of change,
7927 then reverse the comparison. */
7928 if (INTVAL (v->mult_val) < 0)
7929 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
7932 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
7933 copy_rtx (v->add_val));
7935 /* Replace biv with the giv's reduced register. */
7936 update_reg_last_use (v->add_val, insn);
7937 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
7940 /* Insn doesn't support that constant or invariant. Copy it
7941 into a register (it will be a loop invariant.) */
7942 tem = gen_reg_rtx (GET_MODE (v->new_reg));
7944 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
7947 /* Substitute the new register for its invariant value in
7948 the compare expression. */
7949 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
7950 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
7959 case GT: case GE: case GTU: case GEU:
7960 case LT: case LE: case LTU: case LEU:
7961 /* See if either argument is the biv. */
7962 if (XEXP (x, 0) == reg)
7963 arg = XEXP (x, 1), arg_operand = 1;
7964 else if (XEXP (x, 1) == reg)
7965 arg = XEXP (x, 0), arg_operand = 0;
7969 if (CONSTANT_P (arg))
7971 /* First try to replace with any giv that has constant positive
7972 mult_val and constant add_val. We might be able to support
7973 negative mult_val, but it seems complex to do it in general. */
7975 for (v = bl->giv; v; v = v->next_iv)
7976 if (GET_CODE (v->mult_val) == CONST_INT
7977 && INTVAL (v->mult_val) > 0
7978 && (GET_CODE (v->add_val) == SYMBOL_REF
7979 || GET_CODE (v->add_val) == LABEL_REF
7980 || GET_CODE (v->add_val) == CONST
7981 || (GET_CODE (v->add_val) == REG
7982 && REG_POINTER (v->add_val)))
7983 && ! v->ignore && ! v->maybe_dead && v->always_computable
7986 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
7992 /* Replace biv with the giv's reduced reg. */
7993 validate_change (insn, &XEXP (x, 1 - arg_operand), v->new_reg, 1);
7995 /* If all constants are actually constant integers and
7996 the derived constant can be directly placed in the COMPARE,
7998 if (GET_CODE (arg) == CONST_INT
7999 && GET_CODE (v->mult_val) == CONST_INT
8000 && GET_CODE (v->add_val) == CONST_INT)
8002 validate_change (insn, &XEXP (x, arg_operand),
8003 GEN_INT (INTVAL (arg)
8004 * INTVAL (v->mult_val)
8005 + INTVAL (v->add_val)), 1);
8009 /* Otherwise, load it into a register. */
8010 tem = gen_reg_rtx (mode);
8011 loop_iv_add_mult_emit_before (loop, arg,
8012 v->mult_val, v->add_val,
8013 tem, where_bb, where_insn);
8014 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8016 if (apply_change_group ())
8020 /* Look for giv with positive constant mult_val and nonconst add_val.
8021 Insert insns to calculate new compare value.
8022 ??? Turn this off due to possible overflow. */
8024 for (v = bl->giv; v; v = v->next_iv)
8025 if (GET_CODE (v->mult_val) == CONST_INT
8026 && INTVAL (v->mult_val) > 0
8027 && ! v->ignore && ! v->maybe_dead && v->always_computable
8033 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8039 tem = gen_reg_rtx (mode);
8041 /* Replace biv with giv's reduced register. */
8042 validate_change (insn, &XEXP (x, 1 - arg_operand),
8045 /* Compute value to compare against. */
8046 loop_iv_add_mult_emit_before (loop, arg,
8047 v->mult_val, v->add_val,
8048 tem, where_bb, where_insn);
8049 /* Use it in this insn. */
8050 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8051 if (apply_change_group ())
8055 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8057 if (loop_invariant_p (loop, arg) == 1)
8059 /* Look for giv with constant positive mult_val and nonconst
8060 add_val. Insert insns to compute new compare value.
8061 ??? Turn this off due to possible overflow. */
8063 for (v = bl->giv; v; v = v->next_iv)
8064 if (GET_CODE (v->mult_val) == CONST_INT && INTVAL (v->mult_val) > 0
8065 && ! v->ignore && ! v->maybe_dead && v->always_computable
8071 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8077 tem = gen_reg_rtx (mode);
8079 /* Replace biv with giv's reduced register. */
8080 validate_change (insn, &XEXP (x, 1 - arg_operand),
8083 /* Compute value to compare against. */
8084 loop_iv_add_mult_emit_before (loop, arg,
8085 v->mult_val, v->add_val,
8086 tem, where_bb, where_insn);
8087 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8088 if (apply_change_group ())
8093 /* This code has problems. Basically, you can't know when
8094 seeing if we will eliminate BL, whether a particular giv
8095 of ARG will be reduced. If it isn't going to be reduced,
8096 we can't eliminate BL. We can try forcing it to be reduced,
8097 but that can generate poor code.
8099 The problem is that the benefit of reducing TV, below should
8100 be increased if BL can actually be eliminated, but this means
8101 we might have to do a topological sort of the order in which
8102 we try to process biv. It doesn't seem worthwhile to do
8103 this sort of thing now. */
8106 /* Otherwise the reg compared with had better be a biv. */
8107 if (GET_CODE (arg) != REG
8108 || REG_IV_TYPE (ivs, REGNO (arg)) != BASIC_INDUCT)
8111 /* Look for a pair of givs, one for each biv,
8112 with identical coefficients. */
8113 for (v = bl->giv; v; v = v->next_iv)
8115 struct induction *tv;
8117 if (v->ignore || v->maybe_dead || v->mode != mode)
8120 for (tv = REG_IV_CLASS (ivs, REGNO (arg))->giv; tv;
8122 if (! tv->ignore && ! tv->maybe_dead
8123 && rtx_equal_p (tv->mult_val, v->mult_val)
8124 && rtx_equal_p (tv->add_val, v->add_val)
8125 && tv->mode == mode)
8127 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8133 /* Replace biv with its giv's reduced reg. */
8134 XEXP (x, 1 - arg_operand) = v->new_reg;
8135 /* Replace other operand with the other giv's
8137 XEXP (x, arg_operand) = tv->new_reg;
8144 /* If we get here, the biv can't be eliminated. */
8148 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8149 biv is used in it, since it will be replaced. */
8150 for (v = bl->giv; v; v = v->next_iv)
8151 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8159 /* See if any subexpression fails elimination. */
8160 fmt = GET_RTX_FORMAT (code);
8161 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8166 if (! maybe_eliminate_biv_1 (loop, XEXP (x, i), insn, bl,
8167 eliminate_p, where_bb, where_insn))
8172 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8173 if (! maybe_eliminate_biv_1 (loop, XVECEXP (x, i, j), insn, bl,
8174 eliminate_p, where_bb, where_insn))
8183 /* Return nonzero if the last use of REG
8184 is in an insn following INSN in the same basic block. */
8187 last_use_this_basic_block (reg, insn)
8193 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
8196 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
8202 /* Called via `note_stores' to record the initial value of a biv. Here we
8203 just record the location of the set and process it later. */
8206 record_initial (dest, set, data)
8209 void *data ATTRIBUTE_UNUSED;
8211 struct loop_ivs *ivs = (struct loop_ivs *) data;
8212 struct iv_class *bl;
8214 if (GET_CODE (dest) != REG
8215 || REGNO (dest) >= ivs->n_regs
8216 || REG_IV_TYPE (ivs, REGNO (dest)) != BASIC_INDUCT)
8219 bl = REG_IV_CLASS (ivs, REGNO (dest));
8221 /* If this is the first set found, record it. */
8222 if (bl->init_insn == 0)
8224 bl->init_insn = note_insn;
8229 /* If any of the registers in X are "old" and currently have a last use earlier
8230 than INSN, update them to have a last use of INSN. Their actual last use
8231 will be the previous insn but it will not have a valid uid_luid so we can't
8232 use it. X must be a source expression only. */
8235 update_reg_last_use (x, insn)
8239 /* Check for the case where INSN does not have a valid luid. In this case,
8240 there is no need to modify the regno_last_uid, as this can only happen
8241 when code is inserted after the loop_end to set a pseudo's final value,
8242 and hence this insn will never be the last use of x.
8243 ???? This comment is not correct. See for example loop_givs_reduce.
8244 This may insert an insn before another new insn. */
8245 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
8246 && INSN_UID (insn) < max_uid_for_loop
8247 && REGNO_LAST_LUID (REGNO (x)) < INSN_LUID (insn))
8249 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
8254 register const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
8255 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
8258 update_reg_last_use (XEXP (x, i), insn);
8259 else if (fmt[i] == 'E')
8260 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8261 update_reg_last_use (XVECEXP (x, i, j), insn);
8266 /* Given an insn INSN and condition COND, return the condition in a
8267 canonical form to simplify testing by callers. Specifically:
8269 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
8270 (2) Both operands will be machine operands; (cc0) will have been replaced.
8271 (3) If an operand is a constant, it will be the second operand.
8272 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
8273 for GE, GEU, and LEU.
8275 If the condition cannot be understood, or is an inequality floating-point
8276 comparison which needs to be reversed, 0 will be returned.
8278 If REVERSE is non-zero, then reverse the condition prior to canonizing it.
8280 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8281 insn used in locating the condition was found. If a replacement test
8282 of the condition is desired, it should be placed in front of that
8283 insn and we will be sure that the inputs are still valid.
8285 If WANT_REG is non-zero, we wish the condition to be relative to that
8286 register, if possible. Therefore, do not canonicalize the condition
8290 canonicalize_condition (insn, cond, reverse, earliest, want_reg)
8302 int reverse_code = 0;
8303 int did_reverse_condition = 0;
8304 enum machine_mode mode;
8306 code = GET_CODE (cond);
8307 mode = GET_MODE (cond);
8308 op0 = XEXP (cond, 0);
8309 op1 = XEXP (cond, 1);
8313 code = reverse_condition (code);
8314 did_reverse_condition ^= 1;
8320 /* If we are comparing a register with zero, see if the register is set
8321 in the previous insn to a COMPARE or a comparison operation. Perform
8322 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
8325 while (GET_RTX_CLASS (code) == '<'
8326 && op1 == CONST0_RTX (GET_MODE (op0))
8329 /* Set non-zero when we find something of interest. */
8333 /* If comparison with cc0, import actual comparison from compare
8337 if ((prev = prev_nonnote_insn (prev)) == 0
8338 || GET_CODE (prev) != INSN
8339 || (set = single_set (prev)) == 0
8340 || SET_DEST (set) != cc0_rtx)
8343 op0 = SET_SRC (set);
8344 op1 = CONST0_RTX (GET_MODE (op0));
8350 /* If this is a COMPARE, pick up the two things being compared. */
8351 if (GET_CODE (op0) == COMPARE)
8353 op1 = XEXP (op0, 1);
8354 op0 = XEXP (op0, 0);
8357 else if (GET_CODE (op0) != REG)
8360 /* Go back to the previous insn. Stop if it is not an INSN. We also
8361 stop if it isn't a single set or if it has a REG_INC note because
8362 we don't want to bother dealing with it. */
8364 if ((prev = prev_nonnote_insn (prev)) == 0
8365 || GET_CODE (prev) != INSN
8366 || FIND_REG_INC_NOTE (prev, 0)
8367 || (set = single_set (prev)) == 0)
8370 /* If this is setting OP0, get what it sets it to if it looks
8372 if (rtx_equal_p (SET_DEST (set), op0))
8374 enum machine_mode inner_mode = GET_MODE (SET_DEST (set));
8376 /* ??? We may not combine comparisons done in a CCmode with
8377 comparisons not done in a CCmode. This is to aid targets
8378 like Alpha that have an IEEE compliant EQ instruction, and
8379 a non-IEEE compliant BEQ instruction. The use of CCmode is
8380 actually artificial, simply to prevent the combination, but
8381 should not affect other platforms.
8383 However, we must allow VOIDmode comparisons to match either
8384 CCmode or non-CCmode comparison, because some ports have
8385 modeless comparisons inside branch patterns.
8387 ??? This mode check should perhaps look more like the mode check
8388 in simplify_comparison in combine. */
8390 if ((GET_CODE (SET_SRC (set)) == COMPARE
8393 && GET_MODE_CLASS (inner_mode) == MODE_INT
8394 && (GET_MODE_BITSIZE (inner_mode)
8395 <= HOST_BITS_PER_WIDE_INT)
8396 && (STORE_FLAG_VALUE
8397 & ((HOST_WIDE_INT) 1
8398 << (GET_MODE_BITSIZE (inner_mode) - 1))))
8399 #ifdef FLOAT_STORE_FLAG_VALUE
8401 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
8402 && (REAL_VALUE_NEGATIVE
8403 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
8406 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
8407 && (((GET_MODE_CLASS (mode) == MODE_CC)
8408 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
8409 || mode == VOIDmode || inner_mode == VOIDmode))
8411 else if (((code == EQ
8413 && (GET_MODE_BITSIZE (inner_mode)
8414 <= HOST_BITS_PER_WIDE_INT)
8415 && GET_MODE_CLASS (inner_mode) == MODE_INT
8416 && (STORE_FLAG_VALUE
8417 & ((HOST_WIDE_INT) 1
8418 << (GET_MODE_BITSIZE (inner_mode) - 1))))
8419 #ifdef FLOAT_STORE_FLAG_VALUE
8421 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
8422 && (REAL_VALUE_NEGATIVE
8423 (FLOAT_STORE_FLAG_VALUE (inner_mode))))
8426 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
8427 && (((GET_MODE_CLASS (mode) == MODE_CC)
8428 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
8429 || mode == VOIDmode || inner_mode == VOIDmode))
8432 /* We might have reversed a LT to get a GE here. But this wasn't
8433 actually the comparison of data, so we don't flag that we
8434 have had to reverse the condition. */
8435 did_reverse_condition ^= 1;
8443 else if (reg_set_p (op0, prev))
8444 /* If this sets OP0, but not directly, we have to give up. */
8449 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
8450 code = GET_CODE (x);
8453 code = reverse_condition (code);
8454 if (code == UNKNOWN)
8456 did_reverse_condition ^= 1;
8460 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
8466 /* If constant is first, put it last. */
8467 if (CONSTANT_P (op0))
8468 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
8470 /* If OP0 is the result of a comparison, we weren't able to find what
8471 was really being compared, so fail. */
8472 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
8475 /* Canonicalize any ordered comparison with integers involving equality
8476 if we can do computations in the relevant mode and we do not
8479 if (GET_CODE (op1) == CONST_INT
8480 && GET_MODE (op0) != VOIDmode
8481 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
8483 HOST_WIDE_INT const_val = INTVAL (op1);
8484 unsigned HOST_WIDE_INT uconst_val = const_val;
8485 unsigned HOST_WIDE_INT max_val
8486 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
8491 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
8492 code = LT, op1 = GEN_INT (const_val + 1);
8495 /* When cross-compiling, const_val might be sign-extended from
8496 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
8498 if ((HOST_WIDE_INT) (const_val & max_val)
8499 != (((HOST_WIDE_INT) 1
8500 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
8501 code = GT, op1 = GEN_INT (const_val - 1);
8505 if (uconst_val < max_val)
8506 code = LTU, op1 = GEN_INT (uconst_val + 1);
8510 if (uconst_val != 0)
8511 code = GTU, op1 = GEN_INT (uconst_val - 1);
8519 /* If this was floating-point and we reversed anything other than an
8520 EQ or NE or (UN)ORDERED, return zero. */
8521 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
8522 && did_reverse_condition
8523 && code != NE && code != EQ && code != UNORDERED && code != ORDERED
8525 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
8529 /* Never return CC0; return zero instead. */
8534 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
8537 /* Given a jump insn JUMP, return the condition that will cause it to branch
8538 to its JUMP_LABEL. If the condition cannot be understood, or is an
8539 inequality floating-point comparison which needs to be reversed, 0 will
8542 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8543 insn used in locating the condition was found. If a replacement test
8544 of the condition is desired, it should be placed in front of that
8545 insn and we will be sure that the inputs are still valid. */
8548 get_condition (jump, earliest)
8556 /* If this is not a standard conditional jump, we can't parse it. */
8557 if (GET_CODE (jump) != JUMP_INSN
8558 || ! any_condjump_p (jump))
8560 set = pc_set (jump);
8562 cond = XEXP (SET_SRC (set), 0);
8564 /* If this branches to JUMP_LABEL when the condition is false, reverse
8567 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
8568 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump);
8570 return canonicalize_condition (jump, cond, reverse, earliest, NULL_RTX);
8573 /* Similar to above routine, except that we also put an invariant last
8574 unless both operands are invariants. */
8577 get_condition_for_loop (loop, x)
8578 const struct loop *loop;
8581 rtx comparison = get_condition (x, NULL_PTR);
8584 || ! loop_invariant_p (loop, XEXP (comparison, 0))
8585 || loop_invariant_p (loop, XEXP (comparison, 1)))
8588 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
8589 XEXP (comparison, 1), XEXP (comparison, 0));
8592 /* Scan the function and determine whether it has indirect (computed) jumps.
8594 This is taken mostly from flow.c; similar code exists elsewhere
8595 in the compiler. It may be useful to put this into rtlanal.c. */
8597 indirect_jump_in_function_p (start)
8602 for (insn = start; insn; insn = NEXT_INSN (insn))
8603 if (computed_jump_p (insn))
8609 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
8610 documentation for LOOP_MEMS for the definition of `appropriate'.
8611 This function is called from prescan_loop via for_each_rtx. */
8614 insert_loop_mem (mem, data)
8616 void *data ATTRIBUTE_UNUSED;
8618 struct loop_info *loop_info = data;
8625 switch (GET_CODE (m))
8631 /* We're not interested in MEMs that are only clobbered. */
8635 /* We're not interested in the MEM associated with a
8636 CONST_DOUBLE, so there's no need to traverse into this. */
8640 /* We're not interested in any MEMs that only appear in notes. */
8644 /* This is not a MEM. */
8648 /* See if we've already seen this MEM. */
8649 for (i = 0; i < loop_info->mems_idx; ++i)
8650 if (rtx_equal_p (m, loop_info->mems[i].mem))
8652 if (GET_MODE (m) != GET_MODE (loop_info->mems[i].mem))
8653 /* The modes of the two memory accesses are different. If
8654 this happens, something tricky is going on, and we just
8655 don't optimize accesses to this MEM. */
8656 loop_info->mems[i].optimize = 0;
8661 /* Resize the array, if necessary. */
8662 if (loop_info->mems_idx == loop_info->mems_allocated)
8664 if (loop_info->mems_allocated != 0)
8665 loop_info->mems_allocated *= 2;
8667 loop_info->mems_allocated = 32;
8669 loop_info->mems = (loop_mem_info *)
8670 xrealloc (loop_info->mems,
8671 loop_info->mems_allocated * sizeof (loop_mem_info));
8674 /* Actually insert the MEM. */
8675 loop_info->mems[loop_info->mems_idx].mem = m;
8676 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
8677 because we can't put it in a register. We still store it in the
8678 table, though, so that if we see the same address later, but in a
8679 non-BLK mode, we'll not think we can optimize it at that point. */
8680 loop_info->mems[loop_info->mems_idx].optimize = (GET_MODE (m) != BLKmode);
8681 loop_info->mems[loop_info->mems_idx].reg = NULL_RTX;
8682 ++loop_info->mems_idx;
8688 /* Allocate REGS->ARRAY or reallocate it if it is too small.
8690 Increment REGS->ARRAY[I].SET_IN_LOOP at the index I of each
8691 register that is modified by an insn between FROM and TO. If the
8692 value of an element of REGS->array[I].SET_IN_LOOP becomes 127 or
8693 more, stop incrementing it, to avoid overflow.
8695 Store in REGS->ARRAY[I].SINGLE_USAGE the single insn in which
8696 register I is used, if it is only used once. Otherwise, it is set
8697 to 0 (for no uses) or const0_rtx for more than one use. This
8698 parameter may be zero, in which case this processing is not done.
8700 Set REGS->ARRAY[I].MAY_NOT_OPTIMIZE nonzero if we should not
8701 optimize register I.
8703 Store in *COUNT_PTR the number of actual instructions
8704 in the loop. We use this to decide what is worth moving out. */
8707 loop_regs_scan (loop, extra_size, count_ptr)
8708 const struct loop *loop;
8712 struct loop_regs *regs = LOOP_REGS (loop);
8714 /* last_set[n] is nonzero iff reg n has been set in the current
8715 basic block. In that case, it is the insn that last set reg n. */
8721 old_nregs = regs->num;
8722 regs->num = max_reg_num ();
8724 /* Grow the regs array if not allocated or too small. */
8725 if (regs->num >= regs->size)
8727 regs->size = regs->num + extra_size;
8729 regs->array = (struct loop_reg *)
8730 xrealloc (regs->array, regs->size * sizeof (*regs->array));
8732 /* Zero the new elements. */
8733 memset (regs->array + old_nregs, 0,
8734 (regs->size - old_nregs) * sizeof (*regs->array));
8737 /* Clear previously scanned fields but do not clear n_times_set. */
8738 for (i = 0; i < old_nregs; i++)
8740 regs->array[i].set_in_loop = 0;
8741 regs->array[i].may_not_optimize = 0;
8742 regs->array[i].single_usage = NULL_RTX;
8745 last_set = (rtx *) xcalloc (regs->num, sizeof (rtx));
8747 /* Scan the loop, recording register usage. */
8748 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
8749 insn = NEXT_INSN (insn))
8755 /* Record registers that have exactly one use. */
8756 find_single_use_in_loop (regs, insn, PATTERN (insn));
8758 /* Include uses in REG_EQUAL notes. */
8759 if (REG_NOTES (insn))
8760 find_single_use_in_loop (regs, insn, REG_NOTES (insn));
8762 if (GET_CODE (PATTERN (insn)) == SET
8763 || GET_CODE (PATTERN (insn)) == CLOBBER)
8764 count_one_set (regs, insn, PATTERN (insn), last_set);
8765 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
8768 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
8769 count_one_set (regs, insn, XVECEXP (PATTERN (insn), 0, i),
8774 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
8775 memset (last_set, 0, regs->num * sizeof (rtx));
8778 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
8780 regs->array[i].may_not_optimize = 1;
8781 regs->array[i].set_in_loop = 1;
8784 #ifdef AVOID_CCMODE_COPIES
8785 /* Don't try to move insns which set CC registers if we should not
8786 create CCmode register copies. */
8787 for (i = regs->num - 1; i >= FIRST_PSEUDO_REGISTER; i--)
8788 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
8789 regs->array[i].may_not_optimize = 1;
8792 /* Set regs->array[I].n_times_set for the new registers. */
8793 for (i = old_nregs; i < regs->num; i++)
8794 regs->array[i].n_times_set = regs->array[i].set_in_loop;
8801 /* Move MEMs into registers for the duration of the loop. */
8805 const struct loop *loop;
8807 struct loop_info *loop_info = LOOP_INFO (loop);
8808 struct loop_regs *regs = LOOP_REGS (loop);
8809 int maybe_never = 0;
8812 rtx label = NULL_RTX;
8814 /* Nonzero if the next instruction may never be executed. */
8815 int next_maybe_never = 0;
8816 int last_max_reg = max_reg_num ();
8818 if (loop_info->mems_idx == 0)
8821 /* We cannot use next_label here because it skips over normal insns. */
8822 end_label = next_nonnote_insn (loop->end);
8823 if (end_label && GET_CODE (end_label) != CODE_LABEL)
8824 end_label = NULL_RTX;
8826 /* Check to see if it's possible that some instructions in the loop are
8827 never executed. Also check if there is a goto out of the loop other
8828 than right after the end of the loop. */
8829 for (p = next_insn_in_loop (loop, loop->scan_start);
8830 p != NULL_RTX && ! maybe_never;
8831 p = next_insn_in_loop (loop, p))
8833 if (GET_CODE (p) == CODE_LABEL)
8835 else if (GET_CODE (p) == JUMP_INSN
8836 /* If we enter the loop in the middle, and scan
8837 around to the beginning, don't set maybe_never
8838 for that. This must be an unconditional jump,
8839 otherwise the code at the top of the loop might
8840 never be executed. Unconditional jumps are
8841 followed a by barrier then loop end. */
8842 && ! (GET_CODE (p) == JUMP_INSN
8843 && JUMP_LABEL (p) == loop->top
8844 && NEXT_INSN (NEXT_INSN (p)) == loop->end
8845 && any_uncondjump_p (p)))
8847 /* If this is a jump outside of the loop but not right
8848 after the end of the loop, we would have to emit new fixup
8849 sequences for each such label. */
8850 if (JUMP_LABEL (p) != end_label
8851 && (INSN_UID (JUMP_LABEL (p)) >= max_uid_for_loop
8852 || INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop->start)
8853 || INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop->end)))
8856 if (!any_condjump_p (p))
8857 /* Something complicated. */
8860 /* If there are any more instructions in the loop, they
8861 might not be reached. */
8862 next_maybe_never = 1;
8864 else if (next_maybe_never)
8868 /* Find start of the extended basic block that enters the loop. */
8869 for (p = loop->start;
8870 PREV_INSN (p) && GET_CODE (p) != CODE_LABEL;
8876 /* Build table of mems that get set to constant values before the
8878 for (; p != loop->start; p = NEXT_INSN (p))
8879 cselib_process_insn (p);
8881 /* Actually move the MEMs. */
8882 for (i = 0; i < loop_info->mems_idx; ++i)
8884 regset_head load_copies;
8885 regset_head store_copies;
8888 rtx mem = loop_info->mems[i].mem;
8891 if (MEM_VOLATILE_P (mem)
8892 || loop_invariant_p (loop, XEXP (mem, 0)) != 1)
8893 /* There's no telling whether or not MEM is modified. */
8894 loop_info->mems[i].optimize = 0;
8896 /* Go through the MEMs written to in the loop to see if this
8897 one is aliased by one of them. */
8898 mem_list_entry = loop_info->store_mems;
8899 while (mem_list_entry)
8901 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
8903 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
8906 /* MEM is indeed aliased by this store. */
8907 loop_info->mems[i].optimize = 0;
8910 mem_list_entry = XEXP (mem_list_entry, 1);
8913 if (flag_float_store && written
8914 && GET_MODE_CLASS (GET_MODE (mem)) == MODE_FLOAT)
8915 loop_info->mems[i].optimize = 0;
8917 /* If this MEM is written to, we must be sure that there
8918 are no reads from another MEM that aliases this one. */
8919 if (loop_info->mems[i].optimize && written)
8923 for (j = 0; j < loop_info->mems_idx; ++j)
8927 else if (true_dependence (mem,
8929 loop_info->mems[j].mem,
8932 /* It's not safe to hoist loop_info->mems[i] out of
8933 the loop because writes to it might not be
8934 seen by reads from loop_info->mems[j]. */
8935 loop_info->mems[i].optimize = 0;
8941 if (maybe_never && may_trap_p (mem))
8942 /* We can't access the MEM outside the loop; it might
8943 cause a trap that wouldn't have happened otherwise. */
8944 loop_info->mems[i].optimize = 0;
8946 if (!loop_info->mems[i].optimize)
8947 /* We thought we were going to lift this MEM out of the
8948 loop, but later discovered that we could not. */
8951 INIT_REG_SET (&load_copies);
8952 INIT_REG_SET (&store_copies);
8954 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
8955 order to keep scan_loop from moving stores to this MEM
8956 out of the loop just because this REG is neither a
8957 user-variable nor used in the loop test. */
8958 reg = gen_reg_rtx (GET_MODE (mem));
8959 REG_USERVAR_P (reg) = 1;
8960 loop_info->mems[i].reg = reg;
8962 /* Now, replace all references to the MEM with the
8963 corresponding pesudos. */
8965 for (p = next_insn_in_loop (loop, loop->scan_start);
8967 p = next_insn_in_loop (loop, p))
8973 set = single_set (p);
8975 /* See if this copies the mem into a register that isn't
8976 modified afterwards. We'll try to do copy propagation
8977 a little further on. */
8979 /* @@@ This test is _way_ too conservative. */
8981 && GET_CODE (SET_DEST (set)) == REG
8982 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
8983 && REGNO (SET_DEST (set)) < last_max_reg
8984 && regs->array[REGNO (SET_DEST (set))].n_times_set == 1
8985 && rtx_equal_p (SET_SRC (set), mem))
8986 SET_REGNO_REG_SET (&load_copies, REGNO (SET_DEST (set)));
8988 /* See if this copies the mem from a register that isn't
8989 modified afterwards. We'll try to remove the
8990 redundant copy later on by doing a little register
8991 renaming and copy propagation. This will help
8992 to untangle things for the BIV detection code. */
8995 && GET_CODE (SET_SRC (set)) == REG
8996 && REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER
8997 && REGNO (SET_SRC (set)) < last_max_reg
8998 && regs->array[REGNO (SET_SRC (set))].n_times_set == 1
8999 && rtx_equal_p (SET_DEST (set), mem))
9000 SET_REGNO_REG_SET (&store_copies, REGNO (SET_SRC (set)));
9002 /* Replace the memory reference with the shadow register. */
9003 replace_loop_mems (p, loop_info->mems[i].mem,
9004 loop_info->mems[i].reg);
9007 if (GET_CODE (p) == CODE_LABEL
9008 || GET_CODE (p) == JUMP_INSN)
9012 if (! apply_change_group ())
9013 /* We couldn't replace all occurrences of the MEM. */
9014 loop_info->mems[i].optimize = 0;
9017 /* Load the memory immediately before LOOP->START, which is
9018 the NOTE_LOOP_BEG. */
9019 cselib_val *e = cselib_lookup (mem, VOIDmode, 0);
9023 struct elt_loc_list *const_equiv = 0;
9027 struct elt_loc_list *equiv;
9028 struct elt_loc_list *best_equiv = 0;
9029 for (equiv = e->locs; equiv; equiv = equiv->next)
9031 if (CONSTANT_P (equiv->loc))
9032 const_equiv = equiv;
9033 else if (GET_CODE (equiv->loc) == REG
9034 /* Extending hard register lifetimes cuases crash
9035 on SRC targets. Doing so on non-SRC is
9036 probably also not good idea, since we most
9037 probably have pseudoregister equivalence as
9039 && REGNO (equiv->loc) >= FIRST_PSEUDO_REGISTER)
9042 /* Use the constant equivalence if that is cheap enough. */
9044 best_equiv = const_equiv;
9045 else if (const_equiv
9046 && (rtx_cost (const_equiv->loc, SET)
9047 <= rtx_cost (best_equiv->loc, SET)))
9049 best_equiv = const_equiv;
9053 /* If best_equiv is nonzero, we know that MEM is set to a
9054 constant or register before the loop. We will use this
9055 knowledge to initialize the shadow register with that
9056 constant or reg rather than by loading from MEM. */
9058 best = copy_rtx (best_equiv->loc);
9060 set = gen_move_insn (reg, best);
9061 set = loop_insn_hoist (loop, set);
9063 REG_NOTES (set) = gen_rtx_EXPR_LIST (REG_EQUAL,
9064 copy_rtx (const_equiv->loc),
9069 if (label == NULL_RTX)
9071 label = gen_label_rtx ();
9072 emit_label_after (label, loop->end);
9075 /* Store the memory immediately after END, which is
9076 the NOTE_LOOP_END. */
9077 set = gen_move_insn (copy_rtx (mem), reg);
9078 emit_insn_after (set, label);
9081 if (loop_dump_stream)
9083 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9084 REGNO (reg), (written ? "r/w" : "r/o"));
9085 print_rtl (loop_dump_stream, mem);
9086 fputc ('\n', loop_dump_stream);
9089 /* Attempt a bit of copy propagation. This helps untangle the
9090 data flow, and enables {basic,general}_induction_var to find
9092 EXECUTE_IF_SET_IN_REG_SET
9093 (&load_copies, FIRST_PSEUDO_REGISTER, j,
9095 try_copy_prop (loop, reg, j);
9097 CLEAR_REG_SET (&load_copies);
9099 EXECUTE_IF_SET_IN_REG_SET
9100 (&store_copies, FIRST_PSEUDO_REGISTER, j,
9102 try_swap_copy_prop (loop, reg, j);
9104 CLEAR_REG_SET (&store_copies);
9108 if (label != NULL_RTX && end_label != NULL_RTX)
9110 /* Now, we need to replace all references to the previous exit
9111 label with the new one. */
9116 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
9118 for_each_rtx (&p, replace_label, &rr);
9120 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9121 field. This is not handled by for_each_rtx because it doesn't
9122 handle unprinted ('0') fields. We need to update JUMP_LABEL
9123 because the immediately following unroll pass will use it.
9124 replace_label would not work anyways, because that only handles
9126 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9127 JUMP_LABEL (p) = label;
9134 /* For communication between note_reg_stored and its caller. */
9135 struct note_reg_stored_arg
9141 /* Called via note_stores, record in SET_SEEN whether X, which is written,
9144 note_reg_stored (x, setter, arg)
9145 rtx x, setter ATTRIBUTE_UNUSED;
9148 struct note_reg_stored_arg *t = (struct note_reg_stored_arg *) arg;
9153 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
9154 There must be exactly one insn that sets this pseudo; it will be
9155 deleted if all replacements succeed and we can prove that the register
9156 is not used after the loop. */
9159 try_copy_prop (loop, replacement, regno)
9160 const struct loop *loop;
9164 /* This is the reg that we are copying from. */
9165 rtx reg_rtx = regno_reg_rtx[regno];
9168 /* These help keep track of whether we replaced all uses of the reg. */
9169 int replaced_last = 0;
9170 int store_is_first = 0;
9172 for (insn = next_insn_in_loop (loop, loop->scan_start);
9174 insn = next_insn_in_loop (loop, insn))
9178 /* Only substitute within one extended basic block from the initializing
9180 if (GET_CODE (insn) == CODE_LABEL && init_insn)
9183 if (! INSN_P (insn))
9186 /* Is this the initializing insn? */
9187 set = single_set (insn);
9189 && GET_CODE (SET_DEST (set)) == REG
9190 && REGNO (SET_DEST (set)) == regno)
9196 if (REGNO_FIRST_UID (regno) == INSN_UID (insn))
9200 /* Only substitute after seeing the initializing insn. */
9201 if (init_insn && insn != init_insn)
9203 struct note_reg_stored_arg arg;
9205 replace_loop_regs (insn, reg_rtx, replacement);
9206 if (REGNO_LAST_UID (regno) == INSN_UID (insn))
9209 /* Stop replacing when REPLACEMENT is modified. */
9210 arg.reg = replacement;
9212 note_stores (PATTERN (insn), note_reg_stored, &arg);
9219 if (apply_change_group ())
9221 if (loop_dump_stream)
9222 fprintf (loop_dump_stream, " Replaced reg %d", regno);
9223 if (store_is_first && replaced_last)
9225 PUT_CODE (init_insn, NOTE);
9226 NOTE_LINE_NUMBER (init_insn) = NOTE_INSN_DELETED;
9227 if (loop_dump_stream)
9228 fprintf (loop_dump_stream, ", deleting init_insn (%d)",
9229 INSN_UID (init_insn));
9231 if (loop_dump_stream)
9232 fprintf (loop_dump_stream, ".\n");
9236 /* Try to replace occurrences of pseudo REGNO with REPLACEMENT within
9237 loop LOOP if the order of the sets of these registers can be
9238 swapped. There must be exactly one insn within the loop that sets
9239 this pseudo followed immediately by a move insn that sets
9240 REPLACEMENT with REGNO. */
9242 try_swap_copy_prop (loop, replacement, regno)
9243 const struct loop *loop;
9249 unsigned int new_regno;
9251 new_regno = REGNO (replacement);
9253 for (insn = next_insn_in_loop (loop, loop->scan_start);
9255 insn = next_insn_in_loop (loop, insn))
9257 /* Search for the insn that copies REGNO to NEW_REGNO? */
9258 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
9259 && (set = single_set (insn))
9260 && GET_CODE (SET_DEST (set)) == REG
9261 && REGNO (SET_DEST (set)) == new_regno
9262 && GET_CODE (SET_SRC (set)) == REG
9263 && REGNO (SET_SRC (set)) == regno)
9267 if (insn != NULL_RTX)
9272 /* Some DEF-USE info would come in handy here to make this
9273 function more general. For now, just check the previous insn
9274 which is the most likely candidate for setting REGNO. */
9276 prev_insn = PREV_INSN (insn);
9278 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
9279 && (prev_set = single_set (prev_insn))
9280 && GET_CODE (SET_DEST (prev_set)) == REG
9281 && REGNO (SET_DEST (prev_set)) == regno)
9284 (set (reg regno) (expr))
9285 (set (reg new_regno) (reg regno))
9287 so try converting this to:
9288 (set (reg new_regno) (expr))
9289 (set (reg regno) (reg new_regno))
9291 The former construct is often generated when a global
9292 variable used for an induction variable is shadowed by a
9293 register (NEW_REGNO). The latter construct improves the
9294 chances of GIV replacement and BIV elimination. */
9296 validate_change (prev_insn, &SET_DEST (prev_set),
9298 validate_change (insn, &SET_DEST (set),
9300 validate_change (insn, &SET_SRC (set),
9303 if (apply_change_group ())
9305 if (loop_dump_stream)
9306 fprintf (loop_dump_stream,
9307 " Swapped set of reg %d at %d with reg %d at %d.\n",
9308 regno, INSN_UID (insn),
9309 new_regno, INSN_UID (prev_insn));
9311 /* Update first use of REGNO. */
9312 if (REGNO_FIRST_UID (regno) == INSN_UID (prev_insn))
9313 REGNO_FIRST_UID (regno) = INSN_UID (insn);
9315 /* Now perform copy propagation to hopefully
9316 remove all uses of REGNO within the loop. */
9317 try_copy_prop (loop, replacement, regno);
9323 /* Replace MEM with its associated pseudo register. This function is
9324 called from load_mems via for_each_rtx. DATA is actually a pointer
9325 to a structure describing the instruction currently being scanned
9326 and the MEM we are currently replacing. */
9329 replace_loop_mem (mem, data)
9333 loop_replace_args *args = (loop_replace_args *) data;
9339 switch (GET_CODE (m))
9345 /* We're not interested in the MEM associated with a
9346 CONST_DOUBLE, so there's no need to traverse into one. */
9350 /* This is not a MEM. */
9354 if (!rtx_equal_p (args->match, m))
9355 /* This is not the MEM we are currently replacing. */
9358 /* Actually replace the MEM. */
9359 validate_change (args->insn, mem, args->replacement, 1);
9365 replace_loop_mems (insn, mem, reg)
9370 loop_replace_args args;
9374 args.replacement = reg;
9376 for_each_rtx (&insn, replace_loop_mem, &args);
9379 /* Replace one register with another. Called through for_each_rtx; PX points
9380 to the rtx being scanned. DATA is actually a pointer to
9381 a structure of arguments. */
9384 replace_loop_reg (px, data)
9389 loop_replace_args *args = (loop_replace_args *) data;
9394 if (x == args->match)
9395 validate_change (args->insn, px, args->replacement, 1);
9401 replace_loop_regs (insn, reg, replacement)
9406 loop_replace_args args;
9410 args.replacement = replacement;
9412 for_each_rtx (&insn, replace_loop_reg, &args);
9415 /* Replace occurrences of the old exit label for the loop with the new
9416 one. DATA is an rtx_pair containing the old and new labels,
9420 replace_label (x, data)
9425 rtx old_label = ((rtx_pair *) data)->r1;
9426 rtx new_label = ((rtx_pair *) data)->r2;
9431 if (GET_CODE (l) != LABEL_REF)
9434 if (XEXP (l, 0) != old_label)
9437 XEXP (l, 0) = new_label;
9438 ++LABEL_NUSES (new_label);
9439 --LABEL_NUSES (old_label);
9444 /* Emit insn for PATTERN after WHERE_INSN in basic block WHERE_BB
9445 (ignored in the interim). */
9448 loop_insn_emit_after (loop, where_bb, where_insn, pattern)
9449 const struct loop *loop ATTRIBUTE_UNUSED;
9450 basic_block where_bb ATTRIBUTE_UNUSED;
9454 return emit_insn_after (pattern, where_insn);
9458 /* If WHERE_INSN is non-zero emit insn for PATTERN before WHERE_INSN
9459 in basic block WHERE_BB (ignored in the interim) within the loop
9460 otherwise hoist PATTERN into the loop pre-header. */
9463 loop_insn_emit_before (loop, where_bb, where_insn, pattern)
9464 const struct loop *loop;
9465 basic_block where_bb ATTRIBUTE_UNUSED;
9470 return loop_insn_hoist (loop, pattern);
9471 return emit_insn_before (pattern, where_insn);
9475 /* Hoist insn for PATTERN into the loop pre-header. */
9478 loop_insn_hoist (loop, pattern)
9479 const struct loop *loop;
9482 return loop_insn_emit_before (loop, 0, loop->start, pattern);
9486 /* Sink insn for PATTERN after the loop end. */
9489 loop_insn_sink (loop, pattern)
9490 const struct loop *loop;
9493 return loop_insn_emit_before (loop, 0, loop->sink, pattern);
9497 /* If the loop has multiple exits, emit insn for PATTERN before the
9498 loop to ensure that it will always be executed no matter how the
9499 loop exits. Otherwise, emit the insn for PATTERN after the loop,
9500 since this is slightly more efficient. */
9503 loop_insn_sink_or_swim (loop, pattern)
9504 const struct loop *loop;
9507 if (loop->exit_count)
9508 return loop_insn_hoist (loop, pattern);
9510 return loop_insn_sink (loop, pattern);
9514 loop_ivs_dump (loop, file, verbose)
9515 const struct loop *loop;
9519 struct iv_class *bl;
9522 if (! loop || ! file)
9525 for (bl = LOOP_IVS (loop)->list; bl; bl = bl->next)
9528 fprintf (file, "Loop %d: %d IV classes\n", loop->num, iv_num);
9530 for (bl = LOOP_IVS (loop)->list; bl; bl = bl->next)
9532 loop_iv_class_dump (bl, file, verbose);
9539 loop_iv_class_dump (bl, file, verbose)
9540 const struct iv_class *bl;
9542 int verbose ATTRIBUTE_UNUSED;
9544 struct induction *v;
9551 fprintf (file, "IV class for reg %d, benefit %d\n",
9552 bl->regno, bl->total_benefit);
9554 fprintf (file, " Init insn %d", INSN_UID (bl->init_insn));
9555 if (bl->initial_value)
9557 fprintf (file, ", init val: ");
9558 print_simple_rtl (file, bl->initial_value);
9560 if (bl->initial_test)
9562 fprintf (file, ", init test: ");
9563 print_simple_rtl (file, bl->initial_test);
9567 if (bl->final_value)
9569 fprintf (file, " Final val: ");
9570 print_simple_rtl (file, bl->final_value);
9574 if ((incr = biv_total_increment (bl)))
9576 fprintf (file, " Total increment: ");
9577 print_simple_rtl (file, incr);
9581 /* List the increments. */
9582 for (i = 0, v = bl->biv; v; v = v->next_iv, i++)
9584 fprintf (file, " Inc%d: insn %d, incr: ", i, INSN_UID (v->insn));
9585 print_simple_rtl (file, v->add_val);
9589 /* List the givs. */
9590 for (i = 0, v = bl->giv; v; v = v->next_iv, i++)
9592 fprintf (file, " Giv%d: insn %d, benefit %d, ",
9593 i, INSN_UID (v->insn), v->benefit);
9594 if (v->giv_type == DEST_ADDR)
9595 print_simple_rtl (file, v->mem);
9597 print_simple_rtl (file, single_set (v->insn));
9604 loop_biv_dump (v, file, verbose)
9605 const struct induction *v;
9614 REGNO (v->dest_reg), INSN_UID (v->insn));
9615 fprintf (file, " const ");
9616 print_simple_rtl (file, v->add_val);
9618 if (verbose && v->final_value)
9621 fprintf (file, " final ");
9622 print_simple_rtl (file, v->final_value);
9630 loop_giv_dump (v, file, verbose)
9631 const struct induction *v;
9638 if (v->giv_type == DEST_REG)
9639 fprintf (file, "Giv %d: insn %d",
9640 REGNO (v->dest_reg), INSN_UID (v->insn));
9642 fprintf (file, "Dest address: insn %d",
9643 INSN_UID (v->insn));
9645 fprintf (file, " src reg %d benefit %d",
9646 REGNO (v->src_reg), v->benefit);
9647 fprintf (file, " lifetime %d",
9651 fprintf (file, " replaceable");
9653 if (v->no_const_addval)
9654 fprintf (file, " ncav");
9656 if (v->ext_dependant)
9658 switch (GET_CODE (v->ext_dependant))
9661 fprintf (file, " ext se");
9664 fprintf (file, " ext ze");
9667 fprintf (file, " ext tr");
9675 fprintf (file, " mult ");
9676 print_simple_rtl (file, v->mult_val);
9679 fprintf (file, " add ");
9680 print_simple_rtl (file, v->add_val);
9682 if (verbose && v->final_value)
9685 fprintf (file, " final ");
9686 print_simple_rtl (file, v->final_value);
9695 const struct loop *loop;
9697 loop_ivs_dump (loop, stderr, 1);
9703 const struct iv_class *bl;
9705 loop_iv_class_dump (bl, stderr, 1);
9711 const struct induction *v;
9713 loop_biv_dump (v, stderr, 1);
9719 const struct induction *v;
9721 loop_giv_dump (v, stderr, 1);
9725 #define LOOP_BLOCK_NUM_1(INSN) \
9726 ((INSN) ? (BLOCK_FOR_INSN (INSN) ? BLOCK_NUM (INSN) : - 1) : -1)
9728 /* The notes do not have an assigned block, so look at the next insn. */
9729 #define LOOP_BLOCK_NUM(INSN) \
9730 ((INSN) ? (GET_CODE (INSN) == NOTE \
9731 ? LOOP_BLOCK_NUM_1 (next_nonnote_insn (INSN)) \
9732 : LOOP_BLOCK_NUM_1 (INSN)) \
9735 #define LOOP_INSN_UID(INSN) ((INSN) ? INSN_UID (INSN) : -1)
9738 loop_dump_aux (loop, file, verbose)
9739 const struct loop *loop;
9741 int verbose ATTRIBUTE_UNUSED;
9745 if (! loop || ! file)
9748 /* Print diagnostics to compare our concept of a loop with
9749 what the loop notes say. */
9750 if (! PREV_INSN (loop->first->head)
9751 || GET_CODE (PREV_INSN (loop->first->head)) != NOTE
9752 || NOTE_LINE_NUMBER (PREV_INSN (loop->first->head))
9753 != NOTE_INSN_LOOP_BEG)
9754 fprintf (file, ";; No NOTE_INSN_LOOP_BEG at %d\n",
9755 INSN_UID (PREV_INSN (loop->first->head)));
9756 if (! NEXT_INSN (loop->last->end)
9757 || GET_CODE (NEXT_INSN (loop->last->end)) != NOTE
9758 || NOTE_LINE_NUMBER (NEXT_INSN (loop->last->end))
9759 != NOTE_INSN_LOOP_END)
9760 fprintf (file, ";; No NOTE_INSN_LOOP_END at %d\n",
9761 INSN_UID (NEXT_INSN (loop->last->end)));
9766 ";; start %d (%d), cont dom %d (%d), cont %d (%d), vtop %d (%d), end %d (%d)\n",
9767 LOOP_BLOCK_NUM (loop->start),
9768 LOOP_INSN_UID (loop->start),
9769 LOOP_BLOCK_NUM (loop->cont),
9770 LOOP_INSN_UID (loop->cont),
9771 LOOP_BLOCK_NUM (loop->cont),
9772 LOOP_INSN_UID (loop->cont),
9773 LOOP_BLOCK_NUM (loop->vtop),
9774 LOOP_INSN_UID (loop->vtop),
9775 LOOP_BLOCK_NUM (loop->end),
9776 LOOP_INSN_UID (loop->end));
9777 fprintf (file, ";; top %d (%d), scan start %d (%d)\n",
9778 LOOP_BLOCK_NUM (loop->top),
9779 LOOP_INSN_UID (loop->top),
9780 LOOP_BLOCK_NUM (loop->scan_start),
9781 LOOP_INSN_UID (loop->scan_start));
9782 fprintf (file, ";; exit_count %d", loop->exit_count);
9783 if (loop->exit_count)
9785 fputs (", labels:", file);
9786 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
9788 fprintf (file, " %d ",
9789 LOOP_INSN_UID (XEXP (label, 0)));
9794 /* This can happen when a marked loop appears as two nested loops,
9795 say from while (a || b) {}. The inner loop won't match
9796 the loop markers but the outer one will. */
9797 if (LOOP_BLOCK_NUM (loop->cont) != loop->latch->index)
9798 fprintf (file, ";; NOTE_INSN_LOOP_CONT not in loop latch\n");
9802 /* Call this function from the debugger to dump LOOP. */
9806 const struct loop *loop;
9808 flow_loop_dump (loop, stderr, loop_dump_aux, 1);
9811 /* Call this function from the debugger to dump LOOPS. */
9815 const struct loops *loops;
9817 flow_loops_dump (loops, stderr, loop_dump_aux, 1);
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