1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
39 #include "coretypes.h"
45 #include "hard-reg-set.h"
46 #include "basic-block.h"
47 #include "insn-config.h"
57 #include "insn-flags.h"
61 /* Not really meaningful values, but at least something. */
62 #ifndef SIMULTANEOUS_PREFETCHES
63 #define SIMULTANEOUS_PREFETCHES 3
65 #ifndef PREFETCH_BLOCK
66 #define PREFETCH_BLOCK 32
69 #define HAVE_prefetch 0
70 #define CODE_FOR_prefetch 0
71 #define gen_prefetch(a,b,c) (abort(), NULL_RTX)
74 /* Give up the prefetch optimizations once we exceed a given threshhold.
75 It is unlikely that we would be able to optimize something in a loop
76 with so many detected prefetches. */
77 #define MAX_PREFETCHES 100
78 /* The number of prefetch blocks that are beneficial to fetch at once before
79 a loop with a known (and low) iteration count. */
80 #define PREFETCH_BLOCKS_BEFORE_LOOP_MAX 6
81 /* For very tiny loops it is not worthwhile to prefetch even before the loop,
82 since it is likely that the data are already in the cache. */
83 #define PREFETCH_BLOCKS_BEFORE_LOOP_MIN 2
85 /* Parameterize some prefetch heuristics so they can be turned on and off
86 easily for performance testing on new architectures. These can be
87 defined in target-dependent files. */
89 /* Prefetch is worthwhile only when loads/stores are dense. */
90 #ifndef PREFETCH_ONLY_DENSE_MEM
91 #define PREFETCH_ONLY_DENSE_MEM 1
94 /* Define what we mean by "dense" loads and stores; This value divided by 256
95 is the minimum percentage of memory references that worth prefetching. */
96 #ifndef PREFETCH_DENSE_MEM
97 #define PREFETCH_DENSE_MEM 220
100 /* Do not prefetch for a loop whose iteration count is known to be low. */
101 #ifndef PREFETCH_NO_LOW_LOOPCNT
102 #define PREFETCH_NO_LOW_LOOPCNT 1
105 /* Define what we mean by a "low" iteration count. */
106 #ifndef PREFETCH_LOW_LOOPCNT
107 #define PREFETCH_LOW_LOOPCNT 32
110 /* Do not prefetch for a loop that contains a function call; such a loop is
111 probably not an internal loop. */
112 #ifndef PREFETCH_NO_CALL
113 #define PREFETCH_NO_CALL 1
116 /* Do not prefetch accesses with an extreme stride. */
117 #ifndef PREFETCH_NO_EXTREME_STRIDE
118 #define PREFETCH_NO_EXTREME_STRIDE 1
121 /* Define what we mean by an "extreme" stride. */
122 #ifndef PREFETCH_EXTREME_STRIDE
123 #define PREFETCH_EXTREME_STRIDE 4096
126 /* Define a limit to how far apart indices can be and still be merged
127 into a single prefetch. */
128 #ifndef PREFETCH_EXTREME_DIFFERENCE
129 #define PREFETCH_EXTREME_DIFFERENCE 4096
132 /* Issue prefetch instructions before the loop to fetch data to be used
133 in the first few loop iterations. */
134 #ifndef PREFETCH_BEFORE_LOOP
135 #define PREFETCH_BEFORE_LOOP 1
138 /* Do not handle reversed order prefetches (negative stride). */
139 #ifndef PREFETCH_NO_REVERSE_ORDER
140 #define PREFETCH_NO_REVERSE_ORDER 1
143 /* Prefetch even if the GIV is in conditional code. */
144 #ifndef PREFETCH_CONDITIONAL
145 #define PREFETCH_CONDITIONAL 1
148 #define LOOP_REG_LIFETIME(LOOP, REGNO) \
149 ((REGNO_LAST_LUID (REGNO) - REGNO_FIRST_LUID (REGNO)))
151 #define LOOP_REG_GLOBAL_P(LOOP, REGNO) \
152 ((REGNO_LAST_LUID (REGNO) > INSN_LUID ((LOOP)->end) \
153 || REGNO_FIRST_LUID (REGNO) < INSN_LUID ((LOOP)->start)))
155 #define LOOP_REGNO_NREGS(REGNO, SET_DEST) \
156 ((REGNO) < FIRST_PSEUDO_REGISTER \
157 ? (int) HARD_REGNO_NREGS ((REGNO), GET_MODE (SET_DEST)) : 1)
160 /* Vector mapping INSN_UIDs to luids.
161 The luids are like uids but increase monotonically always.
162 We use them to see whether a jump comes from outside a given loop. */
166 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
167 number the insn is contained in. */
169 struct loop **uid_loop;
171 /* 1 + largest uid of any insn. */
173 int max_uid_for_loop;
175 /* Number of loops detected in current function. Used as index to the
178 static int max_loop_num;
180 /* Bound on pseudo register number before loop optimization.
181 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
182 unsigned int max_reg_before_loop;
184 /* The value to pass to the next call of reg_scan_update. */
185 static int loop_max_reg;
187 /* During the analysis of a loop, a chain of `struct movable's
188 is made to record all the movable insns found.
189 Then the entire chain can be scanned to decide which to move. */
193 rtx insn; /* A movable insn */
194 rtx set_src; /* The expression this reg is set from. */
195 rtx set_dest; /* The destination of this SET. */
196 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
197 of any registers used within the LIBCALL. */
198 int consec; /* Number of consecutive following insns
199 that must be moved with this one. */
200 unsigned int regno; /* The register it sets */
201 short lifetime; /* lifetime of that register;
202 may be adjusted when matching movables
203 that load the same value are found. */
204 short savings; /* Number of insns we can move for this reg,
205 including other movables that force this
206 or match this one. */
207 ENUM_BITFIELD(machine_mode) savemode : 8; /* Nonzero means it is a mode for
208 a low part that we should avoid changing when
209 clearing the rest of the reg. */
210 unsigned int cond : 1; /* 1 if only conditionally movable */
211 unsigned int force : 1; /* 1 means MUST move this insn */
212 unsigned int global : 1; /* 1 means reg is live outside this loop */
213 /* If PARTIAL is 1, GLOBAL means something different:
214 that the reg is live outside the range from where it is set
215 to the following label. */
216 unsigned int done : 1; /* 1 inhibits further processing of this */
218 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
219 In particular, moving it does not make it
221 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
222 load SRC, rather than copying INSN. */
223 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
224 first insn of a consecutive sets group. */
225 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
226 unsigned int insert_temp : 1; /* 1 means we copy to a new pseudo and replace
227 the original insn with a copy from that
228 pseudo, rather than deleting it. */
229 struct movable *match; /* First entry for same value */
230 struct movable *forces; /* An insn that must be moved if this is */
231 struct movable *next;
235 FILE *loop_dump_stream;
237 /* Forward declarations. */
239 static void invalidate_loops_containing_label PARAMS ((rtx));
240 static void find_and_verify_loops PARAMS ((rtx, struct loops *));
241 static void mark_loop_jump PARAMS ((rtx, struct loop *));
242 static void prescan_loop PARAMS ((struct loop *));
243 static int reg_in_basic_block_p PARAMS ((rtx, rtx));
244 static int consec_sets_invariant_p PARAMS ((const struct loop *,
246 static int labels_in_range_p PARAMS ((rtx, int));
247 static void count_one_set PARAMS ((struct loop_regs *, rtx, rtx, rtx *));
248 static void note_addr_stored PARAMS ((rtx, rtx, void *));
249 static void note_set_pseudo_multiple_uses PARAMS ((rtx, rtx, void *));
250 static int loop_reg_used_before_p PARAMS ((const struct loop *, rtx, rtx));
251 static void scan_loop PARAMS ((struct loop*, int));
253 static void replace_call_address PARAMS ((rtx, rtx, rtx));
255 static rtx skip_consec_insns PARAMS ((rtx, int));
256 static int libcall_benefit PARAMS ((rtx));
257 static void ignore_some_movables PARAMS ((struct loop_movables *));
258 static void force_movables PARAMS ((struct loop_movables *));
259 static void combine_movables PARAMS ((struct loop_movables *,
260 struct loop_regs *));
261 static int num_unmoved_movables PARAMS ((const struct loop *));
262 static int regs_match_p PARAMS ((rtx, rtx, struct loop_movables *));
263 static int rtx_equal_for_loop_p PARAMS ((rtx, rtx, struct loop_movables *,
264 struct loop_regs *));
265 static void add_label_notes PARAMS ((rtx, rtx));
266 static void move_movables PARAMS ((struct loop *loop, struct loop_movables *,
268 static void loop_movables_add PARAMS((struct loop_movables *,
270 static void loop_movables_free PARAMS((struct loop_movables *));
271 static int count_nonfixed_reads PARAMS ((const struct loop *, rtx));
272 static void loop_bivs_find PARAMS((struct loop *));
273 static void loop_bivs_init_find PARAMS((struct loop *));
274 static void loop_bivs_check PARAMS((struct loop *));
275 static void loop_givs_find PARAMS((struct loop *));
276 static void loop_givs_check PARAMS((struct loop *));
277 static int loop_biv_eliminable_p PARAMS((struct loop *, struct iv_class *,
279 static int loop_giv_reduce_benefit PARAMS((struct loop *, struct iv_class *,
280 struct induction *, rtx));
281 static void loop_givs_dead_check PARAMS((struct loop *, struct iv_class *));
282 static void loop_givs_reduce PARAMS((struct loop *, struct iv_class *));
283 static void loop_givs_rescan PARAMS((struct loop *, struct iv_class *,
285 static void loop_ivs_free PARAMS((struct loop *));
286 static void strength_reduce PARAMS ((struct loop *, int));
287 static void find_single_use_in_loop PARAMS ((struct loop_regs *, rtx, rtx));
288 static int valid_initial_value_p PARAMS ((rtx, rtx, int, rtx));
289 static void find_mem_givs PARAMS ((const struct loop *, rtx, rtx, int, int));
290 static void record_biv PARAMS ((struct loop *, struct induction *,
291 rtx, rtx, rtx, rtx, rtx *,
293 static void check_final_value PARAMS ((const struct loop *,
294 struct induction *));
295 static void loop_ivs_dump PARAMS((const struct loop *, FILE *, int));
296 static void loop_iv_class_dump PARAMS((const struct iv_class *, FILE *, int));
297 static void loop_biv_dump PARAMS((const struct induction *, FILE *, int));
298 static void loop_giv_dump PARAMS((const struct induction *, FILE *, int));
299 static void record_giv PARAMS ((const struct loop *, struct induction *,
300 rtx, rtx, rtx, rtx, rtx, rtx, int,
301 enum g_types, int, int, rtx *));
302 static void update_giv_derive PARAMS ((const struct loop *, rtx));
303 static void check_ext_dependent_givs PARAMS ((struct iv_class *,
304 struct loop_info *));
305 static int basic_induction_var PARAMS ((const struct loop *, rtx,
306 enum machine_mode, rtx, rtx,
307 rtx *, rtx *, rtx **));
308 static rtx simplify_giv_expr PARAMS ((const struct loop *, rtx, rtx *, int *));
309 static int general_induction_var PARAMS ((const struct loop *loop, rtx, rtx *,
310 rtx *, rtx *, rtx *, int, int *,
312 static int consec_sets_giv PARAMS ((const struct loop *, int, rtx,
313 rtx, rtx, rtx *, rtx *, rtx *, rtx *));
314 static int check_dbra_loop PARAMS ((struct loop *, int));
315 static rtx express_from_1 PARAMS ((rtx, rtx, rtx));
316 static rtx combine_givs_p PARAMS ((struct induction *, struct induction *));
317 static int cmp_combine_givs_stats PARAMS ((const PTR, const PTR));
318 static void combine_givs PARAMS ((struct loop_regs *, struct iv_class *));
319 static int product_cheap_p PARAMS ((rtx, rtx));
320 static int maybe_eliminate_biv PARAMS ((const struct loop *, struct iv_class *,
322 static int maybe_eliminate_biv_1 PARAMS ((const struct loop *, rtx, rtx,
323 struct iv_class *, int,
325 static int last_use_this_basic_block PARAMS ((rtx, rtx));
326 static void record_initial PARAMS ((rtx, rtx, void *));
327 static void update_reg_last_use PARAMS ((rtx, rtx));
328 static rtx next_insn_in_loop PARAMS ((const struct loop *, rtx));
329 static void loop_regs_scan PARAMS ((const struct loop *, int));
330 static int count_insns_in_loop PARAMS ((const struct loop *));
331 static int find_mem_in_note_1 PARAMS ((rtx *, void *));
332 static rtx find_mem_in_note PARAMS ((rtx));
333 static void load_mems PARAMS ((const struct loop *));
334 static int insert_loop_mem PARAMS ((rtx *, void *));
335 static int replace_loop_mem PARAMS ((rtx *, void *));
336 static void replace_loop_mems PARAMS ((rtx, rtx, rtx, int));
337 static int replace_loop_reg PARAMS ((rtx *, void *));
338 static void replace_loop_regs PARAMS ((rtx insn, rtx, rtx));
339 static void note_reg_stored PARAMS ((rtx, rtx, void *));
340 static void try_copy_prop PARAMS ((const struct loop *, rtx, unsigned int));
341 static void try_swap_copy_prop PARAMS ((const struct loop *, rtx,
343 static rtx check_insn_for_givs PARAMS((struct loop *, rtx, int, int));
344 static rtx check_insn_for_bivs PARAMS((struct loop *, rtx, int, int));
345 static rtx gen_add_mult PARAMS ((rtx, rtx, rtx, rtx));
346 static void loop_regs_update PARAMS ((const struct loop *, rtx));
347 static int iv_add_mult_cost PARAMS ((rtx, rtx, rtx, rtx));
349 static rtx loop_insn_emit_after PARAMS((const struct loop *, basic_block,
351 static rtx loop_call_insn_emit_before PARAMS((const struct loop *,
352 basic_block, rtx, rtx));
353 static rtx loop_call_insn_hoist PARAMS((const struct loop *, rtx));
354 static rtx loop_insn_sink_or_swim PARAMS((const struct loop *, rtx));
356 static void loop_dump_aux PARAMS ((const struct loop *, FILE *, int));
357 static void loop_delete_insns PARAMS ((rtx, rtx));
358 static HOST_WIDE_INT remove_constant_addition PARAMS ((rtx *));
359 static rtx gen_load_of_final_value PARAMS ((rtx, rtx));
360 void debug_ivs PARAMS ((const struct loop *));
361 void debug_iv_class PARAMS ((const struct iv_class *));
362 void debug_biv PARAMS ((const struct induction *));
363 void debug_giv PARAMS ((const struct induction *));
364 void debug_loop PARAMS ((const struct loop *));
365 void debug_loops PARAMS ((const struct loops *));
367 typedef struct loop_replace_args
374 /* Nonzero iff INSN is between START and END, inclusive. */
375 #define INSN_IN_RANGE_P(INSN, START, END) \
376 (INSN_UID (INSN) < max_uid_for_loop \
377 && INSN_LUID (INSN) >= INSN_LUID (START) \
378 && INSN_LUID (INSN) <= INSN_LUID (END))
380 /* Indirect_jump_in_function is computed once per function. */
381 static int indirect_jump_in_function;
382 static int indirect_jump_in_function_p PARAMS ((rtx));
384 static int compute_luids PARAMS ((rtx, rtx, int));
386 static int biv_elimination_giv_has_0_offset PARAMS ((struct induction *,
390 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
391 copy the value of the strength reduced giv to its original register. */
392 static int copy_cost;
394 /* Cost of using a register, to normalize the benefits of a giv. */
395 static int reg_address_cost;
400 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
402 reg_address_cost = address_cost (reg, SImode);
404 copy_cost = COSTS_N_INSNS (1);
407 /* Compute the mapping from uids to luids.
408 LUIDs are numbers assigned to insns, like uids,
409 except that luids increase monotonically through the code.
410 Start at insn START and stop just before END. Assign LUIDs
411 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
413 compute_luids (start, end, prev_luid)
420 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
422 if (INSN_UID (insn) >= max_uid_for_loop)
424 /* Don't assign luids to line-number NOTEs, so that the distance in
425 luids between two insns is not affected by -g. */
426 if (GET_CODE (insn) != NOTE
427 || NOTE_LINE_NUMBER (insn) <= 0)
428 uid_luid[INSN_UID (insn)] = ++i;
430 /* Give a line number note the same luid as preceding insn. */
431 uid_luid[INSN_UID (insn)] = i;
436 /* Entry point of this file. Perform loop optimization
437 on the current function. F is the first insn of the function
438 and DUMPFILE is a stream for output of a trace of actions taken
439 (or 0 if none should be output). */
442 loop_optimize (f, dumpfile, flags)
443 /* f is the first instruction of a chain of insns for one function */
450 struct loops loops_data;
451 struct loops *loops = &loops_data;
452 struct loop_info *loops_info;
454 loop_dump_stream = dumpfile;
456 init_recog_no_volatile ();
458 max_reg_before_loop = max_reg_num ();
459 loop_max_reg = max_reg_before_loop;
463 /* Count the number of loops. */
466 for (insn = f; insn; insn = NEXT_INSN (insn))
468 if (GET_CODE (insn) == NOTE
469 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
473 /* Don't waste time if no loops. */
474 if (max_loop_num == 0)
477 loops->num = max_loop_num;
479 /* Get size to use for tables indexed by uids.
480 Leave some space for labels allocated by find_and_verify_loops. */
481 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
483 uid_luid = (int *) xcalloc (max_uid_for_loop, sizeof (int));
484 uid_loop = (struct loop **) xcalloc (max_uid_for_loop,
485 sizeof (struct loop *));
487 /* Allocate storage for array of loops. */
488 loops->array = (struct loop *)
489 xcalloc (loops->num, sizeof (struct loop));
491 /* Find and process each loop.
492 First, find them, and record them in order of their beginnings. */
493 find_and_verify_loops (f, loops);
495 /* Allocate and initialize auxiliary loop information. */
496 loops_info = xcalloc (loops->num, sizeof (struct loop_info));
497 for (i = 0; i < (int) loops->num; i++)
498 loops->array[i].aux = loops_info + i;
500 /* Now find all register lifetimes. This must be done after
501 find_and_verify_loops, because it might reorder the insns in the
503 reg_scan (f, max_reg_before_loop, 1);
505 /* This must occur after reg_scan so that registers created by gcse
506 will have entries in the register tables.
508 We could have added a call to reg_scan after gcse_main in toplev.c,
509 but moving this call to init_alias_analysis is more efficient. */
510 init_alias_analysis ();
512 /* See if we went too far. Note that get_max_uid already returns
513 one more that the maximum uid of all insn. */
514 if (get_max_uid () > max_uid_for_loop)
516 /* Now reset it to the actual size we need. See above. */
517 max_uid_for_loop = get_max_uid ();
519 /* find_and_verify_loops has already called compute_luids, but it
520 might have rearranged code afterwards, so we need to recompute
522 compute_luids (f, NULL_RTX, 0);
524 /* Don't leave gaps in uid_luid for insns that have been
525 deleted. It is possible that the first or last insn
526 using some register has been deleted by cross-jumping.
527 Make sure that uid_luid for that former insn's uid
528 points to the general area where that insn used to be. */
529 for (i = 0; i < max_uid_for_loop; i++)
531 uid_luid[0] = uid_luid[i];
532 if (uid_luid[0] != 0)
535 for (i = 0; i < max_uid_for_loop; i++)
536 if (uid_luid[i] == 0)
537 uid_luid[i] = uid_luid[i - 1];
539 /* Determine if the function has indirect jump. On some systems
540 this prevents low overhead loop instructions from being used. */
541 indirect_jump_in_function = indirect_jump_in_function_p (f);
543 /* Now scan the loops, last ones first, since this means inner ones are done
544 before outer ones. */
545 for (i = max_loop_num - 1; i >= 0; i--)
547 struct loop *loop = &loops->array[i];
549 if (! loop->invalid && loop->end)
550 scan_loop (loop, flags);
553 end_alias_analysis ();
562 /* Returns the next insn, in execution order, after INSN. START and
563 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
564 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
565 insn-stream; it is used with loops that are entered near the
569 next_insn_in_loop (loop, insn)
570 const struct loop *loop;
573 insn = NEXT_INSN (insn);
575 if (insn == loop->end)
578 /* Go to the top of the loop, and continue there. */
585 if (insn == loop->scan_start)
592 /* Optimize one loop described by LOOP. */
594 /* ??? Could also move memory writes out of loops if the destination address
595 is invariant, the source is invariant, the memory write is not volatile,
596 and if we can prove that no read inside the loop can read this address
597 before the write occurs. If there is a read of this address after the
598 write, then we can also mark the memory read as invariant. */
601 scan_loop (loop, flags)
605 struct loop_info *loop_info = LOOP_INFO (loop);
606 struct loop_regs *regs = LOOP_REGS (loop);
608 rtx loop_start = loop->start;
609 rtx loop_end = loop->end;
611 /* 1 if we are scanning insns that could be executed zero times. */
613 /* 1 if we are scanning insns that might never be executed
614 due to a subroutine call which might exit before they are reached. */
616 /* Number of insns in the loop. */
619 rtx temp, update_start, update_end;
620 /* The SET from an insn, if it is the only SET in the insn. */
622 /* Chain describing insns movable in current loop. */
623 struct loop_movables *movables = LOOP_MOVABLES (loop);
624 /* Ratio of extra register life span we can justify
625 for saving an instruction. More if loop doesn't call subroutines
626 since in that case saving an insn makes more difference
627 and more registers are available. */
629 /* Nonzero if we are scanning instructions in a sub-loop. */
638 /* Determine whether this loop starts with a jump down to a test at
639 the end. This will occur for a small number of loops with a test
640 that is too complex to duplicate in front of the loop.
642 We search for the first insn or label in the loop, skipping NOTEs.
643 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
644 (because we might have a loop executed only once that contains a
645 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
646 (in case we have a degenerate loop).
648 Note that if we mistakenly think that a loop is entered at the top
649 when, in fact, it is entered at the exit test, the only effect will be
650 slightly poorer optimization. Making the opposite error can generate
651 incorrect code. Since very few loops now start with a jump to the
652 exit test, the code here to detect that case is very conservative. */
654 for (p = NEXT_INSN (loop_start);
656 && GET_CODE (p) != CODE_LABEL && ! INSN_P (p)
657 && (GET_CODE (p) != NOTE
658 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
659 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
663 loop->scan_start = p;
665 /* If loop end is the end of the current function, then emit a
666 NOTE_INSN_DELETED after loop_end and set loop->sink to the dummy
667 note insn. This is the position we use when sinking insns out of
669 if (NEXT_INSN (loop->end) != 0)
670 loop->sink = NEXT_INSN (loop->end);
672 loop->sink = emit_note_after (NOTE_INSN_DELETED, loop->end);
674 /* Set up variables describing this loop. */
676 threshold = (loop_info->has_call ? 1 : 2) * (1 + n_non_fixed_regs);
678 /* If loop has a jump before the first label,
679 the true entry is the target of that jump.
680 Start scan from there.
681 But record in LOOP->TOP the place where the end-test jumps
682 back to so we can scan that after the end of the loop. */
683 if (GET_CODE (p) == JUMP_INSN
684 /* Loop entry must be unconditional jump (and not a RETURN) */
685 && any_uncondjump_p (p)
686 && JUMP_LABEL (p) != 0
687 /* Check to see whether the jump actually
688 jumps out of the loop (meaning it's no loop).
689 This case can happen for things like
690 do {..} while (0). If this label was generated previously
691 by loop, we can't tell anything about it and have to reject
693 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, loop_end))
695 loop->top = next_label (loop->scan_start);
696 loop->scan_start = JUMP_LABEL (p);
699 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
700 as required by loop_reg_used_before_p. So skip such loops. (This
701 test may never be true, but it's best to play it safe.)
703 Also, skip loops where we do not start scanning at a label. This
704 test also rejects loops starting with a JUMP_INSN that failed the
707 if (INSN_UID (loop->scan_start) >= max_uid_for_loop
708 || GET_CODE (loop->scan_start) != CODE_LABEL)
710 if (loop_dump_stream)
711 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
712 INSN_UID (loop_start), INSN_UID (loop_end));
716 /* Allocate extra space for REGs that might be created by load_mems.
717 We allocate a little extra slop as well, in the hopes that we
718 won't have to reallocate the regs array. */
719 loop_regs_scan (loop, loop_info->mems_idx + 16);
720 insn_count = count_insns_in_loop (loop);
722 if (loop_dump_stream)
724 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
725 INSN_UID (loop_start), INSN_UID (loop_end), insn_count);
727 fprintf (loop_dump_stream, "Continue at insn %d.\n",
728 INSN_UID (loop->cont));
731 /* Scan through the loop finding insns that are safe to move.
732 Set REGS->ARRAY[I].SET_IN_LOOP negative for the reg I being set, so that
733 this reg will be considered invariant for subsequent insns.
734 We consider whether subsequent insns use the reg
735 in deciding whether it is worth actually moving.
737 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
738 and therefore it is possible that the insns we are scanning
739 would never be executed. At such times, we must make sure
740 that it is safe to execute the insn once instead of zero times.
741 When MAYBE_NEVER is 0, all insns will be executed at least once
742 so that is not a problem. */
744 for (in_libcall = 0, p = next_insn_in_loop (loop, loop->scan_start);
746 p = next_insn_in_loop (loop, p))
748 if (in_libcall && INSN_P (p) && find_reg_note (p, REG_RETVAL, NULL_RTX))
750 if (GET_CODE (p) == INSN)
752 temp = find_reg_note (p, REG_LIBCALL, NULL_RTX);
756 && (set = single_set (p))
757 && GET_CODE (SET_DEST (set)) == REG
758 #ifdef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
759 && SET_DEST (set) != pic_offset_table_rtx
761 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
767 rtx src = SET_SRC (set);
768 rtx dependencies = 0;
770 /* Figure out what to use as a source of this insn. If a
771 REG_EQUIV note is given or if a REG_EQUAL note with a
772 constant operand is specified, use it as the source and
773 mark that we should move this insn by calling
774 emit_move_insn rather that duplicating the insn.
776 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL
778 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
780 src = XEXP (temp, 0), move_insn = 1;
783 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
784 if (temp && CONSTANT_P (XEXP (temp, 0)))
785 src = XEXP (temp, 0), move_insn = 1;
786 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
788 src = XEXP (temp, 0);
789 /* A libcall block can use regs that don't appear in
790 the equivalent expression. To move the libcall,
791 we must move those regs too. */
792 dependencies = libcall_other_reg (p, src);
796 /* For parallels, add any possible uses to the dependencies, as
797 we can't move the insn without resolving them first. */
798 if (GET_CODE (PATTERN (p)) == PARALLEL)
800 for (i = 0; i < XVECLEN (PATTERN (p), 0); i++)
802 rtx x = XVECEXP (PATTERN (p), 0, i);
803 if (GET_CODE (x) == USE)
805 = gen_rtx_EXPR_LIST (VOIDmode, XEXP (x, 0),
810 if (/* The register is used in basic blocks other
811 than the one where it is set (meaning that
812 something after this point in the loop might
813 depend on its value before the set). */
814 ! reg_in_basic_block_p (p, SET_DEST (set))
815 /* And the set is not guaranteed to be executed once
816 the loop starts, or the value before the set is
817 needed before the set occurs...
819 ??? Note we have quadratic behavior here, mitigated
820 by the fact that the previous test will often fail for
821 large loops. Rather than re-scanning the entire loop
822 each time for register usage, we should build tables
823 of the register usage and use them here instead. */
825 || loop_reg_used_before_p (loop, set, p)))
826 /* It is unsafe to move the set. However, it may be OK to
827 move the source into a new psuedo, and subsitute a
828 reg-to-reg copy for the original insn.
830 This code used to consider it OK to move a set of a variable
831 which was not created by the user and not used in an exit
833 That behavior is incorrect and was removed. */
836 /* Don't try to optimize a register that was made
837 by loop-optimization for an inner loop.
838 We don't know its life-span, so we can't compute
840 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
842 /* Don't move the source and add a reg-to-reg copy with -Os
843 (this certainly increases size) or if the source is
844 already a reg (the motion will gain nothing). */
846 && (optimize_size || GET_CODE (SET_SRC (set)) == REG
847 || (CONSTANT_P (SET_SRC (set))
848 && LEGITIMATE_CONSTANT_P (SET_SRC (set)))))
850 else if ((tem = loop_invariant_p (loop, src))
851 && (dependencies == 0
853 = loop_invariant_p (loop, dependencies)) != 0)
854 && (regs->array[REGNO (SET_DEST (set))].set_in_loop == 1
856 = consec_sets_invariant_p
857 (loop, SET_DEST (set),
858 regs->array[REGNO (SET_DEST (set))].set_in_loop,
860 /* If the insn can cause a trap (such as divide by zero),
861 can't move it unless it's guaranteed to be executed
862 once loop is entered. Even a function call might
863 prevent the trap insn from being reached
864 (since it might exit!) */
865 && ! ((maybe_never || call_passed)
866 && may_trap_p (src)))
869 int regno = REGNO (SET_DEST (set));
871 /* A potential lossage is where we have a case where two insns
872 can be combined as long as they are both in the loop, but
873 we move one of them outside the loop. For large loops,
874 this can lose. The most common case of this is the address
875 of a function being called.
877 Therefore, if this register is marked as being used
878 exactly once if we are in a loop with calls
879 (a "large loop"), see if we can replace the usage of
880 this register with the source of this SET. If we can,
883 Don't do this if P has a REG_RETVAL note or if we have
884 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
886 if (loop_info->has_call
887 && regs->array[regno].single_usage != 0
888 && regs->array[regno].single_usage != const0_rtx
889 && REGNO_FIRST_UID (regno) == INSN_UID (p)
890 && (REGNO_LAST_UID (regno)
891 == INSN_UID (regs->array[regno].single_usage))
892 && regs->array[regno].set_in_loop == 1
893 && GET_CODE (SET_SRC (set)) != ASM_OPERANDS
894 && ! side_effects_p (SET_SRC (set))
895 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
896 && (! SMALL_REGISTER_CLASSES
897 || (! (GET_CODE (SET_SRC (set)) == REG
898 && (REGNO (SET_SRC (set))
899 < FIRST_PSEUDO_REGISTER))))
900 /* This test is not redundant; SET_SRC (set) might be
901 a call-clobbered register and the life of REGNO
902 might span a call. */
903 && ! modified_between_p (SET_SRC (set), p,
904 regs->array[regno].single_usage)
905 && no_labels_between_p (p,
906 regs->array[regno].single_usage)
907 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
908 regs->array[regno].single_usage))
910 /* Replace any usage in a REG_EQUAL note. Must copy
911 the new source, so that we don't get rtx sharing
912 between the SET_SOURCE and REG_NOTES of insn p. */
913 REG_NOTES (regs->array[regno].single_usage)
915 (REG_NOTES (regs->array[regno].single_usage),
916 SET_DEST (set), copy_rtx (SET_SRC (set))));
919 for (i = 0; i < LOOP_REGNO_NREGS (regno, SET_DEST (set));
921 regs->array[regno+i].set_in_loop = 0;
925 m = (struct movable *) xmalloc (sizeof (struct movable));
929 m->dependencies = dependencies;
930 m->set_dest = SET_DEST (set);
933 = regs->array[REGNO (SET_DEST (set))].set_in_loop - 1;
937 m->move_insn = move_insn;
938 m->move_insn_first = 0;
939 m->insert_temp = insert_temp;
940 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
941 m->savemode = VOIDmode;
943 /* Set M->cond if either loop_invariant_p
944 or consec_sets_invariant_p returned 2
945 (only conditionally invariant). */
946 m->cond = ((tem | tem1 | tem2) > 1);
947 m->global = LOOP_REG_GLOBAL_P (loop, regno);
949 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
950 m->savings = regs->array[regno].n_times_set;
951 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
952 m->savings += libcall_benefit (p);
953 for (i = 0; i < LOOP_REGNO_NREGS (regno, SET_DEST (set)); i++)
954 regs->array[regno+i].set_in_loop = move_insn ? -2 : -1;
955 /* Add M to the end of the chain MOVABLES. */
956 loop_movables_add (movables, m);
960 /* It is possible for the first instruction to have a
961 REG_EQUAL note but a non-invariant SET_SRC, so we must
962 remember the status of the first instruction in case
963 the last instruction doesn't have a REG_EQUAL note. */
964 m->move_insn_first = m->move_insn;
966 /* Skip this insn, not checking REG_LIBCALL notes. */
967 p = next_nonnote_insn (p);
968 /* Skip the consecutive insns, if there are any. */
969 p = skip_consec_insns (p, m->consec);
970 /* Back up to the last insn of the consecutive group. */
971 p = prev_nonnote_insn (p);
973 /* We must now reset m->move_insn, m->is_equiv, and
974 possibly m->set_src to correspond to the effects of
976 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
978 m->set_src = XEXP (temp, 0), m->move_insn = 1;
981 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
982 if (temp && CONSTANT_P (XEXP (temp, 0)))
983 m->set_src = XEXP (temp, 0), m->move_insn = 1;
989 = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
992 /* If this register is always set within a STRICT_LOW_PART
993 or set to zero, then its high bytes are constant.
994 So clear them outside the loop and within the loop
995 just load the low bytes.
996 We must check that the machine has an instruction to do so.
997 Also, if the value loaded into the register
998 depends on the same register, this cannot be done. */
999 else if (SET_SRC (set) == const0_rtx
1000 && GET_CODE (NEXT_INSN (p)) == INSN
1001 && (set1 = single_set (NEXT_INSN (p)))
1002 && GET_CODE (set1) == SET
1003 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
1004 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
1005 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
1007 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
1009 int regno = REGNO (SET_DEST (set));
1010 if (regs->array[regno].set_in_loop == 2)
1013 m = (struct movable *) xmalloc (sizeof (struct movable));
1016 m->set_dest = SET_DEST (set);
1017 m->dependencies = 0;
1023 m->move_insn_first = 0;
1024 m->insert_temp = insert_temp;
1026 /* If the insn may not be executed on some cycles,
1027 we can't clear the whole reg; clear just high part.
1028 Not even if the reg is used only within this loop.
1035 Clearing x before the inner loop could clobber a value
1036 being saved from the last time around the outer loop.
1037 However, if the reg is not used outside this loop
1038 and all uses of the register are in the same
1039 basic block as the store, there is no problem.
1041 If this insn was made by loop, we don't know its
1042 INSN_LUID and hence must make a conservative
1044 m->global = (INSN_UID (p) >= max_uid_for_loop
1045 || LOOP_REG_GLOBAL_P (loop, regno)
1046 || (labels_in_range_p
1047 (p, REGNO_FIRST_LUID (regno))));
1048 if (maybe_never && m->global)
1049 m->savemode = GET_MODE (SET_SRC (set1));
1051 m->savemode = VOIDmode;
1055 m->lifetime = LOOP_REG_LIFETIME (loop, regno);
1058 i < LOOP_REGNO_NREGS (regno, SET_DEST (set));
1060 regs->array[regno+i].set_in_loop = -1;
1061 /* Add M to the end of the chain MOVABLES. */
1062 loop_movables_add (movables, m);
1067 /* Past a call insn, we get to insns which might not be executed
1068 because the call might exit. This matters for insns that trap.
1069 Constant and pure call insns always return, so they don't count. */
1070 else if (GET_CODE (p) == CALL_INSN && ! CONST_OR_PURE_CALL_P (p))
1072 /* Past a label or a jump, we get to insns for which we
1073 can't count on whether or how many times they will be
1074 executed during each iteration. Therefore, we can
1075 only move out sets of trivial variables
1076 (those not used after the loop). */
1077 /* Similar code appears twice in strength_reduce. */
1078 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1079 /* If we enter the loop in the middle, and scan around to the
1080 beginning, don't set maybe_never for that. This must be an
1081 unconditional jump, otherwise the code at the top of the
1082 loop might never be executed. Unconditional jumps are
1083 followed by a barrier then the loop_end. */
1084 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop->top
1085 && NEXT_INSN (NEXT_INSN (p)) == loop_end
1086 && any_uncondjump_p (p)))
1088 else if (GET_CODE (p) == NOTE)
1090 /* At the virtual top of a converted loop, insns are again known to
1091 be executed: logically, the loop begins here even though the exit
1092 code has been duplicated. */
1093 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1094 maybe_never = call_passed = 0;
1095 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1097 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1102 /* If one movable subsumes another, ignore that other. */
1104 ignore_some_movables (movables);
1106 /* For each movable insn, see if the reg that it loads
1107 leads when it dies right into another conditionally movable insn.
1108 If so, record that the second insn "forces" the first one,
1109 since the second can be moved only if the first is. */
1111 force_movables (movables);
1113 /* See if there are multiple movable insns that load the same value.
1114 If there are, make all but the first point at the first one
1115 through the `match' field, and add the priorities of them
1116 all together as the priority of the first. */
1118 combine_movables (movables, regs);
1120 /* Now consider each movable insn to decide whether it is worth moving.
1121 Store 0 in regs->array[I].set_in_loop for each reg I that is moved.
1123 For machines with few registers this increases code size, so do not
1124 move moveables when optimizing for code size on such machines.
1125 (The 18 below is the value for i386.) */
1128 || (reg_class_size[GENERAL_REGS] > 18 && !loop_info->has_call))
1130 move_movables (loop, movables, threshold, insn_count);
1132 /* Recalculate regs->array if move_movables has created new
1134 if (max_reg_num () > regs->num)
1136 loop_regs_scan (loop, 0);
1137 for (update_start = loop_start;
1138 PREV_INSN (update_start)
1139 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1140 update_start = PREV_INSN (update_start))
1142 update_end = NEXT_INSN (loop_end);
1144 reg_scan_update (update_start, update_end, loop_max_reg);
1145 loop_max_reg = max_reg_num ();
1149 /* Now candidates that still are negative are those not moved.
1150 Change regs->array[I].set_in_loop to indicate that those are not actually
1152 for (i = 0; i < regs->num; i++)
1153 if (regs->array[i].set_in_loop < 0)
1154 regs->array[i].set_in_loop = regs->array[i].n_times_set;
1156 /* Now that we've moved some things out of the loop, we might be able to
1157 hoist even more memory references. */
1160 /* Recalculate regs->array if load_mems has created new registers. */
1161 if (max_reg_num () > regs->num)
1162 loop_regs_scan (loop, 0);
1164 for (update_start = loop_start;
1165 PREV_INSN (update_start)
1166 && GET_CODE (PREV_INSN (update_start)) != CODE_LABEL;
1167 update_start = PREV_INSN (update_start))
1169 update_end = NEXT_INSN (loop_end);
1171 reg_scan_update (update_start, update_end, loop_max_reg);
1172 loop_max_reg = max_reg_num ();
1174 if (flag_strength_reduce)
1176 if (update_end && GET_CODE (update_end) == CODE_LABEL)
1177 /* Ensure our label doesn't go away. */
1178 LABEL_NUSES (update_end)++;
1180 strength_reduce (loop, flags);
1182 reg_scan_update (update_start, update_end, loop_max_reg);
1183 loop_max_reg = max_reg_num ();
1185 if (update_end && GET_CODE (update_end) == CODE_LABEL
1186 && --LABEL_NUSES (update_end) == 0)
1187 delete_related_insns (update_end);
1191 /* The movable information is required for strength reduction. */
1192 loop_movables_free (movables);
1199 /* Add elements to *OUTPUT to record all the pseudo-regs
1200 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1203 record_excess_regs (in_this, not_in_this, output)
1204 rtx in_this, not_in_this;
1211 code = GET_CODE (in_this);
1225 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1226 && ! reg_mentioned_p (in_this, not_in_this))
1227 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1234 fmt = GET_RTX_FORMAT (code);
1235 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1242 for (j = 0; j < XVECLEN (in_this, i); j++)
1243 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1247 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1253 /* Check what regs are referred to in the libcall block ending with INSN,
1254 aside from those mentioned in the equivalent value.
1255 If there are none, return 0.
1256 If there are one or more, return an EXPR_LIST containing all of them. */
1259 libcall_other_reg (insn, equiv)
1262 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1263 rtx p = XEXP (note, 0);
1266 /* First, find all the regs used in the libcall block
1267 that are not mentioned as inputs to the result. */
1271 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1272 || GET_CODE (p) == CALL_INSN)
1273 record_excess_regs (PATTERN (p), equiv, &output);
1280 /* Return 1 if all uses of REG
1281 are between INSN and the end of the basic block. */
1284 reg_in_basic_block_p (insn, reg)
1287 int regno = REGNO (reg);
1290 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1293 /* Search this basic block for the already recorded last use of the reg. */
1294 for (p = insn; p; p = NEXT_INSN (p))
1296 switch (GET_CODE (p))
1303 /* Ordinary insn: if this is the last use, we win. */
1304 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1309 /* Jump insn: if this is the last use, we win. */
1310 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1312 /* Otherwise, it's the end of the basic block, so we lose. */
1317 /* It's the end of the basic block, so we lose. */
1325 /* The "last use" that was recorded can't be found after the first
1326 use. This can happen when the last use was deleted while
1327 processing an inner loop, this inner loop was then completely
1328 unrolled, and the outer loop is always exited after the inner loop,
1329 so that everything after the first use becomes a single basic block. */
1333 /* Compute the benefit of eliminating the insns in the block whose
1334 last insn is LAST. This may be a group of insns used to compute a
1335 value directly or can contain a library call. */
1338 libcall_benefit (last)
1344 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1345 insn != last; insn = NEXT_INSN (insn))
1347 if (GET_CODE (insn) == CALL_INSN)
1348 benefit += 10; /* Assume at least this many insns in a library
1350 else if (GET_CODE (insn) == INSN
1351 && GET_CODE (PATTERN (insn)) != USE
1352 && GET_CODE (PATTERN (insn)) != CLOBBER)
1359 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1362 skip_consec_insns (insn, count)
1366 for (; count > 0; count--)
1370 /* If first insn of libcall sequence, skip to end. */
1371 /* Do this at start of loop, since INSN is guaranteed to
1373 if (GET_CODE (insn) != NOTE
1374 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1375 insn = XEXP (temp, 0);
1378 insn = NEXT_INSN (insn);
1379 while (GET_CODE (insn) == NOTE);
1385 /* Ignore any movable whose insn falls within a libcall
1386 which is part of another movable.
1387 We make use of the fact that the movable for the libcall value
1388 was made later and so appears later on the chain. */
1391 ignore_some_movables (movables)
1392 struct loop_movables *movables;
1394 struct movable *m, *m1;
1396 for (m = movables->head; m; m = m->next)
1398 /* Is this a movable for the value of a libcall? */
1399 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1403 /* Check for earlier movables inside that range,
1404 and mark them invalid. We cannot use LUIDs here because
1405 insns created by loop.c for prior loops don't have LUIDs.
1406 Rather than reject all such insns from movables, we just
1407 explicitly check each insn in the libcall (since invariant
1408 libcalls aren't that common). */
1409 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1410 for (m1 = movables->head; m1 != m; m1 = m1->next)
1411 if (m1->insn == insn)
1417 /* For each movable insn, see if the reg that it loads
1418 leads when it dies right into another conditionally movable insn.
1419 If so, record that the second insn "forces" the first one,
1420 since the second can be moved only if the first is. */
1423 force_movables (movables)
1424 struct loop_movables *movables;
1426 struct movable *m, *m1;
1428 for (m1 = movables->head; m1; m1 = m1->next)
1429 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1430 if (!m1->partial && !m1->done)
1432 int regno = m1->regno;
1433 for (m = m1->next; m; m = m->next)
1434 /* ??? Could this be a bug? What if CSE caused the
1435 register of M1 to be used after this insn?
1436 Since CSE does not update regno_last_uid,
1437 this insn M->insn might not be where it dies.
1438 But very likely this doesn't matter; what matters is
1439 that M's reg is computed from M1's reg. */
1440 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1443 if (m != 0 && m->set_src == m1->set_dest
1444 /* If m->consec, m->set_src isn't valid. */
1448 /* Increase the priority of the moving the first insn
1449 since it permits the second to be moved as well. */
1453 m1->lifetime += m->lifetime;
1454 m1->savings += m->savings;
1459 /* Find invariant expressions that are equal and can be combined into
1463 combine_movables (movables, regs)
1464 struct loop_movables *movables;
1465 struct loop_regs *regs;
1468 char *matched_regs = (char *) xmalloc (regs->num);
1469 enum machine_mode mode;
1471 /* Regs that are set more than once are not allowed to match
1472 or be matched. I'm no longer sure why not. */
1473 /* Only pseudo registers are allowed to match or be matched,
1474 since move_movables does not validate the change. */
1475 /* Perhaps testing m->consec_sets would be more appropriate here? */
1477 for (m = movables->head; m; m = m->next)
1478 if (m->match == 0 && regs->array[m->regno].n_times_set == 1
1479 && m->regno >= FIRST_PSEUDO_REGISTER
1484 int regno = m->regno;
1486 memset (matched_regs, 0, regs->num);
1487 matched_regs[regno] = 1;
1489 /* We want later insns to match the first one. Don't make the first
1490 one match any later ones. So start this loop at m->next. */
1491 for (m1 = m->next; m1; m1 = m1->next)
1492 if (m != m1 && m1->match == 0
1494 && regs->array[m1->regno].n_times_set == 1
1495 && m1->regno >= FIRST_PSEUDO_REGISTER
1496 /* A reg used outside the loop mustn't be eliminated. */
1498 /* A reg used for zero-extending mustn't be eliminated. */
1500 && (matched_regs[m1->regno]
1503 /* Can combine regs with different modes loaded from the
1504 same constant only if the modes are the same or
1505 if both are integer modes with M wider or the same
1506 width as M1. The check for integer is redundant, but
1507 safe, since the only case of differing destination
1508 modes with equal sources is when both sources are
1509 VOIDmode, i.e., CONST_INT. */
1510 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1511 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1512 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1513 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1514 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1515 /* See if the source of M1 says it matches M. */
1516 && ((GET_CODE (m1->set_src) == REG
1517 && matched_regs[REGNO (m1->set_src)])
1518 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1520 && ((m->dependencies == m1->dependencies)
1521 || rtx_equal_p (m->dependencies, m1->dependencies)))
1523 m->lifetime += m1->lifetime;
1524 m->savings += m1->savings;
1527 matched_regs[m1->regno] = 1;
1531 /* Now combine the regs used for zero-extension.
1532 This can be done for those not marked `global'
1533 provided their lives don't overlap. */
1535 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1536 mode = GET_MODE_WIDER_MODE (mode))
1538 struct movable *m0 = 0;
1540 /* Combine all the registers for extension from mode MODE.
1541 Don't combine any that are used outside this loop. */
1542 for (m = movables->head; m; m = m->next)
1543 if (m->partial && ! m->global
1544 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1548 int first = REGNO_FIRST_LUID (m->regno);
1549 int last = REGNO_LAST_LUID (m->regno);
1553 /* First one: don't check for overlap, just record it. */
1558 /* Make sure they extend to the same mode.
1559 (Almost always true.) */
1560 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1563 /* We already have one: check for overlap with those
1564 already combined together. */
1565 for (m1 = movables->head; m1 != m; m1 = m1->next)
1566 if (m1 == m0 || (m1->partial && m1->match == m0))
1567 if (! (REGNO_FIRST_LUID (m1->regno) > last
1568 || REGNO_LAST_LUID (m1->regno) < first))
1571 /* No overlap: we can combine this with the others. */
1572 m0->lifetime += m->lifetime;
1573 m0->savings += m->savings;
1583 free (matched_regs);
1586 /* Returns the number of movable instructions in LOOP that were not
1587 moved outside the loop. */
1590 num_unmoved_movables (loop)
1591 const struct loop *loop;
1596 for (m = LOOP_MOVABLES (loop)->head; m; m = m->next)
1604 /* Return 1 if regs X and Y will become the same if moved. */
1607 regs_match_p (x, y, movables)
1609 struct loop_movables *movables;
1611 unsigned int xn = REGNO (x);
1612 unsigned int yn = REGNO (y);
1613 struct movable *mx, *my;
1615 for (mx = movables->head; mx; mx = mx->next)
1616 if (mx->regno == xn)
1619 for (my = movables->head; my; my = my->next)
1620 if (my->regno == yn)
1624 && ((mx->match == my->match && mx->match != 0)
1626 || mx == my->match));
1629 /* Return 1 if X and Y are identical-looking rtx's.
1630 This is the Lisp function EQUAL for rtx arguments.
1632 If two registers are matching movables or a movable register and an
1633 equivalent constant, consider them equal. */
1636 rtx_equal_for_loop_p (x, y, movables, regs)
1638 struct loop_movables *movables;
1639 struct loop_regs *regs;
1649 if (x == 0 || y == 0)
1652 code = GET_CODE (x);
1654 /* If we have a register and a constant, they may sometimes be
1656 if (GET_CODE (x) == REG && regs->array[REGNO (x)].set_in_loop == -2
1659 for (m = movables->head; m; m = m->next)
1660 if (m->move_insn && m->regno == REGNO (x)
1661 && rtx_equal_p (m->set_src, y))
1664 else if (GET_CODE (y) == REG && regs->array[REGNO (y)].set_in_loop == -2
1667 for (m = movables->head; m; m = m->next)
1668 if (m->move_insn && m->regno == REGNO (y)
1669 && rtx_equal_p (m->set_src, x))
1673 /* Otherwise, rtx's of different codes cannot be equal. */
1674 if (code != GET_CODE (y))
1677 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1678 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1680 if (GET_MODE (x) != GET_MODE (y))
1683 /* These three types of rtx's can be compared nonrecursively. */
1685 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1687 if (code == LABEL_REF)
1688 return XEXP (x, 0) == XEXP (y, 0);
1689 if (code == SYMBOL_REF)
1690 return XSTR (x, 0) == XSTR (y, 0);
1692 /* Compare the elements. If any pair of corresponding elements
1693 fail to match, return 0 for the whole things. */
1695 fmt = GET_RTX_FORMAT (code);
1696 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1701 if (XWINT (x, i) != XWINT (y, i))
1706 if (XINT (x, i) != XINT (y, i))
1711 /* Two vectors must have the same length. */
1712 if (XVECLEN (x, i) != XVECLEN (y, i))
1715 /* And the corresponding elements must match. */
1716 for (j = 0; j < XVECLEN (x, i); j++)
1717 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
1718 movables, regs) == 0)
1723 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables, regs)
1729 if (strcmp (XSTR (x, i), XSTR (y, i)))
1734 /* These are just backpointers, so they don't matter. */
1740 /* It is believed that rtx's at this level will never
1741 contain anything but integers and other rtx's,
1742 except for within LABEL_REFs and SYMBOL_REFs. */
1750 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1751 insns in INSNS which use the reference. LABEL_NUSES for CODE_LABEL
1752 references is incremented once for each added note. */
1755 add_label_notes (x, insns)
1759 enum rtx_code code = GET_CODE (x);
1764 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1766 /* This code used to ignore labels that referred to dispatch tables to
1767 avoid flow generating (slighly) worse code.
1769 We no longer ignore such label references (see LABEL_REF handling in
1770 mark_jump_label for additional information). */
1771 for (insn = insns; insn; insn = NEXT_INSN (insn))
1772 if (reg_mentioned_p (XEXP (x, 0), insn))
1774 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, XEXP (x, 0),
1776 if (LABEL_P (XEXP (x, 0)))
1777 LABEL_NUSES (XEXP (x, 0))++;
1781 fmt = GET_RTX_FORMAT (code);
1782 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1785 add_label_notes (XEXP (x, i), insns);
1786 else if (fmt[i] == 'E')
1787 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1788 add_label_notes (XVECEXP (x, i, j), insns);
1792 /* Scan MOVABLES, and move the insns that deserve to be moved.
1793 If two matching movables are combined, replace one reg with the
1794 other throughout. */
1797 move_movables (loop, movables, threshold, insn_count)
1799 struct loop_movables *movables;
1803 struct loop_regs *regs = LOOP_REGS (loop);
1804 int nregs = regs->num;
1808 rtx loop_start = loop->start;
1809 rtx loop_end = loop->end;
1810 /* Map of pseudo-register replacements to handle combining
1811 when we move several insns that load the same value
1812 into different pseudo-registers. */
1813 rtx *reg_map = (rtx *) xcalloc (nregs, sizeof (rtx));
1814 char *already_moved = (char *) xcalloc (nregs, sizeof (char));
1816 for (m = movables->head; m; m = m->next)
1818 /* Describe this movable insn. */
1820 if (loop_dump_stream)
1822 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1823 INSN_UID (m->insn), m->regno, m->lifetime);
1825 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1827 fprintf (loop_dump_stream, "cond ");
1829 fprintf (loop_dump_stream, "force ");
1831 fprintf (loop_dump_stream, "global ");
1833 fprintf (loop_dump_stream, "done ");
1835 fprintf (loop_dump_stream, "move-insn ");
1837 fprintf (loop_dump_stream, "matches %d ",
1838 INSN_UID (m->match->insn));
1840 fprintf (loop_dump_stream, "forces %d ",
1841 INSN_UID (m->forces->insn));
1844 /* Ignore the insn if it's already done (it matched something else).
1845 Otherwise, see if it is now safe to move. */
1849 || (1 == loop_invariant_p (loop, m->set_src)
1850 && (m->dependencies == 0
1851 || 1 == loop_invariant_p (loop, m->dependencies))
1853 || 1 == consec_sets_invariant_p (loop, m->set_dest,
1856 && (! m->forces || m->forces->done))
1860 int savings = m->savings;
1862 /* We have an insn that is safe to move.
1863 Compute its desirability. */
1868 if (loop_dump_stream)
1869 fprintf (loop_dump_stream, "savings %d ", savings);
1871 if (regs->array[regno].moved_once && loop_dump_stream)
1872 fprintf (loop_dump_stream, "halved since already moved ");
1874 /* An insn MUST be moved if we already moved something else
1875 which is safe only if this one is moved too: that is,
1876 if already_moved[REGNO] is nonzero. */
1878 /* An insn is desirable to move if the new lifetime of the
1879 register is no more than THRESHOLD times the old lifetime.
1880 If it's not desirable, it means the loop is so big
1881 that moving won't speed things up much,
1882 and it is liable to make register usage worse. */
1884 /* It is also desirable to move if it can be moved at no
1885 extra cost because something else was already moved. */
1887 if (already_moved[regno]
1888 || flag_move_all_movables
1889 || (threshold * savings * m->lifetime) >=
1890 (regs->array[regno].moved_once ? insn_count * 2 : insn_count)
1891 || (m->forces && m->forces->done
1892 && regs->array[m->forces->regno].n_times_set == 1))
1896 rtx first = NULL_RTX;
1897 rtx newreg = NULL_RTX;
1900 newreg = gen_reg_rtx (GET_MODE (m->set_dest));
1902 /* Now move the insns that set the reg. */
1904 if (m->partial && m->match)
1908 /* Find the end of this chain of matching regs.
1909 Thus, we load each reg in the chain from that one reg.
1910 And that reg is loaded with 0 directly,
1911 since it has ->match == 0. */
1912 for (m1 = m; m1->match; m1 = m1->match);
1913 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1914 SET_DEST (PATTERN (m1->insn)));
1915 i1 = loop_insn_hoist (loop, newpat);
1917 /* Mark the moved, invariant reg as being allowed to
1918 share a hard reg with the other matching invariant. */
1919 REG_NOTES (i1) = REG_NOTES (m->insn);
1920 r1 = SET_DEST (PATTERN (m->insn));
1921 r2 = SET_DEST (PATTERN (m1->insn));
1923 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1924 gen_rtx_EXPR_LIST (VOIDmode, r2,
1926 delete_insn (m->insn);
1931 if (loop_dump_stream)
1932 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1934 /* If we are to re-generate the item being moved with a
1935 new move insn, first delete what we have and then emit
1936 the move insn before the loop. */
1937 else if (m->move_insn)
1941 for (count = m->consec; count >= 0; count--)
1943 /* If this is the first insn of a library call sequence,
1944 something is very wrong. */
1945 if (GET_CODE (p) != NOTE
1946 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1949 /* If this is the last insn of a libcall sequence, then
1950 delete every insn in the sequence except the last.
1951 The last insn is handled in the normal manner. */
1952 if (GET_CODE (p) != NOTE
1953 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1955 temp = XEXP (temp, 0);
1957 temp = delete_insn (temp);
1961 p = delete_insn (p);
1963 /* simplify_giv_expr expects that it can walk the insns
1964 at m->insn forwards and see this old sequence we are
1965 tossing here. delete_insn does preserve the next
1966 pointers, but when we skip over a NOTE we must fix
1967 it up. Otherwise that code walks into the non-deleted
1969 while (p && GET_CODE (p) == NOTE)
1970 p = NEXT_INSN (temp) = NEXT_INSN (p);
1974 /* Replace the original insn with a move from
1975 our newly created temp. */
1977 emit_move_insn (m->set_dest, newreg);
1980 emit_insn_before (seq, p);
1985 emit_move_insn (m->insert_temp ? newreg : m->set_dest,
1990 add_label_notes (m->set_src, seq);
1992 i1 = loop_insn_hoist (loop, seq);
1993 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1994 set_unique_reg_note (i1,
1995 m->is_equiv ? REG_EQUIV : REG_EQUAL,
1998 if (loop_dump_stream)
1999 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
2001 /* The more regs we move, the less we like moving them. */
2006 for (count = m->consec; count >= 0; count--)
2010 /* If first insn of libcall sequence, skip to end. */
2011 /* Do this at start of loop, since p is guaranteed to
2013 if (GET_CODE (p) != NOTE
2014 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
2017 /* If last insn of libcall sequence, move all
2018 insns except the last before the loop. The last
2019 insn is handled in the normal manner. */
2020 if (GET_CODE (p) != NOTE
2021 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
2025 rtx fn_address_insn = 0;
2028 for (temp = XEXP (temp, 0); temp != p;
2029 temp = NEXT_INSN (temp))
2035 if (GET_CODE (temp) == NOTE)
2038 body = PATTERN (temp);
2040 /* Find the next insn after TEMP,
2041 not counting USE or NOTE insns. */
2042 for (next = NEXT_INSN (temp); next != p;
2043 next = NEXT_INSN (next))
2044 if (! (GET_CODE (next) == INSN
2045 && GET_CODE (PATTERN (next)) == USE)
2046 && GET_CODE (next) != NOTE)
2049 /* If that is the call, this may be the insn
2050 that loads the function address.
2052 Extract the function address from the insn
2053 that loads it into a register.
2054 If this insn was cse'd, we get incorrect code.
2056 So emit a new move insn that copies the
2057 function address into the register that the
2058 call insn will use. flow.c will delete any
2059 redundant stores that we have created. */
2060 if (GET_CODE (next) == CALL_INSN
2061 && GET_CODE (body) == SET
2062 && GET_CODE (SET_DEST (body)) == REG
2063 && (n = find_reg_note (temp, REG_EQUAL,
2066 fn_reg = SET_SRC (body);
2067 if (GET_CODE (fn_reg) != REG)
2068 fn_reg = SET_DEST (body);
2069 fn_address = XEXP (n, 0);
2070 fn_address_insn = temp;
2072 /* We have the call insn.
2073 If it uses the register we suspect it might,
2074 load it with the correct address directly. */
2075 if (GET_CODE (temp) == CALL_INSN
2077 && reg_referenced_p (fn_reg, body))
2078 loop_insn_emit_after (loop, 0, fn_address_insn,
2080 (fn_reg, fn_address));
2082 if (GET_CODE (temp) == CALL_INSN)
2084 i1 = loop_call_insn_hoist (loop, body);
2085 /* Because the USAGE information potentially
2086 contains objects other than hard registers
2087 we need to copy it. */
2088 if (CALL_INSN_FUNCTION_USAGE (temp))
2089 CALL_INSN_FUNCTION_USAGE (i1)
2090 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
2093 i1 = loop_insn_hoist (loop, body);
2096 if (temp == fn_address_insn)
2097 fn_address_insn = i1;
2098 REG_NOTES (i1) = REG_NOTES (temp);
2099 REG_NOTES (temp) = NULL;
2105 if (m->savemode != VOIDmode)
2107 /* P sets REG to zero; but we should clear only
2108 the bits that are not covered by the mode
2110 rtx reg = m->set_dest;
2115 tem = expand_simple_binop
2116 (GET_MODE (reg), AND, reg,
2117 GEN_INT ((((HOST_WIDE_INT) 1
2118 << GET_MODE_BITSIZE (m->savemode)))
2120 reg, 1, OPTAB_LIB_WIDEN);
2124 emit_move_insn (reg, tem);
2125 sequence = get_insns ();
2127 i1 = loop_insn_hoist (loop, sequence);
2129 else if (GET_CODE (p) == CALL_INSN)
2131 i1 = loop_call_insn_hoist (loop, PATTERN (p));
2132 /* Because the USAGE information potentially
2133 contains objects other than hard registers
2134 we need to copy it. */
2135 if (CALL_INSN_FUNCTION_USAGE (p))
2136 CALL_INSN_FUNCTION_USAGE (i1)
2137 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2139 else if (count == m->consec && m->move_insn_first)
2142 /* The SET_SRC might not be invariant, so we must
2143 use the REG_EQUAL note. */
2145 emit_move_insn (m->set_dest, m->set_src);
2149 add_label_notes (m->set_src, seq);
2151 i1 = loop_insn_hoist (loop, seq);
2152 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2153 set_unique_reg_note (i1, m->is_equiv ? REG_EQUIV
2154 : REG_EQUAL, m->set_src);
2156 else if (m->insert_temp)
2158 rtx *reg_map2 = (rtx *) xcalloc (REGNO (newreg),
2160 reg_map2 [m->regno] = newreg;
2162 i1 = loop_insn_hoist (loop, copy_rtx (PATTERN (p)));
2163 replace_regs (i1, reg_map2, REGNO (newreg), 1);
2167 i1 = loop_insn_hoist (loop, PATTERN (p));
2169 if (REG_NOTES (i1) == 0)
2171 REG_NOTES (i1) = REG_NOTES (p);
2172 REG_NOTES (p) = NULL;
2174 /* If there is a REG_EQUAL note present whose value
2175 is not loop invariant, then delete it, since it
2176 may cause problems with later optimization passes.
2177 It is possible for cse to create such notes
2178 like this as a result of record_jump_cond. */
2180 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2181 && ! loop_invariant_p (loop, XEXP (temp, 0)))
2182 remove_note (i1, temp);
2188 if (loop_dump_stream)
2189 fprintf (loop_dump_stream, " moved to %d",
2192 /* If library call, now fix the REG_NOTES that contain
2193 insn pointers, namely REG_LIBCALL on FIRST
2194 and REG_RETVAL on I1. */
2195 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2197 XEXP (temp, 0) = first;
2198 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2199 XEXP (temp, 0) = i1;
2206 /* simplify_giv_expr expects that it can walk the insns
2207 at m->insn forwards and see this old sequence we are
2208 tossing here. delete_insn does preserve the next
2209 pointers, but when we skip over a NOTE we must fix
2210 it up. Otherwise that code walks into the non-deleted
2212 while (p && GET_CODE (p) == NOTE)
2213 p = NEXT_INSN (temp) = NEXT_INSN (p);
2218 /* Replace the original insn with a move from
2219 our newly created temp. */
2221 emit_move_insn (m->set_dest, newreg);
2224 emit_insn_before (seq, p);
2228 /* The more regs we move, the less we like moving them. */
2234 if (!m->insert_temp)
2236 /* Any other movable that loads the same register
2238 already_moved[regno] = 1;
2240 /* This reg has been moved out of one loop. */
2241 regs->array[regno].moved_once = 1;
2243 /* The reg set here is now invariant. */
2247 for (i = 0; i < LOOP_REGNO_NREGS (regno, m->set_dest); i++)
2248 regs->array[regno+i].set_in_loop = 0;
2251 /* Change the length-of-life info for the register
2252 to say it lives at least the full length of this loop.
2253 This will help guide optimizations in outer loops. */
2255 if (REGNO_FIRST_LUID (regno) > INSN_LUID (loop_start))
2256 /* This is the old insn before all the moved insns.
2257 We can't use the moved insn because it is out of range
2258 in uid_luid. Only the old insns have luids. */
2259 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2260 if (REGNO_LAST_LUID (regno) < INSN_LUID (loop_end))
2261 REGNO_LAST_UID (regno) = INSN_UID (loop_end);
2264 /* Combine with this moved insn any other matching movables. */
2267 for (m1 = movables->head; m1; m1 = m1->next)
2272 /* Schedule the reg loaded by M1
2273 for replacement so that shares the reg of M.
2274 If the modes differ (only possible in restricted
2275 circumstances, make a SUBREG.
2277 Note this assumes that the target dependent files
2278 treat REG and SUBREG equally, including within
2279 GO_IF_LEGITIMATE_ADDRESS and in all the
2280 predicates since we never verify that replacing the
2281 original register with a SUBREG results in a
2282 recognizable insn. */
2283 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2284 reg_map[m1->regno] = m->set_dest;
2287 = gen_lowpart_common (GET_MODE (m1->set_dest),
2290 /* Get rid of the matching insn
2291 and prevent further processing of it. */
2294 /* if library call, delete all insns. */
2295 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2297 delete_insn_chain (XEXP (temp, 0), m1->insn);
2299 delete_insn (m1->insn);
2301 /* Any other movable that loads the same register
2303 already_moved[m1->regno] = 1;
2305 /* The reg merged here is now invariant,
2306 if the reg it matches is invariant. */
2311 i < LOOP_REGNO_NREGS (regno, m1->set_dest);
2313 regs->array[m1->regno+i].set_in_loop = 0;
2317 else if (loop_dump_stream)
2318 fprintf (loop_dump_stream, "not desirable");
2320 else if (loop_dump_stream && !m->match)
2321 fprintf (loop_dump_stream, "not safe");
2323 if (loop_dump_stream)
2324 fprintf (loop_dump_stream, "\n");
2328 new_start = loop_start;
2330 /* Go through all the instructions in the loop, making
2331 all the register substitutions scheduled in REG_MAP. */
2332 for (p = new_start; p != loop_end; p = NEXT_INSN (p))
2333 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2334 || GET_CODE (p) == CALL_INSN)
2336 replace_regs (PATTERN (p), reg_map, nregs, 0);
2337 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2343 free (already_moved);
2348 loop_movables_add (movables, m)
2349 struct loop_movables *movables;
2352 if (movables->head == 0)
2355 movables->last->next = m;
2361 loop_movables_free (movables)
2362 struct loop_movables *movables;
2365 struct movable *m_next;
2367 for (m = movables->head; m; m = m_next)
2375 /* Scan X and replace the address of any MEM in it with ADDR.
2376 REG is the address that MEM should have before the replacement. */
2379 replace_call_address (x, reg, addr)
2388 code = GET_CODE (x);
2402 /* Short cut for very common case. */
2403 replace_call_address (XEXP (x, 1), reg, addr);
2407 /* Short cut for very common case. */
2408 replace_call_address (XEXP (x, 0), reg, addr);
2412 /* If this MEM uses a reg other than the one we expected,
2413 something is wrong. */
2414 if (XEXP (x, 0) != reg)
2423 fmt = GET_RTX_FORMAT (code);
2424 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2427 replace_call_address (XEXP (x, i), reg, addr);
2428 else if (fmt[i] == 'E')
2431 for (j = 0; j < XVECLEN (x, i); j++)
2432 replace_call_address (XVECEXP (x, i, j), reg, addr);
2438 /* Return the number of memory refs to addresses that vary
2442 count_nonfixed_reads (loop, x)
2443 const struct loop *loop;
2454 code = GET_CODE (x);
2468 return ((loop_invariant_p (loop, XEXP (x, 0)) != 1)
2469 + count_nonfixed_reads (loop, XEXP (x, 0)));
2476 fmt = GET_RTX_FORMAT (code);
2477 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2480 value += count_nonfixed_reads (loop, XEXP (x, i));
2484 for (j = 0; j < XVECLEN (x, i); j++)
2485 value += count_nonfixed_reads (loop, XVECEXP (x, i, j));
2491 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2492 `has_call', `has_nonconst_call', `has_volatile', `has_tablejump',
2493 `unknown_address_altered', `unknown_constant_address_altered', and
2494 `num_mem_sets' in LOOP. Also, fill in the array `mems' and the
2495 list `store_mems' in LOOP. */
2503 struct loop_info *loop_info = LOOP_INFO (loop);
2504 rtx start = loop->start;
2505 rtx end = loop->end;
2506 /* The label after END. Jumping here is just like falling off the
2507 end of the loop. We use next_nonnote_insn instead of next_label
2508 as a hedge against the (pathological) case where some actual insn
2509 might end up between the two. */
2510 rtx exit_target = next_nonnote_insn (end);
2512 loop_info->has_indirect_jump = indirect_jump_in_function;
2513 loop_info->pre_header_has_call = 0;
2514 loop_info->has_call = 0;
2515 loop_info->has_nonconst_call = 0;
2516 loop_info->has_prefetch = 0;
2517 loop_info->has_volatile = 0;
2518 loop_info->has_tablejump = 0;
2519 loop_info->has_multiple_exit_targets = 0;
2522 loop_info->unknown_address_altered = 0;
2523 loop_info->unknown_constant_address_altered = 0;
2524 loop_info->store_mems = NULL_RTX;
2525 loop_info->first_loop_store_insn = NULL_RTX;
2526 loop_info->mems_idx = 0;
2527 loop_info->num_mem_sets = 0;
2528 /* If loop opts run twice, this was set on 1st pass for 2nd. */
2529 loop_info->preconditioned = NOTE_PRECONDITIONED (end);
2531 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
2532 insn = PREV_INSN (insn))
2534 if (GET_CODE (insn) == CALL_INSN)
2536 loop_info->pre_header_has_call = 1;
2541 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2542 insn = NEXT_INSN (insn))
2544 switch (GET_CODE (insn))
2547 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2550 /* Count number of loops contained in this one. */
2553 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2558 if (! CONST_OR_PURE_CALL_P (insn))
2560 loop_info->unknown_address_altered = 1;
2561 loop_info->has_nonconst_call = 1;
2563 else if (pure_call_p (insn))
2564 loop_info->has_nonconst_call = 1;
2565 loop_info->has_call = 1;
2566 if (can_throw_internal (insn))
2567 loop_info->has_multiple_exit_targets = 1;
2571 if (! loop_info->has_multiple_exit_targets)
2573 rtx set = pc_set (insn);
2577 rtx src = SET_SRC (set);
2580 if (GET_CODE (src) == IF_THEN_ELSE)
2582 label1 = XEXP (src, 1);
2583 label2 = XEXP (src, 2);
2593 if (label1 && label1 != pc_rtx)
2595 if (GET_CODE (label1) != LABEL_REF)
2597 /* Something tricky. */
2598 loop_info->has_multiple_exit_targets = 1;
2601 else if (XEXP (label1, 0) != exit_target
2602 && LABEL_OUTSIDE_LOOP_P (label1))
2604 /* A jump outside the current loop. */
2605 loop_info->has_multiple_exit_targets = 1;
2617 /* A return, or something tricky. */
2618 loop_info->has_multiple_exit_targets = 1;
2624 if (volatile_refs_p (PATTERN (insn)))
2625 loop_info->has_volatile = 1;
2627 if (GET_CODE (insn) == JUMP_INSN
2628 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2629 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2630 loop_info->has_tablejump = 1;
2632 note_stores (PATTERN (insn), note_addr_stored, loop_info);
2633 if (! loop_info->first_loop_store_insn && loop_info->store_mems)
2634 loop_info->first_loop_store_insn = insn;
2636 if (flag_non_call_exceptions && can_throw_internal (insn))
2637 loop_info->has_multiple_exit_targets = 1;
2645 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2646 if (/* An exception thrown by a called function might land us
2648 ! loop_info->has_nonconst_call
2649 /* We don't want loads for MEMs moved to a location before the
2650 one at which their stack memory becomes allocated. (Note
2651 that this is not a problem for malloc, etc., since those
2652 require actual function calls. */
2653 && ! current_function_calls_alloca
2654 /* There are ways to leave the loop other than falling off the
2656 && ! loop_info->has_multiple_exit_targets)
2657 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2658 insn = NEXT_INSN (insn))
2659 for_each_rtx (&insn, insert_loop_mem, loop_info);
2661 /* BLKmode MEMs are added to LOOP_STORE_MEM as necessary so
2662 that loop_invariant_p and load_mems can use true_dependence
2663 to determine what is really clobbered. */
2664 if (loop_info->unknown_address_altered)
2666 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2668 loop_info->store_mems
2669 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2671 if (loop_info->unknown_constant_address_altered)
2673 rtx mem = gen_rtx_MEM (BLKmode, const0_rtx);
2675 RTX_UNCHANGING_P (mem) = 1;
2676 loop_info->store_mems
2677 = gen_rtx_EXPR_LIST (VOIDmode, mem, loop_info->store_mems);
2681 /* Invalidate all loops containing LABEL. */
2684 invalidate_loops_containing_label (label)
2688 for (loop = uid_loop[INSN_UID (label)]; loop; loop = loop->outer)
2692 /* Scan the function looking for loops. Record the start and end of each loop.
2693 Also mark as invalid loops any loops that contain a setjmp or are branched
2694 to from outside the loop. */
2697 find_and_verify_loops (f, loops)
2699 struct loops *loops;
2704 struct loop *current_loop;
2705 struct loop *next_loop;
2708 num_loops = loops->num;
2710 compute_luids (f, NULL_RTX, 0);
2712 /* If there are jumps to undefined labels,
2713 treat them as jumps out of any/all loops.
2714 This also avoids writing past end of tables when there are no loops. */
2717 /* Find boundaries of loops, mark which loops are contained within
2718 loops, and invalidate loops that have setjmp. */
2721 current_loop = NULL;
2722 for (insn = f; insn; insn = NEXT_INSN (insn))
2724 if (GET_CODE (insn) == NOTE)
2725 switch (NOTE_LINE_NUMBER (insn))
2727 case NOTE_INSN_LOOP_BEG:
2728 next_loop = loops->array + num_loops;
2729 next_loop->num = num_loops;
2731 next_loop->start = insn;
2732 next_loop->outer = current_loop;
2733 current_loop = next_loop;
2736 case NOTE_INSN_LOOP_CONT:
2737 current_loop->cont = insn;
2740 case NOTE_INSN_LOOP_VTOP:
2741 current_loop->vtop = insn;
2744 case NOTE_INSN_LOOP_END:
2748 current_loop->end = insn;
2749 current_loop = current_loop->outer;
2756 if (GET_CODE (insn) == CALL_INSN
2757 && find_reg_note (insn, REG_SETJMP, NULL))
2759 /* In this case, we must invalidate our current loop and any
2761 for (loop = current_loop; loop; loop = loop->outer)
2764 if (loop_dump_stream)
2765 fprintf (loop_dump_stream,
2766 "\nLoop at %d ignored due to setjmp.\n",
2767 INSN_UID (loop->start));
2771 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2772 enclosing loop, but this doesn't matter. */
2773 uid_loop[INSN_UID (insn)] = current_loop;
2776 /* Any loop containing a label used in an initializer must be invalidated,
2777 because it can be jumped into from anywhere. */
2778 for (label = forced_labels; label; label = XEXP (label, 1))
2779 invalidate_loops_containing_label (XEXP (label, 0));
2781 /* Any loop containing a label used for an exception handler must be
2782 invalidated, because it can be jumped into from anywhere. */
2783 for_each_eh_label (invalidate_loops_containing_label);
2785 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2786 loop that it is not contained within, that loop is marked invalid.
2787 If any INSN or CALL_INSN uses a label's address, then the loop containing
2788 that label is marked invalid, because it could be jumped into from
2791 Also look for blocks of code ending in an unconditional branch that
2792 exits the loop. If such a block is surrounded by a conditional
2793 branch around the block, move the block elsewhere (see below) and
2794 invert the jump to point to the code block. This may eliminate a
2795 label in our loop and will simplify processing by both us and a
2796 possible second cse pass. */
2798 for (insn = f; insn; insn = NEXT_INSN (insn))
2801 struct loop *this_loop = uid_loop[INSN_UID (insn)];
2803 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2805 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2807 invalidate_loops_containing_label (XEXP (note, 0));
2810 if (GET_CODE (insn) != JUMP_INSN)
2813 mark_loop_jump (PATTERN (insn), this_loop);
2815 /* See if this is an unconditional branch outside the loop. */
2817 && (GET_CODE (PATTERN (insn)) == RETURN
2818 || (any_uncondjump_p (insn)
2819 && onlyjump_p (insn)
2820 && (uid_loop[INSN_UID (JUMP_LABEL (insn))]
2822 && get_max_uid () < max_uid_for_loop)
2825 rtx our_next = next_real_insn (insn);
2826 rtx last_insn_to_move = NEXT_INSN (insn);
2827 struct loop *dest_loop;
2828 struct loop *outer_loop = NULL;
2830 /* Go backwards until we reach the start of the loop, a label,
2832 for (p = PREV_INSN (insn);
2833 GET_CODE (p) != CODE_LABEL
2834 && ! (GET_CODE (p) == NOTE
2835 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2836 && GET_CODE (p) != JUMP_INSN;
2840 /* Check for the case where we have a jump to an inner nested
2841 loop, and do not perform the optimization in that case. */
2843 if (JUMP_LABEL (insn))
2845 dest_loop = uid_loop[INSN_UID (JUMP_LABEL (insn))];
2848 for (outer_loop = dest_loop; outer_loop;
2849 outer_loop = outer_loop->outer)
2850 if (outer_loop == this_loop)
2855 /* Make sure that the target of P is within the current loop. */
2857 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2858 && uid_loop[INSN_UID (JUMP_LABEL (p))] != this_loop)
2859 outer_loop = this_loop;
2861 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2862 we have a block of code to try to move.
2864 We look backward and then forward from the target of INSN
2865 to find a BARRIER at the same loop depth as the target.
2866 If we find such a BARRIER, we make a new label for the start
2867 of the block, invert the jump in P and point it to that label,
2868 and move the block of code to the spot we found. */
2871 && GET_CODE (p) == JUMP_INSN
2872 && JUMP_LABEL (p) != 0
2873 /* Just ignore jumps to labels that were never emitted.
2874 These always indicate compilation errors. */
2875 && INSN_UID (JUMP_LABEL (p)) != 0
2876 && any_condjump_p (p) && onlyjump_p (p)
2877 && next_real_insn (JUMP_LABEL (p)) == our_next
2878 /* If it's not safe to move the sequence, then we
2880 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2881 &last_insn_to_move))
2884 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2885 struct loop *target_loop = uid_loop[INSN_UID (target)];
2889 /* Search for possible garbage past the conditional jumps
2890 and look for the last barrier. */
2891 for (tmp = last_insn_to_move;
2892 tmp && GET_CODE (tmp) != CODE_LABEL; tmp = NEXT_INSN (tmp))
2893 if (GET_CODE (tmp) == BARRIER)
2894 last_insn_to_move = tmp;
2896 for (loc = target; loc; loc = PREV_INSN (loc))
2897 if (GET_CODE (loc) == BARRIER
2898 /* Don't move things inside a tablejump. */
2899 && ((loc2 = next_nonnote_insn (loc)) == 0
2900 || GET_CODE (loc2) != CODE_LABEL
2901 || (loc2 = next_nonnote_insn (loc2)) == 0
2902 || GET_CODE (loc2) != JUMP_INSN
2903 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2904 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2905 && uid_loop[INSN_UID (loc)] == target_loop)
2909 for (loc = target; loc; loc = NEXT_INSN (loc))
2910 if (GET_CODE (loc) == BARRIER
2911 /* Don't move things inside a tablejump. */
2912 && ((loc2 = next_nonnote_insn (loc)) == 0
2913 || GET_CODE (loc2) != CODE_LABEL
2914 || (loc2 = next_nonnote_insn (loc2)) == 0
2915 || GET_CODE (loc2) != JUMP_INSN
2916 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2917 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2918 && uid_loop[INSN_UID (loc)] == target_loop)
2923 rtx cond_label = JUMP_LABEL (p);
2924 rtx new_label = get_label_after (p);
2926 /* Ensure our label doesn't go away. */
2927 LABEL_NUSES (cond_label)++;
2929 /* Verify that uid_loop is large enough and that
2931 if (invert_jump (p, new_label, 1))
2935 /* If no suitable BARRIER was found, create a suitable
2936 one before TARGET. Since TARGET is a fall through
2937 path, we'll need to insert a jump around our block
2938 and add a BARRIER before TARGET.
2940 This creates an extra unconditional jump outside
2941 the loop. However, the benefits of removing rarely
2942 executed instructions from inside the loop usually
2943 outweighs the cost of the extra unconditional jump
2944 outside the loop. */
2949 temp = gen_jump (JUMP_LABEL (insn));
2950 temp = emit_jump_insn_before (temp, target);
2951 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2952 LABEL_NUSES (JUMP_LABEL (insn))++;
2953 loc = emit_barrier_before (target);
2956 /* Include the BARRIER after INSN and copy the
2958 if (squeeze_notes (&new_label, &last_insn_to_move))
2960 reorder_insns (new_label, last_insn_to_move, loc);
2962 /* All those insns are now in TARGET_LOOP. */
2964 q != NEXT_INSN (last_insn_to_move);
2966 uid_loop[INSN_UID (q)] = target_loop;
2968 /* The label jumped to by INSN is no longer a loop
2969 exit. Unless INSN does not have a label (e.g.,
2970 it is a RETURN insn), search loop->exit_labels
2971 to find its label_ref, and remove it. Also turn
2972 off LABEL_OUTSIDE_LOOP_P bit. */
2973 if (JUMP_LABEL (insn))
2975 for (q = 0, r = this_loop->exit_labels;
2977 q = r, r = LABEL_NEXTREF (r))
2978 if (XEXP (r, 0) == JUMP_LABEL (insn))
2980 LABEL_OUTSIDE_LOOP_P (r) = 0;
2982 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2984 this_loop->exit_labels = LABEL_NEXTREF (r);
2988 for (loop = this_loop; loop && loop != target_loop;
2992 /* If we didn't find it, then something is
2998 /* P is now a jump outside the loop, so it must be put
2999 in loop->exit_labels, and marked as such.
3000 The easiest way to do this is to just call
3001 mark_loop_jump again for P. */
3002 mark_loop_jump (PATTERN (p), this_loop);
3004 /* If INSN now jumps to the insn after it,
3006 if (JUMP_LABEL (insn) != 0
3007 && (next_real_insn (JUMP_LABEL (insn))
3008 == next_real_insn (insn)))
3009 delete_related_insns (insn);
3012 /* Continue the loop after where the conditional
3013 branch used to jump, since the only branch insn
3014 in the block (if it still remains) is an inter-loop
3015 branch and hence needs no processing. */
3016 insn = NEXT_INSN (cond_label);
3018 if (--LABEL_NUSES (cond_label) == 0)
3019 delete_related_insns (cond_label);
3021 /* This loop will be continued with NEXT_INSN (insn). */
3022 insn = PREV_INSN (insn);
3029 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
3030 loops it is contained in, mark the target loop invalid.
3032 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
3035 mark_loop_jump (x, loop)
3039 struct loop *dest_loop;
3040 struct loop *outer_loop;
3043 switch (GET_CODE (x))
3056 /* There could be a label reference in here. */
3057 mark_loop_jump (XEXP (x, 0), loop);
3063 mark_loop_jump (XEXP (x, 0), loop);
3064 mark_loop_jump (XEXP (x, 1), loop);
3068 /* This may refer to a LABEL_REF or SYMBOL_REF. */
3069 mark_loop_jump (XEXP (x, 1), loop);
3074 mark_loop_jump (XEXP (x, 0), loop);
3078 dest_loop = uid_loop[INSN_UID (XEXP (x, 0))];
3080 /* Link together all labels that branch outside the loop. This
3081 is used by final_[bg]iv_value and the loop unrolling code. Also
3082 mark this LABEL_REF so we know that this branch should predict
3085 /* A check to make sure the label is not in an inner nested loop,
3086 since this does not count as a loop exit. */
3089 for (outer_loop = dest_loop; outer_loop;
3090 outer_loop = outer_loop->outer)
3091 if (outer_loop == loop)
3097 if (loop && ! outer_loop)
3099 LABEL_OUTSIDE_LOOP_P (x) = 1;
3100 LABEL_NEXTREF (x) = loop->exit_labels;
3101 loop->exit_labels = x;
3103 for (outer_loop = loop;
3104 outer_loop && outer_loop != dest_loop;
3105 outer_loop = outer_loop->outer)
3106 outer_loop->exit_count++;
3109 /* If this is inside a loop, but not in the current loop or one enclosed
3110 by it, it invalidates at least one loop. */
3115 /* We must invalidate every nested loop containing the target of this
3116 label, except those that also contain the jump insn. */
3118 for (; dest_loop; dest_loop = dest_loop->outer)
3120 /* Stop when we reach a loop that also contains the jump insn. */
3121 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3122 if (dest_loop == outer_loop)
3125 /* If we get here, we know we need to invalidate a loop. */
3126 if (loop_dump_stream && ! dest_loop->invalid)
3127 fprintf (loop_dump_stream,
3128 "\nLoop at %d ignored due to multiple entry points.\n",
3129 INSN_UID (dest_loop->start));
3131 dest_loop->invalid = 1;
3136 /* If this is not setting pc, ignore. */
3137 if (SET_DEST (x) == pc_rtx)
3138 mark_loop_jump (SET_SRC (x), loop);
3142 mark_loop_jump (XEXP (x, 1), loop);
3143 mark_loop_jump (XEXP (x, 2), loop);
3148 for (i = 0; i < XVECLEN (x, 0); i++)
3149 mark_loop_jump (XVECEXP (x, 0, i), loop);
3153 for (i = 0; i < XVECLEN (x, 1); i++)
3154 mark_loop_jump (XVECEXP (x, 1, i), loop);
3158 /* Strictly speaking this is not a jump into the loop, only a possible
3159 jump out of the loop. However, we have no way to link the destination
3160 of this jump onto the list of exit labels. To be safe we mark this
3161 loop and any containing loops as invalid. */
3164 for (outer_loop = loop; outer_loop; outer_loop = outer_loop->outer)
3166 if (loop_dump_stream && ! outer_loop->invalid)
3167 fprintf (loop_dump_stream,
3168 "\nLoop at %d ignored due to unknown exit jump.\n",
3169 INSN_UID (outer_loop->start));
3170 outer_loop->invalid = 1;
3177 /* Return nonzero if there is a label in the range from
3178 insn INSN to and including the insn whose luid is END
3179 INSN must have an assigned luid (i.e., it must not have
3180 been previously created by loop.c). */
3183 labels_in_range_p (insn, end)
3187 while (insn && INSN_LUID (insn) <= end)
3189 if (GET_CODE (insn) == CODE_LABEL)
3191 insn = NEXT_INSN (insn);
3197 /* Record that a memory reference X is being set. */
3200 note_addr_stored (x, y, data)
3202 rtx y ATTRIBUTE_UNUSED;
3203 void *data ATTRIBUTE_UNUSED;
3205 struct loop_info *loop_info = data;
3207 if (x == 0 || GET_CODE (x) != MEM)
3210 /* Count number of memory writes.
3211 This affects heuristics in strength_reduce. */
3212 loop_info->num_mem_sets++;
3214 /* BLKmode MEM means all memory is clobbered. */
3215 if (GET_MODE (x) == BLKmode)
3217 if (RTX_UNCHANGING_P (x))
3218 loop_info->unknown_constant_address_altered = 1;
3220 loop_info->unknown_address_altered = 1;
3225 loop_info->store_mems = gen_rtx_EXPR_LIST (VOIDmode, x,
3226 loop_info->store_mems);
3229 /* X is a value modified by an INSN that references a biv inside a loop
3230 exit test (ie, X is somehow related to the value of the biv). If X
3231 is a pseudo that is used more than once, then the biv is (effectively)
3232 used more than once. DATA is a pointer to a loop_regs structure. */
3235 note_set_pseudo_multiple_uses (x, y, data)
3237 rtx y ATTRIBUTE_UNUSED;
3240 struct loop_regs *regs = (struct loop_regs *) data;
3245 while (GET_CODE (x) == STRICT_LOW_PART
3246 || GET_CODE (x) == SIGN_EXTRACT
3247 || GET_CODE (x) == ZERO_EXTRACT
3248 || GET_CODE (x) == SUBREG)
3251 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
3254 /* If we do not have usage information, or if we know the register
3255 is used more than once, note that fact for check_dbra_loop. */
3256 if (REGNO (x) >= max_reg_before_loop
3257 || ! regs->array[REGNO (x)].single_usage
3258 || regs->array[REGNO (x)].single_usage == const0_rtx)
3259 regs->multiple_uses = 1;
3262 /* Return nonzero if the rtx X is invariant over the current loop.
3264 The value is 2 if we refer to something only conditionally invariant.
3266 A memory ref is invariant if it is not volatile and does not conflict
3267 with anything stored in `loop_info->store_mems'. */
3270 loop_invariant_p (loop, x)
3271 const struct loop *loop;
3274 struct loop_info *loop_info = LOOP_INFO (loop);
3275 struct loop_regs *regs = LOOP_REGS (loop);
3279 int conditional = 0;
3284 code = GET_CODE (x);
3294 /* A LABEL_REF is normally invariant, however, if we are unrolling
3295 loops, and this label is inside the loop, then it isn't invariant.
3296 This is because each unrolled copy of the loop body will have
3297 a copy of this label. If this was invariant, then an insn loading
3298 the address of this label into a register might get moved outside
3299 the loop, and then each loop body would end up using the same label.
3301 We don't know the loop bounds here though, so just fail for all
3303 if (flag_old_unroll_loops)
3310 case UNSPEC_VOLATILE:
3314 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3315 since the reg might be set by initialization within the loop. */
3317 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3318 || x == arg_pointer_rtx || x == pic_offset_table_rtx)
3319 && ! current_function_has_nonlocal_goto)
3322 if (LOOP_INFO (loop)->has_call
3323 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3326 /* Out-of-range regs can occur when we are called from unrolling.
3327 These have always been created by the unroller and are set in
3328 the loop, hence are never invariant. */
3330 if (REGNO (x) >= (unsigned) regs->num)
3333 if (regs->array[REGNO (x)].set_in_loop < 0)
3336 return regs->array[REGNO (x)].set_in_loop == 0;
3339 /* Volatile memory references must be rejected. Do this before
3340 checking for read-only items, so that volatile read-only items
3341 will be rejected also. */
3342 if (MEM_VOLATILE_P (x))
3345 /* See if there is any dependence between a store and this load. */
3346 mem_list_entry = loop_info->store_mems;
3347 while (mem_list_entry)
3349 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3353 mem_list_entry = XEXP (mem_list_entry, 1);
3356 /* It's not invalidated by a store in memory
3357 but we must still verify the address is invariant. */
3361 /* Don't mess with insns declared volatile. */
3362 if (MEM_VOLATILE_P (x))
3370 fmt = GET_RTX_FORMAT (code);
3371 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3375 int tem = loop_invariant_p (loop, XEXP (x, i));
3381 else if (fmt[i] == 'E')
3384 for (j = 0; j < XVECLEN (x, i); j++)
3386 int tem = loop_invariant_p (loop, XVECEXP (x, i, j));
3396 return 1 + conditional;
3399 /* Return nonzero if all the insns in the loop that set REG
3400 are INSN and the immediately following insns,
3401 and if each of those insns sets REG in an invariant way
3402 (not counting uses of REG in them).
3404 The value is 2 if some of these insns are only conditionally invariant.
3406 We assume that INSN itself is the first set of REG
3407 and that its source is invariant. */
3410 consec_sets_invariant_p (loop, reg, n_sets, insn)
3411 const struct loop *loop;
3415 struct loop_regs *regs = LOOP_REGS (loop);
3417 unsigned int regno = REGNO (reg);
3419 /* Number of sets we have to insist on finding after INSN. */
3420 int count = n_sets - 1;
3421 int old = regs->array[regno].set_in_loop;
3425 /* If N_SETS hit the limit, we can't rely on its value. */
3429 regs->array[regno].set_in_loop = 0;
3437 code = GET_CODE (p);
3439 /* If library call, skip to end of it. */
3440 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3445 && (set = single_set (p))
3446 && GET_CODE (SET_DEST (set)) == REG
3447 && REGNO (SET_DEST (set)) == regno)
3449 this = loop_invariant_p (loop, SET_SRC (set));
3452 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3454 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3455 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3457 this = (CONSTANT_P (XEXP (temp, 0))
3458 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3459 && loop_invariant_p (loop, XEXP (temp, 0))));
3466 else if (code != NOTE)
3468 regs->array[regno].set_in_loop = old;
3473 regs->array[regno].set_in_loop = old;
3474 /* If loop_invariant_p ever returned 2, we return 2. */
3475 return 1 + (value & 2);
3479 /* I don't think this condition is sufficient to allow INSN
3480 to be moved, so we no longer test it. */
3482 /* Return 1 if all insns in the basic block of INSN and following INSN
3483 that set REG are invariant according to TABLE. */
3486 all_sets_invariant_p (reg, insn, table)
3491 int regno = REGNO (reg);
3497 code = GET_CODE (p);
3498 if (code == CODE_LABEL || code == JUMP_INSN)
3500 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3501 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3502 && REGNO (SET_DEST (PATTERN (p))) == regno)
3504 if (! loop_invariant_p (loop, SET_SRC (PATTERN (p)), table))
3511 /* Look at all uses (not sets) of registers in X. For each, if it is
3512 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3513 a different insn, set USAGE[REGNO] to const0_rtx. */
3516 find_single_use_in_loop (regs, insn, x)
3517 struct loop_regs *regs;
3521 enum rtx_code code = GET_CODE (x);
3522 const char *fmt = GET_RTX_FORMAT (code);
3526 regs->array[REGNO (x)].single_usage
3527 = (regs->array[REGNO (x)].single_usage != 0
3528 && regs->array[REGNO (x)].single_usage != insn)
3529 ? const0_rtx : insn;
3531 else if (code == SET)
3533 /* Don't count SET_DEST if it is a REG; otherwise count things
3534 in SET_DEST because if a register is partially modified, it won't
3535 show up as a potential movable so we don't care how USAGE is set
3537 if (GET_CODE (SET_DEST (x)) != REG)
3538 find_single_use_in_loop (regs, insn, SET_DEST (x));
3539 find_single_use_in_loop (regs, insn, SET_SRC (x));
3542 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3544 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3545 find_single_use_in_loop (regs, insn, XEXP (x, i));
3546 else if (fmt[i] == 'E')
3547 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3548 find_single_use_in_loop (regs, insn, XVECEXP (x, i, j));
3552 /* Count and record any set in X which is contained in INSN. Update
3553 REGS->array[I].MAY_NOT_OPTIMIZE and LAST_SET for any register I set
3557 count_one_set (regs, insn, x, last_set)
3558 struct loop_regs *regs;
3562 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3563 /* Don't move a reg that has an explicit clobber.
3564 It's not worth the pain to try to do it correctly. */
3565 regs->array[REGNO (XEXP (x, 0))].may_not_optimize = 1;
3567 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3569 rtx dest = SET_DEST (x);
3570 while (GET_CODE (dest) == SUBREG
3571 || GET_CODE (dest) == ZERO_EXTRACT
3572 || GET_CODE (dest) == SIGN_EXTRACT
3573 || GET_CODE (dest) == STRICT_LOW_PART)
3574 dest = XEXP (dest, 0);
3575 if (GET_CODE (dest) == REG)
3578 int regno = REGNO (dest);
3579 for (i = 0; i < LOOP_REGNO_NREGS (regno, dest); i++)
3581 /* If this is the first setting of this reg
3582 in current basic block, and it was set before,
3583 it must be set in two basic blocks, so it cannot
3584 be moved out of the loop. */
3585 if (regs->array[regno].set_in_loop > 0
3587 regs->array[regno+i].may_not_optimize = 1;
3588 /* If this is not first setting in current basic block,
3589 see if reg was used in between previous one and this.
3590 If so, neither one can be moved. */
3591 if (last_set[regno] != 0
3592 && reg_used_between_p (dest, last_set[regno], insn))
3593 regs->array[regno+i].may_not_optimize = 1;
3594 if (regs->array[regno+i].set_in_loop < 127)
3595 ++regs->array[regno+i].set_in_loop;
3596 last_set[regno+i] = insn;
3602 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3603 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3604 contained in insn INSN is used by any insn that precedes INSN in
3605 cyclic order starting from the loop entry point.
3607 We don't want to use INSN_LUID here because if we restrict INSN to those
3608 that have a valid INSN_LUID, it means we cannot move an invariant out
3609 from an inner loop past two loops. */
3612 loop_reg_used_before_p (loop, set, insn)
3613 const struct loop *loop;
3616 rtx reg = SET_DEST (set);
3619 /* Scan forward checking for register usage. If we hit INSN, we
3620 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3621 for (p = loop->scan_start; p != insn; p = NEXT_INSN (p))
3623 if (INSN_P (p) && reg_overlap_mentioned_p (reg, PATTERN (p)))
3634 /* Information we collect about arrays that we might want to prefetch. */
3635 struct prefetch_info
3637 struct iv_class *class; /* Class this prefetch is based on. */
3638 struct induction *giv; /* GIV this prefetch is based on. */
3639 rtx base_address; /* Start prefetching from this address plus
3641 HOST_WIDE_INT index;
3642 HOST_WIDE_INT stride; /* Prefetch stride in bytes in each
3644 unsigned int bytes_accessed; /* Sum of sizes of all accesses to this
3645 prefetch area in one iteration. */
3646 unsigned int total_bytes; /* Total bytes loop will access in this block.
3647 This is set only for loops with known
3648 iteration counts and is 0xffffffff
3650 int prefetch_in_loop; /* Number of prefetch insns in loop. */
3651 int prefetch_before_loop; /* Number of prefetch insns before loop. */
3652 unsigned int write : 1; /* 1 for read/write prefetches. */
3655 /* Data used by check_store function. */
3656 struct check_store_data
3662 static void check_store PARAMS ((rtx, rtx, void *));
3663 static void emit_prefetch_instructions PARAMS ((struct loop *));
3664 static int rtx_equal_for_prefetch_p PARAMS ((rtx, rtx));
3666 /* Set mem_write when mem_address is found. Used as callback to
3669 check_store (x, pat, data)
3670 rtx x, pat ATTRIBUTE_UNUSED;
3673 struct check_store_data *d = (struct check_store_data *) data;
3675 if ((GET_CODE (x) == MEM) && rtx_equal_p (d->mem_address, XEXP (x, 0)))
3679 /* Like rtx_equal_p, but attempts to swap commutative operands. This is
3680 important to get some addresses combined. Later more sophisticated
3681 transformations can be added when necessary.
3683 ??? Same trick with swapping operand is done at several other places.
3684 It can be nice to develop some common way to handle this. */
3687 rtx_equal_for_prefetch_p (x, y)
3692 enum rtx_code code = GET_CODE (x);
3697 if (code != GET_CODE (y))
3700 code = GET_CODE (x);
3702 if (GET_RTX_CLASS (code) == 'c')
3704 return ((rtx_equal_for_prefetch_p (XEXP (x, 0), XEXP (y, 0))
3705 && rtx_equal_for_prefetch_p (XEXP (x, 1), XEXP (y, 1)))
3706 || (rtx_equal_for_prefetch_p (XEXP (x, 0), XEXP (y, 1))
3707 && rtx_equal_for_prefetch_p (XEXP (x, 1), XEXP (y, 0))));
3709 /* Compare the elements. If any pair of corresponding elements fails to
3710 match, return 0 for the whole thing. */
3712 fmt = GET_RTX_FORMAT (code);
3713 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3718 if (XWINT (x, i) != XWINT (y, i))
3723 if (XINT (x, i) != XINT (y, i))
3728 /* Two vectors must have the same length. */
3729 if (XVECLEN (x, i) != XVECLEN (y, i))
3732 /* And the corresponding elements must match. */
3733 for (j = 0; j < XVECLEN (x, i); j++)
3734 if (rtx_equal_for_prefetch_p (XVECEXP (x, i, j),
3735 XVECEXP (y, i, j)) == 0)
3740 if (rtx_equal_for_prefetch_p (XEXP (x, i), XEXP (y, i)) == 0)
3745 if (strcmp (XSTR (x, i), XSTR (y, i)))
3750 /* These are just backpointers, so they don't matter. */
3756 /* It is believed that rtx's at this level will never
3757 contain anything but integers and other rtx's,
3758 except for within LABEL_REFs and SYMBOL_REFs. */
3766 /* Remove constant addition value from the expression X (when present)
3769 static HOST_WIDE_INT
3770 remove_constant_addition (x)
3773 HOST_WIDE_INT addval = 0;
3776 /* Avoid clobbering a shared CONST expression. */
3777 if (GET_CODE (exp) == CONST)
3779 if (GET_CODE (XEXP (exp, 0)) == PLUS
3780 && GET_CODE (XEXP (XEXP (exp, 0), 0)) == SYMBOL_REF
3781 && GET_CODE (XEXP (XEXP (exp, 0), 1)) == CONST_INT)
3783 *x = XEXP (XEXP (exp, 0), 0);
3784 return INTVAL (XEXP (XEXP (exp, 0), 1));
3789 if (GET_CODE (exp) == CONST_INT)
3791 addval = INTVAL (exp);
3795 /* For plus expression recurse on ourself. */
3796 else if (GET_CODE (exp) == PLUS)
3798 addval += remove_constant_addition (&XEXP (exp, 0));
3799 addval += remove_constant_addition (&XEXP (exp, 1));
3801 /* In case our parameter was constant, remove extra zero from the
3803 if (XEXP (exp, 0) == const0_rtx)
3805 else if (XEXP (exp, 1) == const0_rtx)
3812 /* Attempt to identify accesses to arrays that are most likely to cause cache
3813 misses, and emit prefetch instructions a few prefetch blocks forward.
3815 To detect the arrays we use the GIV information that was collected by the
3816 strength reduction pass.
3818 The prefetch instructions are generated after the GIV information is done
3819 and before the strength reduction process. The new GIVs are injected into
3820 the strength reduction tables, so the prefetch addresses are optimized as
3823 GIVs are split into base address, stride, and constant addition values.
3824 GIVs with the same address, stride and close addition values are combined
3825 into a single prefetch. Also writes to GIVs are detected, so that prefetch
3826 for write instructions can be used for the block we write to, on machines
3827 that support write prefetches.
3829 Several heuristics are used to determine when to prefetch. They are
3830 controlled by defined symbols that can be overridden for each target. */
3833 emit_prefetch_instructions (loop)
3836 int num_prefetches = 0;
3837 int num_real_prefetches = 0;
3838 int num_real_write_prefetches = 0;
3839 int num_prefetches_before = 0;
3840 int num_write_prefetches_before = 0;
3843 struct iv_class *bl;
3844 struct induction *iv;
3845 struct prefetch_info info[MAX_PREFETCHES];
3846 struct loop_ivs *ivs = LOOP_IVS (loop);
3851 /* Consider only loops w/o calls. When a call is done, the loop is probably
3852 slow enough to read the memory. */
3853 if (PREFETCH_NO_CALL && LOOP_INFO (loop)->has_call)
3855 if (loop_dump_stream)
3856 fprintf (loop_dump_stream, "Prefetch: ignoring loop: has call.\n");
3861 /* Don't prefetch in loops known to have few iterations. */
3862 if (PREFETCH_NO_LOW_LOOPCNT
3863 && LOOP_INFO (loop)->n_iterations
3864 && LOOP_INFO (loop)->n_iterations <= PREFETCH_LOW_LOOPCNT)
3866 if (loop_dump_stream)
3867 fprintf (loop_dump_stream,
3868 "Prefetch: ignoring loop: not enough iterations.\n");
3872 /* Search all induction variables and pick those interesting for the prefetch
3874 for (bl = ivs->list; bl; bl = bl->next)
3876 struct induction *biv = bl->biv, *biv1;
3881 /* Expect all BIVs to be executed in each iteration. This makes our
3882 analysis more conservative. */
3885 /* Discard non-constant additions that we can't handle well yet, and
3886 BIVs that are executed multiple times; such BIVs ought to be
3887 handled in the nested loop. We accept not_every_iteration BIVs,
3888 since these only result in larger strides and make our
3889 heuristics more conservative. */
3890 if (GET_CODE (biv->add_val) != CONST_INT)
3892 if (loop_dump_stream)
3894 fprintf (loop_dump_stream,
3895 "Prefetch: ignoring biv %d: non-constant addition at insn %d:",
3896 REGNO (biv->src_reg), INSN_UID (biv->insn));
3897 print_rtl (loop_dump_stream, biv->add_val);
3898 fprintf (loop_dump_stream, "\n");
3903 if (biv->maybe_multiple)
3905 if (loop_dump_stream)
3907 fprintf (loop_dump_stream,
3908 "Prefetch: ignoring biv %d: maybe_multiple at insn %i:",
3909 REGNO (biv->src_reg), INSN_UID (biv->insn));
3910 print_rtl (loop_dump_stream, biv->add_val);
3911 fprintf (loop_dump_stream, "\n");
3916 basestride += INTVAL (biv1->add_val);
3917 biv1 = biv1->next_iv;
3920 if (biv1 || !basestride)
3923 for (iv = bl->giv; iv; iv = iv->next_iv)
3927 HOST_WIDE_INT index = 0;
3929 HOST_WIDE_INT stride = 0;
3930 int stride_sign = 1;
3931 struct check_store_data d;
3932 const char *ignore_reason = NULL;
3933 int size = GET_MODE_SIZE (GET_MODE (iv));
3935 /* See whether an induction variable is interesting to us and if
3936 not, report the reason. */
3937 if (iv->giv_type != DEST_ADDR)
3938 ignore_reason = "giv is not a destination address";
3940 /* We are interested only in constant stride memory references
3941 in order to be able to compute density easily. */
3942 else if (GET_CODE (iv->mult_val) != CONST_INT)
3943 ignore_reason = "stride is not constant";
3947 stride = INTVAL (iv->mult_val) * basestride;
3954 /* On some targets, reversed order prefetches are not
3956 if (PREFETCH_NO_REVERSE_ORDER && stride_sign < 0)
3957 ignore_reason = "reversed order stride";
3959 /* Prefetch of accesses with an extreme stride might not be
3960 worthwhile, either. */
3961 else if (PREFETCH_NO_EXTREME_STRIDE
3962 && stride > PREFETCH_EXTREME_STRIDE)
3963 ignore_reason = "extreme stride";
3965 /* Ignore GIVs with varying add values; we can't predict the
3966 value for the next iteration. */
3967 else if (!loop_invariant_p (loop, iv->add_val))
3968 ignore_reason = "giv has varying add value";
3970 /* Ignore GIVs in the nested loops; they ought to have been
3972 else if (iv->maybe_multiple)
3973 ignore_reason = "giv is in nested loop";
3976 if (ignore_reason != NULL)
3978 if (loop_dump_stream)
3979 fprintf (loop_dump_stream,
3980 "Prefetch: ignoring giv at %d: %s.\n",
3981 INSN_UID (iv->insn), ignore_reason);
3985 /* Determine the pointer to the basic array we are examining. It is
3986 the sum of the BIV's initial value and the GIV's add_val. */
3987 address = copy_rtx (iv->add_val);
3988 temp = copy_rtx (bl->initial_value);
3990 address = simplify_gen_binary (PLUS, Pmode, temp, address);
3991 index = remove_constant_addition (&address);
3994 d.mem_address = *iv->location;
3996 /* When the GIV is not always executed, we might be better off by
3997 not dirtying the cache pages. */
3998 if (PREFETCH_CONDITIONAL || iv->always_executed)
3999 note_stores (PATTERN (iv->insn), check_store, &d);
4002 if (loop_dump_stream)
4003 fprintf (loop_dump_stream, "Prefetch: Ignoring giv at %d: %s\n",
4004 INSN_UID (iv->insn), "in conditional code.");
4008 /* Attempt to find another prefetch to the same array and see if we
4009 can merge this one. */
4010 for (i = 0; i < num_prefetches; i++)
4011 if (rtx_equal_for_prefetch_p (address, info[i].base_address)
4012 && stride == info[i].stride)
4014 /* In case both access same array (same location
4015 just with small difference in constant indexes), merge
4016 the prefetches. Just do the later and the earlier will
4017 get prefetched from previous iteration.
4018 The artificial threshold should not be too small,
4019 but also not bigger than small portion of memory usually
4020 traversed by single loop. */
4021 if (index >= info[i].index
4022 && index - info[i].index < PREFETCH_EXTREME_DIFFERENCE)
4024 info[i].write |= d.mem_write;
4025 info[i].bytes_accessed += size;
4026 info[i].index = index;
4029 info[num_prefetches].base_address = address;
4034 if (index < info[i].index
4035 && info[i].index - index < PREFETCH_EXTREME_DIFFERENCE)
4037 info[i].write |= d.mem_write;
4038 info[i].bytes_accessed += size;
4044 /* Merging failed. */
4047 info[num_prefetches].giv = iv;
4048 info[num_prefetches].class = bl;
4049 info[num_prefetches].index = index;
4050 info[num_prefetches].stride = stride;
4051 info[num_prefetches].base_address = address;
4052 info[num_prefetches].write = d.mem_write;
4053 info[num_prefetches].bytes_accessed = size;
4055 if (num_prefetches >= MAX_PREFETCHES)
4057 if (loop_dump_stream)
4058 fprintf (loop_dump_stream,
4059 "Maximal number of prefetches exceeded.\n");
4066 for (i = 0; i < num_prefetches; i++)
4070 /* Attempt to calculate the total number of bytes fetched by all
4071 iterations of the loop. Avoid overflow. */
4072 if (LOOP_INFO (loop)->n_iterations
4073 && ((unsigned HOST_WIDE_INT) (0xffffffff / info[i].stride)
4074 >= LOOP_INFO (loop)->n_iterations))
4075 info[i].total_bytes = info[i].stride * LOOP_INFO (loop)->n_iterations;
4077 info[i].total_bytes = 0xffffffff;
4079 density = info[i].bytes_accessed * 100 / info[i].stride;
4081 /* Prefetch might be worthwhile only when the loads/stores are dense. */
4082 if (PREFETCH_ONLY_DENSE_MEM)
4083 if (density * 256 > PREFETCH_DENSE_MEM * 100
4084 && (info[i].total_bytes / PREFETCH_BLOCK
4085 >= PREFETCH_BLOCKS_BEFORE_LOOP_MIN))
4087 info[i].prefetch_before_loop = 1;
4088 info[i].prefetch_in_loop
4089 = (info[i].total_bytes / PREFETCH_BLOCK
4090 > PREFETCH_BLOCKS_BEFORE_LOOP_MAX);
4094 info[i].prefetch_in_loop = 0, info[i].prefetch_before_loop = 0;
4095 if (loop_dump_stream)
4096 fprintf (loop_dump_stream,
4097 "Prefetch: ignoring giv at %d: %d%% density is too low.\n",
4098 INSN_UID (info[i].giv->insn), density);
4101 info[i].prefetch_in_loop = 1, info[i].prefetch_before_loop = 1;
4103 /* Find how many prefetch instructions we'll use within the loop. */
4104 if (info[i].prefetch_in_loop != 0)
4106 info[i].prefetch_in_loop = ((info[i].stride + PREFETCH_BLOCK - 1)
4108 num_real_prefetches += info[i].prefetch_in_loop;
4110 num_real_write_prefetches += info[i].prefetch_in_loop;
4114 /* Determine how many iterations ahead to prefetch within the loop, based
4115 on how many prefetches we currently expect to do within the loop. */
4116 if (num_real_prefetches != 0)
4118 if ((ahead = SIMULTANEOUS_PREFETCHES / num_real_prefetches) == 0)
4120 if (loop_dump_stream)
4121 fprintf (loop_dump_stream,
4122 "Prefetch: ignoring prefetches within loop: ahead is zero; %d < %d\n",
4123 SIMULTANEOUS_PREFETCHES, num_real_prefetches);
4124 num_real_prefetches = 0, num_real_write_prefetches = 0;
4127 /* We'll also use AHEAD to determine how many prefetch instructions to
4128 emit before a loop, so don't leave it zero. */
4130 ahead = PREFETCH_BLOCKS_BEFORE_LOOP_MAX;
4132 for (i = 0; i < num_prefetches; i++)
4134 /* Update if we've decided not to prefetch anything within the loop. */
4135 if (num_real_prefetches == 0)
4136 info[i].prefetch_in_loop = 0;
4138 /* Find how many prefetch instructions we'll use before the loop. */
4139 if (info[i].prefetch_before_loop != 0)
4141 int n = info[i].total_bytes / PREFETCH_BLOCK;
4144 info[i].prefetch_before_loop = n;
4145 num_prefetches_before += n;
4147 num_write_prefetches_before += n;
4150 if (loop_dump_stream)
4152 if (info[i].prefetch_in_loop == 0
4153 && info[i].prefetch_before_loop == 0)
4155 fprintf (loop_dump_stream, "Prefetch insn: %d",
4156 INSN_UID (info[i].giv->insn));
4157 fprintf (loop_dump_stream,
4158 "; in loop: %d; before: %d; %s\n",
4159 info[i].prefetch_in_loop,
4160 info[i].prefetch_before_loop,
4161 info[i].write ? "read/write" : "read only");
4162 fprintf (loop_dump_stream,
4163 " density: %d%%; bytes_accessed: %u; total_bytes: %u\n",
4164 (int) (info[i].bytes_accessed * 100 / info[i].stride),
4165 info[i].bytes_accessed, info[i].total_bytes);
4166 fprintf (loop_dump_stream, " index: ");
4167 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, info[i].index);
4168 fprintf (loop_dump_stream, "; stride: ");
4169 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, info[i].stride);
4170 fprintf (loop_dump_stream, "; address: ");
4171 print_rtl (loop_dump_stream, info[i].base_address);
4172 fprintf (loop_dump_stream, "\n");
4176 if (num_real_prefetches + num_prefetches_before > 0)
4178 /* Record that this loop uses prefetch instructions. */
4179 LOOP_INFO (loop)->has_prefetch = 1;
4181 if (loop_dump_stream)
4183 fprintf (loop_dump_stream, "Real prefetches needed within loop: %d (write: %d)\n",
4184 num_real_prefetches, num_real_write_prefetches);
4185 fprintf (loop_dump_stream, "Real prefetches needed before loop: %d (write: %d)\n",
4186 num_prefetches_before, num_write_prefetches_before);
4190 for (i = 0; i < num_prefetches; i++)
4194 for (y = 0; y < info[i].prefetch_in_loop; y++)
4196 rtx loc = copy_rtx (*info[i].giv->location);
4198 int bytes_ahead = PREFETCH_BLOCK * (ahead + y);
4199 rtx before_insn = info[i].giv->insn;
4200 rtx prev_insn = PREV_INSN (info[i].giv->insn);
4203 /* We can save some effort by offsetting the address on
4204 architectures with offsettable memory references. */
4205 if (offsettable_address_p (0, VOIDmode, loc))
4206 loc = plus_constant (loc, bytes_ahead);
4209 rtx reg = gen_reg_rtx (Pmode);
4210 loop_iv_add_mult_emit_before (loop, loc, const1_rtx,
4211 GEN_INT (bytes_ahead), reg,
4217 /* Make sure the address operand is valid for prefetch. */
4218 if (! (*insn_data[(int)CODE_FOR_prefetch].operand[0].predicate)
4219 (loc, insn_data[(int)CODE_FOR_prefetch].operand[0].mode))
4220 loc = force_reg (Pmode, loc);
4221 emit_insn (gen_prefetch (loc, GEN_INT (info[i].write),
4225 emit_insn_before (seq, before_insn);
4227 /* Check all insns emitted and record the new GIV
4229 insn = NEXT_INSN (prev_insn);
4230 while (insn != before_insn)
4232 insn = check_insn_for_givs (loop, insn,
4233 info[i].giv->always_executed,
4234 info[i].giv->maybe_multiple);
4235 insn = NEXT_INSN (insn);
4239 if (PREFETCH_BEFORE_LOOP)
4241 /* Emit insns before the loop to fetch the first cache lines or,
4242 if we're not prefetching within the loop, everything we expect
4244 for (y = 0; y < info[i].prefetch_before_loop; y++)
4246 rtx reg = gen_reg_rtx (Pmode);
4247 rtx loop_start = loop->start;
4248 rtx init_val = info[i].class->initial_value;
4249 rtx add_val = simplify_gen_binary (PLUS, Pmode,
4250 info[i].giv->add_val,
4251 GEN_INT (y * PREFETCH_BLOCK));
4253 /* Functions called by LOOP_IV_ADD_EMIT_BEFORE expect a
4254 non-constant INIT_VAL to have the same mode as REG, which
4255 in this case we know to be Pmode. */
4256 if (GET_MODE (init_val) != Pmode && !CONSTANT_P (init_val))
4261 init_val = convert_to_mode (Pmode, init_val, 0);
4264 loop_insn_emit_before (loop, 0, loop_start, seq);
4266 loop_iv_add_mult_emit_before (loop, init_val,
4267 info[i].giv->mult_val,
4268 add_val, reg, 0, loop_start);
4269 emit_insn_before (gen_prefetch (reg, GEN_INT (info[i].write),
4279 /* A "basic induction variable" or biv is a pseudo reg that is set
4280 (within this loop) only by incrementing or decrementing it. */
4281 /* A "general induction variable" or giv is a pseudo reg whose
4282 value is a linear function of a biv. */
4284 /* Bivs are recognized by `basic_induction_var';
4285 Givs by `general_induction_var'. */
4287 /* Communication with routines called via `note_stores'. */
4289 static rtx note_insn;
4291 /* Dummy register to have nonzero DEST_REG for DEST_ADDR type givs. */
4293 static rtx addr_placeholder;
4295 /* ??? Unfinished optimizations, and possible future optimizations,
4296 for the strength reduction code. */
4298 /* ??? The interaction of biv elimination, and recognition of 'constant'
4299 bivs, may cause problems. */
4301 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
4302 performance problems.
4304 Perhaps don't eliminate things that can be combined with an addressing
4305 mode. Find all givs that have the same biv, mult_val, and add_val;
4306 then for each giv, check to see if its only use dies in a following
4307 memory address. If so, generate a new memory address and check to see
4308 if it is valid. If it is valid, then store the modified memory address,
4309 otherwise, mark the giv as not done so that it will get its own iv. */
4311 /* ??? Could try to optimize branches when it is known that a biv is always
4314 /* ??? When replace a biv in a compare insn, we should replace with closest
4315 giv so that an optimized branch can still be recognized by the combiner,
4316 e.g. the VAX acb insn. */
4318 /* ??? Many of the checks involving uid_luid could be simplified if regscan
4319 was rerun in loop_optimize whenever a register was added or moved.
4320 Also, some of the optimizations could be a little less conservative. */
4322 /* Scan the loop body and call FNCALL for each insn. In the addition to the
4323 LOOP and INSN parameters pass MAYBE_MULTIPLE and NOT_EVERY_ITERATION to the
4326 NOT_EVERY_ITERATION is 1 if current insn is not known to be executed at
4327 least once for every loop iteration except for the last one.
4329 MAYBE_MULTIPLE is 1 if current insn may be executed more than once for every
4333 for_each_insn_in_loop (loop, fncall)
4335 loop_insn_callback fncall;
4337 int not_every_iteration = 0;
4338 int maybe_multiple = 0;
4339 int past_loop_latch = 0;
4343 /* If loop_scan_start points to the loop exit test, we have to be wary of
4344 subversive use of gotos inside expression statements. */
4345 if (prev_nonnote_insn (loop->scan_start) != prev_nonnote_insn (loop->start))
4346 maybe_multiple = back_branch_in_range_p (loop, loop->scan_start);
4348 /* Scan through loop and update NOT_EVERY_ITERATION and MAYBE_MULTIPLE. */
4349 for (p = next_insn_in_loop (loop, loop->scan_start);
4351 p = next_insn_in_loop (loop, p))
4353 p = fncall (loop, p, not_every_iteration, maybe_multiple);
4355 /* Past CODE_LABEL, we get to insns that may be executed multiple
4356 times. The only way we can be sure that they can't is if every
4357 jump insn between here and the end of the loop either
4358 returns, exits the loop, is a jump to a location that is still
4359 behind the label, or is a jump to the loop start. */
4361 if (GET_CODE (p) == CODE_LABEL)
4369 insn = NEXT_INSN (insn);
4370 if (insn == loop->scan_start)
4372 if (insn == loop->end)
4378 if (insn == loop->scan_start)
4382 if (GET_CODE (insn) == JUMP_INSN
4383 && GET_CODE (PATTERN (insn)) != RETURN
4384 && (!any_condjump_p (insn)
4385 || (JUMP_LABEL (insn) != 0
4386 && JUMP_LABEL (insn) != loop->scan_start
4387 && !loop_insn_first_p (p, JUMP_LABEL (insn)))))
4395 /* Past a jump, we get to insns for which we can't count
4396 on whether they will be executed during each iteration. */
4397 /* This code appears twice in strength_reduce. There is also similar
4398 code in scan_loop. */
4399 if (GET_CODE (p) == JUMP_INSN
4400 /* If we enter the loop in the middle, and scan around to the
4401 beginning, don't set not_every_iteration for that.
4402 This can be any kind of jump, since we want to know if insns
4403 will be executed if the loop is executed. */
4404 && !(JUMP_LABEL (p) == loop->top
4405 && ((NEXT_INSN (NEXT_INSN (p)) == loop->end
4406 && any_uncondjump_p (p))
4407 || (NEXT_INSN (p) == loop->end && any_condjump_p (p)))))
4411 /* If this is a jump outside the loop, then it also doesn't
4412 matter. Check to see if the target of this branch is on the
4413 loop->exits_labels list. */
4415 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
4416 if (XEXP (label, 0) == JUMP_LABEL (p))
4420 not_every_iteration = 1;
4423 else if (GET_CODE (p) == NOTE)
4425 /* At the virtual top of a converted loop, insns are again known to
4426 be executed each iteration: logically, the loop begins here
4427 even though the exit code has been duplicated.
4429 Insns are also again known to be executed each iteration at
4430 the LOOP_CONT note. */
4431 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
4432 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
4434 not_every_iteration = 0;
4435 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
4437 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
4441 /* Note if we pass a loop latch. If we do, then we can not clear
4442 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
4443 a loop since a jump before the last CODE_LABEL may have started
4444 a new loop iteration.
4446 Note that LOOP_TOP is only set for rotated loops and we need
4447 this check for all loops, so compare against the CODE_LABEL
4448 which immediately follows LOOP_START. */
4449 if (GET_CODE (p) == JUMP_INSN
4450 && JUMP_LABEL (p) == NEXT_INSN (loop->start))
4451 past_loop_latch = 1;
4453 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4454 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4455 or not an insn is known to be executed each iteration of the
4456 loop, whether or not any iterations are known to occur.
4458 Therefore, if we have just passed a label and have no more labels
4459 between here and the test insn of the loop, and we have not passed
4460 a jump to the top of the loop, then we know these insns will be
4461 executed each iteration. */
4463 if (not_every_iteration
4465 && GET_CODE (p) == CODE_LABEL
4466 && no_labels_between_p (p, loop->end)
4467 && loop_insn_first_p (p, loop->cont))
4468 not_every_iteration = 0;
4473 loop_bivs_find (loop)
4476 struct loop_regs *regs = LOOP_REGS (loop);
4477 struct loop_ivs *ivs = LOOP_IVS (loop);
4478 /* Temporary list pointers for traversing ivs->list. */
4479 struct iv_class *bl, **backbl;
4483 for_each_insn_in_loop (loop, check_insn_for_bivs);
4485 /* Scan ivs->list to remove all regs that proved not to be bivs.
4486 Make a sanity check against regs->n_times_set. */
4487 for (backbl = &ivs->list, bl = *backbl; bl; bl = bl->next)
4489 if (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
4490 /* Above happens if register modified by subreg, etc. */
4491 /* Make sure it is not recognized as a basic induction var: */
4492 || regs->array[bl->regno].n_times_set != bl->biv_count
4493 /* If never incremented, it is invariant that we decided not to
4494 move. So leave it alone. */
4495 || ! bl->incremented)
4497 if (loop_dump_stream)
4498 fprintf (loop_dump_stream, "Biv %d: discarded, %s\n",
4500 (REG_IV_TYPE (ivs, bl->regno) != BASIC_INDUCT
4501 ? "not induction variable"
4502 : (! bl->incremented ? "never incremented"
4505 REG_IV_TYPE (ivs, bl->regno) = NOT_BASIC_INDUCT;
4512 if (loop_dump_stream)
4513 fprintf (loop_dump_stream, "Biv %d: verified\n", bl->regno);
4519 /* Determine how BIVS are initialized by looking through pre-header
4520 extended basic block. */
4522 loop_bivs_init_find (loop)
4525 struct loop_ivs *ivs = LOOP_IVS (loop);
4526 /* Temporary list pointers for traversing ivs->list. */
4527 struct iv_class *bl;
4531 /* Find initial value for each biv by searching backwards from loop_start,
4532 halting at first label. Also record any test condition. */
4535 for (p = loop->start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
4541 if (GET_CODE (p) == CALL_INSN)
4545 note_stores (PATTERN (p), record_initial, ivs);
4547 /* Record any test of a biv that branches around the loop if no store
4548 between it and the start of loop. We only care about tests with
4549 constants and registers and only certain of those. */
4550 if (GET_CODE (p) == JUMP_INSN
4551 && JUMP_LABEL (p) != 0
4552 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop->end)
4553 && (test = get_condition_for_loop (loop, p)) != 0
4554 && GET_CODE (XEXP (test, 0)) == REG
4555 && REGNO (XEXP (test, 0)) < max_reg_before_loop
4556 && (bl = REG_IV_CLASS (ivs, REGNO (XEXP (test, 0)))) != 0
4557 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop->start)
4558 && bl->init_insn == 0)
4560 /* If an NE test, we have an initial value! */
4561 if (GET_CODE (test) == NE)
4564 bl->init_set = gen_rtx_SET (VOIDmode,
4565 XEXP (test, 0), XEXP (test, 1));
4568 bl->initial_test = test;
4574 /* Look at the each biv and see if we can say anything better about its
4575 initial value from any initializing insns set up above. (This is done
4576 in two passes to avoid missing SETs in a PARALLEL.) */
4578 loop_bivs_check (loop)
4581 struct loop_ivs *ivs = LOOP_IVS (loop);
4582 /* Temporary list pointers for traversing ivs->list. */
4583 struct iv_class *bl;
4584 struct iv_class **backbl;
4586 for (backbl = &ivs->list; (bl = *backbl); backbl = &bl->next)
4591 if (! bl->init_insn)
4594 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
4595 is a constant, use the value of that. */
4596 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
4597 && CONSTANT_P (XEXP (note, 0)))
4598 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
4599 && CONSTANT_P (XEXP (note, 0))))
4600 src = XEXP (note, 0);
4602 src = SET_SRC (bl->init_set);
4604 if (loop_dump_stream)
4605 fprintf (loop_dump_stream,
4606 "Biv %d: initialized at insn %d: initial value ",
4607 bl->regno, INSN_UID (bl->init_insn));
4609 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
4610 || GET_MODE (src) == VOIDmode)
4611 && valid_initial_value_p (src, bl->init_insn,
4612 LOOP_INFO (loop)->pre_header_has_call,
4615 bl->initial_value = src;
4617 if (loop_dump_stream)
4619 print_simple_rtl (loop_dump_stream, src);
4620 fputc ('\n', loop_dump_stream);
4623 /* If we can't make it a giv,
4624 let biv keep initial value of "itself". */
4625 else if (loop_dump_stream)
4626 fprintf (loop_dump_stream, "is complex\n");
4631 /* Search the loop for general induction variables. */
4634 loop_givs_find (loop)
4637 for_each_insn_in_loop (loop, check_insn_for_givs);
4641 /* For each giv for which we still don't know whether or not it is
4642 replaceable, check to see if it is replaceable because its final value
4643 can be calculated. */
4646 loop_givs_check (loop)
4649 struct loop_ivs *ivs = LOOP_IVS (loop);
4650 struct iv_class *bl;
4652 for (bl = ivs->list; bl; bl = bl->next)
4654 struct induction *v;
4656 for (v = bl->giv; v; v = v->next_iv)
4657 if (! v->replaceable && ! v->not_replaceable)
4658 check_final_value (loop, v);
4663 /* Return nonzero if it is possible to eliminate the biv BL provided
4664 all givs are reduced. This is possible if either the reg is not
4665 used outside the loop, or we can compute what its final value will
4669 loop_biv_eliminable_p (loop, bl, threshold, insn_count)
4671 struct iv_class *bl;
4675 /* For architectures with a decrement_and_branch_until_zero insn,
4676 don't do this if we put a REG_NONNEG note on the endtest for this
4679 #ifdef HAVE_decrement_and_branch_until_zero
4682 if (loop_dump_stream)
4683 fprintf (loop_dump_stream,
4684 "Cannot eliminate nonneg biv %d.\n", bl->regno);
4689 /* Check that biv is used outside loop or if it has a final value.
4690 Compare against bl->init_insn rather than loop->start. We aren't
4691 concerned with any uses of the biv between init_insn and
4692 loop->start since these won't be affected by the value of the biv
4693 elsewhere in the function, so long as init_insn doesn't use the
4696 if ((REGNO_LAST_LUID (bl->regno) < INSN_LUID (loop->end)
4698 && INSN_UID (bl->init_insn) < max_uid_for_loop
4699 && REGNO_FIRST_LUID (bl->regno) >= INSN_LUID (bl->init_insn)
4700 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4701 || (bl->final_value = final_biv_value (loop, bl)))
4702 return maybe_eliminate_biv (loop, bl, 0, threshold, insn_count);
4704 if (loop_dump_stream)
4706 fprintf (loop_dump_stream,
4707 "Cannot eliminate biv %d.\n",
4709 fprintf (loop_dump_stream,
4710 "First use: insn %d, last use: insn %d.\n",
4711 REGNO_FIRST_UID (bl->regno),
4712 REGNO_LAST_UID (bl->regno));
4718 /* Reduce each giv of BL that we have decided to reduce. */
4721 loop_givs_reduce (loop, bl)
4723 struct iv_class *bl;
4725 struct induction *v;
4727 for (v = bl->giv; v; v = v->next_iv)
4729 struct induction *tv;
4730 if (! v->ignore && v->same == 0)
4732 int auto_inc_opt = 0;
4734 /* If the code for derived givs immediately below has already
4735 allocated a new_reg, we must keep it. */
4737 v->new_reg = gen_reg_rtx (v->mode);
4740 /* If the target has auto-increment addressing modes, and
4741 this is an address giv, then try to put the increment
4742 immediately after its use, so that flow can create an
4743 auto-increment addressing mode. */
4744 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4745 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4746 /* We don't handle reversed biv's because bl->biv->insn
4747 does not have a valid INSN_LUID. */
4749 && v->always_executed && ! v->maybe_multiple
4750 && INSN_UID (v->insn) < max_uid_for_loop)
4752 /* If other giv's have been combined with this one, then
4753 this will work only if all uses of the other giv's occur
4754 before this giv's insn. This is difficult to check.
4756 We simplify this by looking for the common case where
4757 there is one DEST_REG giv, and this giv's insn is the
4758 last use of the dest_reg of that DEST_REG giv. If the
4759 increment occurs after the address giv, then we can
4760 perform the optimization. (Otherwise, the increment
4761 would have to go before other_giv, and we would not be
4762 able to combine it with the address giv to get an
4763 auto-inc address.) */
4764 if (v->combined_with)
4766 struct induction *other_giv = 0;
4768 for (tv = bl->giv; tv; tv = tv->next_iv)
4776 if (! tv && other_giv
4777 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4778 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4779 == INSN_UID (v->insn))
4780 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4783 /* Check for case where increment is before the address
4784 giv. Do this test in "loop order". */
4785 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4786 && (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
4787 || (INSN_LUID (bl->biv->insn)
4788 > INSN_LUID (loop->scan_start))))
4789 || (INSN_LUID (v->insn) < INSN_LUID (loop->scan_start)
4790 && (INSN_LUID (loop->scan_start)
4791 < INSN_LUID (bl->biv->insn))))
4800 /* We can't put an insn immediately after one setting
4801 cc0, or immediately before one using cc0. */
4802 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4803 || (auto_inc_opt == -1
4804 && (prev = prev_nonnote_insn (v->insn)) != 0
4806 && sets_cc0_p (PATTERN (prev))))
4812 v->auto_inc_opt = 1;
4816 /* For each place where the biv is incremented, add an insn
4817 to increment the new, reduced reg for the giv. */
4818 for (tv = bl->biv; tv; tv = tv->next_iv)
4822 /* Skip if location is the same as a previous one. */
4826 insert_before = NEXT_INSN (tv->insn);
4827 else if (auto_inc_opt == 1)
4828 insert_before = NEXT_INSN (v->insn);
4830 insert_before = v->insn;
4832 if (tv->mult_val == const1_rtx)
4833 loop_iv_add_mult_emit_before (loop, tv->add_val, v->mult_val,
4834 v->new_reg, v->new_reg,
4836 else /* tv->mult_val == const0_rtx */
4837 /* A multiply is acceptable here
4838 since this is presumed to be seldom executed. */
4839 loop_iv_add_mult_emit_before (loop, tv->add_val, v->mult_val,
4840 v->add_val, v->new_reg,
4844 /* Add code at loop start to initialize giv's reduced reg. */
4846 loop_iv_add_mult_hoist (loop,
4847 extend_value_for_giv (v, bl->initial_value),
4848 v->mult_val, v->add_val, v->new_reg);
4854 /* Check for givs whose first use is their definition and whose
4855 last use is the definition of another giv. If so, it is likely
4856 dead and should not be used to derive another giv nor to
4860 loop_givs_dead_check (loop, bl)
4861 struct loop *loop ATTRIBUTE_UNUSED;
4862 struct iv_class *bl;
4864 struct induction *v;
4866 for (v = bl->giv; v; v = v->next_iv)
4869 || (v->same && v->same->ignore))
4872 if (v->giv_type == DEST_REG
4873 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4875 struct induction *v1;
4877 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4878 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4886 loop_givs_rescan (loop, bl, reg_map)
4888 struct iv_class *bl;
4891 struct induction *v;
4893 for (v = bl->giv; v; v = v->next_iv)
4895 if (v->same && v->same->ignore)
4901 /* Update expression if this was combined, in case other giv was
4904 v->new_reg = replace_rtx (v->new_reg,
4905 v->same->dest_reg, v->same->new_reg);
4907 /* See if this register is known to be a pointer to something. If
4908 so, see if we can find the alignment. First see if there is a
4909 destination register that is a pointer. If so, this shares the
4910 alignment too. Next see if we can deduce anything from the
4911 computational information. If not, and this is a DEST_ADDR
4912 giv, at least we know that it's a pointer, though we don't know
4914 if (GET_CODE (v->new_reg) == REG
4915 && v->giv_type == DEST_REG
4916 && REG_POINTER (v->dest_reg))
4917 mark_reg_pointer (v->new_reg,
4918 REGNO_POINTER_ALIGN (REGNO (v->dest_reg)));
4919 else if (GET_CODE (v->new_reg) == REG
4920 && REG_POINTER (v->src_reg))
4922 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->src_reg));
4925 || GET_CODE (v->add_val) != CONST_INT
4926 || INTVAL (v->add_val) % (align / BITS_PER_UNIT) != 0)
4929 mark_reg_pointer (v->new_reg, align);
4931 else if (GET_CODE (v->new_reg) == REG
4932 && GET_CODE (v->add_val) == REG
4933 && REG_POINTER (v->add_val))
4935 unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->add_val));
4937 if (align == 0 || GET_CODE (v->mult_val) != CONST_INT
4938 || INTVAL (v->mult_val) % (align / BITS_PER_UNIT) != 0)
4941 mark_reg_pointer (v->new_reg, align);
4943 else if (GET_CODE (v->new_reg) == REG && v->giv_type == DEST_ADDR)
4944 mark_reg_pointer (v->new_reg, 0);
4946 if (v->giv_type == DEST_ADDR)
4947 /* Store reduced reg as the address in the memref where we found
4949 validate_change (v->insn, v->location, v->new_reg, 0);
4950 else if (v->replaceable)
4952 reg_map[REGNO (v->dest_reg)] = v->new_reg;
4956 rtx original_insn = v->insn;
4959 /* Not replaceable; emit an insn to set the original giv reg from
4960 the reduced giv, same as above. */
4961 v->insn = loop_insn_emit_after (loop, 0, original_insn,
4962 gen_move_insn (v->dest_reg,
4965 /* The original insn may have a REG_EQUAL note. This note is
4966 now incorrect and may result in invalid substitutions later.
4967 The original insn is dead, but may be part of a libcall
4968 sequence, which doesn't seem worth the bother of handling. */
4969 note = find_reg_note (original_insn, REG_EQUAL, NULL_RTX);
4971 remove_note (original_insn, note);
4974 /* When a loop is reversed, givs which depend on the reversed
4975 biv, and which are live outside the loop, must be set to their
4976 correct final value. This insn is only needed if the giv is
4977 not replaceable. The correct final value is the same as the
4978 value that the giv starts the reversed loop with. */
4979 if (bl->reversed && ! v->replaceable)
4980 loop_iv_add_mult_sink (loop,
4981 extend_value_for_giv (v, bl->initial_value),
4982 v->mult_val, v->add_val, v->dest_reg);
4983 else if (v->final_value)
4984 loop_insn_sink_or_swim (loop,
4985 gen_load_of_final_value (v->dest_reg,
4988 if (loop_dump_stream)
4990 fprintf (loop_dump_stream, "giv at %d reduced to ",
4991 INSN_UID (v->insn));
4992 print_simple_rtl (loop_dump_stream, v->new_reg);
4993 fprintf (loop_dump_stream, "\n");
5000 loop_giv_reduce_benefit (loop, bl, v, test_reg)
5001 struct loop *loop ATTRIBUTE_UNUSED;
5002 struct iv_class *bl;
5003 struct induction *v;
5009 benefit = v->benefit;
5010 PUT_MODE (test_reg, v->mode);
5011 add_cost = iv_add_mult_cost (bl->biv->add_val, v->mult_val,
5012 test_reg, test_reg);
5014 /* Reduce benefit if not replaceable, since we will insert a
5015 move-insn to replace the insn that calculates this giv. Don't do
5016 this unless the giv is a user variable, since it will often be
5017 marked non-replaceable because of the duplication of the exit
5018 code outside the loop. In such a case, the copies we insert are
5019 dead and will be deleted. So they don't have a cost. Similar
5020 situations exist. */
5021 /* ??? The new final_[bg]iv_value code does a much better job of
5022 finding replaceable giv's, and hence this code may no longer be
5024 if (! v->replaceable && ! bl->eliminable
5025 && REG_USERVAR_P (v->dest_reg))
5026 benefit -= copy_cost;
5028 /* Decrease the benefit to count the add-insns that we will insert
5029 to increment the reduced reg for the giv. ??? This can
5030 overestimate the run-time cost of the additional insns, e.g. if
5031 there are multiple basic blocks that increment the biv, but only
5032 one of these blocks is executed during each iteration. There is
5033 no good way to detect cases like this with the current structure
5034 of the loop optimizer. This code is more accurate for
5035 determining code size than run-time benefits. */
5036 benefit -= add_cost * bl->biv_count;
5038 /* Decide whether to strength-reduce this giv or to leave the code
5039 unchanged (recompute it from the biv each time it is used). This
5040 decision can be made independently for each giv. */
5043 /* Attempt to guess whether autoincrement will handle some of the
5044 new add insns; if so, increase BENEFIT (undo the subtraction of
5045 add_cost that was done above). */
5046 if (v->giv_type == DEST_ADDR
5047 /* Increasing the benefit is risky, since this is only a guess.
5048 Avoid increasing register pressure in cases where there would
5049 be no other benefit from reducing this giv. */
5051 && GET_CODE (v->mult_val) == CONST_INT)
5053 int size = GET_MODE_SIZE (GET_MODE (v->mem));
5055 if (HAVE_POST_INCREMENT
5056 && INTVAL (v->mult_val) == size)
5057 benefit += add_cost * bl->biv_count;
5058 else if (HAVE_PRE_INCREMENT
5059 && INTVAL (v->mult_val) == size)
5060 benefit += add_cost * bl->biv_count;
5061 else if (HAVE_POST_DECREMENT
5062 && -INTVAL (v->mult_val) == size)
5063 benefit += add_cost * bl->biv_count;
5064 else if (HAVE_PRE_DECREMENT
5065 && -INTVAL (v->mult_val) == size)
5066 benefit += add_cost * bl->biv_count;
5074 /* Free IV structures for LOOP. */
5077 loop_ivs_free (loop)
5080 struct loop_ivs *ivs = LOOP_IVS (loop);
5081 struct iv_class *iv = ivs->list;
5087 struct iv_class *next = iv->next;
5088 struct induction *induction;
5089 struct induction *next_induction;
5091 for (induction = iv->biv; induction; induction = next_induction)
5093 next_induction = induction->next_iv;
5096 for (induction = iv->giv; induction; induction = next_induction)
5098 next_induction = induction->next_iv;
5108 /* Perform strength reduction and induction variable elimination.
5110 Pseudo registers created during this function will be beyond the
5111 last valid index in several tables including
5112 REGS->ARRAY[I].N_TIMES_SET and REGNO_LAST_UID. This does not cause a
5113 problem here, because the added registers cannot be givs outside of
5114 their loop, and hence will never be reconsidered. But scan_loop
5115 must check regnos to make sure they are in bounds. */
5118 strength_reduce (loop, flags)
5122 struct loop_info *loop_info = LOOP_INFO (loop);
5123 struct loop_regs *regs = LOOP_REGS (loop);
5124 struct loop_ivs *ivs = LOOP_IVS (loop);
5126 /* Temporary list pointer for traversing ivs->list. */
5127 struct iv_class *bl;
5128 /* Ratio of extra register life span we can justify
5129 for saving an instruction. More if loop doesn't call subroutines
5130 since in that case saving an insn makes more difference
5131 and more registers are available. */
5132 /* ??? could set this to last value of threshold in move_movables */
5133 int threshold = (loop_info->has_call ? 1 : 2) * (3 + n_non_fixed_regs);
5134 /* Map of pseudo-register replacements. */
5135 rtx *reg_map = NULL;
5137 int unrolled_insn_copies = 0;
5138 rtx test_reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
5139 int insn_count = count_insns_in_loop (loop);
5141 addr_placeholder = gen_reg_rtx (Pmode);
5143 ivs->n_regs = max_reg_before_loop;
5144 ivs->regs = (struct iv *) xcalloc (ivs->n_regs, sizeof (struct iv));
5146 /* Find all BIVs in loop. */
5147 loop_bivs_find (loop);
5149 /* Exit if there are no bivs. */
5152 /* Can still unroll the loop anyways, but indicate that there is no
5153 strength reduction info available. */
5154 if (flags & LOOP_UNROLL)
5155 unroll_loop (loop, insn_count, 0);
5157 loop_ivs_free (loop);
5161 /* Determine how BIVS are initialized by looking through pre-header
5162 extended basic block. */
5163 loop_bivs_init_find (loop);
5165 /* Look at the each biv and see if we can say anything better about its
5166 initial value from any initializing insns set up above. */
5167 loop_bivs_check (loop);
5169 /* Search the loop for general induction variables. */
5170 loop_givs_find (loop);
5172 /* Try to calculate and save the number of loop iterations. This is
5173 set to zero if the actual number can not be calculated. This must
5174 be called after all giv's have been identified, since otherwise it may
5175 fail if the iteration variable is a giv. */
5176 loop_iterations (loop);
5178 #ifdef HAVE_prefetch
5179 if (flags & LOOP_PREFETCH)
5180 emit_prefetch_instructions (loop);
5183 /* Now for each giv for which we still don't know whether or not it is
5184 replaceable, check to see if it is replaceable because its final value
5185 can be calculated. This must be done after loop_iterations is called,
5186 so that final_giv_value will work correctly. */
5187 loop_givs_check (loop);
5189 /* Try to prove that the loop counter variable (if any) is always
5190 nonnegative; if so, record that fact with a REG_NONNEG note
5191 so that "decrement and branch until zero" insn can be used. */
5192 check_dbra_loop (loop, insn_count);
5194 /* Create reg_map to hold substitutions for replaceable giv regs.
5195 Some givs might have been made from biv increments, so look at
5196 ivs->reg_iv_type for a suitable size. */
5197 reg_map_size = ivs->n_regs;
5198 reg_map = (rtx *) xcalloc (reg_map_size, sizeof (rtx));
5200 /* Examine each iv class for feasibility of strength reduction/induction
5201 variable elimination. */
5203 for (bl = ivs->list; bl; bl = bl->next)
5205 struct induction *v;
5208 /* Test whether it will be possible to eliminate this biv
5209 provided all givs are reduced. */
5210 bl->eliminable = loop_biv_eliminable_p (loop, bl, threshold, insn_count);
5212 /* This will be true at the end, if all givs which depend on this
5213 biv have been strength reduced.
5214 We can't (currently) eliminate the biv unless this is so. */
5215 bl->all_reduced = 1;
5217 /* Check each extension dependent giv in this class to see if its
5218 root biv is safe from wrapping in the interior mode. */
5219 check_ext_dependent_givs (bl, loop_info);
5221 /* Combine all giv's for this iv_class. */
5222 combine_givs (regs, bl);
5224 for (v = bl->giv; v; v = v->next_iv)
5226 struct induction *tv;
5228 if (v->ignore || v->same)
5231 benefit = loop_giv_reduce_benefit (loop, bl, v, test_reg);
5233 /* If an insn is not to be strength reduced, then set its ignore
5234 flag, and clear bl->all_reduced. */
5236 /* A giv that depends on a reversed biv must be reduced if it is
5237 used after the loop exit, otherwise, it would have the wrong
5238 value after the loop exit. To make it simple, just reduce all
5239 of such giv's whether or not we know they are used after the loop
5242 if (! flag_reduce_all_givs
5243 && v->lifetime * threshold * benefit < insn_count
5246 if (loop_dump_stream)
5247 fprintf (loop_dump_stream,
5248 "giv of insn %d not worth while, %d vs %d.\n",
5250 v->lifetime * threshold * benefit, insn_count);
5252 bl->all_reduced = 0;
5256 /* Check that we can increment the reduced giv without a
5257 multiply insn. If not, reject it. */
5259 for (tv = bl->biv; tv; tv = tv->next_iv)
5260 if (tv->mult_val == const1_rtx
5261 && ! product_cheap_p (tv->add_val, v->mult_val))
5263 if (loop_dump_stream)
5264 fprintf (loop_dump_stream,
5265 "giv of insn %d: would need a multiply.\n",
5266 INSN_UID (v->insn));
5268 bl->all_reduced = 0;
5274 /* Check for givs whose first use is their definition and whose
5275 last use is the definition of another giv. If so, it is likely
5276 dead and should not be used to derive another giv nor to
5278 loop_givs_dead_check (loop, bl);
5280 /* Reduce each giv that we decided to reduce. */
5281 loop_givs_reduce (loop, bl);
5283 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
5286 For each giv register that can be reduced now: if replaceable,
5287 substitute reduced reg wherever the old giv occurs;
5288 else add new move insn "giv_reg = reduced_reg". */
5289 loop_givs_rescan (loop, bl, reg_map);
5291 /* All the givs based on the biv bl have been reduced if they
5294 /* For each giv not marked as maybe dead that has been combined with a
5295 second giv, clear any "maybe dead" mark on that second giv.
5296 v->new_reg will either be or refer to the register of the giv it
5299 Doing this clearing avoids problems in biv elimination where
5300 a giv's new_reg is a complex value that can't be put in the
5301 insn but the giv combined with (with a reg as new_reg) is
5302 marked maybe_dead. Since the register will be used in either
5303 case, we'd prefer it be used from the simpler giv. */
5305 for (v = bl->giv; v; v = v->next_iv)
5306 if (! v->maybe_dead && v->same)
5307 v->same->maybe_dead = 0;
5309 /* Try to eliminate the biv, if it is a candidate.
5310 This won't work if ! bl->all_reduced,
5311 since the givs we planned to use might not have been reduced.
5313 We have to be careful that we didn't initially think we could
5314 eliminate this biv because of a giv that we now think may be
5315 dead and shouldn't be used as a biv replacement.
5317 Also, there is the possibility that we may have a giv that looks
5318 like it can be used to eliminate a biv, but the resulting insn
5319 isn't valid. This can happen, for example, on the 88k, where a
5320 JUMP_INSN can compare a register only with zero. Attempts to
5321 replace it with a compare with a constant will fail.
5323 Note that in cases where this call fails, we may have replaced some
5324 of the occurrences of the biv with a giv, but no harm was done in
5325 doing so in the rare cases where it can occur. */
5327 if (bl->all_reduced == 1 && bl->eliminable
5328 && maybe_eliminate_biv (loop, bl, 1, threshold, insn_count))
5330 /* ?? If we created a new test to bypass the loop entirely,
5331 or otherwise drop straight in, based on this test, then
5332 we might want to rewrite it also. This way some later
5333 pass has more hope of removing the initialization of this
5336 /* If final_value != 0, then the biv may be used after loop end
5337 and we must emit an insn to set it just in case.
5339 Reversed bivs already have an insn after the loop setting their
5340 value, so we don't need another one. We can't calculate the
5341 proper final value for such a biv here anyways. */
5342 if (bl->final_value && ! bl->reversed)
5343 loop_insn_sink_or_swim (loop,
5344 gen_load_of_final_value (bl->biv->dest_reg,
5347 if (loop_dump_stream)
5348 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
5351 /* See above note wrt final_value. But since we couldn't eliminate
5352 the biv, we must set the value after the loop instead of before. */
5353 else if (bl->final_value && ! bl->reversed)
5354 loop_insn_sink (loop, gen_load_of_final_value (bl->biv->dest_reg,
5358 /* Go through all the instructions in the loop, making all the
5359 register substitutions scheduled in REG_MAP. */
5361 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
5362 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5363 || GET_CODE (p) == CALL_INSN)
5365 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
5366 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
5370 if (loop_info->n_iterations > 0)
5372 /* When we completely unroll a loop we will likely not need the increment
5373 of the loop BIV and we will not need the conditional branch at the
5375 unrolled_insn_copies = insn_count - 2;
5378 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
5379 need the comparison before the conditional branch at the end of the
5381 unrolled_insn_copies -= 1;
5384 /* We'll need one copy for each loop iteration. */
5385 unrolled_insn_copies *= loop_info->n_iterations;
5387 /* A little slop to account for the ability to remove initialization
5388 code, better CSE, and other secondary benefits of completely
5389 unrolling some loops. */
5390 unrolled_insn_copies -= 1;
5392 /* Clamp the value. */
5393 if (unrolled_insn_copies < 0)
5394 unrolled_insn_copies = 0;
5397 /* Unroll loops from within strength reduction so that we can use the
5398 induction variable information that strength_reduce has already
5399 collected. Always unroll loops that would be as small or smaller
5400 unrolled than when rolled. */
5401 if ((flags & LOOP_UNROLL)
5402 || ((flags & LOOP_AUTO_UNROLL)
5403 && loop_info->n_iterations > 0
5404 && unrolled_insn_copies <= insn_count))
5405 unroll_loop (loop, insn_count, 1);
5407 #ifdef HAVE_doloop_end
5408 if (HAVE_doloop_end && (flags & LOOP_BCT) && flag_branch_on_count_reg)
5409 doloop_optimize (loop);
5410 #endif /* HAVE_doloop_end */
5412 /* In case number of iterations is known, drop branch prediction note
5413 in the branch. Do that only in second loop pass, as loop unrolling
5414 may change the number of iterations performed. */
5415 if (flags & LOOP_BCT)
5417 unsigned HOST_WIDE_INT n
5418 = loop_info->n_iterations / loop_info->unroll_number;
5420 predict_insn (prev_nonnote_insn (loop->end), PRED_LOOP_ITERATIONS,
5421 REG_BR_PROB_BASE - REG_BR_PROB_BASE / n);
5424 if (loop_dump_stream)
5425 fprintf (loop_dump_stream, "\n");
5427 loop_ivs_free (loop);
5432 /*Record all basic induction variables calculated in the insn. */
5434 check_insn_for_bivs (loop, p, not_every_iteration, maybe_multiple)
5437 int not_every_iteration;
5440 struct loop_ivs *ivs = LOOP_IVS (loop);
5447 if (GET_CODE (p) == INSN
5448 && (set = single_set (p))
5449 && GET_CODE (SET_DEST (set)) == REG)
5451 dest_reg = SET_DEST (set);
5452 if (REGNO (dest_reg) < max_reg_before_loop
5453 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
5454 && REG_IV_TYPE (ivs, REGNO (dest_reg)) != NOT_BASIC_INDUCT)
5456 if (basic_induction_var (loop, SET_SRC (set),
5457 GET_MODE (SET_SRC (set)),
5458 dest_reg, p, &inc_val, &mult_val,
5461 /* It is a possible basic induction variable.
5462 Create and initialize an induction structure for it. */
5465 = (struct induction *) xmalloc (sizeof (struct induction));
5467 record_biv (loop, v, p, dest_reg, inc_val, mult_val, location,
5468 not_every_iteration, maybe_multiple);
5469 REG_IV_TYPE (ivs, REGNO (dest_reg)) = BASIC_INDUCT;
5471 else if (REGNO (dest_reg) < ivs->n_regs)
5472 REG_IV_TYPE (ivs, REGNO (dest_reg)) = NOT_BASIC_INDUCT;
5478 /* Record all givs calculated in the insn.
5479 A register is a giv if: it is only set once, it is a function of a
5480 biv and a constant (or invariant), and it is not a biv. */
5482 check_insn_for_givs (loop, p, not_every_iteration, maybe_multiple)
5485 int not_every_iteration;
5488 struct loop_regs *regs = LOOP_REGS (loop);
5491 /* Look for a general induction variable in a register. */
5492 if (GET_CODE (p) == INSN
5493 && (set = single_set (p))
5494 && GET_CODE (SET_DEST (set)) == REG
5495 && ! regs->array[REGNO (SET_DEST (set))].may_not_optimize)
5504 rtx last_consec_insn;
5506 dest_reg = SET_DEST (set);
5507 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
5510 if (/* SET_SRC is a giv. */
5511 (general_induction_var (loop, SET_SRC (set), &src_reg, &add_val,
5512 &mult_val, &ext_val, 0, &benefit, VOIDmode)
5513 /* Equivalent expression is a giv. */
5514 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
5515 && general_induction_var (loop, XEXP (regnote, 0), &src_reg,
5516 &add_val, &mult_val, &ext_val, 0,
5517 &benefit, VOIDmode)))
5518 /* Don't try to handle any regs made by loop optimization.
5519 We have nothing on them in regno_first_uid, etc. */
5520 && REGNO (dest_reg) < max_reg_before_loop
5521 /* Don't recognize a BASIC_INDUCT_VAR here. */
5522 && dest_reg != src_reg
5523 /* This must be the only place where the register is set. */
5524 && (regs->array[REGNO (dest_reg)].n_times_set == 1
5525 /* or all sets must be consecutive and make a giv. */
5526 || (benefit = consec_sets_giv (loop, benefit, p,
5528 &add_val, &mult_val, &ext_val,
5529 &last_consec_insn))))
5532 = (struct induction *) xmalloc (sizeof (struct induction));
5534 /* If this is a library call, increase benefit. */
5535 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
5536 benefit += libcall_benefit (p);
5538 /* Skip the consecutive insns, if there are any. */
5539 if (regs->array[REGNO (dest_reg)].n_times_set != 1)
5540 p = last_consec_insn;
5542 record_giv (loop, v, p, src_reg, dest_reg, mult_val, add_val,
5543 ext_val, benefit, DEST_REG, not_every_iteration,
5544 maybe_multiple, (rtx*) 0);
5549 #ifndef DONT_REDUCE_ADDR
5550 /* Look for givs which are memory addresses. */
5551 /* This resulted in worse code on a VAX 8600. I wonder if it
5553 if (GET_CODE (p) == INSN)
5554 find_mem_givs (loop, PATTERN (p), p, not_every_iteration,
5558 /* Update the status of whether giv can derive other givs. This can
5559 change when we pass a label or an insn that updates a biv. */
5560 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5561 || GET_CODE (p) == CODE_LABEL)
5562 update_giv_derive (loop, p);
5566 /* Return 1 if X is a valid source for an initial value (or as value being
5567 compared against in an initial test).
5569 X must be either a register or constant and must not be clobbered between
5570 the current insn and the start of the loop.
5572 INSN is the insn containing X. */
5575 valid_initial_value_p (x, insn, call_seen, loop_start)
5584 /* Only consider pseudos we know about initialized in insns whose luids
5586 if (GET_CODE (x) != REG
5587 || REGNO (x) >= max_reg_before_loop)
5590 /* Don't use call-clobbered registers across a call which clobbers it. On
5591 some machines, don't use any hard registers at all. */
5592 if (REGNO (x) < FIRST_PSEUDO_REGISTER
5593 && (SMALL_REGISTER_CLASSES
5594 || (call_used_regs[REGNO (x)] && call_seen)))
5597 /* Don't use registers that have been clobbered before the start of the
5599 if (reg_set_between_p (x, insn, loop_start))
5605 /* Scan X for memory refs and check each memory address
5606 as a possible giv. INSN is the insn whose pattern X comes from.
5607 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5608 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
5609 more than once in each loop iteration. */
5612 find_mem_givs (loop, x, insn, not_every_iteration, maybe_multiple)
5613 const struct loop *loop;
5616 int not_every_iteration, maybe_multiple;
5625 code = GET_CODE (x);
5650 /* This code used to disable creating GIVs with mult_val == 1 and
5651 add_val == 0. However, this leads to lost optimizations when
5652 it comes time to combine a set of related DEST_ADDR GIVs, since
5653 this one would not be seen. */
5655 if (general_induction_var (loop, XEXP (x, 0), &src_reg, &add_val,
5656 &mult_val, &ext_val, 1, &benefit,
5659 /* Found one; record it. */
5661 = (struct induction *) xmalloc (sizeof (struct induction));
5663 record_giv (loop, v, insn, src_reg, addr_placeholder, mult_val,
5664 add_val, ext_val, benefit, DEST_ADDR,
5665 not_every_iteration, maybe_multiple, &XEXP (x, 0));
5676 /* Recursively scan the subexpressions for other mem refs. */
5678 fmt = GET_RTX_FORMAT (code);
5679 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5681 find_mem_givs (loop, XEXP (x, i), insn, not_every_iteration,
5683 else if (fmt[i] == 'E')
5684 for (j = 0; j < XVECLEN (x, i); j++)
5685 find_mem_givs (loop, XVECEXP (x, i, j), insn, not_every_iteration,
5689 /* Fill in the data about one biv update.
5690 V is the `struct induction' in which we record the biv. (It is
5691 allocated by the caller, with alloca.)
5692 INSN is the insn that sets it.
5693 DEST_REG is the biv's reg.
5695 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5696 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5697 being set to INC_VAL.
5699 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5700 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5701 can be executed more than once per iteration. If MAYBE_MULTIPLE
5702 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5703 executed exactly once per iteration. */
5706 record_biv (loop, v, insn, dest_reg, inc_val, mult_val, location,
5707 not_every_iteration, maybe_multiple)
5709 struct induction *v;
5715 int not_every_iteration;
5718 struct loop_ivs *ivs = LOOP_IVS (loop);
5719 struct iv_class *bl;
5722 v->src_reg = dest_reg;
5723 v->dest_reg = dest_reg;
5724 v->mult_val = mult_val;
5725 v->add_val = inc_val;
5726 v->ext_dependent = NULL_RTX;
5727 v->location = location;
5728 v->mode = GET_MODE (dest_reg);
5729 v->always_computable = ! not_every_iteration;
5730 v->always_executed = ! not_every_iteration;
5731 v->maybe_multiple = maybe_multiple;
5734 /* Add this to the reg's iv_class, creating a class
5735 if this is the first incrementation of the reg. */
5737 bl = REG_IV_CLASS (ivs, REGNO (dest_reg));
5740 /* Create and initialize new iv_class. */
5742 bl = (struct iv_class *) xmalloc (sizeof (struct iv_class));
5744 bl->regno = REGNO (dest_reg);
5750 /* Set initial value to the reg itself. */
5751 bl->initial_value = dest_reg;
5752 bl->final_value = 0;
5753 /* We haven't seen the initializing insn yet */
5756 bl->initial_test = 0;
5757 bl->incremented = 0;
5761 bl->total_benefit = 0;
5763 /* Add this class to ivs->list. */
5764 bl->next = ivs->list;
5767 /* Put it in the array of biv register classes. */
5768 REG_IV_CLASS (ivs, REGNO (dest_reg)) = bl;
5772 /* Check if location is the same as a previous one. */
5773 struct induction *induction;
5774 for (induction = bl->biv; induction; induction = induction->next_iv)
5775 if (location == induction->location)
5777 v->same = induction;
5782 /* Update IV_CLASS entry for this biv. */
5783 v->next_iv = bl->biv;
5786 if (mult_val == const1_rtx)
5787 bl->incremented = 1;
5789 if (loop_dump_stream)
5790 loop_biv_dump (v, loop_dump_stream, 0);
5793 /* Fill in the data about one giv.
5794 V is the `struct induction' in which we record the giv. (It is
5795 allocated by the caller, with alloca.)
5796 INSN is the insn that sets it.
5797 BENEFIT estimates the savings from deleting this insn.
5798 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5799 into a register or is used as a memory address.
5801 SRC_REG is the biv reg which the giv is computed from.
5802 DEST_REG is the giv's reg (if the giv is stored in a reg).
5803 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5804 LOCATION points to the place where this giv's value appears in INSN. */
5807 record_giv (loop, v, insn, src_reg, dest_reg, mult_val, add_val, ext_val,
5808 benefit, type, not_every_iteration, maybe_multiple, location)
5809 const struct loop *loop;
5810 struct induction *v;
5814 rtx mult_val, add_val, ext_val;
5817 int not_every_iteration, maybe_multiple;
5820 struct loop_ivs *ivs = LOOP_IVS (loop);
5821 struct induction *b;
5822 struct iv_class *bl;
5823 rtx set = single_set (insn);
5826 /* Attempt to prove constantness of the values. Don't let simplify_rtx
5827 undo the MULT canonicalization that we performed earlier. */
5828 temp = simplify_rtx (add_val);
5830 && ! (GET_CODE (add_val) == MULT
5831 && GET_CODE (temp) == ASHIFT))
5835 v->src_reg = src_reg;
5837 v->dest_reg = dest_reg;
5838 v->mult_val = mult_val;
5839 v->add_val = add_val;
5840 v->ext_dependent = ext_val;
5841 v->benefit = benefit;
5842 v->location = location;
5844 v->combined_with = 0;
5845 v->maybe_multiple = maybe_multiple;
5847 v->derive_adjustment = 0;
5853 v->auto_inc_opt = 0;
5857 /* The v->always_computable field is used in update_giv_derive, to
5858 determine whether a giv can be used to derive another giv. For a
5859 DEST_REG giv, INSN computes a new value for the giv, so its value
5860 isn't computable if INSN insn't executed every iteration.
5861 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5862 it does not compute a new value. Hence the value is always computable
5863 regardless of whether INSN is executed each iteration. */
5865 if (type == DEST_ADDR)
5866 v->always_computable = 1;
5868 v->always_computable = ! not_every_iteration;
5870 v->always_executed = ! not_every_iteration;
5872 if (type == DEST_ADDR)
5874 v->mode = GET_MODE (*location);
5877 else /* type == DEST_REG */
5879 v->mode = GET_MODE (SET_DEST (set));
5881 v->lifetime = LOOP_REG_LIFETIME (loop, REGNO (dest_reg));
5883 /* If the lifetime is zero, it means that this register is
5884 really a dead store. So mark this as a giv that can be
5885 ignored. This will not prevent the biv from being eliminated. */
5886 if (v->lifetime == 0)
5889 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
5890 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
5893 /* Add the giv to the class of givs computed from one biv. */
5895 bl = REG_IV_CLASS (ivs, REGNO (src_reg));
5898 v->next_iv = bl->giv;
5900 /* Don't count DEST_ADDR. This is supposed to count the number of
5901 insns that calculate givs. */
5902 if (type == DEST_REG)
5904 bl->total_benefit += benefit;
5907 /* Fatal error, biv missing for this giv? */
5910 if (type == DEST_ADDR)
5913 v->not_replaceable = 0;
5917 /* The giv can be replaced outright by the reduced register only if all
5918 of the following conditions are true:
5919 - the insn that sets the giv is always executed on any iteration
5920 on which the giv is used at all
5921 (there are two ways to deduce this:
5922 either the insn is executed on every iteration,
5923 or all uses follow that insn in the same basic block),
5924 - the giv is not used outside the loop
5925 - no assignments to the biv occur during the giv's lifetime. */
5927 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5928 /* Previous line always fails if INSN was moved by loop opt. */
5929 && REGNO_LAST_LUID (REGNO (dest_reg))
5930 < INSN_LUID (loop->end)
5931 && (! not_every_iteration
5932 || last_use_this_basic_block (dest_reg, insn)))
5934 /* Now check that there are no assignments to the biv within the
5935 giv's lifetime. This requires two separate checks. */
5937 /* Check each biv update, and fail if any are between the first
5938 and last use of the giv.
5940 If this loop contains an inner loop that was unrolled, then
5941 the insn modifying the biv may have been emitted by the loop
5942 unrolling code, and hence does not have a valid luid. Just
5943 mark the biv as not replaceable in this case. It is not very
5944 useful as a biv, because it is used in two different loops.
5945 It is very unlikely that we would be able to optimize the giv
5946 using this biv anyways. */
5949 v->not_replaceable = 0;
5950 for (b = bl->biv; b; b = b->next_iv)
5952 if (INSN_UID (b->insn) >= max_uid_for_loop
5953 || ((INSN_LUID (b->insn)
5954 >= REGNO_FIRST_LUID (REGNO (dest_reg)))
5955 && (INSN_LUID (b->insn)
5956 <= REGNO_LAST_LUID (REGNO (dest_reg)))))
5959 v->not_replaceable = 1;
5964 /* If there are any backwards branches that go from after the
5965 biv update to before it, then this giv is not replaceable. */
5967 for (b = bl->biv; b; b = b->next_iv)
5968 if (back_branch_in_range_p (loop, b->insn))
5971 v->not_replaceable = 1;
5977 /* May still be replaceable, we don't have enough info here to
5980 v->not_replaceable = 0;
5984 /* Record whether the add_val contains a const_int, for later use by
5989 v->no_const_addval = 1;
5990 if (tem == const0_rtx)
5992 else if (CONSTANT_P (add_val))
5993 v->no_const_addval = 0;
5994 if (GET_CODE (tem) == PLUS)
5998 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5999 tem = XEXP (tem, 0);
6000 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
6001 tem = XEXP (tem, 1);
6005 if (CONSTANT_P (XEXP (tem, 1)))
6006 v->no_const_addval = 0;
6010 if (loop_dump_stream)
6011 loop_giv_dump (v, loop_dump_stream, 0);
6014 /* All this does is determine whether a giv can be made replaceable because
6015 its final value can be calculated. This code can not be part of record_giv
6016 above, because final_giv_value requires that the number of loop iterations
6017 be known, and that can not be accurately calculated until after all givs
6018 have been identified. */
6021 check_final_value (loop, v)
6022 const struct loop *loop;
6023 struct induction *v;
6025 rtx final_value = 0;
6027 /* DEST_ADDR givs will never reach here, because they are always marked
6028 replaceable above in record_giv. */
6030 /* The giv can be replaced outright by the reduced register only if all
6031 of the following conditions are true:
6032 - the insn that sets the giv is always executed on any iteration
6033 on which the giv is used at all
6034 (there are two ways to deduce this:
6035 either the insn is executed on every iteration,
6036 or all uses follow that insn in the same basic block),
6037 - its final value can be calculated (this condition is different
6038 than the one above in record_giv)
6039 - it's not used before the it's set
6040 - no assignments to the biv occur during the giv's lifetime. */
6043 /* This is only called now when replaceable is known to be false. */
6044 /* Clear replaceable, so that it won't confuse final_giv_value. */
6048 if ((final_value = final_giv_value (loop, v))
6049 && (v->always_executed
6050 || last_use_this_basic_block (v->dest_reg, v->insn)))
6052 int biv_increment_seen = 0, before_giv_insn = 0;
6057 v->not_replaceable = 0;
6059 /* When trying to determine whether or not a biv increment occurs
6060 during the lifetime of the giv, we can ignore uses of the variable
6061 outside the loop because final_value is true. Hence we can not
6062 use regno_last_uid and regno_first_uid as above in record_giv. */
6064 /* Search the loop to determine whether any assignments to the
6065 biv occur during the giv's lifetime. Start with the insn
6066 that sets the giv, and search around the loop until we come
6067 back to that insn again.
6069 Also fail if there is a jump within the giv's lifetime that jumps
6070 to somewhere outside the lifetime but still within the loop. This
6071 catches spaghetti code where the execution order is not linear, and
6072 hence the above test fails. Here we assume that the giv lifetime
6073 does not extend from one iteration of the loop to the next, so as
6074 to make the test easier. Since the lifetime isn't known yet,
6075 this requires two loops. See also record_giv above. */
6077 last_giv_use = v->insn;
6084 before_giv_insn = 1;
6085 p = NEXT_INSN (loop->start);
6090 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
6091 || GET_CODE (p) == CALL_INSN)
6093 /* It is possible for the BIV increment to use the GIV if we
6094 have a cycle. Thus we must be sure to check each insn for
6095 both BIV and GIV uses, and we must check for BIV uses
6098 if (! biv_increment_seen
6099 && reg_set_p (v->src_reg, PATTERN (p)))
6100 biv_increment_seen = 1;
6102 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
6104 if (biv_increment_seen || before_giv_insn)
6107 v->not_replaceable = 1;
6115 /* Now that the lifetime of the giv is known, check for branches
6116 from within the lifetime to outside the lifetime if it is still
6126 p = NEXT_INSN (loop->start);
6127 if (p == last_giv_use)
6130 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
6131 && LABEL_NAME (JUMP_LABEL (p))
6132 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
6133 && loop_insn_first_p (loop->start, JUMP_LABEL (p)))
6134 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
6135 && loop_insn_first_p (JUMP_LABEL (p), loop->end))))
6138 v->not_replaceable = 1;
6140 if (loop_dump_stream)
6141 fprintf (loop_dump_stream,
6142 "Found branch outside giv lifetime.\n");
6149 /* If it is replaceable, then save the final value. */
6151 v->final_value = final_value;
6154 if (loop_dump_stream && v->replaceable)
6155 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
6156 INSN_UID (v->insn), REGNO (v->dest_reg));
6159 /* Update the status of whether a giv can derive other givs.
6161 We need to do something special if there is or may be an update to the biv
6162 between the time the giv is defined and the time it is used to derive
6165 In addition, a giv that is only conditionally set is not allowed to
6166 derive another giv once a label has been passed.
6168 The cases we look at are when a label or an update to a biv is passed. */
6171 update_giv_derive (loop, p)
6172 const struct loop *loop;
6175 struct loop_ivs *ivs = LOOP_IVS (loop);
6176 struct iv_class *bl;
6177 struct induction *biv, *giv;
6181 /* Search all IV classes, then all bivs, and finally all givs.
6183 There are three cases we are concerned with. First we have the situation
6184 of a giv that is only updated conditionally. In that case, it may not
6185 derive any givs after a label is passed.
6187 The second case is when a biv update occurs, or may occur, after the
6188 definition of a giv. For certain biv updates (see below) that are
6189 known to occur between the giv definition and use, we can adjust the
6190 giv definition. For others, or when the biv update is conditional,
6191 we must prevent the giv from deriving any other givs. There are two
6192 sub-cases within this case.
6194 If this is a label, we are concerned with any biv update that is done
6195 conditionally, since it may be done after the giv is defined followed by
6196 a branch here (actually, we need to pass both a jump and a label, but
6197 this extra tracking doesn't seem worth it).
6199 If this is a jump, we are concerned about any biv update that may be
6200 executed multiple times. We are actually only concerned about
6201 backward jumps, but it is probably not worth performing the test
6202 on the jump again here.
6204 If this is a biv update, we must adjust the giv status to show that a
6205 subsequent biv update was performed. If this adjustment cannot be done,
6206 the giv cannot derive further givs. */
6208 for (bl = ivs->list; bl; bl = bl->next)
6209 for (biv = bl->biv; biv; biv = biv->next_iv)
6210 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
6213 for (giv = bl->giv; giv; giv = giv->next_iv)
6215 /* If cant_derive is already true, there is no point in
6216 checking all of these conditions again. */
6217 if (giv->cant_derive)
6220 /* If this giv is conditionally set and we have passed a label,
6221 it cannot derive anything. */
6222 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
6223 giv->cant_derive = 1;
6225 /* Skip givs that have mult_val == 0, since
6226 they are really invariants. Also skip those that are
6227 replaceable, since we know their lifetime doesn't contain
6229 else if (giv->mult_val == const0_rtx || giv->replaceable)
6232 /* The only way we can allow this giv to derive another
6233 is if this is a biv increment and we can form the product
6234 of biv->add_val and giv->mult_val. In this case, we will
6235 be able to compute a compensation. */
6236 else if (biv->insn == p)
6241 if (biv->mult_val == const1_rtx)
6242 tem = simplify_giv_expr (loop,
6243 gen_rtx_MULT (giv->mode,
6246 &ext_val_dummy, &dummy);
6248 if (tem && giv->derive_adjustment)
6249 tem = simplify_giv_expr
6251 gen_rtx_PLUS (giv->mode, tem, giv->derive_adjustment),
6252 &ext_val_dummy, &dummy);
6255 giv->derive_adjustment = tem;
6257 giv->cant_derive = 1;
6259 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
6260 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
6261 giv->cant_derive = 1;
6266 /* Check whether an insn is an increment legitimate for a basic induction var.
6267 X is the source of insn P, or a part of it.
6268 MODE is the mode in which X should be interpreted.
6270 DEST_REG is the putative biv, also the destination of the insn.
6271 We accept patterns of these forms:
6272 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
6273 REG = INVARIANT + REG
6275 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
6276 store the additive term into *INC_VAL, and store the place where
6277 we found the additive term into *LOCATION.
6279 If X is an assignment of an invariant into DEST_REG, we set
6280 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
6282 We also want to detect a BIV when it corresponds to a variable
6283 whose mode was promoted via PROMOTED_MODE. In that case, an increment
6284 of the variable may be a PLUS that adds a SUBREG of that variable to
6285 an invariant and then sign- or zero-extends the result of the PLUS
6288 Most GIVs in such cases will be in the promoted mode, since that is the
6289 probably the natural computation mode (and almost certainly the mode
6290 used for addresses) on the machine. So we view the pseudo-reg containing
6291 the variable as the BIV, as if it were simply incremented.
6293 Note that treating the entire pseudo as a BIV will result in making
6294 simple increments to any GIVs based on it. However, if the variable
6295 overflows in its declared mode but not its promoted mode, the result will
6296 be incorrect. This is acceptable if the variable is signed, since
6297 overflows in such cases are undefined, but not if it is unsigned, since
6298 those overflows are defined. So we only check for SIGN_EXTEND and
6301 If we cannot find a biv, we return 0. */
6304 basic_induction_var (loop, x, mode, dest_reg, p, inc_val, mult_val, location)
6305 const struct loop *loop;
6307 enum machine_mode mode;
6318 code = GET_CODE (x);
6323 if (rtx_equal_p (XEXP (x, 0), dest_reg)
6324 || (GET_CODE (XEXP (x, 0)) == SUBREG
6325 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
6326 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
6328 argp = &XEXP (x, 1);
6330 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
6331 || (GET_CODE (XEXP (x, 1)) == SUBREG
6332 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
6333 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
6335 argp = &XEXP (x, 0);
6341 if (loop_invariant_p (loop, arg) != 1)
6344 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
6345 *mult_val = const1_rtx;
6350 /* If what's inside the SUBREG is a BIV, then the SUBREG. This will
6351 handle addition of promoted variables.
6352 ??? The comment at the start of this function is wrong: promoted
6353 variable increments don't look like it says they do. */
6354 return basic_induction_var (loop, SUBREG_REG (x),
6355 GET_MODE (SUBREG_REG (x)),
6356 dest_reg, p, inc_val, mult_val, location);
6359 /* If this register is assigned in a previous insn, look at its
6360 source, but don't go outside the loop or past a label. */
6362 /* If this sets a register to itself, we would repeat any previous
6363 biv increment if we applied this strategy blindly. */
6364 if (rtx_equal_p (dest_reg, x))
6373 insn = PREV_INSN (insn);
6375 while (insn && GET_CODE (insn) == NOTE
6376 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6380 set = single_set (insn);
6383 dest = SET_DEST (set);
6385 || (GET_CODE (dest) == SUBREG
6386 && (GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD)
6387 && (GET_MODE_CLASS (GET_MODE (dest)) == MODE_INT)
6388 && SUBREG_REG (dest) == x))
6389 return basic_induction_var (loop, SET_SRC (set),
6390 (GET_MODE (SET_SRC (set)) == VOIDmode
6392 : GET_MODE (SET_SRC (set))),
6394 inc_val, mult_val, location);
6396 while (GET_CODE (dest) == SIGN_EXTRACT
6397 || GET_CODE (dest) == ZERO_EXTRACT
6398 || GET_CODE (dest) == SUBREG
6399 || GET_CODE (dest) == STRICT_LOW_PART)
6400 dest = XEXP (dest, 0);
6406 /* Can accept constant setting of biv only when inside inner most loop.
6407 Otherwise, a biv of an inner loop may be incorrectly recognized
6408 as a biv of the outer loop,
6409 causing code to be moved INTO the inner loop. */
6411 if (loop_invariant_p (loop, x) != 1)
6416 /* convert_modes aborts if we try to convert to or from CCmode, so just
6417 exclude that case. It is very unlikely that a condition code value
6418 would be a useful iterator anyways. convert_modes aborts if we try to
6419 convert a float mode to non-float or vice versa too. */
6420 if (loop->level == 1
6421 && GET_MODE_CLASS (mode) == GET_MODE_CLASS (GET_MODE (dest_reg))
6422 && GET_MODE_CLASS (mode) != MODE_CC)
6424 /* Possible bug here? Perhaps we don't know the mode of X. */
6425 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
6426 *mult_val = const0_rtx;
6433 return basic_induction_var (loop, XEXP (x, 0), GET_MODE (XEXP (x, 0)),
6434 dest_reg, p, inc_val, mult_val, location);
6437 /* Similar, since this can be a sign extension. */
6438 for (insn = PREV_INSN (p);
6439 (insn && GET_CODE (insn) == NOTE
6440 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6441 insn = PREV_INSN (insn))
6445 set = single_set (insn);
6447 if (! rtx_equal_p (dest_reg, XEXP (x, 0))
6448 && set && SET_DEST (set) == XEXP (x, 0)
6449 && GET_CODE (XEXP (x, 1)) == CONST_INT
6450 && INTVAL (XEXP (x, 1)) >= 0
6451 && GET_CODE (SET_SRC (set)) == ASHIFT
6452 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
6453 return basic_induction_var (loop, XEXP (SET_SRC (set), 0),
6454 GET_MODE (XEXP (x, 0)),
6455 dest_reg, insn, inc_val, mult_val,
6464 /* A general induction variable (giv) is any quantity that is a linear
6465 function of a basic induction variable,
6466 i.e. giv = biv * mult_val + add_val.
6467 The coefficients can be any loop invariant quantity.
6468 A giv need not be computed directly from the biv;
6469 it can be computed by way of other givs. */
6471 /* Determine whether X computes a giv.
6472 If it does, return a nonzero value
6473 which is the benefit from eliminating the computation of X;
6474 set *SRC_REG to the register of the biv that it is computed from;
6475 set *ADD_VAL and *MULT_VAL to the coefficients,
6476 such that the value of X is biv * mult + add; */
6479 general_induction_var (loop, x, src_reg, add_val, mult_val, ext_val,
6480 is_addr, pbenefit, addr_mode)
6481 const struct loop *loop;
6489 enum machine_mode addr_mode;
6491 struct loop_ivs *ivs = LOOP_IVS (loop);
6494 /* If this is an invariant, forget it, it isn't a giv. */
6495 if (loop_invariant_p (loop, x) == 1)
6499 *ext_val = NULL_RTX;
6500 x = simplify_giv_expr (loop, x, ext_val, pbenefit);
6504 switch (GET_CODE (x))
6508 /* Since this is now an invariant and wasn't before, it must be a giv
6509 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6511 *src_reg = ivs->list->biv->dest_reg;
6512 *mult_val = const0_rtx;
6517 /* This is equivalent to a BIV. */
6519 *mult_val = const1_rtx;
6520 *add_val = const0_rtx;
6524 /* Either (plus (biv) (invar)) or
6525 (plus (mult (biv) (invar_1)) (invar_2)). */
6526 if (GET_CODE (XEXP (x, 0)) == MULT)
6528 *src_reg = XEXP (XEXP (x, 0), 0);
6529 *mult_val = XEXP (XEXP (x, 0), 1);
6533 *src_reg = XEXP (x, 0);
6534 *mult_val = const1_rtx;
6536 *add_val = XEXP (x, 1);
6540 /* ADD_VAL is zero. */
6541 *src_reg = XEXP (x, 0);
6542 *mult_val = XEXP (x, 1);
6543 *add_val = const0_rtx;
6550 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6551 unless they are CONST_INT). */
6552 if (GET_CODE (*add_val) == USE)
6553 *add_val = XEXP (*add_val, 0);
6554 if (GET_CODE (*mult_val) == USE)
6555 *mult_val = XEXP (*mult_val, 0);
6558 *pbenefit += address_cost (orig_x, addr_mode) - reg_address_cost;
6560 *pbenefit += rtx_cost (orig_x, SET);
6562 /* Always return true if this is a giv so it will be detected as such,
6563 even if the benefit is zero or negative. This allows elimination
6564 of bivs that might otherwise not be eliminated. */
6568 /* Given an expression, X, try to form it as a linear function of a biv.
6569 We will canonicalize it to be of the form
6570 (plus (mult (BIV) (invar_1))
6572 with possible degeneracies.
6574 The invariant expressions must each be of a form that can be used as a
6575 machine operand. We surround then with a USE rtx (a hack, but localized
6576 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6577 routine; it is the caller's responsibility to strip them.
6579 If no such canonicalization is possible (i.e., two biv's are used or an
6580 expression that is neither invariant nor a biv or giv), this routine
6583 For a nonzero return, the result will have a code of CONST_INT, USE,
6584 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6586 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6588 static rtx sge_plus PARAMS ((enum machine_mode, rtx, rtx));
6589 static rtx sge_plus_constant PARAMS ((rtx, rtx));
6592 simplify_giv_expr (loop, x, ext_val, benefit)
6593 const struct loop *loop;
6598 struct loop_ivs *ivs = LOOP_IVS (loop);
6599 struct loop_regs *regs = LOOP_REGS (loop);
6600 enum machine_mode mode = GET_MODE (x);
6604 /* If this is not an integer mode, or if we cannot do arithmetic in this
6605 mode, this can't be a giv. */
6606 if (mode != VOIDmode
6607 && (GET_MODE_CLASS (mode) != MODE_INT
6608 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
6611 switch (GET_CODE (x))
6614 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6615 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
6616 if (arg0 == 0 || arg1 == 0)
6619 /* Put constant last, CONST_INT last if both constant. */
6620 if ((GET_CODE (arg0) == USE
6621 || GET_CODE (arg0) == CONST_INT)
6622 && ! ((GET_CODE (arg0) == USE
6623 && GET_CODE (arg1) == USE)
6624 || GET_CODE (arg1) == CONST_INT))
6625 tem = arg0, arg0 = arg1, arg1 = tem;
6627 /* Handle addition of zero, then addition of an invariant. */
6628 if (arg1 == const0_rtx)
6630 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
6631 switch (GET_CODE (arg0))
6635 /* Adding two invariants must result in an invariant, so enclose
6636 addition operation inside a USE and return it. */
6637 if (GET_CODE (arg0) == USE)
6638 arg0 = XEXP (arg0, 0);
6639 if (GET_CODE (arg1) == USE)
6640 arg1 = XEXP (arg1, 0);
6642 if (GET_CODE (arg0) == CONST_INT)
6643 tem = arg0, arg0 = arg1, arg1 = tem;
6644 if (GET_CODE (arg1) == CONST_INT)
6645 tem = sge_plus_constant (arg0, arg1);
6647 tem = sge_plus (mode, arg0, arg1);
6649 if (GET_CODE (tem) != CONST_INT)
6650 tem = gen_rtx_USE (mode, tem);
6655 /* biv + invar or mult + invar. Return sum. */
6656 return gen_rtx_PLUS (mode, arg0, arg1);
6659 /* (a + invar_1) + invar_2. Associate. */
6661 simplify_giv_expr (loop,
6673 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6674 MULT to reduce cases. */
6675 if (GET_CODE (arg0) == REG)
6676 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
6677 if (GET_CODE (arg1) == REG)
6678 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
6680 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6681 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6682 Recurse to associate the second PLUS. */
6683 if (GET_CODE (arg1) == MULT)
6684 tem = arg0, arg0 = arg1, arg1 = tem;
6686 if (GET_CODE (arg1) == PLUS)
6688 simplify_giv_expr (loop,
6690 gen_rtx_PLUS (mode, arg0,
6695 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6696 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
6699 if (!rtx_equal_p (arg0, arg1))
6702 return simplify_giv_expr (loop,
6711 /* Handle "a - b" as "a + b * (-1)". */
6712 return simplify_giv_expr (loop,
6721 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6722 arg1 = simplify_giv_expr (loop, XEXP (x, 1), ext_val, benefit);
6723 if (arg0 == 0 || arg1 == 0)
6726 /* Put constant last, CONST_INT last if both constant. */
6727 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
6728 && GET_CODE (arg1) != CONST_INT)
6729 tem = arg0, arg0 = arg1, arg1 = tem;
6731 /* If second argument is not now constant, not giv. */
6732 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
6735 /* Handle multiply by 0 or 1. */
6736 if (arg1 == const0_rtx)
6739 else if (arg1 == const1_rtx)
6742 switch (GET_CODE (arg0))
6745 /* biv * invar. Done. */
6746 return gen_rtx_MULT (mode, arg0, arg1);
6749 /* Product of two constants. */
6750 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6753 /* invar * invar is a giv, but attempt to simplify it somehow. */
6754 if (GET_CODE (arg1) != CONST_INT)
6757 arg0 = XEXP (arg0, 0);
6758 if (GET_CODE (arg0) == MULT)
6760 /* (invar_0 * invar_1) * invar_2. Associate. */
6761 return simplify_giv_expr (loop,
6770 /* Propagate the MULT expressions to the intermost nodes. */
6771 else if (GET_CODE (arg0) == PLUS)
6773 /* (invar_0 + invar_1) * invar_2. Distribute. */
6774 return simplify_giv_expr (loop,
6786 return gen_rtx_USE (mode, gen_rtx_MULT (mode, arg0, arg1));
6789 /* (a * invar_1) * invar_2. Associate. */
6790 return simplify_giv_expr (loop,
6799 /* (a + invar_1) * invar_2. Distribute. */
6800 return simplify_giv_expr (loop,
6815 /* Shift by constant is multiply by power of two. */
6816 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6820 simplify_giv_expr (loop,
6823 GEN_INT ((HOST_WIDE_INT) 1
6824 << INTVAL (XEXP (x, 1)))),
6828 /* "-a" is "a * (-1)" */
6829 return simplify_giv_expr (loop,
6830 gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6834 /* "~a" is "-a - 1". Silly, but easy. */
6835 return simplify_giv_expr (loop,
6836 gen_rtx_MINUS (mode,
6837 gen_rtx_NEG (mode, XEXP (x, 0)),
6842 /* Already in proper form for invariant. */
6848 /* Conditionally recognize extensions of simple IVs. After we've
6849 computed loop traversal counts and verified the range of the
6850 source IV, we'll reevaluate this as a GIV. */
6851 if (*ext_val == NULL_RTX)
6853 arg0 = simplify_giv_expr (loop, XEXP (x, 0), ext_val, benefit);
6854 if (arg0 && *ext_val == NULL_RTX && GET_CODE (arg0) == REG)
6856 *ext_val = gen_rtx_fmt_e (GET_CODE (x), mode, arg0);
6863 /* If this is a new register, we can't deal with it. */
6864 if (REGNO (x) >= max_reg_before_loop)
6867 /* Check for biv or giv. */
6868 switch (REG_IV_TYPE (ivs, REGNO (x)))
6872 case GENERAL_INDUCT:
6874 struct induction *v = REG_IV_INFO (ivs, REGNO (x));
6876 /* Form expression from giv and add benefit. Ensure this giv
6877 can derive another and subtract any needed adjustment if so. */
6879 /* Increasing the benefit here is risky. The only case in which it
6880 is arguably correct is if this is the only use of V. In other
6881 cases, this will artificially inflate the benefit of the current
6882 giv, and lead to suboptimal code. Thus, it is disabled, since
6883 potentially not reducing an only marginally beneficial giv is
6884 less harmful than reducing many givs that are not really
6887 rtx single_use = regs->array[REGNO (x)].single_usage;
6888 if (single_use && single_use != const0_rtx)
6889 *benefit += v->benefit;
6895 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode,
6896 v->src_reg, v->mult_val),
6899 if (v->derive_adjustment)
6900 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6901 arg0 = simplify_giv_expr (loop, tem, ext_val, benefit);
6904 if (!v->ext_dependent)
6909 *ext_val = v->ext_dependent;
6917 /* If it isn't an induction variable, and it is invariant, we
6918 may be able to simplify things further by looking through
6919 the bits we just moved outside the loop. */
6920 if (loop_invariant_p (loop, x) == 1)
6923 struct loop_movables *movables = LOOP_MOVABLES (loop);
6925 for (m = movables->head; m; m = m->next)
6926 if (rtx_equal_p (x, m->set_dest))
6928 /* Ok, we found a match. Substitute and simplify. */
6930 /* If we match another movable, we must use that, as
6931 this one is going away. */
6933 return simplify_giv_expr (loop, m->match->set_dest,
6936 /* If consec is nonzero, this is a member of a group of
6937 instructions that were moved together. We handle this
6938 case only to the point of seeking to the last insn and
6939 looking for a REG_EQUAL. Fail if we don't find one. */
6946 tem = NEXT_INSN (tem);
6950 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6952 tem = XEXP (tem, 0);
6956 tem = single_set (m->insn);
6958 tem = SET_SRC (tem);
6963 /* What we are most interested in is pointer
6964 arithmetic on invariants -- only take
6965 patterns we may be able to do something with. */
6966 if (GET_CODE (tem) == PLUS
6967 || GET_CODE (tem) == MULT
6968 || GET_CODE (tem) == ASHIFT
6969 || GET_CODE (tem) == CONST_INT
6970 || GET_CODE (tem) == SYMBOL_REF)
6972 tem = simplify_giv_expr (loop, tem, ext_val,
6977 else if (GET_CODE (tem) == CONST
6978 && GET_CODE (XEXP (tem, 0)) == PLUS
6979 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6980 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6982 tem = simplify_giv_expr (loop, XEXP (tem, 0),
6994 /* Fall through to general case. */
6996 /* If invariant, return as USE (unless CONST_INT).
6997 Otherwise, not giv. */
6998 if (GET_CODE (x) == USE)
7001 if (loop_invariant_p (loop, x) == 1)
7003 if (GET_CODE (x) == CONST_INT)
7005 if (GET_CODE (x) == CONST
7006 && GET_CODE (XEXP (x, 0)) == PLUS
7007 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
7008 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
7010 return gen_rtx_USE (mode, x);
7017 /* This routine folds invariants such that there is only ever one
7018 CONST_INT in the summation. It is only used by simplify_giv_expr. */
7021 sge_plus_constant (x, c)
7024 if (GET_CODE (x) == CONST_INT)
7025 return GEN_INT (INTVAL (x) + INTVAL (c));
7026 else if (GET_CODE (x) != PLUS)
7027 return gen_rtx_PLUS (GET_MODE (x), x, c);
7028 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
7030 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
7031 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
7033 else if (GET_CODE (XEXP (x, 0)) == PLUS
7034 || GET_CODE (XEXP (x, 1)) != PLUS)
7036 return gen_rtx_PLUS (GET_MODE (x),
7037 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
7041 return gen_rtx_PLUS (GET_MODE (x),
7042 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
7047 sge_plus (mode, x, y)
7048 enum machine_mode mode;
7051 while (GET_CODE (y) == PLUS)
7053 rtx a = XEXP (y, 0);
7054 if (GET_CODE (a) == CONST_INT)
7055 x = sge_plus_constant (x, a);
7057 x = gen_rtx_PLUS (mode, x, a);
7060 if (GET_CODE (y) == CONST_INT)
7061 x = sge_plus_constant (x, y);
7063 x = gen_rtx_PLUS (mode, x, y);
7067 /* Help detect a giv that is calculated by several consecutive insns;
7071 The caller has already identified the first insn P as having a giv as dest;
7072 we check that all other insns that set the same register follow
7073 immediately after P, that they alter nothing else,
7074 and that the result of the last is still a giv.
7076 The value is 0 if the reg set in P is not really a giv.
7077 Otherwise, the value is the amount gained by eliminating
7078 all the consecutive insns that compute the value.
7080 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
7081 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
7083 The coefficients of the ultimate giv value are stored in
7084 *MULT_VAL and *ADD_VAL. */
7087 consec_sets_giv (loop, first_benefit, p, src_reg, dest_reg,
7088 add_val, mult_val, ext_val, last_consec_insn)
7089 const struct loop *loop;
7097 rtx *last_consec_insn;
7099 struct loop_ivs *ivs = LOOP_IVS (loop);
7100 struct loop_regs *regs = LOOP_REGS (loop);
7107 /* Indicate that this is a giv so that we can update the value produced in
7108 each insn of the multi-insn sequence.
7110 This induction structure will be used only by the call to
7111 general_induction_var below, so we can allocate it on our stack.
7112 If this is a giv, our caller will replace the induct var entry with
7113 a new induction structure. */
7114 struct induction *v;
7116 if (REG_IV_TYPE (ivs, REGNO (dest_reg)) != UNKNOWN_INDUCT)
7119 v = (struct induction *) alloca (sizeof (struct induction));
7120 v->src_reg = src_reg;
7121 v->mult_val = *mult_val;
7122 v->add_val = *add_val;
7123 v->benefit = first_benefit;
7125 v->derive_adjustment = 0;
7126 v->ext_dependent = NULL_RTX;
7128 REG_IV_TYPE (ivs, REGNO (dest_reg)) = GENERAL_INDUCT;
7129 REG_IV_INFO (ivs, REGNO (dest_reg)) = v;
7131 count = regs->array[REGNO (dest_reg)].n_times_set - 1;
7136 code = GET_CODE (p);
7138 /* If libcall, skip to end of call sequence. */
7139 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
7143 && (set = single_set (p))
7144 && GET_CODE (SET_DEST (set)) == REG
7145 && SET_DEST (set) == dest_reg
7146 && (general_induction_var (loop, SET_SRC (set), &src_reg,
7147 add_val, mult_val, ext_val, 0,
7149 /* Giv created by equivalent expression. */
7150 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
7151 && general_induction_var (loop, XEXP (temp, 0), &src_reg,
7152 add_val, mult_val, ext_val, 0,
7153 &benefit, VOIDmode)))
7154 && src_reg == v->src_reg)
7156 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
7157 benefit += libcall_benefit (p);
7160 v->mult_val = *mult_val;
7161 v->add_val = *add_val;
7162 v->benefit += benefit;
7164 else if (code != NOTE)
7166 /* Allow insns that set something other than this giv to a
7167 constant. Such insns are needed on machines which cannot
7168 include long constants and should not disqualify a giv. */
7170 && (set = single_set (p))
7171 && SET_DEST (set) != dest_reg
7172 && CONSTANT_P (SET_SRC (set)))
7175 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
7180 REG_IV_TYPE (ivs, REGNO (dest_reg)) = UNKNOWN_INDUCT;
7181 *last_consec_insn = p;
7185 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7186 represented by G1. If no such expression can be found, or it is clear that
7187 it cannot possibly be a valid address, 0 is returned.
7189 To perform the computation, we note that
7192 where `v' is the biv.
7194 So G2 = (y/b) * G1 + (b - a*y/x).
7196 Note that MULT = y/x.
7198 Update: A and B are now allowed to be additive expressions such that
7199 B contains all variables in A. That is, computing B-A will not require
7200 subtracting variables. */
7203 express_from_1 (a, b, mult)
7206 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
7208 if (mult == const0_rtx)
7211 /* If MULT is not 1, we cannot handle A with non-constants, since we
7212 would then be required to subtract multiples of the registers in A.
7213 This is theoretically possible, and may even apply to some Fortran
7214 constructs, but it is a lot of work and we do not attempt it here. */
7216 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
7219 /* In general these structures are sorted top to bottom (down the PLUS
7220 chain), but not left to right across the PLUS. If B is a higher
7221 order giv than A, we can strip one level and recurse. If A is higher
7222 order, we'll eventually bail out, but won't know that until the end.
7223 If they are the same, we'll strip one level around this loop. */
7225 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
7227 rtx ra, rb, oa, ob, tmp;
7229 ra = XEXP (a, 0), oa = XEXP (a, 1);
7230 if (GET_CODE (ra) == PLUS)
7231 tmp = ra, ra = oa, oa = tmp;
7233 rb = XEXP (b, 0), ob = XEXP (b, 1);
7234 if (GET_CODE (rb) == PLUS)
7235 tmp = rb, rb = ob, ob = tmp;
7237 if (rtx_equal_p (ra, rb))
7238 /* We matched: remove one reg completely. */
7240 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
7241 /* An alternate match. */
7243 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
7244 /* An alternate match. */
7248 /* Indicates an extra register in B. Strip one level from B and
7249 recurse, hoping B was the higher order expression. */
7250 ob = express_from_1 (a, ob, mult);
7253 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
7257 /* Here we are at the last level of A, go through the cases hoping to
7258 get rid of everything but a constant. */
7260 if (GET_CODE (a) == PLUS)
7264 ra = XEXP (a, 0), oa = XEXP (a, 1);
7265 if (rtx_equal_p (oa, b))
7267 else if (!rtx_equal_p (ra, b))
7270 if (GET_CODE (oa) != CONST_INT)
7273 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
7275 else if (GET_CODE (a) == CONST_INT)
7277 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
7279 else if (CONSTANT_P (a))
7281 enum machine_mode mode_a = GET_MODE (a);
7282 enum machine_mode mode_b = GET_MODE (b);
7283 enum machine_mode mode = mode_b == VOIDmode ? mode_a : mode_b;
7284 return simplify_gen_binary (MINUS, mode, b, a);
7286 else if (GET_CODE (b) == PLUS)
7288 if (rtx_equal_p (a, XEXP (b, 0)))
7290 else if (rtx_equal_p (a, XEXP (b, 1)))
7295 else if (rtx_equal_p (a, b))
7302 express_from (g1, g2)
7303 struct induction *g1, *g2;
7307 /* The value that G1 will be multiplied by must be a constant integer. Also,
7308 the only chance we have of getting a valid address is if b*c/a (see above
7309 for notation) is also an integer. */
7310 if (GET_CODE (g1->mult_val) == CONST_INT
7311 && GET_CODE (g2->mult_val) == CONST_INT)
7313 if (g1->mult_val == const0_rtx
7314 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
7316 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
7318 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
7322 /* ??? Find out if the one is a multiple of the other? */
7326 add = express_from_1 (g1->add_val, g2->add_val, mult);
7327 if (add == NULL_RTX)
7329 /* Failed. If we've got a multiplication factor between G1 and G2,
7330 scale G1's addend and try again. */
7331 if (INTVAL (mult) > 1)
7333 rtx g1_add_val = g1->add_val;
7334 if (GET_CODE (g1_add_val) == MULT
7335 && GET_CODE (XEXP (g1_add_val, 1)) == CONST_INT)
7338 m = INTVAL (mult) * INTVAL (XEXP (g1_add_val, 1));
7339 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val),
7340 XEXP (g1_add_val, 0), GEN_INT (m));
7344 g1_add_val = gen_rtx_MULT (GET_MODE (g1_add_val), g1_add_val,
7348 add = express_from_1 (g1_add_val, g2->add_val, const1_rtx);
7351 if (add == NULL_RTX)
7354 /* Form simplified final result. */
7355 if (mult == const0_rtx)
7357 else if (mult == const1_rtx)
7358 mult = g1->dest_reg;
7360 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
7362 if (add == const0_rtx)
7366 if (GET_CODE (add) == PLUS
7367 && CONSTANT_P (XEXP (add, 1)))
7369 rtx tem = XEXP (add, 1);
7370 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
7374 return gen_rtx_PLUS (g2->mode, mult, add);
7378 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7379 represented by G1. This indicates that G2 should be combined with G1 and
7380 that G2 can use (either directly or via an address expression) a register
7381 used to represent G1. */
7384 combine_givs_p (g1, g2)
7385 struct induction *g1, *g2;
7389 /* With the introduction of ext dependent givs, we must care for modes.
7390 G2 must not use a wider mode than G1. */
7391 if (GET_MODE_SIZE (g1->mode) < GET_MODE_SIZE (g2->mode))
7394 ret = comb = express_from (g1, g2);
7395 if (comb == NULL_RTX)
7397 if (g1->mode != g2->mode)
7398 ret = gen_lowpart (g2->mode, comb);
7400 /* If these givs are identical, they can be combined. We use the results
7401 of express_from because the addends are not in a canonical form, so
7402 rtx_equal_p is a weaker test. */
7403 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
7404 combination to be the other way round. */
7405 if (comb == g1->dest_reg
7406 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
7411 /* If G2 can be expressed as a function of G1 and that function is valid
7412 as an address and no more expensive than using a register for G2,
7413 the expression of G2 in terms of G1 can be used. */
7415 && g2->giv_type == DEST_ADDR
7416 && memory_address_p (GET_MODE (g2->mem), ret))
7422 /* Check each extension dependent giv in this class to see if its
7423 root biv is safe from wrapping in the interior mode, which would
7424 make the giv illegal. */
7427 check_ext_dependent_givs (bl, loop_info)
7428 struct iv_class *bl;
7429 struct loop_info *loop_info;
7431 int ze_ok = 0, se_ok = 0, info_ok = 0;
7432 enum machine_mode biv_mode = GET_MODE (bl->biv->src_reg);
7433 HOST_WIDE_INT start_val;
7434 unsigned HOST_WIDE_INT u_end_val = 0;
7435 unsigned HOST_WIDE_INT u_start_val = 0;
7437 struct induction *v;
7439 /* Make sure the iteration data is available. We must have
7440 constants in order to be certain of no overflow. */
7441 /* ??? An unknown iteration count with an increment of +-1
7442 combined with friendly exit tests of against an invariant
7443 value is also amenable to optimization. Not implemented. */
7444 if (loop_info->n_iterations > 0
7445 && bl->initial_value
7446 && GET_CODE (bl->initial_value) == CONST_INT
7447 && (incr = biv_total_increment (bl))
7448 && GET_CODE (incr) == CONST_INT
7449 /* Make sure the host can represent the arithmetic. */
7450 && HOST_BITS_PER_WIDE_INT >= GET_MODE_BITSIZE (biv_mode))
7452 unsigned HOST_WIDE_INT abs_incr, total_incr;
7453 HOST_WIDE_INT s_end_val;
7457 start_val = INTVAL (bl->initial_value);
7458 u_start_val = start_val;
7460 neg_incr = 0, abs_incr = INTVAL (incr);
7461 if (INTVAL (incr) < 0)
7462 neg_incr = 1, abs_incr = -abs_incr;
7463 total_incr = abs_incr * loop_info->n_iterations;
7465 /* Check for host arithmetic overflow. */
7466 if (total_incr / loop_info->n_iterations == abs_incr)
7468 unsigned HOST_WIDE_INT u_max;
7469 HOST_WIDE_INT s_max;
7471 u_end_val = start_val + (neg_incr ? -total_incr : total_incr);
7472 s_end_val = u_end_val;
7473 u_max = GET_MODE_MASK (biv_mode);
7476 /* Check zero extension of biv ok. */
7478 /* Check for host arithmetic overflow. */
7480 ? u_end_val < u_start_val
7481 : u_end_val > u_start_val)
7482 /* Check for target arithmetic overflow. */
7484 ? 1 /* taken care of with host overflow */
7485 : u_end_val <= u_max))
7490 /* Check sign extension of biv ok. */
7491 /* ??? While it is true that overflow with signed and pointer
7492 arithmetic is undefined, I fear too many programmers don't
7493 keep this fact in mind -- myself included on occasion.
7494 So leave alone with the signed overflow optimizations. */
7495 if (start_val >= -s_max - 1
7496 /* Check for host arithmetic overflow. */
7498 ? s_end_val < start_val
7499 : s_end_val > start_val)
7500 /* Check for target arithmetic overflow. */
7502 ? s_end_val >= -s_max - 1
7503 : s_end_val <= s_max))
7510 /* Invalidate givs that fail the tests. */
7511 for (v = bl->giv; v; v = v->next_iv)
7512 if (v->ext_dependent)
7514 enum rtx_code code = GET_CODE (v->ext_dependent);
7527 /* We don't know whether this value is being used as either
7528 signed or unsigned, so to safely truncate we must satisfy
7529 both. The initial check here verifies the BIV itself;
7530 once that is successful we may check its range wrt the
7534 enum machine_mode outer_mode = GET_MODE (v->ext_dependent);
7535 unsigned HOST_WIDE_INT max = GET_MODE_MASK (outer_mode) >> 1;
7537 /* We know from the above that both endpoints are nonnegative,
7538 and that there is no wrapping. Verify that both endpoints
7539 are within the (signed) range of the outer mode. */
7540 if (u_start_val <= max && u_end_val <= max)
7551 if (loop_dump_stream)
7553 fprintf (loop_dump_stream,
7554 "Verified ext dependent giv at %d of reg %d\n",
7555 INSN_UID (v->insn), bl->regno);
7560 if (loop_dump_stream)
7565 why = "biv iteration values overflowed";
7569 incr = biv_total_increment (bl);
7570 if (incr == const1_rtx)
7571 why = "biv iteration info incomplete; incr by 1";
7573 why = "biv iteration info incomplete";
7576 fprintf (loop_dump_stream,
7577 "Failed ext dependent giv at %d, %s\n",
7578 INSN_UID (v->insn), why);
7581 bl->all_reduced = 0;
7586 /* Generate a version of VALUE in a mode appropriate for initializing V. */
7589 extend_value_for_giv (v, value)
7590 struct induction *v;
7593 rtx ext_dep = v->ext_dependent;
7598 /* Recall that check_ext_dependent_givs verified that the known bounds
7599 of a biv did not overflow or wrap with respect to the extension for
7600 the giv. Therefore, constants need no additional adjustment. */
7601 if (CONSTANT_P (value) && GET_MODE (value) == VOIDmode)
7604 /* Otherwise, we must adjust the value to compensate for the
7605 differing modes of the biv and the giv. */
7606 return gen_rtx_fmt_e (GET_CODE (ext_dep), GET_MODE (ext_dep), value);
7609 struct combine_givs_stats
7616 cmp_combine_givs_stats (xp, yp)
7620 const struct combine_givs_stats * const x =
7621 (const struct combine_givs_stats *) xp;
7622 const struct combine_givs_stats * const y =
7623 (const struct combine_givs_stats *) yp;
7625 d = y->total_benefit - x->total_benefit;
7626 /* Stabilize the sort. */
7628 d = x->giv_number - y->giv_number;
7632 /* Check all pairs of givs for iv_class BL and see if any can be combined with
7633 any other. If so, point SAME to the giv combined with and set NEW_REG to
7634 be an expression (in terms of the other giv's DEST_REG) equivalent to the
7635 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
7638 combine_givs (regs, bl)
7639 struct loop_regs *regs;
7640 struct iv_class *bl;
7642 /* Additional benefit to add for being combined multiple times. */
7643 const int extra_benefit = 3;
7645 struct induction *g1, *g2, **giv_array;
7646 int i, j, k, giv_count;
7647 struct combine_givs_stats *stats;
7650 /* Count givs, because bl->giv_count is incorrect here. */
7652 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7657 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
7659 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7661 giv_array[i++] = g1;
7663 stats = (struct combine_givs_stats *) xcalloc (giv_count, sizeof (*stats));
7664 can_combine = (rtx *) xcalloc (giv_count, giv_count * sizeof (rtx));
7666 for (i = 0; i < giv_count; i++)
7672 stats[i].giv_number = i;
7674 /* If a DEST_REG GIV is used only once, do not allow it to combine
7675 with anything, for in doing so we will gain nothing that cannot
7676 be had by simply letting the GIV with which we would have combined
7677 to be reduced on its own. The losage shows up in particular with
7678 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7679 be seen elsewhere as well. */
7680 if (g1->giv_type == DEST_REG
7681 && (single_use = regs->array[REGNO (g1->dest_reg)].single_usage)
7682 && single_use != const0_rtx)
7685 this_benefit = g1->benefit;
7686 /* Add an additional weight for zero addends. */
7687 if (g1->no_const_addval)
7690 for (j = 0; j < giv_count; j++)
7696 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
7698 can_combine[i * giv_count + j] = this_combine;
7699 this_benefit += g2->benefit + extra_benefit;
7702 stats[i].total_benefit = this_benefit;
7705 /* Iterate, combining until we can't. */
7707 qsort (stats, giv_count, sizeof (*stats), cmp_combine_givs_stats);
7709 if (loop_dump_stream)
7711 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
7712 for (k = 0; k < giv_count; k++)
7714 g1 = giv_array[stats[k].giv_number];
7715 if (!g1->combined_with && !g1->same)
7716 fprintf (loop_dump_stream, " {%d, %d}",
7717 INSN_UID (giv_array[stats[k].giv_number]->insn),
7718 stats[k].total_benefit);
7720 putc ('\n', loop_dump_stream);
7723 for (k = 0; k < giv_count; k++)
7725 int g1_add_benefit = 0;
7727 i = stats[k].giv_number;
7730 /* If it has already been combined, skip. */
7731 if (g1->combined_with || g1->same)
7734 for (j = 0; j < giv_count; j++)
7737 if (g1 != g2 && can_combine[i * giv_count + j]
7738 /* If it has already been combined, skip. */
7739 && ! g2->same && ! g2->combined_with)
7743 g2->new_reg = can_combine[i * giv_count + j];
7745 /* For destination, we now may replace by mem expression instead
7746 of register. This changes the costs considerably, so add the
7748 if (g2->giv_type == DEST_ADDR)
7749 g2->benefit = (g2->benefit + reg_address_cost
7750 - address_cost (g2->new_reg,
7751 GET_MODE (g2->mem)));
7752 g1->combined_with++;
7753 g1->lifetime += g2->lifetime;
7755 g1_add_benefit += g2->benefit;
7757 /* ??? The new final_[bg]iv_value code does a much better job
7758 of finding replaceable giv's, and hence this code may no
7759 longer be necessary. */
7760 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
7761 g1_add_benefit -= copy_cost;
7763 /* To help optimize the next set of combinations, remove
7764 this giv from the benefits of other potential mates. */
7765 for (l = 0; l < giv_count; ++l)
7767 int m = stats[l].giv_number;
7768 if (can_combine[m * giv_count + j])
7769 stats[l].total_benefit -= g2->benefit + extra_benefit;
7772 if (loop_dump_stream)
7773 fprintf (loop_dump_stream,
7774 "giv at %d combined with giv at %d; new benefit %d + %d, lifetime %d\n",
7775 INSN_UID (g2->insn), INSN_UID (g1->insn),
7776 g1->benefit, g1_add_benefit, g1->lifetime);
7780 /* To help optimize the next set of combinations, remove
7781 this giv from the benefits of other potential mates. */
7782 if (g1->combined_with)
7784 for (j = 0; j < giv_count; ++j)
7786 int m = stats[j].giv_number;
7787 if (can_combine[m * giv_count + i])
7788 stats[j].total_benefit -= g1->benefit + extra_benefit;
7791 g1->benefit += g1_add_benefit;
7793 /* We've finished with this giv, and everything it touched.
7794 Restart the combination so that proper weights for the
7795 rest of the givs are properly taken into account. */
7796 /* ??? Ideally we would compact the arrays at this point, so
7797 as to not cover old ground. But sanely compacting
7798 can_combine is tricky. */
7808 /* Generate sequence for REG = B * M + A. */
7811 gen_add_mult (b, m, a, reg)
7812 rtx b; /* initial value of basic induction variable */
7813 rtx m; /* multiplicative constant */
7814 rtx a; /* additive constant */
7815 rtx reg; /* destination register */
7821 /* Use unsigned arithmetic. */
7822 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
7824 emit_move_insn (reg, result);
7832 /* Update registers created in insn sequence SEQ. */
7835 loop_regs_update (loop, seq)
7836 const struct loop *loop ATTRIBUTE_UNUSED;
7841 /* Update register info for alias analysis. */
7843 if (seq == NULL_RTX)
7849 while (insn != NULL_RTX)
7851 rtx set = single_set (insn);
7853 if (set && GET_CODE (SET_DEST (set)) == REG)
7854 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7856 insn = NEXT_INSN (insn);
7859 else if (GET_CODE (seq) == SET
7860 && GET_CODE (SET_DEST (seq)) == REG)
7861 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
7865 /* EMIT code before BEFORE_BB/BEFORE_INSN to set REG = B * M + A. */
7868 loop_iv_add_mult_emit_before (loop, b, m, a, reg, before_bb, before_insn)
7869 const struct loop *loop;
7870 rtx b; /* initial value of basic induction variable */
7871 rtx m; /* multiplicative constant */
7872 rtx a; /* additive constant */
7873 rtx reg; /* destination register */
7874 basic_block before_bb;
7881 loop_iv_add_mult_hoist (loop, b, m, a, reg);
7885 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7886 seq = gen_add_mult (copy_rtx (b), copy_rtx (m), copy_rtx (a), reg);
7888 /* Increase the lifetime of any invariants moved further in code. */
7889 update_reg_last_use (a, before_insn);
7890 update_reg_last_use (b, before_insn);
7891 update_reg_last_use (m, before_insn);
7893 loop_insn_emit_before (loop, before_bb, before_insn, seq);
7895 /* It is possible that the expansion created lots of new registers.
7896 Iterate over the sequence we just created and record them all. */
7897 loop_regs_update (loop, seq);
7901 /* Emit insns in loop pre-header to set REG = B * M + A. */
7904 loop_iv_add_mult_sink (loop, b, m, a, reg)
7905 const struct loop *loop;
7906 rtx b; /* initial value of basic induction variable */
7907 rtx m; /* multiplicative constant */
7908 rtx a; /* additive constant */
7909 rtx reg; /* destination register */
7913 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7914 seq = gen_add_mult (copy_rtx (b), copy_rtx (m), copy_rtx (a), reg);
7916 /* Increase the lifetime of any invariants moved further in code.
7917 ???? Is this really necessary? */
7918 update_reg_last_use (a, loop->sink);
7919 update_reg_last_use (b, loop->sink);
7920 update_reg_last_use (m, loop->sink);
7922 loop_insn_sink (loop, seq);
7924 /* It is possible that the expansion created lots of new registers.
7925 Iterate over the sequence we just created and record them all. */
7926 loop_regs_update (loop, seq);
7930 /* Emit insns after loop to set REG = B * M + A. */
7933 loop_iv_add_mult_hoist (loop, b, m, a, reg)
7934 const struct loop *loop;
7935 rtx b; /* initial value of basic induction variable */
7936 rtx m; /* multiplicative constant */
7937 rtx a; /* additive constant */
7938 rtx reg; /* destination register */
7942 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7943 seq = gen_add_mult (copy_rtx (b), copy_rtx (m), copy_rtx (a), reg);
7945 loop_insn_hoist (loop, seq);
7947 /* It is possible that the expansion created lots of new registers.
7948 Iterate over the sequence we just created and record them all. */
7949 loop_regs_update (loop, seq);
7954 /* Similar to gen_add_mult, but compute cost rather than generating
7958 iv_add_mult_cost (b, m, a, reg)
7959 rtx b; /* initial value of basic induction variable */
7960 rtx m; /* multiplicative constant */
7961 rtx a; /* additive constant */
7962 rtx reg; /* destination register */
7968 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
7970 emit_move_insn (reg, result);
7971 last = get_last_insn ();
7974 rtx t = single_set (last);
7976 cost += rtx_cost (SET_SRC (t), SET);
7977 last = PREV_INSN (last);
7983 /* Test whether A * B can be computed without
7984 an actual multiply insn. Value is 1 if so.
7986 ??? This function stinks because it generates a ton of wasted RTL
7987 ??? and as a result fragments GC memory to no end. There are other
7988 ??? places in the compiler which are invoked a lot and do the same
7989 ??? thing, generate wasted RTL just to see if something is possible. */
7992 product_cheap_p (a, b)
7999 /* If only one is constant, make it B. */
8000 if (GET_CODE (a) == CONST_INT)
8001 tmp = a, a = b, b = tmp;
8003 /* If first constant, both constant, so don't need multiply. */
8004 if (GET_CODE (a) == CONST_INT)
8007 /* If second not constant, neither is constant, so would need multiply. */
8008 if (GET_CODE (b) != CONST_INT)
8011 /* One operand is constant, so might not need multiply insn. Generate the
8012 code for the multiply and see if a call or multiply, or long sequence
8013 of insns is generated. */
8016 expand_mult (GET_MODE (a), a, b, NULL_RTX, 1);
8024 while (tmp != NULL_RTX)
8026 rtx next = NEXT_INSN (tmp);
8029 || GET_CODE (tmp) != INSN
8030 || (GET_CODE (PATTERN (tmp)) == SET
8031 && GET_CODE (SET_SRC (PATTERN (tmp))) == MULT)
8032 || (GET_CODE (PATTERN (tmp)) == PARALLEL
8033 && GET_CODE (XVECEXP (PATTERN (tmp), 0, 0)) == SET
8034 && GET_CODE (SET_SRC (XVECEXP (PATTERN (tmp), 0, 0))) == MULT))
8043 else if (GET_CODE (tmp) == SET
8044 && GET_CODE (SET_SRC (tmp)) == MULT)
8046 else if (GET_CODE (tmp) == PARALLEL
8047 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
8048 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
8054 /* Check to see if loop can be terminated by a "decrement and branch until
8055 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
8056 Also try reversing an increment loop to a decrement loop
8057 to see if the optimization can be performed.
8058 Value is nonzero if optimization was performed. */
8060 /* This is useful even if the architecture doesn't have such an insn,
8061 because it might change a loops which increments from 0 to n to a loop
8062 which decrements from n to 0. A loop that decrements to zero is usually
8063 faster than one that increments from zero. */
8065 /* ??? This could be rewritten to use some of the loop unrolling procedures,
8066 such as approx_final_value, biv_total_increment, loop_iterations, and
8067 final_[bg]iv_value. */
8070 check_dbra_loop (loop, insn_count)
8074 struct loop_info *loop_info = LOOP_INFO (loop);
8075 struct loop_regs *regs = LOOP_REGS (loop);
8076 struct loop_ivs *ivs = LOOP_IVS (loop);
8077 struct iv_class *bl;
8084 rtx before_comparison;
8088 int compare_and_branch;
8089 rtx loop_start = loop->start;
8090 rtx loop_end = loop->end;
8092 /* If last insn is a conditional branch, and the insn before tests a
8093 register value, try to optimize it. Otherwise, we can't do anything. */
8095 jump = PREV_INSN (loop_end);
8096 comparison = get_condition_for_loop (loop, jump);
8097 if (comparison == 0)
8099 if (!onlyjump_p (jump))
8102 /* Try to compute whether the compare/branch at the loop end is one or
8103 two instructions. */
8104 get_condition (jump, &first_compare);
8105 if (first_compare == jump)
8106 compare_and_branch = 1;
8107 else if (first_compare == prev_nonnote_insn (jump))
8108 compare_and_branch = 2;
8113 /* If more than one condition is present to control the loop, then
8114 do not proceed, as this function does not know how to rewrite
8115 loop tests with more than one condition.
8117 Look backwards from the first insn in the last comparison
8118 sequence and see if we've got another comparison sequence. */
8121 if ((jump1 = prev_nonnote_insn (first_compare)) != loop->cont)
8122 if (GET_CODE (jump1) == JUMP_INSN)
8126 /* Check all of the bivs to see if the compare uses one of them.
8127 Skip biv's set more than once because we can't guarantee that
8128 it will be zero on the last iteration. Also skip if the biv is
8129 used between its update and the test insn. */
8131 for (bl = ivs->list; bl; bl = bl->next)
8133 if (bl->biv_count == 1
8134 && ! bl->biv->maybe_multiple
8135 && bl->biv->dest_reg == XEXP (comparison, 0)
8136 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
8144 /* Look for the case where the basic induction variable is always
8145 nonnegative, and equals zero on the last iteration.
8146 In this case, add a reg_note REG_NONNEG, which allows the
8147 m68k DBRA instruction to be used. */
8149 if (((GET_CODE (comparison) == GT
8150 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
8151 && INTVAL (XEXP (comparison, 1)) == -1)
8152 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
8153 && GET_CODE (bl->biv->add_val) == CONST_INT
8154 && INTVAL (bl->biv->add_val) < 0)
8156 /* Initial value must be greater than 0,
8157 init_val % -dec_value == 0 to ensure that it equals zero on
8158 the last iteration */
8160 if (GET_CODE (bl->initial_value) == CONST_INT
8161 && INTVAL (bl->initial_value) > 0
8162 && (INTVAL (bl->initial_value)
8163 % (-INTVAL (bl->biv->add_val))) == 0)
8165 /* register always nonnegative, add REG_NOTE to branch */
8166 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
8168 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
8175 /* If the decrement is 1 and the value was tested as >= 0 before
8176 the loop, then we can safely optimize. */
8177 for (p = loop_start; p; p = PREV_INSN (p))
8179 if (GET_CODE (p) == CODE_LABEL)
8181 if (GET_CODE (p) != JUMP_INSN)
8184 before_comparison = get_condition_for_loop (loop, p);
8185 if (before_comparison
8186 && XEXP (before_comparison, 0) == bl->biv->dest_reg
8187 && GET_CODE (before_comparison) == LT
8188 && XEXP (before_comparison, 1) == const0_rtx
8189 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
8190 && INTVAL (bl->biv->add_val) == -1)
8192 if (! find_reg_note (jump, REG_NONNEG, NULL_RTX))
8194 = gen_rtx_EXPR_LIST (REG_NONNEG, bl->biv->dest_reg,
8202 else if (GET_CODE (bl->biv->add_val) == CONST_INT
8203 && INTVAL (bl->biv->add_val) > 0)
8205 /* Try to change inc to dec, so can apply above optimization. */
8207 all registers modified are induction variables or invariant,
8208 all memory references have non-overlapping addresses
8209 (obviously true if only one write)
8210 allow 2 insns for the compare/jump at the end of the loop. */
8211 /* Also, we must avoid any instructions which use both the reversed
8212 biv and another biv. Such instructions will fail if the loop is
8213 reversed. We meet this condition by requiring that either
8214 no_use_except_counting is true, or else that there is only
8216 int num_nonfixed_reads = 0;
8217 /* 1 if the iteration var is used only to count iterations. */
8218 int no_use_except_counting = 0;
8219 /* 1 if the loop has no memory store, or it has a single memory store
8220 which is reversible. */
8221 int reversible_mem_store = 1;
8223 if (bl->giv_count == 0
8224 && !loop->exit_count
8225 && !loop_info->has_multiple_exit_targets)
8227 rtx bivreg = regno_reg_rtx[bl->regno];
8228 struct iv_class *blt;
8230 /* If there are no givs for this biv, and the only exit is the
8231 fall through at the end of the loop, then
8232 see if perhaps there are no uses except to count. */
8233 no_use_except_counting = 1;
8234 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8237 rtx set = single_set (p);
8239 if (set && GET_CODE (SET_DEST (set)) == REG
8240 && REGNO (SET_DEST (set)) == bl->regno)
8241 /* An insn that sets the biv is okay. */
8243 else if ((p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
8244 || p == prev_nonnote_insn (loop_end))
8245 && reg_mentioned_p (bivreg, PATTERN (p)))
8247 /* If either of these insns uses the biv and sets a pseudo
8248 that has more than one usage, then the biv has uses
8249 other than counting since it's used to derive a value
8250 that is used more than one time. */
8251 note_stores (PATTERN (p), note_set_pseudo_multiple_uses,
8253 if (regs->multiple_uses)
8255 no_use_except_counting = 0;
8259 else if (reg_mentioned_p (bivreg, PATTERN (p)))
8261 no_use_except_counting = 0;
8266 /* A biv has uses besides counting if it is used to set
8268 for (blt = ivs->list; blt; blt = blt->next)
8270 && reg_mentioned_p (bivreg, SET_SRC (blt->init_set)))
8272 no_use_except_counting = 0;
8277 if (no_use_except_counting)
8278 /* No need to worry about MEMs. */
8280 else if (loop_info->num_mem_sets <= 1)
8282 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8284 num_nonfixed_reads += count_nonfixed_reads (loop, PATTERN (p));
8286 /* If the loop has a single store, and the destination address is
8287 invariant, then we can't reverse the loop, because this address
8288 might then have the wrong value at loop exit.
8289 This would work if the source was invariant also, however, in that
8290 case, the insn should have been moved out of the loop. */
8292 if (loop_info->num_mem_sets == 1)
8294 struct induction *v;
8296 /* If we could prove that each of the memory locations
8297 written to was different, then we could reverse the
8298 store -- but we don't presently have any way of
8300 reversible_mem_store = 0;
8302 /* If the store depends on a register that is set after the
8303 store, it depends on the initial value, and is thus not
8305 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
8307 if (v->giv_type == DEST_REG
8308 && reg_mentioned_p (v->dest_reg,
8309 PATTERN (loop_info->first_loop_store_insn))
8310 && loop_insn_first_p (loop_info->first_loop_store_insn,
8312 reversible_mem_store = 0;
8319 /* This code only acts for innermost loops. Also it simplifies
8320 the memory address check by only reversing loops with
8321 zero or one memory access.
8322 Two memory accesses could involve parts of the same array,
8323 and that can't be reversed.
8324 If the biv is used only for counting, than we don't need to worry
8325 about all these things. */
8327 if ((num_nonfixed_reads <= 1
8328 && ! loop_info->has_nonconst_call
8329 && ! loop_info->has_prefetch
8330 && ! loop_info->has_volatile
8331 && reversible_mem_store
8332 && (bl->giv_count + bl->biv_count + loop_info->num_mem_sets
8333 + num_unmoved_movables (loop) + compare_and_branch == insn_count)
8334 && (bl == ivs->list && bl->next == 0))
8335 || (no_use_except_counting && ! loop_info->has_prefetch))
8339 /* Loop can be reversed. */
8340 if (loop_dump_stream)
8341 fprintf (loop_dump_stream, "Can reverse loop\n");
8343 /* Now check other conditions:
8345 The increment must be a constant, as must the initial value,
8346 and the comparison code must be LT.
8348 This test can probably be improved since +/- 1 in the constant
8349 can be obtained by changing LT to LE and vice versa; this is
8353 /* for constants, LE gets turned into LT */
8354 && (GET_CODE (comparison) == LT
8355 || (GET_CODE (comparison) == LE
8356 && no_use_except_counting)))
8358 HOST_WIDE_INT add_val, add_adjust, comparison_val = 0;
8359 rtx initial_value, comparison_value;
8361 enum rtx_code cmp_code;
8362 int comparison_const_width;
8363 unsigned HOST_WIDE_INT comparison_sign_mask;
8365 add_val = INTVAL (bl->biv->add_val);
8366 comparison_value = XEXP (comparison, 1);
8367 if (GET_MODE (comparison_value) == VOIDmode)
8368 comparison_const_width
8369 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
8371 comparison_const_width
8372 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
8373 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
8374 comparison_const_width = HOST_BITS_PER_WIDE_INT;
8375 comparison_sign_mask
8376 = (unsigned HOST_WIDE_INT) 1 << (comparison_const_width - 1);
8378 /* If the comparison value is not a loop invariant, then we
8379 can not reverse this loop.
8381 ??? If the insns which initialize the comparison value as
8382 a whole compute an invariant result, then we could move
8383 them out of the loop and proceed with loop reversal. */
8384 if (! loop_invariant_p (loop, comparison_value))
8387 if (GET_CODE (comparison_value) == CONST_INT)
8388 comparison_val = INTVAL (comparison_value);
8389 initial_value = bl->initial_value;
8391 /* Normalize the initial value if it is an integer and
8392 has no other use except as a counter. This will allow
8393 a few more loops to be reversed. */
8394 if (no_use_except_counting
8395 && GET_CODE (comparison_value) == CONST_INT
8396 && GET_CODE (initial_value) == CONST_INT)
8398 comparison_val = comparison_val - INTVAL (bl->initial_value);
8399 /* The code below requires comparison_val to be a multiple
8400 of add_val in order to do the loop reversal, so
8401 round up comparison_val to a multiple of add_val.
8402 Since comparison_value is constant, we know that the
8403 current comparison code is LT. */
8404 comparison_val = comparison_val + add_val - 1;
8406 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
8407 /* We postpone overflow checks for COMPARISON_VAL here;
8408 even if there is an overflow, we might still be able to
8409 reverse the loop, if converting the loop exit test to
8411 initial_value = const0_rtx;
8414 /* First check if we can do a vanilla loop reversal. */
8415 if (initial_value == const0_rtx
8416 /* If we have a decrement_and_branch_on_count,
8417 prefer the NE test, since this will allow that
8418 instruction to be generated. Note that we must
8419 use a vanilla loop reversal if the biv is used to
8420 calculate a giv or has a non-counting use. */
8421 #if ! defined (HAVE_decrement_and_branch_until_zero) \
8422 && defined (HAVE_decrement_and_branch_on_count)
8423 && (! (add_val == 1 && loop->vtop
8424 && (bl->biv_count == 0
8425 || no_use_except_counting)))
8427 && GET_CODE (comparison_value) == CONST_INT
8428 /* Now do postponed overflow checks on COMPARISON_VAL. */
8429 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
8430 & comparison_sign_mask))
8432 /* Register will always be nonnegative, with value
8433 0 on last iteration */
8434 add_adjust = add_val;
8438 else if (add_val == 1 && loop->vtop
8439 && (bl->biv_count == 0
8440 || no_use_except_counting))
8448 if (GET_CODE (comparison) == LE)
8449 add_adjust -= add_val;
8451 /* If the initial value is not zero, or if the comparison
8452 value is not an exact multiple of the increment, then we
8453 can not reverse this loop. */
8454 if (initial_value == const0_rtx
8455 && GET_CODE (comparison_value) == CONST_INT)
8457 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
8462 if (! no_use_except_counting || add_val != 1)
8466 final_value = comparison_value;
8468 /* Reset these in case we normalized the initial value
8469 and comparison value above. */
8470 if (GET_CODE (comparison_value) == CONST_INT
8471 && GET_CODE (initial_value) == CONST_INT)
8473 comparison_value = GEN_INT (comparison_val);
8475 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
8477 bl->initial_value = initial_value;
8479 /* Save some info needed to produce the new insns. */
8480 reg = bl->biv->dest_reg;
8481 jump_label = condjump_label (PREV_INSN (loop_end));
8482 new_add_val = GEN_INT (-INTVAL (bl->biv->add_val));
8484 /* Set start_value; if this is not a CONST_INT, we need
8486 Initialize biv to start_value before loop start.
8487 The old initializing insn will be deleted as a
8488 dead store by flow.c. */
8489 if (initial_value == const0_rtx
8490 && GET_CODE (comparison_value) == CONST_INT)
8492 start_value = GEN_INT (comparison_val - add_adjust);
8493 loop_insn_hoist (loop, gen_move_insn (reg, start_value));
8495 else if (GET_CODE (initial_value) == CONST_INT)
8497 enum machine_mode mode = GET_MODE (reg);
8498 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
8499 rtx add_insn = gen_add3_insn (reg, comparison_value, offset);
8505 = gen_rtx_PLUS (mode, comparison_value, offset);
8506 loop_insn_hoist (loop, add_insn);
8507 if (GET_CODE (comparison) == LE)
8508 final_value = gen_rtx_PLUS (mode, comparison_value,
8511 else if (! add_adjust)
8513 enum machine_mode mode = GET_MODE (reg);
8514 rtx sub_insn = gen_sub3_insn (reg, comparison_value,
8520 = gen_rtx_MINUS (mode, comparison_value, initial_value);
8521 loop_insn_hoist (loop, sub_insn);
8524 /* We could handle the other cases too, but it'll be
8525 better to have a testcase first. */
8528 /* We may not have a single insn which can increment a reg, so
8529 create a sequence to hold all the insns from expand_inc. */
8531 expand_inc (reg, new_add_val);
8535 p = loop_insn_emit_before (loop, 0, bl->biv->insn, tem);
8536 delete_insn (bl->biv->insn);
8538 /* Update biv info to reflect its new status. */
8540 bl->initial_value = start_value;
8541 bl->biv->add_val = new_add_val;
8543 /* Update loop info. */
8544 loop_info->initial_value = reg;
8545 loop_info->initial_equiv_value = reg;
8546 loop_info->final_value = const0_rtx;
8547 loop_info->final_equiv_value = const0_rtx;
8548 loop_info->comparison_value = const0_rtx;
8549 loop_info->comparison_code = cmp_code;
8550 loop_info->increment = new_add_val;
8552 /* Inc LABEL_NUSES so that delete_insn will
8553 not delete the label. */
8554 LABEL_NUSES (XEXP (jump_label, 0))++;
8556 /* Emit an insn after the end of the loop to set the biv's
8557 proper exit value if it is used anywhere outside the loop. */
8558 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
8560 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
8561 loop_insn_sink (loop, gen_load_of_final_value (reg, final_value));
8563 /* Delete compare/branch at end of loop. */
8564 delete_related_insns (PREV_INSN (loop_end));
8565 if (compare_and_branch == 2)
8566 delete_related_insns (first_compare);
8568 /* Add new compare/branch insn at end of loop. */
8570 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
8572 XEXP (jump_label, 0));
8575 emit_jump_insn_before (tem, loop_end);
8577 for (tem = PREV_INSN (loop_end);
8578 tem && GET_CODE (tem) != JUMP_INSN;
8579 tem = PREV_INSN (tem))
8583 JUMP_LABEL (tem) = XEXP (jump_label, 0);
8589 /* Increment of LABEL_NUSES done above. */
8590 /* Register is now always nonnegative,
8591 so add REG_NONNEG note to the branch. */
8592 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, reg,
8598 /* No insn may reference both the reversed and another biv or it
8599 will fail (see comment near the top of the loop reversal
8601 Earlier on, we have verified that the biv has no use except
8602 counting, or it is the only biv in this function.
8603 However, the code that computes no_use_except_counting does
8604 not verify reg notes. It's possible to have an insn that
8605 references another biv, and has a REG_EQUAL note with an
8606 expression based on the reversed biv. To avoid this case,
8607 remove all REG_EQUAL notes based on the reversed biv
8609 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8613 rtx set = single_set (p);
8614 /* If this is a set of a GIV based on the reversed biv, any
8615 REG_EQUAL notes should still be correct. */
8617 || GET_CODE (SET_DEST (set)) != REG
8618 || (size_t) REGNO (SET_DEST (set)) >= ivs->n_regs
8619 || REG_IV_TYPE (ivs, REGNO (SET_DEST (set))) != GENERAL_INDUCT
8620 || REG_IV_INFO (ivs, REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
8621 for (pnote = ®_NOTES (p); *pnote;)
8623 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
8624 && reg_mentioned_p (regno_reg_rtx[bl->regno],
8626 *pnote = XEXP (*pnote, 1);
8628 pnote = &XEXP (*pnote, 1);
8632 /* Mark that this biv has been reversed. Each giv which depends
8633 on this biv, and which is also live past the end of the loop
8634 will have to be fixed up. */
8638 if (loop_dump_stream)
8640 fprintf (loop_dump_stream, "Reversed loop");
8642 fprintf (loop_dump_stream, " and added reg_nonneg\n");
8644 fprintf (loop_dump_stream, "\n");
8655 /* Verify whether the biv BL appears to be eliminable,
8656 based on the insns in the loop that refer to it.
8658 If ELIMINATE_P is nonzero, actually do the elimination.
8660 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8661 determine whether invariant insns should be placed inside or at the
8662 start of the loop. */
8665 maybe_eliminate_biv (loop, bl, eliminate_p, threshold, insn_count)
8666 const struct loop *loop;
8667 struct iv_class *bl;
8669 int threshold, insn_count;
8671 struct loop_ivs *ivs = LOOP_IVS (loop);
8672 rtx reg = bl->biv->dest_reg;
8675 /* Scan all insns in the loop, stopping if we find one that uses the
8676 biv in a way that we cannot eliminate. */
8678 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
8680 enum rtx_code code = GET_CODE (p);
8681 basic_block where_bb = 0;
8682 rtx where_insn = threshold >= insn_count ? 0 : p;
8685 /* If this is a libcall that sets a giv, skip ahead to its end. */
8686 if (GET_RTX_CLASS (code) == 'i')
8688 note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
8692 rtx last = XEXP (note, 0);
8693 rtx set = single_set (last);
8695 if (set && GET_CODE (SET_DEST (set)) == REG)
8697 unsigned int regno = REGNO (SET_DEST (set));
8699 if (regno < ivs->n_regs
8700 && REG_IV_TYPE (ivs, regno) == GENERAL_INDUCT
8701 && REG_IV_INFO (ivs, regno)->src_reg == bl->biv->src_reg)
8707 /* Closely examine the insn if the biv is mentioned. */
8708 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
8709 && reg_mentioned_p (reg, PATTERN (p))
8710 && ! maybe_eliminate_biv_1 (loop, PATTERN (p), p, bl,
8711 eliminate_p, where_bb, where_insn))
8713 if (loop_dump_stream)
8714 fprintf (loop_dump_stream,
8715 "Cannot eliminate biv %d: biv used in insn %d.\n",
8716 bl->regno, INSN_UID (p));
8720 /* If we are eliminating, kill REG_EQUAL notes mentioning the biv. */
8722 && (note = find_reg_note (p, REG_EQUAL, NULL_RTX)) != NULL_RTX
8723 && reg_mentioned_p (reg, XEXP (note, 0)))
8724 remove_note (p, note);
8729 if (loop_dump_stream)
8730 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
8731 bl->regno, eliminate_p ? "was" : "can be");
8738 /* INSN and REFERENCE are instructions in the same insn chain.
8739 Return nonzero if INSN is first. */
8742 loop_insn_first_p (insn, reference)
8743 rtx insn, reference;
8747 for (p = insn, q = reference;;)
8749 /* Start with test for not first so that INSN == REFERENCE yields not
8751 if (q == insn || ! p)
8753 if (p == reference || ! q)
8756 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8757 previous insn, hence the <= comparison below does not work if
8759 if (INSN_UID (p) < max_uid_for_loop
8760 && INSN_UID (q) < max_uid_for_loop
8761 && GET_CODE (p) != NOTE)
8762 return INSN_LUID (p) <= INSN_LUID (q);
8764 if (INSN_UID (p) >= max_uid_for_loop
8765 || GET_CODE (p) == NOTE)
8767 if (INSN_UID (q) >= max_uid_for_loop)
8772 /* We are trying to eliminate BIV in INSN using GIV. Return nonzero if
8773 the offset that we have to take into account due to auto-increment /
8774 div derivation is zero. */
8776 biv_elimination_giv_has_0_offset (biv, giv, insn)
8777 struct induction *biv, *giv;
8780 /* If the giv V had the auto-inc address optimization applied
8781 to it, and INSN occurs between the giv insn and the biv
8782 insn, then we'd have to adjust the value used here.
8783 This is rare, so we don't bother to make this possible. */
8784 if (giv->auto_inc_opt
8785 && ((loop_insn_first_p (giv->insn, insn)
8786 && loop_insn_first_p (insn, biv->insn))
8787 || (loop_insn_first_p (biv->insn, insn)
8788 && loop_insn_first_p (insn, giv->insn))))
8794 /* If BL appears in X (part of the pattern of INSN), see if we can
8795 eliminate its use. If so, return 1. If not, return 0.
8797 If BIV does not appear in X, return 1.
8799 If ELIMINATE_P is nonzero, actually do the elimination.
8800 WHERE_INSN/WHERE_BB indicate where extra insns should be added.
8801 Depending on how many items have been moved out of the loop, it
8802 will either be before INSN (when WHERE_INSN is nonzero) or at the
8803 start of the loop (when WHERE_INSN is zero). */
8806 maybe_eliminate_biv_1 (loop, x, insn, bl, eliminate_p, where_bb, where_insn)
8807 const struct loop *loop;
8809 struct iv_class *bl;
8811 basic_block where_bb;
8814 enum rtx_code code = GET_CODE (x);
8815 rtx reg = bl->biv->dest_reg;
8816 enum machine_mode mode = GET_MODE (reg);
8817 struct induction *v;
8829 /* If we haven't already been able to do something with this BIV,
8830 we can't eliminate it. */
8836 /* If this sets the BIV, it is not a problem. */
8837 if (SET_DEST (x) == reg)
8840 /* If this is an insn that defines a giv, it is also ok because
8841 it will go away when the giv is reduced. */
8842 for (v = bl->giv; v; v = v->next_iv)
8843 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
8847 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
8849 /* Can replace with any giv that was reduced and
8850 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8851 Require a constant for MULT_VAL, so we know it's nonzero.
8852 ??? We disable this optimization to avoid potential
8855 for (v = bl->giv; v; v = v->next_iv)
8856 if (GET_CODE (v->mult_val) == CONST_INT && v->mult_val != const0_rtx
8857 && v->add_val == const0_rtx
8858 && ! v->ignore && ! v->maybe_dead && v->always_computable
8862 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8868 /* If the giv has the opposite direction of change,
8869 then reverse the comparison. */
8870 if (INTVAL (v->mult_val) < 0)
8871 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8872 const0_rtx, v->new_reg);
8876 /* We can probably test that giv's reduced reg. */
8877 if (validate_change (insn, &SET_SRC (x), new, 0))
8881 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8882 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8883 Require a constant for MULT_VAL, so we know it's nonzero.
8884 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8885 overflow problem. */
8887 for (v = bl->giv; v; v = v->next_iv)
8888 if (GET_CODE (v->mult_val) == CONST_INT
8889 && v->mult_val != const0_rtx
8890 && ! v->ignore && ! v->maybe_dead && v->always_computable
8892 && (GET_CODE (v->add_val) == SYMBOL_REF
8893 || GET_CODE (v->add_val) == LABEL_REF
8894 || GET_CODE (v->add_val) == CONST
8895 || (GET_CODE (v->add_val) == REG
8896 && REG_POINTER (v->add_val))))
8898 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8904 /* If the giv has the opposite direction of change,
8905 then reverse the comparison. */
8906 if (INTVAL (v->mult_val) < 0)
8907 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8910 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8911 copy_rtx (v->add_val));
8913 /* Replace biv with the giv's reduced register. */
8914 update_reg_last_use (v->add_val, insn);
8915 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8918 /* Insn doesn't support that constant or invariant. Copy it
8919 into a register (it will be a loop invariant.) */
8920 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8922 loop_insn_emit_before (loop, 0, where_insn,
8924 copy_rtx (v->add_val)));
8926 /* Substitute the new register for its invariant value in
8927 the compare expression. */
8928 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8929 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8938 case GT: case GE: case GTU: case GEU:
8939 case LT: case LE: case LTU: case LEU:
8940 /* See if either argument is the biv. */
8941 if (XEXP (x, 0) == reg)
8942 arg = XEXP (x, 1), arg_operand = 1;
8943 else if (XEXP (x, 1) == reg)
8944 arg = XEXP (x, 0), arg_operand = 0;
8948 if (CONSTANT_P (arg))
8950 /* First try to replace with any giv that has constant positive
8951 mult_val and constant add_val. We might be able to support
8952 negative mult_val, but it seems complex to do it in general. */
8954 for (v = bl->giv; v; v = v->next_iv)
8955 if (GET_CODE (v->mult_val) == CONST_INT
8956 && INTVAL (v->mult_val) > 0
8957 && (GET_CODE (v->add_val) == SYMBOL_REF
8958 || GET_CODE (v->add_val) == LABEL_REF
8959 || GET_CODE (v->add_val) == CONST
8960 || (GET_CODE (v->add_val) == REG
8961 && REG_POINTER (v->add_val)))
8962 && ! v->ignore && ! v->maybe_dead && v->always_computable
8965 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8968 /* Don't eliminate if the linear combination that makes up
8969 the giv overflows when it is applied to ARG. */
8970 if (GET_CODE (arg) == CONST_INT)
8974 if (GET_CODE (v->add_val) == CONST_INT)
8975 add_val = v->add_val;
8977 add_val = const0_rtx;
8979 if (const_mult_add_overflow_p (arg, v->mult_val,
8987 /* Replace biv with the giv's reduced reg. */
8988 validate_change (insn, &XEXP (x, 1 - arg_operand), v->new_reg, 1);
8990 /* If all constants are actually constant integers and
8991 the derived constant can be directly placed in the COMPARE,
8993 if (GET_CODE (arg) == CONST_INT
8994 && GET_CODE (v->add_val) == CONST_INT)
8996 tem = expand_mult_add (arg, NULL_RTX, v->mult_val,
8997 v->add_val, mode, 1);
9001 /* Otherwise, load it into a register. */
9002 tem = gen_reg_rtx (mode);
9003 loop_iv_add_mult_emit_before (loop, arg,
9004 v->mult_val, v->add_val,
9005 tem, where_bb, where_insn);
9008 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
9010 if (apply_change_group ())
9014 /* Look for giv with positive constant mult_val and nonconst add_val.
9015 Insert insns to calculate new compare value.
9016 ??? Turn this off due to possible overflow. */
9018 for (v = bl->giv; v; v = v->next_iv)
9019 if (GET_CODE (v->mult_val) == CONST_INT
9020 && INTVAL (v->mult_val) > 0
9021 && ! v->ignore && ! v->maybe_dead && v->always_computable
9027 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
9033 tem = gen_reg_rtx (mode);
9035 /* Replace biv with giv's reduced register. */
9036 validate_change (insn, &XEXP (x, 1 - arg_operand),
9039 /* Compute value to compare against. */
9040 loop_iv_add_mult_emit_before (loop, arg,
9041 v->mult_val, v->add_val,
9042 tem, where_bb, where_insn);
9043 /* Use it in this insn. */
9044 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
9045 if (apply_change_group ())
9049 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
9051 if (loop_invariant_p (loop, arg) == 1)
9053 /* Look for giv with constant positive mult_val and nonconst
9054 add_val. Insert insns to compute new compare value.
9055 ??? Turn this off due to possible overflow. */
9057 for (v = bl->giv; v; v = v->next_iv)
9058 if (GET_CODE (v->mult_val) == CONST_INT && INTVAL (v->mult_val) > 0
9059 && ! v->ignore && ! v->maybe_dead && v->always_computable
9065 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
9071 tem = gen_reg_rtx (mode);
9073 /* Replace biv with giv's reduced register. */
9074 validate_change (insn, &XEXP (x, 1 - arg_operand),
9077 /* Compute value to compare against. */
9078 loop_iv_add_mult_emit_before (loop, arg,
9079 v->mult_val, v->add_val,
9080 tem, where_bb, where_insn);
9081 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
9082 if (apply_change_group ())
9087 /* This code has problems. Basically, you can't know when
9088 seeing if we will eliminate BL, whether a particular giv
9089 of ARG will be reduced. If it isn't going to be reduced,
9090 we can't eliminate BL. We can try forcing it to be reduced,
9091 but that can generate poor code.
9093 The problem is that the benefit of reducing TV, below should
9094 be increased if BL can actually be eliminated, but this means
9095 we might have to do a topological sort of the order in which
9096 we try to process biv. It doesn't seem worthwhile to do
9097 this sort of thing now. */
9100 /* Otherwise the reg compared with had better be a biv. */
9101 if (GET_CODE (arg) != REG
9102 || REG_IV_TYPE (ivs, REGNO (arg)) != BASIC_INDUCT)
9105 /* Look for a pair of givs, one for each biv,
9106 with identical coefficients. */
9107 for (v = bl->giv; v; v = v->next_iv)
9109 struct induction *tv;
9111 if (v->ignore || v->maybe_dead || v->mode != mode)
9114 for (tv = REG_IV_CLASS (ivs, REGNO (arg))->giv; tv;
9116 if (! tv->ignore && ! tv->maybe_dead
9117 && rtx_equal_p (tv->mult_val, v->mult_val)
9118 && rtx_equal_p (tv->add_val, v->add_val)
9119 && tv->mode == mode)
9121 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
9127 /* Replace biv with its giv's reduced reg. */
9128 XEXP (x, 1 - arg_operand) = v->new_reg;
9129 /* Replace other operand with the other giv's
9131 XEXP (x, arg_operand) = tv->new_reg;
9138 /* If we get here, the biv can't be eliminated. */
9142 /* If this address is a DEST_ADDR giv, it doesn't matter if the
9143 biv is used in it, since it will be replaced. */
9144 for (v = bl->giv; v; v = v->next_iv)
9145 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
9153 /* See if any subexpression fails elimination. */
9154 fmt = GET_RTX_FORMAT (code);
9155 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
9160 if (! maybe_eliminate_biv_1 (loop, XEXP (x, i), insn, bl,
9161 eliminate_p, where_bb, where_insn))
9166 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9167 if (! maybe_eliminate_biv_1 (loop, XVECEXP (x, i, j), insn, bl,
9168 eliminate_p, where_bb, where_insn))
9177 /* Return nonzero if the last use of REG
9178 is in an insn following INSN in the same basic block. */
9181 last_use_this_basic_block (reg, insn)
9187 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
9190 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
9196 /* Called via `note_stores' to record the initial value of a biv. Here we
9197 just record the location of the set and process it later. */
9200 record_initial (dest, set, data)
9203 void *data ATTRIBUTE_UNUSED;
9205 struct loop_ivs *ivs = (struct loop_ivs *) data;
9206 struct iv_class *bl;
9208 if (GET_CODE (dest) != REG
9209 || REGNO (dest) >= ivs->n_regs
9210 || REG_IV_TYPE (ivs, REGNO (dest)) != BASIC_INDUCT)
9213 bl = REG_IV_CLASS (ivs, REGNO (dest));
9215 /* If this is the first set found, record it. */
9216 if (bl->init_insn == 0)
9218 bl->init_insn = note_insn;
9223 /* If any of the registers in X are "old" and currently have a last use earlier
9224 than INSN, update them to have a last use of INSN. Their actual last use
9225 will be the previous insn but it will not have a valid uid_luid so we can't
9226 use it. X must be a source expression only. */
9229 update_reg_last_use (x, insn)
9233 /* Check for the case where INSN does not have a valid luid. In this case,
9234 there is no need to modify the regno_last_uid, as this can only happen
9235 when code is inserted after the loop_end to set a pseudo's final value,
9236 and hence this insn will never be the last use of x.
9237 ???? This comment is not correct. See for example loop_givs_reduce.
9238 This may insert an insn before another new insn. */
9239 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
9240 && INSN_UID (insn) < max_uid_for_loop
9241 && REGNO_LAST_LUID (REGNO (x)) < INSN_LUID (insn))
9243 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
9248 const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
9249 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
9252 update_reg_last_use (XEXP (x, i), insn);
9253 else if (fmt[i] == 'E')
9254 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9255 update_reg_last_use (XVECEXP (x, i, j), insn);
9260 /* Given an insn INSN and condition COND, return the condition in a
9261 canonical form to simplify testing by callers. Specifically:
9263 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
9264 (2) Both operands will be machine operands; (cc0) will have been replaced.
9265 (3) If an operand is a constant, it will be the second operand.
9266 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
9267 for GE, GEU, and LEU.
9269 If the condition cannot be understood, or is an inequality floating-point
9270 comparison which needs to be reversed, 0 will be returned.
9272 If REVERSE is nonzero, then reverse the condition prior to canonizing it.
9274 If EARLIEST is nonzero, it is a pointer to a place where the earliest
9275 insn used in locating the condition was found. If a replacement test
9276 of the condition is desired, it should be placed in front of that
9277 insn and we will be sure that the inputs are still valid.
9279 If WANT_REG is nonzero, we wish the condition to be relative to that
9280 register, if possible. Therefore, do not canonicalize the condition
9284 canonicalize_condition (insn, cond, reverse, earliest, want_reg)
9296 int reverse_code = 0;
9297 enum machine_mode mode;
9299 code = GET_CODE (cond);
9300 mode = GET_MODE (cond);
9301 op0 = XEXP (cond, 0);
9302 op1 = XEXP (cond, 1);
9305 code = reversed_comparison_code (cond, insn);
9306 if (code == UNKNOWN)
9312 /* If we are comparing a register with zero, see if the register is set
9313 in the previous insn to a COMPARE or a comparison operation. Perform
9314 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
9317 while (GET_RTX_CLASS (code) == '<'
9318 && op1 == CONST0_RTX (GET_MODE (op0))
9321 /* Set nonzero when we find something of interest. */
9325 /* If comparison with cc0, import actual comparison from compare
9329 if ((prev = prev_nonnote_insn (prev)) == 0
9330 || GET_CODE (prev) != INSN
9331 || (set = single_set (prev)) == 0
9332 || SET_DEST (set) != cc0_rtx)
9335 op0 = SET_SRC (set);
9336 op1 = CONST0_RTX (GET_MODE (op0));
9342 /* If this is a COMPARE, pick up the two things being compared. */
9343 if (GET_CODE (op0) == COMPARE)
9345 op1 = XEXP (op0, 1);
9346 op0 = XEXP (op0, 0);
9349 else if (GET_CODE (op0) != REG)
9352 /* Go back to the previous insn. Stop if it is not an INSN. We also
9353 stop if it isn't a single set or if it has a REG_INC note because
9354 we don't want to bother dealing with it. */
9356 if ((prev = prev_nonnote_insn (prev)) == 0
9357 || GET_CODE (prev) != INSN
9358 || FIND_REG_INC_NOTE (prev, NULL_RTX))
9361 set = set_of (op0, prev);
9364 && (GET_CODE (set) != SET
9365 || !rtx_equal_p (SET_DEST (set), op0)))
9368 /* If this is setting OP0, get what it sets it to if it looks
9372 enum machine_mode inner_mode = GET_MODE (SET_DEST (set));
9373 #ifdef FLOAT_STORE_FLAG_VALUE
9374 REAL_VALUE_TYPE fsfv;
9377 /* ??? We may not combine comparisons done in a CCmode with
9378 comparisons not done in a CCmode. This is to aid targets
9379 like Alpha that have an IEEE compliant EQ instruction, and
9380 a non-IEEE compliant BEQ instruction. The use of CCmode is
9381 actually artificial, simply to prevent the combination, but
9382 should not affect other platforms.
9384 However, we must allow VOIDmode comparisons to match either
9385 CCmode or non-CCmode comparison, because some ports have
9386 modeless comparisons inside branch patterns.
9388 ??? This mode check should perhaps look more like the mode check
9389 in simplify_comparison in combine. */
9391 if ((GET_CODE (SET_SRC (set)) == COMPARE
9394 && GET_MODE_CLASS (inner_mode) == MODE_INT
9395 && (GET_MODE_BITSIZE (inner_mode)
9396 <= HOST_BITS_PER_WIDE_INT)
9397 && (STORE_FLAG_VALUE
9398 & ((HOST_WIDE_INT) 1
9399 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9400 #ifdef FLOAT_STORE_FLAG_VALUE
9402 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9403 && (fsfv = FLOAT_STORE_FLAG_VALUE (inner_mode),
9404 REAL_VALUE_NEGATIVE (fsfv)))
9407 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
9408 && (((GET_MODE_CLASS (mode) == MODE_CC)
9409 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9410 || mode == VOIDmode || inner_mode == VOIDmode))
9412 else if (((code == EQ
9414 && (GET_MODE_BITSIZE (inner_mode)
9415 <= HOST_BITS_PER_WIDE_INT)
9416 && GET_MODE_CLASS (inner_mode) == MODE_INT
9417 && (STORE_FLAG_VALUE
9418 & ((HOST_WIDE_INT) 1
9419 << (GET_MODE_BITSIZE (inner_mode) - 1))))
9420 #ifdef FLOAT_STORE_FLAG_VALUE
9422 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
9423 && (fsfv = FLOAT_STORE_FLAG_VALUE (inner_mode),
9424 REAL_VALUE_NEGATIVE (fsfv)))
9427 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
9428 && (((GET_MODE_CLASS (mode) == MODE_CC)
9429 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9430 || mode == VOIDmode || inner_mode == VOIDmode))
9440 else if (reg_set_p (op0, prev))
9441 /* If this sets OP0, but not directly, we have to give up. */
9446 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
9447 code = GET_CODE (x);
9450 code = reversed_comparison_code (x, prev);
9451 if (code == UNKNOWN)
9456 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
9462 /* If constant is first, put it last. */
9463 if (CONSTANT_P (op0))
9464 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
9466 /* If OP0 is the result of a comparison, we weren't able to find what
9467 was really being compared, so fail. */
9468 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
9471 /* Canonicalize any ordered comparison with integers involving equality
9472 if we can do computations in the relevant mode and we do not
9475 if (GET_CODE (op1) == CONST_INT
9476 && GET_MODE (op0) != VOIDmode
9477 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
9479 HOST_WIDE_INT const_val = INTVAL (op1);
9480 unsigned HOST_WIDE_INT uconst_val = const_val;
9481 unsigned HOST_WIDE_INT max_val
9482 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
9487 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
9488 code = LT, op1 = gen_int_mode (const_val + 1, GET_MODE (op0));
9491 /* When cross-compiling, const_val might be sign-extended from
9492 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9494 if ((HOST_WIDE_INT) (const_val & max_val)
9495 != (((HOST_WIDE_INT) 1
9496 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
9497 code = GT, op1 = gen_int_mode (const_val - 1, GET_MODE (op0));
9501 if (uconst_val < max_val)
9502 code = LTU, op1 = gen_int_mode (uconst_val + 1, GET_MODE (op0));
9506 if (uconst_val != 0)
9507 code = GTU, op1 = gen_int_mode (uconst_val - 1, GET_MODE (op0));
9515 /* Never return CC0; return zero instead. */
9519 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
9522 /* Given a jump insn JUMP, return the condition that will cause it to branch
9523 to its JUMP_LABEL. If the condition cannot be understood, or is an
9524 inequality floating-point comparison which needs to be reversed, 0 will
9527 If EARLIEST is nonzero, it is a pointer to a place where the earliest
9528 insn used in locating the condition was found. If a replacement test
9529 of the condition is desired, it should be placed in front of that
9530 insn and we will be sure that the inputs are still valid. */
9533 get_condition (jump, earliest)
9541 /* If this is not a standard conditional jump, we can't parse it. */
9542 if (GET_CODE (jump) != JUMP_INSN
9543 || ! any_condjump_p (jump))
9545 set = pc_set (jump);
9547 cond = XEXP (SET_SRC (set), 0);
9549 /* If this branches to JUMP_LABEL when the condition is false, reverse
9552 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
9553 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump);
9555 return canonicalize_condition (jump, cond, reverse, earliest, NULL_RTX);
9558 /* Similar to above routine, except that we also put an invariant last
9559 unless both operands are invariants. */
9562 get_condition_for_loop (loop, x)
9563 const struct loop *loop;
9566 rtx comparison = get_condition (x, (rtx*) 0);
9569 || ! loop_invariant_p (loop, XEXP (comparison, 0))
9570 || loop_invariant_p (loop, XEXP (comparison, 1)))
9573 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
9574 XEXP (comparison, 1), XEXP (comparison, 0));
9577 /* Scan the function and determine whether it has indirect (computed) jumps.
9579 This is taken mostly from flow.c; similar code exists elsewhere
9580 in the compiler. It may be useful to put this into rtlanal.c. */
9582 indirect_jump_in_function_p (start)
9587 for (insn = start; insn; insn = NEXT_INSN (insn))
9588 if (computed_jump_p (insn))
9594 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9595 documentation for LOOP_MEMS for the definition of `appropriate'.
9596 This function is called from prescan_loop via for_each_rtx. */
9599 insert_loop_mem (mem, data)
9601 void *data ATTRIBUTE_UNUSED;
9603 struct loop_info *loop_info = data;
9610 switch (GET_CODE (m))
9616 /* We're not interested in MEMs that are only clobbered. */
9620 /* We're not interested in the MEM associated with a
9621 CONST_DOUBLE, so there's no need to traverse into this. */
9625 /* We're not interested in any MEMs that only appear in notes. */
9629 /* This is not a MEM. */
9633 /* See if we've already seen this MEM. */
9634 for (i = 0; i < loop_info->mems_idx; ++i)
9635 if (rtx_equal_p (m, loop_info->mems[i].mem))
9637 if (GET_MODE (m) != GET_MODE (loop_info->mems[i].mem))
9638 /* The modes of the two memory accesses are different. If
9639 this happens, something tricky is going on, and we just
9640 don't optimize accesses to this MEM. */
9641 loop_info->mems[i].optimize = 0;
9646 /* Resize the array, if necessary. */
9647 if (loop_info->mems_idx == loop_info->mems_allocated)
9649 if (loop_info->mems_allocated != 0)
9650 loop_info->mems_allocated *= 2;
9652 loop_info->mems_allocated = 32;
9654 loop_info->mems = (loop_mem_info *)
9655 xrealloc (loop_info->mems,
9656 loop_info->mems_allocated * sizeof (loop_mem_info));
9659 /* Actually insert the MEM. */
9660 loop_info->mems[loop_info->mems_idx].mem = m;
9661 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9662 because we can't put it in a register. We still store it in the
9663 table, though, so that if we see the same address later, but in a
9664 non-BLK mode, we'll not think we can optimize it at that point. */
9665 loop_info->mems[loop_info->mems_idx].optimize = (GET_MODE (m) != BLKmode);
9666 loop_info->mems[loop_info->mems_idx].reg = NULL_RTX;
9667 ++loop_info->mems_idx;
9673 /* Allocate REGS->ARRAY or reallocate it if it is too small.
9675 Increment REGS->ARRAY[I].SET_IN_LOOP at the index I of each
9676 register that is modified by an insn between FROM and TO. If the
9677 value of an element of REGS->array[I].SET_IN_LOOP becomes 127 or
9678 more, stop incrementing it, to avoid overflow.
9680 Store in REGS->ARRAY[I].SINGLE_USAGE the single insn in which
9681 register I is used, if it is only used once. Otherwise, it is set
9682 to 0 (for no uses) or const0_rtx for more than one use. This
9683 parameter may be zero, in which case this processing is not done.
9685 Set REGS->ARRAY[I].MAY_NOT_OPTIMIZE nonzero if we should not
9686 optimize register I. */
9689 loop_regs_scan (loop, extra_size)
9690 const struct loop *loop;
9693 struct loop_regs *regs = LOOP_REGS (loop);
9695 /* last_set[n] is nonzero iff reg n has been set in the current
9696 basic block. In that case, it is the insn that last set reg n. */
9701 old_nregs = regs->num;
9702 regs->num = max_reg_num ();
9704 /* Grow the regs array if not allocated or too small. */
9705 if (regs->num >= regs->size)
9707 regs->size = regs->num + extra_size;
9709 regs->array = (struct loop_reg *)
9710 xrealloc (regs->array, regs->size * sizeof (*regs->array));
9712 /* Zero the new elements. */
9713 memset (regs->array + old_nregs, 0,
9714 (regs->size - old_nregs) * sizeof (*regs->array));
9717 /* Clear previously scanned fields but do not clear n_times_set. */
9718 for (i = 0; i < old_nregs; i++)
9720 regs->array[i].set_in_loop = 0;
9721 regs->array[i].may_not_optimize = 0;
9722 regs->array[i].single_usage = NULL_RTX;
9725 last_set = (rtx *) xcalloc (regs->num, sizeof (rtx));
9727 /* Scan the loop, recording register usage. */
9728 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
9729 insn = NEXT_INSN (insn))
9733 /* Record registers that have exactly one use. */
9734 find_single_use_in_loop (regs, insn, PATTERN (insn));
9736 /* Include uses in REG_EQUAL notes. */
9737 if (REG_NOTES (insn))
9738 find_single_use_in_loop (regs, insn, REG_NOTES (insn));
9740 if (GET_CODE (PATTERN (insn)) == SET
9741 || GET_CODE (PATTERN (insn)) == CLOBBER)
9742 count_one_set (regs, insn, PATTERN (insn), last_set);
9743 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
9746 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
9747 count_one_set (regs, insn, XVECEXP (PATTERN (insn), 0, i),
9752 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
9753 memset (last_set, 0, regs->num * sizeof (rtx));
9755 /* Invalidate all registers used for function argument passing.
9756 We check rtx_varies_p for the same reason as below, to allow
9757 optimizing PIC calculations. */
9758 if (GET_CODE (insn) == CALL_INSN)
9761 for (link = CALL_INSN_FUNCTION_USAGE (insn);
9763 link = XEXP (link, 1))
9767 if (GET_CODE (op = XEXP (link, 0)) == USE
9768 && GET_CODE (reg = XEXP (op, 0)) == REG
9769 && rtx_varies_p (reg, 1))
9770 regs->array[REGNO (reg)].may_not_optimize = 1;
9775 /* Invalidate all hard registers clobbered by calls. With one exception:
9776 a call-clobbered PIC register is still function-invariant for our
9777 purposes, since we can hoist any PIC calculations out of the loop.
9778 Thus the call to rtx_varies_p. */
9779 if (LOOP_INFO (loop)->has_call)
9780 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
9781 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)
9782 && rtx_varies_p (regno_reg_rtx[i], 1))
9784 regs->array[i].may_not_optimize = 1;
9785 regs->array[i].set_in_loop = 1;
9788 #ifdef AVOID_CCMODE_COPIES
9789 /* Don't try to move insns which set CC registers if we should not
9790 create CCmode register copies. */
9791 for (i = regs->num - 1; i >= FIRST_PSEUDO_REGISTER; i--)
9792 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
9793 regs->array[i].may_not_optimize = 1;
9796 /* Set regs->array[I].n_times_set for the new registers. */
9797 for (i = old_nregs; i < regs->num; i++)
9798 regs->array[i].n_times_set = regs->array[i].set_in_loop;
9803 /* Returns the number of real INSNs in the LOOP. */
9806 count_insns_in_loop (loop)
9807 const struct loop *loop;
9812 for (insn = loop->top ? loop->top : loop->start; insn != loop->end;
9813 insn = NEXT_INSN (insn))
9820 /* Move MEMs into registers for the duration of the loop. */
9824 const struct loop *loop;
9826 struct loop_info *loop_info = LOOP_INFO (loop);
9827 struct loop_regs *regs = LOOP_REGS (loop);
9828 int maybe_never = 0;
9830 rtx p, prev_ebb_head;
9831 rtx label = NULL_RTX;
9833 /* Nonzero if the next instruction may never be executed. */
9834 int next_maybe_never = 0;
9835 unsigned int last_max_reg = max_reg_num ();
9837 if (loop_info->mems_idx == 0)
9840 /* We cannot use next_label here because it skips over normal insns. */
9841 end_label = next_nonnote_insn (loop->end);
9842 if (end_label && GET_CODE (end_label) != CODE_LABEL)
9843 end_label = NULL_RTX;
9845 /* Check to see if it's possible that some instructions in the loop are
9846 never executed. Also check if there is a goto out of the loop other
9847 than right after the end of the loop. */
9848 for (p = next_insn_in_loop (loop, loop->scan_start);
9850 p = next_insn_in_loop (loop, p))
9852 if (GET_CODE (p) == CODE_LABEL)
9854 else if (GET_CODE (p) == JUMP_INSN
9855 /* If we enter the loop in the middle, and scan
9856 around to the beginning, don't set maybe_never
9857 for that. This must be an unconditional jump,
9858 otherwise the code at the top of the loop might
9859 never be executed. Unconditional jumps are
9860 followed a by barrier then loop end. */
9861 && ! (GET_CODE (p) == JUMP_INSN
9862 && JUMP_LABEL (p) == loop->top
9863 && NEXT_INSN (NEXT_INSN (p)) == loop->end
9864 && any_uncondjump_p (p)))
9866 /* If this is a jump outside of the loop but not right
9867 after the end of the loop, we would have to emit new fixup
9868 sequences for each such label. */
9869 if (/* If we can't tell where control might go when this
9870 JUMP_INSN is executed, we must be conservative. */
9872 || (JUMP_LABEL (p) != end_label
9873 && (INSN_UID (JUMP_LABEL (p)) >= max_uid_for_loop
9874 || INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop->start)
9875 || INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop->end))))
9878 if (!any_condjump_p (p))
9879 /* Something complicated. */
9882 /* If there are any more instructions in the loop, they
9883 might not be reached. */
9884 next_maybe_never = 1;
9886 else if (next_maybe_never)
9890 /* Find start of the extended basic block that enters the loop. */
9891 for (p = loop->start;
9892 PREV_INSN (p) && GET_CODE (p) != CODE_LABEL;
9899 /* Build table of mems that get set to constant values before the
9901 for (; p != loop->start; p = NEXT_INSN (p))
9902 cselib_process_insn (p);
9904 /* Actually move the MEMs. */
9905 for (i = 0; i < loop_info->mems_idx; ++i)
9907 regset_head load_copies;
9908 regset_head store_copies;
9911 rtx mem = loop_info->mems[i].mem;
9914 if (MEM_VOLATILE_P (mem)
9915 || loop_invariant_p (loop, XEXP (mem, 0)) != 1)
9916 /* There's no telling whether or not MEM is modified. */
9917 loop_info->mems[i].optimize = 0;
9919 /* Go through the MEMs written to in the loop to see if this
9920 one is aliased by one of them. */
9921 mem_list_entry = loop_info->store_mems;
9922 while (mem_list_entry)
9924 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
9926 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
9929 /* MEM is indeed aliased by this store. */
9930 loop_info->mems[i].optimize = 0;
9933 mem_list_entry = XEXP (mem_list_entry, 1);
9936 if (flag_float_store && written
9937 && GET_MODE_CLASS (GET_MODE (mem)) == MODE_FLOAT)
9938 loop_info->mems[i].optimize = 0;
9940 /* If this MEM is written to, we must be sure that there
9941 are no reads from another MEM that aliases this one. */
9942 if (loop_info->mems[i].optimize && written)
9946 for (j = 0; j < loop_info->mems_idx; ++j)
9950 else if (true_dependence (mem,
9952 loop_info->mems[j].mem,
9955 /* It's not safe to hoist loop_info->mems[i] out of
9956 the loop because writes to it might not be
9957 seen by reads from loop_info->mems[j]. */
9958 loop_info->mems[i].optimize = 0;
9964 if (maybe_never && may_trap_p (mem))
9965 /* We can't access the MEM outside the loop; it might
9966 cause a trap that wouldn't have happened otherwise. */
9967 loop_info->mems[i].optimize = 0;
9969 if (!loop_info->mems[i].optimize)
9970 /* We thought we were going to lift this MEM out of the
9971 loop, but later discovered that we could not. */
9974 INIT_REG_SET (&load_copies);
9975 INIT_REG_SET (&store_copies);
9977 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9978 order to keep scan_loop from moving stores to this MEM
9979 out of the loop just because this REG is neither a
9980 user-variable nor used in the loop test. */
9981 reg = gen_reg_rtx (GET_MODE (mem));
9982 REG_USERVAR_P (reg) = 1;
9983 loop_info->mems[i].reg = reg;
9985 /* Now, replace all references to the MEM with the
9986 corresponding pseudos. */
9988 for (p = next_insn_in_loop (loop, loop->scan_start);
9990 p = next_insn_in_loop (loop, p))
9996 set = single_set (p);
9998 /* See if this copies the mem into a register that isn't
9999 modified afterwards. We'll try to do copy propagation
10000 a little further on. */
10002 /* @@@ This test is _way_ too conservative. */
10004 && GET_CODE (SET_DEST (set)) == REG
10005 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
10006 && REGNO (SET_DEST (set)) < last_max_reg
10007 && regs->array[REGNO (SET_DEST (set))].n_times_set == 1
10008 && rtx_equal_p (SET_SRC (set), mem))
10009 SET_REGNO_REG_SET (&load_copies, REGNO (SET_DEST (set)));
10011 /* See if this copies the mem from a register that isn't
10012 modified afterwards. We'll try to remove the
10013 redundant copy later on by doing a little register
10014 renaming and copy propagation. This will help
10015 to untangle things for the BIV detection code. */
10018 && GET_CODE (SET_SRC (set)) == REG
10019 && REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER
10020 && REGNO (SET_SRC (set)) < last_max_reg
10021 && regs->array[REGNO (SET_SRC (set))].n_times_set == 1
10022 && rtx_equal_p (SET_DEST (set), mem))
10023 SET_REGNO_REG_SET (&store_copies, REGNO (SET_SRC (set)));
10025 /* If this is a call which uses / clobbers this memory
10026 location, we must not change the interface here. */
10027 if (GET_CODE (p) == CALL_INSN
10028 && reg_mentioned_p (loop_info->mems[i].mem,
10029 CALL_INSN_FUNCTION_USAGE (p)))
10031 cancel_changes (0);
10032 loop_info->mems[i].optimize = 0;
10036 /* Replace the memory reference with the shadow register. */
10037 replace_loop_mems (p, loop_info->mems[i].mem,
10038 loop_info->mems[i].reg, written);
10041 if (GET_CODE (p) == CODE_LABEL
10042 || GET_CODE (p) == JUMP_INSN)
10046 if (! loop_info->mems[i].optimize)
10047 ; /* We found we couldn't do the replacement, so do nothing. */
10048 else if (! apply_change_group ())
10049 /* We couldn't replace all occurrences of the MEM. */
10050 loop_info->mems[i].optimize = 0;
10053 /* Load the memory immediately before LOOP->START, which is
10054 the NOTE_LOOP_BEG. */
10055 cselib_val *e = cselib_lookup (mem, VOIDmode, 0);
10059 struct elt_loc_list *const_equiv = 0;
10063 struct elt_loc_list *equiv;
10064 struct elt_loc_list *best_equiv = 0;
10065 for (equiv = e->locs; equiv; equiv = equiv->next)
10067 if (CONSTANT_P (equiv->loc))
10068 const_equiv = equiv;
10069 else if (GET_CODE (equiv->loc) == REG
10070 /* Extending hard register lifetimes causes crash
10071 on SRC targets. Doing so on non-SRC is
10072 probably also not good idea, since we most
10073 probably have pseudoregister equivalence as
10075 && REGNO (equiv->loc) >= FIRST_PSEUDO_REGISTER)
10076 best_equiv = equiv;
10078 /* Use the constant equivalence if that is cheap enough. */
10080 best_equiv = const_equiv;
10081 else if (const_equiv
10082 && (rtx_cost (const_equiv->loc, SET)
10083 <= rtx_cost (best_equiv->loc, SET)))
10085 best_equiv = const_equiv;
10089 /* If best_equiv is nonzero, we know that MEM is set to a
10090 constant or register before the loop. We will use this
10091 knowledge to initialize the shadow register with that
10092 constant or reg rather than by loading from MEM. */
10094 best = copy_rtx (best_equiv->loc);
10097 set = gen_move_insn (reg, best);
10098 set = loop_insn_hoist (loop, set);
10101 for (p = prev_ebb_head; p != loop->start; p = NEXT_INSN (p))
10102 if (REGNO_LAST_UID (REGNO (best)) == INSN_UID (p))
10104 REGNO_LAST_UID (REGNO (best)) = INSN_UID (set);
10110 set_unique_reg_note (set, REG_EQUAL, copy_rtx (const_equiv->loc));
10114 if (label == NULL_RTX)
10116 label = gen_label_rtx ();
10117 emit_label_after (label, loop->end);
10120 /* Store the memory immediately after END, which is
10121 the NOTE_LOOP_END. */
10122 set = gen_move_insn (copy_rtx (mem), reg);
10123 loop_insn_emit_after (loop, 0, label, set);
10126 if (loop_dump_stream)
10128 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
10129 REGNO (reg), (written ? "r/w" : "r/o"));
10130 print_rtl (loop_dump_stream, mem);
10131 fputc ('\n', loop_dump_stream);
10134 /* Attempt a bit of copy propagation. This helps untangle the
10135 data flow, and enables {basic,general}_induction_var to find
10137 EXECUTE_IF_SET_IN_REG_SET
10138 (&load_copies, FIRST_PSEUDO_REGISTER, j,
10140 try_copy_prop (loop, reg, j);
10142 CLEAR_REG_SET (&load_copies);
10144 EXECUTE_IF_SET_IN_REG_SET
10145 (&store_copies, FIRST_PSEUDO_REGISTER, j,
10147 try_swap_copy_prop (loop, reg, j);
10149 CLEAR_REG_SET (&store_copies);
10153 if (label != NULL_RTX && end_label != NULL_RTX)
10155 /* Now, we need to replace all references to the previous exit
10156 label with the new one. */
10157 replace_label_data rr;
10160 rr.update_label_nuses = true;
10162 for (p = loop->start; p != loop->end; p = NEXT_INSN (p))
10164 for_each_rtx (&p, replace_label, &rr);
10171 /* For communication between note_reg_stored and its caller. */
10172 struct note_reg_stored_arg
10178 /* Called via note_stores, record in SET_SEEN whether X, which is written,
10179 is equal to ARG. */
10181 note_reg_stored (x, setter, arg)
10182 rtx x, setter ATTRIBUTE_UNUSED;
10185 struct note_reg_stored_arg *t = (struct note_reg_stored_arg *) arg;
10190 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
10191 There must be exactly one insn that sets this pseudo; it will be
10192 deleted if all replacements succeed and we can prove that the register
10193 is not used after the loop. */
10196 try_copy_prop (loop, replacement, regno)
10197 const struct loop *loop;
10199 unsigned int regno;
10201 /* This is the reg that we are copying from. */
10202 rtx reg_rtx = regno_reg_rtx[regno];
10205 /* These help keep track of whether we replaced all uses of the reg. */
10206 int replaced_last = 0;
10207 int store_is_first = 0;
10209 for (insn = next_insn_in_loop (loop, loop->scan_start);
10211 insn = next_insn_in_loop (loop, insn))
10215 /* Only substitute within one extended basic block from the initializing
10217 if (GET_CODE (insn) == CODE_LABEL && init_insn)
10220 if (! INSN_P (insn))
10223 /* Is this the initializing insn? */
10224 set = single_set (insn);
10226 && GET_CODE (SET_DEST (set)) == REG
10227 && REGNO (SET_DEST (set)) == regno)
10233 if (REGNO_FIRST_UID (regno) == INSN_UID (insn))
10234 store_is_first = 1;
10237 /* Only substitute after seeing the initializing insn. */
10238 if (init_insn && insn != init_insn)
10240 struct note_reg_stored_arg arg;
10242 replace_loop_regs (insn, reg_rtx, replacement);
10243 if (REGNO_LAST_UID (regno) == INSN_UID (insn))
10246 /* Stop replacing when REPLACEMENT is modified. */
10247 arg.reg = replacement;
10249 note_stores (PATTERN (insn), note_reg_stored, &arg);
10252 rtx note = find_reg_note (insn, REG_EQUAL, NULL);
10254 /* It is possible that we've turned previously valid REG_EQUAL to
10255 invalid, as we change the REGNO to REPLACEMENT and unlike REGNO,
10256 REPLACEMENT is modified, we get different meaning. */
10257 if (note && reg_mentioned_p (replacement, XEXP (note, 0)))
10258 remove_note (insn, note);
10265 if (apply_change_group ())
10267 if (loop_dump_stream)
10268 fprintf (loop_dump_stream, " Replaced reg %d", regno);
10269 if (store_is_first && replaced_last)
10274 /* Assume we're just deleting INIT_INSN. */
10276 /* Look for REG_RETVAL note. If we're deleting the end of
10277 the libcall sequence, the whole sequence can go. */
10278 retval_note = find_reg_note (init_insn, REG_RETVAL, NULL_RTX);
10279 /* If we found a REG_RETVAL note, find the first instruction
10280 in the sequence. */
10282 first = XEXP (retval_note, 0);
10284 /* Delete the instructions. */
10285 loop_delete_insns (first, init_insn);
10287 if (loop_dump_stream)
10288 fprintf (loop_dump_stream, ".\n");
10292 /* Replace all the instructions from FIRST up to and including LAST
10293 with NOTE_INSN_DELETED notes. */
10296 loop_delete_insns (first, last)
10302 if (loop_dump_stream)
10303 fprintf (loop_dump_stream, ", deleting init_insn (%d)",
10305 delete_insn (first);
10307 /* If this was the LAST instructions we're supposed to delete,
10312 first = NEXT_INSN (first);
10316 /* Try to replace occurrences of pseudo REGNO with REPLACEMENT within
10317 loop LOOP if the order of the sets of these registers can be
10318 swapped. There must be exactly one insn within the loop that sets
10319 this pseudo followed immediately by a move insn that sets
10320 REPLACEMENT with REGNO. */
10322 try_swap_copy_prop (loop, replacement, regno)
10323 const struct loop *loop;
10325 unsigned int regno;
10328 rtx set = NULL_RTX;
10329 unsigned int new_regno;
10331 new_regno = REGNO (replacement);
10333 for (insn = next_insn_in_loop (loop, loop->scan_start);
10335 insn = next_insn_in_loop (loop, insn))
10337 /* Search for the insn that copies REGNO to NEW_REGNO? */
10339 && (set = single_set (insn))
10340 && GET_CODE (SET_DEST (set)) == REG
10341 && REGNO (SET_DEST (set)) == new_regno
10342 && GET_CODE (SET_SRC (set)) == REG
10343 && REGNO (SET_SRC (set)) == regno)
10347 if (insn != NULL_RTX)
10352 /* Some DEF-USE info would come in handy here to make this
10353 function more general. For now, just check the previous insn
10354 which is the most likely candidate for setting REGNO. */
10356 prev_insn = PREV_INSN (insn);
10359 && (prev_set = single_set (prev_insn))
10360 && GET_CODE (SET_DEST (prev_set)) == REG
10361 && REGNO (SET_DEST (prev_set)) == regno)
10364 (set (reg regno) (expr))
10365 (set (reg new_regno) (reg regno))
10367 so try converting this to:
10368 (set (reg new_regno) (expr))
10369 (set (reg regno) (reg new_regno))
10371 The former construct is often generated when a global
10372 variable used for an induction variable is shadowed by a
10373 register (NEW_REGNO). The latter construct improves the
10374 chances of GIV replacement and BIV elimination. */
10376 validate_change (prev_insn, &SET_DEST (prev_set),
10378 validate_change (insn, &SET_DEST (set),
10380 validate_change (insn, &SET_SRC (set),
10383 if (apply_change_group ())
10385 if (loop_dump_stream)
10386 fprintf (loop_dump_stream,
10387 " Swapped set of reg %d at %d with reg %d at %d.\n",
10388 regno, INSN_UID (insn),
10389 new_regno, INSN_UID (prev_insn));
10391 /* Update first use of REGNO. */
10392 if (REGNO_FIRST_UID (regno) == INSN_UID (prev_insn))
10393 REGNO_FIRST_UID (regno) = INSN_UID (insn);
10395 /* Now perform copy propagation to hopefully
10396 remove all uses of REGNO within the loop. */
10397 try_copy_prop (loop, replacement, regno);
10403 /* Worker function for find_mem_in_note, called via for_each_rtx. */
10406 find_mem_in_note_1 (x, data)
10410 if (*x != NULL_RTX && GET_CODE (*x) == MEM)
10412 rtx *res = (rtx *) data;
10419 /* Returns the first MEM found in NOTE by depth-first search. */
10422 find_mem_in_note (note)
10425 if (note && for_each_rtx (¬e, find_mem_in_note_1, ¬e))
10430 /* Replace MEM with its associated pseudo register. This function is
10431 called from load_mems via for_each_rtx. DATA is actually a pointer
10432 to a structure describing the instruction currently being scanned
10433 and the MEM we are currently replacing. */
10436 replace_loop_mem (mem, data)
10440 loop_replace_args *args = (loop_replace_args *) data;
10446 switch (GET_CODE (m))
10452 /* We're not interested in the MEM associated with a
10453 CONST_DOUBLE, so there's no need to traverse into one. */
10457 /* This is not a MEM. */
10461 if (!rtx_equal_p (args->match, m))
10462 /* This is not the MEM we are currently replacing. */
10465 /* Actually replace the MEM. */
10466 validate_change (args->insn, mem, args->replacement, 1);
10472 replace_loop_mems (insn, mem, reg, written)
10478 loop_replace_args args;
10482 args.replacement = reg;
10484 for_each_rtx (&insn, replace_loop_mem, &args);
10486 /* If we hoist a mem write out of the loop, then REG_EQUAL
10487 notes referring to the mem are no longer valid. */
10493 for (link = ®_NOTES (insn); (note = *link); link = &XEXP (note, 1))
10495 if (REG_NOTE_KIND (note) == REG_EQUAL
10496 && (sub = find_mem_in_note (note))
10497 && true_dependence (mem, VOIDmode, sub, rtx_varies_p))
10499 /* Remove the note. */
10500 validate_change (NULL_RTX, link, XEXP (note, 1), 1);
10507 /* Replace one register with another. Called through for_each_rtx; PX points
10508 to the rtx being scanned. DATA is actually a pointer to
10509 a structure of arguments. */
10512 replace_loop_reg (px, data)
10517 loop_replace_args *args = (loop_replace_args *) data;
10522 if (x == args->match)
10523 validate_change (args->insn, px, args->replacement, 1);
10529 replace_loop_regs (insn, reg, replacement)
10534 loop_replace_args args;
10538 args.replacement = replacement;
10540 for_each_rtx (&insn, replace_loop_reg, &args);
10543 /* Emit insn for PATTERN after WHERE_INSN in basic block WHERE_BB
10544 (ignored in the interim). */
10547 loop_insn_emit_after (loop, where_bb, where_insn, pattern)
10548 const struct loop *loop ATTRIBUTE_UNUSED;
10549 basic_block where_bb ATTRIBUTE_UNUSED;
10553 return emit_insn_after (pattern, where_insn);
10557 /* If WHERE_INSN is nonzero emit insn for PATTERN before WHERE_INSN
10558 in basic block WHERE_BB (ignored in the interim) within the loop
10559 otherwise hoist PATTERN into the loop pre-header. */
10562 loop_insn_emit_before (loop, where_bb, where_insn, pattern)
10563 const struct loop *loop;
10564 basic_block where_bb ATTRIBUTE_UNUSED;
10569 return loop_insn_hoist (loop, pattern);
10570 return emit_insn_before (pattern, where_insn);
10574 /* Emit call insn for PATTERN before WHERE_INSN in basic block
10575 WHERE_BB (ignored in the interim) within the loop. */
10578 loop_call_insn_emit_before (loop, where_bb, where_insn, pattern)
10579 const struct loop *loop ATTRIBUTE_UNUSED;
10580 basic_block where_bb ATTRIBUTE_UNUSED;
10584 return emit_call_insn_before (pattern, where_insn);
10588 /* Hoist insn for PATTERN into the loop pre-header. */
10591 loop_insn_hoist (loop, pattern)
10592 const struct loop *loop;
10595 return loop_insn_emit_before (loop, 0, loop->start, pattern);
10599 /* Hoist call insn for PATTERN into the loop pre-header. */
10602 loop_call_insn_hoist (loop, pattern)
10603 const struct loop *loop;
10606 return loop_call_insn_emit_before (loop, 0, loop->start, pattern);
10610 /* Sink insn for PATTERN after the loop end. */
10613 loop_insn_sink (loop, pattern)
10614 const struct loop *loop;
10617 return loop_insn_emit_before (loop, 0, loop->sink, pattern);
10620 /* bl->final_value can be eighter general_operand or PLUS of general_operand
10621 and constant. Emit sequence of instructions to load it into REG. */
10623 gen_load_of_final_value (reg, final_value)
10624 rtx reg, final_value;
10628 final_value = force_operand (final_value, reg);
10629 if (final_value != reg)
10630 emit_move_insn (reg, final_value);
10631 seq = get_insns ();
10636 /* If the loop has multiple exits, emit insn for PATTERN before the
10637 loop to ensure that it will always be executed no matter how the
10638 loop exits. Otherwise, emit the insn for PATTERN after the loop,
10639 since this is slightly more efficient. */
10642 loop_insn_sink_or_swim (loop, pattern)
10643 const struct loop *loop;
10646 if (loop->exit_count)
10647 return loop_insn_hoist (loop, pattern);
10649 return loop_insn_sink (loop, pattern);
10653 loop_ivs_dump (loop, file, verbose)
10654 const struct loop *loop;
10658 struct iv_class *bl;
10661 if (! loop || ! file)
10664 for (bl = LOOP_IVS (loop)->list; bl; bl = bl->next)
10667 fprintf (file, "Loop %d: %d IV classes\n", loop->num, iv_num);
10669 for (bl = LOOP_IVS (loop)->list; bl; bl = bl->next)
10671 loop_iv_class_dump (bl, file, verbose);
10672 fputc ('\n', file);
10678 loop_iv_class_dump (bl, file, verbose)
10679 const struct iv_class *bl;
10681 int verbose ATTRIBUTE_UNUSED;
10683 struct induction *v;
10687 if (! bl || ! file)
10690 fprintf (file, "IV class for reg %d, benefit %d\n",
10691 bl->regno, bl->total_benefit);
10693 fprintf (file, " Init insn %d", INSN_UID (bl->init_insn));
10694 if (bl->initial_value)
10696 fprintf (file, ", init val: ");
10697 print_simple_rtl (file, bl->initial_value);
10699 if (bl->initial_test)
10701 fprintf (file, ", init test: ");
10702 print_simple_rtl (file, bl->initial_test);
10704 fputc ('\n', file);
10706 if (bl->final_value)
10708 fprintf (file, " Final val: ");
10709 print_simple_rtl (file, bl->final_value);
10710 fputc ('\n', file);
10713 if ((incr = biv_total_increment (bl)))
10715 fprintf (file, " Total increment: ");
10716 print_simple_rtl (file, incr);
10717 fputc ('\n', file);
10720 /* List the increments. */
10721 for (i = 0, v = bl->biv; v; v = v->next_iv, i++)
10723 fprintf (file, " Inc%d: insn %d, incr: ", i, INSN_UID (v->insn));
10724 print_simple_rtl (file, v->add_val);
10725 fputc ('\n', file);
10728 /* List the givs. */
10729 for (i = 0, v = bl->giv; v; v = v->next_iv, i++)
10731 fprintf (file, " Giv%d: insn %d, benefit %d, ",
10732 i, INSN_UID (v->insn), v->benefit);
10733 if (v->giv_type == DEST_ADDR)
10734 print_simple_rtl (file, v->mem);
10736 print_simple_rtl (file, single_set (v->insn));
10737 fputc ('\n', file);
10743 loop_biv_dump (v, file, verbose)
10744 const struct induction *v;
10753 REGNO (v->dest_reg), INSN_UID (v->insn));
10754 fprintf (file, " const ");
10755 print_simple_rtl (file, v->add_val);
10757 if (verbose && v->final_value)
10759 fputc ('\n', file);
10760 fprintf (file, " final ");
10761 print_simple_rtl (file, v->final_value);
10764 fputc ('\n', file);
10769 loop_giv_dump (v, file, verbose)
10770 const struct induction *v;
10777 if (v->giv_type == DEST_REG)
10778 fprintf (file, "Giv %d: insn %d",
10779 REGNO (v->dest_reg), INSN_UID (v->insn));
10781 fprintf (file, "Dest address: insn %d",
10782 INSN_UID (v->insn));
10784 fprintf (file, " src reg %d benefit %d",
10785 REGNO (v->src_reg), v->benefit);
10786 fprintf (file, " lifetime %d",
10789 if (v->replaceable)
10790 fprintf (file, " replaceable");
10792 if (v->no_const_addval)
10793 fprintf (file, " ncav");
10795 if (v->ext_dependent)
10797 switch (GET_CODE (v->ext_dependent))
10800 fprintf (file, " ext se");
10803 fprintf (file, " ext ze");
10806 fprintf (file, " ext tr");
10813 fputc ('\n', file);
10814 fprintf (file, " mult ");
10815 print_simple_rtl (file, v->mult_val);
10817 fputc ('\n', file);
10818 fprintf (file, " add ");
10819 print_simple_rtl (file, v->add_val);
10821 if (verbose && v->final_value)
10823 fputc ('\n', file);
10824 fprintf (file, " final ");
10825 print_simple_rtl (file, v->final_value);
10828 fputc ('\n', file);
10834 const struct loop *loop;
10836 loop_ivs_dump (loop, stderr, 1);
10841 debug_iv_class (bl)
10842 const struct iv_class *bl;
10844 loop_iv_class_dump (bl, stderr, 1);
10850 const struct induction *v;
10852 loop_biv_dump (v, stderr, 1);
10858 const struct induction *v;
10860 loop_giv_dump (v, stderr, 1);
10864 #define LOOP_BLOCK_NUM_1(INSN) \
10865 ((INSN) ? (BLOCK_FOR_INSN (INSN) ? BLOCK_NUM (INSN) : - 1) : -1)
10867 /* The notes do not have an assigned block, so look at the next insn. */
10868 #define LOOP_BLOCK_NUM(INSN) \
10869 ((INSN) ? (GET_CODE (INSN) == NOTE \
10870 ? LOOP_BLOCK_NUM_1 (next_nonnote_insn (INSN)) \
10871 : LOOP_BLOCK_NUM_1 (INSN)) \
10874 #define LOOP_INSN_UID(INSN) ((INSN) ? INSN_UID (INSN) : -1)
10877 loop_dump_aux (loop, file, verbose)
10878 const struct loop *loop;
10880 int verbose ATTRIBUTE_UNUSED;
10884 if (! loop || ! file)
10887 /* Print diagnostics to compare our concept of a loop with
10888 what the loop notes say. */
10889 if (! PREV_INSN (loop->first->head)
10890 || GET_CODE (PREV_INSN (loop->first->head)) != NOTE
10891 || NOTE_LINE_NUMBER (PREV_INSN (loop->first->head))
10892 != NOTE_INSN_LOOP_BEG)
10893 fprintf (file, ";; No NOTE_INSN_LOOP_BEG at %d\n",
10894 INSN_UID (PREV_INSN (loop->first->head)));
10895 if (! NEXT_INSN (loop->last->end)
10896 || GET_CODE (NEXT_INSN (loop->last->end)) != NOTE
10897 || NOTE_LINE_NUMBER (NEXT_INSN (loop->last->end))
10898 != NOTE_INSN_LOOP_END)
10899 fprintf (file, ";; No NOTE_INSN_LOOP_END at %d\n",
10900 INSN_UID (NEXT_INSN (loop->last->end)));
10905 ";; start %d (%d), cont dom %d (%d), cont %d (%d), vtop %d (%d), end %d (%d)\n",
10906 LOOP_BLOCK_NUM (loop->start),
10907 LOOP_INSN_UID (loop->start),
10908 LOOP_BLOCK_NUM (loop->cont),
10909 LOOP_INSN_UID (loop->cont),
10910 LOOP_BLOCK_NUM (loop->cont),
10911 LOOP_INSN_UID (loop->cont),
10912 LOOP_BLOCK_NUM (loop->vtop),
10913 LOOP_INSN_UID (loop->vtop),
10914 LOOP_BLOCK_NUM (loop->end),
10915 LOOP_INSN_UID (loop->end));
10916 fprintf (file, ";; top %d (%d), scan start %d (%d)\n",
10917 LOOP_BLOCK_NUM (loop->top),
10918 LOOP_INSN_UID (loop->top),
10919 LOOP_BLOCK_NUM (loop->scan_start),
10920 LOOP_INSN_UID (loop->scan_start));
10921 fprintf (file, ";; exit_count %d", loop->exit_count);
10922 if (loop->exit_count)
10924 fputs (", labels:", file);
10925 for (label = loop->exit_labels; label; label = LABEL_NEXTREF (label))
10927 fprintf (file, " %d ",
10928 LOOP_INSN_UID (XEXP (label, 0)));
10931 fputs ("\n", file);
10933 /* This can happen when a marked loop appears as two nested loops,
10934 say from while (a || b) {}. The inner loop won't match
10935 the loop markers but the outer one will. */
10936 if (LOOP_BLOCK_NUM (loop->cont) != loop->latch->index)
10937 fprintf (file, ";; NOTE_INSN_LOOP_CONT not in loop latch\n");
10941 /* Call this function from the debugger to dump LOOP. */
10945 const struct loop *loop;
10947 flow_loop_dump (loop, stderr, loop_dump_aux, 1);
10950 /* Call this function from the debugger to dump LOOPS. */
10953 debug_loops (loops)
10954 const struct loops *loops;
10956 flow_loops_dump (loops, stderr, loop_dump_aux, 1);