gcc/longlong.h

   1 /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
   2    Copyright (C) 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000
   3    Free Software Foundation, Inc.
   4
   5    This definition file is free software; you can redistribute it
   6    and/or modify it under the terms of the GNU General Public
   7    License as published by the Free Software Foundation; either
   8    version 2, or (at your option) any later version.
   9
  10    This definition file is distributed in the hope that it will be
  11    useful, but WITHOUT ANY WARRANTY; without even the implied
  12    warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13    See the GNU General Public License for more details.
  14
  15    You should have received a copy of the GNU General Public License
  16    along with this program; if not, write to the Free Software
  17    Foundation, Inc., 59 Temple Place - Suite 330,
  18    Boston, MA 02111-1307, USA.  */
  19
  20 /* You have to define the following before including this file:
  21
  22    UWtype -- An unsigned type, default type for operations (typically a "word")
  23    UHWtype -- An unsigned type, at least half the size of UWtype.
  24    UDWtype -- An unsigned type, at least twice as large a UWtype
  25    W_TYPE_SIZE -- size in bits of UWtype
  26
  27    UQItype -- Unsigned 8 bit type.
  28    SItype, USItype -- Signed and unsigned 32 bit types.
  29    DItype, UDItype -- Signed and unsigned 64 bit types.
  30
  31    On a 32 bit machine UWtype should typically be USItype;
  32    on a 64 bit machine, UWtype should typically be UDItype.
  33 */
  34
  35 #define __BITS4 (W_TYPE_SIZE / 4)
  36 #define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
  37 #define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
  38 #define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
  39
  40 #ifndef W_TYPE_SIZE
  41 #define W_TYPE_SIZE     32
  42 #define UWtype          USItype
  43 #define UHWtype         USItype
  44 #define UDWtype         UDItype
  45 #endif
  46
  47 /* Define auxiliary asm macros.
  48
  49    1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
  50    UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
  51    word product in HIGH_PROD and LOW_PROD.
  52
  53    2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
  54    UDWtype product.  This is just a variant of umul_ppmm.
  55
  56    3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  57    denominator) divides a UDWtype, composed by the UWtype integers
  58    HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
  59    in QUOTIENT and the remainder in REMAINDER.  HIGH_NUMERATOR must be less
  60    than DENOMINATOR for correct operation.  If, in addition, the most
  61    significant bit of DENOMINATOR must be 1, then the pre-processor symbol
  62    UDIV_NEEDS_NORMALIZATION is defined to 1.
  63
  64    4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  65    denominator).  Like udiv_qrnnd but the numbers are signed.  The quotient
  66    is rounded towards 0.
  67
  68    5) count_leading_zeros(count, x) counts the number of zero-bits from the
  69    msb to the first nonzero bit in the UWtype X.  This is the number of
  70    steps X needs to be shifted left to set the msb.  Undefined for X == 0,
  71    unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
  72
  73    6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
  74    from the least significant end.
  75
  76    7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
  77    high_addend_2, low_addend_2) adds two UWtype integers, composed by
  78    HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
  79    respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
  80    (i.e. carry out) is not stored anywhere, and is lost.
  81
  82    8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
  83    high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
  84    composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
  85    LOW_SUBTRAHEND_2 respectively.  The result is placed in HIGH_DIFFERENCE
  86    and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
  87    and is lost.
  88
  89    If any of these macros are left undefined for a particular CPU,
  90    C macros are used.  */
  91
  92 /* The CPUs come in alphabetical order below.
  93
  94    Please add support for more CPUs here, or improve the current support
  95    for the CPUs below!
  96    (E.g. WE32100, IBM360.)  */
  97
  98 #if defined (__GNUC__) && !defined (NO_ASM)
  99
 100 /* We sometimes need to clobber "cc" with gcc2, but that would not be
 101    understood by gcc1.  Use cpp to avoid major code duplication.  */
 102 #if __GNUC__ < 2
 103 #define __CLOBBER_CC
 104 #define __AND_CLOBBER_CC
 105 #else /* __GNUC__ >= 2 */
 106 #define __CLOBBER_CC : "cc"
 107 #define __AND_CLOBBER_CC , "cc"
 108 #endif /* __GNUC__ < 2 */
 109
 110 #if defined (__alpha) && W_TYPE_SIZE == 64
 111 #define umul_ppmm(ph, pl, m0, m1) \
 112   do {                                                                  \
 113     UDItype __m0 = (m0), __m1 = (m1);                                   \
 114     __asm__ ("umulh %r1,%2,%0"                                          \
 115              : "=r" ((UDItype) ph)                                      \
 116              : "%rJ" (__m0),                                            \
 117                "rI" (__m1));                                            \
 118     (pl) = __m0 * __m1;                                                 \
 119   } while (0)
 120 #define UMUL_TIME 46
 121 #ifndef LONGLONG_STANDALONE
 122 #define udiv_qrnnd(q, r, n1, n0, d) \
 123   do { UDItype __r;                                                     \
 124     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
 125     (r) = __r;                                                          \
 126   } while (0)
 127 extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
 128 #define UDIV_TIME 220
 129 #endif /* LONGLONG_STANDALONE */
 130 #ifdef __alpha_cix__
 131 #define count_leading_zeros(COUNT,X)    ((COUNT) = __builtin_clzl (X))
 132 #define count_trailing_zeros(COUNT,X)   ((COUNT) = __builtin_ctzl (X))
 133 #define COUNT_LEADING_ZEROS_0 64
 134 #else
 135 extern const UQItype __clz_tab[] ATTRIBUTE_HIDDEN;
 136 #define count_leading_zeros(COUNT,X) \
 137   do {                                                                  \
 138     UDItype __xr = (X), __t, __a;                                       \
 139     __t = __builtin_alpha_cmpbge (0, __xr);                             \
 140     __a = __clz_tab[__t ^ 0xff] - 1;                                    \
 141     __t = __builtin_alpha_extbl (__xr, __a);                            \
 142     (COUNT) = 64 - (__clz_tab[__t] + __a*8);                            \
 143   } while (0)
 144 #define count_trailing_zeros(COUNT,X) \
 145   do {                                                                  \
 146     UDItype __xr = (X), __t, __a;                                       \
 147     __t = __builtin_alpha_cmpbge (0, __xr);                             \
 148     __t = ~__t & -~__t;                                                 \
 149     __a = ((__t & 0xCC) != 0) * 2;                                      \
 150     __a += ((__t & 0xF0) != 0) * 4;                                     \
 151     __a += ((__t & 0xAA) != 0);                                         \
 152     __t = __builtin_alpha_extbl (__xr, __a);                            \
 153     __a <<= 3;                                                          \
 154     __t &= -__t;                                                        \
 155     __a += ((__t & 0xCC) != 0) * 2;                                     \
 156     __a += ((__t & 0xF0) != 0) * 4;                                     \
 157     __a += ((__t & 0xAA) != 0);                                         \
 158     (COUNT) = __a;                                                      \
 159   } while (0)
 160 #endif /* __alpha_cix__ */
 161 #endif /* __alpha */
 162
 163 #if defined (__arc__) && W_TYPE_SIZE == 32
 164 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 165   __asm__ ("add.f       %1, %4, %5\n\tadc       %0, %2, %3"             \
 166            : "=r" ((USItype) (sh)),                                     \
 167              "=&r" ((USItype) (sl))                                     \
 168            : "%r" ((USItype) (ah)),                                     \
 169              "rIJ" ((USItype) (bh)),                                    \
 170              "%r" ((USItype) (al)),                                     \
 171              "rIJ" ((USItype) (bl)))
 172 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 173   __asm__ ("sub.f       %1, %4, %5\n\tsbc       %0, %2, %3"             \
 174            : "=r" ((USItype) (sh)),                                     \
 175              "=&r" ((USItype) (sl))                                     \
 176            : "r" ((USItype) (ah)),                                      \
 177              "rIJ" ((USItype) (bh)),                                    \
 178              "r" ((USItype) (al)),                                      \
 179              "rIJ" ((USItype) (bl)))
 180 /* Call libgcc routine.  */
 181 #define umul_ppmm(w1, w0, u, v) \
 182 do {                                                                    \
 183   DWunion __w;                                                          \
 184   __w.ll = __umulsidi3 (u, v);                                          \
 185   w1 = __w.s.high;                                                      \
 186   w0 = __w.s.low;                                                       \
 187 } while (0)
 188 #define __umulsidi3 __umulsidi3
 189 UDItype __umulsidi3 (USItype, USItype);
 190 #endif
 191
 192 #if defined (__arm__) && W_TYPE_SIZE == 32
 193 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 194   __asm__ ("adds        %1, %4, %5\n\tadc       %0, %2, %3"             \
 195            : "=r" ((USItype) (sh)),                                     \
 196              "=&r" ((USItype) (sl))                                     \
 197            : "%r" ((USItype) (ah)),                                     \
 198              "rI" ((USItype) (bh)),                                     \
 199              "%r" ((USItype) (al)),                                     \
 200              "rI" ((USItype) (bl)))
 201 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 202   __asm__ ("subs        %1, %4, %5\n\tsbc       %0, %2, %3"             \
 203            : "=r" ((USItype) (sh)),                                     \
 204              "=&r" ((USItype) (sl))                                     \
 205            : "r" ((USItype) (ah)),                                      \
 206              "rI" ((USItype) (bh)),                                     \
 207              "r" ((USItype) (al)),                                      \
 208              "rI" ((USItype) (bl)))
 209 #define umul_ppmm(xh, xl, a, b) \
 210 {register USItype __t0, __t1, __t2;                                     \
 211   __asm__ ("%@ Inlined umul_ppmm\n"                                     \
 212            "    mov     %2, %5, lsr #16\n"                              \
 213            "    mov     %0, %6, lsr #16\n"                              \
 214            "    bic     %3, %5, %2, lsl #16\n"                          \
 215            "    bic     %4, %6, %0, lsl #16\n"                          \
 216            "    mul     %1, %3, %4\n"                                   \
 217            "    mul     %4, %2, %4\n"                                   \
 218            "    mul     %3, %0, %3\n"                                   \
 219            "    mul     %0, %2, %0\n"                                   \
 220            "    adds    %3, %4, %3\n"                                   \
 221            "    addcs   %0, %0, #65536\n"                               \
 222            "    adds    %1, %1, %3, lsl #16\n"                          \
 223            "    adc     %0, %0, %3, lsr #16"                            \
 224            : "=&r" ((USItype) (xh)),                                    \
 225              "=r" ((USItype) (xl)),                                     \
 226              "=&r" (__t0), "=&r" (__t1), "=r" (__t2)                    \
 227            : "r" ((USItype) (a)),                                       \
 228              "r" ((USItype) (b)));}
 229 #define UMUL_TIME 20
 230 #define UDIV_TIME 100
 231 #endif /* __arm__ */
 232
 233 #if defined (__hppa) && W_TYPE_SIZE == 32
 234 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 235   __asm__ ("add %4,%5,%1\n\taddc %2,%3,%0"                              \
 236            : "=r" ((USItype) (sh)),                                     \
 237              "=&r" ((USItype) (sl))                                     \
 238            : "%rM" ((USItype) (ah)),                                    \
 239              "rM" ((USItype) (bh)),                                     \
 240              "%rM" ((USItype) (al)),                                    \
 241              "rM" ((USItype) (bl)))
 242 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 243   __asm__ ("sub %4,%5,%1\n\tsubb %2,%3,%0"                              \
 244            : "=r" ((USItype) (sh)),                                     \
 245              "=&r" ((USItype) (sl))                                     \
 246            : "rM" ((USItype) (ah)),                                     \
 247              "rM" ((USItype) (bh)),                                     \
 248              "rM" ((USItype) (al)),                                     \
 249              "rM" ((USItype) (bl)))
 250 #if defined (_PA_RISC1_1)
 251 #define umul_ppmm(w1, w0, u, v) \
 252   do {                                                                  \
 253     union                                                               \
 254       {                                                                 \
 255         UDItype __f;                                                    \
 256         struct {USItype __w1, __w0;} __w1w0;                            \
 257       } __t;                                                            \
 258     __asm__ ("xmpyu %1,%2,%0"                                           \
 259              : "=x" (__t.__f)                                           \
 260              : "x" ((USItype) (u)),                                     \
 261                "x" ((USItype) (v)));                                    \
 262     (w1) = __t.__w1w0.__w1;                                             \
 263     (w0) = __t.__w1w0.__w0;                                             \
 264      } while (0)
 265 #define UMUL_TIME 8
 266 #else
 267 #define UMUL_TIME 30
 268 #endif
 269 #define UDIV_TIME 40
 270 #define count_leading_zeros(count, x) \
 271   do {                                                                  \
 272     USItype __tmp;                                                      \
 273     __asm__ (                                                           \
 274        "ldi             1,%0\n"                                         \
 275 "       extru,=         %1,15,16,%%r0           ; Bits 31..16 zero?\n"  \
 276 "       extru,tr        %1,15,16,%1             ; No.  Shift down, skip add.\n"\
 277 "       ldo             16(%0),%0               ; Yes.  Perform add.\n" \
 278 "       extru,=         %1,23,8,%%r0            ; Bits 15..8 zero?\n"   \
 279 "       extru,tr        %1,23,8,%1              ; No.  Shift down, skip add.\n"\
 280 "       ldo             8(%0),%0                ; Yes.  Perform add.\n" \
 281 "       extru,=         %1,27,4,%%r0            ; Bits 7..4 zero?\n"    \
 282 "       extru,tr        %1,27,4,%1              ; No.  Shift down, skip add.\n"\
 283 "       ldo             4(%0),%0                ; Yes.  Perform add.\n" \
 284 "       extru,=         %1,29,2,%%r0            ; Bits 3..2 zero?\n"    \
 285 "       extru,tr        %1,29,2,%1              ; No.  Shift down, skip add.\n"\
 286 "       ldo             2(%0),%0                ; Yes.  Perform add.\n" \
 287 "       extru           %1,30,1,%1              ; Extract bit 1.\n"     \
 288 "       sub             %0,%1,%0                ; Subtract it.\n"       \
 289         : "=r" (count), "=r" (__tmp) : "1" (x));                        \
 290   } while (0)
 291 #endif
 292
 293 #if (defined (__i370__) || defined (__s390__) || defined (__mvs__)) && W_TYPE_SIZE == 32
 294 #define smul_ppmm(xh, xl, m0, m1) \
 295   do {                                                                  \
 296     union {DItype __ll;                                                 \
 297            struct {USItype __h, __l;} __i;                              \
 298           } __x;                                                        \
 299     __asm__ ("lr %N0,%1\n\tmr %0,%2"                                    \
 300              : "=&r" (__x.__ll)                                         \
 301              : "r" (m0), "r" (m1));                                     \
 302     (xh) = __x.__i.__h; (xl) = __x.__i.__l;                             \
 303   } while (0)
 304 #define sdiv_qrnnd(q, r, n1, n0, d) \
 305   do {                                                                  \
 306     union {DItype __ll;                                                 \
 307            struct {USItype __h, __l;} __i;                              \
 308           } __x;                                                        \
 309     __x.__i.__h = n1; __x.__i.__l = n0;                                 \
 310     __asm__ ("dr %0,%2"                                                 \
 311              : "=r" (__x.__ll)                                          \
 312              : "0" (__x.__ll), "r" (d));                                \
 313     (q) = __x.__i.__l; (r) = __x.__i.__h;                               \
 314   } while (0)
 315 #endif
 316
 317 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
 318 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 319   __asm__ ("addl %5,%1\n\tadcl %3,%0"                                   \
 320            : "=r" ((USItype) (sh)),                                     \
 321              "=&r" ((USItype) (sl))                                     \
 322            : "%0" ((USItype) (ah)),                                     \
 323              "g" ((USItype) (bh)),                                      \
 324              "%1" ((USItype) (al)),                                     \
 325              "g" ((USItype) (bl)))
 326 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 327   __asm__ ("subl %5,%1\n\tsbbl %3,%0"                                   \
 328            : "=r" ((USItype) (sh)),                                     \
 329              "=&r" ((USItype) (sl))                                     \
 330            : "0" ((USItype) (ah)),                                      \
 331              "g" ((USItype) (bh)),                                      \
 332              "1" ((USItype) (al)),                                      \
 333              "g" ((USItype) (bl)))
 334 #define umul_ppmm(w1, w0, u, v) \
 335   __asm__ ("mull %3"                                                    \
 336            : "=a" ((USItype) (w0)),                                     \
 337              "=d" ((USItype) (w1))                                      \
 338            : "%0" ((USItype) (u)),                                      \
 339              "rm" ((USItype) (v)))
 340 #define udiv_qrnnd(q, r, n1, n0, dv) \
 341   __asm__ ("divl %4"                                                    \
 342            : "=a" ((USItype) (q)),                                      \
 343              "=d" ((USItype) (r))                                       \
 344            : "0" ((USItype) (n0)),                                      \
 345              "1" ((USItype) (n1)),                                      \
 346              "rm" ((USItype) (dv)))
 347 #define count_leading_zeros(count, x) \
 348   do {                                                                  \
 349     USItype __cbtmp;                                                    \
 350     __asm__ ("bsrl %1,%0"                                               \
 351              : "=r" (__cbtmp) : "rm" ((USItype) (x)));                  \
 352     (count) = __cbtmp ^ 31;                                             \
 353   } while (0)
 354 #define count_trailing_zeros(count, x) \
 355   __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x)))
 356 #define UMUL_TIME 40
 357 #define UDIV_TIME 40
 358 #endif /* 80x86 */
 359
 360 #if defined (__i960__) && W_TYPE_SIZE == 32
 361 #define umul_ppmm(w1, w0, u, v) \
 362   ({union {UDItype __ll;                                                \
 363            struct {USItype __l, __h;} __i;                              \
 364           } __xx;                                                       \
 365   __asm__ ("emul        %2,%1,%0"                                       \
 366            : "=d" (__xx.__ll)                                           \
 367            : "%dI" ((USItype) (u)),                                     \
 368              "dI" ((USItype) (v)));                                     \
 369   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 370 #define __umulsidi3(u, v) \
 371   ({UDItype __w;                                                        \
 372     __asm__ ("emul      %2,%1,%0"                                       \
 373              : "=d" (__w)                                               \
 374              : "%dI" ((USItype) (u)),                                   \
 375                "dI" ((USItype) (v)));                                   \
 376     __w; })
 377 #endif /* __i960__ */
 378
 379 #if defined (__M32R__) && W_TYPE_SIZE == 32
 380 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 381   /* The cmp clears the condition bit.  */ \
 382   __asm__ ("cmp %0,%0\n\taddx %%5,%1\n\taddx %%3,%0"                    \
 383            : "=r" ((USItype) (sh)),                                     \
 384              "=&r" ((USItype) (sl))                                     \
 385            : "%0" ((USItype) (ah)),                                     \
 386              "r" ((USItype) (bh)),                                      \
 387              "%1" ((USItype) (al)),                                     \
 388              "r" ((USItype) (bl))                                       \
 389            : "cbit")
 390 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 391   /* The cmp clears the condition bit.  */ \
 392   __asm__ ("cmp %0,%0\n\tsubx %5,%1\n\tsubx %3,%0"                      \
 393            : "=r" ((USItype) (sh)),                                     \
 394              "=&r" ((USItype) (sl))                                     \
 395            : "0" ((USItype) (ah)),                                      \
 396              "r" ((USItype) (bh)),                                      \
 397              "1" ((USItype) (al)),                                      \
 398              "r" ((USItype) (bl))                                       \
 399            : "cbit")
 400 #endif /* __M32R__ */
 401
 402 #if defined (__mc68000__) && W_TYPE_SIZE == 32
 403 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 404   __asm__ ("add%.l %5,%1\n\taddx%.l %3,%0"                              \
 405            : "=d" ((USItype) (sh)),                                     \
 406              "=&d" ((USItype) (sl))                                     \
 407            : "%0" ((USItype) (ah)),                                     \
 408              "d" ((USItype) (bh)),                                      \
 409              "%1" ((USItype) (al)),                                     \
 410              "g" ((USItype) (bl)))
 411 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 412   __asm__ ("sub%.l %5,%1\n\tsubx%.l %3,%0"                              \
 413            : "=d" ((USItype) (sh)),                                     \
 414              "=&d" ((USItype) (sl))                                     \
 415            : "0" ((USItype) (ah)),                                      \
 416              "d" ((USItype) (bh)),                                      \
 417              "1" ((USItype) (al)),                                      \
 418              "g" ((USItype) (bl)))
 419
 420 /* The '020, '030, '040 and CPU32 have 32x32->64 and 64/32->32q-32r.  */
 421 #if defined (__mc68020__) || defined(mc68020) \
 422         || defined(__mc68030__) || defined(mc68030) \
 423         || defined(__mc68040__) || defined(mc68040) \
 424         || defined(__mcpu32__) || defined(mcpu32)
 425 #define umul_ppmm(w1, w0, u, v) \
 426   __asm__ ("mulu%.l %3,%1:%0"                                           \
 427            : "=d" ((USItype) (w0)),                                     \
 428              "=d" ((USItype) (w1))                                      \
 429            : "%0" ((USItype) (u)),                                      \
 430              "dmi" ((USItype) (v)))
 431 #define UMUL_TIME 45
 432 #define udiv_qrnnd(q, r, n1, n0, d) \
 433   __asm__ ("divu%.l %4,%1:%0"                                           \
 434            : "=d" ((USItype) (q)),                                      \
 435              "=d" ((USItype) (r))                                       \
 436            : "0" ((USItype) (n0)),                                      \
 437              "1" ((USItype) (n1)),                                      \
 438              "dmi" ((USItype) (d)))
 439 #define UDIV_TIME 90
 440 #define sdiv_qrnnd(q, r, n1, n0, d) \
 441   __asm__ ("divs%.l %4,%1:%0"                                           \
 442            : "=d" ((USItype) (q)),                                      \
 443              "=d" ((USItype) (r))                                       \
 444            : "0" ((USItype) (n0)),                                      \
 445              "1" ((USItype) (n1)),                                      \
 446              "dmi" ((USItype) (d)))
 447
 448 #else /* not mc68020 */
 449 #if !defined(__mcf5200__)
 450 /* %/ inserts REGISTER_PREFIX, %# inserts IMMEDIATE_PREFIX.  */
 451 #define umul_ppmm(xh, xl, a, b) \
 452   __asm__ ("| Inlined umul_ppmm\n"                                      \
 453            "    move%.l %2,%/d0\n"                                      \
 454            "    move%.l %3,%/d1\n"                                      \
 455            "    move%.l %/d0,%/d2\n"                                    \
 456            "    swap    %/d0\n"                                         \
 457            "    move%.l %/d1,%/d3\n"                                    \
 458            "    swap    %/d1\n"                                         \
 459            "    move%.w %/d2,%/d4\n"                                    \
 460            "    mulu    %/d3,%/d4\n"                                    \
 461            "    mulu    %/d1,%/d2\n"                                    \
 462            "    mulu    %/d0,%/d3\n"                                    \
 463            "    mulu    %/d0,%/d1\n"                                    \
 464            "    move%.l %/d4,%/d0\n"                                    \
 465            "    eor%.w  %/d0,%/d0\n"                                    \
 466            "    swap    %/d0\n"                                         \
 467            "    add%.l  %/d0,%/d2\n"                                    \
 468            "    add%.l  %/d3,%/d2\n"                                    \
 469            "    jcc     1f\n"                                           \
 470            "    add%.l  %#65536,%/d1\n"                                 \
 471            "1:  swap    %/d2\n"                                         \
 472            "    moveq   %#0,%/d0\n"                                     \
 473            "    move%.w %/d2,%/d0\n"                                    \
 474            "    move%.w %/d4,%/d2\n"                                    \
 475            "    move%.l %/d2,%1\n"                                      \
 476            "    add%.l  %/d1,%/d0\n"                                    \
 477            "    move%.l %/d0,%0"                                        \
 478            : "=g" ((USItype) (xh)),                                     \
 479              "=g" ((USItype) (xl))                                      \
 480            : "g" ((USItype) (a)),                                       \
 481              "g" ((USItype) (b))                                        \
 482            : "d0", "d1", "d2", "d3", "d4")
 483 #define UMUL_TIME 100
 484 #define UDIV_TIME 400
 485 #endif /* not mcf5200 */
 486 #endif /* not mc68020 */
 487
 488 /* The '020, '030, '040 and '060 have bitfield insns.  */
 489 #if defined (__mc68020__) || defined(mc68020) \
 490         || defined(__mc68030__) || defined(mc68030) \
 491         || defined(__mc68040__) || defined(mc68040) \
 492         || defined(__mc68060__) || defined(mc68060)
 493 #define count_leading_zeros(count, x) \
 494   __asm__ ("bfffo %1{%b2:%b2},%0"                                       \
 495            : "=d" ((USItype) (count))                                   \
 496            : "od" ((USItype) (x)), "n" (0))
 497 #endif
 498 #endif /* mc68000 */
 499
 500 #if defined (__m88000__) && W_TYPE_SIZE == 32
 501 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 502   __asm__ ("addu.co %1,%r4,%r5\n\taddu.ci %0,%r2,%r3"                   \
 503            : "=r" ((USItype) (sh)),                                     \
 504              "=&r" ((USItype) (sl))                                     \
 505            : "%rJ" ((USItype) (ah)),                                    \
 506              "rJ" ((USItype) (bh)),                                     \
 507              "%rJ" ((USItype) (al)),                                    \
 508              "rJ" ((USItype) (bl)))
 509 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 510   __asm__ ("subu.co %1,%r4,%r5\n\tsubu.ci %0,%r2,%r3"                   \
 511            : "=r" ((USItype) (sh)),                                     \
 512              "=&r" ((USItype) (sl))                                     \
 513            : "rJ" ((USItype) (ah)),                                     \
 514              "rJ" ((USItype) (bh)),                                     \
 515              "rJ" ((USItype) (al)),                                     \
 516              "rJ" ((USItype) (bl)))
 517 #define count_leading_zeros(count, x) \
 518   do {                                                                  \
 519     USItype __cbtmp;                                                    \
 520     __asm__ ("ff1 %0,%1"                                                \
 521              : "=r" (__cbtmp)                                           \
 522              : "r" ((USItype) (x)));                                    \
 523     (count) = __cbtmp ^ 31;                                             \
 524   } while (0)
 525 #define COUNT_LEADING_ZEROS_0 63 /* sic */
 526 #if defined (__mc88110__)
 527 #define umul_ppmm(wh, wl, u, v) \
 528   do {                                                                  \
 529     union {UDItype __ll;                                                \
 530            struct {USItype __h, __l;} __i;                              \
 531           } __xx;                                                       \
 532     __asm__ ("mulu.d    %0,%1,%2"                                       \
 533              : "=r" (__xx.__ll)                                         \
 534              : "r" ((USItype) (u)),                                     \
 535                "r" ((USItype) (v)));                                    \
 536     (wh) = __xx.__i.__h;                                                \
 537     (wl) = __xx.__i.__l;                                                \
 538   } while (0)
 539 #define udiv_qrnnd(q, r, n1, n0, d) \
 540   ({union {UDItype __ll;                                                \
 541            struct {USItype __h, __l;} __i;                              \
 542           } __xx;                                                       \
 543   USItype __q;                                                          \
 544   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 545   __asm__ ("divu.d %0,%1,%2"                                            \
 546            : "=r" (__q)                                                 \
 547            : "r" (__xx.__ll),                                           \
 548              "r" ((USItype) (d)));                                      \
 549   (r) = (n0) - __q * (d); (q) = __q; })
 550 #define UMUL_TIME 5
 551 #define UDIV_TIME 25
 552 #else
 553 #define UMUL_TIME 17
 554 #define UDIV_TIME 150
 555 #endif /* __mc88110__ */
 556 #endif /* __m88000__ */
 557
 558 #if defined (__mips__) && W_TYPE_SIZE == 32
 559 #define umul_ppmm(w1, w0, u, v) \
 560   __asm__ ("multu %2,%3"                                                \
 561            : "=l" ((USItype) (w0)),                                     \
 562              "=h" ((USItype) (w1))                                      \
 563            : "d" ((USItype) (u)),                                       \
 564              "d" ((USItype) (v)))
 565 #define UMUL_TIME 10
 566 #define UDIV_TIME 100
 567 #endif /* __mips__ */
 568
 569 #if defined (__ns32000__) && W_TYPE_SIZE == 32
 570 #define umul_ppmm(w1, w0, u, v) \
 571   ({union {UDItype __ll;                                                \
 572            struct {USItype __l, __h;} __i;                              \
 573           } __xx;                                                       \
 574   __asm__ ("meid %2,%0"                                                 \
 575            : "=g" (__xx.__ll)                                           \
 576            : "%0" ((USItype) (u)),                                      \
 577              "g" ((USItype) (v)));                                      \
 578   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 579 #define __umulsidi3(u, v) \
 580   ({UDItype __w;                                                        \
 581     __asm__ ("meid %2,%0"                                               \
 582              : "=g" (__w)                                               \
 583              : "%0" ((USItype) (u)),                                    \
 584                "g" ((USItype) (v)));                                    \
 585     __w; })
 586 #define udiv_qrnnd(q, r, n1, n0, d) \
 587   ({union {UDItype __ll;                                                \
 588            struct {USItype __l, __h;} __i;                              \
 589           } __xx;                                                       \
 590   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 591   __asm__ ("deid %2,%0"                                                 \
 592            : "=g" (__xx.__ll)                                           \
 593            : "0" (__xx.__ll),                                           \
 594              "g" ((USItype) (d)));                                      \
 595   (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
 596 #define count_trailing_zeros(count,x) \
 597   do {                                                                  \
 598     __asm__ ("ffsd     %2,%0"                                           \
 599             : "=r" ((USItype) (count))                                  \
 600             : "0" ((USItype) 0),                                        \
 601               "r" ((USItype) (x)));                                     \
 602   } while (0)
 603 #endif /* __ns32000__ */
 604
 605 /* FIXME: We should test _IBMR2 here when we add assembly support for the
 606    system vendor compilers.
 607    FIXME: What's needed for gcc PowerPC VxWorks?  __vxworks__ is not good
 608    enough, since that hits ARM and m68k too.  */
 609 #if (defined (_ARCH_PPC)        /* AIX */                               \
 610      || defined (_ARCH_PWR)     /* AIX */                               \
 611      || defined (_ARCH_COM)     /* AIX */                               \
 612      || defined (__powerpc__)   /* gcc */                               \
 613      || defined (__POWERPC__)   /* BEOS */                              \
 614      || defined (__ppc__)       /* Darwin */                            \
 615      || defined (PPC)           /* GNU/Linux, SysV */                   \
 616      ) && W_TYPE_SIZE == 32
 617 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 618   do {                                                                  \
 619     if (__builtin_constant_p (bh) && (bh) == 0)                         \
 620       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
 621              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
 622     else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0)         \
 623       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
 624              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
 625     else                                                                \
 626       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
 627              : "=r" (sh), "=&r" (sl)                                    \
 628              : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl));              \
 629   } while (0)
 630 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 631   do {                                                                  \
 632     if (__builtin_constant_p (ah) && (ah) == 0)                         \
 633       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
 634                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
 635     else if (__builtin_constant_p (ah) && (ah) == ~(USItype) 0)         \
 636       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
 637                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
 638     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
 639       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
 640                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
 641     else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0)         \
 642       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
 643                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
 644     else                                                                \
 645       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
 646                : "=r" (sh), "=&r" (sl)                                  \
 647                : "r" (ah), "r" (bh), "rI" (al), "r" (bl));              \
 648   } while (0)
 649 #define count_leading_zeros(count, x) \
 650   __asm__ ("{cntlz|cntlzw} %0,%1" : "=r" (count) : "r" (x))
 651 #define COUNT_LEADING_ZEROS_0 32
 652 #if defined (_ARCH_PPC) || defined (__powerpc__) || defined (__POWERPC__) \
 653   || defined (__ppc__) || defined (PPC) || defined (__vxworks__)
 654 #define umul_ppmm(ph, pl, m0, m1) \
 655   do {                                                                  \
 656     USItype __m0 = (m0), __m1 = (m1);                                   \
 657     __asm__ ("mulhwu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));      \
 658     (pl) = __m0 * __m1;                                                 \
 659   } while (0)
 660 #define UMUL_TIME 15
 661 #define smul_ppmm(ph, pl, m0, m1) \
 662   do {                                                                  \
 663     SItype __m0 = (m0), __m1 = (m1);                                    \
 664     __asm__ ("mulhw %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));       \
 665     (pl) = __m0 * __m1;                                                 \
 666   } while (0)
 667 #define SMUL_TIME 14
 668 #define UDIV_TIME 120
 669 #elif defined (_ARCH_PWR)
 670 #define UMUL_TIME 8
 671 #define smul_ppmm(xh, xl, m0, m1) \
 672   __asm__ ("mul %0,%2,%3" : "=r" (xh), "=q" (xl) : "r" (m0), "r" (m1))
 673 #define SMUL_TIME 4
 674 #define sdiv_qrnnd(q, r, nh, nl, d) \
 675   __asm__ ("div %0,%2,%4" : "=r" (q), "=q" (r) : "r" (nh), "1" (nl), "r" (d))
 676 #define UDIV_TIME 100
 677 #endif
 678 #endif /* 32-bit POWER architecture variants.  */
 679
 680 /* We should test _IBMR2 here when we add assembly support for the system
 681    vendor compilers.  */
 682 #if (defined (_ARCH_PPC64) || defined (__powerpc64__)) && W_TYPE_SIZE == 64
 683 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 684   do {                                                                  \
 685     if (__builtin_constant_p (bh) && (bh) == 0)                         \
 686       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
 687              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
 688     else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0)         \
 689       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
 690              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
 691     else                                                                \
 692       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
 693              : "=r" (sh), "=&r" (sl)                                    \
 694              : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl));              \
 695   } while (0)
 696 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 697   do {                                                                  \
 698     if (__builtin_constant_p (ah) && (ah) == 0)                         \
 699       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
 700                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
 701     else if (__builtin_constant_p (ah) && (ah) == ~(UDItype) 0)         \
 702       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
 703                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
 704     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
 705       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
 706                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
 707     else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0)         \
 708       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
 709                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
 710     else                                                                \
 711       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
 712                : "=r" (sh), "=&r" (sl)                                  \
 713                : "r" (ah), "r" (bh), "rI" (al), "r" (bl));              \
 714   } while (0)
 715 #define count_leading_zeros(count, x) \
 716   __asm__ ("cntlzd %0,%1" : "=r" (count) : "r" (x))
 717 #define COUNT_LEADING_ZEROS_0 64
 718 #define umul_ppmm(ph, pl, m0, m1) \
 719   do {                                                                  \
 720     UDItype __m0 = (m0), __m1 = (m1);                                   \
 721     __asm__ ("mulhdu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));      \
 722     (pl) = __m0 * __m1;                                                 \
 723   } while (0)
 724 #define UMUL_TIME 15
 725 #define smul_ppmm(ph, pl, m0, m1) \
 726   do {                                                                  \
 727     DItype __m0 = (m0), __m1 = (m1);                                    \
 728     __asm__ ("mulhd %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));       \
 729     (pl) = __m0 * __m1;                                                 \
 730   } while (0)
 731 #define SMUL_TIME 14  /* ??? */
 732 #define UDIV_TIME 120 /* ??? */
 733 #endif /* 64-bit PowerPC.  */
 734
 735 #if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
 736 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 737   __asm__ ("a %1,%5\n\tae %0,%3"                                        \
 738            : "=r" ((USItype) (sh)),                                     \
 739              "=&r" ((USItype) (sl))                                     \
 740            : "%0" ((USItype) (ah)),                                     \
 741              "r" ((USItype) (bh)),                                      \
 742              "%1" ((USItype) (al)),                                     \
 743              "r" ((USItype) (bl)))
 744 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 745   __asm__ ("s %1,%5\n\tse %0,%3"                                        \
 746            : "=r" ((USItype) (sh)),                                     \
 747              "=&r" ((USItype) (sl))                                     \
 748            : "0" ((USItype) (ah)),                                      \
 749              "r" ((USItype) (bh)),                                      \
 750              "1" ((USItype) (al)),                                      \
 751              "r" ((USItype) (bl)))
 752 #define umul_ppmm(ph, pl, m0, m1) \
 753   do {                                                                  \
 754     USItype __m0 = (m0), __m1 = (m1);                                   \
 755     __asm__ (                                                           \
 756        "s       r2,r2\n"                                                \
 757 "       mts     r10,%2\n"                                               \
 758 "       m       r2,%3\n"                                                \
 759 "       m       r2,%3\n"                                                \
 760 "       m       r2,%3\n"                                                \
 761 "       m       r2,%3\n"                                                \
 762 "       m       r2,%3\n"                                                \
 763 "       m       r2,%3\n"                                                \
 764 "       m       r2,%3\n"                                                \
 765 "       m       r2,%3\n"                                                \
 766 "       m       r2,%3\n"                                                \
 767 "       m       r2,%3\n"                                                \
 768 "       m       r2,%3\n"                                                \
 769 "       m       r2,%3\n"                                                \
 770 "       m       r2,%3\n"                                                \
 771 "       m       r2,%3\n"                                                \
 772 "       m       r2,%3\n"                                                \
 773 "       m       r2,%3\n"                                                \
 774 "       cas     %0,r2,r0\n"                                             \
 775 "       mfs     r10,%1"                                                 \
 776              : "=r" ((USItype) (ph)),                                   \
 777                "=r" ((USItype) (pl))                                    \
 778              : "%r" (__m0),                                             \
 779                 "r" (__m1)                                              \
 780              : "r2");                                                   \
 781     (ph) += ((((SItype) __m0 >> 31) & __m1)                             \
 782              + (((SItype) __m1 >> 31) & __m0));                         \
 783   } while (0)
 784 #define UMUL_TIME 20
 785 #define UDIV_TIME 200
 786 #define count_leading_zeros(count, x) \
 787   do {                                                                  \
 788     if ((x) >= 0x10000)                                                 \
 789       __asm__ ("clz     %0,%1"                                          \
 790                : "=r" ((USItype) (count))                               \
 791                : "r" ((USItype) (x) >> 16));                            \
 792     else                                                                \
 793       {                                                                 \
 794         __asm__ ("clz   %0,%1"                                          \
 795                  : "=r" ((USItype) (count))                             \
 796                  : "r" ((USItype) (x)));                                        \
 797         (count) += 16;                                                  \
 798       }                                                                 \
 799   } while (0)
 800 #endif
 801
 802 #if defined (__sh2__) && W_TYPE_SIZE == 32
 803 #define umul_ppmm(w1, w0, u, v) \
 804   __asm__ (                                                             \
 805        "dmulu.l %2,%3\n\tsts    macl,%1\n\tsts  mach,%0"                \
 806            : "=r" ((USItype)(w1)),                                      \
 807              "=r" ((USItype)(w0))                                       \
 808            : "r" ((USItype)(u)),                                        \
 809              "r" ((USItype)(v))                                         \
 810            : "macl", "mach")
 811 #define UMUL_TIME 5
 812 #endif
 813
 814 #if defined (__SH5__) && __SHMEDIA__ && W_TYPE_SIZE == 32
 815 #define __umulsidi3(u,v) ((UDItype)(USItype)u*(USItype)v)
 816 #define count_leading_zeros(count, x) \
 817   do                                                                    \
 818     {                                                                   \
 819       UDItype x_ = (USItype)(x);                                        \
 820       SItype c_;                                                        \
 821                                                                         \
 822       __asm__ ("nsb %1, %0" : "=r" (c_) : "r" (x_));                    \
 823       (count) = c_ - 31;                                                \
 824     }                                                                   \
 825   while (0)
 826 #define COUNT_LEADING_ZEROS_0 32
 827 #endif
 828
 829 #if defined (__sparc__) && !defined (__arch64__) && !defined (__sparcv9) \
 830     && W_TYPE_SIZE == 32
 831 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 832   __asm__ ("addcc %r4,%5,%1\n\taddx %r2,%3,%0"                          \
 833            : "=r" ((USItype) (sh)),                                     \
 834              "=&r" ((USItype) (sl))                                     \
 835            : "%rJ" ((USItype) (ah)),                                    \
 836              "rI" ((USItype) (bh)),                                     \
 837              "%rJ" ((USItype) (al)),                                    \
 838              "rI" ((USItype) (bl))                                      \
 839            __CLOBBER_CC)
 840 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 841   __asm__ ("subcc %r4,%5,%1\n\tsubx %r2,%3,%0"                          \
 842            : "=r" ((USItype) (sh)),                                     \
 843              "=&r" ((USItype) (sl))                                     \
 844            : "rJ" ((USItype) (ah)),                                     \
 845              "rI" ((USItype) (bh)),                                     \
 846              "rJ" ((USItype) (al)),                                     \
 847              "rI" ((USItype) (bl))                                      \
 848            __CLOBBER_CC)
 849 #if defined (__sparc_v8__)
 850 #define umul_ppmm(w1, w0, u, v) \
 851   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
 852            : "=r" ((USItype) (w1)),                                     \
 853              "=r" ((USItype) (w0))                                      \
 854            : "r" ((USItype) (u)),                                       \
 855              "r" ((USItype) (v)))
 856 #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
 857   __asm__ ("mov %2,%%y;nop;nop;nop;udiv %3,%4,%0;umul %0,%4,%1;sub %3,%1,%1"\
 858            : "=&r" ((USItype) (__q)),                                   \
 859              "=&r" ((USItype) (__r))                                    \
 860            : "r" ((USItype) (__n1)),                                    \
 861              "r" ((USItype) (__n0)),                                    \
 862              "r" ((USItype) (__d)))
 863 #else
 864 #if defined (__sparclite__)
 865 /* This has hardware multiply but not divide.  It also has two additional
 866    instructions scan (ffs from high bit) and divscc.  */
 867 #define umul_ppmm(w1, w0, u, v) \
 868   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
 869            : "=r" ((USItype) (w1)),                                     \
 870              "=r" ((USItype) (w0))                                      \
 871            : "r" ((USItype) (u)),                                       \
 872              "r" ((USItype) (v)))
 873 #define udiv_qrnnd(q, r, n1, n0, d) \
 874   __asm__ ("! Inlined udiv_qrnnd\n"                                     \
 875 "       wr      %%g0,%2,%%y     ! Not a delayed write for sparclite\n"  \
 876 "       tst     %%g0\n"                                                 \
 877 "       divscc  %3,%4,%%g1\n"                                           \
 878 "       divscc  %%g1,%4,%%g1\n"                                         \
 879 "       divscc  %%g1,%4,%%g1\n"                                         \
 880 "       divscc  %%g1,%4,%%g1\n"                                         \
 881 "       divscc  %%g1,%4,%%g1\n"                                         \
 882 "       divscc  %%g1,%4,%%g1\n"                                         \
 883 "       divscc  %%g1,%4,%%g1\n"                                         \
 884 "       divscc  %%g1,%4,%%g1\n"                                         \
 885 "       divscc  %%g1,%4,%%g1\n"                                         \
 886 "       divscc  %%g1,%4,%%g1\n"                                         \
 887 "       divscc  %%g1,%4,%%g1\n"                                         \
 888 "       divscc  %%g1,%4,%%g1\n"                                         \
 889 "       divscc  %%g1,%4,%%g1\n"                                         \
 890 "       divscc  %%g1,%4,%%g1\n"                                         \
 891 "       divscc  %%g1,%4,%%g1\n"                                         \
 892 "       divscc  %%g1,%4,%%g1\n"                                         \
 893 "       divscc  %%g1,%4,%%g1\n"                                         \
 894 "       divscc  %%g1,%4,%%g1\n"                                         \
 895 "       divscc  %%g1,%4,%%g1\n"                                         \
 896 "       divscc  %%g1,%4,%%g1\n"                                         \
 897 "       divscc  %%g1,%4,%%g1\n"                                         \
 898 "       divscc  %%g1,%4,%%g1\n"                                         \
 899 "       divscc  %%g1,%4,%%g1\n"                                         \
 900 "       divscc  %%g1,%4,%%g1\n"                                         \
 901 "       divscc  %%g1,%4,%%g1\n"                                         \
 902 "       divscc  %%g1,%4,%%g1\n"                                         \
 903 "       divscc  %%g1,%4,%%g1\n"                                         \
 904 "       divscc  %%g1,%4,%%g1\n"                                         \
 905 "       divscc  %%g1,%4,%%g1\n"                                         \
 906 "       divscc  %%g1,%4,%%g1\n"                                         \
 907 "       divscc  %%g1,%4,%%g1\n"                                         \
 908 "       divscc  %%g1,%4,%0\n"                                           \
 909 "       rd      %%y,%1\n"                                               \
 910 "       bl,a 1f\n"                                                      \
 911 "       add     %1,%4,%1\n"                                             \
 912 "1:     ! End of inline udiv_qrnnd"                                     \
 913            : "=r" ((USItype) (q)),                                      \
 914              "=r" ((USItype) (r))                                       \
 915            : "r" ((USItype) (n1)),                                      \
 916              "r" ((USItype) (n0)),                                      \
 917              "rI" ((USItype) (d))                                       \
 918            : "g1" __AND_CLOBBER_CC)
 919 #define UDIV_TIME 37
 920 #define count_leading_zeros(count, x) \
 921   do {                                                                  \
 922   __asm__ ("scan %1,1,%0"                                               \
 923            : "=r" ((USItype) (count))                                   \
 924            : "r" ((USItype) (x)));                                      \
 925   } while (0)
 926 /* Early sparclites return 63 for an argument of 0, but they warn that future
 927    implementations might change this.  Therefore, leave COUNT_LEADING_ZEROS_0
 928    undefined.  */
 929 #else
 930 /* SPARC without integer multiplication and divide instructions.
 931    (i.e. at least Sun4/20,40,60,65,75,110,260,280,330,360,380,470,490) */
 932 #define umul_ppmm(w1, w0, u, v) \
 933   __asm__ ("! Inlined umul_ppmm\n"                                      \
 934 "       wr      %%g0,%2,%%y     ! SPARC has 0-3 delay insn after a wr\n"\
 935 "       sra     %3,31,%%o5      ! Don't move this insn\n"               \
 936 "       and     %2,%%o5,%%o5    ! Don't move this insn\n"               \
 937 "       andcc   %%g0,0,%%g1     ! Don't move this insn\n"               \
 938 "       mulscc  %%g1,%3,%%g1\n"                                         \
 939 "       mulscc  %%g1,%3,%%g1\n"                                         \
 940 "       mulscc  %%g1,%3,%%g1\n"                                         \
 941 "       mulscc  %%g1,%3,%%g1\n"                                         \
 942 "       mulscc  %%g1,%3,%%g1\n"                                         \
 943 "       mulscc  %%g1,%3,%%g1\n"                                         \
 944 "       mulscc  %%g1,%3,%%g1\n"                                         \
 945 "       mulscc  %%g1,%3,%%g1\n"                                         \
 946 "       mulscc  %%g1,%3,%%g1\n"                                         \
 947 "       mulscc  %%g1,%3,%%g1\n"                                         \
 948 "       mulscc  %%g1,%3,%%g1\n"                                         \
 949 "       mulscc  %%g1,%3,%%g1\n"                                         \
 950 "       mulscc  %%g1,%3,%%g1\n"                                         \
 951 "       mulscc  %%g1,%3,%%g1\n"                                         \
 952 "       mulscc  %%g1,%3,%%g1\n"                                         \
 953 "       mulscc  %%g1,%3,%%g1\n"                                         \
 954 "       mulscc  %%g1,%3,%%g1\n"                                         \
 955 "       mulscc  %%g1,%3,%%g1\n"                                         \
 956 "       mulscc  %%g1,%3,%%g1\n"                                         \
 957 "       mulscc  %%g1,%3,%%g1\n"                                         \
 958 "       mulscc  %%g1,%3,%%g1\n"                                         \
 959 "       mulscc  %%g1,%3,%%g1\n"                                         \
 960 "       mulscc  %%g1,%3,%%g1\n"                                         \
 961 "       mulscc  %%g1,%3,%%g1\n"                                         \
 962 "       mulscc  %%g1,%3,%%g1\n"                                         \
 963 "       mulscc  %%g1,%3,%%g1\n"                                         \
 964 "       mulscc  %%g1,%3,%%g1\n"                                         \
 965 "       mulscc  %%g1,%3,%%g1\n"                                         \
 966 "       mulscc  %%g1,%3,%%g1\n"                                         \
 967 "       mulscc  %%g1,%3,%%g1\n"                                         \
 968 "       mulscc  %%g1,%3,%%g1\n"                                         \
 969 "       mulscc  %%g1,%3,%%g1\n"                                         \
 970 "       mulscc  %%g1,0,%%g1\n"                                          \
 971 "       add     %%g1,%%o5,%0\n"                                         \
 972 "       rd      %%y,%1"                                                 \
 973            : "=r" ((USItype) (w1)),                                     \
 974              "=r" ((USItype) (w0))                                      \
 975            : "%rI" ((USItype) (u)),                                     \
 976              "r" ((USItype) (v))                                                \
 977            : "g1", "o5" __AND_CLOBBER_CC)
 978 #define UMUL_TIME 39            /* 39 instructions */
 979 /* It's quite necessary to add this much assembler for the sparc.
 980    The default udiv_qrnnd (in C) is more than 10 times slower!  */
 981 #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
 982   __asm__ ("! Inlined udiv_qrnnd\n"                                     \
 983 "       mov     32,%%g1\n"                                              \
 984 "       subcc   %1,%2,%%g0\n"                                           \
 985 "1:     bcs     5f\n"                                                   \
 986 "        addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb\n"      \
 987 "       sub     %1,%2,%1        ! this kills msb of n\n"                \
 988 "       addx    %1,%1,%1        ! so this can't give carry\n"           \
 989 "       subcc   %%g1,1,%%g1\n"                                          \
 990 "2:     bne     1b\n"                                                   \
 991 "        subcc  %1,%2,%%g0\n"                                           \
 992 "       bcs     3f\n"                                                   \
 993 "        addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb\n"      \
 994 "       b       3f\n"                                                   \
 995 "        sub    %1,%2,%1        ! this kills msb of n\n"                \
 996 "4:     sub     %1,%2,%1\n"                                             \
 997 "5:     addxcc  %1,%1,%1\n"                                             \
 998 "       bcc     2b\n"                                                   \
 999 "        subcc  %%g1,1,%%g1\n"                                          \
1000 "! Got carry from n.  Subtract next step to cancel this carry.\n"       \
1001 "       bne     4b\n"                                                   \
1002 "        addcc  %0,%0,%0        ! shift n1n0 and a 0-bit in lsb\n"      \
1003 "       sub     %1,%2,%1\n"                                             \
1004 "3:     xnor    %0,0,%0\n"                                              \
1005 "       ! End of inline udiv_qrnnd"                                     \
1006            : "=&r" ((USItype) (__q)),                                   \
1007              "=&r" ((USItype) (__r))                                    \
1008            : "r" ((USItype) (__d)),                                     \
1009              "1" ((USItype) (__n1)),                                    \
1010              "0" ((USItype) (__n0)) : "g1" __AND_CLOBBER_CC)
1011 #define UDIV_TIME (3+7*32)      /* 7 instructions/iteration. 32 iterations.  */
1012 #endif /* __sparclite__ */
1013 #endif /* __sparc_v8__ */
1014 #endif /* sparc32 */
1015
1016 #if ((defined (__sparc__) && defined (__arch64__)) || defined (__sparcv9)) \
1017     && W_TYPE_SIZE == 64
1018 #define add_ssaaaa(sh, sl, ah, al, bh, bl)                              \
1019   __asm__ ("addcc %r4,%5,%1\n\t"                                        \
1020            "add %r2,%3,%0\n\t"                                          \
1021            "bcs,a,pn %%xcc, 1f\n\t"                                     \
1022            "add %0, 1, %0\n"                                            \
1023            "1:"                                                         \
1024            : "=r" ((UDItype)(sh)),                                      \
1025              "=&r" ((UDItype)(sl))                                      \
1026            : "%rJ" ((UDItype)(ah)),                                     \
1027              "rI" ((UDItype)(bh)),                                      \
1028              "%rJ" ((UDItype)(al)),                                     \
1029              "rI" ((UDItype)(bl))                                       \
1030            __CLOBBER_CC)
1031
1032 #define sub_ddmmss(sh, sl, ah, al, bh, bl)                              \
1033   __asm__ ("subcc %r4,%5,%1\n\t"                                        \
1034            "sub %r2,%3,%0\n\t"                                          \
1035            "bcs,a,pn %%xcc, 1f\n\t"                                     \
1036            "sub %0, 1, %0\n\t"                                          \
1037            "1:"                                                         \
1038            : "=r" ((UDItype)(sh)),                                      \
1039              "=&r" ((UDItype)(sl))                                      \
1040            : "rJ" ((UDItype)(ah)),                                      \
1041              "rI" ((UDItype)(bh)),                                      \
1042              "rJ" ((UDItype)(al)),                                      \
1043              "rI" ((UDItype)(bl))                                       \
1044            __CLOBBER_CC)
1045
1046 #define umul_ppmm(wh, wl, u, v)                                         \
1047   do {                                                                  \
1048           UDItype tmp1, tmp2, tmp3, tmp4;                               \
1049           __asm__ __volatile__ (                                        \
1050                    "srl %7,0,%3\n\t"                                    \
1051                    "mulx %3,%6,%1\n\t"                                  \
1052                    "srlx %6,32,%2\n\t"                                  \
1053                    "mulx %2,%3,%4\n\t"                                  \
1054                    "sllx %4,32,%5\n\t"                                  \
1055                    "srl %6,0,%3\n\t"                                    \
1056                    "sub %1,%5,%5\n\t"                                   \
1057                    "srlx %5,32,%5\n\t"                                  \
1058                    "addcc %4,%5,%4\n\t"                                 \
1059                    "srlx %7,32,%5\n\t"                                  \
1060                    "mulx %3,%5,%3\n\t"                                  \
1061                    "mulx %2,%5,%5\n\t"                                  \
1062                    "sethi %%hi(0x80000000),%2\n\t"                      \
1063                    "addcc %4,%3,%4\n\t"                                 \
1064                    "srlx %4,32,%4\n\t"                                  \
1065                    "add %2,%2,%2\n\t"                                   \
1066                    "movcc %%xcc,%%g0,%2\n\t"                            \
1067                    "addcc %5,%4,%5\n\t"                                 \
1068                    "sllx %3,32,%3\n\t"                                  \
1069                    "add %1,%3,%1\n\t"                                   \
1070                    "add %5,%2,%0"                                       \
1071            : "=r" ((UDItype)(wh)),                                      \
1072              "=&r" ((UDItype)(wl)),                                     \
1073              "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4)     \
1074            : "r" ((UDItype)(u)),                                        \
1075              "r" ((UDItype)(v))                                         \
1076            __CLOBBER_CC);                                               \
1077   } while (0)
1078 #define UMUL_TIME 96
1079 #define UDIV_TIME 230
1080 #endif /* sparc64 */
1081
1082 #if defined (__vax__) && W_TYPE_SIZE == 32
1083 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1084   __asm__ ("addl2 %5,%1\n\tadwc %3,%0"                                  \
1085            : "=g" ((USItype) (sh)),                                     \
1086              "=&g" ((USItype) (sl))                                     \
1087            : "%0" ((USItype) (ah)),                                     \
1088              "g" ((USItype) (bh)),                                      \
1089              "%1" ((USItype) (al)),                                     \
1090              "g" ((USItype) (bl)))
1091 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1092   __asm__ ("subl2 %5,%1\n\tsbwc %3,%0"                                  \
1093            : "=g" ((USItype) (sh)),                                     \
1094              "=&g" ((USItype) (sl))                                     \
1095            : "0" ((USItype) (ah)),                                      \
1096              "g" ((USItype) (bh)),                                      \
1097              "1" ((USItype) (al)),                                      \
1098              "g" ((USItype) (bl)))
1099 #define umul_ppmm(xh, xl, m0, m1) \
1100   do {                                                                  \
1101     union {                                                             \
1102         UDItype __ll;                                                   \
1103         struct {USItype __l, __h;} __i;                                 \
1104       } __xx;                                                           \
1105     USItype __m0 = (m0), __m1 = (m1);                                   \
1106     __asm__ ("emul %1,%2,$0,%0"                                         \
1107              : "=r" (__xx.__ll)                                         \
1108              : "g" (__m0),                                              \
1109                "g" (__m1));                                             \
1110     (xh) = __xx.__i.__h;                                                \
1111     (xl) = __xx.__i.__l;                                                \
1112     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
1113              + (((SItype) __m1 >> 31) & __m0));                         \
1114   } while (0)
1115 #define sdiv_qrnnd(q, r, n1, n0, d) \
1116   do {                                                                  \
1117     union {DItype __ll;                                                 \
1118            struct {SItype __l, __h;} __i;                               \
1119           } __xx;                                                       \
1120     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
1121     __asm__ ("ediv %3,%2,%0,%1"                                         \
1122              : "=g" (q), "=g" (r)                                       \
1123              : "g" (__xx.__ll), "g" (d));                               \
1124   } while (0)
1125 #endif /* __vax__ */
1126
1127 #if defined (__z8000__) && W_TYPE_SIZE == 16
1128 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1129   __asm__ ("add %H1,%H5\n\tadc  %H0,%H3"                                \
1130            : "=r" ((unsigned int)(sh)),                                 \
1131              "=&r" ((unsigned int)(sl))                                 \
1132            : "%0" ((unsigned int)(ah)),                                 \
1133              "r" ((unsigned int)(bh)),                                  \
1134              "%1" ((unsigned int)(al)),                                 \
1135              "rQR" ((unsigned int)(bl)))
1136 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1137   __asm__ ("sub %H1,%H5\n\tsbc  %H0,%H3"                                \
1138            : "=r" ((unsigned int)(sh)),                                 \
1139              "=&r" ((unsigned int)(sl))                                 \
1140            : "0" ((unsigned int)(ah)),                                  \
1141              "r" ((unsigned int)(bh)),                                  \
1142              "1" ((unsigned int)(al)),                                  \
1143              "rQR" ((unsigned int)(bl)))
1144 #define umul_ppmm(xh, xl, m0, m1) \
1145   do {                                                                  \
1146     union {long int __ll;                                               \
1147            struct {unsigned int __h, __l;} __i;                         \
1148           } __xx;                                                       \
1149     unsigned int __m0 = (m0), __m1 = (m1);                              \
1150     __asm__ ("mult      %S0,%H3"                                        \
1151              : "=r" (__xx.__i.__h),                                     \
1152                "=r" (__xx.__i.__l)                                      \
1153              : "%1" (__m0),                                             \
1154                "rQR" (__m1));                                           \
1155     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1156     (xh) += ((((signed int) __m0 >> 15) & __m1)                         \
1157              + (((signed int) __m1 >> 15) & __m0));                     \
1158   } while (0)
1159 #endif /* __z8000__ */
1160
1161 #endif /* __GNUC__ */
1162
1163 /* If this machine has no inline assembler, use C macros.  */
1164
1165 #if !defined (add_ssaaaa)
1166 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1167   do {                                                                  \
1168     UWtype __x;                                                         \
1169     __x = (al) + (bl);                                                  \
1170     (sh) = (ah) + (bh) + (__x < (al));                                  \
1171     (sl) = __x;                                                         \
1172   } while (0)
1173 #endif
1174
1175 #if !defined (sub_ddmmss)
1176 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1177   do {                                                                  \
1178     UWtype __x;                                                         \
1179     __x = (al) - (bl);                                                  \
1180     (sh) = (ah) - (bh) - (__x > (al));                                  \
1181     (sl) = __x;                                                         \
1182   } while (0)
1183 #endif
1184
1185 /* If we lack umul_ppmm but have smul_ppmm, define umul_ppmm in terms of
1186    smul_ppmm.  */
1187 #if !defined (umul_ppmm) && defined (smul_ppmm)
1188 #define umul_ppmm(w1, w0, u, v)                                         \
1189   do {                                                                  \
1190     UWtype __w1;                                                        \
1191     UWtype __xm0 = (u), __xm1 = (v);                                    \
1192     smul_ppmm (__w1, w0, __xm0, __xm1);                                 \
1193     (w1) = __w1 + (-(__xm0 >> (W_TYPE_SIZE - 1)) & __xm1)               \
1194                 + (-(__xm1 >> (W_TYPE_SIZE - 1)) & __xm0);              \
1195   } while (0)
1196 #endif
1197
1198 /* If we still don't have umul_ppmm, define it using plain C.  */
1199 #if !defined (umul_ppmm)
1200 #define umul_ppmm(w1, w0, u, v)                                         \
1201   do {                                                                  \
1202     UWtype __x0, __x1, __x2, __x3;                                      \
1203     UHWtype __ul, __vl, __uh, __vh;                                     \
1204                                                                         \
1205     __ul = __ll_lowpart (u);                                            \
1206     __uh = __ll_highpart (u);                                           \
1207     __vl = __ll_lowpart (v);                                            \
1208     __vh = __ll_highpart (v);                                           \
1209                                                                         \
1210     __x0 = (UWtype) __ul * __vl;                                        \
1211     __x1 = (UWtype) __ul * __vh;                                        \
1212     __x2 = (UWtype) __uh * __vl;                                        \
1213     __x3 = (UWtype) __uh * __vh;                                        \
1214                                                                         \
1215     __x1 += __ll_highpart (__x0);/* this can't give carry */            \
1216     __x1 += __x2;               /* but this indeed can */               \
1217     if (__x1 < __x2)            /* did we get it? */                    \
1218       __x3 += __ll_B;           /* yes, add it in the proper pos.  */   \
1219                                                                         \
1220     (w1) = __x3 + __ll_highpart (__x1);                                 \
1221     (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0);          \
1222   } while (0)
1223 #endif
1224
1225 #if !defined (__umulsidi3)
1226 #define __umulsidi3(u, v) \
1227   ({DWunion __w;                                                        \
1228     umul_ppmm (__w.s.high, __w.s.low, u, v);                            \
1229     __w.ll; })
1230 #endif
1231
1232 /* Define this unconditionally, so it can be used for debugging.  */
1233 #define __udiv_qrnnd_c(q, r, n1, n0, d) \
1234   do {                                                                  \
1235     UWtype __d1, __d0, __q1, __q0;                                      \
1236     UWtype __r1, __r0, __m;                                             \
1237     __d1 = __ll_highpart (d);                                           \
1238     __d0 = __ll_lowpart (d);                                            \
1239                                                                         \
1240     __r1 = (n1) % __d1;                                                 \
1241     __q1 = (n1) / __d1;                                                 \
1242     __m = (UWtype) __q1 * __d0;                                         \
1243     __r1 = __r1 * __ll_B | __ll_highpart (n0);                          \
1244     if (__r1 < __m)                                                     \
1245       {                                                                 \
1246         __q1--, __r1 += (d);                                            \
1247         if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1248           if (__r1 < __m)                                               \
1249             __q1--, __r1 += (d);                                        \
1250       }                                                                 \
1251     __r1 -= __m;                                                        \
1252                                                                         \
1253     __r0 = __r1 % __d1;                                                 \
1254     __q0 = __r1 / __d1;                                                 \
1255     __m = (UWtype) __q0 * __d0;                                         \
1256     __r0 = __r0 * __ll_B | __ll_lowpart (n0);                           \
1257     if (__r0 < __m)                                                     \
1258       {                                                                 \
1259         __q0--, __r0 += (d);                                            \
1260         if (__r0 >= (d))                                                \
1261           if (__r0 < __m)                                               \
1262             __q0--, __r0 += (d);                                        \
1263       }                                                                 \
1264     __r0 -= __m;                                                        \
1265                                                                         \
1266     (q) = (UWtype) __q1 * __ll_B | __q0;                                \
1267     (r) = __r0;                                                         \
1268   } while (0)
1269
1270 /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1271    __udiv_w_sdiv (defined in libgcc or elsewhere).  */
1272 #if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1273 #define udiv_qrnnd(q, r, nh, nl, d) \
1274   do {                                                                  \
1275     USItype __r;                                                        \
1276     (q) = __udiv_w_sdiv (&__r, nh, nl, d);                              \
1277     (r) = __r;                                                          \
1278   } while (0)
1279 #endif
1280
1281 /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c.  */
1282 #if !defined (udiv_qrnnd)
1283 #define UDIV_NEEDS_NORMALIZATION 1
1284 #define udiv_qrnnd __udiv_qrnnd_c
1285 #endif
1286
1287 #if !defined (count_leading_zeros)
1288 extern const UQItype __clz_tab[] ATTRIBUTE_HIDDEN;
1289 #define count_leading_zeros(count, x) \
1290   do {                                                                  \
1291     UWtype __xr = (x);                                                  \
1292     UWtype __a;                                                         \
1293                                                                         \
1294     if (W_TYPE_SIZE <= 32)                                              \
1295       {                                                                 \
1296         __a = __xr < ((UWtype)1<<2*__BITS4)                             \
1297           ? (__xr < ((UWtype)1<<__BITS4) ? 0 : __BITS4)                 \
1298           : (__xr < ((UWtype)1<<3*__BITS4) ?  2*__BITS4 : 3*__BITS4);   \
1299       }                                                                 \
1300     else                                                                \
1301       {                                                                 \
1302         for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8)                  \
1303           if (((__xr >> __a) & 0xff) != 0)                              \
1304             break;                                                      \
1305       }                                                                 \
1306                                                                         \
1307     (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a);             \
1308   } while (0)
1309 #define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
1310 #endif
1311
1312 #if !defined (count_trailing_zeros)
1313 /* Define count_trailing_zeros using count_leading_zeros.  The latter might be
1314    defined in asm, but if it is not, the C version above is good enough.  */
1315 #define count_trailing_zeros(count, x) \
1316   do {                                                                  \
1317     UWtype __ctz_x = (x);                                               \
1318     UWtype __ctz_c;                                                     \
1319     count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x);                  \
1320     (count) = W_TYPE_SIZE - 1 - __ctz_c;                                \
1321   } while (0)
1322 #endif
1323
1324 #ifndef UDIV_NEEDS_NORMALIZATION
1325 #define UDIV_NEEDS_NORMALIZATION 0
1326 #endif