1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
23 /* This is the final pass of the compiler.
24 It looks at the rtl code for a function and outputs assembler code.
26 Call `final_start_function' to output the assembler code for function entry,
27 `final' to output assembler code for some RTL code,
28 `final_end_function' to output assembler code for function exit.
29 If a function is compiled in several pieces, each piece is
30 output separately with `final'.
32 Some optimizations are also done at this level.
33 Move instructions that were made unnecessary by good register allocation
34 are detected and omitted from the output. (Though most of these
35 are removed by the last jump pass.)
37 Instructions to set the condition codes are omitted when it can be
38 seen that the condition codes already had the desired values.
40 In some cases it is sufficient if the inherited condition codes
41 have related values, but this may require the following insn
42 (the one that tests the condition codes) to be modified.
44 The code for the function prologue and epilogue are generated
45 directly in assembler by the target functions function_prologue and
46 function_epilogue. Those instructions never exist as rtl. */
50 #include "coretypes.h"
57 #include "insn-config.h"
58 #include "insn-attr.h"
60 #include "conditions.h"
63 #include "hard-reg-set.h"
70 #include "basic-block.h"
74 #include "cfglayout.h"
75 #include "tree-pass.h"
80 #ifdef XCOFF_DEBUGGING_INFO
81 #include "xcoffout.h" /* Needed for external data
82 declarations for e.g. AIX 4.x. */
85 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
86 #include "dwarf2out.h"
89 #ifdef DBX_DEBUGGING_INFO
93 #ifdef SDB_DEBUGGING_INFO
97 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
98 null default for it to save conditionalization later. */
99 #ifndef CC_STATUS_INIT
100 #define CC_STATUS_INIT
103 /* How to start an assembler comment. */
104 #ifndef ASM_COMMENT_START
105 #define ASM_COMMENT_START ";#"
108 /* Is the given character a logical line separator for the assembler? */
109 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
110 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
113 #ifndef JUMP_TABLES_IN_TEXT_SECTION
114 #define JUMP_TABLES_IN_TEXT_SECTION 0
117 /* Bitflags used by final_scan_insn. */
120 #define SEEN_EMITTED 4
122 /* Last insn processed by final_scan_insn. */
123 static rtx debug_insn;
124 rtx current_output_insn;
126 /* Line number of last NOTE. */
127 static int last_linenum;
129 /* Highest line number in current block. */
130 static int high_block_linenum;
132 /* Likewise for function. */
133 static int high_function_linenum;
135 /* Filename of last NOTE. */
136 static const char *last_filename;
138 /* Whether to force emission of a line note before the next insn. */
139 static bool force_source_line = false;
141 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
143 /* Nonzero while outputting an `asm' with operands.
144 This means that inconsistencies are the user's fault, so don't die.
145 The precise value is the insn being output, to pass to error_for_asm. */
146 rtx this_is_asm_operands;
148 /* Number of operands of this insn, for an `asm' with operands. */
149 static unsigned int insn_noperands;
151 /* Compare optimization flag. */
153 static rtx last_ignored_compare = 0;
155 /* Assign a unique number to each insn that is output.
156 This can be used to generate unique local labels. */
158 static int insn_counter = 0;
161 /* This variable contains machine-dependent flags (defined in tm.h)
162 set and examined by output routines
163 that describe how to interpret the condition codes properly. */
167 /* During output of an insn, this contains a copy of cc_status
168 from before the insn. */
170 CC_STATUS cc_prev_status;
173 /* Indexed by hardware reg number, is 1 if that register is ever
174 used in the current function.
176 In life_analysis, or in stupid_life_analysis, this is set
177 up to record the hard regs used explicitly. Reload adds
178 in the hard regs used for holding pseudo regs. Final uses
179 it to generate the code in the function prologue and epilogue
180 to save and restore registers as needed. */
182 char regs_ever_live[FIRST_PSEUDO_REGISTER];
184 /* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
185 Unlike regs_ever_live, elements of this array corresponding to
186 eliminable regs like the frame pointer are set if an asm sets them. */
188 char regs_asm_clobbered[FIRST_PSEUDO_REGISTER];
190 /* Nonzero means current function must be given a frame pointer.
191 Initialized in function.c to 0. Set only in reload1.c as per
192 the needs of the function. */
194 int frame_pointer_needed;
196 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
198 static int block_depth;
200 /* Nonzero if have enabled APP processing of our assembler output. */
204 /* If we are outputting an insn sequence, this contains the sequence rtx.
209 #ifdef ASSEMBLER_DIALECT
211 /* Number of the assembler dialect to use, starting at 0. */
212 static int dialect_number;
215 #ifdef HAVE_conditional_execution
216 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
217 rtx current_insn_predicate;
220 #ifdef HAVE_ATTR_length
221 static int asm_insn_count (rtx);
223 static void profile_function (FILE *);
224 static void profile_after_prologue (FILE *);
225 static bool notice_source_line (rtx);
226 static rtx walk_alter_subreg (rtx *);
227 static void output_asm_name (void);
228 static void output_alternate_entry_point (FILE *, rtx);
229 static tree get_mem_expr_from_op (rtx, int *);
230 static void output_asm_operand_names (rtx *, int *, int);
231 static void output_operand (rtx, int);
232 #ifdef LEAF_REGISTERS
233 static void leaf_renumber_regs (rtx);
236 static int alter_cond (rtx);
238 #ifndef ADDR_VEC_ALIGN
239 static int final_addr_vec_align (rtx);
241 #ifdef HAVE_ATTR_length
242 static int align_fuzz (rtx, rtx, int, unsigned);
245 /* Initialize data in final at the beginning of a compilation. */
248 init_final (const char *filename ATTRIBUTE_UNUSED)
253 #ifdef ASSEMBLER_DIALECT
254 dialect_number = ASSEMBLER_DIALECT;
258 /* Default target function prologue and epilogue assembler output.
260 If not overridden for epilogue code, then the function body itself
261 contains return instructions wherever needed. */
263 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
264 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
268 /* Default target hook that outputs nothing to a stream. */
270 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
274 /* Enable APP processing of subsequent output.
275 Used before the output from an `asm' statement. */
282 fputs (ASM_APP_ON, asm_out_file);
287 /* Disable APP processing of subsequent output.
288 Called from varasm.c before most kinds of output. */
295 fputs (ASM_APP_OFF, asm_out_file);
300 /* Return the number of slots filled in the current
301 delayed branch sequence (we don't count the insn needing the
302 delay slot). Zero if not in a delayed branch sequence. */
306 dbr_sequence_length (void)
308 if (final_sequence != 0)
309 return XVECLEN (final_sequence, 0) - 1;
315 /* The next two pages contain routines used to compute the length of an insn
316 and to shorten branches. */
318 /* Arrays for insn lengths, and addresses. The latter is referenced by
319 `insn_current_length'. */
321 static int *insn_lengths;
323 varray_type insn_addresses_;
325 /* Max uid for which the above arrays are valid. */
326 static int insn_lengths_max_uid;
328 /* Address of insn being processed. Used by `insn_current_length'. */
329 int insn_current_address;
331 /* Address of insn being processed in previous iteration. */
332 int insn_last_address;
334 /* known invariant alignment of insn being processed. */
335 int insn_current_align;
337 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
338 gives the next following alignment insn that increases the known
339 alignment, or NULL_RTX if there is no such insn.
340 For any alignment obtained this way, we can again index uid_align with
341 its uid to obtain the next following align that in turn increases the
342 alignment, till we reach NULL_RTX; the sequence obtained this way
343 for each insn we'll call the alignment chain of this insn in the following
346 struct label_alignment
352 static rtx *uid_align;
353 static int *uid_shuid;
354 static struct label_alignment *label_align;
356 /* Indicate that branch shortening hasn't yet been done. */
359 init_insn_lengths (void)
370 insn_lengths_max_uid = 0;
372 #ifdef HAVE_ATTR_length
373 INSN_ADDRESSES_FREE ();
382 /* Obtain the current length of an insn. If branch shortening has been done,
383 get its actual length. Otherwise, use FALLBACK_FN to calculate the
386 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED,
387 int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED)
389 #ifdef HAVE_ATTR_length
394 if (insn_lengths_max_uid > INSN_UID (insn))
395 return insn_lengths[INSN_UID (insn)];
397 switch (GET_CODE (insn))
405 length = fallback_fn (insn);
409 body = PATTERN (insn);
410 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
412 /* Alignment is machine-dependent and should be handled by
416 length = fallback_fn (insn);
420 body = PATTERN (insn);
421 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
424 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
425 length = asm_insn_count (body) * fallback_fn (insn);
426 else if (GET_CODE (body) == SEQUENCE)
427 for (i = 0; i < XVECLEN (body, 0); i++)
428 length += get_attr_length (XVECEXP (body, 0, i));
430 length = fallback_fn (insn);
437 #ifdef ADJUST_INSN_LENGTH
438 ADJUST_INSN_LENGTH (insn, length);
441 #else /* not HAVE_ATTR_length */
443 #define insn_default_length 0
444 #define insn_min_length 0
445 #endif /* not HAVE_ATTR_length */
448 /* Obtain the current length of an insn. If branch shortening has been done,
449 get its actual length. Otherwise, get its maximum length. */
451 get_attr_length (rtx insn)
453 return get_attr_length_1 (insn, insn_default_length);
456 /* Obtain the current length of an insn. If branch shortening has been done,
457 get its actual length. Otherwise, get its minimum length. */
459 get_attr_min_length (rtx insn)
461 return get_attr_length_1 (insn, insn_min_length);
464 /* Code to handle alignment inside shorten_branches. */
466 /* Here is an explanation how the algorithm in align_fuzz can give
469 Call a sequence of instructions beginning with alignment point X
470 and continuing until the next alignment point `block X'. When `X'
471 is used in an expression, it means the alignment value of the
474 Call the distance between the start of the first insn of block X, and
475 the end of the last insn of block X `IX', for the `inner size of X'.
476 This is clearly the sum of the instruction lengths.
478 Likewise with the next alignment-delimited block following X, which we
481 Call the distance between the start of the first insn of block X, and
482 the start of the first insn of block Y `OX', for the `outer size of X'.
484 The estimated padding is then OX - IX.
486 OX can be safely estimated as
491 OX = round_up(IX, X) + Y - X
493 Clearly est(IX) >= real(IX), because that only depends on the
494 instruction lengths, and those being overestimated is a given.
496 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
497 we needn't worry about that when thinking about OX.
499 When X >= Y, the alignment provided by Y adds no uncertainty factor
500 for branch ranges starting before X, so we can just round what we have.
501 But when X < Y, we don't know anything about the, so to speak,
502 `middle bits', so we have to assume the worst when aligning up from an
503 address mod X to one mod Y, which is Y - X. */
506 #define LABEL_ALIGN(LABEL) align_labels_log
509 #ifndef LABEL_ALIGN_MAX_SKIP
510 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
514 #define LOOP_ALIGN(LABEL) align_loops_log
517 #ifndef LOOP_ALIGN_MAX_SKIP
518 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
521 #ifndef LABEL_ALIGN_AFTER_BARRIER
522 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
525 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
526 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
530 #define JUMP_ALIGN(LABEL) align_jumps_log
533 #ifndef JUMP_ALIGN_MAX_SKIP
534 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
537 #ifndef ADDR_VEC_ALIGN
539 final_addr_vec_align (rtx addr_vec)
541 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
543 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
544 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
545 return exact_log2 (align);
549 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
552 #ifndef INSN_LENGTH_ALIGNMENT
553 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
556 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
558 static int min_labelno, max_labelno;
560 #define LABEL_TO_ALIGNMENT(LABEL) \
561 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
563 #define LABEL_TO_MAX_SKIP(LABEL) \
564 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
566 /* For the benefit of port specific code do this also as a function. */
569 label_to_alignment (rtx label)
571 return LABEL_TO_ALIGNMENT (label);
574 #ifdef HAVE_ATTR_length
575 /* The differences in addresses
576 between a branch and its target might grow or shrink depending on
577 the alignment the start insn of the range (the branch for a forward
578 branch or the label for a backward branch) starts out on; if these
579 differences are used naively, they can even oscillate infinitely.
580 We therefore want to compute a 'worst case' address difference that
581 is independent of the alignment the start insn of the range end
582 up on, and that is at least as large as the actual difference.
583 The function align_fuzz calculates the amount we have to add to the
584 naively computed difference, by traversing the part of the alignment
585 chain of the start insn of the range that is in front of the end insn
586 of the range, and considering for each alignment the maximum amount
587 that it might contribute to a size increase.
589 For casesi tables, we also want to know worst case minimum amounts of
590 address difference, in case a machine description wants to introduce
591 some common offset that is added to all offsets in a table.
592 For this purpose, align_fuzz with a growth argument of 0 computes the
593 appropriate adjustment. */
595 /* Compute the maximum delta by which the difference of the addresses of
596 START and END might grow / shrink due to a different address for start
597 which changes the size of alignment insns between START and END.
598 KNOWN_ALIGN_LOG is the alignment known for START.
599 GROWTH should be ~0 if the objective is to compute potential code size
600 increase, and 0 if the objective is to compute potential shrink.
601 The return value is undefined for any other value of GROWTH. */
604 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
606 int uid = INSN_UID (start);
608 int known_align = 1 << known_align_log;
609 int end_shuid = INSN_SHUID (end);
612 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
614 int align_addr, new_align;
616 uid = INSN_UID (align_label);
617 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
618 if (uid_shuid[uid] > end_shuid)
620 known_align_log = LABEL_TO_ALIGNMENT (align_label);
621 new_align = 1 << known_align_log;
622 if (new_align < known_align)
624 fuzz += (-align_addr ^ growth) & (new_align - known_align);
625 known_align = new_align;
630 /* Compute a worst-case reference address of a branch so that it
631 can be safely used in the presence of aligned labels. Since the
632 size of the branch itself is unknown, the size of the branch is
633 not included in the range. I.e. for a forward branch, the reference
634 address is the end address of the branch as known from the previous
635 branch shortening pass, minus a value to account for possible size
636 increase due to alignment. For a backward branch, it is the start
637 address of the branch as known from the current pass, plus a value
638 to account for possible size increase due to alignment.
639 NB.: Therefore, the maximum offset allowed for backward branches needs
640 to exclude the branch size. */
643 insn_current_reference_address (rtx branch)
648 if (! INSN_ADDRESSES_SET_P ())
651 seq = NEXT_INSN (PREV_INSN (branch));
652 seq_uid = INSN_UID (seq);
653 if (!JUMP_P (branch))
654 /* This can happen for example on the PA; the objective is to know the
655 offset to address something in front of the start of the function.
656 Thus, we can treat it like a backward branch.
657 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
658 any alignment we'd encounter, so we skip the call to align_fuzz. */
659 return insn_current_address;
660 dest = JUMP_LABEL (branch);
662 /* BRANCH has no proper alignment chain set, so use SEQ.
663 BRANCH also has no INSN_SHUID. */
664 if (INSN_SHUID (seq) < INSN_SHUID (dest))
666 /* Forward branch. */
667 return (insn_last_address + insn_lengths[seq_uid]
668 - align_fuzz (seq, dest, length_unit_log, ~0));
672 /* Backward branch. */
673 return (insn_current_address
674 + align_fuzz (dest, seq, length_unit_log, ~0));
677 #endif /* HAVE_ATTR_length */
679 /* Compute branch alignments based on frequency information in the
683 compute_alignments (void)
685 int log, max_skip, max_log;
694 max_labelno = max_label_num ();
695 min_labelno = get_first_label_num ();
696 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
698 /* If not optimizing or optimizing for size, don't assign any alignments. */
699 if (! optimize || optimize_size)
704 rtx label = BB_HEAD (bb);
705 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
710 || probably_never_executed_bb_p (bb))
712 max_log = LABEL_ALIGN (label);
713 max_skip = LABEL_ALIGN_MAX_SKIP;
715 FOR_EACH_EDGE (e, ei, bb->preds)
717 if (e->flags & EDGE_FALLTHRU)
718 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
720 branch_frequency += EDGE_FREQUENCY (e);
723 /* There are two purposes to align block with no fallthru incoming edge:
724 1) to avoid fetch stalls when branch destination is near cache boundary
725 2) to improve cache efficiency in case the previous block is not executed
726 (so it does not need to be in the cache).
728 We to catch first case, we align frequently executed blocks.
729 To catch the second, we align blocks that are executed more frequently
730 than the predecessor and the predecessor is likely to not be executed
731 when function is called. */
734 && (branch_frequency > BB_FREQ_MAX / 10
735 || (bb->frequency > bb->prev_bb->frequency * 10
736 && (bb->prev_bb->frequency
737 <= ENTRY_BLOCK_PTR->frequency / 2))))
739 log = JUMP_ALIGN (label);
743 max_skip = JUMP_ALIGN_MAX_SKIP;
746 /* In case block is frequent and reached mostly by non-fallthru edge,
747 align it. It is most likely a first block of loop. */
749 && maybe_hot_bb_p (bb)
750 && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10
751 && branch_frequency > fallthru_frequency * 2)
753 log = LOOP_ALIGN (label);
757 max_skip = LOOP_ALIGN_MAX_SKIP;
760 LABEL_TO_ALIGNMENT (label) = max_log;
761 LABEL_TO_MAX_SKIP (label) = max_skip;
766 struct tree_opt_pass pass_compute_alignments =
770 compute_alignments, /* execute */
773 0, /* static_pass_number */
775 0, /* properties_required */
776 0, /* properties_provided */
777 0, /* properties_destroyed */
778 0, /* todo_flags_start */
779 0, /* todo_flags_finish */
784 /* Make a pass over all insns and compute their actual lengths by shortening
785 any branches of variable length if possible. */
787 /* shorten_branches might be called multiple times: for example, the SH
788 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
789 In order to do this, it needs proper length information, which it obtains
790 by calling shorten_branches. This cannot be collapsed with
791 shorten_branches itself into a single pass unless we also want to integrate
792 reorg.c, since the branch splitting exposes new instructions with delay
796 shorten_branches (rtx first ATTRIBUTE_UNUSED)
803 #ifdef HAVE_ATTR_length
804 #define MAX_CODE_ALIGN 16
806 int something_changed = 1;
807 char *varying_length;
810 rtx align_tab[MAX_CODE_ALIGN];
814 /* Compute maximum UID and allocate label_align / uid_shuid. */
815 max_uid = get_max_uid ();
817 /* Free uid_shuid before reallocating it. */
820 uid_shuid = XNEWVEC (int, max_uid);
822 if (max_labelno != max_label_num ())
824 int old = max_labelno;
828 max_labelno = max_label_num ();
830 n_labels = max_labelno - min_labelno + 1;
831 n_old_labels = old - min_labelno + 1;
833 label_align = xrealloc (label_align,
834 n_labels * sizeof (struct label_alignment));
836 /* Range of labels grows monotonically in the function. Failing here
837 means that the initialization of array got lost. */
838 gcc_assert (n_old_labels <= n_labels);
840 memset (label_align + n_old_labels, 0,
841 (n_labels - n_old_labels) * sizeof (struct label_alignment));
844 /* Initialize label_align and set up uid_shuid to be strictly
845 monotonically rising with insn order. */
846 /* We use max_log here to keep track of the maximum alignment we want to
847 impose on the next CODE_LABEL (or the current one if we are processing
848 the CODE_LABEL itself). */
853 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
857 INSN_SHUID (insn) = i++;
865 /* Merge in alignments computed by compute_alignments. */
866 log = LABEL_TO_ALIGNMENT (insn);
870 max_skip = LABEL_TO_MAX_SKIP (insn);
873 log = LABEL_ALIGN (insn);
877 max_skip = LABEL_ALIGN_MAX_SKIP;
879 next = next_nonnote_insn (insn);
880 /* ADDR_VECs only take room if read-only data goes into the text
882 if (JUMP_TABLES_IN_TEXT_SECTION
883 || readonly_data_section == text_section)
884 if (next && JUMP_P (next))
886 rtx nextbody = PATTERN (next);
887 if (GET_CODE (nextbody) == ADDR_VEC
888 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
890 log = ADDR_VEC_ALIGN (next);
894 max_skip = LABEL_ALIGN_MAX_SKIP;
898 LABEL_TO_ALIGNMENT (insn) = max_log;
899 LABEL_TO_MAX_SKIP (insn) = max_skip;
903 else if (BARRIER_P (insn))
907 for (label = insn; label && ! INSN_P (label);
908 label = NEXT_INSN (label))
911 log = LABEL_ALIGN_AFTER_BARRIER (insn);
915 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
921 #ifdef HAVE_ATTR_length
923 /* Allocate the rest of the arrays. */
924 insn_lengths = XNEWVEC (int, max_uid);
925 insn_lengths_max_uid = max_uid;
926 /* Syntax errors can lead to labels being outside of the main insn stream.
927 Initialize insn_addresses, so that we get reproducible results. */
928 INSN_ADDRESSES_ALLOC (max_uid);
930 varying_length = XCNEWVEC (char, max_uid);
932 /* Initialize uid_align. We scan instructions
933 from end to start, and keep in align_tab[n] the last seen insn
934 that does an alignment of at least n+1, i.e. the successor
935 in the alignment chain for an insn that does / has a known
937 uid_align = XCNEWVEC (rtx, max_uid);
939 for (i = MAX_CODE_ALIGN; --i >= 0;)
940 align_tab[i] = NULL_RTX;
941 seq = get_last_insn ();
942 for (; seq; seq = PREV_INSN (seq))
944 int uid = INSN_UID (seq);
946 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
947 uid_align[uid] = align_tab[0];
950 /* Found an alignment label. */
951 uid_align[uid] = align_tab[log];
952 for (i = log - 1; i >= 0; i--)
956 #ifdef CASE_VECTOR_SHORTEN_MODE
959 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
962 int min_shuid = INSN_SHUID (get_insns ()) - 1;
963 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
966 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
968 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
969 int len, i, min, max, insn_shuid;
971 addr_diff_vec_flags flags;
974 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
976 pat = PATTERN (insn);
977 len = XVECLEN (pat, 1);
978 gcc_assert (len > 0);
979 min_align = MAX_CODE_ALIGN;
980 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
982 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
983 int shuid = INSN_SHUID (lab);
994 if (min_align > LABEL_TO_ALIGNMENT (lab))
995 min_align = LABEL_TO_ALIGNMENT (lab);
997 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
998 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
999 insn_shuid = INSN_SHUID (insn);
1000 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1001 memset (&flags, 0, sizeof (flags));
1002 flags.min_align = min_align;
1003 flags.base_after_vec = rel > insn_shuid;
1004 flags.min_after_vec = min > insn_shuid;
1005 flags.max_after_vec = max > insn_shuid;
1006 flags.min_after_base = min > rel;
1007 flags.max_after_base = max > rel;
1008 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1011 #endif /* CASE_VECTOR_SHORTEN_MODE */
1013 /* Compute initial lengths, addresses, and varying flags for each insn. */
1014 for (insn_current_address = 0, insn = first;
1016 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1018 uid = INSN_UID (insn);
1020 insn_lengths[uid] = 0;
1024 int log = LABEL_TO_ALIGNMENT (insn);
1027 int align = 1 << log;
1028 int new_address = (insn_current_address + align - 1) & -align;
1029 insn_lengths[uid] = new_address - insn_current_address;
1033 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1035 if (NOTE_P (insn) || BARRIER_P (insn)
1038 if (INSN_DELETED_P (insn))
1041 body = PATTERN (insn);
1042 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1044 /* This only takes room if read-only data goes into the text
1046 if (JUMP_TABLES_IN_TEXT_SECTION
1047 || readonly_data_section == text_section)
1048 insn_lengths[uid] = (XVECLEN (body,
1049 GET_CODE (body) == ADDR_DIFF_VEC)
1050 * GET_MODE_SIZE (GET_MODE (body)));
1051 /* Alignment is handled by ADDR_VEC_ALIGN. */
1053 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1054 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1055 else if (GET_CODE (body) == SEQUENCE)
1058 int const_delay_slots;
1060 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1062 const_delay_slots = 0;
1064 /* Inside a delay slot sequence, we do not do any branch shortening
1065 if the shortening could change the number of delay slots
1067 for (i = 0; i < XVECLEN (body, 0); i++)
1069 rtx inner_insn = XVECEXP (body, 0, i);
1070 int inner_uid = INSN_UID (inner_insn);
1073 if (GET_CODE (body) == ASM_INPUT
1074 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1075 inner_length = (asm_insn_count (PATTERN (inner_insn))
1076 * insn_default_length (inner_insn));
1078 inner_length = insn_default_length (inner_insn);
1080 insn_lengths[inner_uid] = inner_length;
1081 if (const_delay_slots)
1083 if ((varying_length[inner_uid]
1084 = insn_variable_length_p (inner_insn)) != 0)
1085 varying_length[uid] = 1;
1086 INSN_ADDRESSES (inner_uid) = (insn_current_address
1087 + insn_lengths[uid]);
1090 varying_length[inner_uid] = 0;
1091 insn_lengths[uid] += inner_length;
1094 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1096 insn_lengths[uid] = insn_default_length (insn);
1097 varying_length[uid] = insn_variable_length_p (insn);
1100 /* If needed, do any adjustment. */
1101 #ifdef ADJUST_INSN_LENGTH
1102 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1103 if (insn_lengths[uid] < 0)
1104 fatal_insn ("negative insn length", insn);
1108 /* Now loop over all the insns finding varying length insns. For each,
1109 get the current insn length. If it has changed, reflect the change.
1110 When nothing changes for a full pass, we are done. */
1112 while (something_changed)
1114 something_changed = 0;
1115 insn_current_align = MAX_CODE_ALIGN - 1;
1116 for (insn_current_address = 0, insn = first;
1118 insn = NEXT_INSN (insn))
1121 #ifdef ADJUST_INSN_LENGTH
1126 uid = INSN_UID (insn);
1130 int log = LABEL_TO_ALIGNMENT (insn);
1131 if (log > insn_current_align)
1133 int align = 1 << log;
1134 int new_address= (insn_current_address + align - 1) & -align;
1135 insn_lengths[uid] = new_address - insn_current_address;
1136 insn_current_align = log;
1137 insn_current_address = new_address;
1140 insn_lengths[uid] = 0;
1141 INSN_ADDRESSES (uid) = insn_current_address;
1145 length_align = INSN_LENGTH_ALIGNMENT (insn);
1146 if (length_align < insn_current_align)
1147 insn_current_align = length_align;
1149 insn_last_address = INSN_ADDRESSES (uid);
1150 INSN_ADDRESSES (uid) = insn_current_address;
1152 #ifdef CASE_VECTOR_SHORTEN_MODE
1153 if (optimize && JUMP_P (insn)
1154 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1156 rtx body = PATTERN (insn);
1157 int old_length = insn_lengths[uid];
1158 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1159 rtx min_lab = XEXP (XEXP (body, 2), 0);
1160 rtx max_lab = XEXP (XEXP (body, 3), 0);
1161 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1162 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1163 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1166 addr_diff_vec_flags flags;
1168 /* Avoid automatic aggregate initialization. */
1169 flags = ADDR_DIFF_VEC_FLAGS (body);
1171 /* Try to find a known alignment for rel_lab. */
1172 for (prev = rel_lab;
1174 && ! insn_lengths[INSN_UID (prev)]
1175 && ! (varying_length[INSN_UID (prev)] & 1);
1176 prev = PREV_INSN (prev))
1177 if (varying_length[INSN_UID (prev)] & 2)
1179 rel_align = LABEL_TO_ALIGNMENT (prev);
1183 /* See the comment on addr_diff_vec_flags in rtl.h for the
1184 meaning of the flags values. base: REL_LAB vec: INSN */
1185 /* Anything after INSN has still addresses from the last
1186 pass; adjust these so that they reflect our current
1187 estimate for this pass. */
1188 if (flags.base_after_vec)
1189 rel_addr += insn_current_address - insn_last_address;
1190 if (flags.min_after_vec)
1191 min_addr += insn_current_address - insn_last_address;
1192 if (flags.max_after_vec)
1193 max_addr += insn_current_address - insn_last_address;
1194 /* We want to know the worst case, i.e. lowest possible value
1195 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1196 its offset is positive, and we have to be wary of code shrink;
1197 otherwise, it is negative, and we have to be vary of code
1199 if (flags.min_after_base)
1201 /* If INSN is between REL_LAB and MIN_LAB, the size
1202 changes we are about to make can change the alignment
1203 within the observed offset, therefore we have to break
1204 it up into two parts that are independent. */
1205 if (! flags.base_after_vec && flags.min_after_vec)
1207 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1208 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1211 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1215 if (flags.base_after_vec && ! flags.min_after_vec)
1217 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1218 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1221 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1223 /* Likewise, determine the highest lowest possible value
1224 for the offset of MAX_LAB. */
1225 if (flags.max_after_base)
1227 if (! flags.base_after_vec && flags.max_after_vec)
1229 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1230 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1233 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1237 if (flags.base_after_vec && ! flags.max_after_vec)
1239 max_addr += align_fuzz (max_lab, insn, 0, 0);
1240 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1243 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1245 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1246 max_addr - rel_addr,
1248 if (JUMP_TABLES_IN_TEXT_SECTION
1249 || readonly_data_section == text_section)
1252 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1253 insn_current_address += insn_lengths[uid];
1254 if (insn_lengths[uid] != old_length)
1255 something_changed = 1;
1260 #endif /* CASE_VECTOR_SHORTEN_MODE */
1262 if (! (varying_length[uid]))
1264 if (NONJUMP_INSN_P (insn)
1265 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1269 body = PATTERN (insn);
1270 for (i = 0; i < XVECLEN (body, 0); i++)
1272 rtx inner_insn = XVECEXP (body, 0, i);
1273 int inner_uid = INSN_UID (inner_insn);
1275 INSN_ADDRESSES (inner_uid) = insn_current_address;
1277 insn_current_address += insn_lengths[inner_uid];
1281 insn_current_address += insn_lengths[uid];
1286 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1290 body = PATTERN (insn);
1292 for (i = 0; i < XVECLEN (body, 0); i++)
1294 rtx inner_insn = XVECEXP (body, 0, i);
1295 int inner_uid = INSN_UID (inner_insn);
1298 INSN_ADDRESSES (inner_uid) = insn_current_address;
1300 /* insn_current_length returns 0 for insns with a
1301 non-varying length. */
1302 if (! varying_length[inner_uid])
1303 inner_length = insn_lengths[inner_uid];
1305 inner_length = insn_current_length (inner_insn);
1307 if (inner_length != insn_lengths[inner_uid])
1309 insn_lengths[inner_uid] = inner_length;
1310 something_changed = 1;
1312 insn_current_address += insn_lengths[inner_uid];
1313 new_length += inner_length;
1318 new_length = insn_current_length (insn);
1319 insn_current_address += new_length;
1322 #ifdef ADJUST_INSN_LENGTH
1323 /* If needed, do any adjustment. */
1324 tmp_length = new_length;
1325 ADJUST_INSN_LENGTH (insn, new_length);
1326 insn_current_address += (new_length - tmp_length);
1329 if (new_length != insn_lengths[uid])
1331 insn_lengths[uid] = new_length;
1332 something_changed = 1;
1335 /* For a non-optimizing compile, do only a single pass. */
1340 free (varying_length);
1342 #endif /* HAVE_ATTR_length */
1345 #ifdef HAVE_ATTR_length
1346 /* Given the body of an INSN known to be generated by an ASM statement, return
1347 the number of machine instructions likely to be generated for this insn.
1348 This is used to compute its length. */
1351 asm_insn_count (rtx body)
1353 const char *template;
1356 if (GET_CODE (body) == ASM_INPUT)
1357 template = XSTR (body, 0);
1359 template = decode_asm_operands (body, NULL, NULL, NULL, NULL);
1361 for (; *template; template++)
1362 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1369 /* Output assembler code for the start of a function,
1370 and initialize some of the variables in this file
1371 for the new function. The label for the function and associated
1372 assembler pseudo-ops have already been output in `assemble_start_function'.
1374 FIRST is the first insn of the rtl for the function being compiled.
1375 FILE is the file to write assembler code to.
1376 OPTIMIZE is nonzero if we should eliminate redundant
1377 test and compare insns. */
1380 final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1381 int optimize ATTRIBUTE_UNUSED)
1385 this_is_asm_operands = 0;
1387 last_filename = locator_file (prologue_locator);
1388 last_linenum = locator_line (prologue_locator);
1390 high_block_linenum = high_function_linenum = last_linenum;
1392 (*debug_hooks->begin_prologue) (last_linenum, last_filename);
1394 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
1395 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1396 dwarf2out_begin_prologue (0, NULL);
1399 #ifdef LEAF_REG_REMAP
1400 if (current_function_uses_only_leaf_regs)
1401 leaf_renumber_regs (first);
1404 /* The Sun386i and perhaps other machines don't work right
1405 if the profiling code comes after the prologue. */
1406 #ifdef PROFILE_BEFORE_PROLOGUE
1407 if (current_function_profile)
1408 profile_function (file);
1409 #endif /* PROFILE_BEFORE_PROLOGUE */
1411 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1412 if (dwarf2out_do_frame ())
1413 dwarf2out_frame_debug (NULL_RTX, false);
1416 /* If debugging, assign block numbers to all of the blocks in this
1420 reemit_insn_block_notes ();
1421 number_blocks (current_function_decl);
1422 /* We never actually put out begin/end notes for the top-level
1423 block in the function. But, conceptually, that block is
1425 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1428 /* First output the function prologue: code to set up the stack frame. */
1429 targetm.asm_out.function_prologue (file, get_frame_size ());
1431 /* If the machine represents the prologue as RTL, the profiling code must
1432 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1433 #ifdef HAVE_prologue
1434 if (! HAVE_prologue)
1436 profile_after_prologue (file);
1440 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1442 #ifndef PROFILE_BEFORE_PROLOGUE
1443 if (current_function_profile)
1444 profile_function (file);
1445 #endif /* not PROFILE_BEFORE_PROLOGUE */
1449 profile_function (FILE *file ATTRIBUTE_UNUSED)
1451 #ifndef NO_PROFILE_COUNTERS
1452 # define NO_PROFILE_COUNTERS 0
1454 #if defined(ASM_OUTPUT_REG_PUSH)
1455 int sval = current_function_returns_struct;
1456 rtx svrtx = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), 1);
1457 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1458 int cxt = cfun->static_chain_decl != NULL;
1460 #endif /* ASM_OUTPUT_REG_PUSH */
1462 if (! NO_PROFILE_COUNTERS)
1464 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1465 switch_to_section (data_section);
1466 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1467 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1468 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1471 switch_to_section (current_function_section ());
1473 #if defined(ASM_OUTPUT_REG_PUSH)
1474 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
1475 ASM_OUTPUT_REG_PUSH (file, REGNO (svrtx));
1478 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1480 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1482 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1485 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1490 FUNCTION_PROFILER (file, current_function_funcdef_no);
1492 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1494 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1496 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1499 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1504 #if defined(ASM_OUTPUT_REG_PUSH)
1505 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
1506 ASM_OUTPUT_REG_POP (file, REGNO (svrtx));
1510 /* Output assembler code for the end of a function.
1511 For clarity, args are same as those of `final_start_function'
1512 even though not all of them are needed. */
1515 final_end_function (void)
1519 (*debug_hooks->end_function) (high_function_linenum);
1521 /* Finally, output the function epilogue:
1522 code to restore the stack frame and return to the caller. */
1523 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1525 /* And debug output. */
1526 (*debug_hooks->end_epilogue) (last_linenum, last_filename);
1528 #if defined (DWARF2_UNWIND_INFO)
1529 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG
1530 && dwarf2out_do_frame ())
1531 dwarf2out_end_epilogue (last_linenum, last_filename);
1535 /* Output assembler code for some insns: all or part of a function.
1536 For description of args, see `final_start_function', above. */
1539 final (rtx first, FILE *file, int optimize)
1545 last_ignored_compare = 0;
1547 #ifdef SDB_DEBUGGING_INFO
1548 /* When producing SDB debugging info, delete troublesome line number
1549 notes from inlined functions in other files as well as duplicate
1550 line number notes. */
1551 if (write_symbols == SDB_DEBUG)
1554 for (insn = first; insn; insn = NEXT_INSN (insn))
1555 if (NOTE_P (insn) && NOTE_LINE_NUMBER (insn) > 0)
1558 #ifdef USE_MAPPED_LOCATION
1559 && NOTE_SOURCE_LOCATION (insn) == NOTE_SOURCE_LOCATION (last)
1561 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1562 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)
1566 delete_insn (insn); /* Use delete_note. */
1574 for (insn = first; insn; insn = NEXT_INSN (insn))
1576 if (INSN_UID (insn) > max_uid) /* Find largest UID. */
1577 max_uid = INSN_UID (insn);
1579 /* If CC tracking across branches is enabled, record the insn which
1580 jumps to each branch only reached from one place. */
1581 if (optimize && JUMP_P (insn))
1583 rtx lab = JUMP_LABEL (insn);
1584 if (lab && LABEL_NUSES (lab) == 1)
1586 LABEL_REFS (lab) = insn;
1596 /* Output the insns. */
1597 for (insn = first; insn;)
1599 #ifdef HAVE_ATTR_length
1600 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1602 /* This can be triggered by bugs elsewhere in the compiler if
1603 new insns are created after init_insn_lengths is called. */
1604 gcc_assert (NOTE_P (insn));
1605 insn_current_address = -1;
1608 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1609 #endif /* HAVE_ATTR_length */
1611 insn = final_scan_insn (insn, file, optimize, 0, &seen);
1616 get_insn_template (int code, rtx insn)
1618 switch (insn_data[code].output_format)
1620 case INSN_OUTPUT_FORMAT_SINGLE:
1621 return insn_data[code].output.single;
1622 case INSN_OUTPUT_FORMAT_MULTI:
1623 return insn_data[code].output.multi[which_alternative];
1624 case INSN_OUTPUT_FORMAT_FUNCTION:
1626 return (*insn_data[code].output.function) (recog_data.operand, insn);
1633 /* Emit the appropriate declaration for an alternate-entry-point
1634 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1635 LABEL_KIND != LABEL_NORMAL.
1637 The case fall-through in this function is intentional. */
1639 output_alternate_entry_point (FILE *file, rtx insn)
1641 const char *name = LABEL_NAME (insn);
1643 switch (LABEL_KIND (insn))
1645 case LABEL_WEAK_ENTRY:
1646 #ifdef ASM_WEAKEN_LABEL
1647 ASM_WEAKEN_LABEL (file, name);
1649 case LABEL_GLOBAL_ENTRY:
1650 targetm.asm_out.globalize_label (file, name);
1651 case LABEL_STATIC_ENTRY:
1652 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1653 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1655 ASM_OUTPUT_LABEL (file, name);
1664 /* The final scan for one insn, INSN.
1665 Args are same as in `final', except that INSN
1666 is the insn being scanned.
1667 Value returned is the next insn to be scanned.
1669 NOPEEPHOLES is the flag to disallow peephole processing (currently
1670 used for within delayed branch sequence output).
1672 SEEN is used to track the end of the prologue, for emitting
1673 debug information. We force the emission of a line note after
1674 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1675 at the beginning of the second basic block, whichever comes
1679 final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
1680 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
1689 /* Ignore deleted insns. These can occur when we split insns (due to a
1690 template of "#") while not optimizing. */
1691 if (INSN_DELETED_P (insn))
1692 return NEXT_INSN (insn);
1694 switch (GET_CODE (insn))
1697 switch (NOTE_LINE_NUMBER (insn))
1699 case NOTE_INSN_DELETED:
1700 case NOTE_INSN_FUNCTION_END:
1703 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
1704 in_cold_section_p = !in_cold_section_p;
1705 (*debug_hooks->switch_text_section) ();
1706 switch_to_section (current_function_section ());
1709 case NOTE_INSN_BASIC_BLOCK:
1710 #ifdef TARGET_UNWIND_INFO
1711 targetm.asm_out.unwind_emit (asm_out_file, insn);
1715 fprintf (asm_out_file, "\t%s basic block %d\n",
1716 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
1718 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
1720 *seen |= SEEN_EMITTED;
1721 force_source_line = true;
1728 case NOTE_INSN_EH_REGION_BEG:
1729 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
1730 NOTE_EH_HANDLER (insn));
1733 case NOTE_INSN_EH_REGION_END:
1734 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
1735 NOTE_EH_HANDLER (insn));
1738 case NOTE_INSN_PROLOGUE_END:
1739 targetm.asm_out.function_end_prologue (file);
1740 profile_after_prologue (file);
1742 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1744 *seen |= SEEN_EMITTED;
1745 force_source_line = true;
1752 case NOTE_INSN_EPILOGUE_BEG:
1753 targetm.asm_out.function_begin_epilogue (file);
1756 case NOTE_INSN_FUNCTION_BEG:
1758 (*debug_hooks->end_prologue) (last_linenum, last_filename);
1760 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1762 *seen |= SEEN_EMITTED;
1763 force_source_line = true;
1770 case NOTE_INSN_BLOCK_BEG:
1771 if (debug_info_level == DINFO_LEVEL_NORMAL
1772 || debug_info_level == DINFO_LEVEL_VERBOSE
1773 || write_symbols == DWARF2_DEBUG
1774 || write_symbols == VMS_AND_DWARF2_DEBUG
1775 || write_symbols == VMS_DEBUG)
1777 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1781 high_block_linenum = last_linenum;
1783 /* Output debugging info about the symbol-block beginning. */
1784 (*debug_hooks->begin_block) (last_linenum, n);
1786 /* Mark this block as output. */
1787 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
1791 case NOTE_INSN_BLOCK_END:
1792 if (debug_info_level == DINFO_LEVEL_NORMAL
1793 || debug_info_level == DINFO_LEVEL_VERBOSE
1794 || write_symbols == DWARF2_DEBUG
1795 || write_symbols == VMS_AND_DWARF2_DEBUG
1796 || write_symbols == VMS_DEBUG)
1798 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1802 /* End of a symbol-block. */
1804 gcc_assert (block_depth >= 0);
1806 (*debug_hooks->end_block) (high_block_linenum, n);
1810 case NOTE_INSN_DELETED_LABEL:
1811 /* Emit the label. We may have deleted the CODE_LABEL because
1812 the label could be proved to be unreachable, though still
1813 referenced (in the form of having its address taken. */
1814 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
1817 case NOTE_INSN_VAR_LOCATION:
1818 (*debug_hooks->var_location) (insn);
1825 gcc_assert (NOTE_LINE_NUMBER (insn) > 0);
1831 #if defined (DWARF2_UNWIND_INFO)
1832 if (dwarf2out_do_frame ())
1833 dwarf2out_frame_debug (insn, false);
1838 /* The target port might emit labels in the output function for
1839 some insn, e.g. sh.c output_branchy_insn. */
1840 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
1842 int align = LABEL_TO_ALIGNMENT (insn);
1843 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1844 int max_skip = LABEL_TO_MAX_SKIP (insn);
1847 if (align && NEXT_INSN (insn))
1849 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1850 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
1852 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1853 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
1855 ASM_OUTPUT_ALIGN (file, align);
1862 /* If this label is reached from only one place, set the condition
1863 codes from the instruction just before the branch. */
1865 /* Disabled because some insns set cc_status in the C output code
1866 and NOTICE_UPDATE_CC alone can set incorrect status. */
1867 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
1869 rtx jump = LABEL_REFS (insn);
1870 rtx barrier = prev_nonnote_insn (insn);
1872 /* If the LABEL_REFS field of this label has been set to point
1873 at a branch, the predecessor of the branch is a regular
1874 insn, and that branch is the only way to reach this label,
1875 set the condition codes based on the branch and its
1877 if (barrier && BARRIER_P (barrier)
1878 && jump && JUMP_P (jump)
1879 && (prev = prev_nonnote_insn (jump))
1880 && NONJUMP_INSN_P (prev))
1882 NOTICE_UPDATE_CC (PATTERN (prev), prev);
1883 NOTICE_UPDATE_CC (PATTERN (jump), jump);
1888 if (LABEL_NAME (insn))
1889 (*debug_hooks->label) (insn);
1893 fputs (ASM_APP_OFF, file);
1897 next = next_nonnote_insn (insn);
1898 if (next != 0 && JUMP_P (next))
1900 rtx nextbody = PATTERN (next);
1902 /* If this label is followed by a jump-table,
1903 make sure we put the label in the read-only section. Also
1904 possibly write the label and jump table together. */
1906 if (GET_CODE (nextbody) == ADDR_VEC
1907 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
1909 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1910 /* In this case, the case vector is being moved by the
1911 target, so don't output the label at all. Leave that
1912 to the back end macros. */
1914 if (! JUMP_TABLES_IN_TEXT_SECTION)
1918 switch_to_section (targetm.asm_out.function_rodata_section
1919 (current_function_decl));
1921 #ifdef ADDR_VEC_ALIGN
1922 log_align = ADDR_VEC_ALIGN (next);
1924 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
1926 ASM_OUTPUT_ALIGN (file, log_align);
1929 switch_to_section (current_function_section ());
1931 #ifdef ASM_OUTPUT_CASE_LABEL
1932 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
1935 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
1941 if (LABEL_ALT_ENTRY_P (insn))
1942 output_alternate_entry_point (file, insn);
1944 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
1949 rtx body = PATTERN (insn);
1950 int insn_code_number;
1951 const char *template;
1953 #ifdef HAVE_conditional_execution
1954 /* Reset this early so it is correct for ASM statements. */
1955 current_insn_predicate = NULL_RTX;
1957 /* An INSN, JUMP_INSN or CALL_INSN.
1958 First check for special kinds that recog doesn't recognize. */
1960 if (GET_CODE (body) == USE /* These are just declarations. */
1961 || GET_CODE (body) == CLOBBER)
1966 /* If there is a REG_CC_SETTER note on this insn, it means that
1967 the setting of the condition code was done in the delay slot
1968 of the insn that branched here. So recover the cc status
1969 from the insn that set it. */
1971 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
1974 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
1975 cc_prev_status = cc_status;
1980 /* Detect insns that are really jump-tables
1981 and output them as such. */
1983 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1985 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
1989 if (! JUMP_TABLES_IN_TEXT_SECTION)
1990 switch_to_section (targetm.asm_out.function_rodata_section
1991 (current_function_decl));
1993 switch_to_section (current_function_section ());
1997 fputs (ASM_APP_OFF, file);
2001 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2002 if (GET_CODE (body) == ADDR_VEC)
2004 #ifdef ASM_OUTPUT_ADDR_VEC
2005 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2012 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2013 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2019 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2020 for (idx = 0; idx < vlen; idx++)
2022 if (GET_CODE (body) == ADDR_VEC)
2024 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2025 ASM_OUTPUT_ADDR_VEC_ELT
2026 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2033 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2034 ASM_OUTPUT_ADDR_DIFF_ELT
2037 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2038 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2044 #ifdef ASM_OUTPUT_CASE_END
2045 ASM_OUTPUT_CASE_END (file,
2046 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2051 switch_to_section (current_function_section ());
2055 /* Output this line note if it is the first or the last line
2057 if (notice_source_line (insn))
2059 (*debug_hooks->source_line) (last_linenum, last_filename);
2062 if (GET_CODE (body) == ASM_INPUT)
2064 const char *string = XSTR (body, 0);
2066 /* There's no telling what that did to the condition codes. */
2073 fputs (ASM_APP_ON, file);
2076 fprintf (asm_out_file, "\t%s\n", string);
2081 /* Detect `asm' construct with operands. */
2082 if (asm_noperands (body) >= 0)
2084 unsigned int noperands = asm_noperands (body);
2085 rtx *ops = alloca (noperands * sizeof (rtx));
2088 /* There's no telling what that did to the condition codes. */
2091 /* Get out the operand values. */
2092 string = decode_asm_operands (body, ops, NULL, NULL, NULL);
2093 /* Inhibit dieing on what would otherwise be compiler bugs. */
2094 insn_noperands = noperands;
2095 this_is_asm_operands = insn;
2097 #ifdef FINAL_PRESCAN_INSN
2098 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2101 /* Output the insn using them. */
2106 fputs (ASM_APP_ON, file);
2109 output_asm_insn (string, ops);
2112 this_is_asm_operands = 0;
2118 fputs (ASM_APP_OFF, file);
2122 if (GET_CODE (body) == SEQUENCE)
2124 /* A delayed-branch sequence */
2127 final_sequence = body;
2129 /* Record the delay slots' frame information before the branch.
2130 This is needed for delayed calls: see execute_cfa_program(). */
2131 #if defined (DWARF2_UNWIND_INFO)
2132 if (dwarf2out_do_frame ())
2133 for (i = 1; i < XVECLEN (body, 0); i++)
2134 dwarf2out_frame_debug (XVECEXP (body, 0, i), false);
2137 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2138 force the restoration of a comparison that was previously
2139 thought unnecessary. If that happens, cancel this sequence
2140 and cause that insn to be restored. */
2142 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
2143 if (next != XVECEXP (body, 0, 1))
2149 for (i = 1; i < XVECLEN (body, 0); i++)
2151 rtx insn = XVECEXP (body, 0, i);
2152 rtx next = NEXT_INSN (insn);
2153 /* We loop in case any instruction in a delay slot gets
2156 insn = final_scan_insn (insn, file, 0, 1, seen);
2157 while (insn != next);
2159 #ifdef DBR_OUTPUT_SEQEND
2160 DBR_OUTPUT_SEQEND (file);
2164 /* If the insn requiring the delay slot was a CALL_INSN, the
2165 insns in the delay slot are actually executed before the
2166 called function. Hence we don't preserve any CC-setting
2167 actions in these insns and the CC must be marked as being
2168 clobbered by the function. */
2169 if (CALL_P (XVECEXP (body, 0, 0)))
2176 /* We have a real machine instruction as rtl. */
2178 body = PATTERN (insn);
2181 set = single_set (insn);
2183 /* Check for redundant test and compare instructions
2184 (when the condition codes are already set up as desired).
2185 This is done only when optimizing; if not optimizing,
2186 it should be possible for the user to alter a variable
2187 with the debugger in between statements
2188 and the next statement should reexamine the variable
2189 to compute the condition codes. */
2194 && GET_CODE (SET_DEST (set)) == CC0
2195 && insn != last_ignored_compare)
2197 if (GET_CODE (SET_SRC (set)) == SUBREG)
2198 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2199 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2201 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2202 XEXP (SET_SRC (set), 0)
2203 = alter_subreg (&XEXP (SET_SRC (set), 0));
2204 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2205 XEXP (SET_SRC (set), 1)
2206 = alter_subreg (&XEXP (SET_SRC (set), 1));
2208 if ((cc_status.value1 != 0
2209 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2210 || (cc_status.value2 != 0
2211 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
2213 /* Don't delete insn if it has an addressing side-effect. */
2214 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2215 /* or if anything in it is volatile. */
2216 && ! volatile_refs_p (PATTERN (insn)))
2218 /* We don't really delete the insn; just ignore it. */
2219 last_ignored_compare = insn;
2228 /* If this is a conditional branch, maybe modify it
2229 if the cc's are in a nonstandard state
2230 so that it accomplishes the same thing that it would
2231 do straightforwardly if the cc's were set up normally. */
2233 if (cc_status.flags != 0
2235 && GET_CODE (body) == SET
2236 && SET_DEST (body) == pc_rtx
2237 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2238 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2239 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2241 /* This function may alter the contents of its argument
2242 and clear some of the cc_status.flags bits.
2243 It may also return 1 meaning condition now always true
2244 or -1 meaning condition now always false
2245 or 2 meaning condition nontrivial but altered. */
2246 int result = alter_cond (XEXP (SET_SRC (body), 0));
2247 /* If condition now has fixed value, replace the IF_THEN_ELSE
2248 with its then-operand or its else-operand. */
2250 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2252 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2254 /* The jump is now either unconditional or a no-op.
2255 If it has become a no-op, don't try to output it.
2256 (It would not be recognized.) */
2257 if (SET_SRC (body) == pc_rtx)
2262 else if (GET_CODE (SET_SRC (body)) == RETURN)
2263 /* Replace (set (pc) (return)) with (return). */
2264 PATTERN (insn) = body = SET_SRC (body);
2266 /* Rerecognize the instruction if it has changed. */
2268 INSN_CODE (insn) = -1;
2271 /* Make same adjustments to instructions that examine the
2272 condition codes without jumping and instructions that
2273 handle conditional moves (if this machine has either one). */
2275 if (cc_status.flags != 0
2278 rtx cond_rtx, then_rtx, else_rtx;
2281 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2283 cond_rtx = XEXP (SET_SRC (set), 0);
2284 then_rtx = XEXP (SET_SRC (set), 1);
2285 else_rtx = XEXP (SET_SRC (set), 2);
2289 cond_rtx = SET_SRC (set);
2290 then_rtx = const_true_rtx;
2291 else_rtx = const0_rtx;
2294 switch (GET_CODE (cond_rtx))
2308 if (XEXP (cond_rtx, 0) != cc0_rtx)
2310 result = alter_cond (cond_rtx);
2312 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2313 else if (result == -1)
2314 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2315 else if (result == 2)
2316 INSN_CODE (insn) = -1;
2317 if (SET_DEST (set) == SET_SRC (set))
2329 #ifdef HAVE_peephole
2330 /* Do machine-specific peephole optimizations if desired. */
2332 if (optimize && !flag_no_peephole && !nopeepholes)
2334 rtx next = peephole (insn);
2335 /* When peepholing, if there were notes within the peephole,
2336 emit them before the peephole. */
2337 if (next != 0 && next != NEXT_INSN (insn))
2339 rtx note, prev = PREV_INSN (insn);
2341 for (note = NEXT_INSN (insn); note != next;
2342 note = NEXT_INSN (note))
2343 final_scan_insn (note, file, optimize, nopeepholes, seen);
2345 /* Put the notes in the proper position for a later
2346 rescan. For example, the SH target can do this
2347 when generating a far jump in a delayed branch
2349 note = NEXT_INSN (insn);
2350 PREV_INSN (note) = prev;
2351 NEXT_INSN (prev) = note;
2352 NEXT_INSN (PREV_INSN (next)) = insn;
2353 PREV_INSN (insn) = PREV_INSN (next);
2354 NEXT_INSN (insn) = next;
2355 PREV_INSN (next) = insn;
2358 /* PEEPHOLE might have changed this. */
2359 body = PATTERN (insn);
2363 /* Try to recognize the instruction.
2364 If successful, verify that the operands satisfy the
2365 constraints for the instruction. Crash if they don't,
2366 since `reload' should have changed them so that they do. */
2368 insn_code_number = recog_memoized (insn);
2369 cleanup_subreg_operands (insn);
2371 /* Dump the insn in the assembly for debugging. */
2372 if (flag_dump_rtl_in_asm)
2374 print_rtx_head = ASM_COMMENT_START;
2375 print_rtl_single (asm_out_file, insn);
2376 print_rtx_head = "";
2379 if (! constrain_operands_cached (1))
2380 fatal_insn_not_found (insn);
2382 /* Some target machines need to prescan each insn before
2385 #ifdef FINAL_PRESCAN_INSN
2386 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2389 #ifdef HAVE_conditional_execution
2390 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2391 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2395 cc_prev_status = cc_status;
2397 /* Update `cc_status' for this instruction.
2398 The instruction's output routine may change it further.
2399 If the output routine for a jump insn needs to depend
2400 on the cc status, it should look at cc_prev_status. */
2402 NOTICE_UPDATE_CC (body, insn);
2405 current_output_insn = debug_insn = insn;
2407 #if defined (DWARF2_UNWIND_INFO)
2408 if (CALL_P (insn) && dwarf2out_do_frame ())
2409 dwarf2out_frame_debug (insn, false);
2412 /* Find the proper template for this insn. */
2413 template = get_insn_template (insn_code_number, insn);
2415 /* If the C code returns 0, it means that it is a jump insn
2416 which follows a deleted test insn, and that test insn
2417 needs to be reinserted. */
2422 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2424 /* We have already processed the notes between the setter and
2425 the user. Make sure we don't process them again, this is
2426 particularly important if one of the notes is a block
2427 scope note or an EH note. */
2429 prev != last_ignored_compare;
2430 prev = PREV_INSN (prev))
2433 delete_insn (prev); /* Use delete_note. */
2439 /* If the template is the string "#", it means that this insn must
2441 if (template[0] == '#' && template[1] == '\0')
2443 rtx new = try_split (body, insn, 0);
2445 /* If we didn't split the insn, go away. */
2446 if (new == insn && PATTERN (new) == body)
2447 fatal_insn ("could not split insn", insn);
2449 #ifdef HAVE_ATTR_length
2450 /* This instruction should have been split in shorten_branches,
2451 to ensure that we would have valid length info for the
2459 #ifdef TARGET_UNWIND_INFO
2460 /* ??? This will put the directives in the wrong place if
2461 get_insn_template outputs assembly directly. However calling it
2462 before get_insn_template breaks if the insns is split. */
2463 targetm.asm_out.unwind_emit (asm_out_file, insn);
2466 /* Output assembler code from the template. */
2467 output_asm_insn (template, recog_data.operand);
2469 /* If necessary, report the effect that the instruction has on
2470 the unwind info. We've already done this for delay slots
2471 and call instructions. */
2472 #if defined (DWARF2_UNWIND_INFO)
2473 if (final_sequence == 0
2474 #if !defined (HAVE_prologue)
2475 && !ACCUMULATE_OUTGOING_ARGS
2477 && dwarf2out_do_frame ())
2478 dwarf2out_frame_debug (insn, true);
2481 current_output_insn = debug_insn = 0;
2484 return NEXT_INSN (insn);
2487 /* Return whether a source line note needs to be emitted before INSN. */
2490 notice_source_line (rtx insn)
2492 const char *filename = insn_file (insn);
2493 int linenum = insn_line (insn);
2496 && (force_source_line
2497 || filename != last_filename
2498 || last_linenum != linenum))
2500 force_source_line = false;
2501 last_filename = filename;
2502 last_linenum = linenum;
2503 high_block_linenum = MAX (last_linenum, high_block_linenum);
2504 high_function_linenum = MAX (last_linenum, high_function_linenum);
2510 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2511 directly to the desired hard register. */
2514 cleanup_subreg_operands (rtx insn)
2517 extract_insn_cached (insn);
2518 for (i = 0; i < recog_data.n_operands; i++)
2520 /* The following test cannot use recog_data.operand when testing
2521 for a SUBREG: the underlying object might have been changed
2522 already if we are inside a match_operator expression that
2523 matches the else clause. Instead we test the underlying
2524 expression directly. */
2525 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2526 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2527 else if (GET_CODE (recog_data.operand[i]) == PLUS
2528 || GET_CODE (recog_data.operand[i]) == MULT
2529 || MEM_P (recog_data.operand[i]))
2530 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i]);
2533 for (i = 0; i < recog_data.n_dups; i++)
2535 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2536 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2537 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2538 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2539 || MEM_P (*recog_data.dup_loc[i]))
2540 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i]);
2544 /* If X is a SUBREG, replace it with a REG or a MEM,
2545 based on the thing it is a subreg of. */
2548 alter_subreg (rtx *xp)
2551 rtx y = SUBREG_REG (x);
2553 /* simplify_subreg does not remove subreg from volatile references.
2554 We are required to. */
2557 int offset = SUBREG_BYTE (x);
2559 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2560 contains 0 instead of the proper offset. See simplify_subreg. */
2562 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
2564 int difference = GET_MODE_SIZE (GET_MODE (y))
2565 - GET_MODE_SIZE (GET_MODE (x));
2566 if (WORDS_BIG_ENDIAN)
2567 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2568 if (BYTES_BIG_ENDIAN)
2569 offset += difference % UNITS_PER_WORD;
2572 *xp = adjust_address (y, GET_MODE (x), offset);
2576 rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2583 /* Simplify_subreg can't handle some REG cases, but we have to. */
2584 unsigned int regno = subreg_regno (x);
2585 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, SUBREG_BYTE (x));
2592 /* Do alter_subreg on all the SUBREGs contained in X. */
2595 walk_alter_subreg (rtx *xp)
2598 switch (GET_CODE (x))
2603 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2604 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1));
2609 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2613 return alter_subreg (xp);
2624 /* Given BODY, the body of a jump instruction, alter the jump condition
2625 as required by the bits that are set in cc_status.flags.
2626 Not all of the bits there can be handled at this level in all cases.
2628 The value is normally 0.
2629 1 means that the condition has become always true.
2630 -1 means that the condition has become always false.
2631 2 means that COND has been altered. */
2634 alter_cond (rtx cond)
2638 if (cc_status.flags & CC_REVERSED)
2641 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2644 if (cc_status.flags & CC_INVERTED)
2647 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
2650 if (cc_status.flags & CC_NOT_POSITIVE)
2651 switch (GET_CODE (cond))
2656 /* Jump becomes unconditional. */
2662 /* Jump becomes no-op. */
2666 PUT_CODE (cond, EQ);
2671 PUT_CODE (cond, NE);
2679 if (cc_status.flags & CC_NOT_NEGATIVE)
2680 switch (GET_CODE (cond))
2684 /* Jump becomes unconditional. */
2689 /* Jump becomes no-op. */
2694 PUT_CODE (cond, EQ);
2700 PUT_CODE (cond, NE);
2708 if (cc_status.flags & CC_NO_OVERFLOW)
2709 switch (GET_CODE (cond))
2712 /* Jump becomes unconditional. */
2716 PUT_CODE (cond, EQ);
2721 PUT_CODE (cond, NE);
2726 /* Jump becomes no-op. */
2733 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
2734 switch (GET_CODE (cond))
2740 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
2745 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
2750 if (cc_status.flags & CC_NOT_SIGNED)
2751 /* The flags are valid if signed condition operators are converted
2753 switch (GET_CODE (cond))
2756 PUT_CODE (cond, LEU);
2761 PUT_CODE (cond, LTU);
2766 PUT_CODE (cond, GTU);
2771 PUT_CODE (cond, GEU);
2783 /* Report inconsistency between the assembler template and the operands.
2784 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2787 output_operand_lossage (const char *cmsgid, ...)
2791 const char *pfx_str;
2794 va_start (ap, cmsgid);
2796 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
2797 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
2798 vasprintf (&new_message, fmt_string, ap);
2800 if (this_is_asm_operands)
2801 error_for_asm (this_is_asm_operands, "%s", new_message);
2803 internal_error ("%s", new_message);
2810 /* Output of assembler code from a template, and its subroutines. */
2812 /* Annotate the assembly with a comment describing the pattern and
2813 alternative used. */
2816 output_asm_name (void)
2820 int num = INSN_CODE (debug_insn);
2821 fprintf (asm_out_file, "\t%s %d\t%s",
2822 ASM_COMMENT_START, INSN_UID (debug_insn),
2823 insn_data[num].name);
2824 if (insn_data[num].n_alternatives > 1)
2825 fprintf (asm_out_file, "/%d", which_alternative + 1);
2826 #ifdef HAVE_ATTR_length
2827 fprintf (asm_out_file, "\t[length = %d]",
2828 get_attr_length (debug_insn));
2830 /* Clear this so only the first assembler insn
2831 of any rtl insn will get the special comment for -dp. */
2836 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2837 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2838 corresponds to the address of the object and 0 if to the object. */
2841 get_mem_expr_from_op (rtx op, int *paddressp)
2849 return REG_EXPR (op);
2850 else if (!MEM_P (op))
2853 if (MEM_EXPR (op) != 0)
2854 return MEM_EXPR (op);
2856 /* Otherwise we have an address, so indicate it and look at the address. */
2860 /* First check if we have a decl for the address, then look at the right side
2861 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
2862 But don't allow the address to itself be indirect. */
2863 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
2865 else if (GET_CODE (op) == PLUS
2866 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
2869 while (GET_RTX_CLASS (GET_CODE (op)) == RTX_UNARY
2870 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
2873 expr = get_mem_expr_from_op (op, &inner_addressp);
2874 return inner_addressp ? 0 : expr;
2877 /* Output operand names for assembler instructions. OPERANDS is the
2878 operand vector, OPORDER is the order to write the operands, and NOPS
2879 is the number of operands to write. */
2882 output_asm_operand_names (rtx *operands, int *oporder, int nops)
2887 for (i = 0; i < nops; i++)
2890 rtx op = operands[oporder[i]];
2891 tree expr = get_mem_expr_from_op (op, &addressp);
2893 fprintf (asm_out_file, "%c%s",
2894 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
2898 fprintf (asm_out_file, "%s",
2899 addressp ? "*" : "");
2900 print_mem_expr (asm_out_file, expr);
2903 else if (REG_P (op) && ORIGINAL_REGNO (op)
2904 && ORIGINAL_REGNO (op) != REGNO (op))
2905 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
2909 /* Output text from TEMPLATE to the assembler output file,
2910 obeying %-directions to substitute operands taken from
2911 the vector OPERANDS.
2913 %N (for N a digit) means print operand N in usual manner.
2914 %lN means require operand N to be a CODE_LABEL or LABEL_REF
2915 and print the label name with no punctuation.
2916 %cN means require operand N to be a constant
2917 and print the constant expression with no punctuation.
2918 %aN means expect operand N to be a memory address
2919 (not a memory reference!) and print a reference
2921 %nN means expect operand N to be a constant
2922 and print a constant expression for minus the value
2923 of the operand, with no other punctuation. */
2926 output_asm_insn (const char *template, rtx *operands)
2930 #ifdef ASSEMBLER_DIALECT
2933 int oporder[MAX_RECOG_OPERANDS];
2934 char opoutput[MAX_RECOG_OPERANDS];
2937 /* An insn may return a null string template
2938 in a case where no assembler code is needed. */
2942 memset (opoutput, 0, sizeof opoutput);
2944 putc ('\t', asm_out_file);
2946 #ifdef ASM_OUTPUT_OPCODE
2947 ASM_OUTPUT_OPCODE (asm_out_file, p);
2954 if (flag_verbose_asm)
2955 output_asm_operand_names (operands, oporder, ops);
2956 if (flag_print_asm_name)
2960 memset (opoutput, 0, sizeof opoutput);
2962 putc (c, asm_out_file);
2963 #ifdef ASM_OUTPUT_OPCODE
2964 while ((c = *p) == '\t')
2966 putc (c, asm_out_file);
2969 ASM_OUTPUT_OPCODE (asm_out_file, p);
2973 #ifdef ASSEMBLER_DIALECT
2979 output_operand_lossage ("nested assembly dialect alternatives");
2983 /* If we want the first dialect, do nothing. Otherwise, skip
2984 DIALECT_NUMBER of strings ending with '|'. */
2985 for (i = 0; i < dialect_number; i++)
2987 while (*p && *p != '}' && *p++ != '|')
2996 output_operand_lossage ("unterminated assembly dialect alternative");
3003 /* Skip to close brace. */
3008 output_operand_lossage ("unterminated assembly dialect alternative");
3012 while (*p++ != '}');
3016 putc (c, asm_out_file);
3021 putc (c, asm_out_file);
3027 /* %% outputs a single %. */
3031 putc (c, asm_out_file);
3033 /* %= outputs a number which is unique to each insn in the entire
3034 compilation. This is useful for making local labels that are
3035 referred to more than once in a given insn. */
3039 fprintf (asm_out_file, "%d", insn_counter);
3041 /* % followed by a letter and some digits
3042 outputs an operand in a special way depending on the letter.
3043 Letters `acln' are implemented directly.
3044 Other letters are passed to `output_operand' so that
3045 the PRINT_OPERAND macro can define them. */
3046 else if (ISALPHA (*p))
3049 unsigned long opnum;
3052 opnum = strtoul (p, &endptr, 10);
3055 output_operand_lossage ("operand number missing "
3057 else if (this_is_asm_operands && opnum >= insn_noperands)
3058 output_operand_lossage ("operand number out of range");
3059 else if (letter == 'l')
3060 output_asm_label (operands[opnum]);
3061 else if (letter == 'a')
3062 output_address (operands[opnum]);
3063 else if (letter == 'c')
3065 if (CONSTANT_ADDRESS_P (operands[opnum]))
3066 output_addr_const (asm_out_file, operands[opnum]);
3068 output_operand (operands[opnum], 'c');
3070 else if (letter == 'n')
3072 if (GET_CODE (operands[opnum]) == CONST_INT)
3073 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3074 - INTVAL (operands[opnum]));
3077 putc ('-', asm_out_file);
3078 output_addr_const (asm_out_file, operands[opnum]);
3082 output_operand (operands[opnum], letter);
3084 if (!opoutput[opnum])
3085 oporder[ops++] = opnum;
3086 opoutput[opnum] = 1;
3091 /* % followed by a digit outputs an operand the default way. */
3092 else if (ISDIGIT (*p))
3094 unsigned long opnum;
3097 opnum = strtoul (p, &endptr, 10);
3098 if (this_is_asm_operands && opnum >= insn_noperands)
3099 output_operand_lossage ("operand number out of range");
3101 output_operand (operands[opnum], 0);
3103 if (!opoutput[opnum])
3104 oporder[ops++] = opnum;
3105 opoutput[opnum] = 1;
3110 /* % followed by punctuation: output something for that
3111 punctuation character alone, with no operand.
3112 The PRINT_OPERAND macro decides what is actually done. */
3113 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3114 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p))
3115 output_operand (NULL_RTX, *p++);
3118 output_operand_lossage ("invalid %%-code");
3122 putc (c, asm_out_file);
3125 /* Write out the variable names for operands, if we know them. */
3126 if (flag_verbose_asm)
3127 output_asm_operand_names (operands, oporder, ops);
3128 if (flag_print_asm_name)
3131 putc ('\n', asm_out_file);
3134 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3137 output_asm_label (rtx x)
3141 if (GET_CODE (x) == LABEL_REF)
3145 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL))
3146 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3148 output_operand_lossage ("'%%l' operand isn't a label");
3150 assemble_name (asm_out_file, buf);
3153 /* Print operand X using machine-dependent assembler syntax.
3154 The macro PRINT_OPERAND is defined just to control this function.
3155 CODE is a non-digit that preceded the operand-number in the % spec,
3156 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3157 between the % and the digits.
3158 When CODE is a non-letter, X is 0.
3160 The meanings of the letters are machine-dependent and controlled
3161 by PRINT_OPERAND. */
3164 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3166 if (x && GET_CODE (x) == SUBREG)
3167 x = alter_subreg (&x);
3169 /* X must not be a pseudo reg. */
3170 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3172 PRINT_OPERAND (asm_out_file, x, code);
3175 /* Print a memory reference operand for address X
3176 using machine-dependent assembler syntax.
3177 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3180 output_address (rtx x)
3182 walk_alter_subreg (&x);
3183 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3186 /* Print an integer constant expression in assembler syntax.
3187 Addition and subtraction are the only arithmetic
3188 that may appear in these expressions. */
3191 output_addr_const (FILE *file, rtx x)
3196 switch (GET_CODE (x))
3203 if (SYMBOL_REF_DECL (x))
3204 mark_decl_referenced (SYMBOL_REF_DECL (x));
3205 #ifdef ASM_OUTPUT_SYMBOL_REF
3206 ASM_OUTPUT_SYMBOL_REF (file, x);
3208 assemble_name (file, XSTR (x, 0));
3216 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3217 #ifdef ASM_OUTPUT_LABEL_REF
3218 ASM_OUTPUT_LABEL_REF (file, buf);
3220 assemble_name (file, buf);
3225 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3229 /* This used to output parentheses around the expression,
3230 but that does not work on the 386 (either ATT or BSD assembler). */
3231 output_addr_const (file, XEXP (x, 0));
3235 if (GET_MODE (x) == VOIDmode)
3237 /* We can use %d if the number is one word and positive. */
3238 if (CONST_DOUBLE_HIGH (x))
3239 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3240 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3241 else if (CONST_DOUBLE_LOW (x) < 0)
3242 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3244 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3247 /* We can't handle floating point constants;
3248 PRINT_OPERAND must handle them. */
3249 output_operand_lossage ("floating constant misused");
3253 /* Some assemblers need integer constants to appear last (eg masm). */
3254 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3256 output_addr_const (file, XEXP (x, 1));
3257 if (INTVAL (XEXP (x, 0)) >= 0)
3258 fprintf (file, "+");
3259 output_addr_const (file, XEXP (x, 0));
3263 output_addr_const (file, XEXP (x, 0));
3264 if (GET_CODE (XEXP (x, 1)) != CONST_INT
3265 || INTVAL (XEXP (x, 1)) >= 0)
3266 fprintf (file, "+");
3267 output_addr_const (file, XEXP (x, 1));
3272 /* Avoid outputting things like x-x or x+5-x,
3273 since some assemblers can't handle that. */
3274 x = simplify_subtraction (x);
3275 if (GET_CODE (x) != MINUS)
3278 output_addr_const (file, XEXP (x, 0));
3279 fprintf (file, "-");
3280 if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0)
3281 || GET_CODE (XEXP (x, 1)) == PC
3282 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3283 output_addr_const (file, XEXP (x, 1));
3286 fputs (targetm.asm_out.open_paren, file);
3287 output_addr_const (file, XEXP (x, 1));
3288 fputs (targetm.asm_out.close_paren, file);
3295 output_addr_const (file, XEXP (x, 0));
3299 #ifdef OUTPUT_ADDR_CONST_EXTRA
3300 OUTPUT_ADDR_CONST_EXTRA (file, x, fail);
3305 output_operand_lossage ("invalid expression as operand");
3309 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3310 %R prints the value of REGISTER_PREFIX.
3311 %L prints the value of LOCAL_LABEL_PREFIX.
3312 %U prints the value of USER_LABEL_PREFIX.
3313 %I prints the value of IMMEDIATE_PREFIX.
3314 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3315 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3317 We handle alternate assembler dialects here, just like output_asm_insn. */
3320 asm_fprintf (FILE *file, const char *p, ...)
3326 va_start (argptr, p);
3333 #ifdef ASSEMBLER_DIALECT
3338 /* If we want the first dialect, do nothing. Otherwise, skip
3339 DIALECT_NUMBER of strings ending with '|'. */
3340 for (i = 0; i < dialect_number; i++)
3342 while (*p && *p++ != '|')
3352 /* Skip to close brace. */
3353 while (*p && *p++ != '}')
3364 while (strchr ("-+ #0", c))
3369 while (ISDIGIT (c) || c == '.')
3380 case 'd': case 'i': case 'u':
3381 case 'x': case 'X': case 'o':
3385 fprintf (file, buf, va_arg (argptr, int));
3389 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3390 'o' cases, but we do not check for those cases. It
3391 means that the value is a HOST_WIDE_INT, which may be
3392 either `long' or `long long'. */
3393 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
3394 q += strlen (HOST_WIDE_INT_PRINT);
3397 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3402 #ifdef HAVE_LONG_LONG
3408 fprintf (file, buf, va_arg (argptr, long long));
3415 fprintf (file, buf, va_arg (argptr, long));
3423 fprintf (file, buf, va_arg (argptr, char *));
3427 #ifdef ASM_OUTPUT_OPCODE
3428 ASM_OUTPUT_OPCODE (asm_out_file, p);
3433 #ifdef REGISTER_PREFIX
3434 fprintf (file, "%s", REGISTER_PREFIX);
3439 #ifdef IMMEDIATE_PREFIX
3440 fprintf (file, "%s", IMMEDIATE_PREFIX);
3445 #ifdef LOCAL_LABEL_PREFIX
3446 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3451 fputs (user_label_prefix, file);
3454 #ifdef ASM_FPRINTF_EXTENSIONS
3455 /* Uppercase letters are reserved for general use by asm_fprintf
3456 and so are not available to target specific code. In order to
3457 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3458 they are defined here. As they get turned into real extensions
3459 to asm_fprintf they should be removed from this list. */
3460 case 'A': case 'B': case 'C': case 'D': case 'E':
3461 case 'F': case 'G': case 'H': case 'J': case 'K':
3462 case 'M': case 'N': case 'P': case 'Q': case 'S':
3463 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3466 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3479 /* Split up a CONST_DOUBLE or integer constant rtx
3480 into two rtx's for single words,
3481 storing in *FIRST the word that comes first in memory in the target
3482 and in *SECOND the other. */
3485 split_double (rtx value, rtx *first, rtx *second)
3487 if (GET_CODE (value) == CONST_INT)
3489 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3491 /* In this case the CONST_INT holds both target words.
3492 Extract the bits from it into two word-sized pieces.
3493 Sign extend each half to HOST_WIDE_INT. */
3494 unsigned HOST_WIDE_INT low, high;
3495 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3497 /* Set sign_bit to the most significant bit of a word. */
3499 sign_bit <<= BITS_PER_WORD - 1;
3501 /* Set mask so that all bits of the word are set. We could
3502 have used 1 << BITS_PER_WORD instead of basing the
3503 calculation on sign_bit. However, on machines where
3504 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3505 compiler warning, even though the code would never be
3507 mask = sign_bit << 1;
3510 /* Set sign_extend as any remaining bits. */
3511 sign_extend = ~mask;
3513 /* Pick the lower word and sign-extend it. */
3514 low = INTVAL (value);
3519 /* Pick the higher word, shifted to the least significant
3520 bits, and sign-extend it. */
3521 high = INTVAL (value);
3522 high >>= BITS_PER_WORD - 1;
3525 if (high & sign_bit)
3526 high |= sign_extend;
3528 /* Store the words in the target machine order. */
3529 if (WORDS_BIG_ENDIAN)
3531 *first = GEN_INT (high);
3532 *second = GEN_INT (low);
3536 *first = GEN_INT (low);
3537 *second = GEN_INT (high);
3542 /* The rule for using CONST_INT for a wider mode
3543 is that we regard the value as signed.
3544 So sign-extend it. */
3545 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3546 if (WORDS_BIG_ENDIAN)
3558 else if (GET_CODE (value) != CONST_DOUBLE)
3560 if (WORDS_BIG_ENDIAN)
3562 *first = const0_rtx;
3568 *second = const0_rtx;
3571 else if (GET_MODE (value) == VOIDmode
3572 /* This is the old way we did CONST_DOUBLE integers. */
3573 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3575 /* In an integer, the words are defined as most and least significant.
3576 So order them by the target's convention. */
3577 if (WORDS_BIG_ENDIAN)
3579 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3580 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3584 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3585 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3592 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3594 /* Note, this converts the REAL_VALUE_TYPE to the target's
3595 format, splits up the floating point double and outputs
3596 exactly 32 bits of it into each of l[0] and l[1] --
3597 not necessarily BITS_PER_WORD bits. */
3598 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3600 /* If 32 bits is an entire word for the target, but not for the host,
3601 then sign-extend on the host so that the number will look the same
3602 way on the host that it would on the target. See for instance
3603 simplify_unary_operation. The #if is needed to avoid compiler
3606 #if HOST_BITS_PER_LONG > 32
3607 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
3609 if (l[0] & ((long) 1 << 31))
3610 l[0] |= ((long) (-1) << 32);
3611 if (l[1] & ((long) 1 << 31))
3612 l[1] |= ((long) (-1) << 32);
3616 *first = GEN_INT (l[0]);
3617 *second = GEN_INT (l[1]);
3621 /* Return nonzero if this function has no function calls. */
3624 leaf_function_p (void)
3629 if (current_function_profile || profile_arc_flag)
3632 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3635 && ! SIBLING_CALL_P (insn))
3637 if (NONJUMP_INSN_P (insn)
3638 && GET_CODE (PATTERN (insn)) == SEQUENCE
3639 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3640 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3643 for (link = current_function_epilogue_delay_list;
3645 link = XEXP (link, 1))
3647 insn = XEXP (link, 0);
3650 && ! SIBLING_CALL_P (insn))
3652 if (NONJUMP_INSN_P (insn)
3653 && GET_CODE (PATTERN (insn)) == SEQUENCE
3654 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3655 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3662 /* Return 1 if branch is a forward branch.
3663 Uses insn_shuid array, so it works only in the final pass. May be used by
3664 output templates to customary add branch prediction hints.
3667 final_forward_branch_p (rtx insn)
3669 int insn_id, label_id;
3671 gcc_assert (uid_shuid);
3672 insn_id = INSN_SHUID (insn);
3673 label_id = INSN_SHUID (JUMP_LABEL (insn));
3674 /* We've hit some insns that does not have id information available. */
3675 gcc_assert (insn_id && label_id);
3676 return insn_id < label_id;
3679 /* On some machines, a function with no call insns
3680 can run faster if it doesn't create its own register window.
3681 When output, the leaf function should use only the "output"
3682 registers. Ordinarily, the function would be compiled to use
3683 the "input" registers to find its arguments; it is a candidate
3684 for leaf treatment if it uses only the "input" registers.
3685 Leaf function treatment means renumbering so the function
3686 uses the "output" registers instead. */
3688 #ifdef LEAF_REGISTERS
3690 /* Return 1 if this function uses only the registers that can be
3691 safely renumbered. */
3694 only_leaf_regs_used (void)
3697 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
3699 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
3700 if ((regs_ever_live[i] || global_regs[i])
3701 && ! permitted_reg_in_leaf_functions[i])
3704 if (current_function_uses_pic_offset_table
3705 && pic_offset_table_rtx != 0
3706 && REG_P (pic_offset_table_rtx)
3707 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
3713 /* Scan all instructions and renumber all registers into those
3714 available in leaf functions. */
3717 leaf_renumber_regs (rtx first)
3721 /* Renumber only the actual patterns.
3722 The reg-notes can contain frame pointer refs,
3723 and renumbering them could crash, and should not be needed. */
3724 for (insn = first; insn; insn = NEXT_INSN (insn))
3726 leaf_renumber_regs_insn (PATTERN (insn));
3727 for (insn = current_function_epilogue_delay_list;
3729 insn = XEXP (insn, 1))
3730 if (INSN_P (XEXP (insn, 0)))
3731 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
3734 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3735 available in leaf functions. */
3738 leaf_renumber_regs_insn (rtx in_rtx)
3741 const char *format_ptr;
3746 /* Renumber all input-registers into output-registers.
3747 renumbered_regs would be 1 for an output-register;
3754 /* Don't renumber the same reg twice. */
3758 newreg = REGNO (in_rtx);
3759 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3760 to reach here as part of a REG_NOTE. */
3761 if (newreg >= FIRST_PSEUDO_REGISTER)
3766 newreg = LEAF_REG_REMAP (newreg);
3767 gcc_assert (newreg >= 0);
3768 regs_ever_live[REGNO (in_rtx)] = 0;
3769 regs_ever_live[newreg] = 1;
3770 REGNO (in_rtx) = newreg;
3774 if (INSN_P (in_rtx))
3776 /* Inside a SEQUENCE, we find insns.
3777 Renumber just the patterns of these insns,
3778 just as we do for the top-level insns. */
3779 leaf_renumber_regs_insn (PATTERN (in_rtx));
3783 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
3785 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
3786 switch (*format_ptr++)
3789 leaf_renumber_regs_insn (XEXP (in_rtx, i));
3793 if (NULL != XVEC (in_rtx, i))
3795 for (j = 0; j < XVECLEN (in_rtx, i); j++)
3796 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
3816 /* When -gused is used, emit debug info for only used symbols. But in
3817 addition to the standard intercepted debug_hooks there are some direct
3818 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3819 Those routines may also be called from a higher level intercepted routine. So
3820 to prevent recording data for an inner call to one of these for an intercept,
3821 we maintain an intercept nesting counter (debug_nesting). We only save the
3822 intercepted arguments if the nesting is 1. */
3823 int debug_nesting = 0;
3825 static tree *symbol_queue;
3826 int symbol_queue_index = 0;
3827 static int symbol_queue_size = 0;
3829 /* Generate the symbols for any queued up type symbols we encountered
3830 while generating the type info for some originally used symbol.
3831 This might generate additional entries in the queue. Only when
3832 the nesting depth goes to 0 is this routine called. */
3835 debug_flush_symbol_queue (void)
3839 /* Make sure that additionally queued items are not flushed
3844 for (i = 0; i < symbol_queue_index; ++i)
3846 /* If we pushed queued symbols then such symbols must be
3847 output no matter what anyone else says. Specifically,
3848 we need to make sure dbxout_symbol() thinks the symbol was
3849 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3850 which may be set for outside reasons. */
3851 int saved_tree_used = TREE_USED (symbol_queue[i]);
3852 int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]);
3853 TREE_USED (symbol_queue[i]) = 1;
3854 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0;
3856 #ifdef DBX_DEBUGGING_INFO
3857 dbxout_symbol (symbol_queue[i], 0);
3860 TREE_USED (symbol_queue[i]) = saved_tree_used;
3861 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug;
3864 symbol_queue_index = 0;
3868 /* Queue a type symbol needed as part of the definition of a decl
3869 symbol. These symbols are generated when debug_flush_symbol_queue()
3873 debug_queue_symbol (tree decl)
3875 if (symbol_queue_index >= symbol_queue_size)
3877 symbol_queue_size += 10;
3878 symbol_queue = xrealloc (symbol_queue,
3879 symbol_queue_size * sizeof (tree));
3882 symbol_queue[symbol_queue_index++] = decl;
3885 /* Free symbol queue. */
3887 debug_free_queue (void)
3891 free (symbol_queue);
3892 symbol_queue = NULL;
3893 symbol_queue_size = 0;
3897 /* Turn the RTL into assembly. */
3899 rest_of_handle_final (void)
3904 /* Get the function's name, as described by its RTL. This may be
3905 different from the DECL_NAME name used in the source file. */
3907 x = DECL_RTL (current_function_decl);
3908 gcc_assert (MEM_P (x));
3910 gcc_assert (GET_CODE (x) == SYMBOL_REF);
3911 fnname = XSTR (x, 0);
3913 assemble_start_function (current_function_decl, fnname);
3914 final_start_function (get_insns (), asm_out_file, optimize);
3915 final (get_insns (), asm_out_file, optimize);
3916 final_end_function ();
3918 #ifdef TARGET_UNWIND_INFO
3919 /* ??? The IA-64 ".handlerdata" directive must be issued before
3920 the ".endp" directive that closes the procedure descriptor. */
3921 output_function_exception_table (fnname);
3924 assemble_end_function (current_function_decl, fnname);
3926 #ifndef TARGET_UNWIND_INFO
3927 /* Otherwise, it feels unclean to switch sections in the middle. */
3928 output_function_exception_table (fnname);
3931 user_defined_section_attribute = false;
3934 fflush (asm_out_file);
3936 /* Release all memory allocated by flow. */
3937 free_basic_block_vars ();
3939 /* Write DBX symbols if requested. */
3941 /* Note that for those inline functions where we don't initially
3942 know for certain that we will be generating an out-of-line copy,
3943 the first invocation of this routine (rest_of_compilation) will
3944 skip over this code by doing a `goto exit_rest_of_compilation;'.
3945 Later on, wrapup_global_declarations will (indirectly) call
3946 rest_of_compilation again for those inline functions that need
3947 to have out-of-line copies generated. During that call, we
3948 *will* be routed past here. */
3950 timevar_push (TV_SYMOUT);
3951 (*debug_hooks->function_decl) (current_function_decl);
3952 timevar_pop (TV_SYMOUT);
3956 struct tree_opt_pass pass_final =
3960 rest_of_handle_final, /* execute */
3963 0, /* static_pass_number */
3964 TV_FINAL, /* tv_id */
3965 0, /* properties_required */
3966 0, /* properties_provided */
3967 0, /* properties_destroyed */
3968 0, /* todo_flags_start */
3969 TODO_ggc_collect, /* todo_flags_finish */
3975 rest_of_handle_shorten_branches (void)
3977 /* Shorten branches. */
3978 shorten_branches (get_insns ());
3982 struct tree_opt_pass pass_shorten_branches =
3984 "shorten", /* name */
3986 rest_of_handle_shorten_branches, /* execute */
3989 0, /* static_pass_number */
3990 TV_FINAL, /* tv_id */
3991 0, /* properties_required */
3992 0, /* properties_provided */
3993 0, /* properties_destroyed */
3994 0, /* todo_flags_start */
3995 TODO_dump_func, /* todo_flags_finish */
4001 rest_of_clean_state (void)
4005 /* It is very important to decompose the RTL instruction chain here:
4006 debug information keeps pointing into CODE_LABEL insns inside the function
4007 body. If these remain pointing to the other insns, we end up preserving
4008 whole RTL chain and attached detailed debug info in memory. */
4009 for (insn = get_insns (); insn; insn = next)
4011 next = NEXT_INSN (insn);
4012 NEXT_INSN (insn) = NULL;
4013 PREV_INSN (insn) = NULL;
4016 /* In case the function was not output,
4017 don't leave any temporary anonymous types
4018 queued up for sdb output. */
4019 #ifdef SDB_DEBUGGING_INFO
4020 if (write_symbols == SDB_DEBUG)
4021 sdbout_types (NULL_TREE);
4024 reload_completed = 0;
4025 epilogue_completed = 0;
4026 flow2_completed = 0;
4029 regstack_completed = 0;
4032 /* Clear out the insn_length contents now that they are no
4034 init_insn_lengths ();
4036 /* Show no temporary slots allocated. */
4039 free_basic_block_vars ();
4040 free_bb_for_insn ();
4043 if (targetm.binds_local_p (current_function_decl))
4045 int pref = cfun->preferred_stack_boundary;
4046 if (cfun->stack_alignment_needed > cfun->preferred_stack_boundary)
4047 pref = cfun->stack_alignment_needed;
4048 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4052 /* Make sure volatile mem refs aren't considered valid operands for
4053 arithmetic insns. We must call this here if this is a nested inline
4054 function, since the above code leaves us in the init_recog state,
4055 and the function context push/pop code does not save/restore volatile_ok.
4057 ??? Maybe it isn't necessary for expand_start_function to call this
4058 anymore if we do it here? */
4060 init_recog_no_volatile ();
4062 /* We're done with this function. Free up memory if we can. */
4063 free_after_parsing (cfun);
4064 free_after_compilation (cfun);
4068 struct tree_opt_pass pass_clean_state =
4072 rest_of_clean_state, /* execute */
4075 0, /* static_pass_number */
4076 TV_FINAL, /* tv_id */
4077 0, /* properties_required */
4078 0, /* properties_provided */
4079 PROP_rtl, /* properties_destroyed */
4080 0, /* todo_flags_start */
4081 0, /* todo_flags_finish */