1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
49 #include "coretypes.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
59 #include "conditions.h"
62 #include "hard-reg-set.h"
69 #include "basic-block.h"
73 #include "cfglayout.h"
74 #include "tree-pass.h"
84 #ifdef XCOFF_DEBUGGING_INFO
85 #include "xcoffout.h" /* Needed for external data
86 declarations for e.g. AIX 4.x. */
89 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
90 #include "dwarf2out.h"
93 #ifdef DBX_DEBUGGING_INFO
97 #ifdef SDB_DEBUGGING_INFO
101 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
102 null default for it to save conditionalization later. */
103 #ifndef CC_STATUS_INIT
104 #define CC_STATUS_INIT
107 /* How to start an assembler comment. */
108 #ifndef ASM_COMMENT_START
109 #define ASM_COMMENT_START ";#"
112 /* Is the given character a logical line separator for the assembler? */
113 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
114 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
117 #ifndef JUMP_TABLES_IN_TEXT_SECTION
118 #define JUMP_TABLES_IN_TEXT_SECTION 0
121 /* Bitflags used by final_scan_insn. */
124 #define SEEN_EMITTED 4
126 /* Last insn processed by final_scan_insn. */
127 static rtx debug_insn;
128 rtx current_output_insn;
130 /* Line number of last NOTE. */
131 static int last_linenum;
133 /* Highest line number in current block. */
134 static int high_block_linenum;
136 /* Likewise for function. */
137 static int high_function_linenum;
139 /* Filename of last NOTE. */
140 static const char *last_filename;
142 /* Override filename and line number. */
143 static const char *override_filename;
144 static int override_linenum;
146 /* Whether to force emission of a line note before the next insn. */
147 static bool force_source_line = false;
149 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
151 /* Nonzero while outputting an `asm' with operands.
152 This means that inconsistencies are the user's fault, so don't die.
153 The precise value is the insn being output, to pass to error_for_asm. */
154 rtx this_is_asm_operands;
156 /* Number of operands of this insn, for an `asm' with operands. */
157 static unsigned int insn_noperands;
159 /* Compare optimization flag. */
161 static rtx last_ignored_compare = 0;
163 /* Assign a unique number to each insn that is output.
164 This can be used to generate unique local labels. */
166 static int insn_counter = 0;
169 /* This variable contains machine-dependent flags (defined in tm.h)
170 set and examined by output routines
171 that describe how to interpret the condition codes properly. */
175 /* During output of an insn, this contains a copy of cc_status
176 from before the insn. */
178 CC_STATUS cc_prev_status;
181 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
183 static int block_depth;
185 /* Nonzero if have enabled APP processing of our assembler output. */
189 /* If we are outputting an insn sequence, this contains the sequence rtx.
194 #ifdef ASSEMBLER_DIALECT
196 /* Number of the assembler dialect to use, starting at 0. */
197 static int dialect_number;
200 #ifdef HAVE_conditional_execution
201 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
202 rtx current_insn_predicate;
205 #ifdef HAVE_ATTR_length
206 static int asm_insn_count (rtx);
208 static void profile_function (FILE *);
209 static void profile_after_prologue (FILE *);
210 static bool notice_source_line (rtx);
211 static rtx walk_alter_subreg (rtx *, bool *);
212 static void output_asm_name (void);
213 static void output_alternate_entry_point (FILE *, rtx);
214 static tree get_mem_expr_from_op (rtx, int *);
215 static void output_asm_operand_names (rtx *, int *, int);
216 static void output_operand (rtx, int);
217 #ifdef LEAF_REGISTERS
218 static void leaf_renumber_regs (rtx);
221 static int alter_cond (rtx);
223 #ifndef ADDR_VEC_ALIGN
224 static int final_addr_vec_align (rtx);
226 #ifdef HAVE_ATTR_length
227 static int align_fuzz (rtx, rtx, int, unsigned);
230 /* Initialize data in final at the beginning of a compilation. */
233 init_final (const char *filename ATTRIBUTE_UNUSED)
238 #ifdef ASSEMBLER_DIALECT
239 dialect_number = ASSEMBLER_DIALECT;
243 /* Default target function prologue and epilogue assembler output.
245 If not overridden for epilogue code, then the function body itself
246 contains return instructions wherever needed. */
248 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
249 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
253 /* Default target hook that outputs nothing to a stream. */
255 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
259 /* Enable APP processing of subsequent output.
260 Used before the output from an `asm' statement. */
267 fputs (ASM_APP_ON, asm_out_file);
272 /* Disable APP processing of subsequent output.
273 Called from varasm.c before most kinds of output. */
280 fputs (ASM_APP_OFF, asm_out_file);
285 /* Return the number of slots filled in the current
286 delayed branch sequence (we don't count the insn needing the
287 delay slot). Zero if not in a delayed branch sequence. */
291 dbr_sequence_length (void)
293 if (final_sequence != 0)
294 return XVECLEN (final_sequence, 0) - 1;
300 /* The next two pages contain routines used to compute the length of an insn
301 and to shorten branches. */
303 /* Arrays for insn lengths, and addresses. The latter is referenced by
304 `insn_current_length'. */
306 static int *insn_lengths;
308 VEC(int,heap) *insn_addresses_;
310 /* Max uid for which the above arrays are valid. */
311 static int insn_lengths_max_uid;
313 /* Address of insn being processed. Used by `insn_current_length'. */
314 int insn_current_address;
316 /* Address of insn being processed in previous iteration. */
317 int insn_last_address;
319 /* known invariant alignment of insn being processed. */
320 int insn_current_align;
322 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
323 gives the next following alignment insn that increases the known
324 alignment, or NULL_RTX if there is no such insn.
325 For any alignment obtained this way, we can again index uid_align with
326 its uid to obtain the next following align that in turn increases the
327 alignment, till we reach NULL_RTX; the sequence obtained this way
328 for each insn we'll call the alignment chain of this insn in the following
331 struct label_alignment
337 static rtx *uid_align;
338 static int *uid_shuid;
339 static struct label_alignment *label_align;
341 /* Indicate that branch shortening hasn't yet been done. */
344 init_insn_lengths (void)
355 insn_lengths_max_uid = 0;
357 #ifdef HAVE_ATTR_length
358 INSN_ADDRESSES_FREE ();
367 /* Obtain the current length of an insn. If branch shortening has been done,
368 get its actual length. Otherwise, use FALLBACK_FN to calculate the
371 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED,
372 int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED)
374 #ifdef HAVE_ATTR_length
379 if (insn_lengths_max_uid > INSN_UID (insn))
380 return insn_lengths[INSN_UID (insn)];
382 switch (GET_CODE (insn))
390 length = fallback_fn (insn);
394 body = PATTERN (insn);
395 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
397 /* Alignment is machine-dependent and should be handled by
401 length = fallback_fn (insn);
405 body = PATTERN (insn);
406 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
409 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
410 length = asm_insn_count (body) * fallback_fn (insn);
411 else if (GET_CODE (body) == SEQUENCE)
412 for (i = 0; i < XVECLEN (body, 0); i++)
413 length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn);
415 length = fallback_fn (insn);
422 #ifdef ADJUST_INSN_LENGTH
423 ADJUST_INSN_LENGTH (insn, length);
426 #else /* not HAVE_ATTR_length */
428 #define insn_default_length 0
429 #define insn_min_length 0
430 #endif /* not HAVE_ATTR_length */
433 /* Obtain the current length of an insn. If branch shortening has been done,
434 get its actual length. Otherwise, get its maximum length. */
436 get_attr_length (rtx insn)
438 return get_attr_length_1 (insn, insn_default_length);
441 /* Obtain the current length of an insn. If branch shortening has been done,
442 get its actual length. Otherwise, get its minimum length. */
444 get_attr_min_length (rtx insn)
446 return get_attr_length_1 (insn, insn_min_length);
449 /* Code to handle alignment inside shorten_branches. */
451 /* Here is an explanation how the algorithm in align_fuzz can give
454 Call a sequence of instructions beginning with alignment point X
455 and continuing until the next alignment point `block X'. When `X'
456 is used in an expression, it means the alignment value of the
459 Call the distance between the start of the first insn of block X, and
460 the end of the last insn of block X `IX', for the `inner size of X'.
461 This is clearly the sum of the instruction lengths.
463 Likewise with the next alignment-delimited block following X, which we
466 Call the distance between the start of the first insn of block X, and
467 the start of the first insn of block Y `OX', for the `outer size of X'.
469 The estimated padding is then OX - IX.
471 OX can be safely estimated as
476 OX = round_up(IX, X) + Y - X
478 Clearly est(IX) >= real(IX), because that only depends on the
479 instruction lengths, and those being overestimated is a given.
481 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
482 we needn't worry about that when thinking about OX.
484 When X >= Y, the alignment provided by Y adds no uncertainty factor
485 for branch ranges starting before X, so we can just round what we have.
486 But when X < Y, we don't know anything about the, so to speak,
487 `middle bits', so we have to assume the worst when aligning up from an
488 address mod X to one mod Y, which is Y - X. */
491 #define LABEL_ALIGN(LABEL) align_labels_log
494 #ifndef LABEL_ALIGN_MAX_SKIP
495 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
499 #define LOOP_ALIGN(LABEL) align_loops_log
502 #ifndef LOOP_ALIGN_MAX_SKIP
503 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
506 #ifndef LABEL_ALIGN_AFTER_BARRIER
507 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
510 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
511 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
515 #define JUMP_ALIGN(LABEL) align_jumps_log
518 #ifndef JUMP_ALIGN_MAX_SKIP
519 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
522 #ifndef ADDR_VEC_ALIGN
524 final_addr_vec_align (rtx addr_vec)
526 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
528 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
529 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
530 return exact_log2 (align);
534 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
537 #ifndef INSN_LENGTH_ALIGNMENT
538 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
541 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
543 static int min_labelno, max_labelno;
545 #define LABEL_TO_ALIGNMENT(LABEL) \
546 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
548 #define LABEL_TO_MAX_SKIP(LABEL) \
549 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
551 /* For the benefit of port specific code do this also as a function. */
554 label_to_alignment (rtx label)
556 if (CODE_LABEL_NUMBER (label) <= max_labelno)
557 return LABEL_TO_ALIGNMENT (label);
562 label_to_max_skip (rtx label)
564 if (CODE_LABEL_NUMBER (label) <= max_labelno)
565 return LABEL_TO_MAX_SKIP (label);
569 #ifdef HAVE_ATTR_length
570 /* The differences in addresses
571 between a branch and its target might grow or shrink depending on
572 the alignment the start insn of the range (the branch for a forward
573 branch or the label for a backward branch) starts out on; if these
574 differences are used naively, they can even oscillate infinitely.
575 We therefore want to compute a 'worst case' address difference that
576 is independent of the alignment the start insn of the range end
577 up on, and that is at least as large as the actual difference.
578 The function align_fuzz calculates the amount we have to add to the
579 naively computed difference, by traversing the part of the alignment
580 chain of the start insn of the range that is in front of the end insn
581 of the range, and considering for each alignment the maximum amount
582 that it might contribute to a size increase.
584 For casesi tables, we also want to know worst case minimum amounts of
585 address difference, in case a machine description wants to introduce
586 some common offset that is added to all offsets in a table.
587 For this purpose, align_fuzz with a growth argument of 0 computes the
588 appropriate adjustment. */
590 /* Compute the maximum delta by which the difference of the addresses of
591 START and END might grow / shrink due to a different address for start
592 which changes the size of alignment insns between START and END.
593 KNOWN_ALIGN_LOG is the alignment known for START.
594 GROWTH should be ~0 if the objective is to compute potential code size
595 increase, and 0 if the objective is to compute potential shrink.
596 The return value is undefined for any other value of GROWTH. */
599 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
601 int uid = INSN_UID (start);
603 int known_align = 1 << known_align_log;
604 int end_shuid = INSN_SHUID (end);
607 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
609 int align_addr, new_align;
611 uid = INSN_UID (align_label);
612 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
613 if (uid_shuid[uid] > end_shuid)
615 known_align_log = LABEL_TO_ALIGNMENT (align_label);
616 new_align = 1 << known_align_log;
617 if (new_align < known_align)
619 fuzz += (-align_addr ^ growth) & (new_align - known_align);
620 known_align = new_align;
625 /* Compute a worst-case reference address of a branch so that it
626 can be safely used in the presence of aligned labels. Since the
627 size of the branch itself is unknown, the size of the branch is
628 not included in the range. I.e. for a forward branch, the reference
629 address is the end address of the branch as known from the previous
630 branch shortening pass, minus a value to account for possible size
631 increase due to alignment. For a backward branch, it is the start
632 address of the branch as known from the current pass, plus a value
633 to account for possible size increase due to alignment.
634 NB.: Therefore, the maximum offset allowed for backward branches needs
635 to exclude the branch size. */
638 insn_current_reference_address (rtx branch)
643 if (! INSN_ADDRESSES_SET_P ())
646 seq = NEXT_INSN (PREV_INSN (branch));
647 seq_uid = INSN_UID (seq);
648 if (!JUMP_P (branch))
649 /* This can happen for example on the PA; the objective is to know the
650 offset to address something in front of the start of the function.
651 Thus, we can treat it like a backward branch.
652 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
653 any alignment we'd encounter, so we skip the call to align_fuzz. */
654 return insn_current_address;
655 dest = JUMP_LABEL (branch);
657 /* BRANCH has no proper alignment chain set, so use SEQ.
658 BRANCH also has no INSN_SHUID. */
659 if (INSN_SHUID (seq) < INSN_SHUID (dest))
661 /* Forward branch. */
662 return (insn_last_address + insn_lengths[seq_uid]
663 - align_fuzz (seq, dest, length_unit_log, ~0));
667 /* Backward branch. */
668 return (insn_current_address
669 + align_fuzz (dest, seq, length_unit_log, ~0));
672 #endif /* HAVE_ATTR_length */
674 /* Compute branch alignments based on frequency information in the
678 compute_alignments (void)
680 int log, max_skip, max_log;
683 int freq_threshold = 0;
691 max_labelno = max_label_num ();
692 min_labelno = get_first_label_num ();
693 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
695 /* If not optimizing or optimizing for size, don't assign any alignments. */
696 if (! optimize || optimize_function_for_size_p (cfun))
701 dump_flow_info (dump_file, TDF_DETAILS);
702 flow_loops_dump (dump_file, NULL, 1);
703 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
706 if (bb->frequency > freq_max)
707 freq_max = bb->frequency;
708 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
711 fprintf(dump_file, "freq_max: %i\n",freq_max);
714 rtx label = BB_HEAD (bb);
715 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
720 || optimize_bb_for_size_p (bb))
723 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
724 bb->index, bb->frequency, bb->loop_father->num, bb->loop_depth);
727 max_log = LABEL_ALIGN (label);
728 max_skip = LABEL_ALIGN_MAX_SKIP;
730 FOR_EACH_EDGE (e, ei, bb->preds)
732 if (e->flags & EDGE_FALLTHRU)
733 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
735 branch_frequency += EDGE_FREQUENCY (e);
739 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i",
740 bb->index, bb->frequency, bb->loop_father->num,
742 fallthru_frequency, branch_frequency);
743 if (!bb->loop_father->inner && bb->loop_father->num)
744 fprintf (dump_file, " inner_loop");
745 if (bb->loop_father->header == bb)
746 fprintf (dump_file, " loop_header");
747 fprintf (dump_file, "\n");
750 /* There are two purposes to align block with no fallthru incoming edge:
751 1) to avoid fetch stalls when branch destination is near cache boundary
752 2) to improve cache efficiency in case the previous block is not executed
753 (so it does not need to be in the cache).
755 We to catch first case, we align frequently executed blocks.
756 To catch the second, we align blocks that are executed more frequently
757 than the predecessor and the predecessor is likely to not be executed
758 when function is called. */
761 && (branch_frequency > freq_threshold
762 || (bb->frequency > bb->prev_bb->frequency * 10
763 && (bb->prev_bb->frequency
764 <= ENTRY_BLOCK_PTR->frequency / 2))))
766 log = JUMP_ALIGN (label);
768 fprintf(dump_file, " jump alignment added.\n");
772 max_skip = JUMP_ALIGN_MAX_SKIP;
775 /* In case block is frequent and reached mostly by non-fallthru edge,
776 align it. It is most likely a first block of loop. */
778 && optimize_bb_for_speed_p (bb)
779 && branch_frequency + fallthru_frequency > freq_threshold
781 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
783 log = LOOP_ALIGN (label);
785 fprintf(dump_file, " internal loop alignment added.\n");
789 max_skip = LOOP_ALIGN_MAX_SKIP;
792 LABEL_TO_ALIGNMENT (label) = max_log;
793 LABEL_TO_MAX_SKIP (label) = max_skip;
798 loop_optimizer_finalize ();
799 free_dominance_info (CDI_DOMINATORS);
804 struct rtl_opt_pass pass_compute_alignments =
808 "alignments", /* name */
810 compute_alignments, /* execute */
813 0, /* static_pass_number */
815 0, /* properties_required */
816 0, /* properties_provided */
817 0, /* properties_destroyed */
818 0, /* todo_flags_start */
819 TODO_dump_func | TODO_verify_rtl_sharing
820 | TODO_ggc_collect /* todo_flags_finish */
825 /* Make a pass over all insns and compute their actual lengths by shortening
826 any branches of variable length if possible. */
828 /* shorten_branches might be called multiple times: for example, the SH
829 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
830 In order to do this, it needs proper length information, which it obtains
831 by calling shorten_branches. This cannot be collapsed with
832 shorten_branches itself into a single pass unless we also want to integrate
833 reorg.c, since the branch splitting exposes new instructions with delay
837 shorten_branches (rtx first ATTRIBUTE_UNUSED)
844 #ifdef HAVE_ATTR_length
845 #define MAX_CODE_ALIGN 16
847 int something_changed = 1;
848 char *varying_length;
851 rtx align_tab[MAX_CODE_ALIGN];
855 /* Compute maximum UID and allocate label_align / uid_shuid. */
856 max_uid = get_max_uid ();
858 /* Free uid_shuid before reallocating it. */
861 uid_shuid = XNEWVEC (int, max_uid);
863 if (max_labelno != max_label_num ())
865 int old = max_labelno;
869 max_labelno = max_label_num ();
871 n_labels = max_labelno - min_labelno + 1;
872 n_old_labels = old - min_labelno + 1;
874 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
876 /* Range of labels grows monotonically in the function. Failing here
877 means that the initialization of array got lost. */
878 gcc_assert (n_old_labels <= n_labels);
880 memset (label_align + n_old_labels, 0,
881 (n_labels - n_old_labels) * sizeof (struct label_alignment));
884 /* Initialize label_align and set up uid_shuid to be strictly
885 monotonically rising with insn order. */
886 /* We use max_log here to keep track of the maximum alignment we want to
887 impose on the next CODE_LABEL (or the current one if we are processing
888 the CODE_LABEL itself). */
893 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
897 INSN_SHUID (insn) = i++;
904 bool next_is_jumptable;
906 /* Merge in alignments computed by compute_alignments. */
907 log = LABEL_TO_ALIGNMENT (insn);
911 max_skip = LABEL_TO_MAX_SKIP (insn);
914 next = next_nonnote_insn (insn);
915 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
916 if (!next_is_jumptable)
918 log = LABEL_ALIGN (insn);
922 max_skip = LABEL_ALIGN_MAX_SKIP;
925 /* ADDR_VECs only take room if read-only data goes into the text
927 if ((JUMP_TABLES_IN_TEXT_SECTION
928 || readonly_data_section == text_section)
929 && next_is_jumptable)
931 log = ADDR_VEC_ALIGN (next);
935 max_skip = LABEL_ALIGN_MAX_SKIP;
938 LABEL_TO_ALIGNMENT (insn) = max_log;
939 LABEL_TO_MAX_SKIP (insn) = max_skip;
943 else if (BARRIER_P (insn))
947 for (label = insn; label && ! INSN_P (label);
948 label = NEXT_INSN (label))
951 log = LABEL_ALIGN_AFTER_BARRIER (insn);
955 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
961 #ifdef HAVE_ATTR_length
963 /* Allocate the rest of the arrays. */
964 insn_lengths = XNEWVEC (int, max_uid);
965 insn_lengths_max_uid = max_uid;
966 /* Syntax errors can lead to labels being outside of the main insn stream.
967 Initialize insn_addresses, so that we get reproducible results. */
968 INSN_ADDRESSES_ALLOC (max_uid);
970 varying_length = XCNEWVEC (char, max_uid);
972 /* Initialize uid_align. We scan instructions
973 from end to start, and keep in align_tab[n] the last seen insn
974 that does an alignment of at least n+1, i.e. the successor
975 in the alignment chain for an insn that does / has a known
977 uid_align = XCNEWVEC (rtx, max_uid);
979 for (i = MAX_CODE_ALIGN; --i >= 0;)
980 align_tab[i] = NULL_RTX;
981 seq = get_last_insn ();
982 for (; seq; seq = PREV_INSN (seq))
984 int uid = INSN_UID (seq);
986 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
987 uid_align[uid] = align_tab[0];
990 /* Found an alignment label. */
991 uid_align[uid] = align_tab[log];
992 for (i = log - 1; i >= 0; i--)
996 #ifdef CASE_VECTOR_SHORTEN_MODE
999 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1002 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1003 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1006 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1008 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1009 int len, i, min, max, insn_shuid;
1011 addr_diff_vec_flags flags;
1014 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1016 pat = PATTERN (insn);
1017 len = XVECLEN (pat, 1);
1018 gcc_assert (len > 0);
1019 min_align = MAX_CODE_ALIGN;
1020 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1022 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1023 int shuid = INSN_SHUID (lab);
1034 if (min_align > LABEL_TO_ALIGNMENT (lab))
1035 min_align = LABEL_TO_ALIGNMENT (lab);
1037 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1038 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1039 insn_shuid = INSN_SHUID (insn);
1040 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1041 memset (&flags, 0, sizeof (flags));
1042 flags.min_align = min_align;
1043 flags.base_after_vec = rel > insn_shuid;
1044 flags.min_after_vec = min > insn_shuid;
1045 flags.max_after_vec = max > insn_shuid;
1046 flags.min_after_base = min > rel;
1047 flags.max_after_base = max > rel;
1048 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1051 #endif /* CASE_VECTOR_SHORTEN_MODE */
1053 /* Compute initial lengths, addresses, and varying flags for each insn. */
1054 for (insn_current_address = 0, insn = first;
1056 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1058 uid = INSN_UID (insn);
1060 insn_lengths[uid] = 0;
1064 int log = LABEL_TO_ALIGNMENT (insn);
1067 int align = 1 << log;
1068 int new_address = (insn_current_address + align - 1) & -align;
1069 insn_lengths[uid] = new_address - insn_current_address;
1073 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1075 if (NOTE_P (insn) || BARRIER_P (insn)
1078 if (INSN_DELETED_P (insn))
1081 body = PATTERN (insn);
1082 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1084 /* This only takes room if read-only data goes into the text
1086 if (JUMP_TABLES_IN_TEXT_SECTION
1087 || readonly_data_section == text_section)
1088 insn_lengths[uid] = (XVECLEN (body,
1089 GET_CODE (body) == ADDR_DIFF_VEC)
1090 * GET_MODE_SIZE (GET_MODE (body)));
1091 /* Alignment is handled by ADDR_VEC_ALIGN. */
1093 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1094 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1095 else if (GET_CODE (body) == SEQUENCE)
1098 int const_delay_slots;
1100 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1102 const_delay_slots = 0;
1104 /* Inside a delay slot sequence, we do not do any branch shortening
1105 if the shortening could change the number of delay slots
1107 for (i = 0; i < XVECLEN (body, 0); i++)
1109 rtx inner_insn = XVECEXP (body, 0, i);
1110 int inner_uid = INSN_UID (inner_insn);
1113 if (GET_CODE (body) == ASM_INPUT
1114 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1115 inner_length = (asm_insn_count (PATTERN (inner_insn))
1116 * insn_default_length (inner_insn));
1118 inner_length = insn_default_length (inner_insn);
1120 insn_lengths[inner_uid] = inner_length;
1121 if (const_delay_slots)
1123 if ((varying_length[inner_uid]
1124 = insn_variable_length_p (inner_insn)) != 0)
1125 varying_length[uid] = 1;
1126 INSN_ADDRESSES (inner_uid) = (insn_current_address
1127 + insn_lengths[uid]);
1130 varying_length[inner_uid] = 0;
1131 insn_lengths[uid] += inner_length;
1134 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1136 insn_lengths[uid] = insn_default_length (insn);
1137 varying_length[uid] = insn_variable_length_p (insn);
1140 /* If needed, do any adjustment. */
1141 #ifdef ADJUST_INSN_LENGTH
1142 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1143 if (insn_lengths[uid] < 0)
1144 fatal_insn ("negative insn length", insn);
1148 /* Now loop over all the insns finding varying length insns. For each,
1149 get the current insn length. If it has changed, reflect the change.
1150 When nothing changes for a full pass, we are done. */
1152 while (something_changed)
1154 something_changed = 0;
1155 insn_current_align = MAX_CODE_ALIGN - 1;
1156 for (insn_current_address = 0, insn = first;
1158 insn = NEXT_INSN (insn))
1161 #ifdef ADJUST_INSN_LENGTH
1166 uid = INSN_UID (insn);
1170 int log = LABEL_TO_ALIGNMENT (insn);
1171 if (log > insn_current_align)
1173 int align = 1 << log;
1174 int new_address= (insn_current_address + align - 1) & -align;
1175 insn_lengths[uid] = new_address - insn_current_address;
1176 insn_current_align = log;
1177 insn_current_address = new_address;
1180 insn_lengths[uid] = 0;
1181 INSN_ADDRESSES (uid) = insn_current_address;
1185 length_align = INSN_LENGTH_ALIGNMENT (insn);
1186 if (length_align < insn_current_align)
1187 insn_current_align = length_align;
1189 insn_last_address = INSN_ADDRESSES (uid);
1190 INSN_ADDRESSES (uid) = insn_current_address;
1192 #ifdef CASE_VECTOR_SHORTEN_MODE
1193 if (optimize && JUMP_P (insn)
1194 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1196 rtx body = PATTERN (insn);
1197 int old_length = insn_lengths[uid];
1198 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1199 rtx min_lab = XEXP (XEXP (body, 2), 0);
1200 rtx max_lab = XEXP (XEXP (body, 3), 0);
1201 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1202 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1203 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1206 addr_diff_vec_flags flags;
1208 /* Avoid automatic aggregate initialization. */
1209 flags = ADDR_DIFF_VEC_FLAGS (body);
1211 /* Try to find a known alignment for rel_lab. */
1212 for (prev = rel_lab;
1214 && ! insn_lengths[INSN_UID (prev)]
1215 && ! (varying_length[INSN_UID (prev)] & 1);
1216 prev = PREV_INSN (prev))
1217 if (varying_length[INSN_UID (prev)] & 2)
1219 rel_align = LABEL_TO_ALIGNMENT (prev);
1223 /* See the comment on addr_diff_vec_flags in rtl.h for the
1224 meaning of the flags values. base: REL_LAB vec: INSN */
1225 /* Anything after INSN has still addresses from the last
1226 pass; adjust these so that they reflect our current
1227 estimate for this pass. */
1228 if (flags.base_after_vec)
1229 rel_addr += insn_current_address - insn_last_address;
1230 if (flags.min_after_vec)
1231 min_addr += insn_current_address - insn_last_address;
1232 if (flags.max_after_vec)
1233 max_addr += insn_current_address - insn_last_address;
1234 /* We want to know the worst case, i.e. lowest possible value
1235 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1236 its offset is positive, and we have to be wary of code shrink;
1237 otherwise, it is negative, and we have to be vary of code
1239 if (flags.min_after_base)
1241 /* If INSN is between REL_LAB and MIN_LAB, the size
1242 changes we are about to make can change the alignment
1243 within the observed offset, therefore we have to break
1244 it up into two parts that are independent. */
1245 if (! flags.base_after_vec && flags.min_after_vec)
1247 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1248 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1251 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1255 if (flags.base_after_vec && ! flags.min_after_vec)
1257 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1258 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1261 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1263 /* Likewise, determine the highest lowest possible value
1264 for the offset of MAX_LAB. */
1265 if (flags.max_after_base)
1267 if (! flags.base_after_vec && flags.max_after_vec)
1269 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1270 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1273 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1277 if (flags.base_after_vec && ! flags.max_after_vec)
1279 max_addr += align_fuzz (max_lab, insn, 0, 0);
1280 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1283 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1285 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1286 max_addr - rel_addr,
1288 if (JUMP_TABLES_IN_TEXT_SECTION
1289 || readonly_data_section == text_section)
1292 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1293 insn_current_address += insn_lengths[uid];
1294 if (insn_lengths[uid] != old_length)
1295 something_changed = 1;
1300 #endif /* CASE_VECTOR_SHORTEN_MODE */
1302 if (! (varying_length[uid]))
1304 if (NONJUMP_INSN_P (insn)
1305 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1309 body = PATTERN (insn);
1310 for (i = 0; i < XVECLEN (body, 0); i++)
1312 rtx inner_insn = XVECEXP (body, 0, i);
1313 int inner_uid = INSN_UID (inner_insn);
1315 INSN_ADDRESSES (inner_uid) = insn_current_address;
1317 insn_current_address += insn_lengths[inner_uid];
1321 insn_current_address += insn_lengths[uid];
1326 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1330 body = PATTERN (insn);
1332 for (i = 0; i < XVECLEN (body, 0); i++)
1334 rtx inner_insn = XVECEXP (body, 0, i);
1335 int inner_uid = INSN_UID (inner_insn);
1338 INSN_ADDRESSES (inner_uid) = insn_current_address;
1340 /* insn_current_length returns 0 for insns with a
1341 non-varying length. */
1342 if (! varying_length[inner_uid])
1343 inner_length = insn_lengths[inner_uid];
1345 inner_length = insn_current_length (inner_insn);
1347 if (inner_length != insn_lengths[inner_uid])
1349 insn_lengths[inner_uid] = inner_length;
1350 something_changed = 1;
1352 insn_current_address += insn_lengths[inner_uid];
1353 new_length += inner_length;
1358 new_length = insn_current_length (insn);
1359 insn_current_address += new_length;
1362 #ifdef ADJUST_INSN_LENGTH
1363 /* If needed, do any adjustment. */
1364 tmp_length = new_length;
1365 ADJUST_INSN_LENGTH (insn, new_length);
1366 insn_current_address += (new_length - tmp_length);
1369 if (new_length != insn_lengths[uid])
1371 insn_lengths[uid] = new_length;
1372 something_changed = 1;
1375 /* For a non-optimizing compile, do only a single pass. */
1380 free (varying_length);
1382 #endif /* HAVE_ATTR_length */
1385 #ifdef HAVE_ATTR_length
1386 /* Given the body of an INSN known to be generated by an ASM statement, return
1387 the number of machine instructions likely to be generated for this insn.
1388 This is used to compute its length. */
1391 asm_insn_count (rtx body)
1396 if (GET_CODE (body) == ASM_INPUT)
1397 templ = XSTR (body, 0);
1399 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1404 for (; *templ; templ++)
1405 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1413 /* ??? This is probably the wrong place for these. */
1414 /* Structure recording the mapping from source file and directory
1415 names at compile time to those to be embedded in debug
1417 typedef struct debug_prefix_map
1419 const char *old_prefix;
1420 const char *new_prefix;
1423 struct debug_prefix_map *next;
1426 /* Linked list of such structures. */
1427 debug_prefix_map *debug_prefix_maps;
1430 /* Record a debug file prefix mapping. ARG is the argument to
1431 -fdebug-prefix-map and must be of the form OLD=NEW. */
1434 add_debug_prefix_map (const char *arg)
1436 debug_prefix_map *map;
1439 p = strchr (arg, '=');
1442 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1445 map = XNEW (debug_prefix_map);
1446 map->old_prefix = ggc_alloc_string (arg, p - arg);
1447 map->old_len = p - arg;
1449 map->new_prefix = ggc_strdup (p);
1450 map->new_len = strlen (p);
1451 map->next = debug_prefix_maps;
1452 debug_prefix_maps = map;
1455 /* Perform user-specified mapping of debug filename prefixes. Return
1456 the new name corresponding to FILENAME. */
1459 remap_debug_filename (const char *filename)
1461 debug_prefix_map *map;
1466 for (map = debug_prefix_maps; map; map = map->next)
1467 if (strncmp (filename, map->old_prefix, map->old_len) == 0)
1471 name = filename + map->old_len;
1472 name_len = strlen (name) + 1;
1473 s = (char *) alloca (name_len + map->new_len);
1474 memcpy (s, map->new_prefix, map->new_len);
1475 memcpy (s + map->new_len, name, name_len);
1476 return ggc_strdup (s);
1479 /* Output assembler code for the start of a function,
1480 and initialize some of the variables in this file
1481 for the new function. The label for the function and associated
1482 assembler pseudo-ops have already been output in `assemble_start_function'.
1484 FIRST is the first insn of the rtl for the function being compiled.
1485 FILE is the file to write assembler code to.
1486 OPTIMIZE is nonzero if we should eliminate redundant
1487 test and compare insns. */
1490 final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1491 int optimize ATTRIBUTE_UNUSED)
1495 this_is_asm_operands = 0;
1497 last_filename = locator_file (prologue_locator);
1498 last_linenum = locator_line (prologue_locator);
1500 high_block_linenum = high_function_linenum = last_linenum;
1502 (*debug_hooks->begin_prologue) (last_linenum, last_filename);
1504 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
1505 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1506 dwarf2out_begin_prologue (0, NULL);
1509 #ifdef LEAF_REG_REMAP
1510 if (current_function_uses_only_leaf_regs)
1511 leaf_renumber_regs (first);
1514 /* The Sun386i and perhaps other machines don't work right
1515 if the profiling code comes after the prologue. */
1516 #ifdef PROFILE_BEFORE_PROLOGUE
1518 profile_function (file);
1519 #endif /* PROFILE_BEFORE_PROLOGUE */
1521 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1522 if (dwarf2out_do_frame ())
1523 dwarf2out_frame_debug (NULL_RTX, false);
1526 /* If debugging, assign block numbers to all of the blocks in this
1530 reemit_insn_block_notes ();
1531 number_blocks (current_function_decl);
1532 /* We never actually put out begin/end notes for the top-level
1533 block in the function. But, conceptually, that block is
1535 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1538 if (warn_frame_larger_than
1539 && get_frame_size () > frame_larger_than_size)
1541 /* Issue a warning */
1542 warning (OPT_Wframe_larger_than_,
1543 "the frame size of %wd bytes is larger than %wd bytes",
1544 get_frame_size (), frame_larger_than_size);
1547 /* First output the function prologue: code to set up the stack frame. */
1548 targetm.asm_out.function_prologue (file, get_frame_size ());
1550 /* If the machine represents the prologue as RTL, the profiling code must
1551 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1552 #ifdef HAVE_prologue
1553 if (! HAVE_prologue)
1555 profile_after_prologue (file);
1559 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1561 #ifndef PROFILE_BEFORE_PROLOGUE
1563 profile_function (file);
1564 #endif /* not PROFILE_BEFORE_PROLOGUE */
1568 profile_function (FILE *file ATTRIBUTE_UNUSED)
1570 #ifndef NO_PROFILE_COUNTERS
1571 # define NO_PROFILE_COUNTERS 0
1573 #if defined(ASM_OUTPUT_REG_PUSH)
1574 int sval = cfun->returns_struct;
1575 rtx svrtx = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), 1);
1576 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1577 int cxt = cfun->static_chain_decl != NULL;
1579 #endif /* ASM_OUTPUT_REG_PUSH */
1581 if (! NO_PROFILE_COUNTERS)
1583 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1584 switch_to_section (data_section);
1585 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1586 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1587 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1590 switch_to_section (current_function_section ());
1592 #if defined(ASM_OUTPUT_REG_PUSH)
1593 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
1595 ASM_OUTPUT_REG_PUSH (file, REGNO (svrtx));
1599 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1601 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1603 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1606 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1611 FUNCTION_PROFILER (file, current_function_funcdef_no);
1613 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1615 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1617 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1620 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1625 #if defined(ASM_OUTPUT_REG_PUSH)
1626 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
1628 ASM_OUTPUT_REG_POP (file, REGNO (svrtx));
1633 /* Output assembler code for the end of a function.
1634 For clarity, args are same as those of `final_start_function'
1635 even though not all of them are needed. */
1638 final_end_function (void)
1642 (*debug_hooks->end_function) (high_function_linenum);
1644 /* Finally, output the function epilogue:
1645 code to restore the stack frame and return to the caller. */
1646 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1648 /* And debug output. */
1649 (*debug_hooks->end_epilogue) (last_linenum, last_filename);
1651 #if defined (DWARF2_UNWIND_INFO)
1652 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG
1653 && dwarf2out_do_frame ())
1654 dwarf2out_end_epilogue (last_linenum, last_filename);
1658 /* Output assembler code for some insns: all or part of a function.
1659 For description of args, see `final_start_function', above. */
1662 final (rtx first, FILE *file, int optimize)
1668 last_ignored_compare = 0;
1670 for (insn = first; insn; insn = NEXT_INSN (insn))
1672 if (INSN_UID (insn) > max_uid) /* Find largest UID. */
1673 max_uid = INSN_UID (insn);
1675 /* If CC tracking across branches is enabled, record the insn which
1676 jumps to each branch only reached from one place. */
1677 if (optimize && JUMP_P (insn))
1679 rtx lab = JUMP_LABEL (insn);
1680 if (lab && LABEL_NUSES (lab) == 1)
1682 LABEL_REFS (lab) = insn;
1692 /* Output the insns. */
1693 for (insn = first; insn;)
1695 #ifdef HAVE_ATTR_length
1696 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1698 /* This can be triggered by bugs elsewhere in the compiler if
1699 new insns are created after init_insn_lengths is called. */
1700 gcc_assert (NOTE_P (insn));
1701 insn_current_address = -1;
1704 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1705 #endif /* HAVE_ATTR_length */
1707 insn = final_scan_insn (insn, file, optimize, 0, &seen);
1712 get_insn_template (int code, rtx insn)
1714 switch (insn_data[code].output_format)
1716 case INSN_OUTPUT_FORMAT_SINGLE:
1717 return insn_data[code].output.single;
1718 case INSN_OUTPUT_FORMAT_MULTI:
1719 return insn_data[code].output.multi[which_alternative];
1720 case INSN_OUTPUT_FORMAT_FUNCTION:
1722 return (*insn_data[code].output.function) (recog_data.operand, insn);
1729 /* Emit the appropriate declaration for an alternate-entry-point
1730 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1731 LABEL_KIND != LABEL_NORMAL.
1733 The case fall-through in this function is intentional. */
1735 output_alternate_entry_point (FILE *file, rtx insn)
1737 const char *name = LABEL_NAME (insn);
1739 switch (LABEL_KIND (insn))
1741 case LABEL_WEAK_ENTRY:
1742 #ifdef ASM_WEAKEN_LABEL
1743 ASM_WEAKEN_LABEL (file, name);
1745 case LABEL_GLOBAL_ENTRY:
1746 targetm.asm_out.globalize_label (file, name);
1747 case LABEL_STATIC_ENTRY:
1748 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1749 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1751 ASM_OUTPUT_LABEL (file, name);
1760 /* Given a CALL_INSN, find and return the nested CALL. */
1762 call_from_call_insn (rtx insn)
1765 gcc_assert (CALL_P (insn));
1768 while (GET_CODE (x) != CALL)
1770 switch (GET_CODE (x))
1775 x = COND_EXEC_CODE (x);
1778 x = XVECEXP (x, 0, 0);
1788 /* The final scan for one insn, INSN.
1789 Args are same as in `final', except that INSN
1790 is the insn being scanned.
1791 Value returned is the next insn to be scanned.
1793 NOPEEPHOLES is the flag to disallow peephole processing (currently
1794 used for within delayed branch sequence output).
1796 SEEN is used to track the end of the prologue, for emitting
1797 debug information. We force the emission of a line note after
1798 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1799 at the beginning of the second basic block, whichever comes
1803 final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
1804 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
1813 /* Ignore deleted insns. These can occur when we split insns (due to a
1814 template of "#") while not optimizing. */
1815 if (INSN_DELETED_P (insn))
1816 return NEXT_INSN (insn);
1818 switch (GET_CODE (insn))
1821 switch (NOTE_KIND (insn))
1823 case NOTE_INSN_DELETED:
1826 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
1827 in_cold_section_p = !in_cold_section_p;
1828 #ifdef DWARF2_UNWIND_INFO
1829 if (dwarf2out_do_frame ())
1830 dwarf2out_switch_text_section ();
1833 (*debug_hooks->switch_text_section) ();
1835 switch_to_section (current_function_section ());
1838 case NOTE_INSN_BASIC_BLOCK:
1839 #ifdef TARGET_UNWIND_INFO
1840 targetm.asm_out.unwind_emit (asm_out_file, insn);
1844 fprintf (asm_out_file, "\t%s basic block %d\n",
1845 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
1847 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
1849 *seen |= SEEN_EMITTED;
1850 force_source_line = true;
1857 case NOTE_INSN_EH_REGION_BEG:
1858 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
1859 NOTE_EH_HANDLER (insn));
1862 case NOTE_INSN_EH_REGION_END:
1863 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
1864 NOTE_EH_HANDLER (insn));
1867 case NOTE_INSN_PROLOGUE_END:
1868 targetm.asm_out.function_end_prologue (file);
1869 profile_after_prologue (file);
1871 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1873 *seen |= SEEN_EMITTED;
1874 force_source_line = true;
1881 case NOTE_INSN_EPILOGUE_BEG:
1882 targetm.asm_out.function_begin_epilogue (file);
1885 case NOTE_INSN_FUNCTION_BEG:
1887 (*debug_hooks->end_prologue) (last_linenum, last_filename);
1889 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1891 *seen |= SEEN_EMITTED;
1892 force_source_line = true;
1899 case NOTE_INSN_BLOCK_BEG:
1900 if (debug_info_level == DINFO_LEVEL_NORMAL
1901 || debug_info_level == DINFO_LEVEL_VERBOSE
1902 || write_symbols == DWARF2_DEBUG
1903 || write_symbols == VMS_AND_DWARF2_DEBUG
1904 || write_symbols == VMS_DEBUG)
1906 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1910 high_block_linenum = last_linenum;
1912 /* Output debugging info about the symbol-block beginning. */
1913 (*debug_hooks->begin_block) (last_linenum, n);
1915 /* Mark this block as output. */
1916 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
1918 if (write_symbols == DBX_DEBUG
1919 || write_symbols == SDB_DEBUG)
1921 location_t *locus_ptr
1922 = block_nonartificial_location (NOTE_BLOCK (insn));
1924 if (locus_ptr != NULL)
1926 override_filename = LOCATION_FILE (*locus_ptr);
1927 override_linenum = LOCATION_LINE (*locus_ptr);
1932 case NOTE_INSN_BLOCK_END:
1933 if (debug_info_level == DINFO_LEVEL_NORMAL
1934 || debug_info_level == DINFO_LEVEL_VERBOSE
1935 || write_symbols == DWARF2_DEBUG
1936 || write_symbols == VMS_AND_DWARF2_DEBUG
1937 || write_symbols == VMS_DEBUG)
1939 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1943 /* End of a symbol-block. */
1945 gcc_assert (block_depth >= 0);
1947 (*debug_hooks->end_block) (high_block_linenum, n);
1949 if (write_symbols == DBX_DEBUG
1950 || write_symbols == SDB_DEBUG)
1952 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
1953 location_t *locus_ptr
1954 = block_nonartificial_location (outer_block);
1956 if (locus_ptr != NULL)
1958 override_filename = LOCATION_FILE (*locus_ptr);
1959 override_linenum = LOCATION_LINE (*locus_ptr);
1963 override_filename = NULL;
1964 override_linenum = 0;
1969 case NOTE_INSN_DELETED_LABEL:
1970 /* Emit the label. We may have deleted the CODE_LABEL because
1971 the label could be proved to be unreachable, though still
1972 referenced (in the form of having its address taken. */
1973 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
1976 case NOTE_INSN_VAR_LOCATION:
1977 (*debug_hooks->var_location) (insn);
1987 #if defined (DWARF2_UNWIND_INFO)
1988 if (dwarf2out_do_frame ())
1989 dwarf2out_frame_debug (insn, false);
1994 /* The target port might emit labels in the output function for
1995 some insn, e.g. sh.c output_branchy_insn. */
1996 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
1998 int align = LABEL_TO_ALIGNMENT (insn);
1999 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2000 int max_skip = LABEL_TO_MAX_SKIP (insn);
2003 if (align && NEXT_INSN (insn))
2005 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2006 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2008 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2009 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2011 ASM_OUTPUT_ALIGN (file, align);
2020 if (LABEL_NAME (insn))
2021 (*debug_hooks->label) (insn);
2025 next = next_nonnote_insn (insn);
2026 /* If this label is followed by a jump-table, make sure we put
2027 the label in the read-only section. Also possibly write the
2028 label and jump table together. */
2029 if (next != 0 && JUMP_TABLE_DATA_P (next))
2031 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2032 /* In this case, the case vector is being moved by the
2033 target, so don't output the label at all. Leave that
2034 to the back end macros. */
2036 if (! JUMP_TABLES_IN_TEXT_SECTION)
2040 switch_to_section (targetm.asm_out.function_rodata_section
2041 (current_function_decl));
2043 #ifdef ADDR_VEC_ALIGN
2044 log_align = ADDR_VEC_ALIGN (next);
2046 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2048 ASM_OUTPUT_ALIGN (file, log_align);
2051 switch_to_section (current_function_section ());
2053 #ifdef ASM_OUTPUT_CASE_LABEL
2054 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2057 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2062 if (LABEL_ALT_ENTRY_P (insn))
2063 output_alternate_entry_point (file, insn);
2065 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2070 rtx body = PATTERN (insn);
2071 int insn_code_number;
2074 #ifdef HAVE_conditional_execution
2075 /* Reset this early so it is correct for ASM statements. */
2076 current_insn_predicate = NULL_RTX;
2078 /* An INSN, JUMP_INSN or CALL_INSN.
2079 First check for special kinds that recog doesn't recognize. */
2081 if (GET_CODE (body) == USE /* These are just declarations. */
2082 || GET_CODE (body) == CLOBBER)
2087 /* If there is a REG_CC_SETTER note on this insn, it means that
2088 the setting of the condition code was done in the delay slot
2089 of the insn that branched here. So recover the cc status
2090 from the insn that set it. */
2092 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2095 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2096 cc_prev_status = cc_status;
2101 /* Detect insns that are really jump-tables
2102 and output them as such. */
2104 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2106 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2110 if (! JUMP_TABLES_IN_TEXT_SECTION)
2111 switch_to_section (targetm.asm_out.function_rodata_section
2112 (current_function_decl));
2114 switch_to_section (current_function_section ());
2118 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2119 if (GET_CODE (body) == ADDR_VEC)
2121 #ifdef ASM_OUTPUT_ADDR_VEC
2122 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2129 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2130 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2136 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2137 for (idx = 0; idx < vlen; idx++)
2139 if (GET_CODE (body) == ADDR_VEC)
2141 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2142 ASM_OUTPUT_ADDR_VEC_ELT
2143 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2150 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2151 ASM_OUTPUT_ADDR_DIFF_ELT
2154 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2155 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2161 #ifdef ASM_OUTPUT_CASE_END
2162 ASM_OUTPUT_CASE_END (file,
2163 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2168 switch_to_section (current_function_section ());
2172 /* Output this line note if it is the first or the last line
2174 if (notice_source_line (insn))
2176 (*debug_hooks->source_line) (last_linenum, last_filename);
2179 if (GET_CODE (body) == ASM_INPUT)
2181 const char *string = XSTR (body, 0);
2183 /* There's no telling what that did to the condition codes. */
2188 expanded_location loc;
2191 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2192 if (*loc.file && loc.line)
2193 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2194 ASM_COMMENT_START, loc.line, loc.file);
2195 fprintf (asm_out_file, "\t%s\n", string);
2196 #if HAVE_AS_LINE_ZERO
2197 if (*loc.file && loc.line)
2198 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2204 /* Detect `asm' construct with operands. */
2205 if (asm_noperands (body) >= 0)
2207 unsigned int noperands = asm_noperands (body);
2208 rtx *ops = XALLOCAVEC (rtx, noperands);
2211 expanded_location expanded;
2213 /* There's no telling what that did to the condition codes. */
2216 /* Get out the operand values. */
2217 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2218 /* Inhibit dying on what would otherwise be compiler bugs. */
2219 insn_noperands = noperands;
2220 this_is_asm_operands = insn;
2221 expanded = expand_location (loc);
2223 #ifdef FINAL_PRESCAN_INSN
2224 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2227 /* Output the insn using them. */
2231 if (expanded.file && expanded.line)
2232 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2233 ASM_COMMENT_START, expanded.line, expanded.file);
2234 output_asm_insn (string, ops);
2235 #if HAVE_AS_LINE_ZERO
2236 if (expanded.file && expanded.line)
2237 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2241 if (targetm.asm_out.final_postscan_insn)
2242 targetm.asm_out.final_postscan_insn (file, insn, ops,
2245 this_is_asm_operands = 0;
2251 if (GET_CODE (body) == SEQUENCE)
2253 /* A delayed-branch sequence */
2256 final_sequence = body;
2258 /* Record the delay slots' frame information before the branch.
2259 This is needed for delayed calls: see execute_cfa_program(). */
2260 #if defined (DWARF2_UNWIND_INFO)
2261 if (dwarf2out_do_frame ())
2262 for (i = 1; i < XVECLEN (body, 0); i++)
2263 dwarf2out_frame_debug (XVECEXP (body, 0, i), false);
2266 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2267 force the restoration of a comparison that was previously
2268 thought unnecessary. If that happens, cancel this sequence
2269 and cause that insn to be restored. */
2271 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
2272 if (next != XVECEXP (body, 0, 1))
2278 for (i = 1; i < XVECLEN (body, 0); i++)
2280 rtx insn = XVECEXP (body, 0, i);
2281 rtx next = NEXT_INSN (insn);
2282 /* We loop in case any instruction in a delay slot gets
2285 insn = final_scan_insn (insn, file, 0, 1, seen);
2286 while (insn != next);
2288 #ifdef DBR_OUTPUT_SEQEND
2289 DBR_OUTPUT_SEQEND (file);
2293 /* If the insn requiring the delay slot was a CALL_INSN, the
2294 insns in the delay slot are actually executed before the
2295 called function. Hence we don't preserve any CC-setting
2296 actions in these insns and the CC must be marked as being
2297 clobbered by the function. */
2298 if (CALL_P (XVECEXP (body, 0, 0)))
2305 /* We have a real machine instruction as rtl. */
2307 body = PATTERN (insn);
2310 set = single_set (insn);
2312 /* Check for redundant test and compare instructions
2313 (when the condition codes are already set up as desired).
2314 This is done only when optimizing; if not optimizing,
2315 it should be possible for the user to alter a variable
2316 with the debugger in between statements
2317 and the next statement should reexamine the variable
2318 to compute the condition codes. */
2323 && GET_CODE (SET_DEST (set)) == CC0
2324 && insn != last_ignored_compare)
2327 if (GET_CODE (SET_SRC (set)) == SUBREG)
2328 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2330 src1 = SET_SRC (set);
2332 if (GET_CODE (SET_SRC (set)) == COMPARE)
2334 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2335 XEXP (SET_SRC (set), 0)
2336 = alter_subreg (&XEXP (SET_SRC (set), 0));
2337 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2338 XEXP (SET_SRC (set), 1)
2339 = alter_subreg (&XEXP (SET_SRC (set), 1));
2340 if (XEXP (SET_SRC (set), 1)
2341 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2342 src2 = XEXP (SET_SRC (set), 0);
2344 if ((cc_status.value1 != 0
2345 && rtx_equal_p (src1, cc_status.value1))
2346 || (cc_status.value2 != 0
2347 && rtx_equal_p (src1, cc_status.value2))
2348 || (src2 != 0 && cc_status.value1 != 0
2349 && rtx_equal_p (src2, cc_status.value1))
2350 || (src2 != 0 && cc_status.value2 != 0
2351 && rtx_equal_p (src2, cc_status.value2)))
2353 /* Don't delete insn if it has an addressing side-effect. */
2354 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2355 /* or if anything in it is volatile. */
2356 && ! volatile_refs_p (PATTERN (insn)))
2358 /* We don't really delete the insn; just ignore it. */
2359 last_ignored_compare = insn;
2366 /* If this is a conditional branch, maybe modify it
2367 if the cc's are in a nonstandard state
2368 so that it accomplishes the same thing that it would
2369 do straightforwardly if the cc's were set up normally. */
2371 if (cc_status.flags != 0
2373 && GET_CODE (body) == SET
2374 && SET_DEST (body) == pc_rtx
2375 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2376 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2377 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2379 /* This function may alter the contents of its argument
2380 and clear some of the cc_status.flags bits.
2381 It may also return 1 meaning condition now always true
2382 or -1 meaning condition now always false
2383 or 2 meaning condition nontrivial but altered. */
2384 int result = alter_cond (XEXP (SET_SRC (body), 0));
2385 /* If condition now has fixed value, replace the IF_THEN_ELSE
2386 with its then-operand or its else-operand. */
2388 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2390 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2392 /* The jump is now either unconditional or a no-op.
2393 If it has become a no-op, don't try to output it.
2394 (It would not be recognized.) */
2395 if (SET_SRC (body) == pc_rtx)
2400 else if (GET_CODE (SET_SRC (body)) == RETURN)
2401 /* Replace (set (pc) (return)) with (return). */
2402 PATTERN (insn) = body = SET_SRC (body);
2404 /* Rerecognize the instruction if it has changed. */
2406 INSN_CODE (insn) = -1;
2409 /* If this is a conditional trap, maybe modify it if the cc's
2410 are in a nonstandard state so that it accomplishes the same
2411 thing that it would do straightforwardly if the cc's were
2413 if (cc_status.flags != 0
2414 && NONJUMP_INSN_P (insn)
2415 && GET_CODE (body) == TRAP_IF
2416 && COMPARISON_P (TRAP_CONDITION (body))
2417 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2419 /* This function may alter the contents of its argument
2420 and clear some of the cc_status.flags bits.
2421 It may also return 1 meaning condition now always true
2422 or -1 meaning condition now always false
2423 or 2 meaning condition nontrivial but altered. */
2424 int result = alter_cond (TRAP_CONDITION (body));
2426 /* If TRAP_CONDITION has become always false, delete the
2434 /* If TRAP_CONDITION has become always true, replace
2435 TRAP_CONDITION with const_true_rtx. */
2437 TRAP_CONDITION (body) = const_true_rtx;
2439 /* Rerecognize the instruction if it has changed. */
2441 INSN_CODE (insn) = -1;
2444 /* Make same adjustments to instructions that examine the
2445 condition codes without jumping and instructions that
2446 handle conditional moves (if this machine has either one). */
2448 if (cc_status.flags != 0
2451 rtx cond_rtx, then_rtx, else_rtx;
2454 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2456 cond_rtx = XEXP (SET_SRC (set), 0);
2457 then_rtx = XEXP (SET_SRC (set), 1);
2458 else_rtx = XEXP (SET_SRC (set), 2);
2462 cond_rtx = SET_SRC (set);
2463 then_rtx = const_true_rtx;
2464 else_rtx = const0_rtx;
2467 switch (GET_CODE (cond_rtx))
2481 if (XEXP (cond_rtx, 0) != cc0_rtx)
2483 result = alter_cond (cond_rtx);
2485 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2486 else if (result == -1)
2487 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2488 else if (result == 2)
2489 INSN_CODE (insn) = -1;
2490 if (SET_DEST (set) == SET_SRC (set))
2502 #ifdef HAVE_peephole
2503 /* Do machine-specific peephole optimizations if desired. */
2505 if (optimize && !flag_no_peephole && !nopeepholes)
2507 rtx next = peephole (insn);
2508 /* When peepholing, if there were notes within the peephole,
2509 emit them before the peephole. */
2510 if (next != 0 && next != NEXT_INSN (insn))
2512 rtx note, prev = PREV_INSN (insn);
2514 for (note = NEXT_INSN (insn); note != next;
2515 note = NEXT_INSN (note))
2516 final_scan_insn (note, file, optimize, nopeepholes, seen);
2518 /* Put the notes in the proper position for a later
2519 rescan. For example, the SH target can do this
2520 when generating a far jump in a delayed branch
2522 note = NEXT_INSN (insn);
2523 PREV_INSN (note) = prev;
2524 NEXT_INSN (prev) = note;
2525 NEXT_INSN (PREV_INSN (next)) = insn;
2526 PREV_INSN (insn) = PREV_INSN (next);
2527 NEXT_INSN (insn) = next;
2528 PREV_INSN (next) = insn;
2531 /* PEEPHOLE might have changed this. */
2532 body = PATTERN (insn);
2536 /* Try to recognize the instruction.
2537 If successful, verify that the operands satisfy the
2538 constraints for the instruction. Crash if they don't,
2539 since `reload' should have changed them so that they do. */
2541 insn_code_number = recog_memoized (insn);
2542 cleanup_subreg_operands (insn);
2544 /* Dump the insn in the assembly for debugging. */
2545 if (flag_dump_rtl_in_asm)
2547 print_rtx_head = ASM_COMMENT_START;
2548 print_rtl_single (asm_out_file, insn);
2549 print_rtx_head = "";
2552 if (! constrain_operands_cached (1))
2553 fatal_insn_not_found (insn);
2555 /* Some target machines need to prescan each insn before
2558 #ifdef FINAL_PRESCAN_INSN
2559 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2562 #ifdef HAVE_conditional_execution
2563 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2564 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2568 cc_prev_status = cc_status;
2570 /* Update `cc_status' for this instruction.
2571 The instruction's output routine may change it further.
2572 If the output routine for a jump insn needs to depend
2573 on the cc status, it should look at cc_prev_status. */
2575 NOTICE_UPDATE_CC (body, insn);
2578 current_output_insn = debug_insn = insn;
2580 #if defined (DWARF2_UNWIND_INFO)
2581 if (CALL_P (insn) && dwarf2out_do_frame ())
2582 dwarf2out_frame_debug (insn, false);
2585 /* Find the proper template for this insn. */
2586 templ = get_insn_template (insn_code_number, insn);
2588 /* If the C code returns 0, it means that it is a jump insn
2589 which follows a deleted test insn, and that test insn
2590 needs to be reinserted. */
2595 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2597 /* We have already processed the notes between the setter and
2598 the user. Make sure we don't process them again, this is
2599 particularly important if one of the notes is a block
2600 scope note or an EH note. */
2602 prev != last_ignored_compare;
2603 prev = PREV_INSN (prev))
2606 delete_insn (prev); /* Use delete_note. */
2612 /* If the template is the string "#", it means that this insn must
2614 if (templ[0] == '#' && templ[1] == '\0')
2616 rtx new_rtx = try_split (body, insn, 0);
2618 /* If we didn't split the insn, go away. */
2619 if (new_rtx == insn && PATTERN (new_rtx) == body)
2620 fatal_insn ("could not split insn", insn);
2622 #ifdef HAVE_ATTR_length
2623 /* This instruction should have been split in shorten_branches,
2624 to ensure that we would have valid length info for the
2632 #ifdef TARGET_UNWIND_INFO
2633 /* ??? This will put the directives in the wrong place if
2634 get_insn_template outputs assembly directly. However calling it
2635 before get_insn_template breaks if the insns is split. */
2636 targetm.asm_out.unwind_emit (asm_out_file, insn);
2641 rtx x = call_from_call_insn (insn);
2643 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
2647 t = SYMBOL_REF_DECL (x);
2649 assemble_external (t);
2653 /* Output assembler code from the template. */
2654 output_asm_insn (templ, recog_data.operand);
2656 /* Some target machines need to postscan each insn after
2658 if (targetm.asm_out.final_postscan_insn)
2659 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
2660 recog_data.n_operands);
2662 /* If necessary, report the effect that the instruction has on
2663 the unwind info. We've already done this for delay slots
2664 and call instructions. */
2665 #if defined (DWARF2_UNWIND_INFO)
2666 if (final_sequence == 0
2667 #if !defined (HAVE_prologue)
2668 && !ACCUMULATE_OUTGOING_ARGS
2670 && dwarf2out_do_frame ())
2671 dwarf2out_frame_debug (insn, true);
2674 current_output_insn = debug_insn = 0;
2677 return NEXT_INSN (insn);
2680 /* Return whether a source line note needs to be emitted before INSN. */
2683 notice_source_line (rtx insn)
2685 const char *filename;
2688 if (override_filename)
2690 filename = override_filename;
2691 linenum = override_linenum;
2695 filename = insn_file (insn);
2696 linenum = insn_line (insn);
2700 && (force_source_line
2701 || filename != last_filename
2702 || last_linenum != linenum))
2704 force_source_line = false;
2705 last_filename = filename;
2706 last_linenum = linenum;
2707 high_block_linenum = MAX (last_linenum, high_block_linenum);
2708 high_function_linenum = MAX (last_linenum, high_function_linenum);
2714 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2715 directly to the desired hard register. */
2718 cleanup_subreg_operands (rtx insn)
2721 bool changed = false;
2722 extract_insn_cached (insn);
2723 for (i = 0; i < recog_data.n_operands; i++)
2725 /* The following test cannot use recog_data.operand when testing
2726 for a SUBREG: the underlying object might have been changed
2727 already if we are inside a match_operator expression that
2728 matches the else clause. Instead we test the underlying
2729 expression directly. */
2730 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2732 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2735 else if (GET_CODE (recog_data.operand[i]) == PLUS
2736 || GET_CODE (recog_data.operand[i]) == MULT
2737 || MEM_P (recog_data.operand[i]))
2738 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
2741 for (i = 0; i < recog_data.n_dups; i++)
2743 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2745 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2748 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2749 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2750 || MEM_P (*recog_data.dup_loc[i]))
2751 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
2754 df_insn_rescan (insn);
2757 /* If X is a SUBREG, replace it with a REG or a MEM,
2758 based on the thing it is a subreg of. */
2761 alter_subreg (rtx *xp)
2764 rtx y = SUBREG_REG (x);
2766 /* simplify_subreg does not remove subreg from volatile references.
2767 We are required to. */
2770 int offset = SUBREG_BYTE (x);
2772 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2773 contains 0 instead of the proper offset. See simplify_subreg. */
2775 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
2777 int difference = GET_MODE_SIZE (GET_MODE (y))
2778 - GET_MODE_SIZE (GET_MODE (x));
2779 if (WORDS_BIG_ENDIAN)
2780 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2781 if (BYTES_BIG_ENDIAN)
2782 offset += difference % UNITS_PER_WORD;
2785 *xp = adjust_address (y, GET_MODE (x), offset);
2789 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2796 /* Simplify_subreg can't handle some REG cases, but we have to. */
2798 HOST_WIDE_INT offset;
2800 regno = subreg_regno (x);
2801 if (subreg_lowpart_p (x))
2802 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
2804 offset = SUBREG_BYTE (x);
2805 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
2812 /* Do alter_subreg on all the SUBREGs contained in X. */
2815 walk_alter_subreg (rtx *xp, bool *changed)
2818 switch (GET_CODE (x))
2823 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
2824 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
2829 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
2834 return alter_subreg (xp);
2845 /* Given BODY, the body of a jump instruction, alter the jump condition
2846 as required by the bits that are set in cc_status.flags.
2847 Not all of the bits there can be handled at this level in all cases.
2849 The value is normally 0.
2850 1 means that the condition has become always true.
2851 -1 means that the condition has become always false.
2852 2 means that COND has been altered. */
2855 alter_cond (rtx cond)
2859 if (cc_status.flags & CC_REVERSED)
2862 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2865 if (cc_status.flags & CC_INVERTED)
2868 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
2871 if (cc_status.flags & CC_NOT_POSITIVE)
2872 switch (GET_CODE (cond))
2877 /* Jump becomes unconditional. */
2883 /* Jump becomes no-op. */
2887 PUT_CODE (cond, EQ);
2892 PUT_CODE (cond, NE);
2900 if (cc_status.flags & CC_NOT_NEGATIVE)
2901 switch (GET_CODE (cond))
2905 /* Jump becomes unconditional. */
2910 /* Jump becomes no-op. */
2915 PUT_CODE (cond, EQ);
2921 PUT_CODE (cond, NE);
2929 if (cc_status.flags & CC_NO_OVERFLOW)
2930 switch (GET_CODE (cond))
2933 /* Jump becomes unconditional. */
2937 PUT_CODE (cond, EQ);
2942 PUT_CODE (cond, NE);
2947 /* Jump becomes no-op. */
2954 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
2955 switch (GET_CODE (cond))
2961 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
2966 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
2971 if (cc_status.flags & CC_NOT_SIGNED)
2972 /* The flags are valid if signed condition operators are converted
2974 switch (GET_CODE (cond))
2977 PUT_CODE (cond, LEU);
2982 PUT_CODE (cond, LTU);
2987 PUT_CODE (cond, GTU);
2992 PUT_CODE (cond, GEU);
3004 /* Report inconsistency between the assembler template and the operands.
3005 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3008 output_operand_lossage (const char *cmsgid, ...)
3012 const char *pfx_str;
3015 va_start (ap, cmsgid);
3017 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3018 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
3019 vasprintf (&new_message, fmt_string, ap);
3021 if (this_is_asm_operands)
3022 error_for_asm (this_is_asm_operands, "%s", new_message);
3024 internal_error ("%s", new_message);
3031 /* Output of assembler code from a template, and its subroutines. */
3033 /* Annotate the assembly with a comment describing the pattern and
3034 alternative used. */
3037 output_asm_name (void)
3041 int num = INSN_CODE (debug_insn);
3042 fprintf (asm_out_file, "\t%s %d\t%s",
3043 ASM_COMMENT_START, INSN_UID (debug_insn),
3044 insn_data[num].name);
3045 if (insn_data[num].n_alternatives > 1)
3046 fprintf (asm_out_file, "/%d", which_alternative + 1);
3047 #ifdef HAVE_ATTR_length
3048 fprintf (asm_out_file, "\t[length = %d]",
3049 get_attr_length (debug_insn));
3051 /* Clear this so only the first assembler insn
3052 of any rtl insn will get the special comment for -dp. */
3057 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3058 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3059 corresponds to the address of the object and 0 if to the object. */
3062 get_mem_expr_from_op (rtx op, int *paddressp)
3070 return REG_EXPR (op);
3071 else if (!MEM_P (op))
3074 if (MEM_EXPR (op) != 0)
3075 return MEM_EXPR (op);
3077 /* Otherwise we have an address, so indicate it and look at the address. */
3081 /* First check if we have a decl for the address, then look at the right side
3082 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3083 But don't allow the address to itself be indirect. */
3084 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3086 else if (GET_CODE (op) == PLUS
3087 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3090 while (GET_RTX_CLASS (GET_CODE (op)) == RTX_UNARY
3091 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3094 expr = get_mem_expr_from_op (op, &inner_addressp);
3095 return inner_addressp ? 0 : expr;
3098 /* Output operand names for assembler instructions. OPERANDS is the
3099 operand vector, OPORDER is the order to write the operands, and NOPS
3100 is the number of operands to write. */
3103 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3108 for (i = 0; i < nops; i++)
3111 rtx op = operands[oporder[i]];
3112 tree expr = get_mem_expr_from_op (op, &addressp);
3114 fprintf (asm_out_file, "%c%s",
3115 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3119 fprintf (asm_out_file, "%s",
3120 addressp ? "*" : "");
3121 print_mem_expr (asm_out_file, expr);
3124 else if (REG_P (op) && ORIGINAL_REGNO (op)
3125 && ORIGINAL_REGNO (op) != REGNO (op))
3126 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3130 /* Output text from TEMPLATE to the assembler output file,
3131 obeying %-directions to substitute operands taken from
3132 the vector OPERANDS.
3134 %N (for N a digit) means print operand N in usual manner.
3135 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3136 and print the label name with no punctuation.
3137 %cN means require operand N to be a constant
3138 and print the constant expression with no punctuation.
3139 %aN means expect operand N to be a memory address
3140 (not a memory reference!) and print a reference
3142 %nN means expect operand N to be a constant
3143 and print a constant expression for minus the value
3144 of the operand, with no other punctuation. */
3147 output_asm_insn (const char *templ, rtx *operands)
3151 #ifdef ASSEMBLER_DIALECT
3154 int oporder[MAX_RECOG_OPERANDS];
3155 char opoutput[MAX_RECOG_OPERANDS];
3158 /* An insn may return a null string template
3159 in a case where no assembler code is needed. */
3163 memset (opoutput, 0, sizeof opoutput);
3165 putc ('\t', asm_out_file);
3167 #ifdef ASM_OUTPUT_OPCODE
3168 ASM_OUTPUT_OPCODE (asm_out_file, p);
3175 if (flag_verbose_asm)
3176 output_asm_operand_names (operands, oporder, ops);
3177 if (flag_print_asm_name)
3181 memset (opoutput, 0, sizeof opoutput);
3183 putc (c, asm_out_file);
3184 #ifdef ASM_OUTPUT_OPCODE
3185 while ((c = *p) == '\t')
3187 putc (c, asm_out_file);
3190 ASM_OUTPUT_OPCODE (asm_out_file, p);
3194 #ifdef ASSEMBLER_DIALECT
3200 output_operand_lossage ("nested assembly dialect alternatives");
3204 /* If we want the first dialect, do nothing. Otherwise, skip
3205 DIALECT_NUMBER of strings ending with '|'. */
3206 for (i = 0; i < dialect_number; i++)
3208 while (*p && *p != '}' && *p++ != '|')
3217 output_operand_lossage ("unterminated assembly dialect alternative");
3224 /* Skip to close brace. */
3229 output_operand_lossage ("unterminated assembly dialect alternative");
3233 while (*p++ != '}');
3237 putc (c, asm_out_file);
3242 putc (c, asm_out_file);
3248 /* %% outputs a single %. */
3252 putc (c, asm_out_file);
3254 /* %= outputs a number which is unique to each insn in the entire
3255 compilation. This is useful for making local labels that are
3256 referred to more than once in a given insn. */
3260 fprintf (asm_out_file, "%d", insn_counter);
3262 /* % followed by a letter and some digits
3263 outputs an operand in a special way depending on the letter.
3264 Letters `acln' are implemented directly.
3265 Other letters are passed to `output_operand' so that
3266 the PRINT_OPERAND macro can define them. */
3267 else if (ISALPHA (*p))
3270 unsigned long opnum;
3273 opnum = strtoul (p, &endptr, 10);
3276 output_operand_lossage ("operand number missing "
3278 else if (this_is_asm_operands && opnum >= insn_noperands)
3279 output_operand_lossage ("operand number out of range");
3280 else if (letter == 'l')
3281 output_asm_label (operands[opnum]);
3282 else if (letter == 'a')
3283 output_address (operands[opnum]);
3284 else if (letter == 'c')
3286 if (CONSTANT_ADDRESS_P (operands[opnum]))
3287 output_addr_const (asm_out_file, operands[opnum]);
3289 output_operand (operands[opnum], 'c');
3291 else if (letter == 'n')
3293 if (GET_CODE (operands[opnum]) == CONST_INT)
3294 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3295 - INTVAL (operands[opnum]));
3298 putc ('-', asm_out_file);
3299 output_addr_const (asm_out_file, operands[opnum]);
3303 output_operand (operands[opnum], letter);
3305 if (!opoutput[opnum])
3306 oporder[ops++] = opnum;
3307 opoutput[opnum] = 1;
3312 /* % followed by a digit outputs an operand the default way. */
3313 else if (ISDIGIT (*p))
3315 unsigned long opnum;
3318 opnum = strtoul (p, &endptr, 10);
3319 if (this_is_asm_operands && opnum >= insn_noperands)
3320 output_operand_lossage ("operand number out of range");
3322 output_operand (operands[opnum], 0);
3324 if (!opoutput[opnum])
3325 oporder[ops++] = opnum;
3326 opoutput[opnum] = 1;
3331 /* % followed by punctuation: output something for that
3332 punctuation character alone, with no operand.
3333 The PRINT_OPERAND macro decides what is actually done. */
3334 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3335 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p))
3336 output_operand (NULL_RTX, *p++);
3339 output_operand_lossage ("invalid %%-code");
3343 putc (c, asm_out_file);
3346 /* Write out the variable names for operands, if we know them. */
3347 if (flag_verbose_asm)
3348 output_asm_operand_names (operands, oporder, ops);
3349 if (flag_print_asm_name)
3352 putc ('\n', asm_out_file);
3355 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3358 output_asm_label (rtx x)
3362 if (GET_CODE (x) == LABEL_REF)
3366 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3367 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3369 output_operand_lossage ("'%%l' operand isn't a label");
3371 assemble_name (asm_out_file, buf);
3374 /* Helper rtx-iteration-function for mark_symbol_refs_as_used and
3375 output_operand. Marks SYMBOL_REFs as referenced through use of
3376 assemble_external. */
3379 mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED)
3383 /* If we have a used symbol, we may have to emit assembly
3384 annotations corresponding to whether the symbol is external, weak
3385 or has non-default visibility. */
3386 if (GET_CODE (x) == SYMBOL_REF)
3390 t = SYMBOL_REF_DECL (x);
3392 assemble_external (t);
3400 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3403 mark_symbol_refs_as_used (rtx x)
3405 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3408 /* Print operand X using machine-dependent assembler syntax.
3409 The macro PRINT_OPERAND is defined just to control this function.
3410 CODE is a non-digit that preceded the operand-number in the % spec,
3411 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3412 between the % and the digits.
3413 When CODE is a non-letter, X is 0.
3415 The meanings of the letters are machine-dependent and controlled
3416 by PRINT_OPERAND. */
3419 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3421 if (x && GET_CODE (x) == SUBREG)
3422 x = alter_subreg (&x);
3424 /* X must not be a pseudo reg. */
3425 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3427 PRINT_OPERAND (asm_out_file, x, code);
3432 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3435 /* Print a memory reference operand for address X
3436 using machine-dependent assembler syntax.
3437 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3440 output_address (rtx x)
3442 bool changed = false;
3443 walk_alter_subreg (&x, &changed);
3444 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3447 /* Print an integer constant expression in assembler syntax.
3448 Addition and subtraction are the only arithmetic
3449 that may appear in these expressions. */
3452 output_addr_const (FILE *file, rtx x)
3457 switch (GET_CODE (x))
3464 if (SYMBOL_REF_DECL (x))
3466 mark_decl_referenced (SYMBOL_REF_DECL (x));
3467 assemble_external (SYMBOL_REF_DECL (x));
3469 #ifdef ASM_OUTPUT_SYMBOL_REF
3470 ASM_OUTPUT_SYMBOL_REF (file, x);
3472 assemble_name (file, XSTR (x, 0));
3480 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3481 #ifdef ASM_OUTPUT_LABEL_REF
3482 ASM_OUTPUT_LABEL_REF (file, buf);
3484 assemble_name (file, buf);
3489 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3493 /* This used to output parentheses around the expression,
3494 but that does not work on the 386 (either ATT or BSD assembler). */
3495 output_addr_const (file, XEXP (x, 0));
3499 if (GET_MODE (x) == VOIDmode)
3501 /* We can use %d if the number is one word and positive. */
3502 if (CONST_DOUBLE_HIGH (x))
3503 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3504 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3505 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3506 else if (CONST_DOUBLE_LOW (x) < 0)
3507 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3508 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3510 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3513 /* We can't handle floating point constants;
3514 PRINT_OPERAND must handle them. */
3515 output_operand_lossage ("floating constant misused");
3519 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3520 (unsigned HOST_WIDE_INT) CONST_FIXED_VALUE_LOW (x));
3524 /* Some assemblers need integer constants to appear last (eg masm). */
3525 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3527 output_addr_const (file, XEXP (x, 1));
3528 if (INTVAL (XEXP (x, 0)) >= 0)
3529 fprintf (file, "+");
3530 output_addr_const (file, XEXP (x, 0));
3534 output_addr_const (file, XEXP (x, 0));
3535 if (GET_CODE (XEXP (x, 1)) != CONST_INT
3536 || INTVAL (XEXP (x, 1)) >= 0)
3537 fprintf (file, "+");
3538 output_addr_const (file, XEXP (x, 1));
3543 /* Avoid outputting things like x-x or x+5-x,
3544 since some assemblers can't handle that. */
3545 x = simplify_subtraction (x);
3546 if (GET_CODE (x) != MINUS)
3549 output_addr_const (file, XEXP (x, 0));
3550 fprintf (file, "-");
3551 if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0)
3552 || GET_CODE (XEXP (x, 1)) == PC
3553 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3554 output_addr_const (file, XEXP (x, 1));
3557 fputs (targetm.asm_out.open_paren, file);
3558 output_addr_const (file, XEXP (x, 1));
3559 fputs (targetm.asm_out.close_paren, file);
3567 output_addr_const (file, XEXP (x, 0));
3571 #ifdef OUTPUT_ADDR_CONST_EXTRA
3572 OUTPUT_ADDR_CONST_EXTRA (file, x, fail);
3577 output_operand_lossage ("invalid expression as operand");
3581 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3582 %R prints the value of REGISTER_PREFIX.
3583 %L prints the value of LOCAL_LABEL_PREFIX.
3584 %U prints the value of USER_LABEL_PREFIX.
3585 %I prints the value of IMMEDIATE_PREFIX.
3586 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3587 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3589 We handle alternate assembler dialects here, just like output_asm_insn. */
3592 asm_fprintf (FILE *file, const char *p, ...)
3598 va_start (argptr, p);
3605 #ifdef ASSEMBLER_DIALECT
3610 /* If we want the first dialect, do nothing. Otherwise, skip
3611 DIALECT_NUMBER of strings ending with '|'. */
3612 for (i = 0; i < dialect_number; i++)
3614 while (*p && *p++ != '|')
3624 /* Skip to close brace. */
3625 while (*p && *p++ != '}')
3636 while (strchr ("-+ #0", c))
3641 while (ISDIGIT (c) || c == '.')
3652 case 'd': case 'i': case 'u':
3653 case 'x': case 'X': case 'o':
3657 fprintf (file, buf, va_arg (argptr, int));
3661 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3662 'o' cases, but we do not check for those cases. It
3663 means that the value is a HOST_WIDE_INT, which may be
3664 either `long' or `long long'. */
3665 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
3666 q += strlen (HOST_WIDE_INT_PRINT);
3669 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3674 #ifdef HAVE_LONG_LONG
3680 fprintf (file, buf, va_arg (argptr, long long));
3687 fprintf (file, buf, va_arg (argptr, long));
3695 fprintf (file, buf, va_arg (argptr, char *));
3699 #ifdef ASM_OUTPUT_OPCODE
3700 ASM_OUTPUT_OPCODE (asm_out_file, p);
3705 #ifdef REGISTER_PREFIX
3706 fprintf (file, "%s", REGISTER_PREFIX);
3711 #ifdef IMMEDIATE_PREFIX
3712 fprintf (file, "%s", IMMEDIATE_PREFIX);
3717 #ifdef LOCAL_LABEL_PREFIX
3718 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3723 fputs (user_label_prefix, file);
3726 #ifdef ASM_FPRINTF_EXTENSIONS
3727 /* Uppercase letters are reserved for general use by asm_fprintf
3728 and so are not available to target specific code. In order to
3729 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3730 they are defined here. As they get turned into real extensions
3731 to asm_fprintf they should be removed from this list. */
3732 case 'A': case 'B': case 'C': case 'D': case 'E':
3733 case 'F': case 'G': case 'H': case 'J': case 'K':
3734 case 'M': case 'N': case 'P': case 'Q': case 'S':
3735 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3738 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3751 /* Split up a CONST_DOUBLE or integer constant rtx
3752 into two rtx's for single words,
3753 storing in *FIRST the word that comes first in memory in the target
3754 and in *SECOND the other. */
3757 split_double (rtx value, rtx *first, rtx *second)
3759 if (GET_CODE (value) == CONST_INT)
3761 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3763 /* In this case the CONST_INT holds both target words.
3764 Extract the bits from it into two word-sized pieces.
3765 Sign extend each half to HOST_WIDE_INT. */
3766 unsigned HOST_WIDE_INT low, high;
3767 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3769 /* Set sign_bit to the most significant bit of a word. */
3771 sign_bit <<= BITS_PER_WORD - 1;
3773 /* Set mask so that all bits of the word are set. We could
3774 have used 1 << BITS_PER_WORD instead of basing the
3775 calculation on sign_bit. However, on machines where
3776 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3777 compiler warning, even though the code would never be
3779 mask = sign_bit << 1;
3782 /* Set sign_extend as any remaining bits. */
3783 sign_extend = ~mask;
3785 /* Pick the lower word and sign-extend it. */
3786 low = INTVAL (value);
3791 /* Pick the higher word, shifted to the least significant
3792 bits, and sign-extend it. */
3793 high = INTVAL (value);
3794 high >>= BITS_PER_WORD - 1;
3797 if (high & sign_bit)
3798 high |= sign_extend;
3800 /* Store the words in the target machine order. */
3801 if (WORDS_BIG_ENDIAN)
3803 *first = GEN_INT (high);
3804 *second = GEN_INT (low);
3808 *first = GEN_INT (low);
3809 *second = GEN_INT (high);
3814 /* The rule for using CONST_INT for a wider mode
3815 is that we regard the value as signed.
3816 So sign-extend it. */
3817 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3818 if (WORDS_BIG_ENDIAN)
3830 else if (GET_CODE (value) != CONST_DOUBLE)
3832 if (WORDS_BIG_ENDIAN)
3834 *first = const0_rtx;
3840 *second = const0_rtx;
3843 else if (GET_MODE (value) == VOIDmode
3844 /* This is the old way we did CONST_DOUBLE integers. */
3845 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3847 /* In an integer, the words are defined as most and least significant.
3848 So order them by the target's convention. */
3849 if (WORDS_BIG_ENDIAN)
3851 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3852 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3856 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3857 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3864 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3866 /* Note, this converts the REAL_VALUE_TYPE to the target's
3867 format, splits up the floating point double and outputs
3868 exactly 32 bits of it into each of l[0] and l[1] --
3869 not necessarily BITS_PER_WORD bits. */
3870 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3872 /* If 32 bits is an entire word for the target, but not for the host,
3873 then sign-extend on the host so that the number will look the same
3874 way on the host that it would on the target. See for instance
3875 simplify_unary_operation. The #if is needed to avoid compiler
3878 #if HOST_BITS_PER_LONG > 32
3879 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
3881 if (l[0] & ((long) 1 << 31))
3882 l[0] |= ((long) (-1) << 32);
3883 if (l[1] & ((long) 1 << 31))
3884 l[1] |= ((long) (-1) << 32);
3888 *first = GEN_INT (l[0]);
3889 *second = GEN_INT (l[1]);
3893 /* Return nonzero if this function has no function calls. */
3896 leaf_function_p (void)
3901 if (crtl->profile || profile_arc_flag)
3904 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3907 && ! SIBLING_CALL_P (insn))
3909 if (NONJUMP_INSN_P (insn)
3910 && GET_CODE (PATTERN (insn)) == SEQUENCE
3911 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3912 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3915 for (link = crtl->epilogue_delay_list;
3917 link = XEXP (link, 1))
3919 insn = XEXP (link, 0);
3922 && ! SIBLING_CALL_P (insn))
3924 if (NONJUMP_INSN_P (insn)
3925 && GET_CODE (PATTERN (insn)) == SEQUENCE
3926 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3927 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3934 /* Return 1 if branch is a forward branch.
3935 Uses insn_shuid array, so it works only in the final pass. May be used by
3936 output templates to customary add branch prediction hints.
3939 final_forward_branch_p (rtx insn)
3941 int insn_id, label_id;
3943 gcc_assert (uid_shuid);
3944 insn_id = INSN_SHUID (insn);
3945 label_id = INSN_SHUID (JUMP_LABEL (insn));
3946 /* We've hit some insns that does not have id information available. */
3947 gcc_assert (insn_id && label_id);
3948 return insn_id < label_id;
3951 /* On some machines, a function with no call insns
3952 can run faster if it doesn't create its own register window.
3953 When output, the leaf function should use only the "output"
3954 registers. Ordinarily, the function would be compiled to use
3955 the "input" registers to find its arguments; it is a candidate
3956 for leaf treatment if it uses only the "input" registers.
3957 Leaf function treatment means renumbering so the function
3958 uses the "output" registers instead. */
3960 #ifdef LEAF_REGISTERS
3962 /* Return 1 if this function uses only the registers that can be
3963 safely renumbered. */
3966 only_leaf_regs_used (void)
3969 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
3971 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
3972 if ((df_regs_ever_live_p (i) || global_regs[i])
3973 && ! permitted_reg_in_leaf_functions[i])
3976 if (crtl->uses_pic_offset_table
3977 && pic_offset_table_rtx != 0
3978 && REG_P (pic_offset_table_rtx)
3979 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
3985 /* Scan all instructions and renumber all registers into those
3986 available in leaf functions. */
3989 leaf_renumber_regs (rtx first)
3993 /* Renumber only the actual patterns.
3994 The reg-notes can contain frame pointer refs,
3995 and renumbering them could crash, and should not be needed. */
3996 for (insn = first; insn; insn = NEXT_INSN (insn))
3998 leaf_renumber_regs_insn (PATTERN (insn));
3999 for (insn = crtl->epilogue_delay_list;
4001 insn = XEXP (insn, 1))
4002 if (INSN_P (XEXP (insn, 0)))
4003 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
4006 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4007 available in leaf functions. */
4010 leaf_renumber_regs_insn (rtx in_rtx)
4013 const char *format_ptr;
4018 /* Renumber all input-registers into output-registers.
4019 renumbered_regs would be 1 for an output-register;
4026 /* Don't renumber the same reg twice. */
4030 newreg = REGNO (in_rtx);
4031 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4032 to reach here as part of a REG_NOTE. */
4033 if (newreg >= FIRST_PSEUDO_REGISTER)
4038 newreg = LEAF_REG_REMAP (newreg);
4039 gcc_assert (newreg >= 0);
4040 df_set_regs_ever_live (REGNO (in_rtx), false);
4041 df_set_regs_ever_live (newreg, true);
4042 SET_REGNO (in_rtx, newreg);
4046 if (INSN_P (in_rtx))
4048 /* Inside a SEQUENCE, we find insns.
4049 Renumber just the patterns of these insns,
4050 just as we do for the top-level insns. */
4051 leaf_renumber_regs_insn (PATTERN (in_rtx));
4055 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4057 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4058 switch (*format_ptr++)
4061 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4065 if (NULL != XVEC (in_rtx, i))
4067 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4068 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4088 /* When -gused is used, emit debug info for only used symbols. But in
4089 addition to the standard intercepted debug_hooks there are some direct
4090 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
4091 Those routines may also be called from a higher level intercepted routine. So
4092 to prevent recording data for an inner call to one of these for an intercept,
4093 we maintain an intercept nesting counter (debug_nesting). We only save the
4094 intercepted arguments if the nesting is 1. */
4095 int debug_nesting = 0;
4097 static tree *symbol_queue;
4098 int symbol_queue_index = 0;
4099 static int symbol_queue_size = 0;
4101 /* Generate the symbols for any queued up type symbols we encountered
4102 while generating the type info for some originally used symbol.
4103 This might generate additional entries in the queue. Only when
4104 the nesting depth goes to 0 is this routine called. */
4107 debug_flush_symbol_queue (void)
4111 /* Make sure that additionally queued items are not flushed
4116 for (i = 0; i < symbol_queue_index; ++i)
4118 /* If we pushed queued symbols then such symbols must be
4119 output no matter what anyone else says. Specifically,
4120 we need to make sure dbxout_symbol() thinks the symbol was
4121 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
4122 which may be set for outside reasons. */
4123 int saved_tree_used = TREE_USED (symbol_queue[i]);
4124 int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]);
4125 TREE_USED (symbol_queue[i]) = 1;
4126 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0;
4128 #ifdef DBX_DEBUGGING_INFO
4129 dbxout_symbol (symbol_queue[i], 0);
4132 TREE_USED (symbol_queue[i]) = saved_tree_used;
4133 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug;
4136 symbol_queue_index = 0;
4140 /* Queue a type symbol needed as part of the definition of a decl
4141 symbol. These symbols are generated when debug_flush_symbol_queue()
4145 debug_queue_symbol (tree decl)
4147 if (symbol_queue_index >= symbol_queue_size)
4149 symbol_queue_size += 10;
4150 symbol_queue = XRESIZEVEC (tree, symbol_queue, symbol_queue_size);
4153 symbol_queue[symbol_queue_index++] = decl;
4156 /* Free symbol queue. */
4158 debug_free_queue (void)
4162 free (symbol_queue);
4163 symbol_queue = NULL;
4164 symbol_queue_size = 0;
4168 /* Turn the RTL into assembly. */
4170 rest_of_handle_final (void)
4175 /* Get the function's name, as described by its RTL. This may be
4176 different from the DECL_NAME name used in the source file. */
4178 x = DECL_RTL (current_function_decl);
4179 gcc_assert (MEM_P (x));
4181 gcc_assert (GET_CODE (x) == SYMBOL_REF);
4182 fnname = XSTR (x, 0);
4184 assemble_start_function (current_function_decl, fnname);
4185 final_start_function (get_insns (), asm_out_file, optimize);
4186 final (get_insns (), asm_out_file, optimize);
4187 final_end_function ();
4189 #ifdef TARGET_UNWIND_INFO
4190 /* ??? The IA-64 ".handlerdata" directive must be issued before
4191 the ".endp" directive that closes the procedure descriptor. */
4192 output_function_exception_table (fnname);
4195 assemble_end_function (current_function_decl, fnname);
4197 #ifndef TARGET_UNWIND_INFO
4198 /* Otherwise, it feels unclean to switch sections in the middle. */
4199 output_function_exception_table (fnname);
4202 user_defined_section_attribute = false;
4204 /* Free up reg info memory. */
4208 fflush (asm_out_file);
4210 /* Write DBX symbols if requested. */
4212 /* Note that for those inline functions where we don't initially
4213 know for certain that we will be generating an out-of-line copy,
4214 the first invocation of this routine (rest_of_compilation) will
4215 skip over this code by doing a `goto exit_rest_of_compilation;'.
4216 Later on, wrapup_global_declarations will (indirectly) call
4217 rest_of_compilation again for those inline functions that need
4218 to have out-of-line copies generated. During that call, we
4219 *will* be routed past here. */
4221 timevar_push (TV_SYMOUT);
4222 (*debug_hooks->function_decl) (current_function_decl);
4223 timevar_pop (TV_SYMOUT);
4225 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4226 DECL_INITIAL (current_function_decl) = error_mark_node;
4228 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4229 && targetm.have_ctors_dtors)
4230 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4231 decl_init_priority_lookup
4232 (current_function_decl));
4233 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4234 && targetm.have_ctors_dtors)
4235 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4236 decl_fini_priority_lookup
4237 (current_function_decl));
4241 struct rtl_opt_pass pass_final =
4247 rest_of_handle_final, /* execute */
4250 0, /* static_pass_number */
4251 TV_FINAL, /* tv_id */
4252 0, /* properties_required */
4253 0, /* properties_provided */
4254 0, /* properties_destroyed */
4255 0, /* todo_flags_start */
4256 TODO_ggc_collect /* todo_flags_finish */
4262 rest_of_handle_shorten_branches (void)
4264 /* Shorten branches. */
4265 shorten_branches (get_insns ());
4269 struct rtl_opt_pass pass_shorten_branches =
4273 "shorten", /* name */
4275 rest_of_handle_shorten_branches, /* execute */
4278 0, /* static_pass_number */
4279 TV_FINAL, /* tv_id */
4280 0, /* properties_required */
4281 0, /* properties_provided */
4282 0, /* properties_destroyed */
4283 0, /* todo_flags_start */
4284 TODO_dump_func /* todo_flags_finish */
4290 rest_of_clean_state (void)
4294 /* It is very important to decompose the RTL instruction chain here:
4295 debug information keeps pointing into CODE_LABEL insns inside the function
4296 body. If these remain pointing to the other insns, we end up preserving
4297 whole RTL chain and attached detailed debug info in memory. */
4298 for (insn = get_insns (); insn; insn = next)
4300 next = NEXT_INSN (insn);
4301 NEXT_INSN (insn) = NULL;
4302 PREV_INSN (insn) = NULL;
4305 /* In case the function was not output,
4306 don't leave any temporary anonymous types
4307 queued up for sdb output. */
4308 #ifdef SDB_DEBUGGING_INFO
4309 if (write_symbols == SDB_DEBUG)
4310 sdbout_types (NULL_TREE);
4313 flag_rerun_cse_after_global_opts = 0;
4314 reload_completed = 0;
4315 epilogue_completed = 0;
4317 regstack_completed = 0;
4320 /* Clear out the insn_length contents now that they are no
4322 init_insn_lengths ();
4324 /* Show no temporary slots allocated. */
4327 free_bb_for_insn ();
4329 if (targetm.binds_local_p (current_function_decl))
4331 unsigned int pref = crtl->preferred_stack_boundary;
4332 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4333 pref = crtl->stack_alignment_needed;
4334 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4338 /* Make sure volatile mem refs aren't considered valid operands for
4339 arithmetic insns. We must call this here if this is a nested inline
4340 function, since the above code leaves us in the init_recog state,
4341 and the function context push/pop code does not save/restore volatile_ok.
4343 ??? Maybe it isn't necessary for expand_start_function to call this
4344 anymore if we do it here? */
4346 init_recog_no_volatile ();
4348 /* We're done with this function. Free up memory if we can. */
4349 free_after_parsing (cfun);
4350 free_after_compilation (cfun);
4354 struct rtl_opt_pass pass_clean_state =
4360 rest_of_clean_state, /* execute */
4363 0, /* static_pass_number */
4364 TV_FINAL, /* tv_id */
4365 0, /* properties_required */
4366 0, /* properties_provided */
4367 PROP_rtl, /* properties_destroyed */
4368 0, /* todo_flags_start */
4369 0 /* todo_flags_finish */