1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 /* Commonly used modes. */
60 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
61 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
62 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
63 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
66 /* This is *not* reset after each function. It gives each CODE_LABEL
67 in the entire compilation a unique label number. */
69 static int label_num = 1;
71 /* Highest label number in current function.
72 Zero means use the value of label_num instead.
73 This is nonzero only when belatedly compiling an inline function. */
75 static int last_label_num;
77 /* Value label_num had when set_new_first_and_last_label_number was called.
78 If label_num has not changed since then, last_label_num is valid. */
80 static int base_label_num;
82 /* Nonzero means do not generate NOTEs for source line numbers. */
84 static int no_line_numbers;
86 /* Commonly used rtx's, so that we only need space for one copy.
87 These are initialized once for the entire compilation.
88 All of these except perhaps the floating-point CONST_DOUBLEs
89 are unique; no other rtx-object will be equal to any of these. */
91 rtx global_rtl[GR_MAX];
93 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
94 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
95 record a copy of const[012]_rtx. */
97 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
101 REAL_VALUE_TYPE dconst0;
102 REAL_VALUE_TYPE dconst1;
103 REAL_VALUE_TYPE dconst2;
104 REAL_VALUE_TYPE dconstm1;
106 /* All references to the following fixed hard registers go through
107 these unique rtl objects. On machines where the frame-pointer and
108 arg-pointer are the same register, they use the same unique object.
110 After register allocation, other rtl objects which used to be pseudo-regs
111 may be clobbered to refer to the frame-pointer register.
112 But references that were originally to the frame-pointer can be
113 distinguished from the others because they contain frame_pointer_rtx.
115 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
116 tricky: until register elimination has taken place hard_frame_pointer_rtx
117 should be used if it is being set, and frame_pointer_rtx otherwise. After
118 register elimination hard_frame_pointer_rtx should always be used.
119 On machines where the two registers are same (most) then these are the
122 In an inline procedure, the stack and frame pointer rtxs may not be
123 used for anything else. */
124 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
125 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
126 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
127 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
128 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
130 /* This is used to implement __builtin_return_address for some machines.
131 See for instance the MIPS port. */
132 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
134 /* We make one copy of (const_int C) where C is in
135 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
136 to save space during the compilation and simplify comparisons of
139 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
141 /* A hash table storing CONST_INTs whose absolute value is greater
142 than MAX_SAVED_CONST_INT. */
144 static htab_t const_int_htab;
146 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
147 shortly thrown away. We use two mechanisms to prevent this waste:
149 For sizes up to 5 elements, we keep a SEQUENCE and its associated
150 rtvec for use by gen_sequence. One entry for each size is
151 sufficient because most cases are calls to gen_sequence followed by
152 immediately emitting the SEQUENCE. Reuse is safe since emitting a
153 sequence is destructive on the insn in it anyway and hence can't be
156 We do not bother to save this cached data over nested function calls.
157 Instead, we just reinitialize them. */
159 #define SEQUENCE_RESULT_SIZE 5
161 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
163 /* During RTL generation, we also keep a list of free INSN rtl codes. */
164 static rtx free_insn;
166 #define first_insn (cfun->emit->x_first_insn)
167 #define last_insn (cfun->emit->x_last_insn)
168 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
169 #define last_linenum (cfun->emit->x_last_linenum)
170 #define last_filename (cfun->emit->x_last_filename)
171 #define first_label_num (cfun->emit->x_first_label_num)
173 static rtx make_jump_insn_raw PARAMS ((rtx));
174 static rtx make_call_insn_raw PARAMS ((rtx));
175 static rtx find_line_note PARAMS ((rtx));
176 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
177 static void unshare_all_rtl_1 PARAMS ((rtx));
178 static void unshare_all_decls PARAMS ((tree));
179 static void reset_used_decls PARAMS ((tree));
180 static void mark_label_nuses PARAMS ((rtx));
181 static hashval_t const_int_htab_hash PARAMS ((const void *));
182 static int const_int_htab_eq PARAMS ((const void *,
184 static int rtx_htab_mark_1 PARAMS ((void **, void *));
185 static void rtx_htab_mark PARAMS ((void *));
188 /* Returns a hash code for X (which is a really a CONST_INT). */
191 const_int_htab_hash (x)
194 return (hashval_t) INTVAL ((const struct rtx_def *) x);
197 /* Returns non-zero if the value represented by X (which is really a
198 CONST_INT) is the same as that given by Y (which is really a
202 const_int_htab_eq (x, y)
206 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
209 /* Mark the hash-table element X (which is really a pointer to an
213 rtx_htab_mark_1 (x, data)
215 void *data ATTRIBUTE_UNUSED;
221 /* Mark all the elements of HTAB (which is really an htab_t full of
228 htab_traverse (*((htab_t *) htab), rtx_htab_mark_1, NULL);
231 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
232 don't attempt to share with the various global pieces of rtl (such as
233 frame_pointer_rtx). */
236 gen_raw_REG (mode, regno)
237 enum machine_mode mode;
240 rtx x = gen_rtx_raw_REG (mode, regno);
241 ORIGINAL_REGNO (x) = regno;
245 /* There are some RTL codes that require special attention; the generation
246 functions do the raw handling. If you add to this list, modify
247 special_rtx in gengenrtl.c as well. */
250 gen_rtx_CONST_INT (mode, arg)
251 enum machine_mode mode ATTRIBUTE_UNUSED;
256 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
257 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
259 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
260 if (const_true_rtx && arg == STORE_FLAG_VALUE)
261 return const_true_rtx;
264 /* Look up the CONST_INT in the hash table. */
265 slot = htab_find_slot_with_hash (const_int_htab, &arg,
266 (hashval_t) arg, INSERT);
268 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
273 /* CONST_DOUBLEs needs special handling because their length is known
277 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
278 enum machine_mode mode;
280 HOST_WIDE_INT arg1, arg2;
282 rtx r = rtx_alloc (CONST_DOUBLE);
287 X0EXP (r, 1) = NULL_RTX;
291 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
298 gen_rtx_REG (mode, regno)
299 enum machine_mode mode;
302 /* In case the MD file explicitly references the frame pointer, have
303 all such references point to the same frame pointer. This is
304 used during frame pointer elimination to distinguish the explicit
305 references to these registers from pseudos that happened to be
308 If we have eliminated the frame pointer or arg pointer, we will
309 be using it as a normal register, for example as a spill
310 register. In such cases, we might be accessing it in a mode that
311 is not Pmode and therefore cannot use the pre-allocated rtx.
313 Also don't do this when we are making new REGs in reload, since
314 we don't want to get confused with the real pointers. */
316 if (mode == Pmode && !reload_in_progress)
318 if (regno == FRAME_POINTER_REGNUM)
319 return frame_pointer_rtx;
320 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
321 if (regno == HARD_FRAME_POINTER_REGNUM)
322 return hard_frame_pointer_rtx;
324 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
325 if (regno == ARG_POINTER_REGNUM)
326 return arg_pointer_rtx;
328 #ifdef RETURN_ADDRESS_POINTER_REGNUM
329 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
330 return return_address_pointer_rtx;
332 if (regno == STACK_POINTER_REGNUM)
333 return stack_pointer_rtx;
336 return gen_raw_REG (mode, regno);
340 gen_rtx_MEM (mode, addr)
341 enum machine_mode mode;
344 rtx rt = gen_rtx_raw_MEM (mode, addr);
346 /* This field is not cleared by the mere allocation of the rtx, so
348 MEM_ALIAS_SET (rt) = 0;
354 gen_rtx_SUBREG (mode, reg, offset)
355 enum machine_mode mode;
359 /* This is the most common failure type.
360 Catch it early so we can see who does it. */
361 if ((offset % GET_MODE_SIZE (mode)) != 0)
364 /* This check isn't usable right now because combine will
365 throw arbitrary crap like a CALL into a SUBREG in
366 gen_lowpart_for_combine so we must just eat it. */
368 /* Check for this too. */
369 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
372 return gen_rtx_fmt_ei (SUBREG, mode, reg, offset);
375 /* Generate a SUBREG representing the least-significant part
376 * of REG if MODE is smaller than mode of REG, otherwise
377 * paradoxical SUBREG. */
379 gen_lowpart_SUBREG (mode, reg)
380 enum machine_mode mode;
383 enum machine_mode inmode;
385 inmode = GET_MODE (reg);
386 if (inmode == VOIDmode)
388 return gen_rtx_SUBREG (mode, reg,
389 subreg_lowpart_offset (mode, inmode));
392 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
394 ** This routine generates an RTX of the size specified by
395 ** <code>, which is an RTX code. The RTX structure is initialized
396 ** from the arguments <element1> through <elementn>, which are
397 ** interpreted according to the specific RTX type's format. The
398 ** special machine mode associated with the rtx (if any) is specified
401 ** gen_rtx can be invoked in a way which resembles the lisp-like
402 ** rtx it will generate. For example, the following rtx structure:
404 ** (plus:QI (mem:QI (reg:SI 1))
405 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
407 ** ...would be generated by the following C code:
409 ** gen_rtx (PLUS, QImode,
410 ** gen_rtx (MEM, QImode,
411 ** gen_rtx (REG, SImode, 1)),
412 ** gen_rtx (MEM, QImode,
413 ** gen_rtx (PLUS, SImode,
414 ** gen_rtx (REG, SImode, 2),
415 ** gen_rtx (REG, SImode, 3)))),
420 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
422 #ifndef ANSI_PROTOTYPES
424 enum machine_mode mode;
427 register int i; /* Array indices... */
428 register const char *fmt; /* Current rtx's format... */
429 register rtx rt_val; /* RTX to return to caller... */
433 #ifndef ANSI_PROTOTYPES
434 code = va_arg (p, enum rtx_code);
435 mode = va_arg (p, enum machine_mode);
441 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
446 rtx arg0 = va_arg (p, rtx);
447 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
448 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
449 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
454 rt_val = gen_rtx_REG (mode, va_arg (p, int));
458 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
462 rt_val = rtx_alloc (code); /* Allocate the storage space. */
463 rt_val->mode = mode; /* Store the machine mode... */
465 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
466 for (i = 0; i < GET_RTX_LENGTH (code); i++)
470 case '0': /* Unused field. */
473 case 'i': /* An integer? */
474 XINT (rt_val, i) = va_arg (p, int);
477 case 'w': /* A wide integer? */
478 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
481 case 's': /* A string? */
482 XSTR (rt_val, i) = va_arg (p, char *);
485 case 'e': /* An expression? */
486 case 'u': /* An insn? Same except when printing. */
487 XEXP (rt_val, i) = va_arg (p, rtx);
490 case 'E': /* An RTX vector? */
491 XVEC (rt_val, i) = va_arg (p, rtvec);
494 case 'b': /* A bitmap? */
495 XBITMAP (rt_val, i) = va_arg (p, bitmap);
498 case 't': /* A tree? */
499 XTREE (rt_val, i) = va_arg (p, tree);
513 /* gen_rtvec (n, [rt1, ..., rtn])
515 ** This routine creates an rtvec and stores within it the
516 ** pointers to rtx's which are its arguments.
521 gen_rtvec VPARAMS ((int n, ...))
523 #ifndef ANSI_PROTOTYPES
532 #ifndef ANSI_PROTOTYPES
537 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
539 vector = (rtx *) alloca (n * sizeof (rtx));
541 for (i = 0; i < n; i++)
542 vector[i] = va_arg (p, rtx);
545 return gen_rtvec_v (n, vector);
549 gen_rtvec_v (n, argp)
554 register rtvec rt_val;
557 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
559 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
561 for (i = 0; i < n; i++)
562 rt_val->elem[i] = *argp++;
568 /* Generate a REG rtx for a new pseudo register of mode MODE.
569 This pseudo is assigned the next sequential register number. */
573 enum machine_mode mode;
575 struct function *f = cfun;
578 /* Don't let anything called after initial flow analysis create new
583 if (generating_concat_p
584 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
585 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
587 /* For complex modes, don't make a single pseudo.
588 Instead, make a CONCAT of two pseudos.
589 This allows noncontiguous allocation of the real and imaginary parts,
590 which makes much better code. Besides, allocating DCmode
591 pseudos overstrains reload on some machines like the 386. */
592 rtx realpart, imagpart;
593 int size = GET_MODE_UNIT_SIZE (mode);
594 enum machine_mode partmode
595 = mode_for_size (size * BITS_PER_UNIT,
596 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
597 ? MODE_FLOAT : MODE_INT),
600 realpart = gen_reg_rtx (partmode);
601 imagpart = gen_reg_rtx (partmode);
602 return gen_rtx_CONCAT (mode, realpart, imagpart);
605 /* Make sure regno_pointer_align and regno_reg_rtx are large enough
606 to have an element for this pseudo reg number. */
608 if (reg_rtx_no == f->emit->regno_pointer_align_length)
610 int old_size = f->emit->regno_pointer_align_length;
613 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
614 memset (new + old_size, 0, old_size);
615 f->emit->regno_pointer_align = (unsigned char *) new;
617 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
618 old_size * 2 * sizeof (rtx));
619 memset (new1 + old_size, 0, old_size * sizeof (rtx));
620 regno_reg_rtx = new1;
622 f->emit->regno_pointer_align_length = old_size * 2;
625 val = gen_raw_REG (mode, reg_rtx_no);
626 regno_reg_rtx[reg_rtx_no++] = val;
630 /* Identify REG (which may be a CONCAT) as a user register. */
636 if (GET_CODE (reg) == CONCAT)
638 REG_USERVAR_P (XEXP (reg, 0)) = 1;
639 REG_USERVAR_P (XEXP (reg, 1)) = 1;
641 else if (GET_CODE (reg) == REG)
642 REG_USERVAR_P (reg) = 1;
647 /* Identify REG as a probable pointer register and show its alignment
648 as ALIGN, if nonzero. */
651 mark_reg_pointer (reg, align)
655 if (! REG_POINTER (reg))
657 REG_POINTER (reg) = 1;
660 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
662 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
663 /* We can no-longer be sure just how aligned this pointer is */
664 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
667 /* Return 1 plus largest pseudo reg number used in the current function. */
675 /* Return 1 + the largest label number used so far in the current function. */
680 if (last_label_num && label_num == base_label_num)
681 return last_label_num;
685 /* Return first label number used in this function (if any were used). */
688 get_first_label_num ()
690 return first_label_num;
693 /* Return the final regno of X, which is a SUBREG of a hard
696 subreg_hard_regno (x, check_mode)
700 enum machine_mode mode = GET_MODE (x);
701 unsigned int byte_offset, base_regno, final_regno;
702 rtx reg = SUBREG_REG (x);
704 /* This is where we attempt to catch illegal subregs
705 created by the compiler. */
706 if (GET_CODE (x) != SUBREG
707 || GET_CODE (reg) != REG)
709 base_regno = REGNO (reg);
710 if (base_regno >= FIRST_PSEUDO_REGISTER)
712 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
715 /* Catch non-congruent offsets too. */
716 byte_offset = SUBREG_BYTE (x);
717 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
720 final_regno = subreg_regno (x);
725 /* Return a value representing some low-order bits of X, where the number
726 of low-order bits is given by MODE. Note that no conversion is done
727 between floating-point and fixed-point values, rather, the bit
728 representation is returned.
730 This function handles the cases in common between gen_lowpart, below,
731 and two variants in cse.c and combine.c. These are the cases that can
732 be safely handled at all points in the compilation.
734 If this is not a case we can handle, return 0. */
737 gen_lowpart_common (mode, x)
738 enum machine_mode mode;
741 int msize = GET_MODE_SIZE (mode);
742 int xsize = GET_MODE_SIZE (GET_MODE (x));
745 if (GET_MODE (x) == mode)
748 /* MODE must occupy no more words than the mode of X. */
749 if (GET_MODE (x) != VOIDmode
750 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
751 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
754 offset = subreg_lowpart_offset (mode, GET_MODE (x));
756 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
757 && (GET_MODE_CLASS (mode) == MODE_INT
758 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
760 /* If we are getting the low-order part of something that has been
761 sign- or zero-extended, we can either just use the object being
762 extended or make a narrower extension. If we want an even smaller
763 piece than the size of the object being extended, call ourselves
766 This case is used mostly by combine and cse. */
768 if (GET_MODE (XEXP (x, 0)) == mode)
770 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
771 return gen_lowpart_common (mode, XEXP (x, 0));
772 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
773 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
775 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG || GET_CODE (x) == CONCAT)
776 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
777 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
778 from the low-order part of the constant. */
779 else if ((GET_MODE_CLASS (mode) == MODE_INT
780 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
781 && GET_MODE (x) == VOIDmode
782 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
784 /* If MODE is twice the host word size, X is already the desired
785 representation. Otherwise, if MODE is wider than a word, we can't
786 do this. If MODE is exactly a word, return just one CONST_INT. */
788 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
790 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
792 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
793 return (GET_CODE (x) == CONST_INT ? x
794 : GEN_INT (CONST_DOUBLE_LOW (x)));
797 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
798 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
799 : CONST_DOUBLE_LOW (x));
801 /* Sign extend to HOST_WIDE_INT. */
802 val = trunc_int_for_mode (val, mode);
804 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
809 #ifndef REAL_ARITHMETIC
810 /* If X is an integral constant but we want it in floating-point, it
811 must be the case that we have a union of an integer and a floating-point
812 value. If the machine-parameters allow it, simulate that union here
813 and return the result. The two-word and single-word cases are
816 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
817 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
818 || flag_pretend_float)
819 && GET_MODE_CLASS (mode) == MODE_FLOAT
820 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
821 && GET_CODE (x) == CONST_INT
822 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
824 union {HOST_WIDE_INT i; float d; } u;
827 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
829 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
830 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
831 || flag_pretend_float)
832 && GET_MODE_CLASS (mode) == MODE_FLOAT
833 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
834 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
835 && GET_MODE (x) == VOIDmode
836 && (sizeof (double) * HOST_BITS_PER_CHAR
837 == 2 * HOST_BITS_PER_WIDE_INT))
839 union {HOST_WIDE_INT i[2]; double d; } u;
840 HOST_WIDE_INT low, high;
842 if (GET_CODE (x) == CONST_INT)
843 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
845 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
847 #ifdef HOST_WORDS_BIG_ENDIAN
848 u.i[0] = high, u.i[1] = low;
850 u.i[0] = low, u.i[1] = high;
853 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
856 /* Similarly, if this is converting a floating-point value into a
857 single-word integer. Only do this is the host and target parameters are
860 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
861 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
862 || flag_pretend_float)
863 && (GET_MODE_CLASS (mode) == MODE_INT
864 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
865 && GET_CODE (x) == CONST_DOUBLE
866 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
867 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
868 return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x));
870 /* Similarly, if this is converting a floating-point value into a
871 two-word integer, we can do this one word at a time and make an
872 integer. Only do this is the host and target parameters are
875 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
876 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
877 || flag_pretend_float)
878 && (GET_MODE_CLASS (mode) == MODE_INT
879 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
880 && GET_CODE (x) == CONST_DOUBLE
881 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
882 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
884 rtx lowpart, highpart;
886 lowpart = constant_subword (x,
887 (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN,
889 highpart = constant_subword (x,
890 (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN),
892 if (lowpart && GET_CODE (lowpart) == CONST_INT
893 && highpart && GET_CODE (highpart) == CONST_INT)
894 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
896 #else /* ifndef REAL_ARITHMETIC */
898 /* When we have a FP emulator, we can handle all conversions between
899 FP and integer operands. This simplifies reload because it
900 doesn't have to deal with constructs like (subreg:DI
901 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
903 else if (mode == SFmode
904 && GET_CODE (x) == CONST_INT)
910 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
911 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
913 else if (mode == DFmode
914 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
915 && GET_MODE (x) == VOIDmode)
919 HOST_WIDE_INT low, high;
921 if (GET_CODE (x) == CONST_INT)
924 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
928 low = CONST_DOUBLE_LOW (x);
929 high = CONST_DOUBLE_HIGH (x);
932 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
934 if (WORDS_BIG_ENDIAN)
935 i[0] = high, i[1] = low;
937 i[0] = low, i[1] = high;
939 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
940 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
942 else if ((GET_MODE_CLASS (mode) == MODE_INT
943 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
944 && GET_CODE (x) == CONST_DOUBLE
945 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
948 long i[4]; /* Only the low 32 bits of each 'long' are used. */
949 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
951 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
952 switch (GET_MODE (x))
955 REAL_VALUE_TO_TARGET_SINGLE (r, i[endian]);
959 REAL_VALUE_TO_TARGET_DOUBLE (r, i);
961 #if LONG_DOUBLE_TYPE_SIZE == 96
963 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
967 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
974 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
976 #if HOST_BITS_PER_WIDE_INT == 32
977 return immed_double_const (i[endian], i[1 - endian], mode);
982 if (HOST_BITS_PER_WIDE_INT != 64)
985 for (c = 0; c < 4; c++)
988 switch (GET_MODE (x))
992 return immed_double_const (((unsigned long) i[endian]) |
993 (((HOST_WIDE_INT) i[1-endian]) << 32),
996 return immed_double_const (((unsigned long) i[endian*3]) |
997 (((HOST_WIDE_INT) i[1+endian]) << 32),
998 ((unsigned long) i[2-endian]) |
999 (((HOST_WIDE_INT) i[3-endian*3]) << 32),
1005 #endif /* ifndef REAL_ARITHMETIC */
1007 /* Otherwise, we can't do this. */
1011 /* Return the real part (which has mode MODE) of a complex value X.
1012 This always comes at the low address in memory. */
1015 gen_realpart (mode, x)
1016 enum machine_mode mode;
1019 if (WORDS_BIG_ENDIAN
1020 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1022 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1024 ("Can't access real part of complex value in hard register");
1025 else if (WORDS_BIG_ENDIAN)
1026 return gen_highpart (mode, x);
1028 return gen_lowpart (mode, x);
1031 /* Return the imaginary part (which has mode MODE) of a complex value X.
1032 This always comes at the high address in memory. */
1035 gen_imagpart (mode, x)
1036 enum machine_mode mode;
1039 if (WORDS_BIG_ENDIAN)
1040 return gen_lowpart (mode, x);
1041 else if (! WORDS_BIG_ENDIAN
1042 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1044 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1046 ("can't access imaginary part of complex value in hard register");
1048 return gen_highpart (mode, x);
1051 /* Return 1 iff X, assumed to be a SUBREG,
1052 refers to the real part of the complex value in its containing reg.
1053 Complex values are always stored with the real part in the first word,
1054 regardless of WORDS_BIG_ENDIAN. */
1057 subreg_realpart_p (x)
1060 if (GET_CODE (x) != SUBREG)
1063 return ((unsigned int) SUBREG_BYTE (x)
1064 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1067 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1068 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1069 least-significant part of X.
1070 MODE specifies how big a part of X to return;
1071 it usually should not be larger than a word.
1072 If X is a MEM whose address is a QUEUED, the value may be so also. */
1075 gen_lowpart (mode, x)
1076 enum machine_mode mode;
1079 rtx result = gen_lowpart_common (mode, x);
1083 else if (GET_CODE (x) == REG)
1085 /* Must be a hard reg that's not valid in MODE. */
1086 result = gen_lowpart_common (mode, copy_to_reg (x));
1091 else if (GET_CODE (x) == MEM)
1093 /* The only additional case we can do is MEM. */
1094 register int offset = 0;
1095 if (WORDS_BIG_ENDIAN)
1096 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1097 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1099 if (BYTES_BIG_ENDIAN)
1100 /* Adjust the address so that the address-after-the-data
1102 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1103 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1105 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1107 else if (GET_CODE (x) == ADDRESSOF)
1108 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1113 /* Like `gen_lowpart', but refer to the most significant part.
1114 This is used to access the imaginary part of a complex number. */
1117 gen_highpart (mode, x)
1118 enum machine_mode mode;
1121 unsigned int msize = GET_MODE_SIZE (mode);
1124 /* This case loses if X is a subreg. To catch bugs early,
1125 complain if an invalid MODE is used even in other cases. */
1126 if (msize > UNITS_PER_WORD
1127 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1130 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1131 subreg_highpart_offset (mode, GET_MODE (x)));
1136 /* Return offset in bytes to get OUTERMODE low part
1137 of the value in mode INNERMODE stored in memory in target format. */
1140 subreg_lowpart_offset (outermode, innermode)
1141 enum machine_mode outermode, innermode;
1143 unsigned int offset = 0;
1144 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1148 if (WORDS_BIG_ENDIAN)
1149 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1150 if (BYTES_BIG_ENDIAN)
1151 offset += difference % UNITS_PER_WORD;
1157 /* Return offset in bytes to get OUTERMODE high part
1158 of the value in mode INNERMODE stored in memory in target format. */
1160 subreg_highpart_offset (outermode, innermode)
1161 enum machine_mode outermode, innermode;
1163 unsigned int offset = 0;
1164 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1166 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1171 if (! WORDS_BIG_ENDIAN)
1172 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1173 if (! BYTES_BIG_ENDIAN)
1174 offset += difference % UNITS_PER_WORD;
1180 /* Return 1 iff X, assumed to be a SUBREG,
1181 refers to the least significant part of its containing reg.
1182 If X is not a SUBREG, always return 1 (it is its own low part!). */
1185 subreg_lowpart_p (x)
1188 if (GET_CODE (x) != SUBREG)
1190 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1193 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1194 == SUBREG_BYTE (x));
1198 /* Helper routine for all the constant cases of operand_subword.
1199 Some places invoke this directly. */
1202 constant_subword (op, offset, mode)
1205 enum machine_mode mode;
1207 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1210 /* If OP is already an integer word, return it. */
1211 if (GET_MODE_CLASS (mode) == MODE_INT
1212 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1215 #ifdef REAL_ARITHMETIC
1216 /* The output is some bits, the width of the target machine's word.
1217 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1219 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1220 && GET_MODE_CLASS (mode) == MODE_FLOAT
1221 && GET_MODE_BITSIZE (mode) == 64
1222 && GET_CODE (op) == CONST_DOUBLE)
1227 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1228 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1230 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1231 which the words are written depends on the word endianness.
1232 ??? This is a potential portability problem and should
1233 be fixed at some point.
1235 We must excercise caution with the sign bit. By definition there
1236 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1237 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1238 So we explicitly mask and sign-extend as necessary. */
1239 if (BITS_PER_WORD == 32)
1242 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1243 return GEN_INT (val);
1245 #if HOST_BITS_PER_WIDE_INT >= 64
1246 else if (BITS_PER_WORD >= 64 && offset == 0)
1248 val = k[! WORDS_BIG_ENDIAN];
1249 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1250 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1251 return GEN_INT (val);
1254 else if (BITS_PER_WORD == 16)
1256 val = k[offset >> 1];
1257 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1259 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1260 return GEN_INT (val);
1265 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1266 && GET_MODE_CLASS (mode) == MODE_FLOAT
1267 && GET_MODE_BITSIZE (mode) > 64
1268 && GET_CODE (op) == CONST_DOUBLE)
1273 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1274 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1276 if (BITS_PER_WORD == 32)
1279 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1280 return GEN_INT (val);
1282 #if HOST_BITS_PER_WIDE_INT >= 64
1283 else if (BITS_PER_WORD >= 64 && offset <= 1)
1285 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1286 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1287 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1288 return GEN_INT (val);
1294 #else /* no REAL_ARITHMETIC */
1295 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1296 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1297 || flag_pretend_float)
1298 && GET_MODE_CLASS (mode) == MODE_FLOAT
1299 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1300 && GET_CODE (op) == CONST_DOUBLE)
1302 /* The constant is stored in the host's word-ordering,
1303 but we want to access it in the target's word-ordering. Some
1304 compilers don't like a conditional inside macro args, so we have two
1305 copies of the return. */
1306 #ifdef HOST_WORDS_BIG_ENDIAN
1307 return GEN_INT (offset == WORDS_BIG_ENDIAN
1308 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1310 return GEN_INT (offset != WORDS_BIG_ENDIAN
1311 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1314 #endif /* no REAL_ARITHMETIC */
1316 /* Single word float is a little harder, since single- and double-word
1317 values often do not have the same high-order bits. We have already
1318 verified that we want the only defined word of the single-word value. */
1319 #ifdef REAL_ARITHMETIC
1320 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1321 && GET_MODE_BITSIZE (mode) == 32
1322 && GET_CODE (op) == CONST_DOUBLE)
1327 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1328 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1330 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1332 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1334 if (BITS_PER_WORD == 16)
1336 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1338 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1341 return GEN_INT (val);
1344 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1345 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1346 || flag_pretend_float)
1347 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1348 && GET_MODE_CLASS (mode) == MODE_FLOAT
1349 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1350 && GET_CODE (op) == CONST_DOUBLE)
1353 union {float f; HOST_WIDE_INT i; } u;
1355 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1358 return GEN_INT (u.i);
1360 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1361 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1362 || flag_pretend_float)
1363 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1364 && GET_MODE_CLASS (mode) == MODE_FLOAT
1365 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1366 && GET_CODE (op) == CONST_DOUBLE)
1369 union {double d; HOST_WIDE_INT i; } u;
1371 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1374 return GEN_INT (u.i);
1376 #endif /* no REAL_ARITHMETIC */
1378 /* The only remaining cases that we can handle are integers.
1379 Convert to proper endianness now since these cases need it.
1380 At this point, offset == 0 means the low-order word.
1382 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1383 in general. However, if OP is (const_int 0), we can just return
1386 if (op == const0_rtx)
1389 if (GET_MODE_CLASS (mode) != MODE_INT
1390 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1391 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1394 if (WORDS_BIG_ENDIAN)
1395 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1397 /* Find out which word on the host machine this value is in and get
1398 it from the constant. */
1399 val = (offset / size_ratio == 0
1400 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1401 : (GET_CODE (op) == CONST_INT
1402 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1404 /* Get the value we want into the low bits of val. */
1405 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1406 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1408 val = trunc_int_for_mode (val, word_mode);
1410 return GEN_INT (val);
1413 /* Return subword OFFSET of operand OP.
1414 The word number, OFFSET, is interpreted as the word number starting
1415 at the low-order address. OFFSET 0 is the low-order word if not
1416 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1418 If we cannot extract the required word, we return zero. Otherwise,
1419 an rtx corresponding to the requested word will be returned.
1421 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1422 reload has completed, a valid address will always be returned. After
1423 reload, if a valid address cannot be returned, we return zero.
1425 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1426 it is the responsibility of the caller.
1428 MODE is the mode of OP in case it is a CONST_INT.
1430 ??? This is still rather broken for some cases. The problem for the
1431 moment is that all callers of this thing provide no 'goal mode' to
1432 tell us to work with. This exists because all callers were written
1433 in a word based SUBREG world.
1434 Now use of this function can be deprecated by simplify_subreg in most
1439 operand_subword (op, offset, validate_address, mode)
1441 unsigned int offset;
1442 int validate_address;
1443 enum machine_mode mode;
1445 if (mode == VOIDmode)
1446 mode = GET_MODE (op);
1448 if (mode == VOIDmode)
1451 /* If OP is narrower than a word, fail. */
1453 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1456 /* If we want a word outside OP, return zero. */
1458 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1461 /* Form a new MEM at the requested address. */
1462 if (GET_CODE (op) == MEM)
1464 rtx addr = plus_constant (XEXP (op, 0), (offset * UNITS_PER_WORD));
1467 if (validate_address)
1469 if (reload_completed)
1471 if (! strict_memory_address_p (word_mode, addr))
1475 addr = memory_address (word_mode, addr);
1478 new = gen_rtx_MEM (word_mode, addr);
1479 MEM_COPY_ATTRIBUTES (new, op);
1483 /* Rest can be handled by simplify_subreg. */
1484 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1487 /* Similar to `operand_subword', but never return 0. If we can't extract
1488 the required subword, put OP into a register and try again. If that fails,
1489 abort. We always validate the address in this case.
1491 MODE is the mode of OP, in case it is CONST_INT. */
1494 operand_subword_force (op, offset, mode)
1496 unsigned int offset;
1497 enum machine_mode mode;
1499 rtx result = operand_subword (op, offset, 1, mode);
1504 if (mode != BLKmode && mode != VOIDmode)
1506 /* If this is a register which can not be accessed by words, copy it
1507 to a pseudo register. */
1508 if (GET_CODE (op) == REG)
1509 op = copy_to_reg (op);
1511 op = force_reg (mode, op);
1514 result = operand_subword (op, offset, 1, mode);
1521 /* Given a compare instruction, swap the operands.
1522 A test instruction is changed into a compare of 0 against the operand. */
1525 reverse_comparison (insn)
1528 rtx body = PATTERN (insn);
1531 if (GET_CODE (body) == SET)
1532 comp = SET_SRC (body);
1534 comp = SET_SRC (XVECEXP (body, 0, 0));
1536 if (GET_CODE (comp) == COMPARE)
1538 rtx op0 = XEXP (comp, 0);
1539 rtx op1 = XEXP (comp, 1);
1540 XEXP (comp, 0) = op1;
1541 XEXP (comp, 1) = op0;
1545 rtx new = gen_rtx_COMPARE (VOIDmode,
1546 CONST0_RTX (GET_MODE (comp)), comp);
1547 if (GET_CODE (body) == SET)
1548 SET_SRC (body) = new;
1550 SET_SRC (XVECEXP (body, 0, 0)) = new;
1554 /* Return a memory reference like MEMREF, but with its mode changed
1555 to MODE and its address changed to ADDR.
1556 (VOIDmode means don't change the mode.
1557 NULL for ADDR means don't change the address.) */
1560 change_address (memref, mode, addr)
1562 enum machine_mode mode;
1567 if (GET_CODE (memref) != MEM)
1569 if (mode == VOIDmode)
1570 mode = GET_MODE (memref);
1572 addr = XEXP (memref, 0);
1574 /* If reload is in progress or has completed, ADDR must be valid.
1575 Otherwise, we can call memory_address to make it valid. */
1576 if (reload_completed || reload_in_progress)
1578 if (! memory_address_p (mode, addr))
1582 addr = memory_address (mode, addr);
1584 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1587 new = gen_rtx_MEM (mode, addr);
1588 MEM_COPY_ATTRIBUTES (new, memref);
1592 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1599 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1600 NULL_RTX, label_num++, NULL, NULL);
1602 LABEL_NUSES (label) = 0;
1603 LABEL_ALTERNATE_NAME (label) = NULL;
1607 /* For procedure integration. */
1609 /* Install new pointers to the first and last insns in the chain.
1610 Also, set cur_insn_uid to one higher than the last in use.
1611 Used for an inline-procedure after copying the insn chain. */
1614 set_new_first_and_last_insn (first, last)
1623 for (insn = first; insn; insn = NEXT_INSN (insn))
1624 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1629 /* Set the range of label numbers found in the current function.
1630 This is used when belatedly compiling an inline function. */
1633 set_new_first_and_last_label_num (first, last)
1636 base_label_num = label_num;
1637 first_label_num = first;
1638 last_label_num = last;
1641 /* Set the last label number found in the current function.
1642 This is used when belatedly compiling an inline function. */
1645 set_new_last_label_num (last)
1648 base_label_num = label_num;
1649 last_label_num = last;
1652 /* Restore all variables describing the current status from the structure *P.
1653 This is used after a nested function. */
1656 restore_emit_status (p)
1657 struct function *p ATTRIBUTE_UNUSED;
1660 clear_emit_caches ();
1663 /* Clear out all parts of the state in F that can safely be discarded
1664 after the function has been compiled, to let garbage collection
1665 reclaim the memory. */
1668 free_emit_status (f)
1671 free (f->emit->x_regno_reg_rtx);
1672 free (f->emit->regno_pointer_align);
1677 /* Go through all the RTL insn bodies and copy any invalid shared
1678 structure. This routine should only be called once. */
1681 unshare_all_rtl (fndecl, insn)
1687 /* Make sure that virtual parameters are not shared. */
1688 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
1689 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
1691 /* Make sure that virtual stack slots are not shared. */
1692 unshare_all_decls (DECL_INITIAL (fndecl));
1694 /* Unshare just about everything else. */
1695 unshare_all_rtl_1 (insn);
1697 /* Make sure the addresses of stack slots found outside the insn chain
1698 (such as, in DECL_RTL of a variable) are not shared
1699 with the insn chain.
1701 This special care is necessary when the stack slot MEM does not
1702 actually appear in the insn chain. If it does appear, its address
1703 is unshared from all else at that point. */
1704 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
1707 /* Go through all the RTL insn bodies and copy any invalid shared
1708 structure, again. This is a fairly expensive thing to do so it
1709 should be done sparingly. */
1712 unshare_all_rtl_again (insn)
1718 for (p = insn; p; p = NEXT_INSN (p))
1721 reset_used_flags (PATTERN (p));
1722 reset_used_flags (REG_NOTES (p));
1723 reset_used_flags (LOG_LINKS (p));
1726 /* Make sure that virtual stack slots are not shared. */
1727 reset_used_decls (DECL_INITIAL (cfun->decl));
1729 /* Make sure that virtual parameters are not shared. */
1730 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
1731 reset_used_flags (DECL_RTL (decl));
1733 reset_used_flags (stack_slot_list);
1735 unshare_all_rtl (cfun->decl, insn);
1738 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1739 Assumes the mark bits are cleared at entry. */
1742 unshare_all_rtl_1 (insn)
1745 for (; insn; insn = NEXT_INSN (insn))
1748 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1749 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1750 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1754 /* Go through all virtual stack slots of a function and copy any
1755 shared structure. */
1757 unshare_all_decls (blk)
1762 /* Copy shared decls. */
1763 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1764 if (DECL_RTL_SET_P (t))
1765 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
1767 /* Now process sub-blocks. */
1768 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1769 unshare_all_decls (t);
1772 /* Go through all virtual stack slots of a function and mark them as
1775 reset_used_decls (blk)
1781 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1782 if (DECL_RTL_SET_P (t))
1783 reset_used_flags (DECL_RTL (t));
1785 /* Now process sub-blocks. */
1786 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1787 reset_used_decls (t);
1790 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1791 Recursively does the same for subexpressions. */
1794 copy_rtx_if_shared (orig)
1797 register rtx x = orig;
1799 register enum rtx_code code;
1800 register const char *format_ptr;
1806 code = GET_CODE (x);
1808 /* These types may be freely shared. */
1821 /* SCRATCH must be shared because they represent distinct values. */
1825 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1826 a LABEL_REF, it isn't sharable. */
1827 if (GET_CODE (XEXP (x, 0)) == PLUS
1828 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1829 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1838 /* The chain of insns is not being copied. */
1842 /* A MEM is allowed to be shared if its address is constant.
1844 We used to allow sharing of MEMs which referenced
1845 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1846 that can lose. instantiate_virtual_regs will not unshare
1847 the MEMs, and combine may change the structure of the address
1848 because it looks safe and profitable in one context, but
1849 in some other context it creates unrecognizable RTL. */
1850 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1859 /* This rtx may not be shared. If it has already been seen,
1860 replace it with a copy of itself. */
1866 copy = rtx_alloc (code);
1868 (sizeof (*copy) - sizeof (copy->fld)
1869 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1875 /* Now scan the subexpressions recursively.
1876 We can store any replaced subexpressions directly into X
1877 since we know X is not shared! Any vectors in X
1878 must be copied if X was copied. */
1880 format_ptr = GET_RTX_FORMAT (code);
1882 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1884 switch (*format_ptr++)
1887 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1891 if (XVEC (x, i) != NULL)
1894 int len = XVECLEN (x, i);
1896 if (copied && len > 0)
1897 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
1898 for (j = 0; j < len; j++)
1899 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1907 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1908 to look for shared sub-parts. */
1911 reset_used_flags (x)
1915 register enum rtx_code code;
1916 register const char *format_ptr;
1921 code = GET_CODE (x);
1923 /* These types may be freely shared so we needn't do any resetting
1944 /* The chain of insns is not being copied. */
1953 format_ptr = GET_RTX_FORMAT (code);
1954 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1956 switch (*format_ptr++)
1959 reset_used_flags (XEXP (x, i));
1963 for (j = 0; j < XVECLEN (x, i); j++)
1964 reset_used_flags (XVECEXP (x, i, j));
1970 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1971 Return X or the rtx for the pseudo reg the value of X was copied into.
1972 OTHER must be valid as a SET_DEST. */
1975 make_safe_from (x, other)
1979 switch (GET_CODE (other))
1982 other = SUBREG_REG (other);
1984 case STRICT_LOW_PART:
1987 other = XEXP (other, 0);
1993 if ((GET_CODE (other) == MEM
1995 && GET_CODE (x) != REG
1996 && GET_CODE (x) != SUBREG)
1997 || (GET_CODE (other) == REG
1998 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1999 || reg_mentioned_p (other, x))))
2001 rtx temp = gen_reg_rtx (GET_MODE (x));
2002 emit_move_insn (temp, x);
2008 /* Emission of insns (adding them to the doubly-linked list). */
2010 /* Return the first insn of the current sequence or current function. */
2018 /* Return the last insn emitted in current sequence or current function. */
2026 /* Specify a new insn as the last in the chain. */
2029 set_last_insn (insn)
2032 if (NEXT_INSN (insn) != 0)
2037 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2040 get_last_insn_anywhere ()
2042 struct sequence_stack *stack;
2045 for (stack = seq_stack; stack; stack = stack->next)
2046 if (stack->last != 0)
2051 /* Return a number larger than any instruction's uid in this function. */
2056 return cur_insn_uid;
2059 /* Renumber instructions so that no instruction UIDs are wasted. */
2062 renumber_insns (stream)
2067 /* If we're not supposed to renumber instructions, don't. */
2068 if (!flag_renumber_insns)
2071 /* If there aren't that many instructions, then it's not really
2072 worth renumbering them. */
2073 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2078 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2081 fprintf (stream, "Renumbering insn %d to %d\n",
2082 INSN_UID (insn), cur_insn_uid);
2083 INSN_UID (insn) = cur_insn_uid++;
2087 /* Return the next insn. If it is a SEQUENCE, return the first insn
2096 insn = NEXT_INSN (insn);
2097 if (insn && GET_CODE (insn) == INSN
2098 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2099 insn = XVECEXP (PATTERN (insn), 0, 0);
2105 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2109 previous_insn (insn)
2114 insn = PREV_INSN (insn);
2115 if (insn && GET_CODE (insn) == INSN
2116 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2117 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2123 /* Return the next insn after INSN that is not a NOTE. This routine does not
2124 look inside SEQUENCEs. */
2127 next_nonnote_insn (insn)
2132 insn = NEXT_INSN (insn);
2133 if (insn == 0 || GET_CODE (insn) != NOTE)
2140 /* Return the previous insn before INSN that is not a NOTE. This routine does
2141 not look inside SEQUENCEs. */
2144 prev_nonnote_insn (insn)
2149 insn = PREV_INSN (insn);
2150 if (insn == 0 || GET_CODE (insn) != NOTE)
2157 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2158 or 0, if there is none. This routine does not look inside
2162 next_real_insn (insn)
2167 insn = NEXT_INSN (insn);
2168 if (insn == 0 || GET_CODE (insn) == INSN
2169 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2176 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2177 or 0, if there is none. This routine does not look inside
2181 prev_real_insn (insn)
2186 insn = PREV_INSN (insn);
2187 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2188 || GET_CODE (insn) == JUMP_INSN)
2195 /* Find the next insn after INSN that really does something. This routine
2196 does not look inside SEQUENCEs. Until reload has completed, this is the
2197 same as next_real_insn. */
2200 active_insn_p (insn)
2203 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2204 || (GET_CODE (insn) == INSN
2205 && (! reload_completed
2206 || (GET_CODE (PATTERN (insn)) != USE
2207 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2211 next_active_insn (insn)
2216 insn = NEXT_INSN (insn);
2217 if (insn == 0 || active_insn_p (insn))
2224 /* Find the last insn before INSN that really does something. This routine
2225 does not look inside SEQUENCEs. Until reload has completed, this is the
2226 same as prev_real_insn. */
2229 prev_active_insn (insn)
2234 insn = PREV_INSN (insn);
2235 if (insn == 0 || active_insn_p (insn))
2242 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2250 insn = NEXT_INSN (insn);
2251 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2258 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2266 insn = PREV_INSN (insn);
2267 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2275 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2276 and REG_CC_USER notes so we can find it. */
2279 link_cc0_insns (insn)
2282 rtx user = next_nonnote_insn (insn);
2284 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2285 user = XVECEXP (PATTERN (user), 0, 0);
2287 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2289 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2292 /* Return the next insn that uses CC0 after INSN, which is assumed to
2293 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2294 applied to the result of this function should yield INSN).
2296 Normally, this is simply the next insn. However, if a REG_CC_USER note
2297 is present, it contains the insn that uses CC0.
2299 Return 0 if we can't find the insn. */
2302 next_cc0_user (insn)
2305 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2308 return XEXP (note, 0);
2310 insn = next_nonnote_insn (insn);
2311 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2312 insn = XVECEXP (PATTERN (insn), 0, 0);
2314 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2320 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2321 note, it is the previous insn. */
2324 prev_cc0_setter (insn)
2327 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2330 return XEXP (note, 0);
2332 insn = prev_nonnote_insn (insn);
2333 if (! sets_cc0_p (PATTERN (insn)))
2340 /* Increment the label uses for all labels present in rtx. */
2346 register enum rtx_code code;
2348 register const char *fmt;
2350 code = GET_CODE (x);
2351 if (code == LABEL_REF)
2352 LABEL_NUSES (XEXP (x, 0))++;
2354 fmt = GET_RTX_FORMAT (code);
2355 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2358 mark_label_nuses (XEXP (x, i));
2359 else if (fmt[i] == 'E')
2360 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2361 mark_label_nuses (XVECEXP (x, i, j));
2366 /* Try splitting insns that can be split for better scheduling.
2367 PAT is the pattern which might split.
2368 TRIAL is the insn providing PAT.
2369 LAST is non-zero if we should return the last insn of the sequence produced.
2371 If this routine succeeds in splitting, it returns the first or last
2372 replacement insn depending on the value of LAST. Otherwise, it
2373 returns TRIAL. If the insn to be returned can be split, it will be. */
2376 try_split (pat, trial, last)
2380 rtx before = PREV_INSN (trial);
2381 rtx after = NEXT_INSN (trial);
2382 rtx seq = split_insns (pat, trial);
2383 int has_barrier = 0;
2386 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2387 We may need to handle this specially. */
2388 if (after && GET_CODE (after) == BARRIER)
2391 after = NEXT_INSN (after);
2396 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2397 The latter case will normally arise only when being done so that
2398 it, in turn, will be split (SFmode on the 29k is an example). */
2399 if (GET_CODE (seq) == SEQUENCE)
2404 /* Avoid infinite loop if any insn of the result matches
2405 the original pattern. */
2406 for (i = 0; i < XVECLEN (seq, 0); i++)
2407 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2408 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2412 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2413 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2414 mark_jump_label (PATTERN (XVECEXP (seq, 0, i)),
2415 XVECEXP (seq, 0, i), 0, 0);
2417 /* If we are splitting a CALL_INSN, look for the CALL_INSN
2418 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
2419 if (GET_CODE (trial) == CALL_INSN)
2420 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2421 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
2422 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
2423 = CALL_INSN_FUNCTION_USAGE (trial);
2425 /* Copy EH notes. */
2426 if ((eh_note = find_reg_note (trial, REG_EH_REGION, NULL_RTX)))
2427 for (i = 0; i < XVECLEN (seq, 0); i++)
2429 rtx insn = XVECEXP (seq, 0, i);
2430 if (GET_CODE (insn) == CALL_INSN
2431 || (flag_non_call_exceptions
2432 && may_trap_p (PATTERN (insn))))
2434 = gen_rtx_EXPR_LIST (REG_EH_REGION, XEXP (eh_note, 0),
2438 /* If there are LABELS inside the split insns increment the
2439 usage count so we don't delete the label. */
2440 if (GET_CODE (trial) == INSN)
2441 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2442 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
2443 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
2445 tem = emit_insn_after (seq, before);
2447 delete_insn (trial);
2449 emit_barrier_after (tem);
2451 /* Recursively call try_split for each new insn created; by the
2452 time control returns here that insn will be fully split, so
2453 set LAST and continue from the insn after the one returned.
2454 We can't use next_active_insn here since AFTER may be a note.
2455 Ignore deleted insns, which can be occur if not optimizing. */
2456 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
2457 if (! INSN_DELETED_P (tem) && INSN_P (tem))
2458 tem = try_split (PATTERN (tem), tem, 1);
2460 /* Avoid infinite loop if the result matches the original pattern. */
2461 else if (rtx_equal_p (seq, pat))
2465 PATTERN (trial) = seq;
2466 INSN_CODE (trial) = -1;
2467 try_split (seq, trial, last);
2470 /* Return either the first or the last insn, depending on which was
2473 ? (after ? prev_active_insn (after) : last_insn)
2474 : next_active_insn (before);
2480 /* Make and return an INSN rtx, initializing all its slots.
2481 Store PATTERN in the pattern slots. */
2484 make_insn_raw (pattern)
2489 insn = rtx_alloc (INSN);
2491 INSN_UID (insn) = cur_insn_uid++;
2492 PATTERN (insn) = pattern;
2493 INSN_CODE (insn) = -1;
2494 LOG_LINKS (insn) = NULL;
2495 REG_NOTES (insn) = NULL;
2497 #ifdef ENABLE_RTL_CHECKING
2500 && (returnjump_p (insn)
2501 || (GET_CODE (insn) == SET
2502 && SET_DEST (insn) == pc_rtx)))
2504 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2512 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2515 make_jump_insn_raw (pattern)
2520 insn = rtx_alloc (JUMP_INSN);
2521 INSN_UID (insn) = cur_insn_uid++;
2523 PATTERN (insn) = pattern;
2524 INSN_CODE (insn) = -1;
2525 LOG_LINKS (insn) = NULL;
2526 REG_NOTES (insn) = NULL;
2527 JUMP_LABEL (insn) = NULL;
2532 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2535 make_call_insn_raw (pattern)
2540 insn = rtx_alloc (CALL_INSN);
2541 INSN_UID (insn) = cur_insn_uid++;
2543 PATTERN (insn) = pattern;
2544 INSN_CODE (insn) = -1;
2545 LOG_LINKS (insn) = NULL;
2546 REG_NOTES (insn) = NULL;
2547 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2552 /* Add INSN to the end of the doubly-linked list.
2553 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2559 PREV_INSN (insn) = last_insn;
2560 NEXT_INSN (insn) = 0;
2562 if (NULL != last_insn)
2563 NEXT_INSN (last_insn) = insn;
2565 if (NULL == first_insn)
2571 /* Add INSN into the doubly-linked list after insn AFTER. This and
2572 the next should be the only functions called to insert an insn once
2573 delay slots have been filled since only they know how to update a
2577 add_insn_after (insn, after)
2580 rtx next = NEXT_INSN (after);
2582 if (optimize && INSN_DELETED_P (after))
2585 NEXT_INSN (insn) = next;
2586 PREV_INSN (insn) = after;
2590 PREV_INSN (next) = insn;
2591 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2592 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2594 else if (last_insn == after)
2598 struct sequence_stack *stack = seq_stack;
2599 /* Scan all pending sequences too. */
2600 for (; stack; stack = stack->next)
2601 if (after == stack->last)
2611 NEXT_INSN (after) = insn;
2612 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2614 rtx sequence = PATTERN (after);
2615 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2619 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2620 the previous should be the only functions called to insert an insn once
2621 delay slots have been filled since only they know how to update a
2625 add_insn_before (insn, before)
2628 rtx prev = PREV_INSN (before);
2630 if (optimize && INSN_DELETED_P (before))
2633 PREV_INSN (insn) = prev;
2634 NEXT_INSN (insn) = before;
2638 NEXT_INSN (prev) = insn;
2639 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2641 rtx sequence = PATTERN (prev);
2642 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2645 else if (first_insn == before)
2649 struct sequence_stack *stack = seq_stack;
2650 /* Scan all pending sequences too. */
2651 for (; stack; stack = stack->next)
2652 if (before == stack->first)
2654 stack->first = insn;
2662 PREV_INSN (before) = insn;
2663 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2664 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2667 /* Remove an insn from its doubly-linked list. This function knows how
2668 to handle sequences. */
2673 rtx next = NEXT_INSN (insn);
2674 rtx prev = PREV_INSN (insn);
2677 NEXT_INSN (prev) = next;
2678 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2680 rtx sequence = PATTERN (prev);
2681 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2684 else if (first_insn == insn)
2688 struct sequence_stack *stack = seq_stack;
2689 /* Scan all pending sequences too. */
2690 for (; stack; stack = stack->next)
2691 if (insn == stack->first)
2693 stack->first = next;
2703 PREV_INSN (next) = prev;
2704 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2705 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2707 else if (last_insn == insn)
2711 struct sequence_stack *stack = seq_stack;
2712 /* Scan all pending sequences too. */
2713 for (; stack; stack = stack->next)
2714 if (insn == stack->last)
2725 /* Delete all insns made since FROM.
2726 FROM becomes the new last instruction. */
2729 delete_insns_since (from)
2735 NEXT_INSN (from) = 0;
2739 /* This function is deprecated, please use sequences instead.
2741 Move a consecutive bunch of insns to a different place in the chain.
2742 The insns to be moved are those between FROM and TO.
2743 They are moved to a new position after the insn AFTER.
2744 AFTER must not be FROM or TO or any insn in between.
2746 This function does not know about SEQUENCEs and hence should not be
2747 called after delay-slot filling has been done. */
2750 reorder_insns (from, to, after)
2751 rtx from, to, after;
2753 /* Splice this bunch out of where it is now. */
2754 if (PREV_INSN (from))
2755 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2757 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2758 if (last_insn == to)
2759 last_insn = PREV_INSN (from);
2760 if (first_insn == from)
2761 first_insn = NEXT_INSN (to);
2763 /* Make the new neighbors point to it and it to them. */
2764 if (NEXT_INSN (after))
2765 PREV_INSN (NEXT_INSN (after)) = to;
2767 NEXT_INSN (to) = NEXT_INSN (after);
2768 PREV_INSN (from) = after;
2769 NEXT_INSN (after) = from;
2770 if (after == last_insn)
2774 /* Return the line note insn preceding INSN. */
2777 find_line_note (insn)
2780 if (no_line_numbers)
2783 for (; insn; insn = PREV_INSN (insn))
2784 if (GET_CODE (insn) == NOTE
2785 && NOTE_LINE_NUMBER (insn) >= 0)
2791 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2792 of the moved insns when debugging. This may insert a note between AFTER
2793 and FROM, and another one after TO. */
2796 reorder_insns_with_line_notes (from, to, after)
2797 rtx from, to, after;
2799 rtx from_line = find_line_note (from);
2800 rtx after_line = find_line_note (after);
2802 reorder_insns (from, to, after);
2804 if (from_line == after_line)
2808 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2809 NOTE_LINE_NUMBER (from_line),
2812 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2813 NOTE_LINE_NUMBER (after_line),
2817 /* Remove unnecessary notes from the instruction stream. */
2820 remove_unnecessary_notes ()
2822 rtx block_stack = NULL_RTX;
2823 rtx eh_stack = NULL_RTX;
2828 /* We must not remove the first instruction in the function because
2829 the compiler depends on the first instruction being a note. */
2830 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
2832 /* Remember what's next. */
2833 next = NEXT_INSN (insn);
2835 /* We're only interested in notes. */
2836 if (GET_CODE (insn) != NOTE)
2839 switch (NOTE_LINE_NUMBER (insn))
2841 case NOTE_INSN_DELETED:
2845 case NOTE_INSN_EH_REGION_BEG:
2846 eh_stack = alloc_INSN_LIST (insn, eh_stack);
2849 case NOTE_INSN_EH_REGION_END:
2850 /* Too many end notes. */
2851 if (eh_stack == NULL_RTX)
2853 /* Mismatched nesting. */
2854 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
2857 eh_stack = XEXP (eh_stack, 1);
2858 free_INSN_LIST_node (tmp);
2861 case NOTE_INSN_BLOCK_BEG:
2862 /* By now, all notes indicating lexical blocks should have
2863 NOTE_BLOCK filled in. */
2864 if (NOTE_BLOCK (insn) == NULL_TREE)
2866 block_stack = alloc_INSN_LIST (insn, block_stack);
2869 case NOTE_INSN_BLOCK_END:
2870 /* Too many end notes. */
2871 if (block_stack == NULL_RTX)
2873 /* Mismatched nesting. */
2874 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
2877 block_stack = XEXP (block_stack, 1);
2878 free_INSN_LIST_node (tmp);
2880 /* Scan back to see if there are any non-note instructions
2881 between INSN and the beginning of this block. If not,
2882 then there is no PC range in the generated code that will
2883 actually be in this block, so there's no point in
2884 remembering the existence of the block. */
2885 for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp))
2887 /* This block contains a real instruction. Note that we
2888 don't include labels; if the only thing in the block
2889 is a label, then there are still no PC values that
2890 lie within the block. */
2894 /* We're only interested in NOTEs. */
2895 if (GET_CODE (tmp) != NOTE)
2898 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
2900 /* We just verified that this BLOCK matches us
2901 with the block_stack check above. */
2902 if (debug_ignore_block (NOTE_BLOCK (insn)))
2909 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
2910 /* There's a nested block. We need to leave the
2911 current block in place since otherwise the debugger
2912 wouldn't be able to show symbols from our block in
2913 the nested block. */
2919 /* Too many begin notes. */
2920 if (block_stack || eh_stack)
2925 /* Emit an insn of given code and pattern
2926 at a specified place within the doubly-linked list. */
2928 /* Make an instruction with body PATTERN
2929 and output it before the instruction BEFORE. */
2932 emit_insn_before (pattern, before)
2933 register rtx pattern, before;
2935 register rtx insn = before;
2937 if (GET_CODE (pattern) == SEQUENCE)
2941 for (i = 0; i < XVECLEN (pattern, 0); i++)
2943 insn = XVECEXP (pattern, 0, i);
2944 add_insn_before (insn, before);
2949 insn = make_insn_raw (pattern);
2950 add_insn_before (insn, before);
2956 /* Similar to emit_insn_before, but update basic block boundaries as well. */
2959 emit_block_insn_before (pattern, before, block)
2960 rtx pattern, before;
2963 rtx prev = PREV_INSN (before);
2964 rtx r = emit_insn_before (pattern, before);
2965 if (block && block->head == before)
2966 block->head = NEXT_INSN (prev);
2970 /* Make an instruction with body PATTERN and code JUMP_INSN
2971 and output it before the instruction BEFORE. */
2974 emit_jump_insn_before (pattern, before)
2975 register rtx pattern, before;
2979 if (GET_CODE (pattern) == SEQUENCE)
2980 insn = emit_insn_before (pattern, before);
2983 insn = make_jump_insn_raw (pattern);
2984 add_insn_before (insn, before);
2990 /* Make an instruction with body PATTERN and code CALL_INSN
2991 and output it before the instruction BEFORE. */
2994 emit_call_insn_before (pattern, before)
2995 register rtx pattern, before;
2999 if (GET_CODE (pattern) == SEQUENCE)
3000 insn = emit_insn_before (pattern, before);
3003 insn = make_call_insn_raw (pattern);
3004 add_insn_before (insn, before);
3005 PUT_CODE (insn, CALL_INSN);
3011 /* Make an insn of code BARRIER
3012 and output it before the insn BEFORE. */
3015 emit_barrier_before (before)
3016 register rtx before;
3018 register rtx insn = rtx_alloc (BARRIER);
3020 INSN_UID (insn) = cur_insn_uid++;
3022 add_insn_before (insn, before);
3026 /* Emit the label LABEL before the insn BEFORE. */
3029 emit_label_before (label, before)
3032 /* This can be called twice for the same label as a result of the
3033 confusion that follows a syntax error! So make it harmless. */
3034 if (INSN_UID (label) == 0)
3036 INSN_UID (label) = cur_insn_uid++;
3037 add_insn_before (label, before);
3043 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3046 emit_note_before (subtype, before)
3050 register rtx note = rtx_alloc (NOTE);
3051 INSN_UID (note) = cur_insn_uid++;
3052 NOTE_SOURCE_FILE (note) = 0;
3053 NOTE_LINE_NUMBER (note) = subtype;
3055 add_insn_before (note, before);
3059 /* Make an insn of code INSN with body PATTERN
3060 and output it after the insn AFTER. */
3063 emit_insn_after (pattern, after)
3064 register rtx pattern, after;
3066 register rtx insn = after;
3068 if (GET_CODE (pattern) == SEQUENCE)
3072 for (i = 0; i < XVECLEN (pattern, 0); i++)
3074 insn = XVECEXP (pattern, 0, i);
3075 add_insn_after (insn, after);
3081 insn = make_insn_raw (pattern);
3082 add_insn_after (insn, after);
3088 /* Similar to emit_insn_after, except that line notes are to be inserted so
3089 as to act as if this insn were at FROM. */
3092 emit_insn_after_with_line_notes (pattern, after, from)
3093 rtx pattern, after, from;
3095 rtx from_line = find_line_note (from);
3096 rtx after_line = find_line_note (after);
3097 rtx insn = emit_insn_after (pattern, after);
3100 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3101 NOTE_LINE_NUMBER (from_line),
3105 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3106 NOTE_LINE_NUMBER (after_line),
3110 /* Similar to emit_insn_after, but update basic block boundaries as well. */
3113 emit_block_insn_after (pattern, after, block)
3117 rtx r = emit_insn_after (pattern, after);
3118 if (block && block->end == after)
3123 /* Make an insn of code JUMP_INSN with body PATTERN
3124 and output it after the insn AFTER. */
3127 emit_jump_insn_after (pattern, after)
3128 register rtx pattern, after;
3132 if (GET_CODE (pattern) == SEQUENCE)
3133 insn = emit_insn_after (pattern, after);
3136 insn = make_jump_insn_raw (pattern);
3137 add_insn_after (insn, after);
3143 /* Make an insn of code BARRIER
3144 and output it after the insn AFTER. */
3147 emit_barrier_after (after)
3150 register rtx insn = rtx_alloc (BARRIER);
3152 INSN_UID (insn) = cur_insn_uid++;
3154 add_insn_after (insn, after);
3158 /* Emit the label LABEL after the insn AFTER. */
3161 emit_label_after (label, after)
3164 /* This can be called twice for the same label
3165 as a result of the confusion that follows a syntax error!
3166 So make it harmless. */
3167 if (INSN_UID (label) == 0)
3169 INSN_UID (label) = cur_insn_uid++;
3170 add_insn_after (label, after);
3176 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3179 emit_note_after (subtype, after)
3183 register rtx note = rtx_alloc (NOTE);
3184 INSN_UID (note) = cur_insn_uid++;
3185 NOTE_SOURCE_FILE (note) = 0;
3186 NOTE_LINE_NUMBER (note) = subtype;
3187 add_insn_after (note, after);
3191 /* Emit a line note for FILE and LINE after the insn AFTER. */
3194 emit_line_note_after (file, line, after)
3201 if (no_line_numbers && line > 0)
3207 note = rtx_alloc (NOTE);
3208 INSN_UID (note) = cur_insn_uid++;
3209 NOTE_SOURCE_FILE (note) = file;
3210 NOTE_LINE_NUMBER (note) = line;
3211 add_insn_after (note, after);
3215 /* Make an insn of code INSN with pattern PATTERN
3216 and add it to the end of the doubly-linked list.
3217 If PATTERN is a SEQUENCE, take the elements of it
3218 and emit an insn for each element.
3220 Returns the last insn emitted. */
3226 rtx insn = last_insn;
3228 if (GET_CODE (pattern) == SEQUENCE)
3232 for (i = 0; i < XVECLEN (pattern, 0); i++)
3234 insn = XVECEXP (pattern, 0, i);
3240 insn = make_insn_raw (pattern);
3247 /* Emit the insns in a chain starting with INSN.
3248 Return the last insn emitted. */
3258 rtx next = NEXT_INSN (insn);
3267 /* Emit the insns in a chain starting with INSN and place them in front of
3268 the insn BEFORE. Return the last insn emitted. */
3271 emit_insns_before (insn, before)
3279 rtx next = NEXT_INSN (insn);
3280 add_insn_before (insn, before);
3288 /* Emit the insns in a chain starting with FIRST and place them in back of
3289 the insn AFTER. Return the last insn emitted. */
3292 emit_insns_after (first, after)
3297 register rtx after_after;
3305 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3308 after_after = NEXT_INSN (after);
3310 NEXT_INSN (after) = first;
3311 PREV_INSN (first) = after;
3312 NEXT_INSN (last) = after_after;
3314 PREV_INSN (after_after) = last;
3316 if (after == last_insn)
3321 /* Make an insn of code JUMP_INSN with pattern PATTERN
3322 and add it to the end of the doubly-linked list. */
3325 emit_jump_insn (pattern)
3328 if (GET_CODE (pattern) == SEQUENCE)
3329 return emit_insn (pattern);
3332 register rtx insn = make_jump_insn_raw (pattern);
3338 /* Make an insn of code CALL_INSN with pattern PATTERN
3339 and add it to the end of the doubly-linked list. */
3342 emit_call_insn (pattern)
3345 if (GET_CODE (pattern) == SEQUENCE)
3346 return emit_insn (pattern);
3349 register rtx insn = make_call_insn_raw (pattern);
3351 PUT_CODE (insn, CALL_INSN);
3356 /* Add the label LABEL to the end of the doubly-linked list. */
3362 /* This can be called twice for the same label
3363 as a result of the confusion that follows a syntax error!
3364 So make it harmless. */
3365 if (INSN_UID (label) == 0)
3367 INSN_UID (label) = cur_insn_uid++;
3373 /* Make an insn of code BARRIER
3374 and add it to the end of the doubly-linked list. */
3379 register rtx barrier = rtx_alloc (BARRIER);
3380 INSN_UID (barrier) = cur_insn_uid++;
3385 /* Make an insn of code NOTE
3386 with data-fields specified by FILE and LINE
3387 and add it to the end of the doubly-linked list,
3388 but only if line-numbers are desired for debugging info. */
3391 emit_line_note (file, line)
3395 set_file_and_line_for_stmt (file, line);
3398 if (no_line_numbers)
3402 return emit_note (file, line);
3405 /* Make an insn of code NOTE
3406 with data-fields specified by FILE and LINE
3407 and add it to the end of the doubly-linked list.
3408 If it is a line-number NOTE, omit it if it matches the previous one. */
3411 emit_note (file, line)
3419 if (file && last_filename && !strcmp (file, last_filename)
3420 && line == last_linenum)
3422 last_filename = file;
3423 last_linenum = line;
3426 if (no_line_numbers && line > 0)
3432 note = rtx_alloc (NOTE);
3433 INSN_UID (note) = cur_insn_uid++;
3434 NOTE_SOURCE_FILE (note) = file;
3435 NOTE_LINE_NUMBER (note) = line;
3440 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3443 emit_line_note_force (file, line)
3448 return emit_line_note (file, line);
3451 /* Cause next statement to emit a line note even if the line number
3452 has not changed. This is used at the beginning of a function. */
3455 force_next_line_note ()
3460 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3461 note of this type already exists, remove it first. */
3464 set_unique_reg_note (insn, kind, datum)
3469 rtx note = find_reg_note (insn, kind, NULL_RTX);
3471 /* First remove the note if there already is one. */
3473 remove_note (insn, note);
3475 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3478 /* Return an indication of which type of insn should have X as a body.
3479 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3485 if (GET_CODE (x) == CODE_LABEL)
3487 if (GET_CODE (x) == CALL)
3489 if (GET_CODE (x) == RETURN)
3491 if (GET_CODE (x) == SET)
3493 if (SET_DEST (x) == pc_rtx)
3495 else if (GET_CODE (SET_SRC (x)) == CALL)
3500 if (GET_CODE (x) == PARALLEL)
3503 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3504 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3506 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3507 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3509 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3510 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3516 /* Emit the rtl pattern X as an appropriate kind of insn.
3517 If X is a label, it is simply added into the insn chain. */
3523 enum rtx_code code = classify_insn (x);
3525 if (code == CODE_LABEL)
3526 return emit_label (x);
3527 else if (code == INSN)
3528 return emit_insn (x);
3529 else if (code == JUMP_INSN)
3531 register rtx insn = emit_jump_insn (x);
3532 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
3533 return emit_barrier ();
3536 else if (code == CALL_INSN)
3537 return emit_call_insn (x);
3542 /* Begin emitting insns to a sequence which can be packaged in an
3543 RTL_EXPR. If this sequence will contain something that might cause
3544 the compiler to pop arguments to function calls (because those
3545 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3546 details), use do_pending_stack_adjust before calling this function.
3547 That will ensure that the deferred pops are not accidentally
3548 emitted in the middle of this sequence. */
3553 struct sequence_stack *tem;
3555 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
3557 tem->next = seq_stack;
3558 tem->first = first_insn;
3559 tem->last = last_insn;
3560 tem->sequence_rtl_expr = seq_rtl_expr;
3568 /* Similarly, but indicate that this sequence will be placed in T, an
3569 RTL_EXPR. See the documentation for start_sequence for more
3570 information about how to use this function. */
3573 start_sequence_for_rtl_expr (t)
3581 /* Set up the insn chain starting with FIRST as the current sequence,
3582 saving the previously current one. See the documentation for
3583 start_sequence for more information about how to use this function. */
3586 push_to_sequence (first)
3593 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3599 /* Set up the insn chain from a chain stort in FIRST to LAST. */
3602 push_to_full_sequence (first, last)
3608 /* We really should have the end of the insn chain here. */
3609 if (last && NEXT_INSN (last))
3613 /* Set up the outer-level insn chain
3614 as the current sequence, saving the previously current one. */
3617 push_topmost_sequence ()
3619 struct sequence_stack *stack, *top = NULL;
3623 for (stack = seq_stack; stack; stack = stack->next)
3626 first_insn = top->first;
3627 last_insn = top->last;
3628 seq_rtl_expr = top->sequence_rtl_expr;
3631 /* After emitting to the outer-level insn chain, update the outer-level
3632 insn chain, and restore the previous saved state. */
3635 pop_topmost_sequence ()
3637 struct sequence_stack *stack, *top = NULL;
3639 for (stack = seq_stack; stack; stack = stack->next)
3642 top->first = first_insn;
3643 top->last = last_insn;
3644 /* ??? Why don't we save seq_rtl_expr here? */
3649 /* After emitting to a sequence, restore previous saved state.
3651 To get the contents of the sequence just made, you must call
3652 `gen_sequence' *before* calling here.
3654 If the compiler might have deferred popping arguments while
3655 generating this sequence, and this sequence will not be immediately
3656 inserted into the instruction stream, use do_pending_stack_adjust
3657 before calling gen_sequence. That will ensure that the deferred
3658 pops are inserted into this sequence, and not into some random
3659 location in the instruction stream. See INHIBIT_DEFER_POP for more
3660 information about deferred popping of arguments. */
3665 struct sequence_stack *tem = seq_stack;
3667 first_insn = tem->first;
3668 last_insn = tem->last;
3669 seq_rtl_expr = tem->sequence_rtl_expr;
3670 seq_stack = tem->next;
3675 /* This works like end_sequence, but records the old sequence in FIRST
3679 end_full_sequence (first, last)
3682 *first = first_insn;
3687 /* Return 1 if currently emitting into a sequence. */
3692 return seq_stack != 0;
3695 /* Generate a SEQUENCE rtx containing the insns already emitted
3696 to the current sequence.
3698 This is how the gen_... function from a DEFINE_EXPAND
3699 constructs the SEQUENCE that it returns. */
3709 /* Count the insns in the chain. */
3711 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3714 /* If only one insn, return it rather than a SEQUENCE.
3715 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3716 the case of an empty list.)
3717 We only return the pattern of an insn if its code is INSN and it
3718 has no notes. This ensures that no information gets lost. */
3720 && ! RTX_FRAME_RELATED_P (first_insn)
3721 && GET_CODE (first_insn) == INSN
3722 /* Don't throw away any reg notes. */
3723 && REG_NOTES (first_insn) == 0)
3724 return PATTERN (first_insn);
3726 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3728 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3729 XVECEXP (result, 0, i) = tem;
3734 /* Put the various virtual registers into REGNO_REG_RTX. */
3737 init_virtual_regs (es)
3738 struct emit_status *es;
3740 rtx *ptr = es->x_regno_reg_rtx;
3741 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3742 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3743 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3744 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3745 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3749 clear_emit_caches ()
3753 /* Clear the start_sequence/gen_sequence cache. */
3754 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3755 sequence_result[i] = 0;
3759 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3760 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
3761 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
3762 static int copy_insn_n_scratches;
3764 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3765 copied an ASM_OPERANDS.
3766 In that case, it is the original input-operand vector. */
3767 static rtvec orig_asm_operands_vector;
3769 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3770 copied an ASM_OPERANDS.
3771 In that case, it is the copied input-operand vector. */
3772 static rtvec copy_asm_operands_vector;
3774 /* Likewise for the constraints vector. */
3775 static rtvec orig_asm_constraints_vector;
3776 static rtvec copy_asm_constraints_vector;
3778 /* Recursively create a new copy of an rtx for copy_insn.
3779 This function differs from copy_rtx in that it handles SCRATCHes and
3780 ASM_OPERANDs properly.
3781 Normally, this function is not used directly; use copy_insn as front end.
3782 However, you could first copy an insn pattern with copy_insn and then use
3783 this function afterwards to properly copy any REG_NOTEs containing
3792 register RTX_CODE code;
3793 register const char *format_ptr;
3795 code = GET_CODE (orig);
3811 for (i = 0; i < copy_insn_n_scratches; i++)
3812 if (copy_insn_scratch_in[i] == orig)
3813 return copy_insn_scratch_out[i];
3817 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3818 a LABEL_REF, it isn't sharable. */
3819 if (GET_CODE (XEXP (orig, 0)) == PLUS
3820 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
3821 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
3825 /* A MEM with a constant address is not sharable. The problem is that
3826 the constant address may need to be reloaded. If the mem is shared,
3827 then reloading one copy of this mem will cause all copies to appear
3828 to have been reloaded. */
3834 copy = rtx_alloc (code);
3836 /* Copy the various flags, and other information. We assume that
3837 all fields need copying, and then clear the fields that should
3838 not be copied. That is the sensible default behavior, and forces
3839 us to explicitly document why we are *not* copying a flag. */
3840 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
3842 /* We do not copy the USED flag, which is used as a mark bit during
3843 walks over the RTL. */
3846 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3847 if (GET_RTX_CLASS (code) == 'i')
3851 copy->frame_related = 0;
3854 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
3856 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
3858 copy->fld[i] = orig->fld[i];
3859 switch (*format_ptr++)
3862 if (XEXP (orig, i) != NULL)
3863 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
3868 if (XVEC (orig, i) == orig_asm_constraints_vector)
3869 XVEC (copy, i) = copy_asm_constraints_vector;
3870 else if (XVEC (orig, i) == orig_asm_operands_vector)
3871 XVEC (copy, i) = copy_asm_operands_vector;
3872 else if (XVEC (orig, i) != NULL)
3874 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
3875 for (j = 0; j < XVECLEN (copy, i); j++)
3876 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
3887 /* These are left unchanged. */
3895 if (code == SCRATCH)
3897 i = copy_insn_n_scratches++;
3898 if (i >= MAX_RECOG_OPERANDS)
3900 copy_insn_scratch_in[i] = orig;
3901 copy_insn_scratch_out[i] = copy;
3903 else if (code == ASM_OPERANDS)
3905 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
3906 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
3907 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
3908 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
3914 /* Create a new copy of an rtx.
3915 This function differs from copy_rtx in that it handles SCRATCHes and
3916 ASM_OPERANDs properly.
3917 INSN doesn't really have to be a full INSN; it could be just the
3923 copy_insn_n_scratches = 0;
3924 orig_asm_operands_vector = 0;
3925 orig_asm_constraints_vector = 0;
3926 copy_asm_operands_vector = 0;
3927 copy_asm_constraints_vector = 0;
3928 return copy_insn_1 (insn);
3931 /* Initialize data structures and variables in this file
3932 before generating rtl for each function. */
3937 struct function *f = cfun;
3939 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
3942 seq_rtl_expr = NULL;
3944 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3947 first_label_num = label_num;
3951 clear_emit_caches ();
3953 /* Init the tables that describe all the pseudo regs. */
3955 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
3957 f->emit->regno_pointer_align
3958 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
3959 sizeof (unsigned char));
3962 = (rtx *) xcalloc (f->emit->regno_pointer_align_length * sizeof (rtx),
3965 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3966 init_virtual_regs (f->emit);
3968 /* Indicate that the virtual registers and stack locations are
3970 REG_POINTER (stack_pointer_rtx) = 1;
3971 REG_POINTER (frame_pointer_rtx) = 1;
3972 REG_POINTER (hard_frame_pointer_rtx) = 1;
3973 REG_POINTER (arg_pointer_rtx) = 1;
3975 REG_POINTER (virtual_incoming_args_rtx) = 1;
3976 REG_POINTER (virtual_stack_vars_rtx) = 1;
3977 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
3978 REG_POINTER (virtual_outgoing_args_rtx) = 1;
3979 REG_POINTER (virtual_cfa_rtx) = 1;
3981 #ifdef STACK_BOUNDARY
3982 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
3983 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3984 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3985 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
3987 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
3988 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
3989 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
3990 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
3991 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
3994 #ifdef INIT_EXPANDERS
3999 /* Mark SS for GC. */
4002 mark_sequence_stack (ss)
4003 struct sequence_stack *ss;
4007 ggc_mark_rtx (ss->first);
4008 ggc_mark_tree (ss->sequence_rtl_expr);
4013 /* Mark ES for GC. */
4016 mark_emit_status (es)
4017 struct emit_status *es;
4025 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx;
4029 mark_sequence_stack (es->sequence_stack);
4030 ggc_mark_tree (es->sequence_rtl_expr);
4031 ggc_mark_rtx (es->x_first_insn);
4034 /* Create some permanent unique rtl objects shared between all functions.
4035 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4038 init_emit_once (line_numbers)
4042 enum machine_mode mode;
4043 enum machine_mode double_mode;
4045 /* Initialize the CONST_INT hash table. */
4046 const_int_htab = htab_create (37, const_int_htab_hash,
4047 const_int_htab_eq, NULL);
4048 ggc_add_root (&const_int_htab, 1, sizeof (const_int_htab),
4051 no_line_numbers = ! line_numbers;
4053 /* Compute the word and byte modes. */
4055 byte_mode = VOIDmode;
4056 word_mode = VOIDmode;
4057 double_mode = VOIDmode;
4059 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4060 mode = GET_MODE_WIDER_MODE (mode))
4062 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4063 && byte_mode == VOIDmode)
4066 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4067 && word_mode == VOIDmode)
4071 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4072 mode = GET_MODE_WIDER_MODE (mode))
4074 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4075 && double_mode == VOIDmode)
4079 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4081 /* Assign register numbers to the globally defined register rtx.
4082 This must be done at runtime because the register number field
4083 is in a union and some compilers can't initialize unions. */
4085 pc_rtx = gen_rtx (PC, VOIDmode);
4086 cc0_rtx = gen_rtx (CC0, VOIDmode);
4087 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
4088 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4089 if (hard_frame_pointer_rtx == 0)
4090 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
4091 HARD_FRAME_POINTER_REGNUM);
4092 if (arg_pointer_rtx == 0)
4093 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
4094 virtual_incoming_args_rtx =
4095 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4096 virtual_stack_vars_rtx =
4097 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4098 virtual_stack_dynamic_rtx =
4099 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4100 virtual_outgoing_args_rtx =
4101 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4102 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4104 /* These rtx must be roots if GC is enabled. */
4105 ggc_add_rtx_root (global_rtl, GR_MAX);
4107 #ifdef INIT_EXPANDERS
4108 /* This is to initialize {init|mark|free}_machine_status before the first
4109 call to push_function_context_to. This is needed by the Chill front
4110 end which calls push_function_context_to before the first cal to
4111 init_function_start. */
4115 /* Create the unique rtx's for certain rtx codes and operand values. */
4117 /* Don't use gen_rtx here since gen_rtx in this case
4118 tries to use these variables. */
4119 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4120 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4121 gen_rtx_raw_CONST_INT (VOIDmode, i);
4122 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4124 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4125 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4126 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4128 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4130 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4131 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4132 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4133 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4135 for (i = 0; i <= 2; i++)
4137 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4138 mode = GET_MODE_WIDER_MODE (mode))
4140 rtx tem = rtx_alloc (CONST_DOUBLE);
4141 union real_extract u;
4143 /* Zero any holes in a structure. */
4144 memset ((char *) &u, 0, sizeof u);
4145 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4147 /* Avoid trailing garbage in the rtx. */
4148 if (sizeof (u) < sizeof (HOST_WIDE_INT))
4149 CONST_DOUBLE_LOW (tem) = 0;
4150 if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT))
4151 CONST_DOUBLE_HIGH (tem) = 0;
4153 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
4154 CONST_DOUBLE_MEM (tem) = cc0_rtx;
4155 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4156 PUT_MODE (tem, mode);
4158 const_tiny_rtx[i][(int) mode] = tem;
4161 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4163 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4164 mode = GET_MODE_WIDER_MODE (mode))
4165 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4167 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4169 mode = GET_MODE_WIDER_MODE (mode))
4170 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4173 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
4174 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
4175 const_tiny_rtx[0][i] = const0_rtx;
4177 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4178 if (STORE_FLAG_VALUE == 1)
4179 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4181 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4182 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4183 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4184 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4185 ggc_add_rtx_root (&const_true_rtx, 1);
4187 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4188 return_address_pointer_rtx
4189 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4193 struct_value_rtx = STRUCT_VALUE;
4195 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4198 #ifdef STRUCT_VALUE_INCOMING
4199 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4201 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4202 struct_value_incoming_rtx
4203 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4205 struct_value_incoming_rtx = struct_value_rtx;
4209 #ifdef STATIC_CHAIN_REGNUM
4210 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4212 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4213 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4214 static_chain_incoming_rtx
4215 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4218 static_chain_incoming_rtx = static_chain_rtx;
4222 static_chain_rtx = STATIC_CHAIN;
4224 #ifdef STATIC_CHAIN_INCOMING
4225 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4227 static_chain_incoming_rtx = static_chain_rtx;
4231 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
4232 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4234 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4235 ggc_add_rtx_root (&struct_value_rtx, 1);
4236 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4237 ggc_add_rtx_root (&static_chain_rtx, 1);
4238 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4239 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4242 /* Query and clear/ restore no_line_numbers. This is used by the
4243 switch / case handling in stmt.c to give proper line numbers in
4244 warnings about unreachable code. */
4247 force_line_numbers ()
4249 int old = no_line_numbers;
4251 no_line_numbers = 0;
4253 force_next_line_note ();
4258 restore_line_number_status (old_value)
4261 no_line_numbers = old_value;