1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
60 /* Commonly used modes. */
62 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
63 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
64 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
65 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
68 /* This is *not* reset after each function. It gives each CODE_LABEL
69 in the entire compilation a unique label number. */
71 static int label_num = 1;
73 /* Highest label number in current function.
74 Zero means use the value of label_num instead.
75 This is nonzero only when belatedly compiling an inline function. */
77 static int last_label_num;
79 /* Value label_num had when set_new_first_and_last_label_number was called.
80 If label_num has not changed since then, last_label_num is valid. */
82 static int base_label_num;
84 /* Nonzero means do not generate NOTEs for source line numbers. */
86 static int no_line_numbers;
88 /* Commonly used rtx's, so that we only need space for one copy.
89 These are initialized once for the entire compilation.
90 All of these except perhaps the floating-point CONST_DOUBLEs
91 are unique; no other rtx-object will be equal to any of these. */
93 rtx global_rtl[GR_MAX];
95 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
96 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
97 record a copy of const[012]_rtx. */
99 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
103 REAL_VALUE_TYPE dconst0;
104 REAL_VALUE_TYPE dconst1;
105 REAL_VALUE_TYPE dconst2;
106 REAL_VALUE_TYPE dconstm1;
108 /* All references to the following fixed hard registers go through
109 these unique rtl objects. On machines where the frame-pointer and
110 arg-pointer are the same register, they use the same unique object.
112 After register allocation, other rtl objects which used to be pseudo-regs
113 may be clobbered to refer to the frame-pointer register.
114 But references that were originally to the frame-pointer can be
115 distinguished from the others because they contain frame_pointer_rtx.
117 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
118 tricky: until register elimination has taken place hard_frame_pointer_rtx
119 should be used if it is being set, and frame_pointer_rtx otherwise. After
120 register elimination hard_frame_pointer_rtx should always be used.
121 On machines where the two registers are same (most) then these are the
124 In an inline procedure, the stack and frame pointer rtxs may not be
125 used for anything else. */
126 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
127 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
128 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
129 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
130 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
132 /* This is used to implement __builtin_return_address for some machines.
133 See for instance the MIPS port. */
134 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
136 /* We make one copy of (const_int C) where C is in
137 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
138 to save space during the compilation and simplify comparisons of
141 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
143 /* A hash table storing CONST_INTs whose absolute value is greater
144 than MAX_SAVED_CONST_INT. */
146 static htab_t const_int_htab;
148 /* A hash table storing memory attribute structures. */
149 static htab_t mem_attrs_htab;
151 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
152 shortly thrown away. We use two mechanisms to prevent this waste:
154 For sizes up to 5 elements, we keep a SEQUENCE and its associated
155 rtvec for use by gen_sequence. One entry for each size is
156 sufficient because most cases are calls to gen_sequence followed by
157 immediately emitting the SEQUENCE. Reuse is safe since emitting a
158 sequence is destructive on the insn in it anyway and hence can't be
161 We do not bother to save this cached data over nested function calls.
162 Instead, we just reinitialize them. */
164 #define SEQUENCE_RESULT_SIZE 5
166 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
168 /* During RTL generation, we also keep a list of free INSN rtl codes. */
169 static rtx free_insn;
171 #define first_insn (cfun->emit->x_first_insn)
172 #define last_insn (cfun->emit->x_last_insn)
173 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
174 #define last_linenum (cfun->emit->x_last_linenum)
175 #define last_filename (cfun->emit->x_last_filename)
176 #define first_label_num (cfun->emit->x_first_label_num)
178 static rtx make_jump_insn_raw PARAMS ((rtx));
179 static rtx make_call_insn_raw PARAMS ((rtx));
180 static rtx find_line_note PARAMS ((rtx));
181 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
182 static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx,
184 static void unshare_all_rtl_1 PARAMS ((rtx));
185 static void unshare_all_decls PARAMS ((tree));
186 static void reset_used_decls PARAMS ((tree));
187 static void mark_label_nuses PARAMS ((rtx));
188 static hashval_t const_int_htab_hash PARAMS ((const void *));
189 static int const_int_htab_eq PARAMS ((const void *,
191 static hashval_t mem_attrs_htab_hash PARAMS ((const void *));
192 static int mem_attrs_htab_eq PARAMS ((const void *,
194 static void mem_attrs_mark PARAMS ((const void *));
195 static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
198 static tree component_ref_for_mem_expr PARAMS ((tree));
199 static rtx gen_const_vector_0 PARAMS ((enum machine_mode));
201 /* Probability of the conditional branch currently proceeded by try_split.
202 Set to -1 otherwise. */
203 int split_branch_probability = -1;
205 /* Returns a hash code for X (which is a really a CONST_INT). */
208 const_int_htab_hash (x)
211 return (hashval_t) INTVAL ((const struct rtx_def *) x);
214 /* Returns non-zero if the value represented by X (which is really a
215 CONST_INT) is the same as that given by Y (which is really a
219 const_int_htab_eq (x, y)
223 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
226 /* Returns a hash code for X (which is a really a mem_attrs *). */
229 mem_attrs_htab_hash (x)
232 mem_attrs *p = (mem_attrs *) x;
234 return (p->alias ^ (p->align * 1000)
235 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
236 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
240 /* Returns non-zero if the value represented by X (which is really a
241 mem_attrs *) is the same as that given by Y (which is also really a
245 mem_attrs_htab_eq (x, y)
249 mem_attrs *p = (mem_attrs *) x;
250 mem_attrs *q = (mem_attrs *) y;
252 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
253 && p->size == q->size && p->align == q->align);
256 /* This routine is called when we determine that we need a mem_attrs entry.
257 It marks the associated decl and RTL as being used, if present. */
263 mem_attrs *p = (mem_attrs *) x;
266 ggc_mark_tree (p->expr);
269 ggc_mark_rtx (p->offset);
272 ggc_mark_rtx (p->size);
275 /* Allocate a new mem_attrs structure and insert it into the hash table if
276 one identical to it is not already in the table. We are doing this for
280 get_mem_attrs (alias, expr, offset, size, align, mode)
286 enum machine_mode mode;
291 /* If everything is the default, we can just return zero. */
292 if (alias == 0 && expr == 0 && offset == 0
294 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
295 && (align == BITS_PER_UNIT
297 && mode != BLKmode && align == GET_MODE_ALIGNMENT (mode))))
302 attrs.offset = offset;
306 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
309 *slot = ggc_alloc (sizeof (mem_attrs));
310 memcpy (*slot, &attrs, sizeof (mem_attrs));
316 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
317 don't attempt to share with the various global pieces of rtl (such as
318 frame_pointer_rtx). */
321 gen_raw_REG (mode, regno)
322 enum machine_mode mode;
325 rtx x = gen_rtx_raw_REG (mode, regno);
326 ORIGINAL_REGNO (x) = regno;
330 /* There are some RTL codes that require special attention; the generation
331 functions do the raw handling. If you add to this list, modify
332 special_rtx in gengenrtl.c as well. */
335 gen_rtx_CONST_INT (mode, arg)
336 enum machine_mode mode ATTRIBUTE_UNUSED;
341 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
342 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
344 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
345 if (const_true_rtx && arg == STORE_FLAG_VALUE)
346 return const_true_rtx;
349 /* Look up the CONST_INT in the hash table. */
350 slot = htab_find_slot_with_hash (const_int_htab, &arg,
351 (hashval_t) arg, INSERT);
353 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
359 gen_int_mode (c, mode)
361 enum machine_mode mode;
363 return GEN_INT (trunc_int_for_mode (c, mode));
366 /* CONST_DOUBLEs needs special handling because their length is known
370 gen_rtx_CONST_DOUBLE (mode, arg0, arg1)
371 enum machine_mode mode;
372 HOST_WIDE_INT arg0, arg1;
374 rtx r = rtx_alloc (CONST_DOUBLE);
378 X0EXP (r, 0) = NULL_RTX;
382 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 2; --i)
389 gen_rtx_REG (mode, regno)
390 enum machine_mode mode;
393 /* In case the MD file explicitly references the frame pointer, have
394 all such references point to the same frame pointer. This is
395 used during frame pointer elimination to distinguish the explicit
396 references to these registers from pseudos that happened to be
399 If we have eliminated the frame pointer or arg pointer, we will
400 be using it as a normal register, for example as a spill
401 register. In such cases, we might be accessing it in a mode that
402 is not Pmode and therefore cannot use the pre-allocated rtx.
404 Also don't do this when we are making new REGs in reload, since
405 we don't want to get confused with the real pointers. */
407 if (mode == Pmode && !reload_in_progress)
409 if (regno == FRAME_POINTER_REGNUM)
410 return frame_pointer_rtx;
411 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
412 if (regno == HARD_FRAME_POINTER_REGNUM)
413 return hard_frame_pointer_rtx;
415 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
416 if (regno == ARG_POINTER_REGNUM)
417 return arg_pointer_rtx;
419 #ifdef RETURN_ADDRESS_POINTER_REGNUM
420 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
421 return return_address_pointer_rtx;
423 if (regno == PIC_OFFSET_TABLE_REGNUM
424 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
425 return pic_offset_table_rtx;
426 if (regno == STACK_POINTER_REGNUM)
427 return stack_pointer_rtx;
430 return gen_raw_REG (mode, regno);
434 gen_rtx_MEM (mode, addr)
435 enum machine_mode mode;
438 rtx rt = gen_rtx_raw_MEM (mode, addr);
440 /* This field is not cleared by the mere allocation of the rtx, so
448 gen_rtx_SUBREG (mode, reg, offset)
449 enum machine_mode mode;
453 /* This is the most common failure type.
454 Catch it early so we can see who does it. */
455 if ((offset % GET_MODE_SIZE (mode)) != 0)
458 /* This check isn't usable right now because combine will
459 throw arbitrary crap like a CALL into a SUBREG in
460 gen_lowpart_for_combine so we must just eat it. */
462 /* Check for this too. */
463 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
466 return gen_rtx_fmt_ei (SUBREG, mode, reg, offset);
469 /* Generate a SUBREG representing the least-significant part of REG if MODE
470 is smaller than mode of REG, otherwise paradoxical SUBREG. */
473 gen_lowpart_SUBREG (mode, reg)
474 enum machine_mode mode;
477 enum machine_mode inmode;
479 inmode = GET_MODE (reg);
480 if (inmode == VOIDmode)
482 return gen_rtx_SUBREG (mode, reg,
483 subreg_lowpart_offset (mode, inmode));
486 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
488 ** This routine generates an RTX of the size specified by
489 ** <code>, which is an RTX code. The RTX structure is initialized
490 ** from the arguments <element1> through <elementn>, which are
491 ** interpreted according to the specific RTX type's format. The
492 ** special machine mode associated with the rtx (if any) is specified
495 ** gen_rtx can be invoked in a way which resembles the lisp-like
496 ** rtx it will generate. For example, the following rtx structure:
498 ** (plus:QI (mem:QI (reg:SI 1))
499 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
501 ** ...would be generated by the following C code:
503 ** gen_rtx (PLUS, QImode,
504 ** gen_rtx (MEM, QImode,
505 ** gen_rtx (REG, SImode, 1)),
506 ** gen_rtx (MEM, QImode,
507 ** gen_rtx (PLUS, SImode,
508 ** gen_rtx (REG, SImode, 2),
509 ** gen_rtx (REG, SImode, 3)))),
514 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
516 int i; /* Array indices... */
517 const char *fmt; /* Current rtx's format... */
518 rtx rt_val; /* RTX to return to caller... */
521 VA_FIXEDARG (p, enum rtx_code, code);
522 VA_FIXEDARG (p, enum machine_mode, mode);
527 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
532 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
533 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
535 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1);
540 rt_val = gen_rtx_REG (mode, va_arg (p, int));
544 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
548 rt_val = rtx_alloc (code); /* Allocate the storage space. */
549 rt_val->mode = mode; /* Store the machine mode... */
551 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
552 for (i = 0; i < GET_RTX_LENGTH (code); i++)
556 case '0': /* Unused field. */
559 case 'i': /* An integer? */
560 XINT (rt_val, i) = va_arg (p, int);
563 case 'w': /* A wide integer? */
564 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
567 case 's': /* A string? */
568 XSTR (rt_val, i) = va_arg (p, char *);
571 case 'e': /* An expression? */
572 case 'u': /* An insn? Same except when printing. */
573 XEXP (rt_val, i) = va_arg (p, rtx);
576 case 'E': /* An RTX vector? */
577 XVEC (rt_val, i) = va_arg (p, rtvec);
580 case 'b': /* A bitmap? */
581 XBITMAP (rt_val, i) = va_arg (p, bitmap);
584 case 't': /* A tree? */
585 XTREE (rt_val, i) = va_arg (p, tree);
599 /* gen_rtvec (n, [rt1, ..., rtn])
601 ** This routine creates an rtvec and stores within it the
602 ** pointers to rtx's which are its arguments.
607 gen_rtvec VPARAMS ((int n, ...))
613 VA_FIXEDARG (p, int, n);
616 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
618 vector = (rtx *) alloca (n * sizeof (rtx));
620 for (i = 0; i < n; i++)
621 vector[i] = va_arg (p, rtx);
623 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
627 return gen_rtvec_v (save_n, vector);
631 gen_rtvec_v (n, argp)
639 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
641 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
643 for (i = 0; i < n; i++)
644 rt_val->elem[i] = *argp++;
649 /* Generate a REG rtx for a new pseudo register of mode MODE.
650 This pseudo is assigned the next sequential register number. */
654 enum machine_mode mode;
656 struct function *f = cfun;
659 /* Don't let anything called after initial flow analysis create new
664 if (generating_concat_p
665 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
666 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
668 /* For complex modes, don't make a single pseudo.
669 Instead, make a CONCAT of two pseudos.
670 This allows noncontiguous allocation of the real and imaginary parts,
671 which makes much better code. Besides, allocating DCmode
672 pseudos overstrains reload on some machines like the 386. */
673 rtx realpart, imagpart;
674 int size = GET_MODE_UNIT_SIZE (mode);
675 enum machine_mode partmode
676 = mode_for_size (size * BITS_PER_UNIT,
677 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
678 ? MODE_FLOAT : MODE_INT),
681 realpart = gen_reg_rtx (partmode);
682 imagpart = gen_reg_rtx (partmode);
683 return gen_rtx_CONCAT (mode, realpart, imagpart);
686 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
687 enough to have an element for this pseudo reg number. */
689 if (reg_rtx_no == f->emit->regno_pointer_align_length)
691 int old_size = f->emit->regno_pointer_align_length;
696 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
697 memset (new + old_size, 0, old_size);
698 f->emit->regno_pointer_align = (unsigned char *) new;
700 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
701 old_size * 2 * sizeof (rtx));
702 memset (new1 + old_size, 0, old_size * sizeof (rtx));
703 regno_reg_rtx = new1;
705 new2 = (tree *) xrealloc (f->emit->regno_decl,
706 old_size * 2 * sizeof (tree));
707 memset (new2 + old_size, 0, old_size * sizeof (tree));
708 f->emit->regno_decl = new2;
710 f->emit->regno_pointer_align_length = old_size * 2;
713 val = gen_raw_REG (mode, reg_rtx_no);
714 regno_reg_rtx[reg_rtx_no++] = val;
718 /* Identify REG (which may be a CONCAT) as a user register. */
724 if (GET_CODE (reg) == CONCAT)
726 REG_USERVAR_P (XEXP (reg, 0)) = 1;
727 REG_USERVAR_P (XEXP (reg, 1)) = 1;
729 else if (GET_CODE (reg) == REG)
730 REG_USERVAR_P (reg) = 1;
735 /* Identify REG as a probable pointer register and show its alignment
736 as ALIGN, if nonzero. */
739 mark_reg_pointer (reg, align)
743 if (! REG_POINTER (reg))
745 REG_POINTER (reg) = 1;
748 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
750 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
751 /* We can no-longer be sure just how aligned this pointer is */
752 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
755 /* Return 1 plus largest pseudo reg number used in the current function. */
763 /* Return 1 + the largest label number used so far in the current function. */
768 if (last_label_num && label_num == base_label_num)
769 return last_label_num;
773 /* Return first label number used in this function (if any were used). */
776 get_first_label_num ()
778 return first_label_num;
781 /* Return the final regno of X, which is a SUBREG of a hard
784 subreg_hard_regno (x, check_mode)
788 enum machine_mode mode = GET_MODE (x);
789 unsigned int byte_offset, base_regno, final_regno;
790 rtx reg = SUBREG_REG (x);
792 /* This is where we attempt to catch illegal subregs
793 created by the compiler. */
794 if (GET_CODE (x) != SUBREG
795 || GET_CODE (reg) != REG)
797 base_regno = REGNO (reg);
798 if (base_regno >= FIRST_PSEUDO_REGISTER)
800 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
803 /* Catch non-congruent offsets too. */
804 byte_offset = SUBREG_BYTE (x);
805 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
808 final_regno = subreg_regno (x);
813 /* Return a value representing some low-order bits of X, where the number
814 of low-order bits is given by MODE. Note that no conversion is done
815 between floating-point and fixed-point values, rather, the bit
816 representation is returned.
818 This function handles the cases in common between gen_lowpart, below,
819 and two variants in cse.c and combine.c. These are the cases that can
820 be safely handled at all points in the compilation.
822 If this is not a case we can handle, return 0. */
825 gen_lowpart_common (mode, x)
826 enum machine_mode mode;
829 int msize = GET_MODE_SIZE (mode);
830 int xsize = GET_MODE_SIZE (GET_MODE (x));
833 if (GET_MODE (x) == mode)
836 /* MODE must occupy no more words than the mode of X. */
837 if (GET_MODE (x) != VOIDmode
838 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
839 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
842 offset = subreg_lowpart_offset (mode, GET_MODE (x));
844 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
845 && (GET_MODE_CLASS (mode) == MODE_INT
846 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
848 /* If we are getting the low-order part of something that has been
849 sign- or zero-extended, we can either just use the object being
850 extended or make a narrower extension. If we want an even smaller
851 piece than the size of the object being extended, call ourselves
854 This case is used mostly by combine and cse. */
856 if (GET_MODE (XEXP (x, 0)) == mode)
858 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
859 return gen_lowpart_common (mode, XEXP (x, 0));
860 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
861 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
863 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
864 || GET_CODE (x) == CONCAT)
865 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
866 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
867 from the low-order part of the constant. */
868 else if ((GET_MODE_CLASS (mode) == MODE_INT
869 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
870 && GET_MODE (x) == VOIDmode
871 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
873 /* If MODE is twice the host word size, X is already the desired
874 representation. Otherwise, if MODE is wider than a word, we can't
875 do this. If MODE is exactly a word, return just one CONST_INT. */
877 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
879 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
881 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
882 return (GET_CODE (x) == CONST_INT ? x
883 : GEN_INT (CONST_DOUBLE_LOW (x)));
886 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
887 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
888 : CONST_DOUBLE_LOW (x));
890 /* Sign extend to HOST_WIDE_INT. */
891 val = trunc_int_for_mode (val, mode);
893 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
898 /* The floating-point emulator can handle all conversions between
899 FP and integer operands. This simplifies reload because it
900 doesn't have to deal with constructs like (subreg:DI
901 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
902 /* Single-precision floats are always 32-bits and double-precision
903 floats are always 64-bits. */
905 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
906 && GET_MODE_BITSIZE (mode) == 32
907 && GET_CODE (x) == CONST_INT)
913 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
914 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
916 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
917 && GET_MODE_BITSIZE (mode) == 64
918 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
919 && GET_MODE (x) == VOIDmode)
923 HOST_WIDE_INT low, high;
925 if (GET_CODE (x) == CONST_INT)
928 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
932 low = CONST_DOUBLE_LOW (x);
933 high = CONST_DOUBLE_HIGH (x);
936 #if HOST_BITS_PER_WIDE_INT == 32
937 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
939 if (WORDS_BIG_ENDIAN)
940 i[0] = high, i[1] = low;
942 i[0] = low, i[1] = high;
947 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
948 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
950 else if ((GET_MODE_CLASS (mode) == MODE_INT
951 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
952 && GET_CODE (x) == CONST_DOUBLE
953 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
956 long i[4]; /* Only the low 32 bits of each 'long' are used. */
957 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
959 /* Convert 'r' into an array of four 32-bit words in target word
961 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
962 switch (GET_MODE_BITSIZE (GET_MODE (x)))
965 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
968 i[3 - 3 * endian] = 0;
971 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
972 i[2 - 2 * endian] = 0;
973 i[3 - 2 * endian] = 0;
976 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
977 i[3 - 3 * endian] = 0;
980 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
985 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
987 #if HOST_BITS_PER_WIDE_INT == 32
988 return immed_double_const (i[3 * endian], i[1 + endian], mode);
990 if (HOST_BITS_PER_WIDE_INT != 64)
993 return immed_double_const ((((unsigned long) i[3 * endian])
994 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
995 (((unsigned long) i[2 - endian])
996 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
1001 /* Otherwise, we can't do this. */
1005 /* Return the real part (which has mode MODE) of a complex value X.
1006 This always comes at the low address in memory. */
1009 gen_realpart (mode, x)
1010 enum machine_mode mode;
1013 if (WORDS_BIG_ENDIAN
1014 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1016 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1018 ("can't access real part of complex value in hard register");
1019 else if (WORDS_BIG_ENDIAN)
1020 return gen_highpart (mode, x);
1022 return gen_lowpart (mode, x);
1025 /* Return the imaginary part (which has mode MODE) of a complex value X.
1026 This always comes at the high address in memory. */
1029 gen_imagpart (mode, x)
1030 enum machine_mode mode;
1033 if (WORDS_BIG_ENDIAN)
1034 return gen_lowpart (mode, x);
1035 else if (! WORDS_BIG_ENDIAN
1036 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1038 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1040 ("can't access imaginary part of complex value in hard register");
1042 return gen_highpart (mode, x);
1045 /* Return 1 iff X, assumed to be a SUBREG,
1046 refers to the real part of the complex value in its containing reg.
1047 Complex values are always stored with the real part in the first word,
1048 regardless of WORDS_BIG_ENDIAN. */
1051 subreg_realpart_p (x)
1054 if (GET_CODE (x) != SUBREG)
1057 return ((unsigned int) SUBREG_BYTE (x)
1058 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1061 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1062 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1063 least-significant part of X.
1064 MODE specifies how big a part of X to return;
1065 it usually should not be larger than a word.
1066 If X is a MEM whose address is a QUEUED, the value may be so also. */
1069 gen_lowpart (mode, x)
1070 enum machine_mode mode;
1073 rtx result = gen_lowpart_common (mode, x);
1077 else if (GET_CODE (x) == REG)
1079 /* Must be a hard reg that's not valid in MODE. */
1080 result = gen_lowpart_common (mode, copy_to_reg (x));
1085 else if (GET_CODE (x) == MEM)
1087 /* The only additional case we can do is MEM. */
1089 if (WORDS_BIG_ENDIAN)
1090 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1091 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1093 if (BYTES_BIG_ENDIAN)
1094 /* Adjust the address so that the address-after-the-data
1096 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1097 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1099 return adjust_address (x, mode, offset);
1101 else if (GET_CODE (x) == ADDRESSOF)
1102 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1107 /* Like `gen_lowpart', but refer to the most significant part.
1108 This is used to access the imaginary part of a complex number. */
1111 gen_highpart (mode, x)
1112 enum machine_mode mode;
1115 unsigned int msize = GET_MODE_SIZE (mode);
1118 /* This case loses if X is a subreg. To catch bugs early,
1119 complain if an invalid MODE is used even in other cases. */
1120 if (msize > UNITS_PER_WORD
1121 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1124 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1125 subreg_highpart_offset (mode, GET_MODE (x)));
1127 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1128 the target if we have a MEM. gen_highpart must return a valid operand,
1129 emitting code if necessary to do so. */
1130 if (result != NULL_RTX && GET_CODE (result) == MEM)
1131 result = validize_mem (result);
1138 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1139 be VOIDmode constant. */
1141 gen_highpart_mode (outermode, innermode, exp)
1142 enum machine_mode outermode, innermode;
1145 if (GET_MODE (exp) != VOIDmode)
1147 if (GET_MODE (exp) != innermode)
1149 return gen_highpart (outermode, exp);
1151 return simplify_gen_subreg (outermode, exp, innermode,
1152 subreg_highpart_offset (outermode, innermode));
1155 /* Return offset in bytes to get OUTERMODE low part
1156 of the value in mode INNERMODE stored in memory in target format. */
1159 subreg_lowpart_offset (outermode, innermode)
1160 enum machine_mode outermode, innermode;
1162 unsigned int offset = 0;
1163 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1167 if (WORDS_BIG_ENDIAN)
1168 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1169 if (BYTES_BIG_ENDIAN)
1170 offset += difference % UNITS_PER_WORD;
1176 /* Return offset in bytes to get OUTERMODE high part
1177 of the value in mode INNERMODE stored in memory in target format. */
1179 subreg_highpart_offset (outermode, innermode)
1180 enum machine_mode outermode, innermode;
1182 unsigned int offset = 0;
1183 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1185 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1190 if (! WORDS_BIG_ENDIAN)
1191 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1192 if (! BYTES_BIG_ENDIAN)
1193 offset += difference % UNITS_PER_WORD;
1199 /* Return 1 iff X, assumed to be a SUBREG,
1200 refers to the least significant part of its containing reg.
1201 If X is not a SUBREG, always return 1 (it is its own low part!). */
1204 subreg_lowpart_p (x)
1207 if (GET_CODE (x) != SUBREG)
1209 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1212 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1213 == SUBREG_BYTE (x));
1217 /* Helper routine for all the constant cases of operand_subword.
1218 Some places invoke this directly. */
1221 constant_subword (op, offset, mode)
1224 enum machine_mode mode;
1226 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1229 /* If OP is already an integer word, return it. */
1230 if (GET_MODE_CLASS (mode) == MODE_INT
1231 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1234 /* The output is some bits, the width of the target machine's word.
1235 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1237 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1238 && GET_MODE_CLASS (mode) == MODE_FLOAT
1239 && GET_MODE_BITSIZE (mode) == 64
1240 && GET_CODE (op) == CONST_DOUBLE)
1245 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1246 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1248 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1249 which the words are written depends on the word endianness.
1250 ??? This is a potential portability problem and should
1251 be fixed at some point.
1253 We must exercise caution with the sign bit. By definition there
1254 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1255 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1256 So we explicitly mask and sign-extend as necessary. */
1257 if (BITS_PER_WORD == 32)
1260 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1261 return GEN_INT (val);
1263 #if HOST_BITS_PER_WIDE_INT >= 64
1264 else if (BITS_PER_WORD >= 64 && offset == 0)
1266 val = k[! WORDS_BIG_ENDIAN];
1267 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1268 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1269 return GEN_INT (val);
1272 else if (BITS_PER_WORD == 16)
1274 val = k[offset >> 1];
1275 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1277 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1278 return GEN_INT (val);
1283 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1284 && GET_MODE_CLASS (mode) == MODE_FLOAT
1285 && GET_MODE_BITSIZE (mode) > 64
1286 && GET_CODE (op) == CONST_DOUBLE)
1291 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1292 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1294 if (BITS_PER_WORD == 32)
1297 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1298 return GEN_INT (val);
1300 #if HOST_BITS_PER_WIDE_INT >= 64
1301 else if (BITS_PER_WORD >= 64 && offset <= 1)
1303 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1304 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1305 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1306 return GEN_INT (val);
1313 /* Single word float is a little harder, since single- and double-word
1314 values often do not have the same high-order bits. We have already
1315 verified that we want the only defined word of the single-word value. */
1316 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1317 && GET_MODE_BITSIZE (mode) == 32
1318 && GET_CODE (op) == CONST_DOUBLE)
1323 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1324 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1326 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1328 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1330 if (BITS_PER_WORD == 16)
1332 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1334 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1337 return GEN_INT (val);
1340 /* The only remaining cases that we can handle are integers.
1341 Convert to proper endianness now since these cases need it.
1342 At this point, offset == 0 means the low-order word.
1344 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1345 in general. However, if OP is (const_int 0), we can just return
1348 if (op == const0_rtx)
1351 if (GET_MODE_CLASS (mode) != MODE_INT
1352 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1353 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1356 if (WORDS_BIG_ENDIAN)
1357 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1359 /* Find out which word on the host machine this value is in and get
1360 it from the constant. */
1361 val = (offset / size_ratio == 0
1362 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1363 : (GET_CODE (op) == CONST_INT
1364 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1366 /* Get the value we want into the low bits of val. */
1367 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1368 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1370 val = trunc_int_for_mode (val, word_mode);
1372 return GEN_INT (val);
1375 /* Return subword OFFSET of operand OP.
1376 The word number, OFFSET, is interpreted as the word number starting
1377 at the low-order address. OFFSET 0 is the low-order word if not
1378 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1380 If we cannot extract the required word, we return zero. Otherwise,
1381 an rtx corresponding to the requested word will be returned.
1383 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1384 reload has completed, a valid address will always be returned. After
1385 reload, if a valid address cannot be returned, we return zero.
1387 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1388 it is the responsibility of the caller.
1390 MODE is the mode of OP in case it is a CONST_INT.
1392 ??? This is still rather broken for some cases. The problem for the
1393 moment is that all callers of this thing provide no 'goal mode' to
1394 tell us to work with. This exists because all callers were written
1395 in a word based SUBREG world.
1396 Now use of this function can be deprecated by simplify_subreg in most
1401 operand_subword (op, offset, validate_address, mode)
1403 unsigned int offset;
1404 int validate_address;
1405 enum machine_mode mode;
1407 if (mode == VOIDmode)
1408 mode = GET_MODE (op);
1410 if (mode == VOIDmode)
1413 /* If OP is narrower than a word, fail. */
1415 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1418 /* If we want a word outside OP, return zero. */
1420 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1423 /* Form a new MEM at the requested address. */
1424 if (GET_CODE (op) == MEM)
1426 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1428 if (! validate_address)
1431 else if (reload_completed)
1433 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1437 return replace_equiv_address (new, XEXP (new, 0));
1440 /* Rest can be handled by simplify_subreg. */
1441 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1444 /* Similar to `operand_subword', but never return 0. If we can't extract
1445 the required subword, put OP into a register and try again. If that fails,
1446 abort. We always validate the address in this case.
1448 MODE is the mode of OP, in case it is CONST_INT. */
1451 operand_subword_force (op, offset, mode)
1453 unsigned int offset;
1454 enum machine_mode mode;
1456 rtx result = operand_subword (op, offset, 1, mode);
1461 if (mode != BLKmode && mode != VOIDmode)
1463 /* If this is a register which can not be accessed by words, copy it
1464 to a pseudo register. */
1465 if (GET_CODE (op) == REG)
1466 op = copy_to_reg (op);
1468 op = force_reg (mode, op);
1471 result = operand_subword (op, offset, 1, mode);
1478 /* Given a compare instruction, swap the operands.
1479 A test instruction is changed into a compare of 0 against the operand. */
1482 reverse_comparison (insn)
1485 rtx body = PATTERN (insn);
1488 if (GET_CODE (body) == SET)
1489 comp = SET_SRC (body);
1491 comp = SET_SRC (XVECEXP (body, 0, 0));
1493 if (GET_CODE (comp) == COMPARE)
1495 rtx op0 = XEXP (comp, 0);
1496 rtx op1 = XEXP (comp, 1);
1497 XEXP (comp, 0) = op1;
1498 XEXP (comp, 1) = op0;
1502 rtx new = gen_rtx_COMPARE (VOIDmode,
1503 CONST0_RTX (GET_MODE (comp)), comp);
1504 if (GET_CODE (body) == SET)
1505 SET_SRC (body) = new;
1507 SET_SRC (XVECEXP (body, 0, 0)) = new;
1511 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1512 or (2) a component ref of something variable. Represent the later with
1513 a NULL expression. */
1516 component_ref_for_mem_expr (ref)
1519 tree inner = TREE_OPERAND (ref, 0);
1521 if (TREE_CODE (inner) == COMPONENT_REF)
1522 inner = component_ref_for_mem_expr (inner);
1525 tree placeholder_ptr = 0;
1527 /* Now remove any conversions: they don't change what the underlying
1528 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1529 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1530 || TREE_CODE (inner) == NON_LVALUE_EXPR
1531 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1532 || TREE_CODE (inner) == SAVE_EXPR
1533 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1534 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1535 inner = find_placeholder (inner, &placeholder_ptr);
1537 inner = TREE_OPERAND (inner, 0);
1539 if (! DECL_P (inner))
1543 if (inner == TREE_OPERAND (ref, 0))
1546 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1547 TREE_OPERAND (ref, 1));
1550 /* Given REF, a MEM, and T, either the type of X or the expression
1551 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1552 if we are making a new object of this type. */
1555 set_mem_attributes (ref, t, objectp)
1560 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1561 tree expr = MEM_EXPR (ref);
1562 rtx offset = MEM_OFFSET (ref);
1563 rtx size = MEM_SIZE (ref);
1564 unsigned int align = MEM_ALIGN (ref);
1567 /* It can happen that type_for_mode was given a mode for which there
1568 is no language-level type. In which case it returns NULL, which
1573 type = TYPE_P (t) ? t : TREE_TYPE (t);
1575 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1576 wrong answer, as it assumes that DECL_RTL already has the right alias
1577 info. Callers should not set DECL_RTL until after the call to
1578 set_mem_attributes. */
1579 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1582 /* Get the alias set from the expression or type (perhaps using a
1583 front-end routine) and use it. */
1584 alias = get_alias_set (t);
1586 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1587 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1588 RTX_UNCHANGING_P (ref)
1589 |= ((lang_hooks.honor_readonly
1590 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1591 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1593 /* If we are making an object of this type, or if this is a DECL, we know
1594 that it is a scalar if the type is not an aggregate. */
1595 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1596 MEM_SCALAR_P (ref) = 1;
1598 /* We can set the alignment from the type if we are making an object,
1599 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1600 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1601 align = MAX (align, TYPE_ALIGN (type));
1603 /* If the size is known, we can set that. */
1604 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1605 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1607 /* If T is not a type, we may be able to deduce some more information about
1611 maybe_set_unchanging (ref, t);
1612 if (TREE_THIS_VOLATILE (t))
1613 MEM_VOLATILE_P (ref) = 1;
1615 /* Now remove any conversions: they don't change what the underlying
1616 object is. Likewise for SAVE_EXPR. */
1617 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1618 || TREE_CODE (t) == NON_LVALUE_EXPR
1619 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1620 || TREE_CODE (t) == SAVE_EXPR)
1621 t = TREE_OPERAND (t, 0);
1623 /* If this expression can't be addressed (e.g., it contains a reference
1624 to a non-addressable field), show we don't change its alias set. */
1625 if (! can_address_p (t))
1626 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1628 /* If this is a decl, set the attributes of the MEM from it. */
1632 offset = const0_rtx;
1633 size = (DECL_SIZE_UNIT (t)
1634 && host_integerp (DECL_SIZE_UNIT (t), 1)
1635 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1636 align = DECL_ALIGN (t);
1639 /* If this is a constant, we know the alignment. */
1640 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1642 align = TYPE_ALIGN (type);
1643 #ifdef CONSTANT_ALIGNMENT
1644 align = CONSTANT_ALIGNMENT (t, align);
1648 /* If this is a field reference and not a bit-field, record it. */
1649 /* ??? There is some information that can be gleened from bit-fields,
1650 such as the word offset in the structure that might be modified.
1651 But skip it for now. */
1652 else if (TREE_CODE (t) == COMPONENT_REF
1653 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1655 expr = component_ref_for_mem_expr (t);
1656 offset = const0_rtx;
1657 /* ??? Any reason the field size would be different than
1658 the size we got from the type? */
1661 /* If this is an array reference, look for an outer field reference. */
1662 else if (TREE_CODE (t) == ARRAY_REF)
1664 tree off_tree = size_zero_node;
1669 = fold (build (PLUS_EXPR, sizetype,
1670 fold (build (MULT_EXPR, sizetype,
1671 TREE_OPERAND (t, 1),
1672 TYPE_SIZE_UNIT (TREE_TYPE (t)))),
1674 t = TREE_OPERAND (t, 0);
1676 while (TREE_CODE (t) == ARRAY_REF);
1678 if (TREE_CODE (t) == COMPONENT_REF)
1680 expr = component_ref_for_mem_expr (t);
1681 if (host_integerp (off_tree, 1))
1682 offset = GEN_INT (tree_low_cst (off_tree, 1));
1683 /* ??? Any reason the field size would be different than
1684 the size we got from the type? */
1689 /* Now set the attributes we computed above. */
1691 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1693 /* If this is already known to be a scalar or aggregate, we are done. */
1694 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1697 /* If it is a reference into an aggregate, this is part of an aggregate.
1698 Otherwise we don't know. */
1699 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1700 || TREE_CODE (t) == ARRAY_RANGE_REF
1701 || TREE_CODE (t) == BIT_FIELD_REF)
1702 MEM_IN_STRUCT_P (ref) = 1;
1705 /* Set the alias set of MEM to SET. */
1708 set_mem_alias_set (mem, set)
1712 #ifdef ENABLE_CHECKING
1713 /* If the new and old alias sets don't conflict, something is wrong. */
1714 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1718 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1719 MEM_SIZE (mem), MEM_ALIGN (mem),
1723 /* Set the alignment of MEM to ALIGN bits. */
1726 set_mem_align (mem, align)
1730 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1731 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1735 /* Set the expr for MEM to EXPR. */
1738 set_mem_expr (mem, expr)
1743 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1744 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1747 /* Set the offset of MEM to OFFSET. */
1750 set_mem_offset (mem, offset)
1753 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1754 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1758 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1759 and its address changed to ADDR. (VOIDmode means don't change the mode.
1760 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1761 returned memory location is required to be valid. The memory
1762 attributes are not changed. */
1765 change_address_1 (memref, mode, addr, validate)
1767 enum machine_mode mode;
1773 if (GET_CODE (memref) != MEM)
1775 if (mode == VOIDmode)
1776 mode = GET_MODE (memref);
1778 addr = XEXP (memref, 0);
1782 if (reload_in_progress || reload_completed)
1784 if (! memory_address_p (mode, addr))
1788 addr = memory_address (mode, addr);
1791 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1794 new = gen_rtx_MEM (mode, addr);
1795 MEM_COPY_ATTRIBUTES (new, memref);
1799 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1800 way we are changing MEMREF, so we only preserve the alias set. */
1803 change_address (memref, mode, addr)
1805 enum machine_mode mode;
1808 rtx new = change_address_1 (memref, mode, addr, 1);
1809 enum machine_mode mmode = GET_MODE (new);
1812 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
1813 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
1814 (mmode == BLKmode ? BITS_PER_UNIT
1815 : GET_MODE_ALIGNMENT (mmode)),
1821 /* Return a memory reference like MEMREF, but with its mode changed
1822 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1823 nonzero, the memory address is forced to be valid.
1824 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1825 and caller is responsible for adjusting MEMREF base register. */
1828 adjust_address_1 (memref, mode, offset, validate, adjust)
1830 enum machine_mode mode;
1831 HOST_WIDE_INT offset;
1832 int validate, adjust;
1834 rtx addr = XEXP (memref, 0);
1836 rtx memoffset = MEM_OFFSET (memref);
1838 unsigned int memalign = MEM_ALIGN (memref);
1840 /* ??? Prefer to create garbage instead of creating shared rtl.
1841 This may happen even if offset is non-zero -- consider
1842 (plus (plus reg reg) const_int) -- so do this always. */
1843 addr = copy_rtx (addr);
1847 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1848 object, we can merge it into the LO_SUM. */
1849 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1851 && (unsigned HOST_WIDE_INT) offset
1852 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1853 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1854 plus_constant (XEXP (addr, 1), offset));
1856 addr = plus_constant (addr, offset);
1859 new = change_address_1 (memref, mode, addr, validate);
1861 /* Compute the new values of the memory attributes due to this adjustment.
1862 We add the offsets and update the alignment. */
1864 memoffset = GEN_INT (offset + INTVAL (memoffset));
1866 /* Compute the new alignment by taking the MIN of the alignment and the
1867 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1872 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1874 /* We can compute the size in a number of ways. */
1875 if (GET_MODE (new) != BLKmode)
1876 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1877 else if (MEM_SIZE (memref))
1878 size = plus_constant (MEM_SIZE (memref), -offset);
1880 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1881 memoffset, size, memalign, GET_MODE (new));
1883 /* At some point, we should validate that this offset is within the object,
1884 if all the appropriate values are known. */
1888 /* Return a memory reference like MEMREF, but with its mode changed
1889 to MODE and its address changed to ADDR, which is assumed to be
1890 MEMREF offseted by OFFSET bytes. If VALIDATE is
1891 nonzero, the memory address is forced to be valid. */
1894 adjust_automodify_address_1 (memref, mode, addr, offset, validate)
1896 enum machine_mode mode;
1898 HOST_WIDE_INT offset;
1901 memref = change_address_1 (memref, VOIDmode, addr, validate);
1902 return adjust_address_1 (memref, mode, offset, validate, 0);
1905 /* Return a memory reference like MEMREF, but whose address is changed by
1906 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1907 known to be in OFFSET (possibly 1). */
1910 offset_address (memref, offset, pow2)
1915 rtx new, addr = XEXP (memref, 0);
1917 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1919 /* At this point we don't know _why_ the address is invalid. It
1920 could have secondary memory refereces, multiplies or anything.
1922 However, if we did go and rearrange things, we can wind up not
1923 being able to recognize the magic around pic_offset_table_rtx.
1924 This stuff is fragile, and is yet another example of why it is
1925 bad to expose PIC machinery too early. */
1926 if (! memory_address_p (GET_MODE (memref), new)
1927 && GET_CODE (addr) == PLUS
1928 && XEXP (addr, 0) == pic_offset_table_rtx)
1930 addr = force_reg (GET_MODE (addr), addr);
1931 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1934 update_temp_slot_address (XEXP (memref, 0), new);
1935 new = change_address_1 (memref, VOIDmode, new, 1);
1937 /* Update the alignment to reflect the offset. Reset the offset, which
1940 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
1941 MIN (MEM_ALIGN (memref),
1942 (unsigned HOST_WIDE_INT) pow2 * BITS_PER_UNIT),
1947 /* Return a memory reference like MEMREF, but with its address changed to
1948 ADDR. The caller is asserting that the actual piece of memory pointed
1949 to is the same, just the form of the address is being changed, such as
1950 by putting something into a register. */
1953 replace_equiv_address (memref, addr)
1957 /* change_address_1 copies the memory attribute structure without change
1958 and that's exactly what we want here. */
1959 update_temp_slot_address (XEXP (memref, 0), addr);
1960 return change_address_1 (memref, VOIDmode, addr, 1);
1963 /* Likewise, but the reference is not required to be valid. */
1966 replace_equiv_address_nv (memref, addr)
1970 return change_address_1 (memref, VOIDmode, addr, 0);
1973 /* Return a memory reference like MEMREF, but with its mode widened to
1974 MODE and offset by OFFSET. This would be used by targets that e.g.
1975 cannot issue QImode memory operations and have to use SImode memory
1976 operations plus masking logic. */
1979 widen_memory_access (memref, mode, offset)
1981 enum machine_mode mode;
1982 HOST_WIDE_INT offset;
1984 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
1985 tree expr = MEM_EXPR (new);
1986 rtx memoffset = MEM_OFFSET (new);
1987 unsigned int size = GET_MODE_SIZE (mode);
1989 /* If we don't know what offset we were at within the expression, then
1990 we can't know if we've overstepped the bounds. */
1996 if (TREE_CODE (expr) == COMPONENT_REF)
1998 tree field = TREE_OPERAND (expr, 1);
2000 if (! DECL_SIZE_UNIT (field))
2006 /* Is the field at least as large as the access? If so, ok,
2007 otherwise strip back to the containing structure. */
2008 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2009 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2010 && INTVAL (memoffset) >= 0)
2013 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2019 expr = TREE_OPERAND (expr, 0);
2020 memoffset = (GEN_INT (INTVAL (memoffset)
2021 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2022 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2025 /* Similarly for the decl. */
2026 else if (DECL_P (expr)
2027 && DECL_SIZE_UNIT (expr)
2028 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2029 && (! memoffset || INTVAL (memoffset) >= 0))
2033 /* The widened memory access overflows the expression, which means
2034 that it could alias another expression. Zap it. */
2041 memoffset = NULL_RTX;
2043 /* The widened memory may alias other stuff, so zap the alias set. */
2044 /* ??? Maybe use get_alias_set on any remaining expression. */
2046 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2047 MEM_ALIGN (new), mode);
2052 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2059 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
2060 NULL_RTX, label_num++, NULL, NULL);
2062 LABEL_NUSES (label) = 0;
2063 LABEL_ALTERNATE_NAME (label) = NULL;
2067 /* For procedure integration. */
2069 /* Install new pointers to the first and last insns in the chain.
2070 Also, set cur_insn_uid to one higher than the last in use.
2071 Used for an inline-procedure after copying the insn chain. */
2074 set_new_first_and_last_insn (first, last)
2083 for (insn = first; insn; insn = NEXT_INSN (insn))
2084 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2089 /* Set the range of label numbers found in the current function.
2090 This is used when belatedly compiling an inline function. */
2093 set_new_first_and_last_label_num (first, last)
2096 base_label_num = label_num;
2097 first_label_num = first;
2098 last_label_num = last;
2101 /* Set the last label number found in the current function.
2102 This is used when belatedly compiling an inline function. */
2105 set_new_last_label_num (last)
2108 base_label_num = label_num;
2109 last_label_num = last;
2112 /* Restore all variables describing the current status from the structure *P.
2113 This is used after a nested function. */
2116 restore_emit_status (p)
2117 struct function *p ATTRIBUTE_UNUSED;
2120 clear_emit_caches ();
2123 /* Clear out all parts of the state in F that can safely be discarded
2124 after the function has been compiled, to let garbage collection
2125 reclaim the memory. */
2128 free_emit_status (f)
2131 free (f->emit->x_regno_reg_rtx);
2132 free (f->emit->regno_pointer_align);
2133 free (f->emit->regno_decl);
2138 /* Go through all the RTL insn bodies and copy any invalid shared
2139 structure. This routine should only be called once. */
2142 unshare_all_rtl (fndecl, insn)
2148 /* Make sure that virtual parameters are not shared. */
2149 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2150 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2152 /* Make sure that virtual stack slots are not shared. */
2153 unshare_all_decls (DECL_INITIAL (fndecl));
2155 /* Unshare just about everything else. */
2156 unshare_all_rtl_1 (insn);
2158 /* Make sure the addresses of stack slots found outside the insn chain
2159 (such as, in DECL_RTL of a variable) are not shared
2160 with the insn chain.
2162 This special care is necessary when the stack slot MEM does not
2163 actually appear in the insn chain. If it does appear, its address
2164 is unshared from all else at that point. */
2165 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2168 /* Go through all the RTL insn bodies and copy any invalid shared
2169 structure, again. This is a fairly expensive thing to do so it
2170 should be done sparingly. */
2173 unshare_all_rtl_again (insn)
2179 for (p = insn; p; p = NEXT_INSN (p))
2182 reset_used_flags (PATTERN (p));
2183 reset_used_flags (REG_NOTES (p));
2184 reset_used_flags (LOG_LINKS (p));
2187 /* Make sure that virtual stack slots are not shared. */
2188 reset_used_decls (DECL_INITIAL (cfun->decl));
2190 /* Make sure that virtual parameters are not shared. */
2191 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2192 reset_used_flags (DECL_RTL (decl));
2194 reset_used_flags (stack_slot_list);
2196 unshare_all_rtl (cfun->decl, insn);
2199 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2200 Assumes the mark bits are cleared at entry. */
2203 unshare_all_rtl_1 (insn)
2206 for (; insn; insn = NEXT_INSN (insn))
2209 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2210 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2211 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2215 /* Go through all virtual stack slots of a function and copy any
2216 shared structure. */
2218 unshare_all_decls (blk)
2223 /* Copy shared decls. */
2224 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2225 if (DECL_RTL_SET_P (t))
2226 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2228 /* Now process sub-blocks. */
2229 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2230 unshare_all_decls (t);
2233 /* Go through all virtual stack slots of a function and mark them as
2236 reset_used_decls (blk)
2242 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2243 if (DECL_RTL_SET_P (t))
2244 reset_used_flags (DECL_RTL (t));
2246 /* Now process sub-blocks. */
2247 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2248 reset_used_decls (t);
2251 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2252 placed in the result directly, rather than being copied. MAY_SHARE is
2253 either a MEM of an EXPR_LIST of MEMs. */
2256 copy_most_rtx (orig, may_share)
2263 const char *format_ptr;
2265 if (orig == may_share
2266 || (GET_CODE (may_share) == EXPR_LIST
2267 && in_expr_list_p (may_share, orig)))
2270 code = GET_CODE (orig);
2288 copy = rtx_alloc (code);
2289 PUT_MODE (copy, GET_MODE (orig));
2290 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2291 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2292 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2293 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2294 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2296 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2298 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2300 switch (*format_ptr++)
2303 XEXP (copy, i) = XEXP (orig, i);
2304 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2305 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2309 XEXP (copy, i) = XEXP (orig, i);
2314 XVEC (copy, i) = XVEC (orig, i);
2315 if (XVEC (orig, i) != NULL)
2317 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2318 for (j = 0; j < XVECLEN (copy, i); j++)
2319 XVECEXP (copy, i, j)
2320 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2325 XWINT (copy, i) = XWINT (orig, i);
2330 XINT (copy, i) = XINT (orig, i);
2334 XTREE (copy, i) = XTREE (orig, i);
2339 XSTR (copy, i) = XSTR (orig, i);
2343 /* Copy this through the wide int field; that's safest. */
2344 X0WINT (copy, i) = X0WINT (orig, i);
2354 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2355 Recursively does the same for subexpressions. */
2358 copy_rtx_if_shared (orig)
2364 const char *format_ptr;
2370 code = GET_CODE (x);
2372 /* These types may be freely shared. */
2386 /* SCRATCH must be shared because they represent distinct values. */
2390 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2391 a LABEL_REF, it isn't sharable. */
2392 if (GET_CODE (XEXP (x, 0)) == PLUS
2393 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2394 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2403 /* The chain of insns is not being copied. */
2407 /* A MEM is allowed to be shared if its address is constant.
2409 We used to allow sharing of MEMs which referenced
2410 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2411 that can lose. instantiate_virtual_regs will not unshare
2412 the MEMs, and combine may change the structure of the address
2413 because it looks safe and profitable in one context, but
2414 in some other context it creates unrecognizable RTL. */
2415 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2424 /* This rtx may not be shared. If it has already been seen,
2425 replace it with a copy of itself. */
2427 if (RTX_FLAG (x, used))
2431 copy = rtx_alloc (code);
2433 (sizeof (*copy) - sizeof (copy->fld)
2434 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2438 RTX_FLAG (x, used) = 1;
2440 /* Now scan the subexpressions recursively.
2441 We can store any replaced subexpressions directly into X
2442 since we know X is not shared! Any vectors in X
2443 must be copied if X was copied. */
2445 format_ptr = GET_RTX_FORMAT (code);
2447 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2449 switch (*format_ptr++)
2452 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2456 if (XVEC (x, i) != NULL)
2459 int len = XVECLEN (x, i);
2461 if (copied && len > 0)
2462 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2463 for (j = 0; j < len; j++)
2464 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2472 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2473 to look for shared sub-parts. */
2476 reset_used_flags (x)
2481 const char *format_ptr;
2486 code = GET_CODE (x);
2488 /* These types may be freely shared so we needn't do any resetting
2510 /* The chain of insns is not being copied. */
2517 RTX_FLAG (x, used) = 0;
2519 format_ptr = GET_RTX_FORMAT (code);
2520 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2522 switch (*format_ptr++)
2525 reset_used_flags (XEXP (x, i));
2529 for (j = 0; j < XVECLEN (x, i); j++)
2530 reset_used_flags (XVECEXP (x, i, j));
2536 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2537 Return X or the rtx for the pseudo reg the value of X was copied into.
2538 OTHER must be valid as a SET_DEST. */
2541 make_safe_from (x, other)
2545 switch (GET_CODE (other))
2548 other = SUBREG_REG (other);
2550 case STRICT_LOW_PART:
2553 other = XEXP (other, 0);
2559 if ((GET_CODE (other) == MEM
2561 && GET_CODE (x) != REG
2562 && GET_CODE (x) != SUBREG)
2563 || (GET_CODE (other) == REG
2564 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2565 || reg_mentioned_p (other, x))))
2567 rtx temp = gen_reg_rtx (GET_MODE (x));
2568 emit_move_insn (temp, x);
2574 /* Emission of insns (adding them to the doubly-linked list). */
2576 /* Return the first insn of the current sequence or current function. */
2584 /* Specify a new insn as the first in the chain. */
2587 set_first_insn (insn)
2590 if (PREV_INSN (insn) != 0)
2595 /* Return the last insn emitted in current sequence or current function. */
2603 /* Specify a new insn as the last in the chain. */
2606 set_last_insn (insn)
2609 if (NEXT_INSN (insn) != 0)
2614 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2617 get_last_insn_anywhere ()
2619 struct sequence_stack *stack;
2622 for (stack = seq_stack; stack; stack = stack->next)
2623 if (stack->last != 0)
2628 /* Return a number larger than any instruction's uid in this function. */
2633 return cur_insn_uid;
2636 /* Renumber instructions so that no instruction UIDs are wasted. */
2639 renumber_insns (stream)
2644 /* If we're not supposed to renumber instructions, don't. */
2645 if (!flag_renumber_insns)
2648 /* If there aren't that many instructions, then it's not really
2649 worth renumbering them. */
2650 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2655 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2658 fprintf (stream, "Renumbering insn %d to %d\n",
2659 INSN_UID (insn), cur_insn_uid);
2660 INSN_UID (insn) = cur_insn_uid++;
2664 /* Return the next insn. If it is a SEQUENCE, return the first insn
2673 insn = NEXT_INSN (insn);
2674 if (insn && GET_CODE (insn) == INSN
2675 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2676 insn = XVECEXP (PATTERN (insn), 0, 0);
2682 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2686 previous_insn (insn)
2691 insn = PREV_INSN (insn);
2692 if (insn && GET_CODE (insn) == INSN
2693 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2694 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2700 /* Return the next insn after INSN that is not a NOTE. This routine does not
2701 look inside SEQUENCEs. */
2704 next_nonnote_insn (insn)
2709 insn = NEXT_INSN (insn);
2710 if (insn == 0 || GET_CODE (insn) != NOTE)
2717 /* Return the previous insn before INSN that is not a NOTE. This routine does
2718 not look inside SEQUENCEs. */
2721 prev_nonnote_insn (insn)
2726 insn = PREV_INSN (insn);
2727 if (insn == 0 || GET_CODE (insn) != NOTE)
2734 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2735 or 0, if there is none. This routine does not look inside
2739 next_real_insn (insn)
2744 insn = NEXT_INSN (insn);
2745 if (insn == 0 || GET_CODE (insn) == INSN
2746 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2753 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2754 or 0, if there is none. This routine does not look inside
2758 prev_real_insn (insn)
2763 insn = PREV_INSN (insn);
2764 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2765 || GET_CODE (insn) == JUMP_INSN)
2772 /* Find the next insn after INSN that really does something. This routine
2773 does not look inside SEQUENCEs. Until reload has completed, this is the
2774 same as next_real_insn. */
2777 active_insn_p (insn)
2780 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2781 || (GET_CODE (insn) == INSN
2782 && (! reload_completed
2783 || (GET_CODE (PATTERN (insn)) != USE
2784 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2788 next_active_insn (insn)
2793 insn = NEXT_INSN (insn);
2794 if (insn == 0 || active_insn_p (insn))
2801 /* Find the last insn before INSN that really does something. This routine
2802 does not look inside SEQUENCEs. Until reload has completed, this is the
2803 same as prev_real_insn. */
2806 prev_active_insn (insn)
2811 insn = PREV_INSN (insn);
2812 if (insn == 0 || active_insn_p (insn))
2819 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2827 insn = NEXT_INSN (insn);
2828 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2835 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2843 insn = PREV_INSN (insn);
2844 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2852 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2853 and REG_CC_USER notes so we can find it. */
2856 link_cc0_insns (insn)
2859 rtx user = next_nonnote_insn (insn);
2861 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2862 user = XVECEXP (PATTERN (user), 0, 0);
2864 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2866 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2869 /* Return the next insn that uses CC0 after INSN, which is assumed to
2870 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2871 applied to the result of this function should yield INSN).
2873 Normally, this is simply the next insn. However, if a REG_CC_USER note
2874 is present, it contains the insn that uses CC0.
2876 Return 0 if we can't find the insn. */
2879 next_cc0_user (insn)
2882 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2885 return XEXP (note, 0);
2887 insn = next_nonnote_insn (insn);
2888 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2889 insn = XVECEXP (PATTERN (insn), 0, 0);
2891 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2897 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2898 note, it is the previous insn. */
2901 prev_cc0_setter (insn)
2904 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2907 return XEXP (note, 0);
2909 insn = prev_nonnote_insn (insn);
2910 if (! sets_cc0_p (PATTERN (insn)))
2917 /* Increment the label uses for all labels present in rtx. */
2920 mark_label_nuses (x)
2927 code = GET_CODE (x);
2928 if (code == LABEL_REF)
2929 LABEL_NUSES (XEXP (x, 0))++;
2931 fmt = GET_RTX_FORMAT (code);
2932 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2935 mark_label_nuses (XEXP (x, i));
2936 else if (fmt[i] == 'E')
2937 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2938 mark_label_nuses (XVECEXP (x, i, j));
2943 /* Try splitting insns that can be split for better scheduling.
2944 PAT is the pattern which might split.
2945 TRIAL is the insn providing PAT.
2946 LAST is non-zero if we should return the last insn of the sequence produced.
2948 If this routine succeeds in splitting, it returns the first or last
2949 replacement insn depending on the value of LAST. Otherwise, it
2950 returns TRIAL. If the insn to be returned can be split, it will be. */
2953 try_split (pat, trial, last)
2957 rtx before = PREV_INSN (trial);
2958 rtx after = NEXT_INSN (trial);
2959 int has_barrier = 0;
2964 if (any_condjump_p (trial)
2965 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
2966 split_branch_probability = INTVAL (XEXP (note, 0));
2967 probability = split_branch_probability;
2969 seq = split_insns (pat, trial);
2971 split_branch_probability = -1;
2973 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2974 We may need to handle this specially. */
2975 if (after && GET_CODE (after) == BARRIER)
2978 after = NEXT_INSN (after);
2983 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2984 The latter case will normally arise only when being done so that
2985 it, in turn, will be split (SFmode on the 29k is an example). */
2986 if (GET_CODE (seq) == SEQUENCE)
2990 /* Avoid infinite loop if any insn of the result matches
2991 the original pattern. */
2992 for (i = 0; i < XVECLEN (seq, 0); i++)
2993 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2994 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2998 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2999 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
3001 rtx insn = XVECEXP (seq, 0, i);
3002 mark_jump_label (PATTERN (insn),
3003 XVECEXP (seq, 0, i), 0);
3005 if (probability != -1
3006 && any_condjump_p (insn)
3007 && !find_reg_note (insn, REG_BR_PROB, 0))
3009 /* We can preserve the REG_BR_PROB notes only if exactly
3010 one jump is created, otherwise the machine description
3011 is responsible for this step using
3012 split_branch_probability variable. */
3016 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3017 GEN_INT (probability),
3022 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3023 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3024 if (GET_CODE (trial) == CALL_INSN)
3025 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3026 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
3027 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
3028 = CALL_INSN_FUNCTION_USAGE (trial);
3030 /* Copy notes, particularly those related to the CFG. */
3031 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3033 switch (REG_NOTE_KIND (note))
3036 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3038 rtx insn = XVECEXP (seq, 0, i);
3039 if (GET_CODE (insn) == CALL_INSN
3040 || (flag_non_call_exceptions
3041 && may_trap_p (PATTERN (insn))))
3043 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3051 case REG_ALWAYS_RETURN:
3052 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3054 rtx insn = XVECEXP (seq, 0, i);
3055 if (GET_CODE (insn) == CALL_INSN)
3057 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3063 case REG_NON_LOCAL_GOTO:
3064 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3066 rtx insn = XVECEXP (seq, 0, i);
3067 if (GET_CODE (insn) == JUMP_INSN)
3069 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3080 /* If there are LABELS inside the split insns increment the
3081 usage count so we don't delete the label. */
3082 if (GET_CODE (trial) == INSN)
3083 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3084 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
3085 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
3087 tem = emit_insn_after (seq, trial);
3089 delete_insn (trial);
3091 emit_barrier_after (tem);
3093 /* Recursively call try_split for each new insn created; by the
3094 time control returns here that insn will be fully split, so
3095 set LAST and continue from the insn after the one returned.
3096 We can't use next_active_insn here since AFTER may be a note.
3097 Ignore deleted insns, which can be occur if not optimizing. */
3098 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3099 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3100 tem = try_split (PATTERN (tem), tem, 1);
3102 /* Avoid infinite loop if the result matches the original pattern. */
3103 else if (rtx_equal_p (seq, pat))
3107 PATTERN (trial) = seq;
3108 INSN_CODE (trial) = -1;
3109 try_split (seq, trial, last);
3112 /* Return either the first or the last insn, depending on which was
3115 ? (after ? PREV_INSN (after) : last_insn)
3116 : NEXT_INSN (before);
3122 /* Make and return an INSN rtx, initializing all its slots.
3123 Store PATTERN in the pattern slots. */
3126 make_insn_raw (pattern)
3131 insn = rtx_alloc (INSN);
3133 INSN_UID (insn) = cur_insn_uid++;
3134 PATTERN (insn) = pattern;
3135 INSN_CODE (insn) = -1;
3136 LOG_LINKS (insn) = NULL;
3137 REG_NOTES (insn) = NULL;
3139 #ifdef ENABLE_RTL_CHECKING
3142 && (returnjump_p (insn)
3143 || (GET_CODE (insn) == SET
3144 && SET_DEST (insn) == pc_rtx)))
3146 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3154 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
3157 make_jump_insn_raw (pattern)
3162 insn = rtx_alloc (JUMP_INSN);
3163 INSN_UID (insn) = cur_insn_uid++;
3165 PATTERN (insn) = pattern;
3166 INSN_CODE (insn) = -1;
3167 LOG_LINKS (insn) = NULL;
3168 REG_NOTES (insn) = NULL;
3169 JUMP_LABEL (insn) = NULL;
3174 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
3177 make_call_insn_raw (pattern)
3182 insn = rtx_alloc (CALL_INSN);
3183 INSN_UID (insn) = cur_insn_uid++;
3185 PATTERN (insn) = pattern;
3186 INSN_CODE (insn) = -1;
3187 LOG_LINKS (insn) = NULL;
3188 REG_NOTES (insn) = NULL;
3189 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3194 /* Add INSN to the end of the doubly-linked list.
3195 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3201 PREV_INSN (insn) = last_insn;
3202 NEXT_INSN (insn) = 0;
3204 if (NULL != last_insn)
3205 NEXT_INSN (last_insn) = insn;
3207 if (NULL == first_insn)
3213 /* Add INSN into the doubly-linked list after insn AFTER. This and
3214 the next should be the only functions called to insert an insn once
3215 delay slots have been filled since only they know how to update a
3219 add_insn_after (insn, after)
3222 rtx next = NEXT_INSN (after);
3225 if (optimize && INSN_DELETED_P (after))
3228 NEXT_INSN (insn) = next;
3229 PREV_INSN (insn) = after;
3233 PREV_INSN (next) = insn;
3234 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3235 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3237 else if (last_insn == after)
3241 struct sequence_stack *stack = seq_stack;
3242 /* Scan all pending sequences too. */
3243 for (; stack; stack = stack->next)
3244 if (after == stack->last)
3254 if (basic_block_for_insn
3255 && (unsigned int) INSN_UID (after) < basic_block_for_insn->num_elements
3256 && (bb = BLOCK_FOR_INSN (after)))
3258 set_block_for_insn (insn, bb);
3260 bb->flags |= BB_DIRTY;
3261 /* Should not happen as first in the BB is always
3262 either NOTE or LABEL. */
3263 if (bb->end == after
3264 /* Avoid clobbering of structure when creating new BB. */
3265 && GET_CODE (insn) != BARRIER
3266 && (GET_CODE (insn) != NOTE
3267 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3271 NEXT_INSN (after) = insn;
3272 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3274 rtx sequence = PATTERN (after);
3275 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3279 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3280 the previous should be the only functions called to insert an insn once
3281 delay slots have been filled since only they know how to update a
3285 add_insn_before (insn, before)
3288 rtx prev = PREV_INSN (before);
3291 if (optimize && INSN_DELETED_P (before))
3294 PREV_INSN (insn) = prev;
3295 NEXT_INSN (insn) = before;
3299 NEXT_INSN (prev) = insn;
3300 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3302 rtx sequence = PATTERN (prev);
3303 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3306 else if (first_insn == before)
3310 struct sequence_stack *stack = seq_stack;
3311 /* Scan all pending sequences too. */
3312 for (; stack; stack = stack->next)
3313 if (before == stack->first)
3315 stack->first = insn;
3323 if (basic_block_for_insn
3324 && (unsigned int) INSN_UID (before) < basic_block_for_insn->num_elements
3325 && (bb = BLOCK_FOR_INSN (before)))
3327 set_block_for_insn (insn, bb);
3329 bb->flags |= BB_DIRTY;
3330 /* Should not happen as first in the BB is always
3331 either NOTE or LABEl. */
3332 if (bb->head == insn
3333 /* Avoid clobbering of structure when creating new BB. */
3334 && GET_CODE (insn) != BARRIER
3335 && (GET_CODE (insn) != NOTE
3336 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3340 PREV_INSN (before) = insn;
3341 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3342 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3345 /* Remove an insn from its doubly-linked list. This function knows how
3346 to handle sequences. */
3351 rtx next = NEXT_INSN (insn);
3352 rtx prev = PREV_INSN (insn);
3357 NEXT_INSN (prev) = next;
3358 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3360 rtx sequence = PATTERN (prev);
3361 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3364 else if (first_insn == insn)
3368 struct sequence_stack *stack = seq_stack;
3369 /* Scan all pending sequences too. */
3370 for (; stack; stack = stack->next)
3371 if (insn == stack->first)
3373 stack->first = next;
3383 PREV_INSN (next) = prev;
3384 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3385 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3387 else if (last_insn == insn)
3391 struct sequence_stack *stack = seq_stack;
3392 /* Scan all pending sequences too. */
3393 for (; stack; stack = stack->next)
3394 if (insn == stack->last)
3403 if (basic_block_for_insn
3404 && (unsigned int) INSN_UID (insn) < basic_block_for_insn->num_elements
3405 && (bb = BLOCK_FOR_INSN (insn)))
3408 bb->flags |= BB_DIRTY;
3409 if (bb->head == insn)
3411 /* Never ever delete the basic block note without deleting whole
3413 if (GET_CODE (insn) == NOTE)
3417 if (bb->end == insn)
3422 /* Delete all insns made since FROM.
3423 FROM becomes the new last instruction. */
3426 delete_insns_since (from)
3432 NEXT_INSN (from) = 0;
3436 /* This function is deprecated, please use sequences instead.
3438 Move a consecutive bunch of insns to a different place in the chain.
3439 The insns to be moved are those between FROM and TO.
3440 They are moved to a new position after the insn AFTER.
3441 AFTER must not be FROM or TO or any insn in between.
3443 This function does not know about SEQUENCEs and hence should not be
3444 called after delay-slot filling has been done. */
3447 reorder_insns_nobb (from, to, after)
3448 rtx from, to, after;
3450 /* Splice this bunch out of where it is now. */
3451 if (PREV_INSN (from))
3452 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3454 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3455 if (last_insn == to)
3456 last_insn = PREV_INSN (from);
3457 if (first_insn == from)
3458 first_insn = NEXT_INSN (to);
3460 /* Make the new neighbors point to it and it to them. */
3461 if (NEXT_INSN (after))
3462 PREV_INSN (NEXT_INSN (after)) = to;
3464 NEXT_INSN (to) = NEXT_INSN (after);
3465 PREV_INSN (from) = after;
3466 NEXT_INSN (after) = from;
3467 if (after == last_insn)
3471 /* Same as function above, but take care to update BB boundaries. */
3473 reorder_insns (from, to, after)
3474 rtx from, to, after;
3476 rtx prev = PREV_INSN (from);
3477 basic_block bb, bb2;
3479 reorder_insns_nobb (from, to, after);
3481 if (basic_block_for_insn
3482 && (unsigned int) INSN_UID (after) < basic_block_for_insn->num_elements
3483 && (bb = BLOCK_FOR_INSN (after)))
3486 bb->flags |= BB_DIRTY;
3488 if (basic_block_for_insn
3489 && ((unsigned int) INSN_UID (from)
3490 < basic_block_for_insn->num_elements)
3491 && (bb2 = BLOCK_FOR_INSN (from)))
3495 bb2->flags |= BB_DIRTY;
3498 if (bb->end == after)
3501 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3502 set_block_for_insn (x, bb);
3506 /* Return the line note insn preceding INSN. */
3509 find_line_note (insn)
3512 if (no_line_numbers)
3515 for (; insn; insn = PREV_INSN (insn))
3516 if (GET_CODE (insn) == NOTE
3517 && NOTE_LINE_NUMBER (insn) >= 0)
3523 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3524 of the moved insns when debugging. This may insert a note between AFTER
3525 and FROM, and another one after TO. */
3528 reorder_insns_with_line_notes (from, to, after)
3529 rtx from, to, after;
3531 rtx from_line = find_line_note (from);
3532 rtx after_line = find_line_note (after);
3534 reorder_insns (from, to, after);
3536 if (from_line == after_line)
3540 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3541 NOTE_LINE_NUMBER (from_line),
3544 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3545 NOTE_LINE_NUMBER (after_line),
3549 /* Remove unnecessary notes from the instruction stream. */
3552 remove_unnecessary_notes ()
3554 rtx block_stack = NULL_RTX;
3555 rtx eh_stack = NULL_RTX;
3560 /* We must not remove the first instruction in the function because
3561 the compiler depends on the first instruction being a note. */
3562 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3564 /* Remember what's next. */
3565 next = NEXT_INSN (insn);
3567 /* We're only interested in notes. */
3568 if (GET_CODE (insn) != NOTE)
3571 switch (NOTE_LINE_NUMBER (insn))
3573 case NOTE_INSN_DELETED:
3574 case NOTE_INSN_LOOP_END_TOP_COND:
3578 case NOTE_INSN_EH_REGION_BEG:
3579 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3582 case NOTE_INSN_EH_REGION_END:
3583 /* Too many end notes. */
3584 if (eh_stack == NULL_RTX)
3586 /* Mismatched nesting. */
3587 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3590 eh_stack = XEXP (eh_stack, 1);
3591 free_INSN_LIST_node (tmp);
3594 case NOTE_INSN_BLOCK_BEG:
3595 /* By now, all notes indicating lexical blocks should have
3596 NOTE_BLOCK filled in. */
3597 if (NOTE_BLOCK (insn) == NULL_TREE)
3599 block_stack = alloc_INSN_LIST (insn, block_stack);
3602 case NOTE_INSN_BLOCK_END:
3603 /* Too many end notes. */
3604 if (block_stack == NULL_RTX)
3606 /* Mismatched nesting. */
3607 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3610 block_stack = XEXP (block_stack, 1);
3611 free_INSN_LIST_node (tmp);
3613 /* Scan back to see if there are any non-note instructions
3614 between INSN and the beginning of this block. If not,
3615 then there is no PC range in the generated code that will
3616 actually be in this block, so there's no point in
3617 remembering the existence of the block. */
3618 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3620 /* This block contains a real instruction. Note that we
3621 don't include labels; if the only thing in the block
3622 is a label, then there are still no PC values that
3623 lie within the block. */
3627 /* We're only interested in NOTEs. */
3628 if (GET_CODE (tmp) != NOTE)
3631 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3633 /* We just verified that this BLOCK matches us with
3634 the block_stack check above. Never delete the
3635 BLOCK for the outermost scope of the function; we
3636 can refer to names from that scope even if the
3637 block notes are messed up. */
3638 if (! is_body_block (NOTE_BLOCK (insn))
3639 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3646 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3647 /* There's a nested block. We need to leave the
3648 current block in place since otherwise the debugger
3649 wouldn't be able to show symbols from our block in
3650 the nested block. */
3656 /* Too many begin notes. */
3657 if (block_stack || eh_stack)
3662 /* Emit an insn of given code and pattern
3663 at a specified place within the doubly-linked list. */
3665 /* Make an instruction with body PATTERN
3666 and output it before the instruction BEFORE. */
3669 emit_insn_before (pattern, before)
3670 rtx pattern, before;
3674 if (GET_CODE (pattern) == SEQUENCE)
3678 for (i = 0; i < XVECLEN (pattern, 0); i++)
3680 insn = XVECEXP (pattern, 0, i);
3681 add_insn_before (insn, before);
3686 insn = make_insn_raw (pattern);
3687 add_insn_before (insn, before);
3693 /* Make an instruction with body PATTERN and code JUMP_INSN
3694 and output it before the instruction BEFORE. */
3697 emit_jump_insn_before (pattern, before)
3698 rtx pattern, before;
3702 if (GET_CODE (pattern) == SEQUENCE)
3703 insn = emit_insn_before (pattern, before);
3706 insn = make_jump_insn_raw (pattern);
3707 add_insn_before (insn, before);
3713 /* Make an instruction with body PATTERN and code CALL_INSN
3714 and output it before the instruction BEFORE. */
3717 emit_call_insn_before (pattern, before)
3718 rtx pattern, before;
3722 if (GET_CODE (pattern) == SEQUENCE)
3723 insn = emit_insn_before (pattern, before);
3726 insn = make_call_insn_raw (pattern);
3727 add_insn_before (insn, before);
3728 PUT_CODE (insn, CALL_INSN);
3734 /* Make an instruction with body PATTERN and code CALL_INSN
3735 and output it before the instruction BEFORE. */
3738 emit_call_insn_after (pattern, before)
3739 rtx pattern, before;
3743 if (GET_CODE (pattern) == SEQUENCE)
3744 insn = emit_insn_after (pattern, before);
3747 insn = make_call_insn_raw (pattern);
3748 add_insn_after (insn, before);
3749 PUT_CODE (insn, CALL_INSN);
3755 /* Make an insn of code BARRIER
3756 and output it before the insn BEFORE. */
3759 emit_barrier_before (before)
3762 rtx insn = rtx_alloc (BARRIER);
3764 INSN_UID (insn) = cur_insn_uid++;
3766 add_insn_before (insn, before);
3770 /* Emit the label LABEL before the insn BEFORE. */
3773 emit_label_before (label, before)
3776 /* This can be called twice for the same label as a result of the
3777 confusion that follows a syntax error! So make it harmless. */
3778 if (INSN_UID (label) == 0)
3780 INSN_UID (label) = cur_insn_uid++;
3781 add_insn_before (label, before);
3787 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3790 emit_note_before (subtype, before)
3794 rtx note = rtx_alloc (NOTE);
3795 INSN_UID (note) = cur_insn_uid++;
3796 NOTE_SOURCE_FILE (note) = 0;
3797 NOTE_LINE_NUMBER (note) = subtype;
3799 add_insn_before (note, before);
3803 /* Make an insn of code INSN with body PATTERN
3804 and output it after the insn AFTER. */
3807 emit_insn_after (pattern, after)
3812 if (GET_CODE (pattern) == SEQUENCE)
3816 for (i = 0; i < XVECLEN (pattern, 0); i++)
3818 insn = XVECEXP (pattern, 0, i);
3819 add_insn_after (insn, after);
3825 insn = make_insn_raw (pattern);
3826 add_insn_after (insn, after);
3832 /* Similar to emit_insn_after, except that line notes are to be inserted so
3833 as to act as if this insn were at FROM. */
3836 emit_insn_after_with_line_notes (pattern, after, from)
3837 rtx pattern, after, from;
3839 rtx from_line = find_line_note (from);
3840 rtx after_line = find_line_note (after);
3841 rtx insn = emit_insn_after (pattern, after);
3844 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3845 NOTE_LINE_NUMBER (from_line),
3849 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3850 NOTE_LINE_NUMBER (after_line),
3854 /* Make an insn of code JUMP_INSN with body PATTERN
3855 and output it after the insn AFTER. */
3858 emit_jump_insn_after (pattern, after)
3863 if (GET_CODE (pattern) == SEQUENCE)
3864 insn = emit_insn_after (pattern, after);
3867 insn = make_jump_insn_raw (pattern);
3868 add_insn_after (insn, after);
3874 /* Make an insn of code BARRIER
3875 and output it after the insn AFTER. */
3878 emit_barrier_after (after)
3881 rtx insn = rtx_alloc (BARRIER);
3883 INSN_UID (insn) = cur_insn_uid++;
3885 add_insn_after (insn, after);
3889 /* Emit the label LABEL after the insn AFTER. */
3892 emit_label_after (label, after)
3895 /* This can be called twice for the same label
3896 as a result of the confusion that follows a syntax error!
3897 So make it harmless. */
3898 if (INSN_UID (label) == 0)
3900 INSN_UID (label) = cur_insn_uid++;
3901 add_insn_after (label, after);
3907 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3910 emit_note_after (subtype, after)
3914 rtx note = rtx_alloc (NOTE);
3915 INSN_UID (note) = cur_insn_uid++;
3916 NOTE_SOURCE_FILE (note) = 0;
3917 NOTE_LINE_NUMBER (note) = subtype;
3918 add_insn_after (note, after);
3922 /* Emit a line note for FILE and LINE after the insn AFTER. */
3925 emit_line_note_after (file, line, after)
3932 if (no_line_numbers && line > 0)
3938 note = rtx_alloc (NOTE);
3939 INSN_UID (note) = cur_insn_uid++;
3940 NOTE_SOURCE_FILE (note) = file;
3941 NOTE_LINE_NUMBER (note) = line;
3942 add_insn_after (note, after);
3946 /* Make an insn of code INSN with pattern PATTERN
3947 and add it to the end of the doubly-linked list.
3948 If PATTERN is a SEQUENCE, take the elements of it
3949 and emit an insn for each element.
3951 Returns the last insn emitted. */
3957 rtx insn = last_insn;
3959 if (GET_CODE (pattern) == SEQUENCE)
3963 for (i = 0; i < XVECLEN (pattern, 0); i++)
3965 insn = XVECEXP (pattern, 0, i);
3971 insn = make_insn_raw (pattern);
3978 /* Emit the insns in a chain starting with INSN.
3979 Return the last insn emitted. */
3989 rtx next = NEXT_INSN (insn);
3998 /* Emit the insns in a chain starting with INSN and place them in front of
3999 the insn BEFORE. Return the last insn emitted. */
4002 emit_insns_before (insn, before)
4010 rtx next = NEXT_INSN (insn);
4011 add_insn_before (insn, before);
4019 /* Emit the insns in a chain starting with FIRST and place them in back of
4020 the insn AFTER. Return the last insn emitted. */
4023 emit_insns_after (first, after)
4037 if (basic_block_for_insn
4038 && (unsigned int) INSN_UID (after) < basic_block_for_insn->num_elements
4039 && (bb = BLOCK_FOR_INSN (after)))
4041 bb->flags |= BB_DIRTY;
4042 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4043 set_block_for_insn (last, bb);
4044 set_block_for_insn (last, bb);
4045 if (bb->end == after)
4049 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4052 after_after = NEXT_INSN (after);
4054 NEXT_INSN (after) = first;
4055 PREV_INSN (first) = after;
4056 NEXT_INSN (last) = after_after;
4058 PREV_INSN (after_after) = last;
4060 if (after == last_insn)
4065 /* Make an insn of code JUMP_INSN with pattern PATTERN
4066 and add it to the end of the doubly-linked list. */
4069 emit_jump_insn (pattern)
4072 if (GET_CODE (pattern) == SEQUENCE)
4073 return emit_insn (pattern);
4076 rtx insn = make_jump_insn_raw (pattern);
4082 /* Make an insn of code CALL_INSN with pattern PATTERN
4083 and add it to the end of the doubly-linked list. */
4086 emit_call_insn (pattern)
4089 if (GET_CODE (pattern) == SEQUENCE)
4090 return emit_insn (pattern);
4093 rtx insn = make_call_insn_raw (pattern);
4095 PUT_CODE (insn, CALL_INSN);
4100 /* Add the label LABEL to the end of the doubly-linked list. */
4106 /* This can be called twice for the same label
4107 as a result of the confusion that follows a syntax error!
4108 So make it harmless. */
4109 if (INSN_UID (label) == 0)
4111 INSN_UID (label) = cur_insn_uid++;
4117 /* Make an insn of code BARRIER
4118 and add it to the end of the doubly-linked list. */
4123 rtx barrier = rtx_alloc (BARRIER);
4124 INSN_UID (barrier) = cur_insn_uid++;
4129 /* Make an insn of code NOTE
4130 with data-fields specified by FILE and LINE
4131 and add it to the end of the doubly-linked list,
4132 but only if line-numbers are desired for debugging info. */
4135 emit_line_note (file, line)
4139 set_file_and_line_for_stmt (file, line);
4142 if (no_line_numbers)
4146 return emit_note (file, line);
4149 /* Make an insn of code NOTE
4150 with data-fields specified by FILE and LINE
4151 and add it to the end of the doubly-linked list.
4152 If it is a line-number NOTE, omit it if it matches the previous one. */
4155 emit_note (file, line)
4163 if (file && last_filename && !strcmp (file, last_filename)
4164 && line == last_linenum)
4166 last_filename = file;
4167 last_linenum = line;
4170 if (no_line_numbers && line > 0)
4176 note = rtx_alloc (NOTE);
4177 INSN_UID (note) = cur_insn_uid++;
4178 NOTE_SOURCE_FILE (note) = file;
4179 NOTE_LINE_NUMBER (note) = line;
4184 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4187 emit_line_note_force (file, line)
4192 return emit_line_note (file, line);
4195 /* Cause next statement to emit a line note even if the line number
4196 has not changed. This is used at the beginning of a function. */
4199 force_next_line_note ()
4204 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4205 note of this type already exists, remove it first. */
4208 set_unique_reg_note (insn, kind, datum)
4213 rtx note = find_reg_note (insn, kind, NULL_RTX);
4219 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4220 has multiple sets (some callers assume single_set
4221 means the insn only has one set, when in fact it
4222 means the insn only has one * useful * set). */
4223 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4230 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4231 It serves no useful purpose and breaks eliminate_regs. */
4232 if (GET_CODE (datum) == ASM_OPERANDS)
4242 XEXP (note, 0) = datum;
4246 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4247 return REG_NOTES (insn);
4250 /* Return an indication of which type of insn should have X as a body.
4251 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4257 if (GET_CODE (x) == CODE_LABEL)
4259 if (GET_CODE (x) == CALL)
4261 if (GET_CODE (x) == RETURN)
4263 if (GET_CODE (x) == SET)
4265 if (SET_DEST (x) == pc_rtx)
4267 else if (GET_CODE (SET_SRC (x)) == CALL)
4272 if (GET_CODE (x) == PARALLEL)
4275 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4276 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4278 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4279 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4281 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4282 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4288 /* Emit the rtl pattern X as an appropriate kind of insn.
4289 If X is a label, it is simply added into the insn chain. */
4295 enum rtx_code code = classify_insn (x);
4297 if (code == CODE_LABEL)
4298 return emit_label (x);
4299 else if (code == INSN)
4300 return emit_insn (x);
4301 else if (code == JUMP_INSN)
4303 rtx insn = emit_jump_insn (x);
4304 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4305 return emit_barrier ();
4308 else if (code == CALL_INSN)
4309 return emit_call_insn (x);
4314 /* Begin emitting insns to a sequence which can be packaged in an
4315 RTL_EXPR. If this sequence will contain something that might cause
4316 the compiler to pop arguments to function calls (because those
4317 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4318 details), use do_pending_stack_adjust before calling this function.
4319 That will ensure that the deferred pops are not accidentally
4320 emitted in the middle of this sequence. */
4325 struct sequence_stack *tem;
4327 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
4329 tem->next = seq_stack;
4330 tem->first = first_insn;
4331 tem->last = last_insn;
4332 tem->sequence_rtl_expr = seq_rtl_expr;
4340 /* Similarly, but indicate that this sequence will be placed in T, an
4341 RTL_EXPR. See the documentation for start_sequence for more
4342 information about how to use this function. */
4345 start_sequence_for_rtl_expr (t)
4353 /* Set up the insn chain starting with FIRST as the current sequence,
4354 saving the previously current one. See the documentation for
4355 start_sequence for more information about how to use this function. */
4358 push_to_sequence (first)
4365 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4371 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4374 push_to_full_sequence (first, last)
4380 /* We really should have the end of the insn chain here. */
4381 if (last && NEXT_INSN (last))
4385 /* Set up the outer-level insn chain
4386 as the current sequence, saving the previously current one. */
4389 push_topmost_sequence ()
4391 struct sequence_stack *stack, *top = NULL;
4395 for (stack = seq_stack; stack; stack = stack->next)
4398 first_insn = top->first;
4399 last_insn = top->last;
4400 seq_rtl_expr = top->sequence_rtl_expr;
4403 /* After emitting to the outer-level insn chain, update the outer-level
4404 insn chain, and restore the previous saved state. */
4407 pop_topmost_sequence ()
4409 struct sequence_stack *stack, *top = NULL;
4411 for (stack = seq_stack; stack; stack = stack->next)
4414 top->first = first_insn;
4415 top->last = last_insn;
4416 /* ??? Why don't we save seq_rtl_expr here? */
4421 /* After emitting to a sequence, restore previous saved state.
4423 To get the contents of the sequence just made, you must call
4424 `gen_sequence' *before* calling here.
4426 If the compiler might have deferred popping arguments while
4427 generating this sequence, and this sequence will not be immediately
4428 inserted into the instruction stream, use do_pending_stack_adjust
4429 before calling gen_sequence. That will ensure that the deferred
4430 pops are inserted into this sequence, and not into some random
4431 location in the instruction stream. See INHIBIT_DEFER_POP for more
4432 information about deferred popping of arguments. */
4437 struct sequence_stack *tem = seq_stack;
4439 first_insn = tem->first;
4440 last_insn = tem->last;
4441 seq_rtl_expr = tem->sequence_rtl_expr;
4442 seq_stack = tem->next;
4447 /* This works like end_sequence, but records the old sequence in FIRST
4451 end_full_sequence (first, last)
4454 *first = first_insn;
4459 /* Return 1 if currently emitting into a sequence. */
4464 return seq_stack != 0;
4467 /* Generate a SEQUENCE rtx containing the insns already emitted
4468 to the current sequence.
4470 This is how the gen_... function from a DEFINE_EXPAND
4471 constructs the SEQUENCE that it returns. */
4481 /* Count the insns in the chain. */
4483 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
4486 /* If only one insn, return it rather than a SEQUENCE.
4487 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
4488 the case of an empty list.)
4489 We only return the pattern of an insn if its code is INSN and it
4490 has no notes. This ensures that no information gets lost. */
4492 && GET_CODE (first_insn) == INSN
4493 && ! RTX_FRAME_RELATED_P (first_insn)
4494 /* Don't throw away any reg notes. */
4495 && REG_NOTES (first_insn) == 0)
4496 return PATTERN (first_insn);
4498 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
4500 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
4501 XVECEXP (result, 0, i) = tem;
4506 /* Put the various virtual registers into REGNO_REG_RTX. */
4509 init_virtual_regs (es)
4510 struct emit_status *es;
4512 rtx *ptr = es->x_regno_reg_rtx;
4513 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4514 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4515 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4516 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4517 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4521 clear_emit_caches ()
4525 /* Clear the start_sequence/gen_sequence cache. */
4526 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
4527 sequence_result[i] = 0;
4531 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4532 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4533 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4534 static int copy_insn_n_scratches;
4536 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4537 copied an ASM_OPERANDS.
4538 In that case, it is the original input-operand vector. */
4539 static rtvec orig_asm_operands_vector;
4541 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4542 copied an ASM_OPERANDS.
4543 In that case, it is the copied input-operand vector. */
4544 static rtvec copy_asm_operands_vector;
4546 /* Likewise for the constraints vector. */
4547 static rtvec orig_asm_constraints_vector;
4548 static rtvec copy_asm_constraints_vector;
4550 /* Recursively create a new copy of an rtx for copy_insn.
4551 This function differs from copy_rtx in that it handles SCRATCHes and
4552 ASM_OPERANDs properly.
4553 Normally, this function is not used directly; use copy_insn as front end.
4554 However, you could first copy an insn pattern with copy_insn and then use
4555 this function afterwards to properly copy any REG_NOTEs containing
4565 const char *format_ptr;
4567 code = GET_CODE (orig);
4584 for (i = 0; i < copy_insn_n_scratches; i++)
4585 if (copy_insn_scratch_in[i] == orig)
4586 return copy_insn_scratch_out[i];
4590 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4591 a LABEL_REF, it isn't sharable. */
4592 if (GET_CODE (XEXP (orig, 0)) == PLUS
4593 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4594 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4598 /* A MEM with a constant address is not sharable. The problem is that
4599 the constant address may need to be reloaded. If the mem is shared,
4600 then reloading one copy of this mem will cause all copies to appear
4601 to have been reloaded. */
4607 copy = rtx_alloc (code);
4609 /* Copy the various flags, and other information. We assume that
4610 all fields need copying, and then clear the fields that should
4611 not be copied. That is the sensible default behavior, and forces
4612 us to explicitly document why we are *not* copying a flag. */
4613 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
4615 /* We do not copy the USED flag, which is used as a mark bit during
4616 walks over the RTL. */
4617 RTX_FLAG (copy, used) = 0;
4619 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4620 if (GET_RTX_CLASS (code) == 'i')
4622 RTX_FLAG (copy, jump) = 0;
4623 RTX_FLAG (copy, call) = 0;
4624 RTX_FLAG (copy, frame_related) = 0;
4627 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4629 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4631 copy->fld[i] = orig->fld[i];
4632 switch (*format_ptr++)
4635 if (XEXP (orig, i) != NULL)
4636 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4641 if (XVEC (orig, i) == orig_asm_constraints_vector)
4642 XVEC (copy, i) = copy_asm_constraints_vector;
4643 else if (XVEC (orig, i) == orig_asm_operands_vector)
4644 XVEC (copy, i) = copy_asm_operands_vector;
4645 else if (XVEC (orig, i) != NULL)
4647 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4648 for (j = 0; j < XVECLEN (copy, i); j++)
4649 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4660 /* These are left unchanged. */
4668 if (code == SCRATCH)
4670 i = copy_insn_n_scratches++;
4671 if (i >= MAX_RECOG_OPERANDS)
4673 copy_insn_scratch_in[i] = orig;
4674 copy_insn_scratch_out[i] = copy;
4676 else if (code == ASM_OPERANDS)
4678 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4679 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4680 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4681 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4687 /* Create a new copy of an rtx.
4688 This function differs from copy_rtx in that it handles SCRATCHes and
4689 ASM_OPERANDs properly.
4690 INSN doesn't really have to be a full INSN; it could be just the
4696 copy_insn_n_scratches = 0;
4697 orig_asm_operands_vector = 0;
4698 orig_asm_constraints_vector = 0;
4699 copy_asm_operands_vector = 0;
4700 copy_asm_constraints_vector = 0;
4701 return copy_insn_1 (insn);
4704 /* Initialize data structures and variables in this file
4705 before generating rtl for each function. */
4710 struct function *f = cfun;
4712 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
4715 seq_rtl_expr = NULL;
4717 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4720 first_label_num = label_num;
4724 clear_emit_caches ();
4726 /* Init the tables that describe all the pseudo regs. */
4728 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4730 f->emit->regno_pointer_align
4731 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
4732 sizeof (unsigned char));
4735 = (rtx *) xcalloc (f->emit->regno_pointer_align_length, sizeof (rtx));
4738 = (tree *) xcalloc (f->emit->regno_pointer_align_length, sizeof (tree));
4740 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4741 init_virtual_regs (f->emit);
4743 /* Indicate that the virtual registers and stack locations are
4745 REG_POINTER (stack_pointer_rtx) = 1;
4746 REG_POINTER (frame_pointer_rtx) = 1;
4747 REG_POINTER (hard_frame_pointer_rtx) = 1;
4748 REG_POINTER (arg_pointer_rtx) = 1;
4750 REG_POINTER (virtual_incoming_args_rtx) = 1;
4751 REG_POINTER (virtual_stack_vars_rtx) = 1;
4752 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
4753 REG_POINTER (virtual_outgoing_args_rtx) = 1;
4754 REG_POINTER (virtual_cfa_rtx) = 1;
4756 #ifdef STACK_BOUNDARY
4757 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
4758 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4759 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4760 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4762 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4763 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4764 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4765 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4766 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4769 #ifdef INIT_EXPANDERS
4774 /* Mark SS for GC. */
4777 mark_sequence_stack (ss)
4778 struct sequence_stack *ss;
4782 ggc_mark_rtx (ss->first);
4783 ggc_mark_tree (ss->sequence_rtl_expr);
4788 /* Mark ES for GC. */
4791 mark_emit_status (es)
4792 struct emit_status *es;
4801 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx,
4803 i > 0; --i, ++r, ++t)
4809 mark_sequence_stack (es->sequence_stack);
4810 ggc_mark_tree (es->sequence_rtl_expr);
4811 ggc_mark_rtx (es->x_first_insn);
4814 /* Generate the constant 0. */
4817 gen_const_vector_0 (mode)
4818 enum machine_mode mode;
4823 enum machine_mode inner;
4825 units = GET_MODE_NUNITS (mode);
4826 inner = GET_MODE_INNER (mode);
4828 v = rtvec_alloc (units);
4830 /* We need to call this function after we to set CONST0_RTX first. */
4831 if (!CONST0_RTX (inner))
4834 for (i = 0; i < units; ++i)
4835 RTVEC_ELT (v, i) = CONST0_RTX (inner);
4837 tem = gen_rtx_CONST_VECTOR (mode, v);
4841 /* Create some permanent unique rtl objects shared between all functions.
4842 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4845 init_emit_once (line_numbers)
4849 enum machine_mode mode;
4850 enum machine_mode double_mode;
4852 /* Initialize the CONST_INT and memory attribute hash tables. */
4853 const_int_htab = htab_create (37, const_int_htab_hash,
4854 const_int_htab_eq, NULL);
4855 ggc_add_deletable_htab (const_int_htab, 0, 0);
4857 mem_attrs_htab = htab_create (37, mem_attrs_htab_hash,
4858 mem_attrs_htab_eq, NULL);
4859 ggc_add_deletable_htab (mem_attrs_htab, 0, mem_attrs_mark);
4861 no_line_numbers = ! line_numbers;
4863 /* Compute the word and byte modes. */
4865 byte_mode = VOIDmode;
4866 word_mode = VOIDmode;
4867 double_mode = VOIDmode;
4869 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4870 mode = GET_MODE_WIDER_MODE (mode))
4872 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4873 && byte_mode == VOIDmode)
4876 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4877 && word_mode == VOIDmode)
4881 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4882 mode = GET_MODE_WIDER_MODE (mode))
4884 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4885 && double_mode == VOIDmode)
4889 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4891 /* Assign register numbers to the globally defined register rtx.
4892 This must be done at runtime because the register number field
4893 is in a union and some compilers can't initialize unions. */
4895 pc_rtx = gen_rtx (PC, VOIDmode);
4896 cc0_rtx = gen_rtx (CC0, VOIDmode);
4897 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
4898 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4899 if (hard_frame_pointer_rtx == 0)
4900 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
4901 HARD_FRAME_POINTER_REGNUM);
4902 if (arg_pointer_rtx == 0)
4903 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
4904 virtual_incoming_args_rtx =
4905 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4906 virtual_stack_vars_rtx =
4907 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4908 virtual_stack_dynamic_rtx =
4909 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4910 virtual_outgoing_args_rtx =
4911 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4912 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4914 /* These rtx must be roots if GC is enabled. */
4915 ggc_add_rtx_root (global_rtl, GR_MAX);
4917 #ifdef INIT_EXPANDERS
4918 /* This is to initialize {init|mark|free}_machine_status before the first
4919 call to push_function_context_to. This is needed by the Chill front
4920 end which calls push_function_context_to before the first call to
4921 init_function_start. */
4925 /* Create the unique rtx's for certain rtx codes and operand values. */
4927 /* Don't use gen_rtx here since gen_rtx in this case
4928 tries to use these variables. */
4929 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4930 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4931 gen_rtx_raw_CONST_INT (VOIDmode, i);
4932 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4934 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4935 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4936 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4938 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4940 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4941 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4942 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4943 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4945 for (i = 0; i <= 2; i++)
4947 REAL_VALUE_TYPE *r =
4948 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
4950 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4951 mode = GET_MODE_WIDER_MODE (mode))
4953 rtx tem = rtx_alloc (CONST_DOUBLE);
4955 /* Can't use CONST_DOUBLE_FROM_REAL_VALUE here; that uses the
4956 tables we're setting up right now. */
4957 memcpy (&CONST_DOUBLE_LOW (tem), r, sizeof (REAL_VALUE_TYPE));
4958 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4959 PUT_MODE (tem, mode);
4961 const_tiny_rtx[i][(int) mode] = tem;
4964 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4966 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4967 mode = GET_MODE_WIDER_MODE (mode))
4968 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4970 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4972 mode = GET_MODE_WIDER_MODE (mode))
4973 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4976 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
4978 mode = GET_MODE_WIDER_MODE (mode))
4979 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
4981 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
4983 mode = GET_MODE_WIDER_MODE (mode))
4984 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
4986 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
4987 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
4988 const_tiny_rtx[0][i] = const0_rtx;
4990 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4991 if (STORE_FLAG_VALUE == 1)
4992 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4994 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4995 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4996 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4997 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4998 ggc_add_rtx_root (&const_true_rtx, 1);
5000 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5001 return_address_pointer_rtx
5002 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5006 struct_value_rtx = STRUCT_VALUE;
5008 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
5011 #ifdef STRUCT_VALUE_INCOMING
5012 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
5014 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5015 struct_value_incoming_rtx
5016 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
5018 struct_value_incoming_rtx = struct_value_rtx;
5022 #ifdef STATIC_CHAIN_REGNUM
5023 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5025 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5026 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5027 static_chain_incoming_rtx
5028 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5031 static_chain_incoming_rtx = static_chain_rtx;
5035 static_chain_rtx = STATIC_CHAIN;
5037 #ifdef STATIC_CHAIN_INCOMING
5038 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5040 static_chain_incoming_rtx = static_chain_rtx;
5044 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5045 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5047 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
5048 ggc_add_rtx_root (&struct_value_rtx, 1);
5049 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
5050 ggc_add_rtx_root (&static_chain_rtx, 1);
5051 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
5052 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
5055 /* Query and clear/ restore no_line_numbers. This is used by the
5056 switch / case handling in stmt.c to give proper line numbers in
5057 warnings about unreachable code. */
5060 force_line_numbers ()
5062 int old = no_line_numbers;
5064 no_line_numbers = 0;
5066 force_next_line_note ();
5071 restore_line_number_status (old_value)
5074 no_line_numbers = old_value;
5077 /* Produce exact duplicate of insn INSN after AFTER.
5078 Care updating of libcall regions if present. */
5081 emit_copy_of_insn_after (insn, after)
5085 rtx note1, note2, link;
5087 switch (GET_CODE (insn))
5090 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5094 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5098 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5099 if (CALL_INSN_FUNCTION_USAGE (insn))
5100 CALL_INSN_FUNCTION_USAGE (new)
5101 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5102 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5103 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5110 /* Update LABEL_NUSES. */
5111 mark_jump_label (PATTERN (new), new, 0);
5113 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5115 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5116 if (REG_NOTE_KIND (link) != REG_LABEL)
5118 if (GET_CODE (link) == EXPR_LIST)
5120 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5125 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5130 /* Fix the libcall sequences. */
5131 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5134 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5136 XEXP (note1, 0) = p;
5137 XEXP (note2, 0) = new;